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1. The 555 Timer is a highly stable & inexpensive device for generating accurate time delay or
oscillation.
2. It can provide time delays ranging from microseconds to hours.
3. It can be used with power supply voltage ranging from +5V to +18V.
4. It can source or sink up to 200mA.
5. It is compatible with both TTL & CMOS logic circuits.
6. It has very high temperature stability & it is designed to operate in the temperature range -
55o to +125oC(SE 555), whereas NE555 is a commercial grade IC (0 - 70 oC).
Reset
Comparator
Trigger Charging
Output
Unit
Unit Output
Reference
Charging Unit:
Vcc
C charges through R when switch is open with time
constant RC.
R
The voltage across C is applied to positive input of the
comparator. The comparator compares this voltage with
reference voltage applied at reference input. If V c >Vref,
Output is 0 otherwise output is 1.
C Immediately after trigger, output jumps to its high level&
remains there until capacitor charges above Vref.
The time period for which V o is high is controlled by
adjusting time constant RC.
The reset input to the timer is used to interrupt the timing
interval & to reset the output. This input overrides all the
functions of the timer.
GND + Vcc
Discharge
Trigger
IC 555
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Control voltage
Reset
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Functions of pins:
1. Ground: All voltages are measured with respect to this terminal.
2. Trigger: It is the external input that will be applied to the inverting input
of the lower comparator & will be compared with V cc /3 coming from the
potential divider network.
3. Output: Complement of the output of the flip-flop acts as the final output
of timer as it passes through a power amplifier with inverter. Load can either
be connected between pin 3 & ground or pin 3 & V cc .
4. Reset : This is an input to the timing device which provides a mechanism
to reset the flip-flop in a manner which overrides the effect of any
instruction coming to the FF from lower comparator. This is effective when
the reset input is less than 0.4V.When not used it is returned to V cc .
5. Control Voltage input: Generally the fixed voltages of 1/3V cc & 2/3V cc
also aid in determining the timing interval. The control voltage at 5 can be
used when it is required to vary the time & also in such cases when the
reference level at V- of the UC is other than 2/3Vcc.
Generally when not used a capacitor of 0.01uF should be connected between
5 & ground to bypass noise or ripple from the supply.
6. Threshold: An external voltage by means of a timing capacitor & resistor
is applied to this pin. When this voltage is greater than 2/3V cc output of UC
is 1 which is given to the set input of FF thereby setting the FF making Q=1
& Q=0.
7. Discharge: This pin is connected to the collector of the discharge
transistor Q 1 .When Q output of the FF is 1,then Transistor Q 1 is on due to
sufficient base drive hence driving transistor into saturation.
When output of the FF is low Transistor Q 1 is off hence acting as a open
circuit to any external device connected to it.
8. +Vcc (Power Supply): It can work with any supply voltage between 5 &
18V.
Vref
8
5K Q2
UC
6
S Q
5
Flip
Flop
5K
LC
2 R
3
7 Q1
5K PA +
Inverter
Vcc
R 4 8
7
NE555
6 3 Output
C 2
5 1
Input
trigger
This circuit has only one stable state (0 state) .Whenever an external
trigger is applied, it produces a pulse at the output & returns back to its
stable state. The duration of the pulse depends on the values of R & C.It
is also called as Monoshot or One shot MV.
Vcc
Vref
R Q2
5K UC
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S Q
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Working:
Initially, let output be 0, then Q of FF is high & it holds the
transistor Q1 on, thus clamping the external timing capacitor to
ground.
As the input trigger passes through V cc /3, the FF is reset & hence
Q=0.This makes Q 1 off & the short circuit across timing capacitor
is released, & now output is high. Now the timing cycle begins,
charging capacitor C towards V cc through R with a time constant
RC.
After a time period T when the capacitor Voltage just exceeds
2/3V cc (as compared in UC), the UC output becomes 1 & sets the
FF output to 1.Therefore Q=1.Now transistor q1 turns on
(saturates), thereby discharging the capacitor rapidly to ground
potential. Output also returns to 0 state.
Vcc
Trigger
input
2/3 Vcc
Vc
Output Vcc
TP
Reset
Output
after reset
V c =V f + (V i – V f )e-τ /T P -----------------------------------------------(1)
e-T P /RC=1-2/3=1/3
-T /RC
P =ln(1/3)=-1.0986
T P =1.1RC-------------------------------------------------------------(2)
NOTE:
Once triggered output remains in high state until the time T P elapses
which depends only on R & C.Any additional trigger pulse coming
during this time will not alter the output states.
But, if a negative going reset pulse is applied at pin 4 during the
timing cycle, Q 2 turns on thereby over riding Q output of FF & Q 1
also turns on & external capacitor C is immediately discharged as
shown in fig.
Now even if Reset is released output will remain low till the next
negative going trigger pulse comes along.
Vi
Ti
Vo
To
7 NE
6 55 3 Output
C 2
5 1 LED
The monostable circuit shown above can also be called as a pulse stretcher if
we consider its working where a narrow negative trigger pulse input is
converted to a wide positive output pulse.
This circuit is especially useful in LED displays where the display should be
kept on for at least a sufficient duration of time so that it can be noticed by
the human user (persistence of vision).The input & output pulses are as
shown below:
Vi
1µS
Vo
100µS
7
NE555
Rb 3 Output
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6
C
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Vcc
Vref
Ra Q2
5K UC
S Q
Rb
0.01µF FF
5K
LC
R
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Q1
Working:
Comparing monostable operation, timing resistor is now split into two
parts R a & R b . Pin 7, collector of discharging transistor Q1 is
connected to the junction of R a & R b .
Assume initially output is high. Output of FF, Q=0. The discharge
transistor Q1 is off .Now the external timing capacitor charges
towards V cc with a time constant (R a + R b ) C.
As the capacitor Voltage rises just above 2/3V cc , the output of UC
becomes 1 & that of LC becomes 0 thereby setting the output of
control FF to 1.Hence final output at pin 3 becomes 0.
Now the discharge transistor Q1 is on & the capacitor discharges with
a time constant (R b )C.As the capacitor voltage just reaches below
1/3V cc LC is triggered on & output of UC becomes 0 thereby making
the output of FF 0 & final output high.
This unclamps the timing capacitor C which now starts getting
charged again repetitively.
TL
Vo
TH
Vc 2/3 Vcc
1/3 Vcc
Expression for T:
The instantaneous voltage across the capacitor is given by,
V c =V f + (V i – V f )e-τ /T
T D =0.693R b C----------------------------------------------------(4)
T=T C +T D
Duty Cycle:
The ratio of the time duration for which the output is high to the total time
period T is called the duty cycle of the astable multivibrator denoted by D.
D=T C /T----------------------------------------------------------(7)
From equations 3 & 5,
D = (R a +R b )/ (R a +2R b )------------------------------------------(8)
Note:
A look at equation (8) reveals that D can never be equal to or less than
0.5 for any combination of R a & R b ,& it is always greater than 0.5
To obtain a duty cycle of 50%, R a =0 which results in an additional current
through transistor Q1 hence damaging the transistor.
However there is an alternate solution to this problem. A switching diode is
connected in parallel with R b as shown in figure below.
Vcc
Ra 44 88
77
NE
D Rb FF
55 3 Output
66
C 22 5
5 11
0.01µF
In the above circuit, during the charging interval of the capacitor the diode is
forward biased, it conducts & bypasses Rb.So the capacitor charges through
T C =0.693R b C------------------------------------------------------(10)
T= 0.693(R a +R b ) C-------------------------------------------------(11)
D= D=T C /T = (R a )/ (R a +R b )--------------------------------------(12)
If we set R a =R b , we get a duty cycle of 50% & a symmetrical square wave
at the output.
Vcc
Ra
4 8
Rf
7
Output
FF 3
Rb
6
C 2
5 1
0.01µF
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Here the capacitor charges through R a & the forward biased diode D &
discharges through R b .In order to make the charging & discharging times
equal, the resistance R a is constructed with a fixed resistance in series
with a potentiometer as shown in figure, so that the potentiometer can be
adjusted to get R a +R f =R b in order to obtain an exact symmetrical square
wave output where R f is the forward resistance of the diode.
Vcc
VD 4 8
7
Q Output
FF 3
6
2
R 5 1
C
0.01µF
Here the current mirror acts as a constant current source & charges the
capacitor C linearly towards V cc .When the capacitor voltage rises above
2/3V cc the UC sets the FF output to 1 which in turn turns on the discharge
transistor Q1 on. Thus, the capacitor discharges rapidly through transistor
Q1.When the capacitor voltage drops below 1/3vcc LC output resets the
FF output to 0 which causes the discharge transistor to turn off & as a
result the capacitor C begins to charge again. The charging & discharging
of the capacitor repeats continually resulting in the waveform shown in
fig.
Also T c >>T D because the capacitor discharges through the on transistor
whose resistance is very small. Hence T=T c .
During the charging time Tc, the capacitor voltage changes by 1/3V cc due
to the flow of the constant current I c .
The charge acquired by the capacitor C as a result of the constant current
I c flowing for a time t c is given by,
Q=I c t c ------------------------------------------------------------------(13)
He charge acquired by a capacitor of capacitance C is also given by
Q=CV-------------------------------------------------------------------(14)
Where, V is the change in voltage across the capacitor.
In this case, since V=1/3V cc we have
Q=1/3V cc ---------------------------------------------------------------(15)
Hence, from equations (13) & (14), we get
t c I c =1/3V cc C-----------------------------------------------------------(16)
The period of the free running ramp is T=t c & therefore, from equation
(16)
T=t c =V cc C/3I c ---------------------------------------------------------(17)
Where the constant current I c is given by,
I c =V cc -V BE /R---------------------------------------------------------(18)
The free running frequency of the ramp generator is thus
f=1/T=3I c /V cc C--------------------------------------------------------(19)
--------------------------------------------------------------------------------------------
DESIGN EXAMPLES:
3. Design a 555 monostable circuit that stretches the width of a narrow pulse
from 1µs to 100µs.
The width TP of the monostable output should be 100µs.Therefore,
RC=T P /1.1=100*10-6/1.1=90.9*10-6
Let C=0.1µF, we have
R=90.9*10-6/C = 90.9*10-6/0.1*10-6 =909Ώ.
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