gl10fh 0908 2140 PDF

8 7 6 5 4 3 2 1
THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION,2009 ALL RIGHT RESERVED.
F HSF Property:ROHS or Halogen-Free(5L3?) F
E E
GL10FH D
2011.09.08
C C
B B
A A
EE DATE POWER DATE

DRAWER
DESIGN
INVENTEC
CHECK TITLE MODEL,PROJECT,FUNCTION
RESPONSIBLE Everest Main Board
21-OCT-2002 SIZE= VER: SIZE CODE DOC.NUMBER REV

FILE NAME: C CS 1310xxxxx-0-0 X01
DATE CHANGE NO. REV P/N XXX SHEET 1 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TABLE OF CONTENTS
D
D
PAGE PAGE PAGE

1. COVER PAGE 26. AMP 51 .CPU 6 GND
2. INDEX 27. CARDREADER
28. MINI1 WLAN/DEBUG CARD 52. PCH 1
3. BLOCK DIAGRAM
29. MINI2 3G/LTE 53. PCH 2
4. POWER MAP
30. B-CAS 54. PCH 3
5. POWER CHARGER
6. POWER +V3LA/+V3A/+5A 31 SATA HDD/ODD CONN 55. PCH 4 AXG
C C
7. POWER +V1.5/+V0.75 32. USB 2.0 CONN 56. PCH 5 USB

8. POWER +V1.8S 33. USB 3.0 CONTROLLER 57. PCH 6 MISC
34. USB 3.0 CONN W/ S&C 58. PCH 7 POWER
9. POWER VCCIO 35. USB 3.0 CONN 59. PCH 8 POWER
10. POWER VCCSA 36. EDP CONN 60. PCH 9 GND
11. POWER VCORE 37. LCM CONN 61. MXM CONNECTOR 1
12. POWER VGFX 38. CRT CONN 62. MXM CONNECTOR 2
13. POWER VCORE_DGPU 39. HDMI CONN 63. POWER BUTTON BOARD
14. ENABLE PIN 40. HDMI CEC
64. EMI
15. LOAD SWITCH-1 41. DDR3 DIMM0 65. 3D SENSOR
B
16. LOAD SWITCH-2(FOR OPTIMUS) 42. DDR3 DIMM1 66. CIR B
17. PCB SCREW 43. DDR3 DIMM0 67. USB REDRIVER
18. HALL SENSOR 44. DDR3 DIMM1 68. CIR
19. LED 45. FAN & THERMAL SENSOR 69. LOGO LED
20. K/B & TP/B CONN 46. CPU 1 70. ECO BUTTOM
21. EC 47. CPU 2
22. LAN 48. CPU 3 DRAM
23. RJ45 & TRANSFORMER 49. CPU 4 POWER
24. AUDIO CODEC 50. CPU 5 POWER
25. SPEAKER/HP JACK/MIC JACK
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS
CHANGE by DATE SHEET 2 of 70

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR3@1.5/0.75V
(1333/1600 MHZ)
IVY BRIDGE DDR3 INTERFACE 204-PIN SODIMM0
PEG DC 45W
NVIDIA MXM
SOCKET-RPGA989 DDR3@1.5/0.75V
W/ OPTIMUS (1333/1600 MHZ)
37.5 X 37.5 X 5 mm DDR3 INTERFACE
204-PIN SODIMM1
D
D
DDR3@1.5/0.75V
FDI DMI 2.0
(1333/1600 MHZ)
204-PIN SODIMM0
DDR3@1.5/0.75V
DDR3 INTERFACE
(1333/1600 MHZ)
204-PIN SODIMM1
EDP INTERNAL MIC IN
AUDIO CODEC EXT MIC IN

C C
HDMI & CEC
HDA HEADPHONE
JUMPER
PCH REA_ALC280Q_GRT_QFN_48P
CRT AMP
PANTHER POINT
USB2.0
LCM 25 X 25 X 2.3 mm USB_5: MINICARD WLAN
USB_10:WEBCAM
USB_11: TV2
USB_12:3D
USB_13: TV
B B
SLEEP & CHARGE
USB3.0
PCIE_1:LAN
RJ45 PCIE
ATHEROS_AR8161/8162 USB_0: USB3.0 CONN
USB_1: USB3.0 CONN
PCIE USB_2: USB3.0 CONN
PCIE_2:WLAN
USB_3: USB3.0 CONN
PCIE SATA
SATA0:HDDB
CARD READER
REA_RTS5229 SATA1: HDDA
A
ENE-P2809A SATA2: MINICARD A
THERMAL SENSOR SATA6: ODD

SPI SPI FLASH 2MB
EC WINDBOND
BATTERY CHARGER & NPCE885LA0DX
DC/DC & IMVP 7

INVENTEC
SPI
LI-ION BATTERY SPI FLASH 4MB TITLE
6-Cell KEYBOARD TOUCH PAD
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ADAPTOR +VBAT +V5A_+-5% +V5S
BQ24725RGRR
FUSE TPS51123 AO6402L
CHARGER
EC_SMB2 POWER BUDGET 12.139 A POWER BUDGET 4.711AINRUSH 0.9A

65W-75W 8A 6036A0003401
CHG_EN F 300K PEAK2.592A 100.82UF_0.842M£[
90W 10A 6036A0002901 BATT_IN OCP 10.4A R=120K +V0.85S_+-0.5%
ACPRES PEAK 7.283A AVG 2.363A
120W 12A 6036A0006001
D
220UF_25M£[ // 53.92UF_1.529M£[ TSP51461
D
POWER BUDGET 6A
F 340K
OCP 6A
BATTERY PACK
PEAK 6A AVG 1.262A
+V3LA_+-5%
+VCORE_+-0.5% +V3A +V3_LAN
+VCORE1_+-0.5% TPS51123 AO6402L AM2321P

TI_TPS61640
POWER BUDGET 9.429 A INRUSH 0.9A
POWER BUDGET 4.711A POWER BUDGET 4.711A INRUSH 0.9A
POWER BUDGET 53A
F 375K PEAK2.592A
100.82UF_0.842M£[ PEAK2.592A 100.82UF_0.842M£[
F 280K OCP 10.7A R=130K +V3S +V1.8S
OCP 53A PEAK 5.695A AVG1.048 A
C C
PEAK 53A AVG 28.822A 220UF_25M£[ //10.6UF_5.924M£[ AO6402L GMT_AT1530F11U
1880UF_1.1M£[ // 2276UF_0.203M£[
VDD_CORE POWER BUDGET 4.711A INRUSH 0.9A POWER BUDGET 4.711A INRUSH 0.9A
PEAK2.592A 100.82UF_0.842M£[ PEAK2.592A 100.82UF_0.842M£[
TPS51217
POWER BUDGET 20.070A V1.5_+-5% +V0.75S

F 340K
OCP 29.1A R=75K
PEAK 20.070A AVG 11.531A
TPS51216 TPS51216
560UF_25M£[ // 80UF_0.93M£[
POWER BUDGET 13.7 A

+V1.5S
F 340K
OCP 10.1A R=115K
PEAK 17.107A AVG4.835 A
B
560UF_25M£[ // 1274.8UF_0.214M£[
AON7410 B
+V1.5_CPU
AON7410
+VTT_+-5%
TPS51216
POWER BUDGET 13.7 A
CHANGING POINTS~~ F 340K
A TPS51218 SAME AS 2009 PROJECT OCP 10.1A R=115K A
TPS51217 SAME AS 2010 PROJECT PEAK 17.107A AVG4.835 A
+V1.8S IS NEW IC GMT_AT1530F11U
560UF_25M£[ // 1274.8UF_0.214M£[
CHARGE IS NEW IC BQ24725
VCC CORE IS NEW IC TPS51640
VTT IS NEW IC TPS51219
V0.85 IS NEW IC TPS 51641
V3_V5 IS NEW IC TPS51123
POWER BUDGET ~~IC SPEC (MAX CURRENT ) INVENTEC
PEAK CURRENT ~~RATIO OF INTERNAL PREDICTION TITLE
AVG CURRENT ~~TEST RESULT(MAX CURRENT) MODEL,PROJECT,FUNCTION

Block Diagram
INRUSH ~~L/S TURN NO
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FUSE6000
3
65W-75W 8A(6036A0003401)
90W 10A(6036A0002901) PVPACK
1 2 FUSE6050
120W 12A(6036A0006001)
P3V3AL 1 2
NFE31PT222Z1E9L
1
L7601 PVADPTR
C6050 LITTLEFUSE_R451015_15A_65V
L7600
R6053
FUSE6000 NFE31PT222Z1E9L 1 R6054 2 1 2
CN6000 1000PF_50V_2
8 1 2 1 2
8 1M_5%_2 CN6050
2
7 7 220K_5%_2
6 8A_125V C7602 1 BATT+
6
2
3
5 BATT+
5 C7601 3
4 10PF_50V_2 ID
4 1000PF_50V_2 BATT_IN R6052
1 1K_5%_2
2 4
3 3 21E8 21E6 OUT B-I
5
2
2 TS
2
EC_SMB1_DATA R6050
1 33_5%_2
2 6 G1
65C5 21D3 21D2 SMD G
D
1 1 BI
65C5 21D3 21D2 EC_SMB1_CLK 1 2 7 SMC G G2
BI D
2
R6051 33_5%_2 8 GND G G3
ACES_50299_00801_001_8P
9 GND G G4
D6701 D6702 D6703 SYN_200045GR009G15JZR_9P

PVADPTR R6015
EZJZ0V500AA_DY EZJZ0V500AA_DY EZJZ0V500AA_DY
1 2
1
4.7K_5%_3
1 R6014 2
RSC_0603_DY PVBAT
PVPACK
Q6010 Q6011 R6000 Q6012 C6033

8 D S 1 1 S D 8 1 2 8 D S 1 1 2
7 2 2 7 3 4 7 2
1
6 3 3 6 0.01_1%_6 6 3 0.1UF_25V_3
5 G 4 4 G 5 C6000 5 G 4
1
CSC0805_DY
+
NMOS_4D3S NMOS_4D3S NMOS_4D3S
C6020
C6014
1
TPCA8065_H TPCA8065_H 1 2 TPCA8065_H
68UF_25V_DY
C6030 C6031
1 2 1 2
2
0.1UF_16V_2
1
PAD6000
2
PVADPTR POWERPAD_2_0610
1
2200PF_50V_2 0.1UF_25V_3
2
C C
R6006
1
1
RSC_1206_DY
RSC_1206_DY
1
1 2 3
2
D6000
RSC_0603_DY
R6018
R6019
D6002
2
DIODES_BAV99 1 A1 A2 2
P3V3AL
R6002 C6021 C6022
C
2
R6004 R6005 0.1UF_25V_3
2
20.5K_1%_2
2
4.3K_5%_2 4.3K_5%_2 0.1UF_25V_3 BAT54C_30V_0.2A
2
3
1
5
6
7
8
R6013
1
10K_5%_3 Q6000
R6012
D
AON7410
10_5%_5 C6001 C6002 C6003 C6004
NMOS_4D3S
1
470PF_50V_2 4.7UF_25V_5 4.7UF_25V_5 CSC0805_DY

21E6 OUT
ACPRES
5
4
3
2
1
1
C6026
2
U6000 1UF_25V_3
ACOK
ACDRV
CMSRC
ACP
ACN
1 2
S
TI_BQ24725RGRR_QFN_20P
21
4
3
2
1
TML
VRCHARGER_HG
6 ACDET
VCC 20 L6000 R6001
21E8 21E6 HW_I_ADC 7 IOUT
OUT PHASE 19 VRCHARGER_PH 1 2 1 2
B 8 SDA B
HIDRV 18 C6027 3 4
9 SCL ETQP3W4R7WFN
1
BTST 17 1 2 1 2
10 ILIM
REGN 16 R6020 0.01_1%_6
C6036
BATDRV
5
6
7
8
1
SHORT_0603 0.047UF_16V_2
LODRV
CSC0805_DY
C6037 100PF_50V_2
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
SRN
SRP
GND
C6010
C6011
C6012
C6013
Q6001
100PF_50V_2 P3V3AL R7600
D
C
1
AON7410
NEAR IC RSC_0603_DY
NMOS_4D3S
SBR3U40P1_DY
2
1
1 2
2
NEAR EC A1 A2 C6023
1
C6034 1 2
11
12
13
14
15
D6700
R6003
2
C6029 CSC0402_DY
3.32K_1%_3
CSC0603_DY C6028 D6001 0.1UF_16V_2
2
1
G
S
C6035 1UF_10V_2 BAT54C_30V_0.2A
1
1
2
CSC0402_DY
0.1UF_25V_3
0.1UF_25V_3
C7600
2
4
3
2
1
C6024
C6025
R6007
CSC0402_DY
110K_5%_2
1
2
R6016
EC_SMB2_DATA 1 2 VRCHARGER_LG
2
21D3 21D2 BI
62C5 40C3
SHORT_0402
R6017
62D5 40C6 21D3 21D2 EC_SMB2_CLK 1 2
BI
SHORT_0402
R6011
A 1 2 A
2
C6032 SHORT_0402
0.1UF_16V_2
R6008 R6010
30K_5%_2 2 1
6.98_1%_2
1
1 R6009 2
4.3K_5%_2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
14D7 EN_5V
IN
120K_1%_2
R6160
D
D
2
PVBAT
2VREF VRP5V0A_PH 6D3 6D3
14C7 EN_3V OUT OUT
IN
1
PAD6110 5V_PG
OUT
1
R6110
130K_1%_2
POWERPAD_2_0610
2
VBATP
2
6C3 14C8
OUT
14C8 6C6 VBATP
IN
1
8
7
6
5
5
6
7
8
1
C6123
1
1
Q6100 Q6150
6
5
4
3
2
1
25
0.22UF_6.3V_2
D
D
AON7410
C6160 C6161
C C6111 C
NMOS_4D3S
AON7410
C6110
NMOS_4D3S
TML
TRIP2
VFB2
TONSEL
VREF
VFB1
TRIP1
2
4.7UF_25V_5 4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
2
2
2
R6114 7 VO2 VO1 24
S
S
C6115 2.2_5%_3 8 VREG3 PGOOD 23 R6155 C6155
2.2_5%_3
1 21 2 9 VBST2 VBST1 22
1 1
2 2
1
2
3
4
4
3
2
1
L6100 VRP3V3A_HG
10 DRVH2 U6100 DRVH1 VRP5V0A_HG
21 L6150
14D6
14D6 VRP3V3A 1 2 0.1UF_16V_2 VRP3V3A_PH
11 LL2 LL1 VRP5V0A_PH0.1UF_16V_2
20 1 2 VRP5V0A 14C8
OUT OUT
VRP3V3A_LG
12 DRVL2 DRVL1 VRP5V0A_LG
19 14D4
ETQP3W3R3WFN ETQP3W3R3WFN
1
1
SKIPSEL
8
7
6
5
5
6
7
8
1
1
VREG5
Q6101 R6150
Q6151
EN0
GND
VIN
ENC
R7610 R7615
AON7702A
D
D
R6100 RSC_0603_DY 14C6 VRP3V3A_LDO RSC_0603_DY

AON7702A
OUT
14C8
21
TI_TPS51123RGER_QFN_24P
1
2
15.4K_1%_2
13
14
15
16
17
18
1
2
6.8K_1%_2
2
C7615
+
C6100 14C7 SKIP_3V_5V C6150
C7610 IN CSC0402_DY
+
EN_3V_5V
G
1
G
S
330UF_6.3V
S
CSC0402_DY IN
1
330UF_6.3V VRP5V0A_VIN VRP5V0A_LDO

2
1
2
3
4
4
3
2
1
2
14C7 14D6
IN OUT R6151
2
R6101 10K_1%_2
1
1UF_25V_3
2
B 10K_1%_2 B
C6122
C6121 C6120
2
1UF_6.3V_2 R6113
10UF_6.3V_3
RSC_0402_DY
2
2
VO=(( R6150/R6151)+1)*2
VOUT=((R6100/R6101)+1)*2 VRP5V0A_LG 6B3 14D5 6B3 14D5

OUT
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVBAT
POWERPAD_2_0610
2
P5V0A
PAD6210
2
D
1
D
P0V75S
1
1
2.2UF_6.3V_3
C6216
5
6
7
8
1
Q6200
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
FDMC8884
C6210
C6211
C6212
NMOS_4D3S
2
2
U6200
S
R6215 C6215
12 V5IN VBST 15 1 2 1 2 P1V5
4
3
2
1
VRP1V5_HG
14 2.2_5%_3
DRVH 0.1UF_16V_2
L6200
14D1 EN_0V75 17 S3 SW VRP1V5_PH
13 1 1 2 2
IN OUT
3 3 4 4
RSC_0603_DY
EN_1V5
2
14D1 16 S5
IN
POWERPAD1X1M
2
ETQP3W1R0WFN
5
6
7
8
C C
R7620
VRP1V5_LG
11
FDMS0310AS
DRVL
Q6201
D
PAD6220
1
R6200
DDR3L_SEL
560UF_2.5V
1 2 6 VREF PGND 10
IN
+
CSC0402_DY
1
11
C6200
10K_1%_2 20
PGOOD
C7620
1
9
2
S
VDDQSNS
8 2
4
3
2
1
REFIN VLDOIN
2
VTT 3
VTTSNS 1
7 GND
P0V75M_VREF
2
1
0.01UF_50V_2
0.1UF_16V_2
52.3K_1%_2
19 4
R6201
C6217
C6218
MODE VTTGND
18 TRIP VTTREF 5
1
21
1
100K_5%_2
TML
1
R6203
75K_1%_2
10UF_6.3V_3
0.22UF_6.3V_2
B 1V5_PG B
1 R6202
C6220
C6221
OUT 14C2
TI_TPS51216RUKR_QFN_20P
2
2
VOUT=REFIN=1.8*(R6201/(R6200+R6201))
MODE=100KOHM:TRACKING DISCHARGE
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P5V0A P3V3S
C C
1
1
GMT_AT1530F11U_SOP8_8P
10UF_6.3V_3
U6970 VOUT=((13K+10K)+1)*0.8
R6970
C6971
10_5%_2
TML 9 OCP=4.5AMP
L6970 VRP1V8S
8 VIN LX 7 VRP1V8S_PH 1 2 14A2
OUT
2
2
PAN_ELL5PR2R2N
1
CSC0402_DY
13K_1%_2
R6973
22UF_6.3V_5
C6974
C6970
1 VCC FB 4
2
EN_1V8
2
14B1 5 EN REF 2
IN
1
1
PGND
0.1UF_16V_2
0.1UF_16V_2
10K_1%_2
GND
C6972
C6973
R6972
2
2
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
14B7 EN_VCCP PVBAT

IN
POWERPAD_2_0610
2
PAD6310
1
2
100K_5%_2
R6303
1
2
1
14B6 14A8 VCCP_PG
OUT
5
6
7
8
C R6315 C6315 C
1
1 2 1 2
Q6300
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
FDMC8884
D
17
16
15
14
13
C6310
C6311
C6312
2.2_5%_3
NMOS_4D3S
P3V3A 0.1UF_16V_2
U6300
R6306
PWPD
MODE
PGOOD
EN
1 2
BST
2
G
S
10K_5%_2 1 12 VRP1VO_VCCP_PH
VREF SW
R6307
4
3
2
1
50A2 VCCIO_SEL 1 2 2 REFIN DH 11 VRP1VO_VCCP_HG
IN
1
2.2UF_6.3V_3
VSS_SENSE_VCCIO 0_5%_2_DY 3 10 VRP1V0_VCCP_LG L6300

C6318
49A2 IN GSNS DL
1 1 2 2 VRP1V05S 14A8
P5V0A OUT
49A2 VCC_SENSE_VCCIO 4 VSNS V5 9 3 3 4 4
IN
RSC_0603_DY
5
6
7
8
2
COMP
PGND
CYN_PCMB063T_R68MS_4P
2
TRIP
GND
FDMS0310AS
R7630
Q6301
D
1
1
TI_TPS51219RTER_QFN_16P
22UF_6.3V_5
560UF_2.5V
2.2UF_6.3V_3
C6316
+
1 1
C6300
C6301
C6319
CSC0402_DY
5
2 6
8
2 1
86.6K_1%_2
C7630
0.01UF_50V_2
2
R6302
2
B B
4
3
2
1
2
1
VOUT=1.05V@REFIN=3.3V; VOUT=1.0V@REFIN=GND
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
1
C6522
0.01UF_50V_2
C6520 R6520
1 2 1 2
2
3300PF_50V_2 5.11K_1%_2
1
VCCSA_SENSE 50A2
IN
C6521
P5V0A R6521
0.22UF_6.3V_2 1 2
2
RSC_0402_DY
1
2
3
4
5
6
C C
COMP
MODE
GND
SLEW
VOUT
VREF
TI_TPS51461RGER_QFN_24P
25 TML L6500
24 VIN SW 7 VRPVSA_PH 1 1 2 2 VRPVCCSA 14A6
OUT
23 VIN SW 8 3 3 4 4
22 VIN U6500 SW 9
1
21 PGND SW 10 CYN_PCMB063T_R33MS_4P
C6510 C6511 20 PGND SW 11 C6515
1
0.1UF_16V_2 19 PGND BST 12 1 2
22UF_6.3V_5
PGOOD
C6500 C6501 C6502 C6503
V5DRV
V5FILT
1
VID1
VID0
0.1UF_16V_2
2
EN
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5_DY
R7650
2
RSC_0603_DY
18
17
16
15
14
13
EN_SA
1 2
IN 14B5
R6524
1 2 VCCSA_VID0 C7650
IN 50A2
CSC0402_DY
SHORT_0402
R6525
2
1 2 VCCSA_VID1 50A2
IN
1
B SHORT_0402 B
1UF_6.3V_2
1UF_6.3V_2
C6523
C6524
2
SA_PG 14A6 21B6

OUT
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R6620 R6622 PVBAT

11D7 11D4 11C8 11B7 11A7 11A4 VREF_CPU 1 2 1 2
IN
39.2K_1%_2 56K_1%_2
1
12D5
12D5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
C6611
C6612
C6613
C6614
C6615
C6616
C6617
C6618
C6619
C6620
C6621
R6621 R6623
1 2 1 2 C6699
C6610
68UF_25V
42.2K_1%_2 24K_1%_2
2
P3V3A
C6632
IN
11D6 11D4 11C8 11B7 11A7 11A4 VREF_CPU 1 2
IN
11C3
11C3
IN
1
R6635
1
100PF_50V_2 1 2
C6631 11D5 CPU_CSN1
OUT
11D3
RSC_0402_DY
49A3
49A3
R6618 0.1UF_16V_2_DY
11D3
R6625
D 1 2 1 R6636 2 100K_5%_NTC
2
D
2
C6623
8.45K_1%_2 RSC_0402_DY R6619 CPU_CSP1 1 2
11D5
IN
IN
2 VREF_CPU OUT
1
1 11A4 11A7 11B7 11C8 11D6
IN
11D7
R6626 15.4K_1%_2 0.033UF_16V_2
IN
IN
IN
IN
P5V0A
CPU_CSN3
CPU_CSP3
2.4K_1%_2 PVBAT 11B3 12A5 12C5 R6605
R6617 IN
11C4 V5_CPU 1 2 12D5 1 2
OUT
11 VCCSENSE
12 VSSSENSE
5
6
7
8
6 CPU_CSN2
7 CPU_CSP2
4 CPU_CSP1
CPU_CSN1
2
1
10_5%_3
162K_1%_2
Q6610
FDMS7692
D
R6602 R6603 R6604
NMOS_4D3S
PVCORE
1
C6629 C6630 1 2 1 2 1 2
1
10
2.2UF_10V_3 4.7UF_10V_3
R6627 17.8K_1%_2 100K_5%_NTC 28.7K_1%_2
S
39K_1%_2
CCOMP
CGFB
CVFB
CCSN3
CCSP3
CCSP2
CCSN2
CCSN1
CCSP1
CF-IMAX
COCP-R
CTHERM
PAN_ETQP4LR36ZFC_4P
3 4
2
4
3
2
1
GND 49 1 2
1
5
6
7
8
L6610
P3V3A 13 48
FDMS0306AS
GOCP-R V5 11D5
11D6 11D7 IN V5_CPU
Q6611
R7661
D
11C8 11D4
1
VREF_CPU RSC_0603_DY C6600 C6601
1
11B7 14 VREF CDH1 47
VREF_CPU 11A4 OUT 470UF_2V
IN
21
11A7 R6601 C6622 470UF_2V
+
15 V3R3 CBST1 46 1 2 1 2
1
C C7661 C
C6634 VR_ON 16 45 2.2_5%_3 0.1UF_16V_2 CSC0402_DY
S
VR_ON CSW1
IN
3
2.2UF_6.3V_3
3
CORE_PG 17 44 CPU_CSN2
4
3
2
1
2
11A4 OUT CPGOOD U6600 CDL1 11D5 OUT
C6633
1
P5V0A
2
R6628
2.2UF_6.3V_3
49B1 11A3 VR_SVID_CLK 18 VCLK V5DRV 43
IN
RSC_0402_DY VR_SVID_ALERT# 19 42
49B1 OUT ALERT# PGND C6625
11D6 CPU_CSP2 1 2
OUT
VR_SVID_DATA 20 41
2
R6711 49B1 11A3 BI VDIO TI_TPS51650RSLR_QFN_48P CDL2
0.033UF_16V_2
110K_1%_2 CPU_PROCHOT# 21 40
46D6 21C3 OUT VR_HOT# CSW2
PVBAT R6610
IN 11D3 12A5 12C5 1 2
R6606 C6624 12D5
5
6
7
8
22 SLEW CBST2 39 1 2 1 2
162K_1%_2
2.2_5%_3 0.1UF_16V_2
Q6620
FDMS7692
D
11A4 AXG_PG 23 GPGOOD CDH2 38 R6607 R6608 R6609
OUT
NMOS_4D3S
R6616 1 2 1 2 1 2 PVCORE
24 GF_IMAX VBAT 37 1 2
GTHERM
GSKIP#
17.8K_1%_2 100K_5%_NTC 28.7K_1%_2
GCOMP
GCSN1
GCSP1
GCSP2
GCSN2
GPWM1
GPWM2
CPWM3
GGFB
GVFB
10K_5%_3
1
S
R6629 PAN_ETQP4LR36ZFC_4P
20K_1%_2 3 4
4
3
2
1
B GFX_VSS_SENSE 1 2 1 2 B
R6712 IN PVBAT
1
25
26
27
28
29
30
31
32
33
GPWM1 34
35
CPWM3 36
R6713 0_5%_2 L6620
5
6
7
8
24K_1%_2 GFX_VCC_SENSE 1 2
GPWM2
IN
2
FDMS0306AS
R7662
0_5%_2
Q6621
R6715
D
RSC_0603_DY
1
11D7
P3V3A
21
11D6 C6602
560UF_2.5V
11C8 C6726
470UF_2V
C6603
+
VREF_CPU
+
11A4 1 2 1 2 C7662
IN
OUT
OUT
11A7 OUT
1
R6719
1 0_5%_2_DY
2
11D4 CSC0402_DY
S
100PF_50V_2
R6721 0_5%_2_DY
2
R6714 R6716 1 2
2
R6718
4
3
2
1
0_5%_2_DY 0_5%_2_DY
12D8
1 2
12B8
12A8
R6723
1 0_5%_2_DY
2
4.12K_1%_2
2
R6725 0_5%_2_DY
EN_PVCORE R6731
IN
0_5%_2
0_5%_2
0_5%_2
0_5%_2
1 2 VREF_CPU 11A7 11B7 11C8 11D4 11D6 11D7

IN
1
RSC_0402_DY
1
R6724
R6720
R6722
R6726
GSKIP# 12B8
R6630 OUT
2
20K_5%_2
2
GPU_CSN1
GPU_CSN2
GPU_CSP1
GPU_CSP2
2
A A
R6730 P3V3A P1V0S_VCCP
VR_ON 11C7
OUT
100K_5%_2
1
R6631
IN
IN
IN
IN
1
1
8.66K_1%_2
0.1UF_16V_2
130_1%_2
2K_5%_2
54.9_1%_2
R6732
R6632
R6633
C6635
2K_5%_2
R6634
R6728
2
11D7 11D6 11D4 11C8 11B7 11A4 VREF_CPU 1 2

IN
INVENTEC
1
15.4K_1%_2
12C5
12C5
12A5
12B5
2
2
C6727 CORE_PG VR_SVID_CLK

11C7 OUT 11C7 IN
0.1UF_16V_2_DY 49B1 TITLE
2
R6729 MODEL,PROJECT,FUNCTION
2
AXG_PG VR_SVID_DATA Block Diagram

11B7 OUT 49B1 11C7 BI
100K_5%_NTC
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
R6638 A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
11D6 CPU_CSN3
OUT
C6628
11D6 CPU_CSP3 1 2
OUT
0.033UF_16V_2
PVBAT R6615
11B3 11D3 12A5
IN 1 2
12C5
5
6
7
8
162K_1%_2
Q6630
R6611 C6626
FDMS7692
D
1 2 1 2 R6612 R6613 R6614
NMOS_4D3S
1 2 1 2 1 2 PVCORE
2.2_5%_3 0.1UF_16V_2
17.8K_1%_2 100K_5%_NTC 28.7K_1%_2
D P5V0A U6630
9
G
D
S
PAD
PAN_ETQP4LR36ZFC_4P
1 BST DRVH 8 3 4
4
3
2
1
2 SKIP# SW 7 1 2
CPWM3
1
11B5 3 PWM VDD 6 L6630
IN
5
6
7
8
4 GND DRVL 5
FDMS0306AS
Q6631
R7663
D
TI_TPS51601DRBR_SON_8P P5V0A RSC_0603_DY
21
1
1UF_6.3V_2
C6627
C7663
S
CSC0402_DY
4
3
2
1
2
2
11A6 GPU_CSN1
OUT
C6722
C 11A6 GPU_CSP1 1 2 C
OUT
0.033UF_16V_2
PVBAT R6705
IN 11B3 11D3 12A5
1 2
12D5
5
6
7
8
162K_1%_2
Q6710
R6701 C6720
FDMS7692
D
1 2 1 2 R6702 R6703 R6704
NMOS_4D3S
1 2 1 2 1 2 PVAXG PVBAT
2.2_5%_3 0.1UF_16V_2
17.8K_1%_2 100K_5%_NTC 28.7K_1%_2
U6710
9
S
PAD
11A4 GSKIP# PAN_ETQP4LR36ZFC_4P
IN
1 BST DRVH 8 3 4
4
3
2
1
2 SKIP# SW 7 1 2
1
11B5 GPWM1 3 PWM VDD 6 L6710
IN
5
6
7
8
4 GND DRVL 5
FDMS0306AS
R7671
Q6711
D
P5V0A RSC_0603_DY
TI_TPS51601DRBR_SON_8P
1
21
C6700
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
4.7UF_25V_5
C6710
C6711
C6712
C6713
C6714
C6715
C6716
C6717
1
470UF_2V
+
1UF_6.3V_2
C6721
C7671
B CSC0402_DY B
G
2
2
4
3
2
1
2
11A5 GPU_CSN2
OUT
C6725
11A6 GPU_CSP2 1 2
OUT
0.033UF_16V_2
PVBAT R6710
11B3 11D3 12C5
IN 1 2
12D5
5
6
7
8
162K_1%_2
Q6720
R6706 C6723
FDMS7692
1 2 1 2 R6707 R6708 R6709

NMOS_4D3S
1 2 1 2 1 2 PVAXG
2.2_5%_3 0.1UF_16V_2
17.8K_1%_2 100K_5%_NTC 28.7K_1%_2
P5V0A U6720
A 9 A
G
PAD
PAN_ETQP4LR36ZFC_4P
1 BST DRVH 8 3 4
4
3
2
1
2 SKIP# SW 7 1 2
1
11B5 GPWM2 3 PWM VDD 6 L6720

IN
5
6
7
8
4 GND DRVL 5
FDMS0306AS
R7672
Q6721
D
P5V0A RSC_0603_DY
TI_TPS51601DRBR_SON_8P
1
21
C6701
470UF_2V
+
INVENTEC
1
C7672
1UF_6.3V_2
CSC0402_DY
C6724
3
2
TITLE
4
3
2
1
2
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR_P1V5
3V & 5V 65B8
50D3
R7010
14B8
14A6 SLP_S3#_3R 1 2 EN_0V75 7C7
IN OUT
EN_5V 6D6 14B4 47K_5%_2
OUT VRP5V0A
1
P5V0A 14D6 14C8 6C1 21D6
IN 54B2
1
Q7000 PAD6150
0.047UF_16V_2
VRP5V0A C7005
2
1 2
C7000
14D4 14C8 6C1
IN 1 2
15D4 EC_PW_ON# 1 G 0.1UF_16V_2
IN
21C3 POWERPAD_2_0610
2
S
2 13
2
SSM3K7002BFU
C7001 D7001
2
0.1UF_16V_2
P3V3AL DIODES_BAV99
SLP_S5#_3R 1 R7012 2 EN_1V5
1
21D3 IN OUT 7C7
54B3
1
D PAD6100 0_5%_2
6C8 VRP3V3A 1 2 D
IN
1
1
1 2
C7006
POWERPAD_2_0610
2
CSC0402_DY
A1
C7002 C7003
0.1UF_16V_2
2
0.1UF_16V_2
6B3 VRP5V0A_LG 2 13
IN P3V3S
2
21F6 D7000
14C8 P5VAUXON 3
IN C P5V0AL
15D6 D7002 P15V0A
2
DIODES_BAV99
1
BAT54C_30V_0.2A_DY VRP5V0A_LDO1 2
6B4 IN R7013
1
1 2
A2
RSC_0402_DY
PAD6120 C7004
7B3 14C2 7B3 1V5_PG 1V5_PG
EN_3V POWERPAD1X1M IN OUT
1
OUT 6D6 1UF_25V_3 14C2
2
P3V3_LDO
VRP3V3A_LDO
1 R7000 2
2
14C6 6B6 IN
RSC_0402_DY
VRP5V0A 1 R7001 2 SKIP_3V_5V VRP3V3A_LDO1 2

14D4 6C1 IN OUT 6B5 IN 1 2
14D6 10K_5%_2
PAD6121
VBATP 1 R7002 2 VRP5V0A_VIN POWERPAD1X1M
6C6 6C3 IN OUT 6B5
C 0_5%_3 C
21F6 R7003
14D8 P5VAUXON 1 2 EN_3V_5V 6B4
IN OUT
15D6 0_5%_2
VCCIO VCCSA DGPU P1V8S
65B8 R7016
14D2 14B8 14A6 SLP_S3#_3R 1 2 EN_DGPU 61C5
IN OUT
54B2 50D3 21D6
65B8
0_5%_2_DY
R7040
50D3 VCCP_PG 1 2 EN_SA
14D2 R7021 14A8 9C6
IN OUT 10B4
SLP_S3#_3R 1 2 EN_VCCP R7018
14A6 IN OUT 9D6 DGPU_PWR_EN_3R
1
16B4 1 2
14B4 IN
1
0_5%_2 P3V3S
21D6
54B2 47K_5%_2 C7040 10K_5%_2
1
C7010
0.1UF_16V_2
CSC0402_DY
C7020
R7050
0.1UF_16V_2 1 2 EN_1V8 8B6
OUT
2
10K_5%_2
B B
2
1
C7050
0.01UF_50V_2
P3V3S
2
1
P3V3S
R7041
10K_5%_2
2
10K_5%_2
R7022
21B6 14A6 10A5 21B6 14A6 10A5 SA_PG SA_PG

IN OUT
2
1
14B6
14A8 D7040
9C6 14A8 9C6 VCCP_PG VCCP_PG
IN OUT P1V8S
NC
14B6 65B8
14D2 14B8 14B4 SLP_S3#_3R 3 1
IN
54B2 50D3 21D6
PAD6900
BAT54_30V_0.2A VRP1V8S 1 2
8C2
IN 1 2
A A
POWERPAD_2_0610
P1V05S
PAD6300 PVSA
1 2
1 2
POWERPAD_2_0610 PAD6500
10C1 VRPVCCSA 1 2
IN 1 2
PAD6301
9B1
IN
VRP1V05S 1
1 2
2 POWERPAD_2_0610
INVENTEC
POWERPAD_2_0610
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P15V0A P3V3AL
P3V3A
P3V3AL
Q7102 PAD7100
1
1 D S 4 1 2
1 2
1
2
R7105 5 POWERPAD_2_0610
R7104 100K_5%_2 6 3
G
PVBAT P3V3_LDO NMOS_4D1S
2
100K_5%_2_DY
1
AO6402AL
3
R7106
1
Q7101 200_5%_2
1
4
D
R7491
U7490
510K_1%_2 21C3 14D8 EC_PW_ON# 1 G C7100
IN
2
VDD
2
D 2200PF_50V_2
S
SSM3K7002BFU
2
D7490 D
1
NC
2
2
THRM_SHUTDWN#3 P5VAUXON
3
45A8 1 5 SENSE RESET# 3 14C8 14D8 21F6
OUT OUT R7100
45B1 Q7103
D
10K_5%_2
BAT54_30V_0.2A R7492 1 G
2
GND
GND
S
120K_1%_2 TI_TPS3801_01_SC70_5P
2 SSM3K7002BFU
2
P3V3AL
Q7121
1 D S 4
2
5
6 G 3
NMOS_4D1S
P15V0A AO6402AL_DY P3V3S

C PAD7101 C
POWERPAD_2_0610
Q7105
1 D S 4 2 1
1
2 1
2
470K_5%_2
1
R7107
1
5
200_5%_2
R7109
22UF_6.3V_5
6 3
C7103
G
NMOS_4D1S
AO6402AL
2
R7108
1 2
32
2
1
3
680PF_50V_2
Q7106
0_5%_2
C7102
P5V0A
1
D
Q7104
2200PF_50V_2
15B8
SLP_S3_3R 1
D
C7101
54A1 15A4 IN G
15A4 SLP_S3_3R 1 G 15B4

IN Q7122 54A1
S
15B4
1 4
2
S
D S
2 SSM3K7002BFU
2
2
SSM3K7002BFU 5
2
6 G 3
NMOS_4D1S P5V0S
AO6402AL_DY PAD7102
POWERPAD_2_0610
Q7107 2 1
B 1 D S 4 B
2 1
1
2
5
200_5%_2
R7111
1
6 3
22UF_6.3V_5
G
C7105
NMOS_4D1S
AO6402AL
3
2
R7110
1 2 Q7108
D
15B8
15A4 SLP_S3_3R 1 G
IN
1
0_5%_2
CSC0402_DY
15B4
54A1
C7104
S
SSM3K7002BFU
2
2
P1V5S
P1V5
PAD7103
POWERPAD_2_0610
Q7112
8 D S 1 1 2
1 2
1
7 2
200_5%_2
R7113
6 3
1
5 G 4
A A
22UF_6.3V_5
NMOS_4D3S
C7107
23
AON7410 P0V75S
Q7110
1
SLP_S3_3R 1
2
15B8 15B4 IN G
200_5%_2
R7114
54A1
S
SSM3K7002BFU
2
R7112
3
2
1 2
Q7111
INVENTEC
1
D
CSC0402_DY
0_5%_2 1
C7106
TITLE
S
SSM3K7002BFU Block Diagram
2
2
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
NVIDIA OPTIMUS
DURING RESET AFTER RESET
HIGH HIGH 0 : DGPU POWER SWITCH TURNED ON

DGPU_PWR_EN#
1 : POWER SWITCH TURNED OFF
0 : DGPU POWER IS NOT STABLE

DGPU_PG
1 : DGPU POWER IS STABLE
0 : KEEP DGPU IN RESET

LOW LOW
C DGPU_HOLD_RST# C
1 : RESET IS RELEASED
P3V3S
1
R7122
100K_5%_2
DGPU_PWR_EN_3R 14B4
OUT
3 2
B B
Q7123
D
56C7 56B6 DGPU_PWR_EN# 1 G SSM3K7002BFU
IN
2S
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 0~49(PCB SCREW)
D
D
FIX1 FIX5
1 1
FIX_MASK FIX_MASK
FIX2 FIX6
1 1
FIX_MASK FIX_MASK
FIX3 FIX7
1 1
FIX_MASK FIX_MASK
FIX4 FIX8
1 1
FIX_MASK FIX_MASK
C C
PCB CPU GPU WLAN

S1 S10 S14 S16
1 1 1 1
SCREW300_900_1P SCREW120_0_600_1P
SCREW330_600_1P SCREW330_600_1P
S2 S11 S15
1 1 1
SCREW300_900_1P
SCREW330_600_1P SCREW330_600_1P
S3 S12
1 1
SCREW300_900_1P
SCREW330_600_1P
S13
S5
1 1
SCREW300_900_1P
B SCREW330_600_1P B
S6
1
SCREW300_900_1P
MSATA
S7
1 S19
SCREW300_900_1P 1
SCREW120_0_600_1P
S8
1
SCREW300_900_1P
S9
1
SCREW300_900_1P FAN
S21
S18 1
1 SCREW120_0_600_1P
SCREW300_700_600_1P
S20
1
SCREW300_600_700_1P
S22
1
SCREW500_700_800_NP_1P
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 50-99(HALL SENSOR)
D
D
C P3V3AL C
1
R50
U50 100K_5%_2
VDD 1
2
3 GND
OUT 2 LID_SW#_3 21D3

OUT
1
1
MAG_MH248BESO_SOT23_3P D50
C50
VARISTOR_DY
1000PF_50V_2
2
2
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 100~199(LED)
D
SUSPEND LED P3V3A
D
D154
PWR_OLED# R160
TP100
21B6 1 1 2 1 2
IN
TP30
CSC0402_DY
150_5%_2
HT_191UY
C100
2
P5V0S
POWER ON LED
C D159 C
PWR_WLED# R150
TP101
21D6 1 1 2 1 2
IN
TP30
1
CSC0402_DY
220_5%_2
19_217_T1D_CP1Q2QY_3T
C101
P3V3S
WIFI/WIMAX/3G/LTE LED
2
D156
R155
TP104
21D6 WL_OLED# 1 1 2 1 2
IN
TP30
CSC0402_DY
150_5%_2
HT_191UY
C104
DC IN / BATTERY CHARGE LED
2
B D152 BRIGHT:BOTH AC-ADAPTER IS PLUGGED IN AND BATTERY IS FULL CHARGED B
D155 BRIGHT:WHILE CHARGING BATTERY FROM AC-ADAPTER

BLINK:LOW BATTERY
P5V0A
D152
R152
TP102
21B6 DCIN_WLED# 1 1 2 1 2
IN
TP30
1
CSC0402_DY
220_5%_2
19_217_T1D_CP1Q2QY_3T
C102
P3V3AL
2
D155
A BAT_OLED# TP103
R154 A
21B6 1 1 2 1 2
IN
TP30
1
CSC0402_DY
150_5%_2
HT_191UY
C103
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R253
1 2
REFERENCE 200~249(POWER CONN)
0_5%_2_DY
REFERENCE 250~299(KB/TP CONN)
P5V0S
P3V3S CN250
SCAN_OUT<17..0> CN200
21B3 34 34
OUT 21D3 PWR_SWIN#_3 1 1
16 SCAN_OUT<16> 33 33 OUT
2 2
32 32
2
3 3 G1 G1
17 SCAN_OUT<17> 31 31 G2 G2
21B6 PWRBTN_LED# 4 4 G2 G2
IN
30 30 G1 G1 D200
29 ACES_50224_0040N_001_4P
29 VARISTOR_DY
4 SCAN_OUT<4> 28 28
1
D 2 SCAN_OUT<2> 27 27
D
13 SCAN_OUT<13> 26 26
15 SCAN_OUT<15> 25 25
1 SCAN_OUT<1> 24 24
0 SCAN_OUT<0> 23 23
POWER CONN
11 SCAN_OUT<11> 22 22
9 SCAN_OUT<9> 21 21
5 SCAN_OUT<5> 20 20
6 SCAN_OUT<6> 19 19
P5V0S
10 SCAN_OUT<10> 18 18
14 SCAN_OUT<14> 17 17
8 SCAN_OUT<8> 16 16 CN201
12 SCAN_OUT<12> 15 15 21D6 ECO_BTN# 1 1
OUT
2 2
7 SCAN_OUT<7> 14 14 3 3 G1 G1
SCAN_OUT<3>
2
3 13 13 21B6 ECO_LED# 4 4 G2 G2
21B3 SCAN_IN<7..0> IN
IN 7 SCAN_IN<7> 12 12
2 SCAN_IN<2> 11 11
D201 ACES_50224_0040N_001_4P
VARISTOR_DY
3 SCAN_IN<3> 10 10
SCAN_IN<4> 9
1
4 9
C 0 SCAN_IN<0> 8 C
8
5 SCAN_IN<5> 7 7
6 SCAN_IN<6> 6 6
1 SCAN_IN<1> 5 5
4 4
21B6 CAPS_LED#_3 R250 1 2 200_5%_2 3 3

IN
IN
NUM_LED#_3
R251 1
1
2
2
200_5%_2_DY 2
1
2 ECO CONN
21D6 IN R252 200_5%_2 1
PTWO_AFF340_A2G1V_P _34P
KEYBOARD CONN
2
2
D258 D259 D260
P5V0S
VARISTOR_DY VARISTOR_DY VARISTOR_DY
1
1
C200
U200
1 FON# GND 8
B 2.2UF_16V_3 B
2 VIN GND 7
3 VO GND 6
2
4 VSET GND 5
P3V3S GMT_G995P1U_SOP8_8P
P3V3S
P5V0S
21E6 20A2 KB_LED_OFF#

IN
2
CN281 R254
G1 10K_5%_2
G P5V0S
1 1
CN280 USB_FP_DN 2
1
1 56B2 BI 2 CN251
1
USB_FP_DP 3 Q250
IM_DAT_5 2 56B2 BI 3
4 1 4 G2
21D3 21D2 BI 2
4 S D 4 G
4
21D3 21D2 IM_CLK_5 3 3 2 57C6 KBLED_ID 3 3 G G1
BI G G2
P5V0S OUT
4 4 5 2 2
5 5 G1 G1 3 G 6 1 1
6 6 G2 G2 PMOS_4D1S
2
ACES_50501_0044N_001_4P R256
1 2 TPC6111_DY
ACES_50503_0044N_001_4P
ACES_50501_00641_001_6P R255
2
330_5%_2
10K_5%_2_DY
A A
D280
1
PHP_PESD5V2S2UT_SOT23_3P_DY Q251
D
3
G 1 KB_LED_OFF# 20B3 21E6

IN
S
SSM3K7002BFU_DY
TOUCHPAD CONN FINGER CONN
2
INVENTEC
TITLE
KB BKL CONN Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 300~389(KBC)
P3V3AL P3V3AL_R P3V3S

F P3V3AL F
CLOSE PIN4
R318
1 2
1
10UF_6.3V_3_DY
1
1
2.2_5%_3
R320
4.7UF_6.3V_3
2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
C313
C300
C301
C302
C303
C304
C312
C306
100K_5%_2
FOR ESD PROTECT D300
NC
2
15D6 14D8 14C8 P5VAUXON 3 1 VCC_POR# 21B6
IN OUT
2
2
BAT54_30V_0.2A
P3V3AL_R P3V3AL_EC
P3V3AL P3V3AL_EC P3V3S P3V3AL_EC

P3V3S
1
1
115
102
19
46
76
88
L300
4
1 2
R332 R323 U301
FBM_11_160808_121T
10K_5%_2 4.7K_5%_2
10UF_6.3V_3_DY
P3V3S
VDD
1
AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
0.1UF_16V_2
2
C314
C305
2
E 104
P3V3AL_EC_VREF VREF LRESET#/GPIOF7 7 BUF_PLT_RST# 28C3 28C7 29C3 35C3 39A1 E
IN
LCLK/GPIOF5 2 CLK_KBPCI 56A7 56A8 62C7
BI
1
HW_I_ADC 97 3 LPC_3S_FRAME#
2
21E8 5B7 GPIO90/AD0 LFRAME#/GPIOF6 28C3 52C3

IN BI
10K_5%_2
LNB_OCP_DET 98 GPIO91/AD1 LAD3/GPIOF4 1 LPC_3S_AD<3> 28C3 52C3
IN BI
10K_5%_2
R312
R326
21E8 5D4 BATT_IN 99 GPIO92/AD2 LAD2/GPIOF3 128 LPC_3S_AD<2> 28C3 52C3
IN BI
TMPTU2_SXP 100 GPIO93/AD3 LAD1/GPIOF2 127 LPC_3S_AD<1> 28C3 52C3
OUT BI
37B5 EC_BKLTEN 108 GPIO05/AD4 LAD0/GPIOF1 126 LPC_3S_AD<0> 28C3 52C3
OUT BI
AGND_KBC LCM_BKLTEN 96 125 PCI_3S_SERIRQ
2
37C5 GPIO04/AD5 SERIRQ/GPIOF0 28B7 52C2
IN BI
5B8 ACPRES 95 GPIO03/AD6 GPIO11/CLKRUN# 8 PCI_3S_CLKRUN# 54A5 54B3
IN OUT
TMPTU1_SXP 94 GPIO07/AD7 GPIO65/SMI# 9 LNB_EN
IN OUT
21E6 5B7 HW_I_ADC ECSCI#/GPIO54 29 RUNSCI0#_3 56C7 57D6
IN OUT
25D5 EC_JD# 101 GPIO94/DA0 GPIO10/LPCPD# 124 EC_SMM_PWR 24D8
IN OUT
21E6 5D4 BATT_IN 20B3 20A2 KB_LED_OFF# 105 GPIO95/DA1 GPIO85/GA20 121 EC_3S_A20GATE 57C2
OUT OUT OUT
65B8 54B2 50D3 14D2 14B8 14B4 14A6 SLP_S3#_3R 106 GPIO96/DA2 KBRST#/GPIO86 122 KBRST# 57C2
IN P3V3AL OUT
1
40B1 39A1 HDMI_HPD_EC 107 GPIO97/DA3

OUT R300
2 1
0.1UF_16V_2
0.1UF_16V_2
C317
C315
10K_5%_2
LNB_CON 79 GPIO02 GPIO52/PSDAT3/RDY# 27 PWR_SWIN#_3 20D3
OUT OUT
CIR_ID 114 25 1
TP306 TP30 RSMRST# 21D1 54B7 54C2
P3V3AL OUT GPIO16 GPIO50/PSCLK3/TDO
OUT P5V0S
ECO_BTN# 6 11 EN_PVCORE
2
20C3 IN GPIO24 GPIO27/PSDAT2

OUT 11A8
20C8 NUM_LED#_3 109 GPIO30/F_WP# GPIO26/PSCLK2 10 USB_OC#_2 35A6 35C3 35C6
R346 OUT IN 21D3 20A8 IM_DAT_5 R308 2 1 47K_5%_2
ACPRESENT 14 71 IM_DAT_5 BI
2 1 61C5 54A6 54A5 IN GPIO34/CIRRXL GPIO35/PSDAT1
BI 20A8 21D2
21D3 20A8 IM_CLK_5 2 1 47K_5%_2
EC_PWRSW# 1
TP307 15 72 IM_CLK_5 BI R311
IN GPIO36 GPIO37/PSCLK1
BI 20A8 21D2
100K_5%_2 54A8 LOW_BAT#_3 TP30 80 GPIO41/F_WP#
OUT P3V3AL
19B4 WL_OLED# 26 GPIO51/N2TCK
OUT
33C4 USB_OC#_1 123 GPIO67/N2TMS GPIO17/SCL1/N2TCK 70 EC_SMB1_CLK 5D4 21D2 65C5
OUT BI 65C5 21D3 5D4 EC_SMB1_CLK R322
2 1 3.3K_5%_2
26B6 24B6 EC_MUTE# 73 GPIO70 GPIO22/SDA1/N2TMS 69 EC_SMB1_DATA 5D4 21D2 65C5 BI
OUT BI 65C5 21D3 5D4 EC_SMB1_DATA R321 2 1 3.3K_5%_2
D 22D7 WOL_AUX_ON# 74 GPIO71 GPIO73/SCL2 67 EC_SMB2_CLK 5A7 21D2 40C6 62D5 BI D
OUT BI 62D5 40C6 21D3 5A7 EC_SMB2_CLK R317 2 1 1.8K_5%_2
65A2 HDP_ACT 75 GPIO72 GPIO74/SDA2 68 EC_SMB2_DATA 5A7 21D2 40C3 62C5 BI
EC_SMB1 EC_SMB2 EC_SMB3 OUT BI 62C5 40C3 21D3 5A7 EC_SMB2_DATA R316
2 1 1.8K_5%_2
GPIO23/SCL3A 119 AOAC_ON# 21D2 28C2 BI
BI 28C2 21D3 AOAC_ON# R3342 1
10K_5%_2
GPIO31/SDA3A 120 WLON# 21D2 28B2 BI
1.BATTERY 1.CHARGE 1.CEC BI 28B2 21D3 WLON# R3352 1
10K_5%_2
34D4 34A5 32D4 32A5 USB30_PWR_EN 117 GPIO20/TA2/IOX_DIN_DIO GPIO47/SCL4A 24 FLASH_OVERRIDE 52B7 52B8 BI
OUT OUT
35C8 35A8 EC_ILIM_SEL 112 GP(I)O84/IOX_SCLK/XORTR# GPIO53/SDA4A 28 LID_SW#_3 18C4
2.GPU THERMAL OUT IN
35C8 35C1 35A8 EC_CTL2 110 GPO82/IOX_LDSH/TEST# GPIO42/SCL3B/TCK 17 1
TP300 TP30 IVDET_P3P
OUT IN
19C7 PWR_WLED# 93 GPIO06/IOX_DOUT GPIO43/SDA3B/TMS 20 1
TP303 TP30 SLP_S5#_3R 14D2 54B3
OUT IN
GPIO44/SCL4B/TDI 21 1
TP304 TP30 H_PROCHOT_EC 21B1
OUT
GPIO46/SDA4B/CIRRXM/TRST# 23 1
TP305 TP30 SB_USB_2 35A8 35C5 35C8
OUT
69B6 LOGO_LED 91 GPIO81/F_WP# INV_PWM_3_R 36C4
OUT OUT
52A6 21C8 EC_SPI_CS0# 90 F_CS0# RSMRST# 21D3 54B7 54C2
OUT 33_5%_2 OUT
52A6 21C7 EC_SPI_CLK R342 1 2 EC_SPI_CLK_R 92 F_SCK
OUT
1
GPIO75/SPI_SCK 82 EC_PW_ON# 14D8 15D4
OUT
52A6 21C8 EC_SPI_SO R340 133_5%_2 2 EC_SPI_SO_R 86 F_SDI_F_SDIO1 GPIO77/SPI_DI 84 SB_USB_1 33C3 R333
IN OUT R315
52A6 21C7 EC_SPI_SI R341 1 2 EC_SPI_SI_R 87 F_SDIO_F_SDIO0 GPIO76/SPI_DO 83 EC_CTL1 35A8 35C1 35C8 10K_5%_2
OUT OUT 10K_5%_2
33_5%_2
44
P3V3AL VCORF
2
P3V3AL
R313
AGND
10K_5%_2
GND1
GND2
GND3
GND4
GND5
GND6
1 2 1
U300 C310
52A6 21D6 EC_SPI_CS0# 1 CS# VCC 8 WINB_NPCE885LA0DX_LQFP_128P
IN
1
EC_SPI_SO 2 7 1 R314 23.3K_5%_2 1UF_6.3V_2
5
18
45
78
89
21C8 21C6 SO_SIO1 HOLD#
OUT
116
103
0.1UF_16V_2
52A6 3 6 EC_SPI_CLK
C309
WP#_ACC SCLK 21C7 21D6

IN
4 5 EC_SPI_SI 52A6 21C6
2
GND SI_SIO0
IN PAD319
21C7
52A6 2 1
2 1
2
C POWERPAD1X1M C
MXIC_MX25L3206EM2I_12G_SOP_8P
P3V3AL
R319 10K_5%_2_DY P3V3AL
1 2
U302 AGND_KBC
52A6 EC_SPI_CS1# 1 CS# VCC 8
IN
1
0.1UF_16V_2_DY
EC_SPI_SO 2 R325
7
1 3.3K_5%_2_DY
2
21C8 21C6 SO_SIO1 HOLD#
OUT 52A6
52A6 3 6 EC_SPI_CLK
C318
WP#_ACC SCLK 21C7 21D6

IN
4 GND SI_SIO0 5 EC_SPI_SI 21C6 21C7
IN
52A6
46D6 11B7 CPU_PROCHOT#

OUT
2
MXIC_MX25L3206EM2I_12G_SOP_8P_DY
3
U301 Q300
SCAN_OUT<17..0>
D
20D7
OUT
65A6 HDP_INT# 31 GPIO56/TA1 KBSOUT0/GPOB0/JENK# 53 SCAN_OUT<0> 0 G 1 H_PROCHOT_EC 21D3
OUT IN
45C8 21B6 FAN_TACH1 63 GPIO14/TB1 KBSOUT1/GPIOB1/TCK 52 SCAN_OUT<1> 1
IN
1
S
14A6 10A5 SA_PG 64 GPIO01/TB2 KBSOUT2/GPIOB2/TMS 51 SCAN_OUT<2> 2
IN
KBSOUT3/GPIOB3/TDI 50 SCAN_OUT<3> 3 SSM3K7002BFU R324
PWRBTN_LED# 32 49 SCAN_OUT<4>
2
20D3 GPIO15/A_PWM KBSOUT4/GPOB4/JEN0# 4 100K_5%_2
OUT
54B7 54A6 PCH_PWROK 118 GPIO21/B_PWM KBSOUT5/GPIOB5/TDO 48 SCAN_OUT<5> 5
OUT
19A7 BAT_OLED# 62 GPIO13/C_PWM KBSOUT6/GPIOB6/RDY# 47 SCAN_OUT<6> 6
IN
2
19A7 DCIN_WLED# 65 GPIO32/D_PWM KBSOUT7/GPIOB7 43 SCAN_OUT<7> 7
OUT
20C3 ECO_LED# 22 GPIO45/E_PWM KBSOUT8/GPIOC0 42 SCAN_OUT<8> 8
OUT
45C6 FAN1_PWM 81 GPIO66/G_PWM KBSOUT9/GPOC1/SDP_VIS# 41 SCAN_OUT<9> 9
OUT
B FAN_TACH1 21B6 45C8 20C8 CAPS_LED#_3 66 GPIO33/H_PWM KBSOUT10_P80_CLK/GPIOC2 40 SCAN_OUT<10> 10 B
IN OUT
SCAN_OUT<11>
1
19D7 PWR_OLED# 16 GPIO40/F_PWM KBSOUT11_P80_DAT/GPIOC3 39 11

OUT
C311 KBSOUT12/GPIO64 38 SCAN_OUT<12> 12
KBSOUT13/GPIO63 37 SCAN_OUT<13> 13
680PF_50V_2 EC_SMMODE 111 36 SCAN_OUT<14> 14
24B6 GP(I)O83/SOUT_CR/TRIST# KBSOUT14/GPIO62
OUT
CIR_OUT 113 GPIO87/CIRRXM/SIN_CR KBSOUT15/GPIO61/XOR_OUT 35 SCAN_OUT<15> 15
OUT
34 SCAN_OUT<16>
2
GPIO60/KBSOUT16 16
GPIO57/KBSOUT17 33 SCAN_OUT<17> 17
54B3 EC_32KHZ 77 GPIO00/EXTCLK
IN
22B5 LAN_RST# 30 GPIO55/CLKOUT/IOX_DIN_DIO KBSIN0/GPIOA0/N2TCK 54 SCAN_IN<0> 0 SCAN_IN<7..0> 20C7
OUT IN
KBSIN1/GPIOA1/N2TMS 55 SCAN_IN<1> 1
KBSIN2/GPIOA2 56 SCAN_IN<2> 2
21F4 VCC_POR# 85 VCC_POR# KBSIN3/GPIOA3 57 SCAN_IN<3> 3
IN
KBSIN4/GPIOA4 58 SCAN_IN<4> 4
R339 KBSIN5/GPIOA5 59 SCAN_IN<5> 5
57C2 46D5 H_PECI 1 EC_PECI 13
2 PECI KBSIN6/GPIOA6 60 SCAN_IN<6> 6
BI
43_5%_2 12 VTT KBSIN7/GPIOA7 61 SCAN_IN<7> 7
P1V05S WINB_NPCE885LA0DX_LQFP_128P
A A
INVENTEC
TITLE
Block Diagram
SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 21 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 400~499(LAN)
D
P3V3A Q400 P3V3A_LAN
PAVDDVCO_LAN D
DIODES_DMP2305U_SOT23_3P
S S D
D
10UF_6.3V_3_DY
1
1
1
1
0.1UF_16V_2
CSC0402_DY
1UF_6.3V_2
4.7UF_6.3V_3
1
C403
C405
G
0.047UF_16V_2
C400
C401
C402
C404
1UF_10V_2_DY
C424
0.1UF_16V_2
C425
G
2
2
1
2
2
WOL_AUX_ON# 1 R400 2
21D6 IN
100K_5%_2 R402
0_5%_3
PDVDDL_LAN PAVDDL_LAN
2
1
1
1UF_6.3V_2
C427
0.1UF_16V_2
C426
PVLX_LAN C423
0.1UF_16V_2
2
C FOR LDO MODE C
53C7
2 R403 1
10K_5%_2 PCIE_LAN_TX_DN
53A2
IN 53D8
2 R404 1 PCIE_LAN_TX_DP
IN 53D8
10K_5%_2_DY CLK_PCIE_LAN_DP 53C7
CLKREQ_LAN# IN
OUT CLK_PCIE_LAN_DN 53C7
IN
41
40
39
38
37
36
35
34
33
32
31
P3V3A_LAN
U400
P3V3S
GND
LX
RX_N
RX_P
AVDDL
AVDDL
DVDDL_REG
LED_1
LED_0
REFCLK_N
REFCLK_P
2
1 VDD33
30 PCIE_LAN_RX_C_DP C421 1 2 0.1UF_16V_2 PCIE_LAN_RX_DP 53D8
R401 21B6 LAN_RST# 2 PERSTN
TX_P OUT
IN 29 PCIE_LAN_RX_C_DN C422 1 2 0.1UF_16V_2 PCIE_LAN_RX_DN 53D8
PAVDDL_LAN 30K_5%_2 PCIE_WAKE# 3 WAKEN
TX_N OUT
PVLX_LAN PDVDDL_LAN OUT 28
4 CLKREQN
NC
27
L400 R406 5 TESTMODE
ISOLATN
26 PAVDDH_LAN
1
1 2 1 2 6 AVDDL_REG
SMDATA
1
1
25
LAN_X1 7 SMCLK
10UF_6.3V_3_DY
22A5 PAVDDH_LAN IN XTLO

1UF_6.3V_2
1
24
0.1UF_16V_2_DY
LQM21PN2R2MC0D_DY
1000PF_50V_2_DY
LAN_X2 8 PPS
C412
C413
RSC_0603_DY 22A5 IN XTLI
23
9 LED_2
C406
C407
AVDDH_REG
22
C408
R405
1
0.1UF_16V_2 1 2 10 RBIAS
AVDDH
21
1UF_6.3V_2
1
TRXN3
2.37K_1%_2 C420
AVDD33
2
B B
C414
0.1UF_16V_2
AVDDL
AVDDL
TRXN0
TRXN1
TRXN2
TRXP0
TRXP1
TRXP2
TRXP3
C415
2
0.1UF_16V_2
2
FOR SW MODE
2
2
LAN_TRD0_DP ATHEROS_AR8161_AL3A_R_QFN_40P
11
12
13
14
15
16
17
18
19
20
23B7 23C7 BI
23C7 23B7 LAN_TRD0_DN
BI
23B7 LAN_TRD1_DP
BI
23B7 23C7 LAN_TRD1_DN
BI
23C7 23B7 LAN_TRD2_DP
BI P3V3A_LAN
23B7 LAN_TRD2_DN
BI
23B7 LAN_TRD3_DP
BI
23B7 LAN_TRD3_DN
BI
1
1
PAVDDL_LAN
C418 C419
1
1UF_10V_2_DY 0.1UF_16V_2
LAN_X1 22B5
OUT C416
LAN_X2
2
2
OUT 22B5 C417
X400 0.1UF_16V_2 0.1UF_16V_2

1 2
2
1
25MHZ
33PF_50V_2
33PF_50V_2
C409
C410
A A
C417:8161 STUFF 8162 OPEN
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 400~499(LAN)
CN400
23C3 23B2 LAN_TD_DP 1 1
IN
23C3 23B2 LAN_TD_DN 2 2
IN
23C3 23B2 LAN_RD_DP 3 3
IN
D 23C2 23B2 LAN_C_DP 4 4
IN
23C2 23B2 LAN_C_DN 5 5 D
IN
23C3 23B2 LAN_RD_DN 6 6
IN
23C2 23B2 LAN_D_DP 7 7
IN
23C2 23B2 LAN_D_DN 8 8
IN
9 9 G G1
10 10 G G2
ACES_50224_0100N_001_10P
U471
2 TCT TCT 15
23B7 22B5 LAN_TRD1_DN 3 TD- TX- 14 LAN_RD_DN 23B2 23D7
IN OUT
23B7 22B5 LAN_TRD1_DP 1 TD+ TX+ 16 LAN_RD_DP 23B2 23D7
IN OUT
7 RCT RCT 10
C LAN_TRD0_DN 8 9 LAN_TD_DN C
23B7 22B5 RD- RX- 23B2 23D7
IN OUT
23B7 22B5 LAN_TRD0_DP 6 RD+ RX+ 11 LAN_TD_DP 23B2 23D7
IN OUT
1
1
1
4 NC NC 12
R476
75_5%_3
75_5%_3
5 NC NC 13 2 1 LAN_C_DN 23B2 23D7
OUT
R474
R475
0.1UF_16V_2
0.1UF_16V_2
C478
C479
RSC_0603_DY
BOTH_TS21C_HF_SOP_16P 2 R478 1 LAN_C_DP 23B2 23D7
OUT
RSC_0402_DY
2
2
2
2 R477 1 LAN_D_DN 23B2 23D7
OUT
RSC_0603_DY
2 R479 1 LAN_D_DP 23B2 23D7
OUT
RSC_0402_DY
PAVDDL_LAN
U470
1 TCT1 MCT1 24
23C7 22B5 LAN_TRD0_DN 3 TD1- MX1- 22 LAN_TD_DN 23C3 23D7
IN OUT
23C7 22B5 LAN_TRD0_DP 2 TD1+ MX1+ 23 LAN_TD_DP 23C3 23D7
IN OUT
4 TCT2 MCT2 21
23C7 22B5 LAN_TRD1_DN 6 TD2- MX2- 19 LAN_RD_DN 23C3 23D7
B IN OUT B
23C7 22B5 LAN_TRD1_DP 5 TD2+ MX2+ 20 LAN_RD_DP 23C3 23D7
IN OUT
7 TCT3 MCT3 18
22B5 LAN_TRD2_DN 9 TD3- MX3- 16 LAN_C_DN 23C2 23D7
IN OUT
22B5 LAN_TRD2_DP 8 TD3+ MX3+ 17 LAN_C_DP 23C2 23D7
IN OUT
10 TCT4 MCT4 15
22B5 LAN_TRD3_DN 12 TD4- MX4- 13 LAN_D_DN 23C2 23D7
IN OUT
22B5 LAN_TRD3_DP 11 TD4+ MX4+ 14 LAN_D_DP 23C2 23D7
IN OUT
BOTH_GST5009_RA_SOP_24P
1
75_5%_3
75_5%_3
75_5%_3
75_5%_3
1
R470
R471
R472
R473
CSC0402_DY
CSC0402_DY
CSC0402_DY
CSC0402_DY
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
C480
C481
C482
C483
C470
C471
C472
C473
C474
2
2
1
C475
1000PF_2000V_6
2
1
1
A A
CSC0402_DY
100PF_50V_2
C476
C477
2
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 500~549(AUDIO CODEC)
P5V0A_AUDIO_AVDD
R515
1 2
P5V0A
Q501 P5V0A_AUDIO_AVDD 0_5%_3
1
DIODES_DMP2305U_SOT23_3P BLM18PG121SN1(6014B0041601_0603)
10UF_6.3V_3
S D C519 C513
C530
S D
1
0.1UF_16V_2 4.7UF_6.3V_3
2
C525 C527
2
G
P5V0A CSC0402_DY CSC0402_DY
1
D
2
C503 CLOSE TO PIN27 D
1 AGND_AUDIO
R521
2.2UF_6.3V_3
AGND_AUDIO AGND_AUDIO
2
10K_5%_2 HP_R
1
OUT 25B4
1 R522 2 HP_L
32
C502 OUT 25B4

0_5%_2 2.2UF_6.3V_3 AMP_R
Q500 P3V3A P3V3S_DVDD33 OUT 26B8
D
Q502 AMP_L
EC_SMM_PWR
1 OUT 26B8
2
21E3 IN G DIODES_DMP2305U_SOT23_3P
1
S D
4.7UF_6.3V_3
S D
S
0.1UF_16V_2
1
1
C536
C500
36
35
34
33
32
31
30
29
28
27
26
25
SSM3K7002BFU
0.1UF_16V_2
2.2UF_6.3V_3
C501
C504
G
2
C526 C528
CSC0402_DY CSC0402_DY
2
U500
2
CBN
CBP
2
VREF
CPVEE
AVDD1
AVSS2
AVSS1
HP-OUT-R
HP-OUT-L
R523
MIC1-VREFO
LINE1-R
LINE1-L
1 2
0_5%_2
37 MONO-OUT NC 24
AGND_AUDIO
AGND_AUDIO
C 38 AVDD2 ANALOG LINE1-VREFO 23 MIC_VREFO
OUT 25D1 C
P5V0A_AUDIO_AVDD P5V0A_PVDD
39 LINE2-L JDREF 22 1 2
R514 20K_1%_2
BLM18PG121SN1(6014B0041601_0603) 40 LINE2-R
DIGITAL LDO-CAP 21
CLOSE TO PIN 22
1 2 41 PVDD1 MIC1-R 20 MIC_R 25D1
BI
R516 0_5%_3 RESERVE FOR EMI
SPK_OUT_L_P MIC_L C512 AGND_AUDIO
1
R512 1 2 0_5%_342 19
10UF_6.3V_3_DY
25B8 OUT SPK-L+ MIC1-L

BI 25D1
1
1 2
0.1UF_16V_2_DY
C507 (THERMAL PAD 4X4 VIAS)

SPK_OUT_L_N 1 2 0_5%_343 18
C532
C506
25B8 OUT R511 SPK-L- NC 10UF_6.3V_3

2
0.1UF_16V_2
CLOSE TO PIN 21
SPK_OUT_R_N R510 1 2 0_5%_344 SPK-R- NC 17
CLOSE TO PIN 41 OUT
AGND_AUDIO
2
25C8 SPK_OUT_R_P R509 1 2 0_5%_345 SPK-R+ NC 16

OUT
46 PVDD2 AUX_CLK_In 15 12.288MHZ 24A7
IN
EC_SMMODE R517 CLOSE TO PIN13
IN
1 2 47 GPIO2/DMIC-DATA34 Sense B 14 12.288MHZ OSC
1
1
10UF_6.3V_3
100K_5%_2
GPIO1/DMIC-DATA12
EC_MUTE# 48 13 1 R500 2 MIC_SENSE
C529
C531 21D6 IN EAPD+PD# Sense A

IN 25C3
GPIO0/DMIC-CLK
26B6 20K_1%_2
GPIO3/SPDIFO
0.1UF_16V_2 P3V3S_DVDD33
SDATA-OUT
EC_SMMODE (PIN47): 49
C514 TML
B B
SDATA-IN
R501
BIT-CLK
HPS
DVDD-IO
1
PCBEEP
2 1 1 2
RESET#
EC PULL HIGH PIN47 IN S&M MODE IN 25A4
2
GPIO4
DVDD
SYNC
1
39.2K_1%_2
1000PF_50V_2
CLOSE TO PIN 46
C523
R520 REA_ALC280Q_GRT_QFN_48P
C515 0.1UF_16V_2
2 1 PD# (PIN48): 10K_5%_2
C520
2
EC OR DRIVER PULL LOW 1 2 1 R507 2 PCSPKR_PCH_3

IN 52C8
9
TO POWER DOWN CODEC INTERNAL AMP
10
11
12
1000PF_50V_2
47K_1%_2
AND EXTERANL TWITTER AMP. C521
C516 0.1UF_16V_2
2 1
2 1 TIED UNDER OR NEAR CODEC
100PF_50V_2
1000PF_50V_2 PAD500 R506
1 2
1 2
1 2
C517 4.7K_1%_2
2 1
POWERPAD1X1M HDA_3S_RST# 52C7
IN
1000PF_50V_2 HDA_3S_SYNC
IN 52C7
HDA_R_SDIN0 1 R502 2 HDA_3S_SDIN0

P3V3S_DVDD33 IN 52B7
22_5%_2
AGND_AUDIO AGND_AUDIO
HDA_R_BITCLK 1 R503 2 HDA_3S_BITCLK
IN 52C7
1
0_5%_2 HDA_3S_SDOUT
MIC_IN_CLK 1 R505 2 MIC_IN_CLK_R IN 52B7
R524 37A4 36B4 BI
37A4 MIC_IN_DATA_R 0_5%_2
A 0_5%_2_DY BI A
P3V3S_DVDD33 P3V3A P3V3S_DVDD33
2
X500 1 R504 2 1 R519 2

24B1 12.288MHZ 3 OUT VDD 4 0_5%_2 0_5%_2_DY
OUT
1
2 GND OE 1
1
1
C534
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
22PF_50V_2_DY
C533
C509
C510
C522
12MHZ
C518
15PF_50V_2
0.01UF_50V_2
INVENTEC
2
2
TITLE
Block Diagram
AGND_AUDIO
AGND_AUDIO
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERCE 600~649(JACK/MIC/SPEAKER)
2
AUDIO JACKS
D601
NC
MIC_VREFO
3 1 24C1
IN
BAT54_30V_0.2A
P3V3A
1
1
D
R610
100K_5%_2
MICPHONE 4.7K_5%_2
R604 R605
4.7K_5%_2
D
JACK600
2
7 RESERVE FOR EMI
2
7
EC_JD# 21E6
IN 5 5
MIC_L
3
4 4 1 2 1 2 1 2 24C2
BI
Q600 3 3 R607 0_5%_3 R603 1K_5%_2 C607 2.2UF_6.3V_3
1 1 2 1 2 1 2 MIC_R
D
1 24C2
BI
G 1 MIC_CN_SENSE 2 2 R606 0_5%_3 R602 1K_5%_2 C606 2.2UF_6.3V_3
IN
6 6
S
SINGA_2SJ3005_005211_7P
SSM3K7002BFU P3V3A
10K_5%_2
1
1
R611
33_5%_2
R613
C600 C601
AGND_AUDIO
CSC0402_DY CSC0402_DY
MIC_SENSE
2
24B1
AGND_AUDIO OUT
3
2
2
Q602
D
MIC_CN_SENSE 1 G
RESERVE FOR EMI
1
C C
S
C621 SSM3K7002BFU
AGND_AUDIO
INTERNAL SPEAKERS
2
680PF_50V_2
2
CN601
SPK_AMP_R_P 1 AGND_AUDIO
26B3 1
IN
26B3 SPK_AMP_R_N 2 2
IN
24B6 SPK_OUT_R_P 3 3 AGND_AUDIO
IN
24B6 SPK_OUT_R_N 4 4
IN
26B3 SPK_AMP_L_N 5 5
IN
26B3 SPK_AMP_L_P 6 6 G G1
IN
24C6 SPK_OUT_L_N 7 7 G G2
IN
24C6 SPK_OUT_L_P 8 8
IN
ACES_50224_0080N_001_8P
HEADPHONE
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
470PF_50V_2_DY
1
1
C619
C605
C604
C618
C617
C616
C615
C603
C602
C609
C620
C608
B B
AGND_AUDIO
2
2
JACK601
R600 7 7
R608 5
75_5%_2 5
24D2 HP_L 1 2 1 0_5%_3 2 4 4

IN
3 3
24D2 HP_R 1 2 1 2 1 1
IN
R601 75_5%_2 R609 0_5%_3 2 2
6 6
SINGA_2SJ3005_005211_7P
P3V3A
PHP_PESD5V2S2UT_SOT23_3P_DY
2
470PF_50V_2_DY
470PF_50V_2_DY
1
1
D600
1
C611
C610
10K_5%_2
R612
HPS
3
24B1
OUT
2
RESERVE FOR EMI
2
Q603
A A
D
HPS_CN AGND_AUDIO
G 1
S
AGND_AUDIO
SSM3K7002BFU
2
AGND_AUDIO
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERCE 550~599(AUDIO AMP)
GAIN SETTING
G2 G1
AMP
0 0 11DB
D
D
0 1 14DB
P5V0A_AMP
1 0 19DB
1
R554 R556 1 1 25DB
0_5%_2 0_5%_2_DY
26B5 AMP_GAIN2
OUT
1 2
1 2
26B5 AMP_GAIN1
OUT
R555 R557
0_5%_2_DY 0_5%_2
2
AGND_AUDIO
C C
P5V0A_AMP P5V0A_AUDIO_AVDD
1 L550 2
BLM18PG181SN1D
1
C550 C551 C552 C553 C554
0.22UF_6.3V_2 0.22UF_6.3V_2 1UF_16V_310UF_6.3V_3 CSC0805_DY
2
AGND_AUDIO
U550
13 TML
26C4 AMP_GAIN2
12 G2 OUT_LP 1 1
R550 2
0_5%_2 SPK_AMP_L_P 25B8
IN OUT
B 26C4 AMP_GAIN1
11 G1 OUT_LN 2 1
R551 2
0_5%_2 SPK_AMP_L_N 25B8 B
IN OUT
24D2 AMP_L R561 1 2
4.99K_1%_2 AMP_L_R 1
C556
2
0.015UF_10V_2 AMP_L_C10 INPUT_L PVDD1 3
IN
24D2 AMP_R R562 1 2
4.99K_1%_2 AMP_R_R 1
C557
2
0.015UF_10V_2 AMP_R_C 9 INPUT_R PVDD2 4
IN
8 BYPASS OUT_RN 5 1
R552 2
0_5%_2 SPK_AMP_R_N 25C8
OUT
7 PD# OUT_RP 6 1
R553 2
0_5%_2 SPK_AMP_R_P 25C8
OUT
REA_ALC105_VE_CG_DFN_12P
1
C558 C559 EC_MUTE# 1 R558 2 P5V0A_AMP

R563 R564 IN
470PF_50V_2 6.49K_1%_2 6.49K_1%_2 470PF_50V_2 1K_5%_2
2
1
R559
20K_5%_2
AMP_BYPASS
2
1
AGND_AUDIO
C555 R560
2.2UF_16V_3 22K_5%_2
2
A A
AGND_AUDIO
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERNCE 900~999(CARDREADER)
D
D
P3V3S_CR
1
C913 C906
R905 0_5%_2 1 2 C905
27C3 SD_CMD 1 2 SD_CMD_R
BI C901 0.1UF_16V_2
SD_D3 R906
1 0_5%_2
2 SD_D3_R 1 2 10UF_6.3V_3
27C3 5PF_50V_2 CN900
BI
2
SD_D2 R907
1 0_5%_2
2 SD_D2_R SD_D3 1 G1
27C1 BI 27C7 BI DAT3 GND
1UF_6.3V_2 SD_CMD 2 G2
27C7 BI CMD GND
3 VSS GND G3
R903 0_5%_2 4 VDD WP 10 SD_WP 27C7
SD_CLK_R 1 2 SD_CLK 27C3 BI
BI 27C4 SD_CLK 5 CLK CD 11 SD_CD# 27C7
P3V3S_CR R904 BI BI
SD_D0_R 1 2
0_5%_2 SD_D0 27C3 6 VSS DAT2 9 SD_D2 27C7
BI BI
1
27C4 SD_D0 7 DAT0 DAT1 8 SD_D1 27C4
R909 BI BI
18
17
16
15
14
13
1 2 C909 C910
U900
PLAST_CS1S_201_H_N_11P
C 4.7UF_6.3V 0.1UF_16V_2 C
SP6
SP5
SP4
SP3
SP2
200K_5%_2
DV33_18
SD_D1
2
19 12 SD_D1_R R902
1 0_5%_2
2
GPIO SP1
BI 27C1
27C1 SD_WP 20 SP7 DV12_S 11
BI
27C1 SD_CD# 21 SD_CD# CARD_3V3 10
BI
22 MS_INS# 3V3_IN 9
56A7 46C7 34C6 32C6 PLT_RST# 23 PERST# RREF 8
IN
CLKREQ_CR# 24 7
REFCLKN
REFCLKP
53B6 27B7 OUT CLKREQ# AV12 P3V3S_CR
1
P3V3S 25
HSON
HSOP
TML
HSIN
HSIP
R900
R901
1 2 CLKREQ_CR# 6.2K_1%_2
1
2
3
4
5
6
IN 27C7 53B6
2
10K_5%_2 REA_RTS5229_GR_QFN_24P
53D8 PCIE_CR_TX_DP
BI
53D8 PCIE_CR_TX_DN
BI P3V3S
53B6 CLK_PCIE_CR_DP
BI
53B6 CLK_PCIE_CR_DN
BI
53D8 PCIE_CR_RX_DP
1 PCIE_CR_RX_C_DP
2
BI
1
1
1
C911 0.1UF_16V_2
PCIE_CR_RX_DN
1 PCIE_CR_RX_C_DN
2 C903
B 53D8 BI C907 C908 B
C900
C912 0.1UF_16V_2
0.1UF_16V_2
4.7UF_6.3V 0.1UF_16V_2 10UF_6.3V_3
2
2
2
CLK: CLKOUT 4
PCIE: PCIE 5
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 1300~1349(WLAN)
D
D
SUPPORT AOAC:OPEN SUPPORT AOAC:STUFF
P3V3S
P3V3S
1
P3V3A
P1V5S
R1304
Q1300
0_5%_5
1
1 D S 4
2
2
C1302 C1304 5
1
0.1UF_16V_2 6 3
10UF_6.3V_3 G
PMOS_4D1S
C1307
2
TPC6111_DY
1
CSC0402_DY
C1305 C1301
2
C1306
0.1UF_16V_2 10UF_6.3V_3 CSC0402_DY
2
AOAC_ON# 21D2 21D3
CN1300 IN
R1300
C PCIE_WAKE# 1 2 0_5%_2 1 2 C
54B3 54A5 34C6 32C6 22B5 BI WAKE# 3.3V
3 Reserved GND 4
57B6 28B7 BTIFON# 1 R1301 2 0_5%_2 5 Reserved 1.5V 6
BI
53B7 53A2 CLKREQ_WLAN# 7 CLKREQ# Reserved 8 LPC_3S_FRAME# 21E3 52C3
IN IN
9 GND Reserved 10 LPC_3S_AD<3> 21E3 52C3
IN
53B7 CLK_PCIE_WLAN_DN 11 REFCLK- Reserved 12 LPC_3S_AD<2> 21E3 52C3
IN IN
53B7 CLK_PCIE_WLAN_DP 13 REFCLK+ Reserved 14 LPC_3S_AD<1> 21E3 52C3
IN IN
15 GND Reserved 16 LPC_3S_AD<0> 21E3 52C3
IN
62C7 56A8 39A1 35C3 29C3 28C3 21E3 BUF_PLT_RST# 17 Reserved GND 18
IN
56A7 CLK_PCI_DEBUG 19 Reserved Reserved 20
IN
21 GND PERST# 22 BUF_PLT_RST# 21E3 28C7
IN
3
53D8 PCIE_WLAN_RX_DN 23 PERN0 +3.3VAUX 24 29C3 35C3
OUT 39A1 56A8 Q1301
53D8 PCIE_WLAN_RX_DP 25 PERP0 GND 26
OUT 62C7
D
27 GND 1.5V 28
53D3 G 1 WLON# 21D2 21D3
29 GND SMB_CLK 30 PCH_3A_ALERT_CLK 53D2 IN
BI
53D8 PCIE_WLAN_TX_DN 31 32 PCH_3A_ALERT_DAT 53D2 53D3
S
PETN0 SMB_DATA
IN BI
53D8 PCIE_WLAN_TX_DP 33 PETP0 GND 34
IN SSM3K7002BFU
35 GND USB_D- 36 USB_WLAN_DN 56C2
BI
2
37 Reserved USB_D+ 38 USB_WLAN_DP 56B2
BI
39 Reserved GND 40
41 Reserved LED_WWAN# 42
43 Reserved LED_WLAN# 44
B 45 Reserved LED_WPAN# 46 B
BTIFON# 1 R1302 2 0_5%_2 47 48
57B6 28C7 BI Reserved 1.5V
49 Reserved GND 50
PCI_3S_SERIRQ 1 R1303 2 51 52
52C2 21E3
IN 0_5%_2_DY Reserved 3.3V
G1 G G G2
BELLW_80003_1021_52P
A A
MINI CARD 1(WLAN)

INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 1400~1499(3G)
P1V5S
D
D
1
C1410
C1411
C1412
0.1UF_16V_2
0.1UF_16V_2
22UF_6.3V_5
2
2
P3V3S
1
C1402 C1401 C1400
CN1400
1 WAKE# 3.3V 2 0.1UF_16V_2 0.1UF_16V_2
3 4 22UF_6.3V_5
Reserved GND
2
5 Reserved 1.5V 6
C 53A6 53A2 CLKREQ_MSATA# 7 CLKREQ# Reserved 8 C
OUT
9 GND Reserved 10
53A6 CLK_MSATA_PCIE_DN 11 REFCLK- Reserved 12
IN
53A6 CLK_MSATA_PCIE_DP 13 REFCLK+ Reserved 14
IN
15 GND Reserved 16
17 Reserved GND 18
19 Reserved Reserved 20
CLOSE TO CONN SIDE 21 22 BUF_PLT_RST#
GND PERST#
IN 21E3 28C3 28C7 35C3 39A1 56A8 62C7
52B3 SATA_MINICARD_RX_DPC1405 1 2 0.01UF_50V_2 SATA_MINICARD_C_RX_DP 23 PERN0 +3.3VAUX 24
BI C1406 1
52B3 SATA_MINICARD_RX_DN 2
0.01UF_50V_2 SATA_MINICARD_C_RX_DN 25 PERP0 GND 26
BI
27 GND 1.5V 28
29 GND SMB_CLK 30
52B3 SATA_MINICARD_TX_DN C1407 1 2 0.01UF_50V_2 31 PETN0 SMB_DATA 32
BI C1408 1 0.01UF_50V_2
52B3 SATA_MINICARD_TX_DP 2 33 PETP0 GND 34
BI
35 GND USB_D- 36
53C8 PCIE_MSATA_RX_DN 1 2
OUT 37 Reserved USB_D+ 38
53C8 PCIE_MSATA_RX_DP 1
R1400 2
0_5%_2_DY
OUT 39 Reserved GND 40
PCIE_MSATA_TX_DN R1401 0_5%_2_DY 41 42
53C8 IN Reserved LED_WWAN#
53C8 PCIE_MSATA_TX_DP 43 Reserved LED_WLAN# 44

IN
45 Reserved LED_WPAN# 46
47 Reserved 1.5V 48
49 Reserved GND 50
51 Reserved 3.3V 52
B G1 G2 B
G G
LOTES_AAA_PCI_093_P06_52P
MSATA_DET 1 R1407 2
57D6 OUT
0_5%_2_DY
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 2650~2999(RESERVE)
D
D
C C
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 1700~1749(HDD)
REFERENCE 1750~1799(ODD)
SATA HDD A
D
SATA HDD B D
CN1700 CN1701
1 GND C1708 1 GND
SATA_HDDA_TX_DP C1704 1 0.01UF_50V_2
2 SATA_HDDA_TX_C_DP 2 SATA_HDDB_TX_DP 1 0.01UF_50V_2
2 SATA_HDDB_TX_C_DP 2
52C3 A+ 52C3 C1707 A+
IN 0.01UF_50V_2 IN 0.01UF_50V_2
52C3 SATA_HDDA_TX_DN C1712
1 2 SATA_HDDA_TX_C_DN 3 A- 52C3 SATA_HDDB_TX_DN 1 2 SATA_HDDB_TX_C_DN 3 A-
IN IN
4 GND C1706 4 GND
52C3 SATA_HDDA_RX_DN C1700 1 20.01UF_50V_2 SATA_HDDA_RX_C_DN 5 B- 52C3 SATA_HDDB_RX_DN 1 20.01UF_50V_2 SATA_HDDB_RX_C_DN 5

OUT OUT C1705 B-
52C3 SATA_HDDA_RX_DP 1 20.01UF_50V_2 SATA_HDDA_RX_C_DP 6 B+ 52C3 SATA_HDDB_RX_DP 1 20.01UF_50V_2 SATA_HDDB_RX_C_DP 6

OUT C1701 OUT B+
7 GND 7 GND
8 V3.3 8 V3.3
9 V3.3 9 V3.3
10 V3.3 10 V3.3
11 GND 11 GND
12 GND 12 GND
PLACE CLOSE TO CONNECTOR(<100MILS) 13 GND PLACE CLOSE TO CONNECTOR(<100MILS) 13 GND

14 V5 14 V5
15 V5 15 V5
P5V0S 16 V5
P5V0S 16 V5
17 17
40MIL 18
GND
RESERVED
40MIL 18
GND
RESERVED
C 19 GND 19 GND C
1
1
20 V12 20 V12
22UF_6.3V_5
22UF_6.3V_5
0.1UF_16V_2
22UF_6.3V_5
22UF_6.3V_5
0.1UF_16V_2
21 G1 21 G1
C1713
C1703
C1702
C1709
C1710
C1711
V12 G1 V12 G1
22 V12 G2 G2 22 V12 G2 G2
SANTA_191001_3_22P
SYN_127043HR022M22SZR_22P
2
2
P5V0S
1
B P3V3S B
C1754
3
R1752
CSC0402_DY
1
1M_5%_2
S
G
R1751
1 2
2
PMOS_4D1S
R1750 R1754
10K_5%_2
Q1751
100K_5%_2 0_5%_6_DY
TPC6111
2
Q1750
6
5
2
1
D
57D2 SATA_ODD_PWREN 1 G
IN
S
C1758
2 1
SSM3K7002BFU
2
0.047UF_16V_2
1
1
22UF_6.3V_5
22UF_6.3V_5
0.1UF_16V_2
C1757
C1756
C1755
2
CN1750
P6 GND
A P5 A
GND
56B6 SATA_ODD_DA# P4 MD
OUT
SATA ODD
56C7 P3 +5V
P2 +5V
57D7 57B6 SATA_ODD_PRSNT# P1 DP

OUT
S7 GND
52B3 SATA_ODD_RX_DP C1750

1 2
0.01UF_50V_2 SATA_ODD_RX_C_DP S6 B+
OUT C1751
52B3 SATA_ODD_RX_DN 1 2
0.01UF_50V_2 SATA_ODD_RX_C_DN S5 B-
OUT
S4 GND
52B3 SATA_ODD_TX_DN C1753

1 2 0.01UF_50V_2 SATA_ODD_TX_C_DN S3 A-
IN
52B3 IN
SATA_ODD_TX_DP C1752 1 2
0.01UF_50V_2 SATA_ODD_TX_C_DP S2
S1
A+
GND
G
G
G1
G2 INVENTEC
SUYIN_127382HR013M268ZR_13P TITLE
PLACE CLOSE TO CONNECTOR(<100MILS) MODEL,PROJECT,FUNCTION

Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 2000~2099(USB) P3V3A P3V3_USB3

Q2403
S D
P1V05_USB3 S D
1
0.047UF_16V_2
0.047UF_16V_2
10UF_6.3V_3
C2454
C2441
G
C2471
R2424
10K_5%_2
G
1
2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
C2417
1 2
2
C2418
C2419
C2420
2
R2427
34D4 34A5 32A5 21D6 USB30_PWR_EN 220K_5%_2
IN
3
2
2
Q2402
D
D
1 G
D
S
P3V3_USB3 P1V05_USB3 P3V3_USB30_AVDD
SSM3K7002BFU
2
12
22
34
43
21
30
33
39
42
25
6
3
U2400
P3V3_USB3 P3V3_USB30_AVDD
VDD33
VDD33
VDD33
VDD33
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
AVDD33
AVDD33
1 L2400 2
53B7 CLK_PCIE_USB3_DP 1 PECLKP
IN BLM21PG600SN1D_3A
53B7 CLK_PCIE_USB3_DN 2 PECLKN U3TXDP2 37 USB3_IC_TX2_DP 33B7
IN BI
1
C2409 0.1UF_16V_2
0.1UF_16V_2
PCIE_USB3_RX_DP 1 2 PCIE_USB3_RX_C_DP 4 38 USB3_IC_TX2_DN
C2406
C2408
53D8 PETXP U3TXDN2 33B7
OUT BI
10UF_6.3V_3
53D8 PCIE_USB3_RX_DN 1 2 PCIE_USB3_RX_C_DN 5 PETXN U2DM2 45 USB2_IC_TX2_DN 33B3 33B5
OUT BI
C2410 0.1UF_16V_2
53D8 PCIE_USB3_TX_DP 7 44 USB2_IC_TX2_DP 33B3 33B5
P3V3_USB3 IN PERXP U2DP2
BI
PCIE_USB3_TX_DN 8 40 USB3_IC_RX2_DP
2
53D8 PERXN U3RXDP2 33B5 33C3
IN BI
C U3RXDN2 41 USB3_IC_RX2_DN 33B5 33C3 C

BI
PLT_RST# 47
2 R4754 1 CLKREQ_USB3# 32B8 53B7
56A7 46C7 34C6 27C7
IN PERSTB P3V3_USB3
IN 54B3 54A5 34C6 28C7 22B5 PCIE_WAKE# 48 PEWAKEB
10K_5%_2 OUT
32B6 CLKREQ_IC_USB3# 10 PECREQB OCI2B 17 R2415 1 2 10K_5%_2
IN
R4955 OCI1B 19 R2416 1 2 10K_5%_2
1 2 USB3_SMI# 32C6 56B6
IN
PPON2 18
10K_5%_2 56B6 32C7 USB3_SMI# 46 SMIB PPON1 20
P3V3_USB3 OUT
R2406
1 2 11 PONRSTB
10K_5%_2 U3TXDP1 28 USB3_IC_TX1_DP 33C7

BI
2
D2400 32A6 USB3_SCLK 15 SPISCK U3TXDN1 29 USB3_IC_TX1_DN 33C7

OUT BI
USB3_CS# USB2_IC_TX1_DN
NC
32A8 14 SPICSB U2DM1 36 33C3 33C5

OUT BI
3 1 32A6 USB3_SI 16 SPISI
OUT
32A8 USB3_SO 13 SPISO U2DP1 35 USB2_IC_TX1_DP 33C3 33C5
IN BI
USB3_IC_RX1_DP
1
U3RXDP1 31 33C3 33C5

BI
BAT54_30V_0.2A
C2411 U3RXDN1 32 USB3_IC_RX1_DN 33C3 33C5
BI
1UF_6.3V_2 USB3_XT1 24 XT1
X2400 USB3_XT2 23 XT2
B 1 2 B
2
R2400
1
1.6K_1%_2
24MHZ 27 IC(L) RREF 26 1 2
C2413 C2412
12PF_50V_2 12PF_50V_2
GND
2
RENESAS_UPD720202K8_BAA_A_QFN_48P
49
CLKREQ_USB3# 1 R2405 2 CLKREQ_IC_USB3#
53B7 32C7 32C6
OUT IN
0_5%_2
P1V5 P5V0A
U2403 P1V05_USB3
9 1
P3V3_USB3 VIN GND
34D4 34A5 32D4 21D6 USB30_PWR_EN 8

P3V3_USB3 IN EN
7 POK FB 2
TRACE WIDTH>20MILS
1
R2480 R2481 6 VCNTL VOUT 3

A A
1
10K_5%_2 47K_5%_2
1
5 VIN VOUT 4
C2480
1 R2422 2
U2480 0.1UF_16V_2 ANPEC_APL5930KAI_TRG_SOP_8P
1
10K_1%_2
2
1 2 C2434
2
C2435
USB3_CS# 1 8 C2438
2
32B6 CS# VCC
IN
1
22UF_6.3V_5 1UF_6.3V_2 22UF_6.3V_5
C2433
32B6 USB3_SO 2 SO NC 7 150PF_50V_2
OUT
2
2 R2423
3 WP# SCLK 6 USB3_SCLK
IN 32B6 31.6K_1%_2
INVENTEC
2
4 GND SI 5 USB3_SI 32B6
IN
TITLE
MAC_MX25L5121EMC_20G_SOP_8P MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 2400~2499(USB3.0)
D
D
P3V3AL CN2405
33C5 32B2 USB2_IC_TX1_DN 1 1

BI
1
33C5 32B2 USB2_IC_TX1_DP 2 2
56C6 USB3_PCH_RX1_DN R2471 1 20_5%_2 USB3_IC_RX1_DN 32B2 33C3 BI
BI BI 33C5 32B2 USB3_IC_RX1_DP 3 3
56C6 USB3_PCH_RX1_DP R2472 1 20_5%_2 USB3_IC_RX1_DP 32B2 33C3 R2478 BI
BI BI P3V3S 33C5 32B2 USB3_IC_RX1_DN 4 4
10K_5%_2 BI
33C5 USB3_SSTX1_L_DP 5 5
56C6 USB3_PCH_TX1_DN 1
R2469 2
0_5%_2 BI
BI 33C5 USB3_SSTX1_L_DN 6 6
USB3_PCH_TX1_DP 1 2 BI
2
56C6 BI R2470 0_5%_2 P5V0A 7 7
C 32B2 USB3_IC_TX1_DN C2491 1 20.1UF_16V_2 USB3_SSTX1_L_DN 33C3 21C3 SB_USB_1 8 8 C

BI BI IN
32B2 USB3_IC_TX1_DP C2492 1 20.1UF_16V_2 USB3_SSTX1_L_DP 33C3 21D6 USB_OC#_1 9 9
BI BI OUT
10 10
56C2 USB_P0_DN 1
R2475 2
0_5%_2 USB2_IC_TX1_DN 32B2 33C3 11 11
BI BI
56C2 USB_P0_DP 1
R2476 2
0_5%_2 USB2_IC_TX1_DP 32B2 33C3 12 12
BI BI
13 13
14 14
33B5 USB3_SSTX2_L_DN 15 15
BI
33B5 USB3_SSTX2_L_DP 16 16 G G1
BI
33B5 32C2 USB3_IC_RX2_DN 17 17 G G2
BI
33B5 32C2 USB3_IC_RX2_DP 18 18
BI
33B5 32C2 USB2_IC_TX2_DP 19 19
BI
33B5 32C2 USB2_IC_TX2_DN 20 20
BI
ACES_50501_02041_001_20P
56C6 USB3_PCH_RX2_DN R2483 1 2 0_5%_2 USB3_IC_RX2_DN 32C2 33C3
BI BI
56C6 USB3_PCH_RX2_DP R2484 1 2 0_5%_2 USB3_IC_RX2_DP 32C2 33C3
BI BI
R2479 2
0_5%_2
BI
56C6 USB3_PCH_TX2_DP 1
R2482 2
0_5%_2
BI
32C2 USB3_IC_TX2_DN C2431 1 20.1UF_16V_2 USB3_SSTX2_L_DN 33C3
BI BI
32C2 USB3_IC_TX2_DP C2436 1 20.1UF_16V_2 USB3_SSTX2_L_DP 33C3
BI BI
B B
56C2 USB_P1_DN 1
R2487 2
0_5%_2 USB2_IC_TX2_DN 32C2 33B3
BI BI
56C2 USB_P1_DP 1
R2488 2
0_5%_2 USB2_IC_TX2_DP 32C2 33B3
BI BI
A A
INVENTEC
USB 3.0 CONNECTOR
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3A
P3V3_1_USB3
Q2405
S D
P1V05_1_USB3
1
S D
10UF_6.3V_3
1
0.047UF_16V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
C2466
C2467
C2468
C2469
0.047UF_16V_2
C2445
R2466
G
C2455
10K_5%_2
G
1
2
0.1UF_16V_2
2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
2
C2482
C2483
C2484
C2485
C2486
C2487
C2488
1 2
D
R2467
2
2
USB30_PWR_EN D
220K_5%_2
34A5 32D4 32A5 21D6 IN
3
Q2404
P3V3_1_USB3 P1V05_1_USB3 P3V3_USB30_1_AVDD
D
1 G
S
12
22
34
43
21
30
33
39
42
25
SSM3K7002BFU
2
U2405
P3V3_1_USB3 P3V3_USB30_1_AVDD
VDD33
VDD33
VDD33
VDD33
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
VDD10
AVDD33
AVDD33
1 L2401 2
53B7 CLK_PCIE_1_USB3_DP 1 PECLKP
IN BLM21PG600SN1D_3A
53B7 CLK_PCIE_1_USB3_DN 2 PECLKN U3TXDP2 37 USB3_IC_TX4_DP 35B8
IN BI
1
C2456 0.1UF_16V_2
0.1UF_16V_2
PCIE_USB3_RX1_DP 1 2 PCIE_USB3_RX1_C_DP 4 38 USB3_IC_TX4_DN
C2472
C2473
53D8 PETXP U3TXDN2 35B8
OUT BI
10UF_6.3V_3
53D8 PCIE_USB3_RX1_DN 1 2 PCIE_USB3_RX1_C_DN 5 PETXN U2DM2 45 USB2_IC_TX4_DN 35A8 35B5
OUT BI
C2457 0.1UF_16V_2
53D8 PCIE_USB3_TX1_DP 7 PERXP U2DP2 44 USB2_IC_TX4_DP 35A5 35A8
IN BI
PCIE_USB3_TX1_DN 8 40 USB3_IC_RX4_DP
2
C 53D8 IN PERXN U3RXDP2
BI 35A5 35B5 C
P3V3_1_USB3
U3RXDN2 41 USB3_IC_RX4_DN 35A5 35B5
BI
PLT_RST# 47
2 R4755 1 CLKREQ_1_USB3# 34A8 53B7
56A7 46C7 32C6 27C7
IN PERSTB P3V3_1_USB3
IN 54B3 54A5 32C6 28C7 22B5 PCIE_WAKE# 48 PEWAKEB
10K_5%_2 OUT
34A6 CLKREQ_1_IC_USB3# 10 PECREQB OCI2B 17 R2462 1 2 10K_5%_2
IN
R4957 OCI1B 19 R2463 1 2 10K_5%_2
1 2 USB3_1_SMI# 34C6 56B6
IN
PPON2 18
10K_5%_2 56B6 34C7 USB3_1_SMI# 46 SMIB PPON1 20
P3V3_1_USB3 OUT
R2458
1 2 11 PONRSTB
10K_5%_2 U3TXDP1 28 USB3_IC_TX3_DP 35D8

BI
2
D2401 34A6 USB3_1_SCLK 15 SPISCK U3TXDN1 29 USB3_IC_TX3_DN 35D8

OUT BI
USB3_1_CS# USB2_IC_TX3_DN
NC
34A8 14 SPICSB U2DM1 36 35D5 35D8

OUT BI
3 1 34A6 USB3_1_SI 16 SPISI
OUT
34A8 USB3_1_SO 13 SPISO U2DP1 35 USB2_IC_TX3_DP 35C8 35D5
IN BI
USB3_IC_RX3_DP
1
U3RXDP1 31 35D4 35D5

BI
BAT54_30V_0.2A
C2458 U3RXDN1 32 USB3_IC_RX3_DN 35D4 35D5
B BI B
1UF_6.3V_2 USB3_3_XT 24 XT1
X2401 USB3_4_XT 23 XT2
1 2
2
R2464
1
1.6K_1%_2
24MHZ 27 IC(L) RREF 26 1 2
C2459 C2460
12PF_50V_2 12PF_50V_2
GND
2
RENESAS_UPD720202K8_BAA_A_QFN_48P
49
CLKREQ_1_USB3#
1 R2459 2 CLKREQ_1_IC_USB3#
53B7 34C7 34C6
OUT IN
0_5%_2
P1V5 P5V0A
U2407
9 1
P3V3_1_USB3 VIN GND
34D4 32D4 32A5 21D6 USB30_PWR_EN 8 P1V05_1_USB3

P3V3_1_USB3 IN EN
7 POK FB 2
A A
TRACE WIDTH>20MILS
1
R2460 R2461 6 VCNTL VOUT 3

1
10K_5%_2 47K_5%_2
1
5 VIN VOUT 4
C2461
1 R2465 2
U2406 0.1UF_16V_2 ANPEC_APL5930KAI_TRG_SOP_8P
1
1
10K_1%_2
2
1 2 C2477
2
C2479
USB3_1_CS# 1 8 C2481
2
34B6 CS# VCC
IN
1
22UF_6.3V_5 1UF_6.3V_2 22UF_6.3V_5
C2478
34B6
OUT
USB3_1_SO 2 SO NC 7 150PF_50V_2
INVENTEC
2
R2468
3 WP# SCLK 6 USB3_1_SCLK 34B6 31.6K_1%_2
IN
TITLE
2
4 GND SI 5 USB3_1_SI 34B6 MODEL,PROJECT,FUNCTION
IN Block Diagram
MAC_MX25L5121EMC_20G_SOP_8P DOC.NUMBER REV

SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CLOSE TO U2405 P5V0A_USB3
56C6 USB3_PCH_RX3_DN R2432 1 20_5%_2 USB3_IC_RX3_DN 34B2 35D4

BI BI
USB3_PCH_RX3_DP USB3_IC_RX3_DP
1
56C6 BI R2433 1 20_5%_2
BI 34B2 35D4
C2427
USB3_PCH_TX3_DN 1 2 C2432
56C6 BI R2430 0_5%_2
USB3_PCH_TX3_DP 1 2 C2426
56C6 BI R2431 0_5%_2
USB_IC_DN 0.1UF_16V_2 1000PF_50V_2
USB3_IC_TX3_DN USB3_SSTX3_DN 35C8
BI 22UF_6.3V_5
34B2 BI C2447 1 2
0.1UF_16V_2 BI 35D4
USB_IC_DP
2
35C8
34B2 USB3_IC_TX3_DP C2448 1 2
0.1UF_16V_2 USB3_SSTX3_DP 35D4 BI
BI BI L2404
CN2401
CLOSE TO CN2401 WCM_2012_900T 1 VBUS
D USB2_IC_TX3_DN USB_P2_R_DN R2447
35D8 34B2
BI R2505 1 20_5%_2 1 2 0_5%_2 1 2 USB_P2_L_DN 2 D-
USB2_IC_TX3_DP USB_P2_R_DP R2446 D
35C8 34B2
BI R2477 1 20_5%_2 1 2 0_5%_2 4 3 USB_P2_L_DP 3 D+
4 PGND
35D5 34B2 USB3_IC_RX3_DN 1

R2520 2
RSC_0603 USB3_L_RX3_DN 5 SSRX-
BI
35D5 34B2 USB3_IC_RX3_DP 1
R2521 2
RSC_0603 USB3_L_RX3_DP 6 SSRX+ G G1
BI
R2456 7 GND G G2
56C2 USB_P2_DN 1 2 0_5%_2
BI 35D5 USB3_SSTX3_DN 1
R2522 2
RSC_0603 USB3_L_SSTX3_DN 8 SSTX- G G3
BI
56C2 USB_P2_DP 1 2 0_5%_2 35D5 USB3_SSTX3_DP 1
R2523 2
RSC_0603 USB3_L_SSTX3_DP 9 G4
BI P5V0A BI SSTX+ G
R2457
OCTEK_USB_09EREB_9P
35D5 34B2 USB2_IC_TX3_DN
BI
1
P5V0A_USB4 P5V0A_USB3
35D5 34B2 USB2_IC_TX3_DP
BI
EC_ILIM_SEL
1
35A8 21D6 IN U2401 C2442
0.1UF_16V_2
TI_TPS2540A_QFN_16P R2507
4
3
2
1
2
0_5%_3_DY
ILIM_SEL
DP_OUT
DM_OUT
IN
17
2
PWPD
SB_USB_2
1
35C5 35A8 21D3 5 EN ILIM0 16
IN
35C1 35A8 21C3 EC_CTL1 6 CTL1 ILIM1 15
IN
1
P5V0A C2501 R2494
+
EC_CTL2 BUF_PLT_RST# EC_CTL1
1
35C1 35A8 21D6 7 CTL2 GND 14 CURRENT LIMIT 2.5A 29C3 28C7 28C3 21E3 1 2 21C3 35A8 35C8
IN R2436 IN OUT
EC_CTL3 8 13 USB_OC#_2 62C7 56A8 39A1
DP_IN
DM_IN
35C1 35A8 IN CTL3 FAULT#

OUT R2435 21D3 35A6 35C3 0_5%_2_DY
U2409 100UF_6.3V
OUT
NC
C 1 GND OUT 8 C
2
P5V0A RSC_0402_DY 2 7
20K_5%_2 IN OUT
3 6 P3V3AL
2
IN OUT P3V3A
9
2
R2498
10
11
12
P5V0A_USB3 35A8 21D3 SB_USB_2 4 EN OC# 5

1 2 IN
35C8
1
R2495 10K_5%_2
1
100K_5%_2_DY GMT_G547E1P81U_MSOP_8P 1 2 EC_CTL2 21D6 35A8 35C8
R2500 OUT
C2500
35D4 USB_IC_DP 47UF_6.3V_5 10K_5%_2 R2496 10K_5%_2
BI 1 2 EC_CTL3 35A8 35C8
OUT
35D4 USB_IC_DN
BI
2
USB_OC#_2
2
21D3 35A6 35C6
OUT
CLOSE TO U2405
56C6 USB3_PCH_RX4_DN R2439 1 2 0_5%_2 USB3_IC_RX4_DN 34C2 35A5
BI BI
56C6 USB3_PCH_RX4_DP R2440 1 2 0_5%_2 USB3_IC_RX4_DP 34C2 35A5
BI BI
R2437 2
0_5%_2
BI
56C6 USB3_PCH_TX4_DP 1
R2438 2
0_5%_2 P5V0A_USB4
B BI C2443 0.1UF_16V_2 B
34C2 USB3_IC_TX4_DN 1 2 USB3_SSTX4_DN 35A5
BI BI
34C2 USB3_IC_TX4_DP 1 2 USB3_SSTX4_DP 35A5
BI BI
1
C2444 0.1UF_16V_2
C2452
C2453
CLOSE TO CN2402
C2451
USB_IC_1_DN 0.1UF_16V_2 1000PF_50V_2

35A8
BI 22UF_6.3V_5
USB_IC_1_DP
2
35A8
BI
CN2402
L2403
1 VBUS
WCM_2012_900T
35A8 34C2 USB2_IC_TX4_DNR2503 1 2 0_5%_2 USB_P3_R_DN R2452 1 2 0_5%_2 1 2 USB_P3_L_DN 2 D-
BI
35A8 34C2 USB2_IC_TX4_DPR2504 1 2 0_5%_2 USB_P3_R_DP R2453 1 2 0_5%_2 4 3 USB_P3_L_DP 3 D+
BI
4 PGND
USB_P3_DN 1 R2489 2 0_5%_2 USB3_IC_RX4_DN 1 2 USB3_L_RX4_DN 5
56C2 BI 35B5 34C2
BI R2524 RSC_0603 SSRX-
35B5 34C2 USB3_IC_RX4_DP 1

R2525 2
RSC_0603 USB3_L_RX4_DP 6 SSRX+ G G1
56C2 USB_P3_DP 1 2 0_5%_2
P5V0A BI
BI 7 GND G G2
R2490 USB3_SSTX4_DN 1 2 USB3_L_SSTX4_DN 8 G3
35B5
BI R2526 RSC_0603 SSTX- G
35B5 34C2 USB2_IC_TX4_DN 35B5 USB3_SSTX4_DP 1

R2527 2
RSC_0603 USB3_L_SSTX4_DP 9 SSTX+ G G4
BI BI
1
35A5 34C2 USB2_IC_TX4_DP

BI OCTEK_USB_09EREB_9P
35C8 21D6 EC_ILIM_SEL U2408 C2499
IN
0.1UF_16V_2
TI_TPS2540A_QFN_16P
4
3
2
1
A A
ILIM_SEL
DP_OUT
DM_OUT
IN
PWPD 17
35C8 35C5 21D3 SB_USB_2 5 EN ILIM0 16
IN
35C8 35C1 21C3 EC_CTL1 6 CTL1 ILIM1 15
IN 35C6
35C8 35C1 21D6 EC_CTL2 7 CTL2 GND 14
IN 35C3
EC_CTL3 USB_OC#_2
1
8 13
DP_IN
DM_IN
35C8 35C1 IN CTL3 FAULT#

OUT 21D3
OUT
R2492 R2493
NC
P5V0A
R2497 20K_5%_2 RSC_0402_DY

INVENTEC
9
10
11
12
1 2 P5V0A_USB4
2
100K_5%_2_DY
TITLE
USB_IC_1_DP MODEL,PROJECT,FUNCTION
35B4 BI Block Diagram
35B4 USB_IC_1_DN DOC.NUMBER REV

BI CODE
SIZE 1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
47B7 CPU_EDP_AUX_DP C3300 1 20.1UF_16V_2_DY EDP_AUX_DP 36C4

IN OUT
47B7 CPU_EDP_AUX_DN C3301 1 20.1UF_16V_2_DY EDP_AUX_DN 36C4
IN OUT
47B7 CPU_EDP_TX0_DP R3308 1 2 0_5%_2_DY EDP_R_TX0_DP C3308 1 2
0.1UF_16V_2 EDP_TX0_DP 36C4
IN OUT
47A7 CPU_EDP_TX0_DN R3309 1 2 0_5%_2_DY EDP_R_TX0_DN C3309 1 2
0.1UF_16V_2 EDP_TX0_DN 36C4
IN OUT
47B7 CPU_EDP_TX1_DP R3310 1 2 0_5%_2_DY EDP_R_TX1_DP C3310 1 2
0.1UF_16V_2 EDP_TX1_DP 36D4
IN OUT
47A7 CPU_EDP_TX1_DN R3311 1 2 0_5%_2_DY EDP_R_TX1_DN C3311 1 2
0.1UF_16V_2 EDP_TX1_DN 36D4
IN OUT
EDP_TX2_DP 36D4
OUT
EDP_TX2_DN 36D4
D OUT 37D3 P3V3S_LCM PVBAT_LCD
EDP_TX3_DP 36D4 IN
OUT D
EDP_TX3_DN 36D4 CN3300
OUT G G1
1 1
36D5 EDP_TX3_DN 2 2
IN
36D5 EDP_TX3_DP 3 3
IN
4 4
36D5 EDP_TX2_DN 5 5
IN
36D5 EDP_TX2_DP 6 6
IN
61B2 MXM_EDP_AUX_DP 1
C3306 2
0.1UF_16V_2_DY 7 7
IN
1
36D4 EDP_TX1_DN 8 8
IN
1
R3305 36D4 EDP_TX1_DP 9 9
P3V3S IN
R3306 10 10
100K_5%_2 EDP_TX0_DN 11
36D4 11
100K_5%_2 IN
1
36D4 EDP_TX0_DP 12 12
IN
2
13 13
2
R3304 EDP_AUX_DP 14
36D5 14
IN
100K_5%_2 36D5 EDP_AUX_DN 15 15
IN
16 16
17
2
17
61B2 MXM_EDP_AUX_DN 1
C3307 2
0.1UF_16V_2_DY
IN 18 18
19 19
1
20 20
R3307 21 21
C EDP_HPD 22 C
36B5 22
100K_5%_2 OUT
23 23
24 24
2
EC_BKLTEN_R 25 25
IN
21D1 INV_PWM_3_R 26 26
IN
27 27
28 28
29 29
61B2 MXM_EDP_TX0_DP R3312 1 20_5%_2
IN 30 30
61C2 MXM_EDP_TX0_DN R3313 1 20_5%_2
IN P3V3S 31 31
61B2 MXM_EDP_TX1_DP R3314 1 20_5%_2
IN 32 32
61B2 MXM_EDP_TX1_DN R3315 1 20_5%_2
IN 33 33
61B2 MXM_EDP_TX2_DP C3322 1 2
0.1UF_16V_2
IN 34 34
61B2 MXM_EDP_TX2_DN C3323 1 2
0.1UF_16V_2
IN 56B2 37B2 USB_CAM_DN 35 35
61B2 MXM_EDP_TX3_DP C3324 1 2
0.1UF_16V_2 BI
IN 56B2 37B2 USB_CAM_DP 36 36
61B2 MXM_EDP_TX3_DN C3325 1 2
0.1UF_16V_2 BI
IN 37 37
37A4 24A5 MIC_IN_CLK 38 38

BI
MIC_IN_DATA 39 39
BI
40 40
G G2
P3V3S ACES_50203_04001_001_40P
B B
5
U3300
+
1
61B2 MXM_EDP_HPD 4 EDP_HPD 36C4
OUT IN
2
1
-
TC7SZ08FU R3302
3
100K_5%_2
2
P1V05S
1
R3300
1K_5%_2_DY
A A
CPU_EDP_HPD#
3 2
47B7
OUT
Q3300
D
G 1
S
SSM3K7002BFU_DY
discrete only open
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S P5V0S
REFFERENCE 3000~3049(LCM) P5V0S P3V3S
1
1
R349
R350
1
0_5%_3_DY
R3008
R3048
0_5%_3 0_5%_3_DY
0_5%_3
CN3001
2
1
2
Q3000 1
DIODES_DMP2305U_SOT23_3P 56B2 USB_3D_DN 2 2

BI
P3V3S_LCM USB_3D_DP 3 G1
2
S D 56B2 BI 3 G1
36D3
S D OUT 4 4 G2 G2
1
ACES_50224_0040N_001_4P
1
0.01UF_50V_2
0.1UF_16V_2
10UF_6.3V_3
1
C3000
C3001
C3003
C3002
47K_5%_2
R3000
G
2 1
680PF_50V_2
D
2
2
2
2
D
2
R3001 R3004
MXM_LCM_VDDEN R3010 1 2 PCH_LCM_VDDEN#
62D7 61C8 1 2 100_5%_2
IN
3
Q3001 470K_5%_2
3
1
0_5%_2 P3V3S
D
R3011
PCH_LCM_VDDEN
1 2 1 Q3002
55D7 G
P3V3S
IN
D
0_5%_2_DY 1 G
S
SSM3K7002BFU
1
1
1
2.2K_5%_2
2.2K_5%_2
2
0.1UF_16V_2
SSM3K7002BFU
C3004
R3002
R3005
2
2
2
2
62D7 61C8 MXM_LCM_BKLTEN R345 1 2 0_5%_2 CN3000
IN G G1
61C8 MXM_LVDS_DDCCLK R3013 1 2 0_5%_2 1 1
BI
55D7 PCH_LCM_BKLTEN R344 1 2 0_5%_2_DY LCM_BKLTEN 21E6 61C8 MXM_LVDS_DDCDATA R3012 1 2 0_5%_2 2 2
IN OUT BI
3 3
55D7 PCH_LVDS_DDCCLK R3014 1 2

0_5%_2_DY 4 4
BI
55C7 PCH_LVDS_DDCDATA R3015 1 2
0_5%_2_DY 5 5
BI
C 6 6 C
55C6 PCH_LVDS_TXDA0_DN R3016 1 2
0_5%_2_DY LVDS_TXDA0_DN 7 7
BI
55C6 PCH_LVDS_TXDA0_DP R3017 1 2
0_5%_2_DY LVDS_TXDA0_DP 8 8
BI
9 9

BI
BI
12 12

BI
BI
15 15
55C6 PCH_LVDS_TXCA_DN R3022 1 2

0_5%_2_DY LVDS_TXCA_DN 16 16
BI
55C6 PCH_LVDS_TXCA_DP R3023 1 2
0_5%_2_DY LVDS_TXCA_DP 17 17
BI
18 18
55B6 PCH_LVDS_TXDB0_DN R3024 1 2

0_5%_2_DY LVDS_TXDB0_DN 19 19
BI
55B6 PCH_LVDS_TXDB0_DP R3025 1 2
0_5%_2_DY LVDS_TXDB0_DP 20 20
BI
21 21
55B6 PCH_LVDS_TXDB1_DN R3042 2 10_5%_2_DY LVDS_TXDB1_DN 22 22

BI
55B6 PCH_LVDS_TXDB1_DP R3043 2 10_5%_2_DY LVDS_TXDB1_DP 23 23
BI
24 24
55B6 PCH_LVDS_TXDB2_DN R3044 2 10_5%_2_DY LVDS_TXDB2_DN 25 25

BI
55B6 PCH_LVDS_TXDB2_DP R3045 2 10_5%_2_DY LVDS_TXDB2_DP 26 26
BI
27 27
55B6 PCH_LVDS_TXCB_DN R3046 2 10_5%_2_DY LVDS_TXCB_DN 28 28

B BI B
55B6 PCH_LVDS_TXCB_DP R3047 2 10_5%_2_DY LVDS_TXCB_DP 29 29
BI
30 30
61C2 MXM_LVDS_TXDA0_DN R3026 1 2 0_5%_2 55D7 PCH_INV_PWM_3 R3009 2 1 100_5%_2_DY INV_PWM_3_R 31 31

BI BI
61C2 MXM_LVDS_TXDA0_DP R3027 1 2 0_5%_2 32 32
BI 61C8 MXM_INV_PWM_3 R3049 2 1 100_5%_2
BI 33 33
62D7
61C2 MXM_LVDS_TXDA1_DN R3028 1 2 0_5%_2 21E6 EC_BKLTEN R3003 2 1 100_5%_2 EC_BKLTEN_R 34 34
BI BI
MXM_LVDS_TXDA1_DP
1
61C2
BI R3029 1 2 0_5%_2 35 35
CSC0402_DY
56B2 36B4 USB_CAM_DN 36
100K_5%_2
36
BI
1000PF_50V_2
MXM_LVDS_TXDA2_DN R3030 1 2 0_5%_2 USB_CAM_DP 37
C3006
C3007
R3006
61C2 56B2 36B4 37
BI BI
61C2 MXM_LVDS_TXDA2_DP R3031 1 2 0_5%_2 38 38
BI
39 39
MXM_LVDS_TXCA_DN R3032 1 2 0_5%_2 40
2
61C2 40
BI
2
61C2 MXM_LVDS_TXCA_DP R3033 1 2 0_5%_2 G G2
BI
ACES_50203_04001_001_40P
61C4 MXM_LVDS_TXDB0_DN R3034 1 2 0_5%_2
BI P3V3S
61C4 MXM_LVDS_TXDB0_DP R3035 1 2 0_5%_2
BI
1
61C4 MXM_LVDS_TXDB1_DN R3036 2 1 0_5%_2
0.1UF_16V_2
BI MIC_IN_CLK
C3008
36B4 24A5
61C4 MXM_LVDS_TXDB1_DP R3037 2 1 0_5%_2 BI
BI 24A5 MIC_IN_DATA_R 2 1 MIC_IN_DATA
BI
MXM_LVDS_TXDB2_DN R3038 2 1 100_5%_2 R3007
61C4
BI 0_5%_2
61C4 MXM_LVDS_TXDB2_DP R3039 2 1 0_5%_2
BI
2
A 61C4 MXM_LVDS_TXCB_DN R3040 2 1 0_5%_2 A
BI
61C4 MXM_LVDS_TXCB_DP R3041 2 1 0_5%_2 PVBAT PVBAT_LCD
BI
PAD3001
1 2
1 2
POWERPAD_2_0610
0.1UF_25V_3
4.7UF_25V_5
C3009
C3010
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 3050~3099(CRT)
P5V0S
2
R3057 0_5%_2_DY
CRTR 1 2 CRTR_R L3052 1 2 120NH,5% CRTR_L
55B7 38A7 38C3
IN OUT
D3050
R3058
0_5%_2_DY L3051 SBR3U40P1
55B7 CRTG 1 2 CRTG_R 1 2 120NH,5% CRTG_L 38A7 38C3
IN OUT
1
R3059 0_5%_2_DY
L3050 CRTB_L
55B7 CRTB 1 2 CRTB_R 1 2 120NH,5% 38A7 38C3
IN OUT P5V0S_CRT1
1
1
2
D
15PF_50V_2
1
15PF_50V_2
C3050
C3051
FUSE3050
15PF_50V_2
150_1%_2
150_1%_2
C3052
150_1%_2
R3055
R3056
R3054
SMD1812P110TF
2
2
1
2
P5V0S_CRT2
CN3051
P5V0S_CRTVDD 38D5 38A7 CRTR_L 1 1
IN
38D5 38A7 CRTG_L 2 2
IN
38D5 38A7 CRTB_L 3 3
IN
R3064 0_5%_2 4 4
61C2 MXM_CRTR 1 2 CRTR_R 5 5

IN OUT
1
6 6
R3066 0_5%_2 7
MXM_CRTG 1 2 CRTG_R R3050 R3051 7
61C2
IN OUT 8 8
2.2K_5%_2 9
R3068 0_5%_2 2.2K_5%_2 9
61C2 MXM_CRTB 1 2 CRTB_R 10 10

IN OUT
2
11 11
CRT_DDCDATA_OUT 1 R3053 2 CRT_DDCDATA_R_OUT 12 G1
38A3 12 G
C BI C
38A3 CRT_HSYNC_R_OUT 13 13 G G2
100_5%_2 IN
38A3 CRT_VSYNC_R_OUT 14 14
R3052 IN
38A3 CRT_DDCCLK_OUT 1 2 CRT_DDCCLK_R_OUT 15 15
R30700_5%_2_DY BI
55A6 CRT_VSYNC 1 2 CRT_VSYNC_R 38A4 100_5%_2 TYCO_2041096_1_15P
IN OUT
R3072 0_5%_2
61C2 MXM_CRT_VSYNC 1 2
IN
R30730_5%_2_DY
1
55A6 CRT_HSYNC 1 2 CRT_HSYNC_R 38A4
IN OUT
C3053 C3054
R3075 0_5%_2
61C2 MXM_CRT_HSYNC 1 2
IN 0.1UF_16V_2_DY 0.1UF_16V_2_DY
2
R30760_5%_2_DY
55A6 CRT_DDCDATA 1 2 CRT_DDCDATA_R 38A4
IN OUT RESERVE CAP FOR EMI
R3078 0_5%_2
61D2 MXM_CRT_DDCDATA 1 2
IN
R30790_5%_2_DY
55A6 CRT_DDCCLK 1 2 CRT_DDCCLK_R 38A4
IN OUT
B R3081 0_5%_2 B
61D2 MXM_CRT_DDCCLK 1 2
IN
P5V0S P3V3S
1
1
C3056
R3060 R3061
0.22UF_6.3V_2
2.2K_5%_2 2.2K_5%_2
2
P3V3S
U3050
1 VCC-SYNC SYNC_OUT2 16 CRT_VSYNC_OUT 1 R3062 2 30_5%_2 CRT_VSYNC_R_OUT 38C3
OUT
2 VCC-VIDEO SYNC_IN2 15 CRT_VSYNC_R 38C6
IN
A 38D5 38C3 CRTR_L 3 VIDEO_1 SYNC_OUT1 14 CRT_HSYNC_OUT 1 R3063 2 30_5%_2 CRT_HSYNC_R_OUT 38C3 A
IN OUT
1
38D5 38C3 CRTG_L 4 VIDEO_2 SYNC_IN1 13 CRT_HSYNC_R 38C6

IN IN
C3055 38C3 CRTB_L 5 VIDEO_3 DCC_OUT2 12 CRT_DDCDATA_OUT 38C5
P5V0S_CRTVDD IN OUT
38D5 6 GND DDC_IN2 11 CRT_DDCDATA_R 38B6
IN
0.22UF_6.3V_2 7 VCC-DCC DDC_IN1 10 CRT_DDCCLK_R 38B6
IN
8 BYP DDC_OUT1 9 CRT_DDCCLK_OUT 38C5
OUT
2
TI_TPD7S019_15DBQR_SSOP_16P
C3057
0.22UF_6.3V_2
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 3150~3199(HDMI)
PLACE CLOSE TO CONNECTOR
55B2 PCH_HDMI_TX2_DP C4744 1 2 0.1UF_16V_2_DY

BI
MXM_HDMI_TX2_DP 1 2 HDMI_TX2_C_DP 1 R3166
HDMI_TX2_R_DP
2
61C4 BI C3152 0.1UF_16V_2
PCH_HDMI_TX2_DN 1 2 0.1UF_16V_2_DY RSC_0603

55B2 BI C4745
MXM_HDMI_TX2_DN 1 2 HDMI_TX2_C_DN 1 R3167

HDMI_TX2_R_DN
2
61C4 BI C3153 0.1UF_16V_2
PCH_HDMI_TX1_DP 1 2 0.1UF_16V_2_DY RSC_0603

55B2 BI C4746

HDMI_TX1_R_DP
2
61B4 BI C3154 0.1UF_16V_2
PCH_HDMI_TX1_DN 1 2 0.1UF_16V_2_DY RSC_0603 P5V0AL_HDMI_VDD1

55B2 BI C4747
D
HDMI_TX1_R_DN
2
61C4 BI C3155 0.1UF_16V_2 D
PCH_HDMI_TX0_DP RSC_0603
1
1 2 0.1UF_16V_2_DY
1
55B2 BI C4748
R3152
R3153
HDMI_TX0_R_DP
2
61B4 BI C3156 0.1UF_16V_2
2.2K_5%_2
2.2K_5%_2
2
2
PCH_HDMI_TX0_DN 1 2 0.1UF_16V_2_DY RSC_0603
55B2 BI C4749

HDMI_TX0_R_DN
2
61B4 BI C3157 0.1UF_16V_2
PCH_HDMI_TXC_DP 1 2 0.1UF_16V_2_DY RSC_0603

55B2 BI C4750
CN3150
1 1
MXM_HDMI_TXC_DP 1 2 HDMI_TXC_C_DP 1 R3172
HDMI_TXC_R_DP
2 2
61B4 BI C3158 0.1UF_16V_2 2
3 3
PCH_HDMI_TXC_DN 1 2 0.1UF_16V_2_DY RSC_0603 4
55B2 BI C4751 4
5 5
MXM_HDMI_TXC_DN 1 2 HDMI_TXC_C_DN 1 R3173
HDMI_TXC_R_DN
2 6
61B4 BI C3160 0.1UF_16V_2 6
7 7
RSC_0603 8 8
9 9
10 10
11 11
12 12
C HDMI_CEC 13 C
P5V0AL_HDMI_VDD1 40D6 13
BI
TP24 1 14 14
P5V0AL TP3151
40D3 39B5 HDMI_CN_DDCCLK 15 15 G G1
BI
D3155 40C3 39B5 HDMI_CN_DDCDATA 16 16 G G2
BI
FUSE3150 17 G3
P3V3S 40MIL
17 G
2 1 1 2 P5V0AL_HDMI_VDD2 18 18 G G4
19 19
SMD1812P110TF
R3154
HPDET_IC 1 2 LOTES_ABA_HDM_032_P03_19P
SBR3U40P1 40C1 OUT
1
GM: 2.2K 1K_5%_2
1
C3150 R3150
PM:10K C3151
10K_5%_2
10K_5%_2
R4863
R4864
100PF_50V_2
(60130B1030ZT) P3V3S 470K_5%_2
22PF_50V_2_DY
2
CLOSE TO CONNECTOR
2
Q3151
G
SSM3K17FU P3V3S
R3174
61B4 MXM_HDMI_DDCDATA
1 2 HDMI_DDCDATA S S D D HDMI_CN_DDCDATA 39C3 40C3
BI BI
B B
0_5%_2
G
1
Q3150
G
R3165
SSM3K17FU
R3176
61B4 MXM_HDMI_DDCCLK
1 2 HDMI_DDCCLK S S D D HDMI_CN_DDCCLK 39C3 40D3 100K_5%_2
BI BI
2
0_5%_2
Q3152
G
R3175
55B2 PCH_HDMI_DDCDATA
1 2 HDMI_TXC_C_DP 1 R3164 2 SSM3K7002BFU
3 2
BI IN D S
680_5%_2
0_5%_2_DY
R3163
R3177 HDMI_TXC_C_DN 1 2
IN
55B2 PCH_HDMI_DDCCLK 1 2
BI 680_5%_2
0_5%_2_DY R3162
HDMI_TX0_C_DN 1 2
IN P3V3S
680_5%_2
R3161
5
HDMI_TX0_C_DP 1 2
IN U3150
A HDMI_HPD_EC A
+
680_5%_2 R3178 1 21D6 40B1
IN
61B2 MXM_HDMI_HPDET
1 2 4
R3160 BI
2 BUF_PLT_RST# 21E3 28C3 28C7 29C3
HDMI_TX1_C_DN 1 2 IN
IN 0_5%_2_DY 35C3 56A8 62C7
-
680_5%_2 TC7SZ08FU
3
R3179
R3159 PCH_HDMI_HPDET
1 2
HDMI_TX1_C_DP 1 2 55B2 BI
IN
680_5%_2 0_5%_2
IN
HDMI_TX2_C_DN 1
R3158
2 INVENTEC
680_5%_2
TITLE
R3157
HDMI_TX2_C_DP 1 2 MODEL,PROJECT,FUNCTION
IN Block Diagram
680_5%_2 DOC.NUMBER REV

SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3AL
P3V3AL
1
2 D3200
R3201 Q3201
G
NC
4.02K_1%_2 SSM3K17FU
G
BAT54_30V_0.2A
2
D
3
40B3 HDMI_DDCCLK_CEC S S D HDMI_CN_DDCCLK
D 39B5 39C3 D
BI BI
P3V3AL
1
P3V3AL
R3204
27K_5%_2
5
1
NC
2
U3203
+
R3214 HDMI_CEC
1
40B6 CEC_IN1 24 2 39C3
IN BI
R3200
G
- Q3200
68_5%_2 4.02K_1%_2
3
SSM3K17FU
G
74LVC1G14GV Q3203
3
2
D
R3206
G 1 1 2 CEC_OUT 40B6 40B3 HDMI_DDCDATA_CEC S S D DHDMI_CN_DDCDATA 39B5 39C3
OUT BI BI
1
S
22K_5%_2 P3V3AL
SSM3K7002BFU
2
R3205
1
100K_5%_2 P3V3AL
0.1UF_16V_2
C3200
2
C P3V3AL C
1
2
1
1
4.7K_5%_2
4.7K_5%_2
R3209
R3208
R3213
R3210
4.7K_5%_2
4.7K_5%_2
5
1
NC
U3202
2
U3200
2
2
EC_SMB2_CLK EC_SMB2_DATA
+
1 P3_5-SSCK-SCL-CMP1_2 P3_4-SCS#-SDA-CMP1_1 20 R3227
BI BI
2 P3_7-CNTR0#-SSO-TXD1 P3_3-TCIN-INT3#-SSI00-CMP1_0 19 1 2 4 2 HPDET_IC 39C4
IN
3 RESET# P1_0-KI0#-AN8-CMP0_0 18 HDMI_DDCDATA_CEC 40C5
BI
40A8 CEC_XOUT 4 XOUT-P4_7 P1_1-KI1#-AN9-CMP0_1 17 HDMI_DDCCLK_CEC 40D5 33_5%_2 -
OUT BI
5 VSS-AVSS P4_2-VREF 16
CEC_XIN 6 15 PHP_74LVC1G17_SOT753_5P
3
40A6 IN XIN-P4_6 P1_2-KI2#-AN10-CMP0_2
7 VCC-AVCC P1_3-KI3#-AN11-TZOUT 14
8 MODE P1_4-TXD0 13
40D8 CEC_IN 9 P4_5-INT0#-RXD1 P1_5-RXD0-CNTR01-INT11# 12
IN
40C6 CEC_OUT 10 P1_7-CNTR00-INT10# P1_6-CLK0-SSI01 11
OUT
R3203
RENESAS_R5F211B4D61SP_LSSOP_20P
1 2
B P3V3AL B
0_5%_2_DY
1
0.1UF_16V_2
1UF_6.3V_2
C3202
C3205
HDMI_HPD_EC 21D6 39A1
OUT
RSC_0402_DY
R3202
P3V3AL
2
1
1
47K_5%_2
47K_5%_2
R3211
R3212
2
40B6 CEC_XOUT CEC_XIN 40B6

OUT IN
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4100~4199(DDR)
48A4 42D8
BI
M_A_A<15..0>
CHA DIMM0 BUTTOM
M_A_DQ<63..0>
42D5 48D8
CN4100 BI
0 M_A_A<0> 98 A0 DQ0 5 M_A_DQ<0> 0
1 M_A_A<1> 97 A1 DQ1 7 M_A_DQ<1> 1
2 M_A_A<2> 96 A2 DQ2 15 M_A_DQ<2> 2
3 M_A_A<3> 95 A3 DQ3 17 M_A_DQ<3> 3
4 M_A_A<4> 92 A4 DQ4 4 M_A_DQ<4> 4
5 M_A_A<5> 91 A5 DQ5 6 M_A_DQ<5> 5
6 M_A_A<6> 90 A6 DQ6 16 M_A_DQ<6> 6
7 M_A_A<7> 86 A7 DQ7 18 M_A_DQ<7> 7
8 M_A_A<8> 89 A8 DQ8 21 M_A_DQ<8> 8
D 9 M_A_A<9> 85 A9 DQ9 23 M_A_DQ<9> 9 P1V5
CN4100
10 M_A_A<10> 107 A10/AP DQ10 33 M_A_DQ<10> 10 D
LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN 75 VDD1 VSS16 44
11 M_A_A<11> 84 A11 DQ11 35 M_A_DQ<11> 11
76 VDD2 VSS17 48
12 M_A_A<12> 83 A12/BC# DQ12 22 M_A_DQ<12> 12
1
81 VDD3 VSS18 49
13 M_A_A<13> 119 A13 DQ13 24 M_A_DQ<13> 13
C4101 C4102 C4103 C4105 C4106 C4107 82 VDD4 VSS19 54
14 M_A_A<14> 80 A14 DQ14 34 M_A_DQ<14> 14 C4100
+
87 VDD5 VSS20 55
15 M_A_A<15> 78 A15 DQ15 36 M_A_DQ<15> 15
88 VDD6 VSS21 60
39 M_A_DQ<16> 16 330UF_2.5V_DY 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2
DQ16 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 93 VDD7 VSS22 61
48A8 42D8 M_A_BS0 109 BA0 DQ17 41 M_A_DQ<17> 17
IN 94 65
2
VDD8 VSS23
48A8 42D8 M_A_BS1 108 BA1 DQ18 51 M_A_DQ<18> 18
IN 99 VDD9 VSS24 66
48A8 42D8 M_A_BS2 79 BA2 DQ19 53 M_A_DQ<19> 19
IN 100 VDD10 VSS25 71
48C5 M_CS#0 114 S0# DQ20 40 M_A_DQ<20> 20 NOTE:PLACE C4100 ON COMMON PATH FOR BOTH DIMM'S
IN
1
105 VDD11 VSS26 72
48C5 M_CS#1 121 S1# DQ21 42 M_A_DQ<21> 21
IN C4110 C4109 C4108 106 VDD12 VSS27 127
48D4 M_CLK_DDR0_DP 101 50 M_A_DQ<22> 22
IN CK0 DQ22 P3V3S 111 VDD13 VSS28 128
48D4 M_CLK_DDR0_DN 103 CK0# DQ23 52 M_A_DQ<23> 23
IN 112 VDD14 VSS29 133
48D4 M_CLK_DDR1_DP 102 CK1 DQ24 57 M_A_DQ<24> 24 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
IN 117 VDD15 VSS30 134
IN 118 138
2
VDD16 VSS31
48D4 M_CKE0 73 CKE0 DQ26 67 M_A_DQ<26> 26
IN 123 VDD17 VSS32 139
M_CKE1 69 M_A_DQ<27>
1
48D4 74 CKE1 DQ27 27
IN 124 VDD18 VSS33 144
48A8 42C8 M_A_CAS# 115 CAS# DQ28 56 M_A_DQ<28> 28
IN C4114 C4115 VSS34 145
48A8 42C8 M_A_RAS# 110 RAS# DQ29 58 M_A_DQ<29> 29
IN 199 VDDSPD VSS35 150
48A8 42C8 M_A_WE# 113 WE# DQ30 68 M_A_DQ<30> 30
IN 2.2UF_6.3V_3 0.1UF_16V_2 VSS36 151
41A6 SA0_DIM0 197 SA0 DQ31 70 M_A_DQ<31> 31
OUT 77 NC1 VSS37 155
SA1_DIM0 201 129M_A_DQ<32>
2
41A6 SA1 DQ32 32
C OUT 122 NC2 VSS38 156 C
44C8 43C8 42C8 PCH_3S_SMCLK 202 SCL DQ33 131M_A_DQ<33> 33
IN 125 NCTEST VSS39 161
43C8 42C8 53A8 PCH_3S_SMDATA 200 SDA DQ34 141M_A_DQ<34> 34
IN VSS40 162
53A8 44C8 DQ35 143M_A_DQ<35> 35
VSS41 167
48C5 M_ODT0 116 ODT0 DQ36 130M_A_DQ<36> 36
IN 44C3 43C3 42C3 41B5 PM_EXTTS#1_R 198 EVENT# VSS42 168
48C5 M_ODT1 120 ODT1 DQ37 132M_A_DQ<37> 37
P0V75M_VREF OUT
IN 46A5 44C3 43C3 42C3 DDR3_DRAMRST# 30 RESET# VSS43 172
DQ38 140M_A_DQ<38> 38 OUT
VSS44 173
11 DM0 DQ39 142M_A_DQ<39> 39
ALL VREF TRACES SHOULD HAVE 10 MIL TRACE WIDTH VSS45 178
28 DM1 DQ40 147M_A_DQ<40> 40
1 VREF_DQ VSS46 179
46 DM2 DQ41 149M_A_DQ<41> 41
126 VREF_CA VSS47 184
157M_A_DQ<42>
1
63 DM3 DQ42 42
VSS48 185
136 DM4 DQ43 159M_A_DQ<43> 43
C4150 C4116 189
153 DM5 DQ44 146M_A_DQ<44> 44
VSS49 P0V75S
2 VSS1 VSS50 190
170 DM6 DQ45 148M_A_DQ<45> 45
0.1UF_16V_2 3 195
187 DM7 DQ46 158M_A_DQ<46> 46 2.2UF_6.3V_3 P0V75M_VREF VSS2 VSS51
8 VSS3 VSS52 196
160M_A_DQ<47>
2
DQ47 47
9 VSS4
48B5 42B8 M_A_DQS0_DP 12 DQS0 DQ48 163M_A_DQ<48> 48
IN 13 VSS5
IN 14 VSS6
IN 19 VSS7
IN
1
20
48B5 42B8
IN
M_A_DQS4_DP 137 DQS4 DQ52 164M_A_DQ<52> 52
25
VSS8
VSS9 VTT1 203 1.5A

48B5 42B8 M_A_DQS5_DP 154 DQS5 DQ53 166M_A_DQ<53> 53 C4117 C4118
IN 26 VSS10 VTT2 204
IN 31 VSS11
B 48B5 42B8 M_A_DQS7_DP 188 DQS7 DQ55 176M_A_DQ<55> 55
2.2UF_6.3V_3 0.1UF_16V_2 B
IN P3V3S 32 VSS12 G1 G1
48B5 42B8 M_A_DQS0_DN 10 DQS0# DQ56 181M_A_DQ<56> 56
IN 37 G2
2
VSS13 G2
IN 38 VSS14
IN 43 VSS15
M_A_DQS3_DN 193M_A_DQ<59>
1
48B5 42B8 62 DQS3# DQ59 59
IN
IN JAE_MM80_204B1_D9R_R400_DT_204P
48B5 42B8 M_A_DQS5_DN 152 DQS5# DQ61 182M_A_DQ<61> 61 R4104
IN
48B5 42B8 M_A_DQS6_DN 169 DQS6# DQ62 192M_A_DQ<62> 62 10K_5%_2
IN
IN
2
PM_EXTTS#1_R
JAE_MM80_204B1_D9R_R400_DT_204P 44C3 43C3 42C3 41C3
IN PLACE THESE CAPS CLOSE TO VTT1 AND VTT2
1
P3V3S C4119 C4120 C4121 C4122
1
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2
2
NOTE:
R4100 R4101
10K_5%_2_DY 10K_5%_2_DY
IF SA0_DIM0=1 , SA1_DIM0=0
A A
SO-DIMMA SPD ADDRESS IS 0XA2
2
SA0_DIM0 41C8
SO-DIMMA TS ADDRESS IS 0X32 IN
SA1_DIM0 41C8
IN
1
SO-DIMMA SPD ADDRESS IS 0XA0 R4102 R4103
10K_5%_2 10K_5%_2
SO-DIMMA TS ADDRESS IS 0X30
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
48A4 41D8
BI
M_A_A<15..0>
0 M_A_A<0> 98
CN4200
A0 DQ0 5 M_A_DQ<4> 4
M_A_DQ<63..0>
BI 41D5 48D8
CHA DIMM1 TOP
1 M_A_A<1> 97 A1 DQ1 7 M_A_DQ<5> 5
2 M_A_A<2> 96 A2 DQ2 15 M_A_DQ<6> 6
3 M_A_A<3> 95 A3 DQ3 17 M_A_DQ<7> 7
4 M_A_A<4> 92 A4 DQ4 4 M_A_DQ<0> 0
5 M_A_A<5> 91 A5 DQ5 6 M_A_DQ<1> 1
6 M_A_A<6> 90 16 M_A_DQ<2> 2
NOTE:PLACE C4100 ON COMMON PATH FOR BOTH DIMM'S
A6 DQ6
7 M_A_A<7> 86 A7 DQ7 18 M_A_DQ<3> 3
8 M_A_A<8> 89 A8 DQ8 21 M_A_DQ<12> 12 P1V5
D 9 M_A_A<9> 85 A9 DQ9 23 M_A_DQ<13> 13 CN4200
75 VDD1 VSS16 44
10 M_A_A<10> 107 A10_AP DQ10 33 M_A_DQ<14> 14 D
1
76 VDD2 VSS17 48
11 M_A_A<11> 84 A11 DQ11 35 M_A_DQ<15> 15
1
C4205 C4206 C4207 81 VDD3 VSS18 49
12 M_A_A<12> 83 A12 DQ12 22 M_A_DQ<8> 8
82 VDD4 VSS19 54
13 M_A_A<13> 119 A13 DQ13 24 M_A_DQ<9> 9 C4200
+
87 VDD5 VSS20 55
14 M_A_A<14> 80 34 M_A_DQ<10> 10
A14 DQ14 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 88 VDD6 VSS21 60
15 M_A_A<15> 78 A15 DQ15 36 M_A_DQ<11> 11 330UF_2.5V_DY 93 61
2
VDD7 VSS22
DQ16 39 M_A_DQ<20> 20
94 65
2
VDD8 VSS23
48A8 41D8 M_A_BS0 109 BA0 DQ17 41 M_A_DQ<21> 21
IN LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN 99 VDD9 VSS24 66
48A8 41D8 M_A_BS1 108 BA1 DQ18 51 M_A_DQ<22> 22
IN 100 VDD10 VSS25 71
M_A_BS2 53 M_A_DQ<23>
1
48A8 41D8 79 BA2 DQ19 23
IN 105 VDD11 VSS26 72
48C5 M_CS#4 114 S0# DQ20 40 M_A_DQ<16> 16 C4210 C4209 C4208
IN P3V3S 106 VDD12 VSS27 127
48C5 M_CS#5 121 S1# DQ21 42 M_A_DQ<17> 17
IN 111 VDD13 VSS28 128
48D4 M_CLK_DDR4_DP 101 CK0 DQ22 50 M_A_DQ<18> 18
IN 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
112 VDD14 VSS29 133
IN 117 VDD15 VSS30 134
M_CLK_DDR5_DP 102 57 M_A_DQ<28>
2
48C4 CK1 DQ24 28
IN 118 VDD16 VSS31 138
48C4 M_CLK_DDR5_DN 104 CK1# DQ25 59 M_A_DQ<29> 29
IN
1
123 VDD17 VSS32 139
48C4 M_CKE4 73 CKE0 DQ26 67 M_A_DQ<30> 30
IN 124 VDD18 VSS33 144
48C4 M_CKE5 74 CKE1 DQ27 69 M_A_DQ<31> 31 C4211 C4212
IN VSS34 145
48A8 41C8 M_A_CAS# 115 CAS# DQ28 56 M_A_DQ<24> 24
48A8 41C8 M_A_RAS# 110 RAS# DQ29 58 M_A_DQ<25> 25 2.2UF_6.3V_3 0.1UF_16V_2
IN VSS36 151
48A8 41C8 M_A_WE# 113 WE# DQ30 68 M_A_DQ<26> 26
IN 77 155
2
NC1 VSS37
42A6 SA0_DIM1 197 SA0 DQ31 70 M_A_DQ<27> 27
OUT 122 NC2 VSS38 156
42A6 SA1_DIM1 201 SA1 DQ32 129M_A_DQ<36> 36
C OUT 125 NCTEST VSS39 161 C
53A8 44C8 43C8 41C8 PCH_3S_SMCLK 202 SCL DQ33 131M_A_DQ<37> 37
IN VSS40 162
53A8 44C8 43C8 41C8 PCH_3S_SMDATA 200 SDA DQ34 141M_A_DQ<38> 38
DQ35 143M_A_DQ<39> 39 OUT
46A5 44C3 43C3 41C3 DDR3_DRAMRST# 30 RESET# VSS42 168
48C5 M_ODT4 116 ODT0 DQ36 130M_A_DQ<32> 32
P0V75M_VREF OUT
IN VSS43 172
48C5 M_ODT5 120 ODT1 DQ37 132M_A_DQ<33> 33
IN VSS44 173
DQ38 140M_A_DQ<34> 34
1 VREF_DQ VSS45 178
11 DM0 DQ39 142M_A_DQ<35> 35 ALL VREF TRACES SHOULD HAVE 10 MIL TRACE WIDTH 126 VREF_CA VSS46 179
28 DM1 DQ40 147M_A_DQ<44> 44
VSS47 184
149M_A_DQ<45>
1
46 DM2 DQ41 45
VSS48 185
63 DM3 DQ42 157M_A_DQ<46> 46
C4213 C4214 2 189
136 DM4 DQ43 159M_A_DQ<47> 47
VSS1 VSS49 P0V75S
3 VSS2 VSS50 190
153 146M_A_DQ<40> 40
DM5 DQ44
0.1UF_16V_2 P0V75M_VREF 8 195
170 DQ45 148M_A_DQ<41> 41 2.2UF_6.3V_3 VSS3 VSS51
DM6
9 VSS4 VSS52 196
187 158M_A_DQ<42>
2
DM7 DQ46 42
13 VSS5
DQ47 160M_A_DQ<43> 43
14 VSS6
IN 19 VSS7
IN 20 VSS8
M_A_DQS2_DP 175M_A_DQ<54>
1
48B5 41B8 47 DQS2 DQ50 54
IN 25 VSS9
IN C4215 C4216 26 VSS10 VTT1 203
IN 2.2UF_6.3V_3 0.1UF_16V_2 32 VSS12
IN 37 VSS13 G1 G1
M_A_DQS7_DP 188 176M_A_DQ<51>
2
B 48B5 41B8 DQS7 DQ55 51 B
IN 38 VSS14 G2 G2
48B5 41B8 M_A_DQS0_DN 10 DQS#0 DQ56 181M_A_DQ<60> 60
IN 43 VSS15
IN
48B5 41B8 M_A_DQS2_DN 45 DQS#2 DQ58 191M_A_DQ<62> 62 JAE_MM80_204B1_D2_R400_DT_204P
IN
IN
IN
IN
IN
IN
JAE_MM80_204B1_D2_R400_DT_204P PLACE THESE CAPS CLOSE TO VTT1 AND VTT2
1
C4217 C4218 C4219 C4220
P3V3S
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2

1
2
NOTE:
R4203 R4202
10K_5%_2 10K_5%_2_DY
A A
SO-DIMMA SPD ADDRESS IS 0XA2
2
SA0_DIM1 42C8
SO-DIMMA TS ADDRESS IS 0X32 IN
SA1_DIM1 42C8
IN
1
SO-DIMMA SPD ADDRESS IS 0XA0 R4201 R4204
10K_5%_2_DY 10K_5%_2
SO-DIMMA TS ADDRESS IS 0X30
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
48A1 44D8
BI
M_B_A<15..0>
CHB DIMM2 BUTTOM
M_B_DQ<63..0>
44D5 48D4
BI
CN4101
0 M_B_A<0> 98 A0 DQ0 5 M_B_DQ<0> 0
1 M_B_A<1> 97 A1 DQ1 7 M_B_DQ<1> 1
2 M_B_A<2> 96 A2 DQ2 15 M_B_DQ<2> 2
3 M_B_A<3> 95 A3 DQ3 17 M_B_DQ<3> 3
4 M_B_A<4> 92 A4 DQ4 4 M_B_DQ<4> 4
5 M_B_A<5> 91 A5 DQ5 6 M_B_DQ<5> 5
6 M_B_A<6> 90 A6 DQ6 16 M_B_DQ<6> 6
D 7 M_B_A<7> 86 A7 DQ7 18 M_B_DQ<7> 7
8 M_B_A<8> 89 A8 DQ8 21 M_B_DQ<8> 8 D
9 M_B_A<9> 85 23 M_B_DQ<9> 9
A9 DQ9 P1V5
10 M_B_A<10> 107 A10_AP DQ10 33 M_B_DQ<10> 10 CN4101
LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN 75 VDD1 VSS16 44
11 M_B_A<11> 84 A11 DQ11 35 M_B_DQ<11> 11
76 VDD2 VSS17 48
12 M_B_A<12> 83 A12 DQ12 22 M_B_DQ<12> 12
1
81 VDD3 VSS18 49
13 M_B_A<13> 119 A13 DQ13 24 M_B_DQ<13> 13
C4125 C4126 C4127 C4128 C4129 C4130 82 VDD4 VSS19 54
14 M_B_A<14> 80 A14 DQ14 34 M_B_DQ<14> 14
87 VDD5 VSS20 55
15 M_B_A<15> 78 A15 DQ15 36 M_B_DQ<15> 15
88 VDD6 VSS21 60
39 M_B_DQ<16> 16 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2
DQ16 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 93 VDD7 VSS22 61
48A4 44D8 M_B_BS0 109 BA0 DQ17 41 M_B_DQ<17> 17
IN 94 65
2
VDD8 VSS23
48A4 44D8 M_B_BS1 108 BA1 DQ18 51 M_B_DQ<18> 18
IN 99 VDD9 VSS24 66
48A4 44C8 M_B_BS2 79 BA2 DQ19 53 M_B_DQ<19> 19
IN 100 VDD10 VSS25 71
M_CS#2 40 M_B_DQ<20>
1
48C1 114 S0# DQ20 20
IN 105 VDD11 VSS26 72
48C1 M_CS#3 121 S1# DQ21 42 M_B_DQ<21> 21 C4133 C4132 C4131
IN P3V3S 106 VDD12 VSS27 127
48D1 M_CLK_DDR2_DP 101 CK0 DQ22 50 M_B_DQ<22> 22
IN 111 VDD13 VSS28 128
48D1 M_CLK_DDR2_DN 103 CK0# DQ23 52 M_B_DQ<23> 23
IN 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
112 VDD14 VSS29 133
IN 117 VDD15 VSS30 134
M_CLK_DDR3_DN 104 59 M_B_DQ<25>
2
48D1 CK1# DQ25 25
IN 118 VDD16 VSS31 138
48D1 M_CKE2 73 CKE0 DQ26 67 M_B_DQ<26> 26
IN
1
123 VDD17 VSS32 139
48D1 M_CKE3 74 CKE1 DQ27 69 M_B_DQ<27> 27
IN 124 VDD18 VSS33 144
48A4 44C8 M_B_CAS# 115 CAS# DQ28 56 M_B_DQ<28> 28 C4138 C4137
IN VSS34 145
48A4 44C8 M_B_RAS# 110 RAS# DQ29 58 M_B_DQ<29> 29
48A4 44C8 M_B_WE# 113 WE# DQ30 68 M_B_DQ<30> 30 2.2UF_6.3V_3 0.1UF_16V_2
C IN VSS36 151 C
43A7 SA0_DIM2 197 SA0 DQ31 70 M_B_DQ<31> 31
OUT 77 155
2
NC1 VSS37
43A6 SA1_DIM2 201 SA1 DQ32 129M_B_DQ<32> 32
OUT 122 NC2 VSS38 156
PCH_3S_SMCLK 202 SCL DQ33 131M_B_DQ<33> 33
IN 125 NCTEST VSS39 161
53A8 44C8 42C8 41C8 PCH_3S_SMDATA 200 SDA DQ34 141M_B_DQ<34> 34
IN VSS40 162
DQ35 143M_B_DQ<35> 35
44C3 42C3 41C3 41B5 PM_EXTTS#1_R 198 EVENT# VSS41 167
48C1 M_ODT2 116 ODT0 DQ36 130M_B_DQ<36> 36
P0V75M_VREF OUT
IN 46A5 44C3 42C3 41C3 DDR3_DRAMRST# 30 RESET# VSS42 168
48C1 M_ODT3 120 ODT1 DQ37 132M_B_DQ<37> 37 OUT
IN VSS43 172
DQ38 140M_B_DQ<38> 38
VSS44 173
11 DM0 DQ39 142M_B_DQ<39> 39 ALL VREF TRACES SHOULD HAVE 10 MIL TRACE WIDTH 1 VREF_DQ VSS45 178
28 DM1 DQ40 147M_B_DQ<40> 40
46 DM2 DQ41 149M_B_DQ<41> 41
VSS47 184
157M_B_DQ<42>
1
63 DM3 DQ42 42
VSS48 185
136 DM4 DQ43 159M_B_DQ<43> 43
C4151 C4139 2 189
153 DM5 DQ44 146M_B_DQ<44> 44
VSS1 VSS49 P0V75S
3 VSS2 VSS50 190
170 148M_B_DQ<45> 45
DM6 DQ45
0.1UF_16V_2 P0V75M_VREF 8 195
187 DQ46 158M_B_DQ<46> 46 2.2UF_6.3V_3 VSS3 VSS51
DM7
9 VSS4 VSS52 196
160M_B_DQ<47>
2
DQ47 47
13 VSS5
48B1 44B8 M_B_DQS0_DP 12 DQS0 DQ48 163M_B_DQ<48> 48
IN 14 VSS6
IN 19 VSS7
IN 20 VSS8
M_B_DQS3_DP 177M_B_DQ<51>
1
48B1 44B8 64 DQS3 DQ51 51
IN 25
48B1 44B8
IN
M_B_DQS4_DP 137 DQS4 DQ52 164M_B_DQ<52> 52
C4140 C4141 26
VSS9
VSS10 VTT1 203 1.5A

B 48B1 44B8 M_B_DQS5_DP 154 DQS5 DQ53 166M_B_DQ<53> 53 B
IN 2.2UF_6.3V_3 0.1UF_16V_2 32 VSS12
IN 37 VSS13 G1 G1
M_B_DQS0_DN 10 181M_B_DQ<56>
2
48B1 44B8 DQS#0 DQ56 56
IN 38 VSS14 G2 G2
48B1 44B8 M_B_DQS1_DN 27 DQS#1 DQ57 183M_B_DQ<57> 57
IN 43 VSS15
IN
48B1 44B8 M_B_DQS3_DN 62 DQS#3 DQ59 193M_B_DQ<59> 59 JAE_MM80_204B1_H2R_R250_DT_204P
IN
IN
IN
IN
IN
JAE_MM80_204B1_H2R_R250_DT_204P
PLACE THESE CAPS CLOSE TO VTT1 AND VTT2
1
NOTE: P3V3S C4142 C4143 C4144 C4145
SO-DIMMB SPD ADDRESS IS 0XA4
SO-DIMMB TS ADDRESS IS 0X34
1
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2
2
R4107 R4106
A A
10K_5%_2 10K_5%_2
2
43C8 SA0_DIM2 SA1_DIM2 43C8

IN IN
1
R4105 R4108
10K_5%_2_DY 10K_5%_2_DY
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
M_B_A<15..0> M_B_DQ<63..0>
CHB DIMM3 TOP
48A1 43D8 43D5 48D4
BI BI
CN4201
0 M_B_A<0> 98 A0 DQ0 5 M_B_DQ<4> 4
1 M_B_A<1> 97 A1 DQ1 7 M_B_DQ<5> 5
2 M_B_A<2> 96 A2 DQ2 15 M_B_DQ<6> 6
3 M_B_A<3> 95 A3 DQ3 17 M_B_DQ<7> 7
4 M_B_A<4> 92 A4 DQ4 4 M_B_DQ<0> 0
5 M_B_A<5> 91 A5 DQ5 6 M_B_DQ<1> 1
6 M_B_A<6> 90 A6 DQ6 16 M_B_DQ<2> 2
7 M_B_A<7> 86 18 M_B_DQ<3> 3 LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN
D
A7 DQ7 P1V5
8 M_B_A<8> 89 A8 DQ8 21 M_B_DQ<12> 12
9 M_B_A<9> 85 23 M_B_DQ<13> 13 CN4201 D
A9 DQ9
75 VDD1 VSS16 44
10 M_B_A<10> 107 A10_AP DQ10 33 M_B_DQ<14> 14
1
76 VDD2 VSS17 48
11 M_B_A<11> 84 A11 DQ11 35 M_B_DQ<15> 15
C4225 C4226 C4227 81 VDD3 VSS18 49
12 M_B_A<12> 83 A12 DQ12 22 M_B_DQ<8> 8
82 VDD4 VSS19 54
13 M_B_A<13> 119 A13 DQ13 24 M_B_DQ<9> 9
87 VDD5 VSS20 55
14 M_B_A<14> 80 34 M_B_DQ<10> 10
A14 DQ14 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 88 VDD6 VSS21 60
15 M_B_A<15> 78 A15 DQ15 36 M_B_DQ<11> 11
93 61
2
VDD7 VSS22
DQ16 39 M_B_DQ<20> 20
94 VDD8 VSS23 65
48A4 43D8 M_B_BS0 109 BA0 DQ17 41 M_B_DQ<21> 21
IN 99 VDD9 VSS24 66
48A4 43D8 M_B_BS1 108 BA1 DQ18 51 M_B_DQ<22> 22
IN 100 VDD10 VSS25 71
M_B_BS2 M_B_DQ<23>
1
48A4 43C8 79 BA2 DQ19 53 23
IN 105 VDD11 VSS26 72
48C1 M_CS#6 114 S0# DQ20 40 M_B_DQ<16> 16 C4228 C4229 C4230
IN P3V3S 106 VDD12 VSS27 127
48C1 M_CS#7 121 S1# DQ21 42 M_B_DQ<17> 17
IN 111 VDD13 VSS28 128
IN 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
112 VDD14 VSS29 133
48D1 M_CLK_DDR6_DN 103 CK0# DQ23 52 M_B_DQ<19> 19
IN 117 VDD15 VSS30 134
M_CLK_DDR7_DP 102 57 M_B_DQ<28>
2
48C1 CK1 DQ24 28
IN 118 VDD16 VSS31 138
48C1 M_CLK_DDR7_DN 104 CK1# DQ25 59 M_B_DQ<29> 29
IN
1
123 VDD17 VSS32 139
48D1 M_CKE6 73 CKE0 DQ26 67 M_B_DQ<30> 30
IN 124 VDD18 VSS33 144
48C1 M_CKE7 74 CKE1 DQ27 69 M_B_DQ<31> 31 C4231 C4232
IN VSS34 145
48A4 43C8 M_B_CAS# 115 CAS# DQ28 56 M_B_DQ<24> 24
48A4 43C8 M_B_RAS# 110 RAS# DQ29 58 M_B_DQ<25> 25 2.2UF_6.3V_3 0.1UF_16V_2
IN VSS36 151
48A4 43C8 M_B_WE# 113 WE# DQ30 68 M_B_DQ<26> 26
IN 77 155
2
NC1 VSS37
C 44A7 SA0_DIM3 197 SA0 DQ31 70 M_B_DQ<27> 27 C
OUT 122 NC2 VSS38 156
44A6 SA1_DIM3 201 SA1 DQ32 129 M_B_DQ<36> 36
OUT 125 NCTEST VSS39 161
PCH_3S_SMCLK 202 SCL DQ33 131 M_B_DQ<37> 37
IN VSS40 162
53A8 43C8 42C8 41C8 PCH_3S_SMDATA 200 SDA DQ34 141 M_B_DQ<38> 38
DQ35 143 M_B_DQ<39> 39
P0V75M_VREF OUT
46A5 43C3 42C3 41C3 DDR3_DRAMRST# 30 RESET# VSS42 168
48C1 M_ODT6 116 ODT0 DQ36 130 M_B_DQ<32> 32 OUT
IN VSS43 172
48C1 M_ODT7 120 ODT1 DQ37 132 M_B_DQ<33> 33
IN VSS44 173
DQ38 140 M_B_DQ<34> 34 ALL VREF TRACES SHOULD HAVE 10 MIL TRACE WIDTH 1 VREF_DQ VSS45 178
11 DM0 DQ39 142 M_B_DQ<35> 35
28 DM1 DQ40 147 M_B_DQ<44> 44
VSS47 184
M_B_DQ<45>
1
46 DM2 DQ41 149 45
VSS48 185
63 DM3 DQ42 157 M_B_DQ<46> 46
C4233 C4234 2 VSS1 VSS49 189
136 DM4 DQ43 159 M_B_DQ<47> 47
3 VSS2 VSS50 190
153 146 M_B_DQ<40> 40
DM5 DQ44
0.1UF_16V_2 P0V75M_VREF 8 VSS51 195
170 DQ45 148 M_B_DQ<41> 41 2.2UF_6.3V_3 VSS3
DM6
9 VSS4 VSS52 196
187 158 M_B_DQ<42>
2
DM7 DQ46 42
13 VSS5
DQ47 160 M_B_DQ<43> 43
14 VSS6
48B1 43B8 M_B_DQS0_DP 12 DQS0 DQ48 163 M_B_DQ<52> 52
P0V75S
IN 19
48B1 43B8
IN
M_B_DQS1_DP 29 DQS1 DQ49 165 M_B_DQ<53> 53
20
VSS7
VSS8
1.5A
M_B_DQS2_DP M_B_DQ<54>
1
48B1 43B8 47 DQS2 DQ50 175 54
IN 25 VSS9
IN C4235 C4236 26 VSS10 VTT1 203
B IN 2.2UF_6.3V_3 0.1UF_16V_2 32 VSS12 B
IN 37 VSS13 G1 G1
M_B_DQS7_DP 188 176 M_B_DQ<51>
2
48B1 43B8 DQS7 DQ55 51
IN 38 VSS14 G2 G2
48B1 43B8 M_B_DQS0_DN 10 DQS#0 DQ56 181 M_B_DQ<60> 60
IN 43 VSS15
IN
48B1 43B8 M_B_DQS2_DN 45 DQS#2 DQ58 191 M_B_DQ<62> 62 FOX_AS0A621_U4RK_7H_204P
IN
IN
IN
IN
IN
IN
FOX_AS0A621_U4RK_7H_204P PLACE THESE CAPS CLOSE TO VTT1 AND VTT2
1
C4237 C4238 C4239 C4240
NOTE: P3V3S
SO-DIMMB SPD ADDRESS IS 0XA4
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2
SO-DIMMB TS ADDRESS IS 0X34
1
2
R4205 R4206
A 10K_5%_2_DY 10K_5%_2 A
2
44C8 SA0_DIM3 SA1_DIM3 44C8

IN IN
1
R4207 R4208
10K_5%_2 10K_5%_2_DY
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4300~4349(FAN)
REFERENCE 4411~4449(THERMAL ) P5V0S
PAD4300
P5V0S_FAN
1 2
1 2
POWERPAD_2_0610
1
22UF_6.3V_5_DY
1
4.7UF_6.3V_3
0.1UF_16V_2
C4301
C4302
C4307
2
2
D
P3V3S D
10K_5%_2
2 R4300
CN4300
1 1
2 2
FAN_TACH1 3 G1
21B6 3 G
IN
4 4 G G2
ACES_50228_00471_001_4P
1
P3V3S
CSC0402_DY
220PF_50V_2
C4300
C4305
2
1
C C
10K_5%_2
R4306
FAN CN
2
FAN1_PWM
21B6 IN
CSC0402_DY
C4306
2
B B
54B7 PVCORE_PG
IN
THRM_SHUTDWN# 15D8 45A8
P5V0AL OUT
1
1
P5V0AL R4414
0.1UF_16V_2
1
3
1
C4441
2M_5%_2
R4445 Q4411
26.7K_1%_2
R4442
D
2
100K_5%_2 1 G
2
S
C
2
U4441
2
Q4412
1
1 VCC TMSNS1 8 R4413 SSM3K7002BFU
PM_THRMTRIP#
C
1 2 B
2
57C1 46D5 IN B C4412
2 71 R4443 2
E
GND RHYST1 330_5%_2
1
100K_1%_NTC
MMBT4401
13.3K_1%_2
CSC0402_DY
R4444
E
45B1 15D8 THRM_SHUTDWN# 3 OT1 TMSNS2 6
OUT
2
4 OT2 RHYST2 5
P5V0AL
2
ENE_P2809A2_SOT23_8P
1
26.7K_1%_2
A A
R4446
2
1 R4447 2
1
100K_1%_NTC
13.3K_1%_2
R4448
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4500~4699(CPU) CN4500
CLOCKS
P1V8S
MISC
BCLK A28 CLK_DMI_PCH_DP 53B3
IN
46D8 H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_DMI_PCH_DN 53B3
OUT IN
P1V05S
2
TP4500
1 AN34 SKTOCC#
R4500 R4502 DPLL_REF_CLK A16 R4510 1 2 1K_5%_2

TP24
2.2K_5%_2 2.2K_5%_2_DY DPLL_REF_CLK# A15 R4511 1 2 1K_5%_2
CLK_IC_DP_PCH_DP
1
P1V05S TP4501
1 AL33 CATERR# CLK_IC_DP_PCH_DN
THERMAL
H_SNB_IVB# 1 R4501 2 NV_CLE TP24
46D5 OUT OUT 57B2
D 1K_5%_2
1
R4523 1 2 CLK_DP_PCH_DP D
DDR3
PLACE CLOSE TO CPT AND NVRAM CONNECTOR
H_PECI AN33 R8 CPU_DRAMRST# 0_5%_2_DY IN
57C2 21A6 OUT PECI SM_DRAMRST#
OUT R4524 1 2
0_5%_2_DY CLK_DP_PCH_DN
MISC
R4503 IN
62_5%_2
CPU_PROCHOT# 1 R4504 2 CPU_PROCHOT#_R

AL32 AK1SM_RCOMP0 R4512 1 2
2
21C3 11B7 OUT PROCHOT# SM_RCOMP[0] 140_1%_2
PROCESS STRAP SETTING A5 SM_RCOMP1
SM_RCOMP[1] R4513 1 2 25.5_1%_2
1
56_5%_2 A4 SM_RCOMP2
SM_RCOMP[2] R4514 1 2 200_1%_2
C4500
SANDY BRIDGE ONLY STUFF R4502 PM_THRMTRIP# AN32
CSC0402_DY 45A4 OUT THERMTRIP#
57C1
STUFF R4500/R4501
2
SANDY BRIDGE/IVY BRIDGE
PRDY# AP29 TP30 1 TP4502 H_PRDY#

OUT
PWR MANAGEMENT
PREQ# AP27 TP30 1 TP4503 H_PREQ# 46B2
IN
JTAG & BPM

P1V5S TCK AR26 TP30 1 TP4504 H_TCK 46B2
LOW IN C6/C7 IN
DMI&FDI TERMINATIONVOLTAGE TMS AR27 TP30 1 TP4505 H_TMS 46B2
IN
H_PM_SYNC TP30 H_TRST#
1
54A3 AM34 PM_SYNC TRST# AP30 1 TP4506 46B2
BI IN
NV_CLE SET TOVSS WHEN LOW(DEFAULT) R4505 TDI AR28 TP30 1 TP4507 H_TDI 46B2
IN
200_5%_2 TDO AP26 1 TP4508 H_TDO
TP30 OUT
C SET TOVCC WHEN HIGH 57C2 H_CPUPWRGDAP33 UNCOREPWRGOOD C
IN
2
R4506 DBR# AL35 TP30 1 TP4509 SYS_RESET# 54B8
OUT
54B7 PM_DRAM_PWRGD 1 2 PM_DRAM_PWRGD_R V8 SM_DRAMPWROK
IN
130_1%_2 AT28
BPM#[0]
BPM#[1] AR29 CAD NOTE: ALL DDR_COMP SIGNALS SHOULD BE ROUTED SUCH TAHT
R4507 BPM#[2] AR30 - MAX LENGTH = 500 MILS
56A7 34C6 32C6 27C7 PLT_RST# 1 2 AR33 RESET# BPM#[3] AT30 - TRACE WIDTH = 15MILS AND
IN
BPM#[4] AP32 - MB TRACE IMPEDANCE < 68 MOHMS
1.5K_5%_2 BPM#[5] AR31 (WORST CASE RESISTANCE)
1
BPM#[6] AT31
BPM#[7] AR32
R4509
R4508
10K_5%_2
750_1%_2 P1V05S
2
FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER 46C1 H_TMS R4516 1 2 51_5%_2
IN
46C1 H_TDI R4517 1 2 51_5%_2
IN
46C1 H_PREQ# R1418 1 2 51_5%_2_DY
IN
B B
46C1 H_TCK R4519 1 2 51_5%_2

S3 CIRCUIT: DRAM_RST# TO MEMORY SHOULD BE HIGH DURING S3 IN
46C1 H_TRST# R4520 1 2 51_5%_2
IN
P3V3A P1V5
1
R4602
R4601
1K_5%_2 1K_5%_2
2
R4603 DDR3_DRAMRST#
1 2 41C3 42C3 43C3
DRAMRST_CNTRL OUT
50D6 44C3
OUT 1K_5%_2
50D8
3
Q4600
D
DRAMRST_CNTRL_PCH R4600
53D3 1 2 1 G
IN
S
0_5%_2
A CPU_DRAMRST# A
SSM3K7002BFU
IN 46D2
1 2
1
C4620 R4604
0.047UF_16V_2
4.99K_1%_2
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V05S
REFERENCE 4500~4699(CPU) CAD NOTE: PEG_ICOMPI AND RCOMPO SIGNALS
SHOULD BE SHORTED AND ROUTED WITH
1
- MAX LENGTH = 500 MILS
R4522
- TYPICAL IMPEDANCE = 43 MOHMS
CN4500 24.9_1%_2
J22 P1V0S_VCCP_PEG_ICOMPI
2
PEG_ICOMPI
J21 PEG_ICOMPO SIGNALS SHOULD BE ROUTED WITH
PEG_ICOMPO
54D6 DMI_TX0_DN B27 DMI_RX#[0] PEG_RCOMPO H22 - MAX LENGTH = 500 MILS
OUT
54D6 DMI_TX1_DN B25 DMI_RX#[1]
OUT - TYPICAL IMPEDANCE = 14.5 MOHMS
54D6 DMI_TX2_DN A25 DMI_RX#[2]
OUT
54C6 DMI_TX3_DN B24 DMI_RX#[3] PEG_RX#[0] K33 PEG_C_RX0_DN 62B2
OUT IN
PEG_C_RX1_DN
DMI
PEG_RX#[1] M35 62B2
IN
D 54C6 DMI_TX0_DP B28 DMI_RX[0] PEG_RX#[2] L34 PEG_C_RX2_DN 62B2
OUT IN
54C6 DMI_TX1_DP B26 DMI_RX[1] PEG_RX#[3] J35 PEG_C_RX3_DN 62B2 D
OUT IN
54C6 DMI_TX2_DP A24 DMI_RX[2] PEG_RX#[4] J32 PEG_C_RX4_DN 62B2
OUT IN
54C6 DMI_TX3_DP B23 DMI_RX[3] PEG_RX#[5] H34 PEG_C_RX5_DN 62B2
OUT IN
PEG_RX#[6] H31 PEG_C_RX6_DN
IN 62B2 CLOSE TO CPU
54D6 DMI_RX0_DN G21 DMI_TX#[0] PEG_RX#[7] G33 PEG_C_RX7_DN 62B2
OUT IN
54D6 DMI_RX1_DN E22 DMI_TX#[1] PEG_RX#[8] G30 PEG_C_RX8_DN 62C2
OUT IN
54D6 DMI_RX2_DN F21 DMI_TX#[2] PEG_RX#[9] F35 PEG_C_RX9_DN 62C2 47C4 PEG_TX0_DN C4580 1 2
0.1UF_6.3V_1 PEG_C_TX0_DN 61D2
OUT IN IN OUT
54D6 DMI_RX3_DN D21 DMI_TX#[3] PEG_RX#[10] E34 PEG_C_RX10_DN 62C2
OUT IN 0.1UF_6.3V_1
PEG_RX#[11] E32 PEG_C_RX11_DN 62C2 47C4 PEG_TX1_DN C4581 1 2 PEG_C_TX1_DN 61D2
IN IN OUT
54D6 DMI_RX0_DP G22 D33 PEG_C_RX12_DN 62C2
PCI EXPRESS* - GRAPHICS

DMI_TX[0] PEG_RX#[12]
OUT IN
54D6 DMI_RX1_DP D22 DMI_TX[1] PEG_RX#[13] D31 PEG_C_RX13_DN 62D2 47C4 PEG_TX2_DN C4582 1 2
0.1UF_6.3V_1 PEG_C_TX2_DN 61D2
OUT IN IN OUT
54D6 DMI_RX2_DP F20 DMI_TX[2] PEG_RX#[14] B33 PEG_C_RX14_DN 62D2
OUT IN
54D6 DMI_RX3_DP C21 DMI_TX[3] PEG_RX#[15] C32 PEG_C_RX15_DN 62D2 47B4 PEG_TX3_DN C4583 1 2
0.1UF_6.3V_1 PEG_C_TX3_DN 61A5
OUT IN IN OUT
PEG_RX[0] J33 PEG_C_RX0_DP 62B2 47B4 PEG_TX4_DN C4584 1 2

IN IN OUT
PEG_RX[1] L35 PEG_C_RX1_DP 62B2
IN
PEG_RX[2] K34 PEG_C_RX2_DP 62B2 47B4 PEG_TX5_DN C4585 1 2
IN IN OUT
Intel(R) FDI
54D3 FDI_TX0_DN A21 FDI0_TX#[0] PEG_RX[3] H35 PEG_C_RX3_DP 62B2
OUT IN C4586
54D3 FDI_TX1_DN H19 FDI0_TX#[1] PEG_RX[4] H32 PEG_C_RX4_DP 62B2 47B4 PEG_TX6_DN 1 2 0.1UF_6.3V_1 PEG_C_TX6_DN 61A5
OUT IN IN OUT
54D3 FDI_TX2_DN E19 FDI0_TX#[2] PEG_RX[5] G34 PEG_C_RX5_DP 62B2
OUT IN
54D3 FDI_TX3_DN F18 FDI0_TX#[3] PEG_RX[6] G31 PEG_C_RX6_DP 62B2 47B4 PEG_TX7_DN C4587 1 2 0.1UF_6.3V_1 PEG_C_TX7_DN 61A5
OUT IN IN OUT
54D3 FDI_TX4_DN B21 FDI1_TX#[0] PEG_RX[7] F33 PEG_C_RX7_DP 62B2
OUT IN
54D3 FDI_TX5_DN C20 FDI1_TX#[1] PEG_RX[8] F30 PEG_C_RX8_DP 62C2 47B4 PEG_TX8_DN C4588 1 2 0.1UF_6.3V_1 PEG_C_TX8_DN 61B5
C OUT IN IN OUT C
54D3 FDI_TX6_DN D18 FDI1_TX#[2] PEG_RX[9] E35 PEG_C_RX9_DP 62C2
OUT IN
54D3 FDI_TX7_DN E17 FDI1_TX#[3] PEG_RX[10] E33 PEG_C_RX10_DP 62C2 47B4 PEG_TX9_DN C4589 1 2 0.1UF_6.3V_1 PEG_C_TX9_DN 61B5
OUT IN IN OUT
PEG_RX[11] F32 PEG_C_RX11_DP 62C2
IN
PEG_RX[12] D34 PEG_C_RX12_DP 62C2 47B4 PEG_TX10_DN C4590 1 2 0.1UF_6.3V_1 PEG_C_TX10_DN 61B5
IN IN OUT
54D3 FDI_TX0_DP A22 FDI0_TX[0] PEG_RX[13] E31 PEG_C_RX13_DP 62D2
OUT IN
54D3 FDI_TX1_DP G19 FDI0_TX[1] PEG_RX[14] C33 PEG_C_RX14_DP 62D2 47B4 PEG_TX11_DN C4591 1 2 0.1UF_6.3V_1 PEG_C_TX11_DN 61B5
OUT IN IN OUT
54D3 FDI_TX2_DP E20 FDI0_TX[2] PEG_RX[15] B32 PEG_C_RX15_DP 62D2
OUT IN
54D3 FDI_TX3_DP G18 FDI0_TX[3] 47B4 PEG_TX12_DN C4592 1 2 0.1UF_6.3V_1 PEG_C_TX12_DN 61B5
OUT IN OUT
54C3 FDI_TX4_DP B20 FDI1_TX[0] PEG_TX#[0] M29 PEG_TX0_DN 47D3
OUT OUT
54C3 FDI_TX5_DP C19 FDI1_TX[1] PEG_TX#[1] M32 PEG_TX1_DN 47D3 47B4 PEG_TX13_DN C4593 1 2 0.1UF_6.3V_1 PEG_C_TX13_DN 61B5
OUT OUT IN OUT
54C3 FDI_TX6_DP D19 FDI1_TX[2] PEG_TX#[2] M31 PEG_TX2_DN 47D3
OUT OUT
54C3 FDI_TX7_DP F17 FDI1_TX[3] PEG_TX#[3] L32 PEG_TX3_DN 47C3 47B4 PEG_TX14_DN C4594 1 2
0.1UF_6.3V_1 PEG_C_TX14_DN 61B5
OUT OUT IN OUT
PEG_TX#[4] L29 PEG_TX4_DN 47C3
OUT
54C3 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 PEG_TX5_DN 47C3 47B4 PEG_TX15_DN C4595 1 2
0.1UF_6.3V_1 PEG_C_TX15_DN 61B5
IN OUT IN OUT
54C3 FDI_FSYNC1 J17 FDI1_FSYNC PEG_TX#[6] K28 PEG_TX6_DN 47C3
IN OUT
PEG_TX#[7] J30 PEG_TX7_DN 47C3 47B4 PEG_TX0_DP C4596 1 2
0.1UF_6.3V_1 PEG_C_TX0_DP 61D2
P1V05S OUT IN OUT
54C3 FDI_INT H20 FDI_INT PEG_TX#[8] J28 PEG_TX8_DN 47C3
IN OUT
PEG_TX#[9] H29 PEG_TX9_DN 47C3 47B4 PEG_TX1_DP C4597 1 2
OUT IN OUT
PEG_TX10_DN
1
54C3 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#[10] G27 47C3

IN OUT
54C3 FDI_LSYNC1 H17 FDI1_LSYNC PEG_TX#[11] E29 PEG_TX11_DN 47C3 47B4 PEG_TX2_DP C4598 1 2
IN OUT IN OUT
R4521 PEG_TX#[12] F27 PEG_TX12_DN 47C3
OUT
24.9_1%_2 PEG_TX#[13] D28 PEG_TX13_DN 47C3 47B4 PEG_TX3_DP C4599 1 2
0.1UF_6.3V_1 PEG_C_TX3_DP 61A5
OUT IN OUT
B PEG_TX#[14] F26 PEG_TX14_DN 47B3 B
OUT
P1V0S_VCCP_EDP_COMPIO A18 E25 PEG_TX15_DN PEG_TX4_DP 1 2 PEG_C_TX4_DP
2
eDP_COMPIO PEG_TX#[15]
OUT 47B3 47B4
IN C4600 0.1UF_6.3V_1 OUT 61A5
A17 eDP_ICOMPO
36A7 CPU_EDP_HPD# B16 eDP_HDP# PEG_TX[0] M28 PEG_TX0_DP 47B3 47B4 PEG_TX5_DP C4601 1 2
IN OUT IN OUT
PEG_TX[1] M33 PEG_TX1_DP 47B3
OUT
PEG_TX[2] M30 PEG_TX2_DP 47B3 47B4 PEG_TX6_DP C4602 1 2
OUT IN OUT
eDP
36D8 CPU_EDP_AUX_DP C15 eDP_AUX PEG_TX[3] L31 PEG_TX3_DP 47B3

OUT OUT
36D8 CPU_EDP_AUX_DN D15 eDP_AUX# PEG_TX[4] L28 PEG_TX4_DP 47B3 47B4 PEG_TX7_DP C4603 1 2
OUT OUT IN OUT
PEG_TX[5] K30 PEG_TX5_DP 47B3
OUT
PEG_TX[6] K27 PEG_TX6_DP 47B3 47B4 PEG_TX8_DP C4604 1 2
OUT IN OUT
36D8 CPU_EDP_TX0_DP C17 eDP_TX[0] PEG_TX[7] J29 PEG_TX7_DP 47B3
OUT OUT
36D8 CPU_EDP_TX1_DP F16 eDP_TX[1] PEG_TX[8] J27 PEG_TX8_DP 47B3 47A4 PEG_TX9_DP C4605 1 2
0.1UF_6.3V_1 PEG_C_TX9_DP 61B5
OUT OUT IN OUT
C16 eDP_TX[2] PEG_TX[9] H28 PEG_TX9_DP 47B3
OUT
G15 eDP_TX[3] PEG_TX[10] G28 PEG_TX10_DP 47A3 47A4 PEG_TX10_DP C4606 1 2
0.1UF_6.3V_1 PEG_C_TX10_DP 61B5
OUT IN OUT
PEG_TX[11] E28 PEG_TX11_DP 47A3
CPU_EDP_TX0_DN OUT
36D8 C18 eDP_TX#[0] PEG_TX[12] F28 PEG_TX12_DP 47A3 47A4 PEG_TX11_DP C4607 1 2
0.1UF_6.3V_1 PEG_C_TX11_DP 61B5
OUT OUT IN OUT
36D8 CPU_EDP_TX1_DN E16 eDP_TX#[1] PEG_TX[13] D27 PEG_TX13_DP 47A3
OUT OUT
D16 eDP_TX#[2] PEG_TX[14] E26 PEG_TX14_DP 47A3 47A4 PEG_TX12_DP C4608 1 2
0.1UF_6.3V_1 PEG_C_TX12_DP 61B5
OUT IN OUT
F15 eDP_TX#[3] PEG_TX[15] D25 PEG_TX15_DP 47A3
OUT
47A4 PEG_TX13_DP C4609 1 2
0.1UF_6.3V_1 PEG_C_TX13_DP 61B5
IN OUT
47A4 PEG_TX14_DP C4610 1 2

0.1UF_6.3V_1 PEG_C_TX14_DP 61B5
IN OUT
FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER 47A4 PEG_TX15_DP C4611 1 2

0.1UF_6.3V_1 PEG_C_TX15_DP 61B5
IN OUT
A A
CAD NOTE: DP_COMPIO AND ICOMPO SIGNALS

SHOULD BE SHORTED NEAR BALLS AND ROUTED WITH
- TYPICAL IMPEDANCE < 25 MOHMS
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4500~4699(CPU)
SOCKET,CPU,989P,TIN,3.0MM,STR,SMD,TR
CN4500
M_B_DQ<63..0> CN4500
M_A_DQ<63..0> 44D5 43D5 BI
42D5 41D5
BI SB_CLK[0] AE2 M_CLK_DDR2_DP 43C8
OUT
SB_CLK#[0] AD2 M_CLK_DDR2_DN 43C8
SA_CLK[0] AB6 M_CLK_DDR0_DP 41C8 OUT
OUT 0 M_B_DQ<0> C9 SB_DQ[0] SB_CKE[0] R9 M_CKE2 43C8
SA_CLK#[0] AA6 M_CLK_DDR0_DN 41C8 OUT
OUT 1 M_B_DQ<1> A7 SB_DQ[1]
0 M_A_DQ<0> C5 SA_DQ[0] SA_CKE[0] V9 M_CKE0 41C8
D OUT 2 M_B_DQ<2>D10 SB_DQ[2]
1 M_A_DQ<1> D5 SA_DQ[1]
3 M_B_DQ<3> C8 SB_DQ[3] D
2 M_A_DQ<2> D3 SA_DQ[2]
4 M_B_DQ<4> A9 SB_DQ[4] SB_CLK[1] AE1 M_CLK_DDR3_DP 43C8
3 M_A_DQ<3> D2 SA_DQ[3] OUT
5 M_B_DQ<5> A8 SB_DQ[5] SB_CLK#[1] AD1 M_CLK_DDR3_DN 43C8
4 M_A_DQ<4> D6 SA_DQ[4] SA_CLK[1] AA5 M_CLK_DDR1_DP 41C8 OUT
OUT 6 M_B_DQ<6> D9 SB_DQ[6] SB_CKE[1] R10 M_CKE3 43C8
5 M_A_DQ<5> C6 SA_DQ[5] SA_CLK#[1] AB5 M_CLK_DDR1_DN 41C8 OUT
OUT 7 M_B_DQ<7> D8 SB_DQ[7]
6 M_A_DQ<6> C2 SA_DQ[6] SA_CKE[1] V10 M_CKE1 41C8
OUT 8 M_B_DQ<8> G4 SB_DQ[8]
7 M_A_DQ<7> C3 SA_DQ[7]
9 M_B_DQ<9> F4
DDR SYSTEM MEMORY B

SB_DQ[9]
8 M_A_DQ<8> F10 SA_DQ[8]
10 M_B_DQ<10> F1 SB_DQ[10] RSVD_TP[11] AB2 M_CLK_DDR6_DP 44C8
9 M_A_DQ<9> F8 SA_DQ[9] OUT
11 M_B_DQ<11> G1 AA2 M_CLK_DDR6_DN
DDR SYSTEM MEMORY A

M_CLK_DDR4_DP SB_DQ[11] RSVD_TP[12]
OUT 44C8
10 M_A_DQ<10> G10 SA_DQ[10] RSVD_TP[1] AB4 42C8
OUT 12 M_B_DQ<12> G5 SB_DQ[12] RSVD_TP[13] T9 M_CKE6 44C8
11 M_A_DQ<11> G9 SA_DQ[11] RSVD_TP[2] AA4 M_CLK_DDR4_DN 42C8 OUT
OUT 13 M_B_DQ<13> F5 SB_DQ[13]
12 M_A_DQ<12> F9 SA_DQ[12] RSVD_TP[3] W9 M_CKE4 42C8
OUT 14 M_B_DQ<14> F2 SB_DQ[14]
13 M_A_DQ<13> F7 SA_DQ[13]
15 M_B_DQ<15> G2 SB_DQ[15]
14 M_A_DQ<14> G8 SA_DQ[14]
16 M_B_DQ<16> J7 SB_DQ[16] RSVD_TP[14] AA1 M_CLK_DDR7_DP 44C8
15 M_A_DQ<15> G7 SA_DQ[15] OUT
17 M_B_DQ<17> J8 SB_DQ[17] RSVD_TP[15] AB1 M_CLK_DDR7_DN 44C8
16 M_A_DQ<16> K4 SA_DQ[16] RSVD_TP[4] AB3 M_CLK_DDR5_DP 42C8 OUT
OUT 18 M_B_DQ<18>
K10 SB_DQ[18] RSVD_TP[16] T10 M_CKE7 44C8
17 M_A_DQ<17> K5 SA_DQ[17] RSVD_TP[5] AA3 M_CLK_DDR5_DN 42C8 OUT
OUT 19 M_B_DQ<19> K9 SB_DQ[19]
18 M_A_DQ<18> K1 SA_DQ[18] RSVD_TP[6] W10 M_CKE5 42C8
OUT 20 M_B_DQ<20> J9 SB_DQ[20]
19 M_A_DQ<19> J1 SA_DQ[19]
21 M_B_DQ<21>
J10 SB_DQ[21]
20 M_A_DQ<20> J5 SA_DQ[20]
22 M_B_DQ<22> K8 SB_DQ[22] SB_CS#[0] AD3 M_CS#2 43C8
21 M_A_DQ<21> J4 SA_DQ[21] OUT
23 M_B_DQ<23> K7 SB_DQ[23] SB_CS#[1] AE3 M_CS#3 43C8
22 M_A_DQ<22> J2 SA_DQ[22] SA_CS#[0] AK3 M_CS#0 41D8 OUT
OUT 24 M_B_DQ<24> M5 SB_DQ[24] RSVD_TP[17] AD6 M_CS#6 44C8
23 M_A_DQ<23> K2 SA_DQ[23] SA_CS#[1] AL3 M_CS#1 41C8 OUT
OUT 25 M_B_DQ<25> N4 SB_DQ[25] RSVD_TP[18] AE6 M_CS#7 44C8
C 24 M_A_DQ<24> M8 SA_DQ[24] RSVD_TP[7] AG1 M_CS#4 42D8 OUT C
OUT 26 M_B_DQ<26> N2 SB_DQ[26]
25 M_A_DQ<25> N10 SA_DQ[25] RSVD_TP[8] AH1 M_CS#5 42C8
OUT 27 M_B_DQ<27> N1 SB_DQ[27]
26 M_A_DQ<26> N8 SA_DQ[26]
28 M_B_DQ<28> M4 SB_DQ[28]
27 M_A_DQ<27> N7 SA_DQ[27]
29 M_B_DQ<29> N5 SB_DQ[29] SB_ODT[0] AE4 M_ODT2 43C8
28 M_A_DQ<28> M10 SA_DQ[28] OUT
30 M_B_DQ<30> M2 SB_DQ[30] SB_ODT[1] AD4 M_ODT3 43C8
29 M_A_DQ<29> M9 SA_DQ[29] SA_ODT[0] AH3 M_ODT0 41C8 OUT
OUT 31 M_B_DQ<31> M1 SB_DQ[31] RSVD_TP[19] AD5 M_ODT6 44C8
30 M_A_DQ<30> N9 SA_DQ[30] SA_ODT[1] AG3 M_ODT1 41C8 OUT
OUT 32 M_B_DQ<32>
AM5 SB_DQ[32] RSVD_TP[20] AE5 M_ODT7 44C8
31 M_A_DQ<31> M7 SA_DQ[31] RSVD_TP[9] AG2 M_ODT4 42C8 OUT
OUT 33 M_B_DQ<33>
AM6 SB_DQ[33]
32 M_A_DQ<32> AG6 SA_DQ[32] RSVD_TP[10] AH2 M_ODT5 42C8
OUT 34 M_B_DQ<34>
AR3 SB_DQ[34]
33 M_A_DQ<33> AG5 SA_DQ[33]
35 M_B_DQ<35>
AP3 SB_DQ[35]
34 M_A_DQ<34> AK6 SA_DQ[34]
36 M_B_DQ<36>
AN3 SB_DQ[36]
35 M_A_DQ<35> AK5 SA_DQ[35]
37 M_B_DQ<37>
AN2 SB_DQ[37] SB_DQS#[0] D7 M_B_DQS0_DN 43B8 44B8
36 M_A_DQ<36> AH5 SA_DQ[36] OUT
38 M_B_DQ<38>
AN1 SB_DQ[38] SB_DQS#[1] F3 M_B_DQS1_DN 43B8 44B8
37 M_A_DQ<37> AH6 SA_DQ[37] SA_DQS#[0] C4 M_A_DQS0_DN 41B8 42B8 OUT
OUT 39 M_B_DQ<39>
AP2 SB_DQ[39] SB_DQS#[2] K6 M_B_DQS2_DN 43B8 44B8
38 M_A_DQ<38> AJ5 SA_DQ[38] SA_DQS#[1] G6 M_A_DQS1_DN 41B8 42B8 OUT
OUT 40 M_B_DQ<40>
AP5 SB_DQ[40] SB_DQS#[3] N3 M_B_DQS3_DN 43B8 44B8
39 M_A_DQ<39> AJ6 SA_DQ[39] SA_DQS#[2] J3 M_A_DQS2_DN 41B8 42B8 OUT
OUT 41 M_B_DQ<41>
AN9 SB_DQ[41] SB_DQS#[4] AN5 M_B_DQS4_DN 43B8 44B8
40 M_A_DQ<40> AJ8 SA_DQ[40] SA_DQS#[3] M6 M_A_DQS3_DN 41B8 42B8 OUT
OUT 42 M_B_DQ<42>
AT5 SB_DQ[42] SB_DQS#[5] AP9 M_B_DQS5_DN 43B8 44B8
41 M_A_DQ<41> AK8 SA_DQ[41] SA_DQS#[4] AL6 M_A_DQS4_DN 41B8 42B8 OUT
OUT 43 M_B_DQ<43>
AT6 SB_DQ[43] SB_DQS#[6] AK12 M_B_DQS6_DN 43B8 44B8
42 M_A_DQ<42> AJ9 SA_DQ[42] SA_DQS#[5] AM8 M_A_DQS5_DN 41B8 42B8 OUT
OUT 44 M_B_DQ<44>
AP6 SB_DQ[44] SB_DQS#[7] AP15 M_B_DQS7_DN 43B8 44B8
43 M_A_DQ<43> AK9 SA_DQ[43] SA_DQS#[6] AR12M_A_DQS6_DN 41B8 42B8 OUT
OUT 45 M_B_DQ<45>
AN8 SB_DQ[45]
44 M_A_DQ<44> AH8 SA_DQ[44] SA_DQS#[7] AM15M_A_DQS7_DN 41B8 42B8
OUT 46 M_B_DQ<46>
AR6 SB_DQ[46]
45 M_A_DQ<45> AH9 SA_DQ[45]
47 M_B_DQ<47>
AR5 SB_DQ[47]
46 M_A_DQ<46> AL9 SA_DQ[46]
B 48 M_B_DQ<48>
AR9 SB_DQ[48] B
47 M_A_DQ<47> AL8 SA_DQ[47]
49 M_B_DQ<49>
AJ11 SB_DQ[49] SB_DQS[0] C7 M_B_DQS0_DP 43B8 44B8
48 M_A_DQ<48> AP11 SA_DQ[48] OUT
50 M_B_DQ<50>
AT8 SB_DQ[50] SB_DQS[1] G3 M_B_DQS1_DP 43B8 44B8
49 M_A_DQ<49> AN11 SA_DQ[49] SA_DQS[0] D4 M_A_DQS0_DP 41B8 42B8 OUT
OUT 51 M_B_DQ<51>
AT9 SB_DQ[51] SB_DQS[2] J6 M_B_DQS2_DP 43B8 44B8
50 M_A_DQ<50> AL12 SA_DQ[50] SA_DQS[1] F6 M_A_DQS1_DP 41B8 42B8 OUT
OUT 52 M_B_DQ<52>
AH11 SB_DQ[52] SB_DQS[3] M3 M_B_DQS3_DP 43B8 44B8
51 M_A_DQ<51> AM12 SA_DQ[51] SA_DQS[2] K3 M_A_DQS2_DP 41B8 42B8 OUT
OUT 53 M_B_DQ<53>
AR8 SB_DQ[53] SB_DQS[4] AN6 M_B_DQS4_DP 43B8 44B8
52 M_A_DQ<52> AM11 SA_DQ[52] SA_DQS[3] N6 M_A_DQS3_DP 41B8 42B8 OUT
OUT 54 M_B_DQ<54>
AJ12 SB_DQ[54] SB_DQS[5] AP8 M_B_DQS5_DP 43B8 44B8
53 M_A_DQ<53> AL11 SA_DQ[53] SA_DQS[4] AL5 M_A_DQS4_DP 41B8 42B8 OUT
OUT 55 M_B_DQ<55>
AH12 SB_DQ[55] SB_DQS[6] AK11 M_B_DQS6_DP 43B8 44B8
54 M_A_DQ<54> AP12 SA_DQ[54] SA_DQS[5] AM9 M_A_DQS5_DP 41B8 42B8 OUT
OUT 56 M_B_DQ<56>
AT11 SB_DQ[56] SB_DQS[7] AP14 M_B_DQS7_DP 43B8 44B8
55 M_A_DQ<55> AN12 SA_DQ[55] SA_DQS[6] AR11M_A_DQS6_DP 41B8 42B8 OUT
OUT 57 M_B_DQ<57>
AN14 SB_DQ[57]
56 M_A_DQ<56> AJ14 SA_DQ[56] SA_DQS[7] AM14M_A_DQS7_DP 41B8 42B8
OUT 58 M_B_DQ<58>
AR14 SB_DQ[58]
57 M_A_DQ<57> AH14 SA_DQ[57]
59 M_B_DQ<59>
AT14 SB_DQ[59]
58 M_A_DQ<58> AL15 SA_DQ[58]
60 M_B_DQ<60>
AT12 SB_DQ[60] M_B_A<15..0>
59 M_A_DQ<59> AK15 SA_DQ[59] OUT
M_A_A<15..0> 41D8 42D8 61 M_B_DQ<61>
AN15 SB_DQ[61] SB_MA[0] AA8 M_B_A<0> 0
60 M_A_DQ<60> AL14 SA_DQ[60] OUT
62 M_B_DQ<62>
AR15 SB_DQ[62] SB_MA[1] T7 M_B_A<1> 1
61 M_A_DQ<61> AK14 SA_DQ[61] SA_MA[0] AD10 M_A_A<0> 0
63 M_B_DQ<63>
AT15 SB_DQ[63] SB_MA[2] R7 M_B_A<2> 2
62 M_A_DQ<62> AJ15 SA_DQ[62] SA_MA[1] W1 M_A_A<1> 1
SB_MA[3] T6 M_B_A<3> 3
63 M_A_DQ<63> AH15 SA_DQ[63] SA_MA[2] W2 M_A_A<2> 2
SB_MA[4] T2 M_B_A<4> 4
SA_MA[3] W7 M_A_A<3> 3
SB_MA[5] T4 M_B_A<5> 5
SA_MA[4] V3 M_A_A<4> 4
SB_MA[6] T3 M_B_A<6> 6
SA_MA[5] V2 M_A_A<5> 5
44D8 43D8 M_B_BS0 AA9 SB_BS[0] SB_MA[7] R2 M_B_A<7> 7
SA_MA[6] W3 M_A_A<6> 6 OUT
44D8 43D8 M_B_BS1 AA7 SB_BS[1] SB_MA[8] T5 M_B_A<8> 8
42D8 41D8 M_A_BS0 AE10 SA_BS[0] SA_MA[7] W6 M_A_A<7> 7 OUT
OUT 44C8 43C8 M_B_BS2 R6 SB_BS[2] SB_MA[9] R3 M_B_A<9> 9
42D8 41D8 M_A_BS1 AF10 SA_BS[1] SA_MA[8] V1 M_A_A<8> 8 OUT
OUT SB_MA[10] AB7 M_B_A<10> 10
42D8 41D8 M_A_BS2 V6 SA_BS[2] SA_MA[9] W5 M_A_A<9> 9
A OUT SB_MA[11] R1 M_B_A<11> 11 A
SA_MA[10] AD8 M_A_A<10> 10
SB_MA[12] T1 M_B_A<12> 12
SA_MA[11] V4 M_A_A<11> 11
44C8 43C8 M_B_CAS#AA10 SB_CAS# SB_MA[13] AB10 M_B_A<13> 13
SA_MA[12] W4 M_A_A<12> 12 OUT
44C8 43C8 M_B_RAS# AB8 SB_RAS# SB_MA[14] R5 M_B_A<14> 14
42C8 41C8 M_A_CAS# AE8 SA_CAS# SA_MA[13] AF8 M_A_A<13> 13 OUT
OUT 44C8 43C8 M_B_WE# AB9 SB_WE# SB_MA[15] R4 M_B_A<15> 15
42C8 41C8 M_A_RAS# AD9 SA_RAS# SA_MA[14] V5 M_A_A<14> 14 OUT
OUT
42C8 41C8 M_A_WE# AF9 SA_WE# SA_MA[15] V7 M_A_A<15> 15
OUT FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER
FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4500~4699(CPU)
PVCORE CN4500 P1V05S
AG35 VCC1
AG34 VCC2
POWER VCCIO1 AH13
1
AG33 VCC3 VCCIO2 AH10
AG32 VCC4 VCCIO3 AG10
1
C4510 C4511 C4512 C4513 AG31 VCC5 VCCIO4 AC10
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 AG30 Y10
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
C4531
C4533
C4534
C4535
C4536
C4537
VCC6 VCCIO5
C4542
C4541
C4540
C4532
AG29 VCC7 VCCIO6 U10
AG28 P10
2
VCC8 VCCIO7
AG27 VCC9 VCCIO8 L10
2
AG26 VCC10 VCCIO9 J14
AF35 VCC11 VCCIO10 J13
D AF34 J12
VCC12 VCCIO11
AF33 J11 D
VCC13 VCCIO12
AF32 VCC14 VCCIO13 H14
AF31 VCC15 VCCIO14 H12
AF30 H11
PEG AND DDR

VCC16 VCCIO15
1
1
AF29 VCC17 VCCIO16 G14
AF28 VCC18 VCCIO17 G13
C4514 C4515 C4516 C4517 AF27 G12
VCC19 VCCIO18
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 AF26 F14
VCC20 VCCIO19
AD35 VCC21 VCCIO20 F13
2
2
AD32 VCC24 VCCIO23 E14
AD30 VCC26
AD28 VCC28 VCCIO26 D14
AC35 VCC31 VCCIO29 D11
1
1
AC34 VCC32 VCCIO30 C14
AC33 VCC33 VCCIO31 C13
C4518 C4519 C4520 C4521 AC32 C12
VCC34 VCCIO32
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 AC31 C11
C VCC35 VCCIO33 C
AC30 VCC36 VCCIO34 B14
2
2
AC29 VCC37 VCCIO35 B12
AC28 VCC38 VCCIO36 A14
AA35 VCC41 VCCIO39 A11
AA34 VCC42
AA33 VCC43 VCCIO40 J23
AA32 VCC44
AA31 VCC45
P1V05S
1
AA30 VCC46
C4522 C4523 C4524 C4525

AA29 VCC47 PLACE CLOSE TO CPU
AA28
CORE SUPPLY
VCC48
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 AA27 VCC49
1
AA26 VCC50
2
Y35 VCC51
Y34 R4528 R4527
VCC52
Y33
130_1%_2 75_5%_2
VCC53
Y32 VCC54
2
Y31 VCC55
Y30 VCC56
Y29 VCC57
B Y28 B
Y27
VCC58
VCC59
SVID SIGNAL TO VR
Y26
SVID
VCC60
V35 VCC61 VIDALERT# AJ29 H_CPU_SVIDALRT# R4529 1 243_5%_2 VR_SVID_ALERT# 11C7
OUT
V34 VCC62 VIDSCLK AJ30 H_CPU_SVIDCLK R4530 1 2 0_5%_2 VR_SVID_CLK 11A3 11C7
OUT
V33 VCC63 VIDSOUT AJ28 H_CPU_SVIDDAT R4531 1 2 0_5%_2 VR_SVID_DATA 11A3 11C7
OUT
V32 VCC64
V31 VCC65
V30 VCC66 PVCORE
V29 VCC67
V28 VCC68
1
V27 VCC69
V26 VCC70
U35 R4532
VCC71
U34
100_1%_2
VCC72
U33 VCC73
VCCSENSE
2
OUT 11D6
U32 VCC74
VSSSENSE 11D6
U31 VCC75 OUT
1
U30 VCC76
U29 VCC77
U28 R4533
VCC78
U27
100_1%_2
VCC79
U26 VCC80
2
R35 VCC81
A R34 A
VCC82
R33 VCC83
R32 VCC84
R31 VCC85
P1V05S
SENSE LINES
R30 VCC86
R29 VCC87
1
R28 VCC88 VCC_SENSE AJ35
R27 VCC89 VSS_SENSE AJ34
R26 R4534
VCC90
P35
10_1%_2
VCC91
P34 VCC92
INVENTEC
2
P33 VCC93 VCCIO_SENSE B10 VCC_SENSE_VCCIO 9B7
OUT
P32 VCC94 VSS_SENSE_VCCIO A10 VSS_SENSE_VCCIO 9B7
OUT
1
P31 VCC95
TITLE
P30 VCC96 MODEL,PROJECT,FUNCTION
P29 R4535 Block Diagram
VCC97
P28
10_1%_2
VCC98 DOC.NUMBER REV
P27 SIZE CODE
VCC99 1310xxxxx-0-0 X01
2
A3 CS
P26 VCC100
XXX 21-OCT-2002
FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PROCESSOR DRIVEN VREF PATH WAS STUFFED BY DEFAULT:
ROUTE WITH MIN. TRACE WIDTH OF 10 MILS

P0V75M_VREF P0V75M_VREF_H
P0V75M_VREF
P0V75M_VREF
50C3 CPUDDR_WR_VREF2 2 3
50C3 CPUDDR_WR_VREF1 2 3 IN S D 3 2
IN S D D S
Q4502
Q4501
1
AM2302N
G
AM2302N
Q4500
1
1
1
DRAMRST_CNTRL AM2302N R4541
50D8 46A8 IN
DRAMRST_CNTRL 100K_5%_2
D 50D6 46A8 IN
2
D
R4538
65B8 54B2 21D6 14D2 14B8 0_5%_2

PVAXG 14A6 SLP_S3#_3R 1 2
IN
14B4
1
1
CN4500
PVAXG FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER R4539
10_1%_2
C4578
POWER
2
AT24 AK35 GFX_VCC_SENSE 470PF_50V_2
2
VAXG1 VAXG_SENSE 11B8
OUT
AT23 VAXG2 VSSAXG_SENSE AK34 GFX_VSS_SENSE 11B8
OUT
SENSE
AT21 VAXG3
LINES
1
1
AT20 VAXG4
AT18 VAXG5
AT17 R4540
VAXG6
C4651 C4545 C4546 C4547 C4548 C4549 C4550 AR24 VAXG7 10_1%_2
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5 AR23 VAXG8
AR21
2
2
VREF
VAXG9
AR20 VAXG10
P0V75M_VREF_H
AR18 VAXG11
AR17 VAXG12
C AP24 AL1 C
VAXG13 SM_VREF
AP23 VAXG14
AP21 VAXG15
AP20 VAXG16 SA_DIMM_VREFDQ B4 CPUDDR_WR_VREF1 50D8
IN
AP18 VAXG17 SB_DIMM_VREFDQ D1 CPUDDR_WR_VREF2 50D6
IN
AP17 VAXG18
AN24 VAXG19
AN23 VAXG20 NOTE : DDR_WR_VREF SHOULD HAVE 20/20 MIL WHEREVER POSSIBLE
AN21 VAXG21
AN20 VAXG22
P1V5S
GRAPHICS
AN18 VAXG23
AN17 VAXG24
AM24 AF7 5A
VAXG25 VDDQ1
AM23 VAXG26 VDDQ2 AF4
1
AM21 AF1
DDR3 -1.5V RAILS

VAXG27 VDDQ3
AM20 VAXG28 VDDQ4 AC7
+
AL24 Y7 C4567 C4568 C4569 C4570 C4571 C4572 C4573
VAXG31 VDDQ7
AL23 Y4 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3 220UF_2.5V
2
VAXG32 VDDQ8
AL21 VAXG33 VDDQ9 Y1
AL20 VAXG34 VDDQ10 U7
B AL18 VAXG35 VDDQ11 U4 B
AL17 VAXG36 VDDQ12 U1
AK24 VAXG37 VDDQ13 P7
AK20 VAXG40
AK18 VAXG41
AK17 VAXG42
AJ24 VAXG43
AJ23 VAXG44
AJ21 VAXG45
AJ20 VAXG46
AJ18 VAXG47
AJ17 VAXG48
PVSA
SA RAIL
AH24 VAXG49
AH23 VAXG50
AH21 VAXG51 VCCSA1 M27
1
AH20 VAXG52 VCCSA2 M26
1
AH18 VAXG53 VCCSA3 L26
AH17 J26
+
VAXG54 VCCSA4
J25 C4577
VCCSA5 C4574 C4575 C4576
J24 100UF_6.3V
VCCSA6 PVSA 10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3
H26
2
VCCSA7
2
VCCSA8 H25
1
A A
R4544
P1V8S 100_5%_2
1.8V RAIL
L4500
MISC
1.2A
2
1 2 P1V8S_VCCPLL B6 VCCPLL1 VCCSA_SENSE H23 VCCSA_SENSE 10C4
OUT
A6 VCCPLL2
MPZ1608S221AT
1
A2 VCCPLL3
VCCSA_VID[0] C22 VCCSA_VID0 10B4

OUT
VCCSA_VID1
C4562 C4563 C4564
C4565
22UF_6.3V_5
VCCSA_VID[1]
VCCIO_SEL
C24
A19 VCCIO_SEL
OUT
OUT
10B4
9C7 INVENTEC
1
1
10UF_6.3V_3 1UF_6.3V_2 1UF_6.3V_2
2
R4556
R4547
R4547 TITLE
R4555
10K_5%_2_DY 1K_5%_2 1K_5%_2 SNB:0 OHM Block Diagram
2
2
IVB:1K OHM DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CN4500 CN4500 CN4500
T35 VSS161 VSS234 F22 RSVD28 L7

AT35 VSS1 VSS81 AJ22 T34 VSS162 VSS235 F19 RSVD29 AG7
AT32 VSS2 VSS82 AJ19 T33 VSS163 VSS236 E30 CFG<0> AK28 CFG[0] RSVD30 AE7
OUT
AT29 VSS3 VSS83 AJ16 T32 VSS164 VSS237 E27 CFG<1> AK29 CFG[1] RSVD31 AK2
OUT
AT27 VSS4 VSS84 AJ13 T31 VSS165 VSS238 E24 51A6 CFG<2> AL26 CFG[2] RSVD32 W8
OUT
AT25 VSS5 VSS85 AJ10 T30 VSS166 VSS239 E21 CFG<3> AL27 CFG[3]
OUT
AT22 VSS6 VSS86 AJ7 T29 VSS167 VSS240 E18 51A6 CFG<4> AK26 CFG[4]
OUT
AT19 VSS7 VSS87 AJ4 T28 VSS168 VSS241 E15 51A6 CFG<5> AL29 CFG[5] RSVD33 AT26
OUT
AT16 VSS8 VSS88 AJ3 T27 VSS169 VSS242 E13 51A6 CFG<6> AL30 CFG[6] RSVD34 AM33
OUT
AT13 VSS9 VSS89 AJ2 T26 VSS170 VSS243 E10 51A6 CFG<7> AM31 CFG[7] RSVD35 AJ27
OUT
AT10 VSS10 VSS90 AJ1 P9 VSS171 VSS244 E9 CFG<8> AM32 CFG[8]
OUT
AT7 VSS11 VSS91 AH35 P8 VSS172 VSS245 E8 CFG<9> AM30 CFG[9] VCC_DIE_SENSE AH27
OUT
AT4 VSS12 VSS92 AH34 P6 VSS173 VSS246 E7 CFG<10> AM28 CFG[10] VSS_DIE_SENSE AH26
OUT
AT3 VSS13 VSS93 AH32 P5 VSS174 VSS247 E6 CFG<11> AM26 CFG[11]
OUT
AR25 VSS14 VSS94 AH30 P3 VSS175 VSS248 E5 CFG<12> AN28 CFG[12]
D OUT
AR22 VSS15 VSS95 AH29 P2 VSS176 VSS249 E4 CFG<13> AN31 CFG[13] RSVD37 T8
OUT D
AR19 VSS16 VSS96 AH28 N35 VSS177 VSS250 E3 CFG<14> AN26 CFG[14] RSVD38 J16
OUT
AR16 VSS17 N34 VSS178 VSS251 E2 CFG<15> AM27 CFG[15] RSVD39 H16
OUT
AR13 VSS18 VSS98 AH25 N33 VSS179 VSS252 E1 CFG<16> AK31 CFG[16] RSVD40 G16
OUT
AR10 VSS19 VSS99 AH22 N32 VSS180 VSS253 D35 CFG<17> AN29 CFG[17]
OUT
AR7 VSS20 VSS100 AH19 N31 VSS181 VSS254 D32
RESERVED
AP34 VSS23 VSS103 AH4 N28 VSS184 VSS257 D20 RSVD_NCTF1 AR35
AP31 VSS24 VSS104 AG9 N27 VSS185 VSS258 D17 AJ31 VAXG_VAL_SENSE RSVD_NCTF2 AT34
AP28 VSS25 VSS105 AG8 N26 VSS186 VSS259 C34 AH31 VSSAXG_VAL_SENSE RSVD_NCTF3 AT33
AP25 VSS26 VSS106 AG4 M34 VSS187 VSS260 C31 AJ33 VCC_VAL_SENSE RSVD_NCTF4 AP35
AP22 VSS27 VSS107 AF6 L33 VSS188 VSS261 C28 AH33 VSS_VAL_SENSE RSVD_NCTF5 AR34
AP19 VSS28 VSS108 AF5 L30 VSS189 VSS262 C27
AP16 VSS29 VSS109 AF3 L27 VSS190 VSS263 C25
AP13 VSS30 VSS110 AF2 L9 VSS191 VSS264 C23 AJ26 RSVD5
AP10 VSS31 VSS111 AE35 L8 VSS192 VSS265 C10
AP7 AE34 L6 C1
AP4
VSS32
VSS33
VSS112
VSS113 AE33 L5
VSS193
VSS194
VSS VSS266
VSS267 B22 RSVD_NCTF6 B34

AP1 VSS34 VSS114 AE32 L4 VSS195 VSS268 B19 RSVD_NCTF7 A33
AN30 AE31 L3 B17 A34
AN27
VSS35
VSS36
VSS VSS115
VSS116 AE30 L2
VSS196
VSS197
VSS269
VSS270 B15
RSVD_NCTF8
RSVD_NCTF9 B35
AN25 VSS37 VSS117 AE29 L1 VSS198 VSS271 B13 RSVD_NCTF10 C35
C AN22 VSS38 VSS118 AE28 K35 VSS199 VSS272 B11 C
AN19 VSS39 VSS119 AE27 K32 VSS200 VSS273 B9 F25 RSVD8
AN10 VSS42 VSS122 AD7 J34 VSS203 VSS276 B5 D24 RSVD11 RSVD51 AJ32
AN7 VSS43 VSS123 AC9 J31 VSS204 VSS277 B3 G25 RSVD12 RSVD52 AK32
AN4 VSS44 VSS124 AC8 H33 VSS205 VSS278 B2 G24 RSVD13
AM29 VSS45 VSS125 AC6 H30 VSS206 VSS279 A35 E23 RSVD14
AM25 VSS46 VSS126 AC5 H27 VSS207 VSS280 A32 D23 RSVD15
AM22 VSS47 VSS127 AC3 H24 VSS208 VSS281 A29 C30 RSVD16
AM19 VSS48 VSS128 AC2 H21 VSS209 VSS282 A26 A31 RSVD17
AM16 VSS49 VSS129 AB35 H18 VSS210 VSS283 A23 B30 RSVD18
AM13 AB34 H15 A20 B29 REMOVE
VSS50 VSS130 VSS211 VSS284 RSVD19
AM10 VSS51 VSS131 AB33 H13 VSS212 VSS285 A3 D30 RSVD20 BCLK_ITP AN35 CLK_XDP_CLKGEN_DP
AM7 VSS52 VSS132 AB32 H10 VSS213 B31 RSVD21 BCLK_ITP# AM35
AM4 AB31 H9 A30 CLK_XDP_CLKGEN_DN
VSS53 VSS133 VSS214 RSVD22
AM3 VSS54 VSS134 AB30 H8 VSS215 C29 RSVD23
AM2 VSS55 VSS135 AB29 H7 VSS216
AM1 VSS56 VSS136 AB28 H6 VSS217
AL34 VSS57 VSS137 AB27 H5 VSS218 J20 RSVD24
AL31 VSS58 VSS138 AB26 H4 VSS219 B18 RSVD25 RSVD_NCTF11 AT2
AL28 VSS59 VSS139 Y9 H3 VSS220 RSVD_NCTF12 AT1
AL25 VSS60 VSS140 Y8 H2 VSS221 RSVD_NCTF13 AR1
B AL22 Y6 H1 B
VSS61 VSS141 VSS222
AL19 VSS62 VSS142 Y5 G35 VSS223 J15 RSVD27
AL16 VSS63 VSS143 Y3 G32 VSS224
AL13 VSS64 VSS144 Y2 G29 VSS225
AL10 VSS65 VSS145 W35 G26 VSS226 KEY B1
AL7 VSS66 VSS146 W34 G23 VSS227
AL4 VSS67 VSS147 W33 G20 VSS228 FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER
AL2 VSS68 VSS148 W32 G17 VSS229
AK33 VSS69 VSS149 W31 G11 VSS230
AK30 VSS70 VSS150 W30 F34 VSS231
AK22 VSS73 VSS153 W27
AK19 VSS74 VSS154 W26 FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER
AK16 VSS75 VSS155 U9
AK7 U5 PEG STATIC LANE REVERSAL
VSS78 VSS158
AK4 VSS79 VSS159 U3
AJ25 U2 CFG(2) 1 : (DEFAULT) NORMAL OPERATION
VSS80 VSS160
0 : LANE REVERSED
LOW EDP ENABLE

FOX_PZ98927_3641_41F_HURONRIVER_989P_CHIEFRIVER CFG<2> 1 R4550 2
A IN A
PEG STATIC LAN REVERSAL 1 : (DEFAULT) EDP DISABLED
1K_1%_2_DY CFG(4) 0 : EDP ENABLED
CFG<4> 1 R4551 2
51D4 IN
LOW EDP ENABLE
1K_1%_2_DY PEG DEFER TRAINING
CFG<5> R4552
51D4 IN
1 2 1 : (DEFAULT) PEG TRAIN IMMEDIATELY FOLLOWING XXRESETB DE ASSERTION
1K_1%_2_DY CFG(7) 0 : PEG WAIT FOR BIOS FOR TRAINING
CFG<6> 1 R4553 2
PCIE PORT BIFURCATION IN PCIE PORT BIFURCATION STRAPS
PEG DEFER TRAINING 51D4 CFG<7>

1K_1%_2_DY
1 R4554 2 11 : (DEFAULT) X16 - DEVICE 1 FUNCTION AND 2 DISABLED INVENTEC

IN
1K_1%_2_DY 10 : X8, X8 - DEVICE 1 FUNCTION 1 ENABLE ; FUNCTION 2 DISABLED TITLE
CFG[6:5] 01 : RESERVED - (DEVICE 1 FUNCTION 1 DISABLED ; FUNCTION 2 ENABLED) MODEL,PROJECT,FUNCTION

Block Diagram
STRAP PIN 00 : X8,X4,X4 - DEVICE 1 FUNCTION 1 AND 2 ENABLED
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4700~4949(PCH)
P3V3A
P3V3AL
1 R4736 2
0_5%_2_DY
P1V05S
1
1 R4737 2
D4700
2 NC RSC_0402_DY
C4703
BAT54_30V_0.2A RTCX2
1
1 2
P3V3_RTC
18PF_50V_2
3 P3V3_RTC R4703
3
4
1
20K_1%_2 R4738 R4740 R4742
1
D 1 2 R4708 X4700 RSC_0402_DY RSC_0402_DY RSC_0402_DY

PCH_TDI
2
52A6
OUT
1
R4700 10M_5%_2 32.768KHZ PCH_TMS D
52B6
C4701 OUT
52A6 PCH_TDO
OUT
1
150_1%_3 R4704
2
1
1
1UF_6.3V_2
2
20K_1%_2
1 2
1 2 C4704
RTCX1 1 2
2
R4739 R4741 R4743
R4710
1
18PF_50V_2 RSC_0402_DY RSC_0402_DY RSC_0402_DY
2
1.2K_1%_3
1UF_6.3V_2
C4702
1
1M_5%_2
1UF_6.3V_2
2
C4700
R4705
U4701
+ 1 U4700
2
2 A20 C38 LPC_3S_AD<0> 21E3 28C3
- P3V3_RTC RTCX1 FWH0/LAD0
BI
FWH1/LAD1 A38 LPC_3S_AD<1> 21E3 28C3
BI
2
LPC_3S_AD<2> P3V3S
1
MAXELL_ML1220_T10_2P C20 RTCX2 FWH2/LAD2 B37 21E3 28C3

BI
FWH3/LAD3 C37 LPC_3S_AD<3> 21E3 28C3
R4707 BI
1
D20
RTC
RTCRST#
LPC
330K_5%_3 FWH4/LFRAME# D36 LPC_3S_FRAME# 21E3 28C3
OUT
G22 SRTCRST#
E36 R4744
2
R4706 LDRQ0#
K22 K36 10K_5%_2
0_5%_2_DY INTRUDER# LDRQ1#/GPIO23
1 2
2
C17 INTVRMEN SERIRQ V5 PCI_3S_SERIRQ 21E3 28B7
C BI C
INTVRMEN-INTEGRATE (SUS 1.05V VRM ENABLE STRAPPING
1:ENABLE INTERNAL VRS AM3 SATA_HDDB_RX_DN
SATA0RXN 31D4
0:ENABLE EXTERNAL VRS R4709 IN
24A2 HDA_3S_BITCLK 1 2 HDA_3S_BITCLK_RN34 HDA_BCLK SATA0RXP AM1 SATA_HDDB_RX_DP 31D4
BI IN
33_5%_2 SATA0TXN AP7 SATA_HDDB_TX_DN 31D4
OUT
SATA 6G
HDA_3S_SYNC
1 R4711 2 HDA_3S_SYNC_R L34 AP5 SATA_HDDB_TX_DP
24A2 HDA_SYNC SATA0TXP 31D4
BI OUT
33_5%_2
STRAPPING
24B1 PCSPKR_PCH_3 T10 SPKR SATA1RXN AM10 SATA_HDDA_RX_DN 31D8
OUT IN
SATA1RXP AM8 SATA_HDDA_RX_DP 31D8
R4712 IN
PCSPKR_PCH_3(NO REBOOT) 24A2 HDA_3S_RST# 1 2 HDA_3S_RST#_R
K34 HDA_RST# SATA1TXN AP11 SATA_HDDA_TX_DN 31D8
OUT OUT
1 : NO REBOOT ENABLED 33_5%_2 SATA1TXP AP10 SATA_HDDA_TX_DP 31D8
OUT
0 : (DEFAULT) NO REBOOT DISABLED
24A2 HDA_3S_SDIN0 E34 HDA_SDIN0 SATA2RXN AD7 SATA_MINICARD_RX_DN 29C8
IN IN
IHDA
SATA2RXP AD5 SATA_MINICARD_RX_DP 29C8
IN
G34 HDA_SDIN1 SATA2TXN AH5 SATA_MINICARD_TX_DN 29B8
OUT
SATA2TXP AH4 SATA_MINICARD_TX_DP 29B8
STRAP OUT
C34 HDA_SDIN2
FLASH OVERRIDE SATA3RXN AB8

FLASH_OVERRIDE 1 R4715 2 A34 AB10
FLASH DESCRIPTOR SECURITY OVERIDE 21D3
IN HDA_SDIN3 SATA3RXP
52B8 1K_5%_2 SATA3TXN AF3
1:ENABLE AF1
0:DISABLE : (DEFAULT INTERNAL PULL-DOWN) SATA3TXP
P3V3A HDA_3S_SDOUT 1 R4716 2 A36
24A2 HDA_SDO
OUT
SATA
B SATA4RXN Y7 B
33_5%_2 STRAPPING Y5
21D3 FLASH_OVERRIDE 1 R4720 2 SATA4RXP
OUT C36 HDA_DOCK_EN#/GPIO33 SATA4TXN AD3
52B7
10K_5%_2_DY SATA4TXP AD1
52A7 EC_SMI N32 HDA_DOCK_RST#/GPIO13
IN
SATA5RXN Y3 SATA_ODD_RX_DN 31A7
R4718 IN
SATA5RXP Y1 SATA_ODD_RX_DP 31A7
R4723 1 2 IN
HDA_3S_SYNC_R 1 2 SATA5TXN AB3 SATA_ODD_TX_DN 31A7
OUT TP4720 OUT
RSC_0402_DY 1 PCH_TCK J3 JTAG_TCK SATA5TXP AB1 SATA_ODD_TX_DP 31A7
OUT OUT
JTAG
1K_5%_2 TP30
52D3 1 TP4721 PCH_TMS H7 Y11
HDA_3S_SYNC_R(PLL ODVR VOLTAGE) OUT JTAG_TMS SATAICOMPO P1V05S
TP30 R4747
1 : VCC VRM = 1.6V 52D3 1 TP4722 PCH_TDI K5 JTAG_TDI SATAICOMPI Y10 P1V05S_SATARCOMPO 1 2
OUT
0 : VCC VRM = 1.8V(DEFAULT) TP30 37.4_1%_2
52D3 1 TP4723 PCH_TDO H1 JTAG_TDO
OUT
TP30 SATA3RCOMPO AB12
P1V05S P3V3S
AB13 P1V05S_SATA3RCOMPO 1 R4748 2
SATA3COMPI
49.9_1%_2
1
EC_SPI_CLK T3 AH1
1 R4749 2
P3V3A 21D6 21C7 SPI_CLK SATA3RBIAS
OUT R4751 R4750 R4752
EC_SPI_CS0# 750_1%_2
SPI
21D6 21C8 Y14 SPI_CS0# 10K_5%_2 10K_5%_2 10K_5%_2

1 OUT
EC_SPI_CS1# T1
2
A R343 21C8
OUT SPI_CS1# A
SATALED# P3
10K_5%_2
2
21C7 21C6 EC_SPI_SI V4 SPI_MOSI SATA0GP/GPIO21 V14
OUT
EC_SMI 52B6
OUT 21C8 21C6 EC_SPI_SO U3 SPI_MISO SATA1GP/GPIO19 P1
OUT STRAPPING
ITL_PANTHERPOINT_FCBGA_989P
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4700~4949(PCH) SMB_ALERT# 53B2

OUT
U4700 P3V3A P3V3A

22B1 PCIE_LAN_RX_DN BG34 PERN1
IN R4795 2
22B1 PCIE_LAN_RX_DP C4724 BJ34 PERP1 SMBALERT#/GPIO11 E12 1
IN
22C2 PCIE_LAN_TX_DN 1 2 C4725 PCIE_LAN_TX_C_DN AV32 PETN1 10K_5%_2 R4796
OUT 53D3 SML1ALERT# 1 2
22C2 PCIE_LAN_TX_DP 1 2 PCIE_LAN_TX_C_DP AU32 H14 PCH_3A_SMCLK 53A8 IN
SMBUS
PETP1 SMBCLK
OUT BI 10K_5%_2
0.1UF_16V_2
PCIE_WLAN_RX_DN 0.1UF_16V_2 BE34 C9 PCH_3A_SMDATA SML1_CLK 1 R4797 2
28B7 PERN2 SMBDATA 53A8 53D3
IN BI BI
28B7 PCIE_WLAN_RX_DP C4726 BF34 PERP2
IN 2.2K_5%_2
28B7 PCIE_WLAN_TX_DN 1 2 C4727 PCIE_WLAN_TX_C_DN BB32 PETN2
OUT R4798
28B7 PCIE_WLAN_TX_DP 1 2 PCIE_WLAN_TX_C_DP AY32 PETP2 53D3 SML1_DATA 1 2
OUT BI
0.1UF_16V_2 SML0ALERT#/GPIO60 A12 DRAMRST_CNTRL_PCH 46A8
0.1UF_16V_2 OUT 2.2K_5%_2
32C7 PCIE_USB3_RX_DN BG36 PERN3
IN R4799
32C7 PCIE_USB3_RX_DP C4793 BJ36 PERP3 SML0CLK C8 PCH_3A_ALERT_CLK 28B3 53D2 53D3 28B3 PCH_3A_ALERT_CLK 1 2
IN OUT IN
32C7 PCIE_USB3_TX_DN 1 2 C4794 PCIE_USB3_TX_C_DN AV34 PETN3
D OUT 2.2K_5%_2
32C7 PCIE_USB3_TX_DP 1 2 PCIE_USB3_TX_C_DP AU34 PETP3 SML0DATA G12 PCH_3A_ALERT_DAT 28B3 53D2
OUT OUT R4800 D
0.1UF_16V_2 53D3 28B3 PCH_3A_ALERT_DAT 1 2
0.1UF_16V_2 IN
34C7 PCIE_USB3_RX1_DN BF36 PERN4
IN
PCI-E*
2.2K_5%_2
34C7 PCIE_USB3_RX1_DP C4795 BE36 PERP4
IN
34C7 PCIE_USB3_TX1_DN 1 2 C4796 PCIE_USB3_TX1_C_DN AY34 PETN4 SML1ALERT#/PCHHOT#/GPIO74 C13 SML1ALERT# 53D2
OUT IN
34C7 PCIE_USB3_TX1_DP 1 2 PCIE_USB3_TX1_C_DP BB34 PETP4
OUT
0.1UF_16V_2 SML1CLK/GPIO58 E14 SML1_CLK 53D2
0.1UF_16V_2 OUT
27B7 PCIE_CR_RX_DN BG37 PERN5
IN
27B7 PCIE_CR_RX_DP BH37 PERP5 SML1DATA/GPIO75 M16 SML1_DATA 53D2
IN OUT
27B7 PCIE_CR_TX_DN 1C4797 2 PCIE_CR_TX_C_DN AY36 PETN5
OUT 0.1UF_16V_2
27B7 PCIE_CR_TX_DP 1 2 PCIE_CR_TX_C_DP BB36 PETP5
OUT 0.1UF_16V_2
29B8 PCIE_MSATA_RX_DN C4798 BJ38 PERN6

IN
29B8 PCIE_MSATA_RX_DP C4842 BG38 PERP6
IN
29B8 PCIE_MSATA_TX_DN 1 2 C4843 PCIE_MSATA_TX_C_DN AU36 PETN6 CL_CLK1 M7
OUT
29B8 PCIE_MSATA_TX_DP 1 2 PCIE_MSATA_TX_C_DP AV36 PETP6
OUT
0.1UF_16V_2_DY
0.1UF_16V_2_DY BG40 T11
Controller
PERN7 CL_DATA1
BJ40
Link
PERP7
AY40 PETN7
BB40 P10
PETP7 CL_RST1#
R4753 P3V3A
53C3 MXM_CLKREQ# 1 2
BE38 PERN8 OUT
61D2
C BC38 PERP8 10K_5%_2 C
AW38 PETN8
AY38 PETP8
CLOCK TERMINATION FOR FICM
STUFF FOR INTEGRATED CLK PEG_A_CLKRQ#/GPIO47 M10 MXM_CLKREQ#
IN 53C3 61D2
22C2 CLK_PCIE_LAN_DN Y40 CLKOUT_PCIE0N
OUT
R4777 22C2 CLK_PCIE_LAN_DP Y39 CLKOUT_PCIE0P
OUT
53B3 CLKIN_DMI_PCH_DN 1 2 CLKOUT_PEG_A_N AB37 MXM_CLK_PEG_DN 61D4
IN OUT
10K_5%_2 22C5 CLKREQ_LAN# J2 PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P AB38 MXM_CLK_PEG_DP 61D4
IN OUT
53A2 XTAL25_OUT 53A3
OUT
R4778
1
53B3 CLKIN_DMI_PCH_DP 1 2 28C7 CLK_PCIE_WLAN_DN AB49 CLKOUT_PCIE1N CLKOUT_DMI_N AV22 CLK_DMI_PCH_DN 46D2
IN OUT OUT
10K_5%_2 28C7 CLK_PCIE_WLAN_DP AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLK_DMI_PCH_DP 46D2
OUT OUT R4801
CLKREQ_WLAN# M1 1M_5%_2
R4779 28C7 IN PCIECLKRQ1#/GPIO18
53B3 CLKIN_BUF_DOT96_DN 1 2 53A2 CLKOUT_DP_N AM12 CLK_DP_PCH_DN 46D1

IN OUT X4701
2
10K_5%_2 CLKOUT_DP_P AM13 CLK_DP_PCH_DP 46D1
OUT 1 2 XTAL25_IN 53A3
32C7 CLK_PCIE_USB3_DN AA48 CLKOUT_PCIE2N OUT
OUT
R4780 32C7 CLK_PCIE_USB3_DP AA47 CLKOUT_PCIE2P
OUT 25MHZ
CLOCKS
CLKIN_BUF_DOT96_DP BF18
1
53B3 1 2 CLKIN_DMI_N CLKIN_DMI_PCH_DN 53C8
IN IN
1
10K_5%_2 32B8 CLKREQ_USB3# V10 PCIECLKRQ2#/GPIO20 CLKIN_DMI_P BE18 CLKIN_DMI_PCH_DP 53B8
IN IN C4729
32C7
C4728 18PF_50V_2
R4781 R4837
B CLKIN_PCH14 1 2 CLK_PCIE_1_USB3_DN Y37 BJ30 1 2 18PF_50V_2 B
53A3 34C7 CLKOUT_PCIE3N CLKIN_GND1_N
IN OUT
Y36 BG30
2
10K_5%_2 34C7 OUT CLK_PCIE_1_USB3_DP CLKOUT_PCIE3P CLKIN_GND1_P
2
10K_5%_2
R4782 34A8 CLKREQ_1_USB3# A8 PCIECLKRQ3#/GPIO25
IN
53B3 CLKIN_SATA1_DP 1 2 34C7 CLKIN_DOT_96N G24 CLKIN_BUF_DOT96_DN 53B8
IN IN
10K_5%_2 CLKIN_DOT_96P E24 CLKIN_BUF_DOT96_DP 53B8
IN
27B7 CLK_PCIE_CR_DN Y43 CLKOUT_PCIE4N
BI
R4783 27B7 CLK_PCIE_CR_DP Y45 CLKOUT_PCIE4P
BI B500
53B3 CLKIN_SATA1_DN 1 2 CLKIN_SATA_N AK7 CLKIN_SATA1_DN 53B8 53D3 SMB_ALERT# 1 2
IN IN IN
27C7 27B7 CLKREQ_CR# L12 PCIECLKRQ4#/GPIO26 CLKIN_SATA_P AK5 CLKIN_SATA1_DP 53B8
10K_5%_2 BI IN PASSWORD_0805
29C6 CLK_MSATA_PCIE_DN
V45 CLKOUT_PCIE5N REFCLK14IN K45 CLKIN_PCH14 53B8
BI IN
29C6 CLK_MSATA_PCIE_DP
V46 CLKOUT_PCIE5P
P3V3S P3V3A BI R4775
53C7 53A2 22C5 CLKREQ_LAN# 1 2
P5V0S OUT
29C6 CLKREQ_MSATA#L14 PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK H45 CLKIN_PCI_FB 56A7 10K_5%_2_DY
BI IN
53A2
CLKREQ_WLAN# 1 R4776 2
53B7 53A2 28C7
OUT
1
2.2K_5%_2
P3V3A AB42 CLKOUT_PEG_B_N XTAL25_IN V47 XTAL25_IN 53B1 10K_5%_2_DY
OUT
R4784 R4785 AB40 CLKOUT_PEG_B_P XTAL25_OUT V49 XTAL25_OUT 53C1
R4787 OUT
2.2K_5%_2 R4792
2.2K_5%_2 1 2 E6 P1V05S
R4786 PEG_B_CLKRQ#/GPIO56
2.2K_5%_2 10K_5%_2_DY R4802 P3V3A

2
Y47 1 2 CLKREQ_LAN# 1 R4773 2

XCLK_RCOMP 53C7 53A2 22C5
A OUT A
43C8 V40 90.9_1%_2
PCH_3S_SMCLK CLKOUT_PCIE6N P3V3S
2
41C8
BI V42 10K_5%_2
42C8 CLKOUT_PCIE6P
Q4700 CLKREQ_WLAN# 1 R4772 2
44C8 R4793 CLOSE TO PCH 53B7 53A2 28C7
OUT
S
1 2 T13 PCIECLKRQ6#/GPIO45 10K_5%_2

1
10K_5%_2_DY
G
TP24 R4771
V38 K43 1 53A6 29C6 CLKREQ_MSATA#1 2
D
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64
TP4700 OUT
FLEX CLOCKS
PCH_3A_SMCLK SSM3K7002BFU V37 CLKOUT_PCIE7P 10K_5%_2

53D3 TP24
BI R4794 CLKOUTFLEX1/GPIO65 F47 1
P3V3S
3
TP4701
1 2 K12 PCIECLKRQ7#/GPIO46
TP24
10K_5%_2_DY CLKOUTFLEX2/GPIO66 H47 1 R4702
PCH_3A_SMDATA
INVENTEC
3
53D3 TP4702 1 2
BI AK14 CLKOUT_ITPXDP_N
Q4701 AK13 K49 DGPU_PRSNT#
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
IN 53A3
DGPU_PRSNT# 10K_5%_2_DY
D
OUT
G 1 R4728
1 2 TITLE
ITL_PANTHERPOINT_FCBGA_989P 0 = CARD IS PRESENT. MODEL,PROJECT,FUNCTION

S
10K_5%_2 Block Diagram

43C8
PCH_3S_SMDATA 1 = CARD NOT PLUGGED IN.
41C8
BI DOC.NUMBER REV
42C8
2
SSM3K7002BFU SIZE CODE

44C8 1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DSWVRMEN - DEEP S4/S5 WELL ON-DIE VOLTAGE REGULATOR ENABLE

U4700
HIGH-ENABLED(DEFAULT)
47D7 DMI_RX0_DN BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TX0_DN 47C7 LOW-DISABLED
IN IN
D 47D7 DMI_RX1_DN BE20 DMI1RXN FDI_RXN1 AY14 FDI_TX1_DN 47C7
IN IN
47D7 DMI_RX2_DN BG18 DMI2RXN FDI_RXN2 BE14 FDI_TX2_DN 47C7 D
IN IN
47D7 DMI_RX3_DN BG20 DMI3RXN FDI_RXN3 BH13 FDI_TX3_DN 47C7
IN IN
BC12 FDI_TX4_DN 47C7
FDI_RXN4
IN P3V3_RTC
47D7 DMI_RX0_DP BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TX5_DN 47C7
IN IN
47D7 DMI_RX1_DP BC20 DMI1RXP FDI_RXN6 BG10 FDI_TX6_DN 47C7
IN IN
47C7 DMI_RX2_DP BJ18 DMI2RXP FDI_RXN7 BG9 FDI_TX7_DN 47C7
IN IN
DMI_RX3_DP
1
47C7 BJ20 DMI3RXP
IN
FDI_RXP0 BG14 FDI_TX0_DP 47C7
IN
47D7 DMI_TX0_DN AW24 DMI0TXN FDI_RXP1 BB14 FDI_TX1_DP 47C7 STRAPPING R4829
OUT IN
DMI
DMI_TX1_DN FDI_TX2_DP
FDI
47D7 AW20 DMI1TXN FDI_RXP2 BF14 47C7 330K_5%_2
OUT IN
47D7 DMI_TX2_DN BB18 DMI2TXN FDI_RXP3 BG13 FDI_TX3_DP 47C7
P1V05S OUT IN
DMI_TX3_DN AV18 BE12 FDI_TX4_DP
2
47D7 DMI3TXN FDI_RXP4 47C7
OUT IN
FDI_RXP5 BG12 FDI_TX5_DP 47C7
IN
47D7 DMI_TX0_DP AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TX6_DP 47C7
OUT IN
DMI_TX1_DP FDI_TX7_DP
1
47D7 AY20 DMI1TXP FDI_RXP7 BH9 47B7
OUT IN
1
47D7 DMI_TX2_DP AY18 DMI2TXP
R4812 OUT
47D7 DMI_TX3_DP AU18 DMI3TXP
OUT R4830
49.9_1%_2 FDI_INT AW16 FDI_INT 47B7
OUT 330K_5%_2_DY
BJ24 AV12 FDI_FSYNC0
2
DMI_ZCOMP FDI_FSYNC0
OUT 47B7
2
BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 47B7
OUT
R4814
C 1 2 BH21 AV14 FDI_LSYNC0 C
DMI2RBIAS FDI_LSYNC0
OUT 47B7
750_1%_2 FDI_LSYNC1 BB10 FDI_LSYNC1 47B7

P3V3S OUT
P3V3A
1
DSWVRMEN A18
1
R4832
STRAPPING
R4815 R4816
SUSACK# 1 2 C12 E22 1 R4831 2 RSMRST# 1K_5%_2_DY
IN SUSACK# DPWROK
IN 21D1 21D3 54B7
10K_5%_2 0_5%_2
P3V3_LDO
2
0_5%_2_DY
2
46C1 SYS_RESET# K3 SYS_RESET# WAKE# B9 PCIE_WAKE# 22B5 28C7 32C6 34C6 54A5
IN IN
1
R4883
45B4 PVCORE_PG P12 SYS_PWROK CLKRUN#/GPIO32 N3 PCI_3S_CLKRUN# 21E3 54A5 10K_5%_2_DY
System Power Management

IN IN
PCH_PWROK
2
54A6 21B6 L22 PWROK SUS_STAT#/GPIO61 G8 SLP_S5_3R
IN OUT
3
L10 N14 EC_32KHZ Q4713
APWROK SUSCLK/GPIO62
OUT 21B6
D
B 1 G
B
P3V3A
46C7 PM_DRAM_PWRGD B13 D10 SLP_S5#_3R 14D2 21D3
S
DRAMPWROK SLP_S5#/GPIO63
OUT OUT P3V3A
SSM3K7002BFU_DY
1
54C2
2
RSMRST#
5
21D1 C21 RSMRST# SLP_S4# H4
IN U4706
R4820 21D3
+
10K_5%_2_DY 1
SUS_PWR_ACK
SLP_S3#_IC_3R SLP_S3#_3R
2
54A5 K16 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# F4 4 14A6 14B4 14B8

OUT OUT
2 14D2 21D6 50D3 65B8
2
D4706
NC
1
-
100K_5%_2
EC_PWRSW#
3 1 E20 G10 TC7SZ08FU
R4884
21D6 IN PWRBTN# INT. PU 20K SLP_A#
3
ACPRESENT SLP_SUS#
2
BAT54_30V_0.2A 61C5 54A5 21D6 H20 ACPRESENT/GPIO31 INT. PD 20K SLP_SUS# G16
IN OUT
2
D4707
NC
21D6 LOW_BAT#_3 3 1 E10 BATLOW#/GPIO72 INT. PU 20K PMSYNCH AP14 H_PM_SYNC 46C5
IN BI
BAT54_30V_0.2A 54A5 PM_RI# A10 RI# SLP_LAN#/GPIO29 K14

P3V3_LDO
IN
P3V3A ITL_PANTHERPOINT_FCBGA_989P
1
R4822 P3V3A
A 1 2 R4834 A
10K_5%_2
61C5 54A6 21D6 ACPRESENT R4824 1 2 10K_5%_2
8.2K_5%_2 IN
SLP_S3_3R
2
54B7 21B6 PCH_PWROK 54B7 SUS_PWR_ACK R4825 1 2 10K_5%_2 15A4 15B4 15B8
IN IN OUT
1
3
54A6 PM_RI# R4826 1 2 10K_5%_2
IN Q4714
R4823
D
34C6 32C6 28C7 22B5 PCIE_WAKE# R4827 1 2 10K_5%_2
10K_5%_2 IN 1 G
54B3
INVENTEC
S
2
P3V3S SSM3K7002BFU
2
TITLE
PCI_3S_CLKRUN# 1 2 8.2K_5%_2 Block Diagram
54B3 21E3 IN R4828
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S
1
D R4854 R4855
100K_5%_2 D
100K_5%_2
2
U4700
1
37C8 PCH_LCM_BKLTEN J47 L_BKLTEN SDVO_TVCLKINN AP43

OUT
R4856 R4857 37D7 PCH_LCM_VDDEN M45 L_VDD_EN SDVO_TVCLKINP AP45
OUT
2.2K_5%_2 2.2K_5%_2
37B5 PCH_INV_PWM_3 P45 L_BKLTCTL SDVO_STALLN AM42
OUT
SDVO_STALLP AM40
2
37C4 PCH_LVDS_DDCCLK T40 L_DDC_CLK

OUT
37C4 PCH_LVDS_DDCDATA K47 L_DDC_DATA SDVO_INTN AP39
OUT
SDVO_INTP AP40
T45 L_CTRL_CLK
P39 L_CTRL_DATA
WHEN ¡¥1¡¦- LVDS IS DETECTED

R4858
PCH_LVDS_DDCDATA - LVDS DETECT 1 2 AF37 LVD_IBG SDVO_CTRLCLK P38
AF36 LVD_VBG SDVO_CTRLDATA M39
2.37K_1%_2
HIGH-LVDS ENABLED AE48 LVD_VREFH
LVDS
AE47 LVD_VREFL DDPB_AUXN AT49
LOW-LVDS DISABLED (DEFAULT) AT47
DDPB_AUXP
DDPB_HPD AT40
C PCH_LVDS_TXCA_DN AK39 C
37C8 OUT LVDSA_CLK#
37B8 PCH_LVDS_TXCA_DP AK40 LVDSA_CLK DDPB_0N AV42

OUT
DDPB_0P AV40
37C8 PCH_LVDS_TXDA0_DN AN48 LVDSA_DATA#0 DDPB_1N AV45
OUT
37C8 PCH_LVDS_TXDA1_DN AM47 LVDSA_DATA#1 DDPB_1P AV46
OUT
37C8 PCH_LVDS_TXDA2_DN AK47 LVDSA_DATA#2 DDPB_2N AU48
OUT
AJ48 LVDSA_DATA#3 DDPB_2P AU47
DDPB_3N AV47
Digital Display Interface

37C8 PCH_LVDS_TXDA0_DP AN47 LVDSA_DATA0 DDPB_3P AV49
OUT
37C8 PCH_LVDS_TXDA1_DP AM49 LVDSA_DATA1
OUT
37C8 PCH_LVDS_TXDA2_DP AK49 LVDSA_DATA2
OUT
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46 PCH_HDMI_DDCCLK 39A8
BI
DDPC_CTRLDATA P42 PCH_HDMI_DDCDATA 39B8
BI
37B8 PCH_LVDS_TXCB_DN AF40 LVDSB_CLK#

OUT
37B8 PCH_LVDS_TXCB_DP AF39 LVDSB_CLK DDPC_AUXN AP47
OUT
DDPC_AUXP AP49
37B8 PCH_LVDS_TXDB0_DN AH45 LVDSB_DATA#0 DDPC_HPD AT38 PCH_HDMI_HPDET 39A3
OUT IN
37B8 PCH_LVDS_TXDB1_DN AH47 LVDSB_DATA#1
OUT
37B8 PCH_LVDS_TXDB2_DN AF49 LVDSB_DATA#2 DDPC_0N AY47 PCH_HDMI_TX2_DN 39D7
OUT OUT
AF45 LVDSB_DATA#3 DDPC_0P AY49 PCH_HDMI_TX2_DP 39D7
OUT
DDPC_1N AY43 PCH_HDMI_TX1_DN 39D7
OUT
B 37B8 PCH_LVDS_TXDB0_DP AH43 LVDSB_DATA0 DDPC_1P AY45 PCH_HDMI_TX1_DP 39D7 B
OUT OUT
37B8 PCH_LVDS_TXDB1_DP AH49 LVDSB_DATA1 DDPC_2N BA47 PCH_HDMI_TX0_DN 39D7
OUT OUT
37B8 PCH_LVDS_TXDB2_DP AF47 LVDSB_DATA2 DDPC_2P BA48 PCH_HDMI_TX0_DP 39D7
OUT OUT
AF43 LVDSB_DATA3 DDPC_3N BB47 PCH_HDMI_TXC_DN 39C7
OUT
DDPC_3P BB49 PCH_HDMI_TXC_DP 39D7
OUT
38D8 CRTB N48 CRT_BLUE DDPD_CTRLCLK M43

OUT
CRTG P49 M36
CRT
38D8 OUT CRT_GREEN DDPD_CTRLDATA
38D8 CRTR T49 CRT_RED

OUT
R4859 AT45
DDPD_AUXN
1 2
38B8 CRT_DDCCLK T39 CRT_DDC_CLK DDPD_AUXP AT43
OUT
38B8 CRT_DDCDATAM40 CRT_DDC_DATA DDPD_HPD BH41
150_1%_2_DY OUT
R4860 BB43
DDPD_0N
1 2
38C8 CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
OUT
38C8 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
150_1%_2_DY OUT
DDPD_1P BE44
R4861 DDPD_2N BF42
1 2 T43 DAC_IREF DDPD_2P BE42
T42 CRT_IRTN DDPD_3N BJ42
150_1%_2_DY DDPD_3P BG42
1
A A
1K_1%_2
R4862
2
CLOSE TO PCH
FOR OPTIMUS ENABLE
R4862 AND R4868 STUFF
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4700
RSVD1 AY7
RSVD2 AV7
BG26 TP1 RSVD3 AU3
BJ26 TP2 RSVD4 BG4
BH25 TP3
BJ16 TP4 RSVD5 AT10
BG16 TP5 RSVD6 BC8
GPIO19 AH38
GPIO51 BOOT BIOS
TP6
AH37 TP7 RSVD7 AU2
BBS_BIT1 BBS_BIT0
DESTINATION AK43 TP8 RSVD8 AT4
AK45 TP9 RSVD9 AT3
0 1 RESERVED(NAND) C18 AT1
TP10 RSVD10
N30 TP11 RSVD11 AY3
1 0 ------ H3 AT5
TP12 RSVD12
AH12 TP13 RSVD13 AV3
1 1 SPI (DEFAULT) AM4 AV1
D
NVRAM
TP14 RSVD14
AM5 TP15 RSVD15 BB1 D
0 0 LPC Y13 BA3
RSVD
TP16 RSVD16
K24 TP17 RSVD17 BB5
L24 TP18 RSVD18 BB3
AB46 TP19 RSVD19 BB7
AB45 TP20 RSVD20 BE8
RSVD21 BD4
P3V3S RSVD22 BF6
B21 TP21 RSVD23 AV5

R4874 1 2 8.2K_5%_2 PCI_3S_INTA# 56B6 M20 TP22
BI
AY16 TP23
1 2 PCI_3S_INTB# ROUTE WITH 90 OHMS IMPEDANCE BG46 AV10
R4875 8.2K_5%_2 BI 56B6 TP24 RSVD24
TOTAL LENGTH NO LONGER THAN 11 INCHES

R4876 1 2 8.2K_5%_2 PCI_3S_INTC# 56B6 RSVD25 AT8
BI
R4877 1 2 8.2K_5%_2 PCI_3S_INTD# 56B6 33C7 USB3_PCH_RX1_DN BE28 USB3RN1 RSVD26 AY5
BI BI
33B7 USB3_PCH_RX2_DN BC30 USB3RN2 RSVD27 BA2
BI
R4878 1 2 8.2K_5%_2 RUNSCI0#_3 21E3 57D6 35D8 USB3_PCH_RX3_DN BE32 USB3RN3
IN BI
35B8 BI USB3_PCH_RX4_DN BJ32 USB3RN4 RSVD28 AT12 NOTE:
33C7 USB3_PCH_RX1_DP BC28 USB3RP1 RSVD29 BF3
BI USB2.0/3.0 COMBO-USB2.0 PORT 0,1 MAPPEDUSB3.0 PORT 1,2
33B7 USB3_PCH_RX2_DP BE30 USB3RP2
BI
R4880 1 2 10K_5%_2DGPU_HOLD_RST# IN 56B6 62C7 35D8 BI
USB3_PCH_RX3_DP BF32 USB3RP3
C USB3_PCH_RX4_DP BG32 C24 USB_P0_DN C
35B8 BI USB3RP4 USBP0N
BI 33C7
1 2 PCI_3S_REQ2# USB3_PCH_TX1_DN AV26 A24 USB_P0_DP P0.P1 RESERVER FOR USB3.0
R4881 10K_5%_2 IN 56B6 33C7 BI USB3TN1 DEBUG PORT USBP0P
BI 33C7
33B7 USB3_PCH_TX2_DN BB26 USB3TN2 USBP1N C25 USB_P1_DN 33B7
BI BI
R4882 1 2 10K_5%_2 DGPU_PWR_EN# 16B5 56B6 35D8 USB3_PCH_TX3_DN AU28 USB3TN3 USBP1P B25 USB_P1_DP 33B7
IN BI BI
35B8 USB3_PCH_TX4_DN AY30 USB3TN4 USBP2N C26 USB_P2_DN 35D8
BI BI
33C7 USB3_PCH_TX1_DP AU26 USB3TP1 USBP2P A26 USB_P2_DP 35D8
BI BI
33B7 USB3_PCH_TX2_DP AY26 USB3TP2 USBP3N K28 USB_P3_DN 35A8
BI BI
R4838 1 2 10K_5%_2 SATA_ODD_DA# 31A5 56B6 35D8 USB3_PCH_TX3_DP AV28 USB3TP3 USBP3P H28 USB_P3_DP 35A8
IN BI BI
35B8 USB3_PCH_TX4_DP AW30 USB3TP4 USBP4N E28
BI
USBP4P D28
USBP5N C28 USB_WLAN_DN 28B3
BI
USBP5P A28 USB_WLAN_DP 28B3 WLAN
BI
USBP6N C29
BBS STRAPING USBP6P B29
56D7 PCI_3S_INTA# K40 PIRQA# USBP7N N28
BI
56C7 PCI_3S_INTB# K38 PIRQB# USBP7P M28
BBS_BIT1 BI
56C7 PCI_3S_INTC# H38 PIRQC# USBP8N L30 USB_FP_DN 20A6
BI BI
PCI
56C7 PCI_3S_INTD# G38 PIRQD# USBP8P K30 USB_FP_DP 20A6
BI BI
STP_A16OVR G30
USB
USBP9N
2
62C7
56C7 DGPU_HOLD_RST# C46 REQ1#/GPIO50 USBP9P E30
OUT 37B2
56C7 PCI_3S_REQ2# C44 REQ2#/GPIO52 USBP10N C30 USB_CAM_DN 36B4
R4885 R4886 OUT BI WEBCAM
16B5 DGPU_PWR_EN# E40 REQ3#/GPIO54 USBP10P A30 USB_CAM_DP 36B4
OUT BI
B 1K_5%_2_DY 1K_5%_2_DY
56C7 USBP11N L32 37B2 B
D47 GNT1#/GPIO51 USBP11P K32
1
E42 GNT2#/GPIO53 USBP12N G32 USB_3D_DN 37D2

BI 3D
F46 GNT3#/GPIO55 USBP12P E32 USB_3D_DP 37D2
BI
USED AS GPIO ONLY. USBP13N C32
INT. PU 20K
LOW=A16 SWAP OVERRIDE USBP13P A32
32C7 32C6 USB3_SMI# G42 PIRQE#/GPIO2
STP_A16OVR BI
56C7 31A5 SATA_ODD_DA# G40 PIRQF#/GPIO3 R4835
BI
TOP-BLOCK SWAP OVERRIDE 65B1 HDP_LOC C42 PIRQG#/GPIO4 USBRBIAS# C33 1 2
IN
34C7 34C6 USB3_1_SMI# D44 PIRQH#/GPIO5
HIGH=DEFAULT BI
P3V3A 22.6_1%_3
USBRBIAS B33
1 R4887 2 P3V3A_PME# K10 CLOSE TO PCH
PME# INT. PU 20K
GL10FG 1
PLT_RST# 10K_5%_2_DY MACHINE_ID0
46C7 34C6 32C6 27C7
BI
C6 PLTRST# OC0#/GPIO59 A14
IN 56A4 56A5 MACHINE_ID0
OC1#/GPIO40 K20 MACHINE_ID1 56A4 56A5 GL10FH 0
IN
OC2#/GPIO41 B17 MACHINE_ID2 56A4 56A5
IN
P3V3A 21E3 CLK_KBPCI R4889 1 2 22_5%_2 CLK_KBPCI_R H49 CLKOUT_PCI0 OC3#/GPIO42 C16 MACHINE_ID3 56A4 56A5 OPTIMUS 1
OUT IN
53A3 CLKIN_PCI_FB R4890 1 2 22_5%_2 CLK_PCI_FB_R H43 CLKOUT_PCI1 OC4#/GPIO43 L16 MACHINE_ID4 56A4 56A5 MACHINE_ID1
OUT IN
J48 CLKOUT_PCI2 OC5#/GPIO9 A16 MACHINE_ID5 56A4 56A5 3D 0
TP24 IN
MACHINE_ID6
5
1 K42 CLKOUT_PCI3 OC6#/GPIO10 D14 56A4 56A5

TP4717 IN
U4705 28C7 CLK_PCI_DEBUGR4891 1 2 22_5%_2 H40 CLKOUT_PCI4 OC7#/GPIO14 C14 MACHINE_ID1_DB 56A4 56A5 UMA 1
OUT IN
CLK_PCI_DEBUG_R
+
1 MACHINE_ID2
29C3 28C7 28C3 21E3 BUF_PLT_RST# 4 ITL_PANTHERPOINT_FCBGA_989P DISCRETE 0
BI TO BE USED AS GPIO
62C7 39A1 35C3
2
A 2 A
CIR ON 1
-
R4888 TC7SZ08FU MACHINE_ID3

CIR OFF 0
3
100K_5%_2 P3V3A
1
56A2 MACHINE_ID0 R4900 1 2 10K_5%_2

56A4 56A2 MACHINE_ID0 R4892 1 2 10K_5%_2_DY OUT
OUT 56A5 MACHINE_ID1 R4901 1 2 10K_5%_2
OUT MACHINE_ID2 R4902 1 2 10K_5%_2
OUT MACHINE_ID3 R4903 1 2 10K_5%_2
56A4 56A2 MACHINE_ID3 R4895 1 2 10K_5%_2_DY 56A5 OUT
OUT 56A2 MACHINE_ID4 R4904 1 2 10K_5%_2
OUT
56A4
56A4
56A4
56A2
56A2
56A2
OUT
OUT
MACHINE_ID4
MACHINE_ID5
MACHINE_ID6
R4896
R4897
R4898
1
1
1
2 10K_5%_2_DY
2 10K_5%_2_DY
2 10K_5%_2_DY
56A5
56A2
OUT
OUT
MACHINE_ID5
MACHINE_ID6
R4905
R4906
1
1
2 10K_5%_2
2 10K_5%_2 INVENTEC
OUT 56A2 MACHINE_ID1_DB R4907 1 2 10K_5%_2
56A4 56A2 MACHINE_ID1_DB R4899 1 2 10K_5%_2_DY OUT
OUT 56A5 TITLE
Block Diagram
NOTE:10K_5%(60130B1030ZT)
NOTE:10K_5%(60130B1030ZT)
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3A
R4908 1 210K_5%_2 PCH_GPIO15

OUT 57C6
R4927 1 210K_5%_2 PCH_GPIO6 57D6

P3V3S
OUT
R4909 1 210K_5%_2 PCH_GPIO8
OUT 57D6
1 2 PCH_GPIO12 1 R4721 2
R4910 10K_5%_2_DY
OUT 57C6
D
33K_5%_2
D
P3V3S U4700 P3V3S
SATA_ODD_PWREN
29B7 MSATA_DET T7 BMBUSY#/GPIO0 TACH4/GPIO68 C40 31B8
IN OUT
R4916 1 2 10K_5%_2_DY PCH_GPIO22 57C6 57C7 57D7 PCH_GPIO1 A42 TACH1/GPIO1 TACH5/GPIO69 B41 R4724 1 2 10K_5%_2_DY
OUT IN
R4917 1 2 10K_5%_2_DY PCH_GPIO38 57B6
OUT 57D7 PCH_GPIO6 H36 TACH2/GPIO6 TACH6/GPIO70 C41 R4725 1 2 10K_5%_2_DY
IN
R4919 1 2 10K_5%_2 SATA_ODD_PRSNT#
OUT 31A5 57B6
56C7 21E3 RUNSCI0#_3 E38 TACH3/GPIO7 TACH7/GPIO71 A40 R4726 1 2 10K_5%_2_DY
R4722 1 2
10K_5%_2_DY PCH_GPIO1 57D6 IN
OUT
INT. PU 20K
R4915 1 2 10K_5%_2 PCH_GPIO16 57C6 57D7 PCH_GPIO8 C10 GPIO8 INT. PU 20K
OUT OUT
57D7 PCH_GPIO12 C4 LAN_PHY_PWR_CTRL/GPIO12

OUT
INT. PD 20K
57D7 PCH_GPIO15 G2 GPIO15 A20GATE P4 EC_3S_A20GATE 21E2
OUT STRAPPING IN
AU16 PCH_PECI 1 R4940 2 H_PECI
PECI
OUT 21A6 46D5
57D7 PCH_GPIO16 U2 SATA4GP/GPIO16 0_5%_2_DY
OUT
R4727 1 2 10K_5%_2_DY PCH_GPIO22 57C6 57D7 RCIN# P5 KBRST# 21D2
OUT IN
GPIO
INT. PU 20K
CPU/MISC
TP4908
61C5 DGPU_PWROK 1 TP24 D40 TACH0/GPIO17 PROCPWRGD AY11 H_CPUPWRGD 46C5
IN OUT
57D7 57C7 PCH_GPIO22 T5 SCLOCK/GPIO22 THRMTRIP# AY10 THRMTRIP#_R

C OUT C
P1V05S P1V05S
20A2 KBLED_ID E8 GPIO24 INIT3_3V# T14
OUT
1
R4928 1 2 10K_5%_2_DY E16 GPIO27 INT.PD 20K
1
STRAPPING
DF_TVS AY1
P3V3S 57A7 PLL_ODVR_EN STRAPPING
P8 GPIO28 INT. PU 20K R4942 R4944
OUT
TS_VSS1 AH8 56_5%_2 56_5%_2
R4929 1 2 10K_5%_2_DY K1 STP_PCI#/GPIO34
GFX_CRB_DET(GPIO39) AK11
2
TS_VSS2 R4941 R4943
2
R4930 1 2 10K_5%_2_DY K4 GPIO35 1 2 1 2 PM_THRMTRIP# 45A4
IN
INTERNAL GFX :100K PD TS_VSS3 AH10 46D5
1 2 10K_5%_2_DY V8 0_5%_2_DY
EXTERNAL GFX :10K PU R4932 SATA2GP/GPIO36 390_5%_2
INT. PD 20K TS_VSS4 AK10
STRAPPING
PCH_GPIO37 M5 BOTH THESE SHOULD BE CLOSE TO PCH
P3V3S 57B7 SATA3GP/GPIO37
OUT
NC_1 P37
57D7 PCH_GPIO38 N2 SLOAD/GPIO38
R4920 1 210K_5%_2_DY PCH_GPIO39 57B6 OUT NV_CLE 46D6
OUT OUT
STRAPPING
PCH_GPIO39 FOLLOW EDS1.0
R4926 1 2100K_5%_2 57B7
OUT
M3 SDATAOUT0/GPIO39
STRAPPING
1 TP24 V13 SDATAOUT1/GPIO48 VSS_NCTF_15 BG2
TP4907
57D7 31A5 SATA_ODD_PRSNT# V3 SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16 BG48

OUT
B B
28C7 28B7 BTIFON# D6 GPIO57 VSS_NCTF_17 BH3
OUT
FDI_OVRVLTG(GPIO37) VSS_NCTF_18 BH47
LOW- TX,RXTERMINATED TO SAME VOLTAGE A4 VSS_NCTF_1 VSS_NCTF_19 BJ4
(DC COUPLING MODE) DEFAULT

A44 VSS_NCTF_2 VSS_NCTF_20 BJ44
P3V3S A45 VSS_NCTF_3 VSS_NCTF_21 BJ45
R4934 1 2
1K_5%_2_DY PCH_GPIO37 57B6 A46 VSS_NCTF_4 VSS_NCTF_22 BJ46
OUT
NCTF
R4935 1 2100K_5%_2
B3 VSS_NCTF_7 VSS_NCTF_25 C2
B47 VSS_NCTF_8 VSS_NCTF_26 C48
BD1 VSS_NCTF_9 VSS_NCTF_27 D1

PLL_ODVR_EN(PLL ON DIE VR ENABLE)(GPIO28)
BD49 VSS_NCTF_10 VSS_NCTF_28 D49
A HIGH-ENABLED (DEFAULT) A
LOW-DISABLED BE1 VSS_NCTF_11 VSS_NCTF_29 E1
BE49 E49
P3V3A VSS_NCTF_12 VSS_NCTF_30
BF1 VSS_NCTF_13 VSS_NCTF_31 F1
1 R4950 2 PLL_ODVR_EN
IN 57C6 BF49 F49
VSS_NCTF_14 VSS_NCTF_32
10K_5%_2
R4936 ITL_PANTHERPOINT_FCBGA_989P
1
10K_5%_2_DY
2
INVENTEC
TITLE
STRAP
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V05S P3V3S
1.3A U4700 L4700
AA23 U48 15MIL P3V3S_VCCADAC 1 2
VCCCORE[1]
POWER VCCADAC
1
1
1
AC23 VCCCORE[2] FBM_11_160808_121T
AD21 P3V3S C4784
VCCCORE[3] C4782 C4783
CRT
1
1
AD23 VCCCORE[4] VSSADAC U47
1
C4772 C4773 C4774 C4775 AF21 R4717 0.1UF_16V_2
VCC CORE
VCCCORE[5]
AF23 10UF_6.3V_3 0.01UF_50V_2
VCCCORE[6]
2
10UF_6.3V_3 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 AG21 0_5%_2_DY
2
D VCCCORE[7]
AG23 VCCCORE[8] D
2
AG24 VCCCORE[9] VCCALVDS AK36 15MIL R4713
2
AG26 VCCCORE[10] 1 2
AG27 AK37
VCCCORE[11] VSSALVDS P1V8S
AG29 VCCCORE[12] 0_5%_2
AJ23 VCCCORE[13] L4701
15MIL
LVDS
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37 P1V8S_VCCTX_LVDS 1 2
1
AJ27 VCCCORE[15]
1
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38 C4787 FBM_11_160808_121T
R4714
C4785 C4786
0_5%_2
AJ31 VCCCORE[17]
P1V05S VCCTX_LVDS[3] AP36 L4701 DISCRETE ONLY OPEN

0.01UF_50V_2_DY0.01UF_50V_2_DY 22UF_6.3V_5_DY
AP37
2
VCCTX_LVDS[4]
20MIL
2
AN19
P1V05S VCCIO[28]
R4945
1 2 P1V05S_VCCAPLLEXP
BJ22 P3V3S
P1V05S VCCAPLLEXP
15MIL
HVCMOS
0_5%_2_DY VCC3_3[6] V33
3A AN16 VCCIO[15]
C4788
1 2
AN17 VCCIO[16]
VCC3_3[7] V34
1
1
C 0.1UF_16V_2 C
C4777 C4778 C4779 C4780
C4776
AN21 VCCIO[17]
10UF_6.3V_3 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 P1V5S_VCCAFDI_VRM
AN26 VCCIO[18]
2
2
VCCVRM[3] AT16 15MIL
AN27 VCCIO[19]
P1V05S
VCCIO
AP21 VCCIO[20]
DMI
VCCDMI[1] AT20 15MIL
AP23 C4789
VCCIO[21] P1V05S
1 2
AP24 VCCIO[22]
VCCCLKDMI AB36 15MIL 1UF_6.3V_2

P3V3S AP26 VCCIO[23]
C4790
1 2
AT24 VCCIO[24]
1UF_6.3V_2_DY P1V8S
1
AN33 VCCIO[25]
VCCDFTERM[1] AG16 15MIL

C4781 AN34 VCCIO[26]
1
B B
0.1UF_16V_2 15MIL BH29 AG17
VCC3_3[3] VCCDFTERM[2] C4791
2
P1V5S_VCCAFDI_VRM
AJ16 0.1UF_16V_2
VCCDFTERM[3]
NAND / SPI
2
15MIL AP16 VCCVRM[2]
P1V05S VCCDFTERM[4] AJ17
R4946 P3V3A
1 2 P1V05S_VCCAFDIPLL BG6 VccAFDIPLL
P1V05S
FDI
0_5%_2_DY
P1V05S 20MIL AP17 VCCIO[27]
VCCSPI V1 15MIL
1
15MIL AU20 VCCDMI[2]
C4792
1UF_6.3V_2
2
A A
P1V5S_VCCAFDI_VRM P1V5S
R4949
1 2
40MIL
0_5%_3
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V05S P1V05S
P3V3A R4865
U4700
3A REFERENCE 4700~4949(PCH)
1 2 P1V05S_VCCACLKAD49 N26
P3V3S 15MIL
VCCACLK
POWER VCCIO[29]
1
0_5%_2_DY
C4803 VCCIO[30] P26
2 1 1 R4866 2T16 C4829
VCCDSW3_3
0_5%_2 VCCIO[31] P28 1UF_6.3V_2
1
0.1UF_16V_2
C4804
2 1 V12 T27
2
C4801 C4802 DCPSUSBYP VCCIO[32]
P3V3A
2
0.1UF_16V_2 10UF_6.3V_3 0.1UF_16V_2_DY
T29
VCCIO[33] P3V3A
20MIL T38 VCC3_3[5]
NC
2
2
P1V05S D4708 BAT54_30V_0.2A
T23 10MIL 3 1
VCCSUS3_3[7]
P1V05S 1 R4867 2 P1V05S_VCCAPLLDMI2
BH23 VCCAPLLDMI2
T24 C4830 P5V0A
USB
0_5%_2_DY VCCSUS3_3[8]
1 2
20MIL AL29 VCCIO[14]
VCCSUS3_3[9] V23 0.1UF_16V_2

D R4869 1 210_5%_5
C4805
1 2 AL24 V24 P3V3A D
DCPSUS[3] VCCSUS3_3[10]
P1V05S 1UF_6.3V_2_DY
P24 10MIL
VCCSUS3_3[6]
C4833 1 20.1UF_16V_2
C4831
1.1A AA19 VCCASW[1]
1 2 P1V05S
Clock and Miscellaneous

AA21 T26 20MIL
VCCASW[2] VCCIO[34] 0.1UF_16V_2
2
AA24 M26 V5REF_SUS 10MIL P3V3S
C4806 C4807 VCCASW[3] V5REF_SUS
NC
22UF_6.3V_5 22UF_6.3V_5
AA26 D4709 3 1BAT54_30V_0.2A
VCCASW[4] C4832
DCPSUS[4] AN23 2 1 P3V3A
2
AA27 VCCASW[5]
P5V0S
P1V05S 1UF_6.3V_2_DY
VCCSUS3_3[1] AN24 10MIL
AA29 VCCASW[6] R4870 1 2 10_5%_5
AA31 VCCASW[7]
C4834
10MIL
1
1
AC26 VCCASW[8] V5REF P34 V5REF 1 2
C4808 C4809 C4810
AC27 1UF_6.3V_2
VCCASW[9] P3V3A
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 VCCSUS3_3[2] N20
AC29
PCI/GPIO/LPC
C VCCASW[10] C
10MIL
2
2
VCCSUS3_3[3] N22
AC31 VCCASW[11] C4835
VCCSUS3_3[4] P20 1 2
AD29 VCCASW[12]
P22 1UF_6.3V_2
P1V05S VCCSUS3_3[5]
AD31 VCCASW[13] P3V3S
L4706
1 2 P1V05S_VCCADPLLA W21 AA16 20MIL
VCCASW[14] VCC3_3[1]
1
FBM_11_160808_121T
W23 W16 C4836 1 20.1UF_16V_2 P3V3S
VCCASW[15] VCC3_3[8]
C4812 C4813 C4814

W24 VCCASW[16] VCC3_3[4] T34
22UF_6.3V_5_DY 1UF_6.3V_2 10UF_6.3V_3 C4837 1 20.1UF_16V_2
W26 VCCASW[17]
1
2
C4811 W29 VCCASW[18] P3V3S

0.1UF_16V_2
W31 VCCASW[19]
VCC3_3[2] AJ2 20MIL

2
L4707 W33 VCCASW[20]

1 2 P1V05S_VCCADPLLB C4838 1 20.1UF_16V_2
VCCIO[5] AF13
1
B FBM_11_160808_121T
P1V05S B
N16
C4815 C4816 C4817 P1V5S_VCCAFDI_VRM DCPRTC
VCCIO[12] AH13 20MIL

C4839
22UF_6.3V_5_DY 1UF_6.3V_2 10UF_6.3V_3
15MIL Y49 VCCVRM[4] VCCIO[13] AH14 1 2
SATA
2
1UF_6.3V_2
AF14
VCCIO[6] P1V05S
15MIL BD47 VCCADPLLA L4708
AK1 P1V05S_VCCAPLLSATA 1 2
VCCAPLLSATA P1V5S_VCCAFDI_VRM
15MIL BF47 VCCADPLLB
P1V05S 0603_DY
VCCVRM[1] AF11 10MIL

20MIL AF17 VCCIO[7]
C4818 1UF_6.3V_2 AF33 VCCDIFFCLKN[1]
P1V05S
2 1 15MIL AF34 VCCDIFFCLKN[2] VCCIO[2] AC16
AG34 VCCDIFFCLKN[3]
C4819 1UF_6.3V_2
2 1 VCCIO[3] AC17 20MIL
C4840
15MIL AG33 VCCSSC VCCIO[4] AD17 1 2
C4820 1UF_6.3V_2
1UF_6.3V_2
2 1
C4821 0.1UF_16V_2 V16 DCPSST
2 1
A A
MISC
C4822 T17 T21

DCPSUS[1] VCCASW[22] P1V05S
1 2 V19
P1V05S DCPSUS[2]
1UF_6.3V_2_DY
VCCASW[23] V21 20MIL
CPU
10MIL BJ8 V_PROC_IO

1
VCCASW[21] T19
P3V3A
C4823 C4824 C4825 P3V3_RTC
RTC
HDA
INVENTEC
4.7UF_6.3V_3
0.1UF_16V_2 0.1UF_16V_2
A22 VCCRTC VCCSUSHDA P32 10MIL
1
1
2
C4841
C4826 C4827 C4828 ITL_PANTHERPOINT_FCBGA_989P
TITLE
0.1UF_16V_2 1UF_6.3V_2 0.1UF_16V_2 0.1UF_16V_2 MODEL,PROJECT,FUNCTION

Block Diagram
2
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4700~4949(PCH) U4700

AY4 VSS[159] VSS[259] H46
AY42 VSS[160] VSS[260] K18
U4700 AY46 K26
VSS[161] VSS[261]
H5 VSS[0]
AY8 VSS[162] VSS[262] K39
B11 VSS[163] VSS[263] K46
AA17 VSS[1] VSS[80] AK38
B15 VSS[164] VSS[264] K7
B19 VSS[165] VSS[265] L18
B23 VSS[166] VSS[266] L2
B27 VSS[167] VSS[267] L20
B31 VSS[168] VSS[268] L26
AB11 VSS[6] VSS[85] AL16
B35 VSS[169] VSS[269] L28
B39 VSS[170] VSS[270] L36
B7 VSS[171] VSS[271] L48
F45 VSS[172] VSS[272] M12
BB12 VSS[173] VSS[273] P16
D BB16 VSS[174] VSS[274] M18
BB20 VSS[175] VSS[275] M22 D
AC19 VSS[13] VSS[92] AL27
BB22 VSS[176] VSS[276] M24
BB24 VSS[177] VSS[277] M30
BB28 VSS[178] VSS[278] M32
BB30 VSS[179] VSS[279] M34
BB38 VSS[180] VSS[280] M38
AC34 VSS[18] VSS[97] AM11
BB4 VSS[181] VSS[281] M4
AC48 VSS[19] VSS[98] AM14
BB46 VSS[182] VSS[282] M42
AD10 VSS[20] VSS[99] AM36
BC14 VSS[183] VSS[283] M46
AD11 VSS[21] VSS[100] AM39
BC18 VSS[184] VSS[284] M8
AD12 VSS[22] VSS[101] AM43
BC2 VSS[185] VSS[285] N18
AD13 VSS[23] VSS[102] AM45
BC22 VSS[186] VSS[286] P30
AD19 VSS[24] VSS[103] AM46
BC26 VSS[187] VSS[287] N47
AD24 VSS[25] VSS[104] AM7
BC32 VSS[188] VSS[288] P11
AD26 VSS[26] VSS[105] AN2
BC34 VSS[189] VSS[289] P18
AD27 VSS[27] VSS[106] AN29
BC36 VSS[190] VSS[290] T33
AD33 VSS[28] VSS[107] AN3
BC40 VSS[191] VSS[291] P40
AD34 VSS[29] VSS[108] AN31
BC42 VSS[192] VSS[292] P43
AD36 VSS[30] VSS[109] AP12
BC48 VSS[193] VSS[293] P47
AD37 VSS[31] VSS[110] AP19
BD46 VSS[194] VSS[294] P7
AD38 VSS[32] VSS[111] AP28
BD5 VSS[195] VSS[295] R2
AD39 VSS[33] VSS[112] AP30
BE22 VSS[196] VSS[296] R48
AD4 VSS[34] VSS[113] AP32
BE26 VSS[197] VSS[297] T12
C AD40 VSS[35] VSS[114] AP38 C
BE40 VSS[198] VSS[298] T31
BF10 VSS[199] VSS[299] T37
AD43 VSS[37] VSS[116] AP42
BF12 VSS[200] VSS[300] T4
AD45 VSS[38] VSS[117] AP46
BF16 VSS[201] VSS[301] W34
BF20 VSS[202] VSS[302] T46
AD8 VSS[40] VSS[119] AR2
BF22 VSS[203] VSS[303] T47
AE2 VSS[41] VSS[120] AR48
BF24 VSS[204] VSS[304] T8
AE3 VSS[42] VSS[121] AT11
BF26 VSS[205] VSS[305] V11
AF10 VSS[43] VSS[122] AT13
BF28 VSS[206] VSS[306] V17
AF12 VSS[44] VSS[123] AT18
BD3 VSS[207] VSS[307] V26
AD14 VSS[45] VSS[124] AT22
BF30 VSS[208] VSS[308] V27
AD16 VSS[46] VSS[125] AT26
BF38 VSS[209] VSS[309] V29
AF16 VSS[47] VSS[126] AT28
BF40 VSS[210] VSS[310] V31
AF19 VSS[48] VSS[127] AT30
BF8 VSS[211] VSS[311] V36
AF24 VSS[49] VSS[128] AT32
BG17 VSS[212] VSS[312] V39
AF26 VSS[50] VSS[129] AT34
BG21 VSS[213] VSS[313] V43
AF27 VSS[51] VSS[130] AT39
BG33 VSS[214] VSS[314] V7
AF29 VSS[52] VSS[131] AT42
BG44 VSS[215] VSS[315] W17
AF31 VSS[53] VSS[132] AT46
BG8 VSS[216] VSS[316] W19
AF38 VSS[54] VSS[133] AT7
BH11 VSS[217] VSS[317] W2
AF4 VSS[55] VSS[134] AU24
BH15 VSS[218] VSS[318] W27
AF42 VSS[56] VSS[135] AU30
BH17 VSS[219] VSS[319] W48
AF46 VSS[57] VSS[136] AV16
B BH19 VSS[220] VSS[320] Y12 B
AF5 VSS[58] VSS[137] AV20
H10 VSS[221] VSS[321] Y38
BH27 VSS[222] VSS[322] Y4
BH31 VSS[223] VSS[323] Y42
AG19 VSS[61] VSS[140] AV38
BH33 VSS[224] VSS[324] Y46
AG2 VSS[62] VSS[141] AV4
BH35 VSS[225] VSS[325] Y8
AG31 VSS[63] VSS[142] AV43
BH39 VSS[226] VSS[328] BG29
AG48 VSS[64] VSS[143] AV8
BH43 VSS[227] VSS[329] N24
AH11 VSS[65] VSS[144] AW14
BH7 VSS[228] VSS[330] AJ3
AH3 VSS[66] VSS[145] AW18
D3 VSS[229] VSS[331] AD47
D12 VSS[230] VSS[333] B43
AH39 VSS[68] VSS[147] AW22
D16 VSS[231] VSS[334] BE10
AH40 VSS[69] VSS[148] AW26
D18 VSS[232] VSS[335] BG41
AH42 VSS[70] VSS[149] AW28
D22 VSS[233] VSS[337] G14
AH46 VSS[71] VSS[150] AW32
D24 VSS[234] VSS[338] H16
D26 VSS[235] VSS[340] T36
AJ19 VSS[73] VSS[152] AW36
D30 VSS[236] VSS[342] BG22
AJ21 VSS[74] VSS[153] AW40
D32 VSS[237] VSS[343] BG24
AJ24 VSS[75] VSS[154] AW48
D34 VSS[238] VSS[344] C22
AJ33 VSS[76] VSS[155] AV11
D38 VSS[239] VSS[345] AP13
AJ34 VSS[77] VSS[156] AY12
D42 VSS[240] VSS[346] M14
AK12 VSS[78] VSS[157] AY22
D8 VSS[241] VSS[347] AP3
AK3 VSS[79] VSS[158] AY28
E18 VSS[242] VSS[348] AP1
E26 VSS[243] VSS[349] BE16
ITL_PANTHERPOINT_FCBGA_989P G18 BC16
A VSS[244] VSS[350] A
G20 VSS[245] VSS[351] BG28
G26 VSS[246] VSS[352] BJ28
G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26
H30
H32
VSS[254]
VSS[255]
VSS[256]
INVENTEC
H34 VSS[257]
TITLE
F3 VSS[258]
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVBAT
CN5400
E1 E1 E2 E2
1
C5433
+
CN5400
133 GND GND 134
68UF_25V PEG_RX2_DN 135 136 PEG_C_TX2_DN
62B4 PEX_RX2# PEX_TX2# 47D1
IN OUT
PEG_RX2_DP 137 138 PEG_C_TX2_DP
2
62B4 IN PEX_RX2 PEX_TX2
OUT 47B1
D 139 140
GND GND
PEG_RX1_DN 141 142 PEG_C_TX1_DN D
62B4 PEX_RX1# PEX_TX1# 47D1
IN OUT
62B4 PEG_RX1_DP 143 PEX_RX1 PEX_TX1 144 PEG_C_TX1_DP 47B1
IN OUT
E3 E3 E4 E4 145 GND GND 146
P3V3S 62B4 PEG_RX0_DN 147 PEX_RX0# PEX_TX0# 148 PEG_C_TX0_DN 47D1
IN OUT
62B4 PEG_RX0_DP 149 PEX_RX0 PEX_TX0 150 PEG_C_TX0_DP 47B1
IN OUT
151 GND GND 152
53C3 MXM_CLK_PEG_DN 153 154 MXM_CLKREQ# 53C3
P5V0S OUT PEX_PEFCLK# PEX_CLK_REQ#
OUT
10K_5%_2_DY
53C3 MXM_CLK_PEG_DP 155 PEX_PEFCLK PEX_RST 156 MXM_RST# 62C5
OUT IN
10K_5%_2
10K_5%_2
R5401
R5402
R5403
157 GND VGA_DDC_DAT 158 MXM_CRT_DDCDATA 38B8
OUT
159 RSVD VGA_DDC_CLK 160 MXM_CRT_DDCCLK 38B8
OUT
161 RSVD VGA_VSYNC 162 MXM_CRT_VSYNC 38C8
OUT
C5432 163 RSVD VGA_HSYNC 164 MXM_CRT_HSYNC 38B8
OUT
2
2 + 1 E5 E5 PRSNT_R# 2 165 RSVD GND 166
WAKE# 4 167 RSVD VGA_RED 168 MXM_CRTR 38C8
OUT
330UF_6.3V PWR_GOOD 6 DGPU_PWROK 57C6 37A8 MXM_LVDS_TXCB_DN 169 LVDS_UCLK# VGA_GREEN 170 MXM_CRTG 38C8
OUT OUT OUT
PWR_EN 8 EN_DGPU 14B2 37A8 MXM_LVDS_TXCB_DP 171 LVDS_UCLK VGA_BLUE 172 MXM_CRTB 38C8
IN OUT OUT
RSVD 10 173 GND GND 174
E6 E6 RSVD 12 175 LVDS_UTX3# LVDS_LCLK# 176 MXM_LVDS_TXCA_DN 37B8
OUT
RSVD 14 177 LVDS_UTX3 LVDS_LCLK 178 MXM_LVDS_TXCA_DP 37A8
OUT
RSVD 16 179 GND GND 180
PWR_LEVEL 18 ACPRESENT 21D6 54A5 54A6 37A8 MXM_LVDS_TXDB2_DN 181 LVDS_UTX2# LVDS_LTX3# 182
IN OUT
19 PEX_STD_SW# TH_OVERT# 20 MXM_TH_OVERT# 62A6 37A8 MXM_LVDS_TXDB2_DP 183 LVDS_UTX2 LVDS_LTX3 184
IN OUT
C 21 VGA_DISABLE# TH_ALERT# 22 MXM_TH_ALERT# 62A6 185 GND GND 186 C
IN
62D7 37D7 MXM_LCM_VDDEN 23 PNL_PWR_EN TH_PWM 24 37A8 MXM_LVDS_TXDB1_DN 187 LVDS_UTX1# LVDS_LTX2# 188 MXM_LVDS_TXDA2_DN 37B8
OUT OUT OUT
62D7 37C8 MXM_LCM_BKLTEN 25 PNL_BL_EN GPIO0 26 37A8 MXM_LVDS_TXDB1_DP 189 LVDS_UTX1 LVDS_LTX2 190 MXM_LVDS_TXDA2_DP 37B8
OUT OUT OUT
37B5 MXM_INV_PWM_3 27 PNL_BL_PWM GPIO1 28 191 GND GND 192
OUT
62D7 29 HDMI_CEC GPIO2 30 37A8 MXM_LVDS_TXDB0_DN 193 LVDS_UTX0# LVDS_LTX1# 194 MXM_LVDS_TXDA1_DN 37B8
OUT OUT
31 DVI_HPD SMB_DAT 32 MXM_SMB2_DATA 62C7 37A8 MXM_LVDS_TXDB0_DP 195 LVDS_UTX0 LVDS_LTX1 196 MXM_LVDS_TXDA1_DP 37B8
OUT OUT OUT
37C4 MXM_LVDS_DDCDATA 33 LVDS_DDC_DAT SMB_CLK 34 MXM_SMB2_CLK 62D7 197 GND GND 198
BI OUT
37C4 MXM_LVDS_DDCCLK 35 LVDS_DDC_CLK GND 36 39D7 MXM_HDMI_TX2_DN 199 DP_C_L0# LVDS_LTX0# 200 MXM_LVDS_TXDA0_DN 37B8
BI OUT OUT
37 GND OEM 38 39D7 MXM_HDMI_TX2_DP 201 DP_C_L0 LVDS_LTX0 202 MXM_LVDS_TXDA0_DP 37B8
OUT OUT
39 OEM OEM 40 203 GND GND 204
41 OEM OEM 42 39D7 MXM_HDMI_TX1_DN 205 DP_C_L1# DP_D_L0# 206 MXM_EDP_TX0_DN 36C8
OUT OUT
43 OEM OEM 44 39D7 MXM_HDMI_TX1_DP 207 DP_C_L1 DP_D_L0 208 MXM_EDP_TX0_DP 36C8
OUT OUT
45 OEM GND 46 209 GND GND 210
47 GND PEX_TX15# 48 PEG_C_TX15_DN 47B1 39D7 MXM_HDMI_TX0_DN 211 DP_C_L2# DP_D_L1# 212 MXM_EDP_TX1_DN 36B8
OUT OUT OUT
62D4 PEG_RX15_DN 49 PEX_RX15# PEX_TX15 50 PEG_C_TX15_DP 47A1 39D7 MXM_HDMI_TX0_DP 213 DP_C_L2 DP_D_L1 214 MXM_EDP_TX1_DP 36C8
IN OUT OUT OUT
62D4 PEG_RX15_DP 51 PEX_RX15 GND 52 215 GND GND 216
IN
53 GND PEX_TX14# 54 PEG_C_TX14_DN 47B1 39C7 MXM_HDMI_TXC_DN 217 DP_C_L3# DP_D_L2# 218 MXM_EDP_TX2_DN 36B8
OUT OUT OUT
62D4 PEG_RX14_DN 55 PEX_RX14# PEX_TX14 56 PEG_C_TX14_DP 47A1 39C7 MXM_HDMI_TXC_DP 219 DP_C_L3 DP_D_L2 220 MXM_EDP_TX2_DP 36B8
IN OUT OUT OUT
62D4 PEG_RX14_DP 57 PEX_RX14 GND 58 221 GND GND 222
IN
59 GND PEX_TX13# 60 PEG_C_TX13_DN 47C1 39B8 MXM_HDMI_DDCDATA 223 DP_C_AUX# DP_D_L3# 224 MXM_EDP_TX3_DN 36B8
OUT OUT OUT
62D4 PEG_RX13_DN 61 PEX_RX13# PEX_TX13 62 PEG_C_TX13_DP 47A1 39B8 MXM_HDMI_DDCCLK 225 DP_C_AUX DP_D_L3 226 MXM_EDP_TX3_DP 36B8
IN OUT OUT OUT
62D4 PEG_RX13_DP 63 PEX_RX13 GND 64 227 RSVD GND 228
IN
65 GND PEX_TX12# 66 PEG_C_TX12_DN 47C1 229 RSVD DP_D_AUX# 230 MXM_EDP_AUX_DN 36C8
B OUT OUT B
62C4 PEG_RX12_DN 67 PEX_RX12# PEX_TX12 68 PEG_C_TX12_DP 47A1 231 RSVD DP_D_AUX 232 MXM_EDP_AUX_DP 36D8
IN OUT OUT
62C4 PEG_RX12_DP 69 PEX_RX12 GND 70 233 RSVD DP_C_HPD 234 MXM_HDMI_HPDET 39A3
IN IN
71 GND PEX_TX11# 72 PEG_C_TX11_DN 47C1 235 RSVD DP_D_HPD 236 MXM_EDP_HPD 36B8
OUT IN
62C4 PEG_RX11_DN 73 PEX_RX11# PEX_TX11 74 PEG_C_TX11_DP 47A1 237 RSVD RSVD 238
IN OUT
62C4 PEG_RX11_DP 75 PEX_RX11 GND 76 239 RSVD RSVD 240
IN
77 GND PEX_TX10# 78 PEG_C_TX10_DN 47C1 241 RSVD RSVD 242
OUT
62C4 PEG_RX10_DN 79 PEX_RX10# PEX_TX10 80 PEG_C_TX10_DP 47A1 243 RSVD GND 244
IN OUT
62C4 PEG_RX10_DP 81 PEX_RX10 GND 82 245 RSVD DP_B_L0# 246
IN
83 GND PEX_TX9# 84 PEG_C_TX9_DN 47C1 247 RSVD DP_B_L0 248
OUT
62C4 PEG_RX9_DN 85 PEX_RX9# PEX_TX9 86 PEG_C_TX9_DP 47B1 249 RSVD GND 250
IN OUT
62C4 PEG_RX9_DP 87 PEX_RX9 GND 88 251 GND DP_B_L1# 252
IN
89 GND PEX_TX8# 90 PEG_C_TX8_DN 47C1 253 DP_A_L0# DP_B_L1 254
OUT
62C4 PEG_RX8_DN 91 PEX_RX8# PEX_TX8 92 PEG_C_TX8_DP 47B1 255 DP_A_L0 GND 256
IN OUT
62C4 PEG_RX8_DP 93 PEX_RX8 GND 94 257 GND DP_B_L2# 258
IN
OUT
62B4 PEG_RX7_DN 97 PEX_RX7# PEX_TX7 98 PEG_C_TX7_DP 47B1 261 DP_A_L1 GND 262
IN OUT
62B4 PEG_RX7_DP 99 PEX_RX7 GND 100 263 GND DP_B_L3# 264
IN
OUT
62B4 PEG_RX6_DN 103 PEX_RX6# PEX_TX6 104 PEG_C_TX6_DP 47B1 267 DP_A_L2 GND 268
IN OUT
62B4 PEG_RX6_DP 105 PEX_RX6 GND 106 269 GND DP_B_AUX# 270
IN
107 GND PEX_TX5# 108 PEG_C_TX5_DN 47C1 271 DP_A_L3# DP_B_AUX 272
OUT P3V3S
62B4 PEG_RX5_DN 109 PEX_RX5# PEX_TX5 110 PEG_C_TX5_DP 47B1 273 DP_A_L3 DP_B_HPD 274
IN OUT
62B4 PEG_RX5_DP 111 PEX_RX5 GND 112 275 GND DP_A_HPD 276
IN
113 GND PEX_TX4# 114 PEG_C_TX4_DN 47C1 277 DP_A_AUX# 3V3 278
A OUT A
62B4 PEG_RX4_DN 115 PEX_RX4# PEX_TX4 116 PEG_C_TX4_DP 47B1 279 DP_A_AUX 3V3 280
IN OUT
PEG_RX4_DP
1
62B4 117 PEX_RX4 GND 118 281 PRSNT_L#
IN
119 GND PEX_TX3# 120 PEG_C_TX3_DN 47C1 G1 G G G2 C5434
OUT
+
62B4 PEG_RX3_DN 121 PEX_RX3# PEX_TX3 122 PEG_C_TX3_DP 47B1
IN OUT STECH_B35P101_01023_H_314P
62B4 PEG_RX3_DP 123 PEX_RX3 GND 124
IN 330UF_6.3V
125 GND
2
STECH_B35P101_01023_H_314P
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MXM_LCM_VDDEN 1 R5411 2
61C8 37D7
IN
100K_5%_2
MXM_INV_PWM_3 1 R5410 2
61C8 37B5
IN
100K_5%_2
MXM_LCM_BKLTEN 1 R5400 2
61C8 37C8
IN
100K_5%_2
P3V3S
D
D
1
R5407 R5406 61B8 PEG_RX15_DN C5400 1 0.1UF_6.3V_1 PEG_C_RX15_DN
2 47C4
IN OUT
1
61B8 PEG_RX15_DP C5401 1 0.1UF_6.3V_1 PEG_C_RX15_DP
2 47C4
2.2K_5%_2 Q5400 IN OUT
G
2.2K_5%_2 PEG_RX14_DN C5402
61B8
IN
1 0.1UF_6.3V_1 PEG_C_RX14_DN
2
OUT 47C4
2
61C5 MXM_SMB2_CLK 2 S D 3 EC_SMB2_CLK 5A7 21D2 21D3 40C6 61B8 PEG_RX14_DP C5403 1 0.1UF_6.3V_1 PEG_C_RX14_DP
2 47C4
IN OUT IN OUT
1
61B8 PEG_RX13_DN C5404 1 0.1UF_6.3V_1 PEG_C_RX13_DN
2 47D4
Q5401 SSM3K7002BFU IN OUT
PEG_RX13_DP C5405 0.1UF_6.3V_1 PEG_C_RX13_DP
G
61B8 1 2 47C4
IN OUT
61B8 PEG_RX12_DN C5406 1 0.1UF_6.3V_1 PEG_C_RX12_DN
2 47D4
61C5 MXM_SMB2_DATA 2 S D 3 EC_SMB2_DATA 5A7 21D2 21D3 40C3 IN OUT
IN OUT
61B8 PEG_RX12_DP C5407 1 0.1UF_6.3V_1 PEG_C_RX12_DP
2 47C4
IN OUT
SSM3K7002BFU
R5412
1 2
61B8 PEG_RX11_DN C5408 1 2
0.1UF_6.3V_1 PEG_C_RX11_DN 47D4
IN OUT
0_5%_2_DY PEG_RX11_DP C5409 1 2 PEG_C_RX11_DP
61B8
IN 0.1UF_6.3V_1 OUT 47C4
P3V3S 61B8 PEG_RX10_DN C5410 1 2

0.1UF_6.3V_1 PEG_C_RX10_DN 47D4
IN OUT
C 61B8 PEG_RX10_DP C5411 1 2
0.1UF_6.3V_1 PEG_C_RX10_DP 47C4 C
IN OUT
PEG_RX9_DN PEG_C_RX9_DN
5
61B8 C5412 1 2
0.1UF_6.3V_1 47D4
U5400
IN OUT
61B8 PEG_RX9_DP C5413 1 2
0.1UF_6.3V_1 PEG_C_RX9_DP 47C4
BUF_PLT_RST# IN OUT
+
56A8 39A1 35C3 29C3 28C7 28C3 21E3 1
IN
4 MXM_RST# 61D2 61A8 PEG_RX8_DN C5414 1 2 0.1UF_6.3V_1 PEG_C_RX8_DN 47D4
OUT IN OUT
56C7 56B6 DGPU_HOLD_RST# 2
IN PEG_RX8_DP PEG_C_RX8_DP
1
61A8 C5415 1 2 0.1UF_6.3V_1 47C4
IN OUT
100K_5%_2
1
R5404
TC7SZ08FU
100K_5%_2
R5405
2
61A8 PEG_RX7_DN C5416 1 2 0.1UF_6.3V_1 PEG_C_RX7_DN 47D4
IN OUT
2
61A8 PEG_RX7_DP C5417 1 2 0.1UF_6.3V_1 PEG_C_RX7_DP 47C4

IN OUT
IN OUT
IN OUT
IN OUT
IN OUT
IN OUT
B IN OUT B
IN OUT
IN OUT
P3V3S 61D4 PEG_RX2_DN C5426 1 2 0.1UF_6.3V_1 PEG_C_RX2_DN 47D4
IN OUT
61D4 PEG_RX2_DP C5427 1 2 0.1UF_6.3V_1 PEG_C_RX2_DP 47C4
IN OUT
61D4 PEG_RX1_DN C5428 1 2 0.1UF_6.3V_1PEG_C_RX1_DN 47D4
IN OUT
1
1
61D4 PEG_RX1_DP C5429 1 2 0.1UF_6.3V_1PEG_C_RX1_DP 47C4
100K_5%_2
100K_5%_2 IN OUT
R5408
R5409
61D4 PEG_RX0_DN C5430 1 2 0.1UF_6.3V_1 PEG_C_RX0_DN 47D4

IN OUT
61D4 PEG_RX0_DP C5431 1 2 0.1UF_6.3V_1 PEG_C_RX0_DP 47C4
IN OUT
2
61C5 MXM_TH_OVERT#
OUT
61C5 MXM_TH_ALERT#
OUT
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 9000~9999(SMALL BOARD)
POWER BUTTON
D D9000
SW9000 D
4 1 PHP_PESD5V2S2UT_SOT23_3P_DY 1
PAD9000 PWR_SWIN#_3
A B
SMDPAD_1P_40X120
5 2
1
6 C D 3
C9000
MISAKI_NTC017_DA1G_E160T_6P
1000PF_50V_2_DY
2
PAD9001
1
SMDPAD_1P_40X120 GND
DGND_PWRSW_DB
C C
P5V0S_PBN
D9001
R9001
PAD9002
1 2 2 1 PWRBTN_LED#_L 1 PWRBTN_LED#
SMDPAD_1P_40X120
150_5%_2
19_217_T1D_CP1Q2QY_3T
PAD9003
1 POWER
SMDPAD_1P_40X120
B B
FIX9000 FIX9001 FIX9002

1
FIX_MASK FIX_MASK FIX_MASK
S9000
1
SCREW540_700_NP_1P
S9001
1
SCREW540_700_NP_1P
A A
DGND_PWRSW_DB
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 1000~1099(3D SENSOR) P3V3S_HDP
P3V3S_HDP
1
P5V0S C1002 C1003
1
U1001
1 GND Reserved 9
U1000 1UF_6.3V_2 0.1UF_10V_2 2 10
R1000 Vdd Reserved
GMT_G916T1UF_SOT23_5_5P HDP_XOUT 3 11
1 5 16.5K_1%_2 65B1 OUT VOUTX
Reserved
2
IN OUT
65B6 HDP_ST# 4 ST Vdd 12
OUT
1
65B1 HDP_YOUT 5 VOUTY GND 13
4 OUT
1 2
SET
C1000 6 PD NC 14
3
GND
SHDN#
65B1 HDP_ZOUT 7 VOUTZ NC 15
OUT
1
1UF_6.3V_2 8 16
FS NC
R1001
C1001 ST_TSH35TR_LGA_16P
2
10K_1%_2
D 0.1UF_10V_2
2
D
2
P3V3S_HDP P3V3S_HDP
SSM3K7002BFU
2
R1011 R1010
1
4.7K_5%_2 4.7K_5%_2
Q1000
1
SSM3K7002BFU
21D3 21D2 5D4 EC_SMB1_CLK 3 2 HDP_CLK 65B6
BI D S
BI
1
Q1001
G
C C
EC_SMB1_DATA
21D3 21D2 5D4 3 2 HDP_DATA 65B2
BI D S
BI
P3V3S_HDP
P3V3S_HDP
P3V3S_HDP
1
C1015
2
1
2
0.1UF_10V_2
C1005 C1006
R1003 R1002 R1004
2
4.7K_5%_2 4.7K_5%_2 4.7K_5%_2 0.1UF_10V_2 0.1UF_10V_2
1
2
P3V3S_HDP
1
P3V3S_HDP
B P3V3S_HDP B
1
R1005
2
1
5
56.2K_1%_2 R1006 U1002

NC
D1000 U1003 0_5%_2_DY 65C2 HDP_CLK 1 P3_5-SSCK-SCL-CMP1_2 P3_4-SCS#-SDA-CMP1_1 20 HDP_DATA 65C2

BI BI
HDP_ST#
NC
65D2 2 P3_7-CNTR0#-SSO-TXD1 P3_3-TCIN-INT3#-SSI00-CMP1_0 19

54B2 IN
2
SLP_S3#_3R3 1 2 4 3 18 HDP_YOUT
2
14B8 14B4 14A6 IN RESET# P1_0-KI0#-AN8-CMP0_0

IN 65D2
50D3 21D6 14D2 HDP_XOUT
1
4 XOUT-P4_7 P1_1-KI1#-AN9-CMP0_1 17 65D2

IN
- 5 VSS-AVSS P4_2-VREF 16
BAT54_30V_0.2A PHP_74LVC1G17_SOT753_5P 6 15 HDP_ZOUT
XIN-P4_6 P1_2-KI2#-AN10-CMP0_2
IN 65D2
C1007 7 14 HDP_LOC
3
VCC-AVCC P1_3-KI3#-AN11-TZOUT
OUT 56B6
0.1UF_10V_2 TP1000
1
R1007 8 MODE P1_4-TXD0 13 1
TP1001
HDP_INT# 1 2 9 12 1
2
21B6 IN P4_5-INT0#-RXD1 P1_5-RXD0-CNTR01-INT11#

TP30 C1008
10 P1_7-CNTR00-INT10# P1_6-CLK0-SSI01 11 HDP_ACT 21D6
TP30 IN
1
1K_5%_2 RENESAS_R5F211B4D34SP_LSSOP_20P 0.033UF_16V
1
R1008
2
R1009
47K_5%_2 C1009
47K_5%_2
0.033UF_16V
1
2
2
C1010
0.033UF_16V
A A
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 390~399
D
D
C C
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S_USB3_DB CN2406
P5V0A_USB3_DB
67C4 USB2_CN_TX1_DN 1 1
BI
67C4 USB2_CN_TX1_DP 2 2
BI
2
67C8 USB3_CN_RX1_DP 3 3
BI
1
R2409 R2411 R2449 67C8 USB3_CN_RX1_DN 4 4
BI
RSC_0402_DY RSC_0402_DY RSC_0402_DY 67C7 USB3_CN_TX1_DP 5
P3V3S_USB3_DB BI 5 P5V0A_DB C2407
+
67D7 USB3_CN_TX1_DN 6 6
BI
7 7
1
SB_USB_1_DB 8 CURRENT LIMIT 2.5A 100UF_6.3V
67D3 IN 8
P5V0A_DB USB_OC#_1_DB 9
2
67D1 OUT 9 U2404
10 10 1 GND OUT 8 DGND_USB3_DB
11 2 7
P3V3S_USB3_DB 11 IN OUT
12 12 3 IN OUT 6
13 13 67D4 SB_USB_1_DB 4 EN OC# USB_OC#_1_DB
5 67D4
IN OUT
1
14 14
R2401 USB3_CN_TX2_DN 15 GMT_G547E1P81U_MSOP_8P
D 1 2 67A7 BI 15
USB3_CN_TX2_DP 16 G1 C2430
67A7 BI 16 G D
USB3_CN_RX2_DN 17 G2 47UF_6.3V_5
10K_5%_2 67A8 BI 17 G
67A8 USB3_CN_RX2_DP 18 18
BI
USB2_CN_TX2_DP 19
2
67B3 BI 19
DGND_USB3_DB 67B3 USB2_CN_TX2_DN 20 20

BI
6
5
4
3
2
1
U2411 DGND_USB3_DB
TI_SN65LVPE502RGER_QFN_24P
ACES_50501_02041_001_20P
GND
VCC
OS1
EQ1
DE1
EN_RXD
TML 25
7 NC NC 24
67D4 USB3_CN_TX1_DN 8 23 USB3_DB_TX1_DNC2508
1 2
0.1UF_16V_2 USB3_DB_TX1_C_DN 67C4
BI RX- TX1-
BI DGND_USB3_DB P5V0A_USB3_DB
67D4 USB3_CN_TX1_DP 9 RX+ TX1+ 22 USB3_DB_TX1_DPC2507
1 2
0.1UF_16V_2 USB3_DB_TX1_C_DP 67C4
BI BI
10 GND GND 21
67D4 USB3_CN_RX1_DN 1
C2506 2
0.1UF_16V_2 USB3_C_RX1_DN 11 TX2- RX2+ 20 USB3_DB_RX1_DP 67C4
BI BI
67D4 USB3_CN_RX1_DP 1
C2505 2
0.1UF_16V_2 USB3_C_RX1_DP 12 TX2+ RX2- 19 USB3_DB_RX1_DN 67C4
BI BI
1
GND
VCC
OS2
EQ2
DE2
CM
P3V3S_USB3_DB P3V3S_USB3_DB C2495 C2496 C2497
13
2 14
15
16
17
18
DGND_USB3_DB 22UF_6.3V_5 0.1UF_16V_2 1000PF_50V_2
1
2
C2504 R2402
R2421 R2426 R2428
0.1UF_16V_2 10K_5%_2 L2402 CN2403
C RSC_0402_DY RSC_0402_DY RSC_0402_DY
WCM_2012_900T 1 C
VBUS DGND_USB3_DB
USB2_CN_TX1_DN 1 2 USB2_DB_TX1_DN 2
1
67D4 BI D-
2
1
67D4 USB2_CN_TX1_DP 4 3 USB2_DB_TX1_DP 3 D+
BI
4 PGND
DGND_USB3_DB DGND_USB3_DB USB3_DB_RX1_DN 1 2 USB3_DB_R_RX1_DN 5
67C5 BI R2407 0_5%_3 SSRX-
67C5 USB3_DB_RX1_DP R2412 1 2 0_5%_3 USB3_DB_R_RX1_DP 6 SSRX+ G G1

BI
7 GND G G2
67D4 USB3_DB_TX1_C_DN R2450 1 2 0_5%_3 USB3_DB_R_TX1_C_DN 8 SSTX- G G3
BI
67C4 USB3_DB_TX1_C_DP R2425 1 2 0_5%_3 USB3_DB_R_TX1_C_DP 9 SSTX+ G G4
BI
OCTEK_USB_09EREB_9P
DGND_USB3_DB DGND_USB3_DB
P3V3S_USB3_DB
P5V0A_USB3_DB
2
R2419 R2417
1
R2413
B P3V3S_USB3_DB RSC_0402_DY RSC_0402_DY B
RSC_0402_DY C2449
C2450
C2439
1
0.1UF_16V_2 1000PF_50V_2
22UF_6.3V_5
2
2
R2404
10K_5%_2
DGND_USB3_DB
L2405 CN2404
WCM_2012_900T 1 VBUS
5 1
DGND_USB3_DB 67D4 USB2_CN_TX2_DN 1 2 USB2_DB_TX2_DN 2 D-

BI
6
4
3
2
1
U2412 67D4 USB2_CN_TX2_DP 4 3 USB2_DB_TX2_DP 3 D+

TI_SN65LVPE502RGER_QFN_24P BI
4 PGND
GND
VCC
OS1
EQ1
DE1
EN_RXD
67A5 USB3_DB_RX2_DN 1 2 USB3_DB_R_RX2_DN 5 SSRX-

TML 25 BI
67A5 USB3_DB_RX2_DP 1
R2429 2 0_5%_3 USB3_DB_R_RX2_DP 6 SSRX+ G G1
7 NC NC 24 BI
R2434 0_5%_3 7 GND G G2
67D4 USB3_CN_TX2_DN 8 RX- TX1- 23 USB3_DB_TX2_DNC2512
1 2
0.1UF_16V_2 USB3_DB_TX2_C_DN 67A3
BI BI 67A4 USB3_DB_TX2_C_DN 1 2 8
USB3_DB_R_TX2_C_DN SSTX- G G3
67D4 USB3_CN_TX2_DP 9 RX+ TX1+ 22 USB3_DB_TX2_DPC2513
1 2
0.1UF_16V_2 USB3_DB_TX2_C_DP 67A3 BI
BI BI 67A4 USB3_DB_TX2_C_DP 1
R2414 2 0_5%_3 9
USB3_DB_R_TX2_C_DP SSTX+ G G4
10 GND GND 21 BI
USB3_CN_RX2_DN 1 2 USB3_C_RX2_DN 11 20 USB3_DB_RX2_DP R2420 0_5%_3
67D4 C2510 0.1UF_16V_2 TX2- RX2+ 67A3
BI BI
67D4 USB3_CN_RX2_DP 1
C2511 2
0.1UF_16V_2 USB3_C_RX2_DP 12 TX2+ RX2- 19 USB3_DB_RX2_DN 67A3 OCTEK_USB_09EREB_9P
BI BI
GND
VCC
OS2
EQ2
DE2
CM
DGND_USB3_DB DGND_USB3_DB
13
14
15
16
17
18
A A
P3V3S_USB3_DB
P3V3S_USB3_DB DGND_USB3_DB
2
R2443 R2445
1
R2441
RSC_0402_DY RSC_0402_DY
RSC_0402_DY
2
C2509
0.1UF_16V_2
1
R2403
10K_5%_2
INVENTEC
2
DGND_USB3_DB TITLE
DGND_USB3_DB MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C P5V0S C
CN100
Q100
4 S D 1 1 1 3 G1
2 2 2 4 G2
5
3 G 6
PMOS_4D1S
ACES_50224_00201_001_2P
TPC6111
P5V0S
R100
1 2
10K_5%_2
Q101
3
D
21D6 LOGO_LED 1 G
IN
2
SSM3K7002BFU
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
3D/ECO VISION
D9003
SW9001 PHP_PESD5V2S2UT_SOT23_3P_DY
PAD9005
4 A B 1 1
SMDPAD_1P_40X120 ECO_BTN#
5 2
1
6 C D 3
C9003
MISAKI_NTC017_DA1G_E160T_6P
C 1000PF_50V_2_DY C
2
PAD9006
1
SMDPAD_1P_40X120 GND
DGND_PWRSW_DB
P5V0S_PBN
D9002
R9002
PAD9008
ECO_LED#
1 2 2 1 ECO_LED#_L 1
B SMDPAD_1P_40X120 B
150_5%_2
19_217_T1D_CP1Q2QY_3T
PAD9007
1 POWER
SMDPAD_1P_40X120
FIX9003 FIX9004 FIX9005

1
FIX_MASK FIX_MASK FIX_MASK
S9002
1
SCREW540_700_NP_1P
S9003
1
A A
SCREW540_700_NP_1P
DGND_PWRSW_DB
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS

XXX 21-OCT-2002
8 7 6 5 4 3 2 1

gl10fh 0908 2140 PDF

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

gl10fh 0908 2140 PDF

Uploaded by

Copyright:

Available Formats

8 7 6 5 4 3 2 1

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

F HSF Property:ROHS or Halogen-Free(5L3?) F

EE DATE POWER DATE

21-OCT-2002 SIZE= VER: SIZE CODE DOC.NUMBER REV

PAGE PAGE PAGE

7. POWER +V1.5/+V0.75 32. USB 2.0 CONN 56. PCH 5 USB

CHANGE by DATE SHEET 2 of 70

EDP INTERNAL MIC IN

AUDIO CODEC EXT MIC IN

THERMAL SENSOR SATA6: ODD

DC/DC & IMVP 7

CHANGE by DATE SHEET 3 of 70

ADAPTOR +VBAT +V5A_+-5% +V5S

EC_SMB2 POWER BUDGET 12.139 A POWER BUDGET 4.711AINRUSH 0.9A

+VCORE1_+-0.5% TPS51123 AO6402L AM2321P

POWER BUDGET 20.070A V1.5_+-5% +V0.75S

POWER BUDGET 13.7 A

AVG CURRENT ~~TEST RESULT(MAX CURRENT) MODEL,PROJECT,FUNCTION

CHANGE by DATE SHEET 4 of 70

D6701 D6702 D6703 SYN_200045GR009G15JZR_9P

Q6010 Q6011 R6000 Q6012 C6033

470PF_50V_2 4.7UF_25V_5 4.7UF_25V_5 CSC0805_DY

CHANGE by DATE SHEET 5 of 70

R6100 RSC_0603_DY 14C6 VRP3V3A_LDO RSC_0603_DY

330UF_6.3V VRP5V0A_VIN VRP5V0A_LDO

VOUT=((R6100/R6101)+1)*2 VRP5V0A_LG 6B3 14D5 6B3 14D5

CHANGE by DATE SHEET 6 of 70

CHANGE by DATE SHEET 7 of 70

CHANGE by DATE SHEET 8 of 70

14B7 EN_VCCP PVBAT

VSS_SENSE_VCCIO 0_5%_2_DY 3 10 VRP1V0_VCCP_LG L6300

CHANGE by DATE SHEET 9 of 70

SA_PG 14A6 21B6

CHANGE by DATE SHEET 10 of 70

R6620 R6622 PVBAT

R6711 49B1 11A3 BI VDIO TI_TPS51650RSLR_QFN_48P CDL2

1 2 VREF_CPU 11A7 11B7 11C8 11D4 11D6 11D7

11D7 11D6 11D4 11C8 11B7 11A4 VREF_CPU 1 2

C6727 CORE_PG VR_SVID_CLK

AXG_PG VR_SVID_DATA Block Diagram

CHANGE by DATE SHEET 11 of 70

1 2 1 2 R6707 R6708 R6709

11B5 GPWM2 3 PWM VDD 6 L6720

CHANGE by DATE SHEET 12 of 70

CHANGE by DATE SHEET 13 of 70

VRP5V0A 1 R7001 2 SKIP_3V_5V VRP3V3A_LDO1 2

VCCIO VCCSA DGPU P1V8S

21B6 14A6 10A5 21B6 14A6 10A5 SA_PG SA_PG

CHANGE by DATE SHEET 14 of 70

P15V0A AO6402AL_DY P3V3S

15A4 SLP_S3_3R 1 G 15B4

CHANGE by DATE SHEET 15 of 70

DURING RESET AFTER RESET

HIGH HIGH 0 : DGPU POWER SWITCH TURNED ON

0 : DGPU POWER IS NOT STABLE

0 : KEEP DGPU IN RESET

CHANGE by DATE SHEET 16 of 70

REFERENCE 0~49(PCB SCREW)

PCB CPU GPU WLAN

CHANGE by DATE SHEET 17 of 70

REFERENCE 50-99(HALL SENSOR)