Electrical Power and Energy Systems 119 (2020) 105950

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Electrical Power and Energy Systems

journal homepage: www.elsevier.com/locate/ijepes

A novel cascaded control to improve stability and inertia of parallel buck- T

boost converters in DC microgrid
⁎
Zhiping Chenga, Zhongwen Lia, , Shuihui Lib, Jinfeng Gaoa, Jikai Sia, Himadry Shekhar Dasb,
Weizhen Dongb
a
School of Electrical Engineering, Zhengzhou University, Zhengzhou 450001, China
b
Department of Electrical & Computer Engineering, The University of Alabama, Tuscaloosa, AL 35487, USA

A R T I C LE I N FO A B S T R A C T

Keywords: To deal with the issues caused by the high integration of renewable resources, the parallel operation of the
Buck-boost Converter converters is generally required to improve the system stability and reliability. To support the parallel operation
DC microgrid of buck-boost DC/DC converters, they are generally regulated by a cascaded control strategy, which includes
Droop control droop control loop, and nested proportional-integral (PI) based voltage and current control loops. However, it
Nonsingular terminal sliding-mode control
can provide barely inertia support and needs precise system model to reach the desired performance. In order to
(NTSMC)
overcome these drawbacks, this paper proposes a novel cascaded control strategy for parallel operation of buck-
Virtual inertia control
boost DC/DC converters. The proposed cascaded control strategy involves a voltage synchronization loop, a
virtual inertia control (VIC) loop, and two nested NTSMC based voltage and current control loops. The voltage
synchronization controller can enable the plug and play requirements by synchronizing the output voltage of the
converter with the voltage at the point of common coupling (PCC) before connecting a DC/DC converter to the
DC microgrid. The VIC can improve the inertia of the converter-interfaced DGs. The nested-loop NTSMC based
voltage and current controller can improve the robustness of converter system. Hardware experiments de-
monstrate the improved performance of the proposed control strategy.

1. Introduction
Nowadays, in order to alleviate the environmental and energy is-
sues, microgrids (MGs) have attracted more and more attention as they
can efficiently integrate converter-interfaced distributed generators
(DGs), such as battery, wind, solar, fuel cell, etc. [1]. Based on the
voltage type, microgrids can be categorized into AC microgrids, DC
microgrids, and hybrid AC/DC microgrids [2]. Recently, DC microgrids
are gaining more attention because they can efficiently integrate DGs
by avoiding the AC/DC and DC/AC conversion stages [3] and the
complex frequency and reactive power regulation issues [4]. The DC/
DC power converters play significant roles in integrating DGs into the
DC microgrids [5,6]. Generally, there are several kinds of DC/DC
converters, such as buck converters [7,8], boost converters [9], and
buck-boost converters [10]. For a buck converter, the output voltage
can only be regulated lower than the input voltage; for a boost con-
verter, the output voltage can only be regulated higher than the input
voltage; for a buck-boost converter, the output voltage can be regulated
both lower and higher than the input voltage. Generally, the ability to
regulate the output voltage in a larger voltage range is required for
many of the converter-interfaced DGs [10], such as battery cells [11],
or PV cells [12]. Furthermore, through parallel operation of the buck-
boost converters, the system capacity can be easily expanded, and the
system stability and reliability can be improved [13]. Thus, the control
strategy for parallel buck-boost converters is investigated in this paper.
It should be noted that there are many kinds of buck-boost converter
topologies, such as conventional buck-boost converter [14], cascaded
buck-boost converter [15], double-switch buck-boost converter [16],
and isolated buck-boost converter [17], etc. Although, the conventional
buck-boost converter may not show high performance compared to the
advanced buck-boost topologies, the conventional buck-boost converter
shows the advantages of a minimum component count, low cost and
characteristics that are representative to other advanced buck-boost
converters. The conventional buck-boost converters are still widely
researched in recent years [18,19] and applied in the motor drive
system [20], DC power supply system [21], and PV generation system
[22], etc. Thus, in this paper, the conventional buck-boost topology is
employed for the research of the proposed methods in control of a DC
microgrid.
In [14], the performance comparison of a non-inverting buck-boost

⁎
Corresponding author.
E-mail address: lzw@zzu.edu.cn (Z. Li).

https://doi.org/10.1016/j.ijepes.2020.105950
Received 16 October 2019; Received in revised form 10 January 2020; Accepted 17 February 2020
0142-0615/ © 2020 Elsevier Ltd. All rights reserved.
Z. Cheng, et al.
Fig. 1. The control structure of parallel buck-boost converter interfaced DGs.
converter and a conventional buck-boost converter is presented. In
[23], the dynamical effects of the memristive load on a buck-boost
converter is studied. Generally, two types of control strategies, i.e., a
single-loop control strategy [18,20,22,24,25] and a cascaded-loop
control strategy [26], can be applied to regulate the output voltage of a
buck-boost converter. In [18], the nonlinear dynamics and chaos in a
buck-boost converter is studied. In [20], a robust voltage tracking
controller is designed for a buck-boost converter applied in a DC motor
drive system. In [22], a single feedback loop based output voltage
control method of a buck-boost converter is proposed. In [24], a sliding
mode controller is designed for a buck-boost converter to regulate its
output voltage, which only involves a single voltage control loop and
does not have the ability to limit the inductor current. Furthermore, it
shows variable switching frequency which is difficult for filter design
and may result in undesired current harmonics. In [25], the dynamics of
a hysteresis current-controlled buck-boost converter was investigated.
Although the single loop based control methods are easy to implement,
the cascaded loop based control methods are more preferred because
they have the ability to explicitly limit and protect against overcurrent
with the introduction of an inner current-loop controller [26]. In [27], a
PI based cascaded control method was proposed for a buck-boost con-
verter. In [28], a linear controller is used for outer voltage loop control,
and a sliding mode control (SMC) based hysteresis controller is used for
inner current loop control. However, this control strategy shows high
ripple due to the oscillations on a switching surface. In recent decades,
SMC based control strategies have been widely applied in industry due
to its strong robustness [29,25,30] and terminal sliding mode control
(TSMC) has been proposed to offer the superior properties of fast and
finite time convergence compared to conventional hyperplane-based
sliding mode methods [31]. However, the TSMC control method may
suffer from a singularity problem [29]. In [31], nonsingular terminal
sliding mode control (NTSMC) was proposed to get rid of the singularity
issue for a robotic manipulator. In this paper, in order to improve the
output voltage regulation performance of a buck-boost converter, a
NTSMC based inner current loop controller and a NTSMC based outer
voltage loop controller are proposed. The proposed control strategy can
easily satisfy the fixed switching frequency requirement through a
PWM unit to generate the switching signals and inherit the robustness
of NTSMC control.
In the case of operating DC/DC converters in parallel, the droop
2
Electrical Power and Energy Systems 119 (2020) 105950
control method [2,32,33] is widely applied to avoid circulating currents
among the converters without the need of any critical communication
between them [13]. However, the droop control method can provide
barely inertia support for the buck-boost converters, which may cause
the voltage of the DC bus changing sharply under load variation, and
may even cause malfunction of the voltage regulation devices that are
installed in the distribution networks. For AC microgrids, several virtual
synchronous generator (VSG) based control methods have been pro-
posed to mimic the behavior and regulating characteristics of conven-
tional synchronous generators [34,35]. However, for DC microgrids,
similar virtual inertia control (VIC) strategies for DC/DC converters
were seldom researched. In [36], a first order low pass filter based VIC
strategy is proposed for renewable energy sources to decrease power
away from maximum power point when the bus voltage of the DC grid
is continuously increasing. In [37], a DC/DC converter is regulated by
mimicking the inertia characteristics of a DC machine to regulate the
DC bus voltage fluctuations caused by power fluctuations in the DC
microgrid. However, the synchronization control for plug and play re-
quirements and parallel operation of DC/DC converters are not con-
sidered. Inspired by the VSG control strategy proposed in [35] for DC/
AC inverters in an AC microgrid, a virtual inertia control (VIC) method
is proposed for parallel buck-boost converters in DC microgrid in this
paper. Furthermore, in order to enable the plug-and-play requirement
of a buck-boost converter, a voltage synchronization control loop is
designed to synchronize the output voltage of the converter with the
PCC voltage before connecting the DC/DC converter to the DC micro-
grid.
Overall, the main contributions of this paper include: 1) A NTSMC-
based cascaded voltage and current control strategy for a buck-boost
converter to increase the robustness of the system, which allows the use
of constant switching frequency and provides an ability to limit and
protect the converter from overcurrent; 2) A VIC method to increase the
inertia of the DC/DC converter-interfaced DG unit; 3) A voltage syn-
chronization control approach to satisfy the plug-and-play requirement
of a buck-boost converter; 4) A hardware experimental DC microgrid
containing two parallel buck-boost converters to validate and demon-
strate the effectiveness and improved performance of the proposed
techniques.
Z. Cheng, et al. Electrical Power and Energy Systems 119 (2020) 105950

2. NTSMC-based cascaded voltage and current control for a buck- Si̇ = −ρi ·Si − γi·sgn(Si ) (11)
boost converter

2.1. Model of a buck-boost converter Sv̇ = −ρv ·Sv − γv·sgn(Sv ) (12)

The investigated buck-boost converter interfaced DG consists of a The current-loop control law u, according to (1), (3), (9), and (11),
DC power sources, an electronic switch, a diode, an inductor, and an can be derived as
output capacitor [38], as shown in Fig. 1, in which L and RL represent (2 − αi / βi)
( λi−1·βi / αi·L·ei + Vo + RL·iL )
the inductance and resistance of the inductor, C represents the capa- u= (Vo + Vs )
citance of the capacitor, Vs represents the input DC voltage, Vo and io diL, ref
represent the output voltage and current of the buck-boost converter, iL L·ρi ·ηi−1·Si + L·γi·ηi−1·sgn(Si) L·
dt
+ +
represents the current flowing through the inductor. (Vo + Vs ) (Vo + Vs )
(2 − αi / βi)
The following average model of the buck-boost converter can be ( λi−1·βi / αi·L0·ei + Vo + RL0·iL )
= (Vo + Vs )
derived based on Kirchhoff’s current and voltage laws [27].
diL, ref
di L0·ρi ·ηi−1·Si + L0·γi·ηi−1·sgn(Si) L·
dt
+ ΔL0·A + ΔRL·iL
L· dtL = (u − 1)·Vo − RL ·iL + Vs·u (1) + (Vo + Vs )
+ (Vo + Vs ) (13)
dVo
C· dt
= (1 − u)·iL − io (2) The parameter A in (13) is defined as

where u represents the PWM duty cycle. A = λi−1·βi / αi·ei

(2 − αi / βi)
+ ρi ·ηi−1·Si + γi·ηi−1·sgn(Si ) (14)
It should be noted that the parameters L, RL , and C may deviate
from their nominal values due to the nonlinear magnetic properties and It should be noted that the inner current-loop controller is generally
cannot be exactly measured. Assume that the nominal values of these designed with a much faster response speed than the outer voltage-loop
parameters are L0 , RL0 , and C0 . Then, the corresponding parameter controller. Thus, we can suppose diL, ref / dt = 0 . Furthermore, the terms
deviations from the nominal values are ΔL = L − L0 , ΔRL = RL − RL0 , of ΔL0 ·A and ΔRL ·iL are uncertain terms, which cannot be exactly
and ΔC0 = C − C0 , respectively. known and applied to the designed controller. Thus, the current-loop
control law u is modified as
2.2. Design of cascaded voltage- and current-loop control
(2 − αi / βi)
( λi−1·βi / αi·L0·ei + Vo + RL0·iL )
Define the current-loop tracking error ei and voltage-loop tracking u= (Vo + Vs )
error e v as follows L0·ρi ·ηi−1·Si + L0·γi·ηi−1·sgn(Si)
+ (Vo + Vs ) (15)
ei = iL, ref − iL (3)

e v = Vo, ref − Vo (4) The voltage-loop control law iL, ref , according to (2), (4), (10) and
(12), can be derived as
where iL, ref represents the reference current generated by the voltage-
loop controller, and Vo, ref represents the reference voltage generated by iL, ref = io + C·λ v−1·βv / α v·e v(2 − αv / βv) + C·ηv−1·ρv ·Sv
the virtual inertia controller, which will be explained in detail in dvo, ref
Section 3. + C·ηv−1·γv·sgn(Sv ) + C· dt
+ u·iL
Based on the nonsingular terminal sliding-mode control (NTSMC) = io + C0·λ v−1·βv / α v·e v(2 − αv / βv) + C0·ηv−1·ρv ·Sv
theory [39,40], the second-order NTSMC surfaces of current- and vol- dvo, ref
tage-loop controllers are respectively defined as + C0·ηv−1·γv·sgn(Sv ) + C· dt
+ u·iL + ΔC·B (16)

Si = ∫ ei dt + λi·eiα /β i i
(5) The parameter B in (16) is defined as

Sv = ∫ ev dt + λ v ·evα /β v v
(6) B = λ v−1·βv / α v·e v(2 − αv / βv) + ρv ·ηv−1·Sv + γv·ηv−1·sgn(Sv ) (17)
where λi > 0, λ v > 0 , and αi, βi , α v, βv are positive odd integers defined
Suppose dVo, ref / dt = 0 and ignore the uncertain term u·iL + ΔC·B ,
as follows
the voltage-loop control law iL, ref is modified as
αi, βi , α v, βv ∈ {2n + 1, n = 0, 1, 2, ..}, and 1 < αi/ βi < 2, 1 < α v / βv < 2
(7) iL, ref = io + C0·λ v−1·βv / α v·e v(2 − αv / βv)
According to (5), the derivative of Si can be derived as + C0·ηv−1·ρv ·Sv + C0·ηv−1·γv·sgn(Sv ) (18)
(α / β − 1)
Si̇ = ei + λi ·αi/ βi ·ei i i ·ei̇ In order prove the stability of the proposed current- and voltage-
(α / β − 1) (2 − α / β ) loop control strategies, the Lyapunov functions for these controllers are
= λi ·αi/ βi ·ei i i ·(λi−1·βi / αi·ei i i + ei̇ ) (8)
defined as follows
(α / β − 1)
According to (7), we can conclude that ei i i ⩾ 0 . In order to
(α / β − 1) 1 2
simplify (8), the term λi ·αi/ βi ·ei i i can be replaced with a positive Vi = ·Si
real number ηi > 0 . Then, (8) can be redefined as 2 (19)
(2 − αi / βi)
Si̇ = ηi ·(λi−1·βi / αi·ei + ei̇ ) (9) 1 2
Vv = · Sv
Similarly, the derivation of Sv can be defined as 2 (20)

Sv̇ = ηv ·(λ v−1·βv / α v·e v(2 − αv / βv) + e v̇ ) (10) According to (1), (9), (11) and (15), the derivative of Vi can be
derived as
Then, the exponential reaching laws of the sliding-mode surfaces Si
and Sv are designed as follows

3
Z. Cheng, et al. Electrical Power and Energy Systems 119 (2020) 105950

Vi̇ = Si·Si̇ 3.1. Conventional droop control

(2 − αi / βi)
= Si·ηi ·(λi−1·βi / αi·ei + ei̇ )
diL, ref
Generally, the voltage–current droop control is designed as follows
(2 − αi / βi) 1 u RL
= Si·ηi ·{λi−1·βi / αi·ei + dt
+ L ·Vo − L ·(Vo + Vs ) + L L
·i } [2,41–43]
ΔL (2 − α / β ) ΔRL diL, ref
= Si·ηi ·{ L
·(λi−1·βi / αi·ei i i ) + L
·iL + dt
} Vo, ref = Vnom − io·RV (27)
L0
− L
·(ρi ·Si·Si + γi·Si·sgn(Si ))} where Vo, ref represents the reference voltage of a buck-boost converter
ΔL (2 − α / β ) ΔRL diL, ref L0 that is sent to the inner voltage control loop as described in Section 2.3;
⩽ Si·ηi ·{ L
·(λi−1·βi / αi·ei i i ) + L
·iL + dt
}− L i
·γ ·|Si|
Vnom represents the nominal value of the output DC voltage; io represents
(21) the output current of a buck-boost converter; RV represents the droop-
coefficient or the virtual resistance of a buck-boost converter.
According to (2) (10), (12) and (18), the derivative of Vv can be
According to (27), it can be inferred that the variation of output
derived as
current caused by the fluctuation of load condition can immediately
Vv̇ = Sv·Sv̇ cause the corresponding variation of the reference output voltage.
dvo, ref u·iL ΔC C0 Furthermore, the inner voltage and current control loop generally
= Sv·ηv ·( dt
+ C
− C
·λ v−1·βv / α v·e v(2 − αv / βv) ) − C
·ρv Sv2 shows very high response speed. Thus, the conventional droop control
C0 can barely provide inertia support for the DC microgrid, which may
− C
·Sv·γv·sgn(Sv )
dvo, ref u·i ΔC C0
cause poor voltage quality especially for the DC microgrid with high
⩽ Sv·ηv ·( dt + CL − C
·λ v−1·βv / α v·e v(2 − αv / βv) ) − C v
·γ ·|Sv| (22) penetration of converter-interfaced DGs [44].

According to (21) and (22), we can infer that if γi , ηi are designed to 3.2. Virtual inertia control
satisfy (23) and γv , ηv are designed to satisfy (24)
In an AC microgrid, the virtual-synchronous generator (VSG) based
ΔL −1 ΔRL diL, ref ⎫
γi > ηi ·max ⎧
(2 − α / β )
·(λi ·βi / αi·ei i i ) + ·iL + control strategies have been proposed to improve the inertia of inverter-
⎨
⎩ L 0 L 0 dt ⎬ ⎭ (23) interfaced DGs by emulating the inertia, the damping characteristics,
and frequency regulation of the conventional synchronous generator
C dvo, ref u·iL ΔC (SM) [35,45,46]. The frequency stability of an AC microgrid can be
γv > ·ηv ·( C · dt
+ C0
− C0
·λ v−1·βv / α v·e v(2 − αv / βv) )
0
improved as the VSG based methods can prevent changes of the fre-
⇒ γv > ·ηv ·max { C dvo, ref
C0
· dt +
u·iL
C0
−
ΔC
C0
·λ v−1·βv / α v·e v(2 − αv / βv) } (24)
quency caused by load or output power variation. Inspired by the VSG
control strategy proposed in [35] for an AC inverter, a virtual inertia
control method is designed for a DC converter as follows.
Then, the derivative of Vi and Vv are negative, i.e. Vi̇ < 0 and Vv̇ < 0 ,
Firstly, in order to mimic the swing equation of a VSG, the virtual
which guarantees the convergence of the proposed control strategy.
swing equation of a DC converter can be designed as
According to (23) and (24), we can infer that the robustness of the
system with regard to parameter uncertainties would be enhanced with d (Vo, ref − Vnom)
iin − io − D ·(Vo, ref − Vnom − ΔV ) = CV ·Vnom·
the increase of γi and γv . However, larger γi and γv values would cause dt (28)
chattering phenomena due to the discontinuous term sgn(Si ) and
sgn(Sv ) . Thus, in order to reduce the chattering issue caused by the where iin represents the reference current provided by a governor; io
discontinuous terms, the current-loop control law u shown in (15) and represents the output current of a buck-boost converter; D represents
voltage-loop control law iL, ref shown in (18) are respectively modified as the damping factor; Vo, ref represents the reference voltage of a buck-
follows: boost converter that is sent to the inner voltage control loop as de-
scribed in Section 2.3; Vnom represents the nominal value of the output
( λi−1·βi / αi·L0·ei
(2 − αi / βi)
+ Vo + RL0·iL ) DC voltage; ΔV represents the voltage synchronization term generated
u= (Vo + Vs ) by a synchronization controller that is proposed in Section 3.3; CV re-
Lo·ρi ·ηi−1·Si + L0·γi·ηi−1·tanh(φi·Si) presents the virtual capacitance that provides virtual inertia for the
+ (25)
(Vo + Vs ) converter.
The reference current iin can be generated as follows to mimic the
iL, ref = io + C0·λ v−1·βv / α v·e v(2 − αv / βv) droop characteristics of the governor of a SM.
+ C0·ηv−1·ρv ·Sv + C0·ηv−1·γv·tanh(φv ·Sv ) (26) 1
iin = iref − (Vo, ref − Vnom − ΔV )
RV (29)
where tanh(·) is a hyperbolic tangent function and φi > 0 , φv > 0 .
where iref represents the output current reference provided by a mi-
crogrid-level controller, RV represents the droop-coefficient of the
3. Virtual inertia control for parallel buck-boost converters current governor.
According to (28) and (29), the dynamic characteristic between the
The buck-boost converter interfaced DGs generally have very small output current and the output voltage of a buck-boost converter can be
inertia, which makes the voltage of an DC microgrid at the risk of in- derived as
stability. Generally, the voltage–current droop control is widely applied
d (Vo, ref − Vnom)
to regulate the output voltage of converter-interfaced DGs which can CV ·Vnom·
dt
instantaneously balance power generation with load demand for par-
1
allel DGs. However, the droop control based DGs can barely provide = iref − (Vo, ref − Vnom − ΔV ) − io − D ·(Vo, ref − Vnom − ΔV )
RV (30)
inertia support for the DC bus voltage. In this section, the conventional
virtual inertia control is firstly reviewed; then, a virtual inertia control It should be noted that the term “virtual inertia” is used to represent
strategy is proposed to improve the inertia of buck-boost converter the characteristics of enhancing the virtual inertia of a DC microgrid
interfaced DGs; at last, a synchronization control method is proposed to and restraining the fluctuation of DC bus voltage. In this paper, the
enable the plug-and-play and reduce the transient current during the virtual inertia is achieved by the proposed virtual inertia control (VIC)
connection process of converter interfaced DGs. strategy that generates the output bus voltage reference of a buck-boost

4
Z. Cheng, et al.
Fig. 2. Scheme of virtual inertia control and voltage synchronization control.
converter through the designed virtual swing equation shown in (30).
3.3. Voltage synchronization control
In order to enable the plug-and-play requirement of a buck-boost
converter, the output voltage of a buck-boost converter should be
synchronized with the PCC voltage before connecting the converter to
the PCC. Thus, a voltage synchronization control method is designed as
shown in Fig. 2. The voltage synchronization term is generated through
a PI controller as follows
ki
ΔV = (kp + )·eV
s (31)
where kp and ki represent the control parameters of a PI controller, eV
represents the voltage difference between the PCC and the buck-boost
converter, which can be derived by measuring the voltage at the PCC,
i.e., VPCC , and the output voltage of the buck-boost converter, as follows
eV = VPCC − Vo
According to (28), the voltage synchronization term may affect the
current sharing of a buck-boost converter when it works in parallel with
other converters. Thus, the term ΔV should be regulated to zero after
the buck-boost converter is connected to the PCC. The above process
can be achieved smoothly by switching the input signal of PI controller
as shown in Fig. 2 when the following connection condition is satisfied.
1, if |eV | ⩽ σ
Ssyn = ⎧
⎨
⎩ 0, otherwise
where σ represents the admissible voltage deviation between the PCC
and the converter.
The switch between the converter and the PCC can be closed if the
synchronization condition is satisfied, i.e., Ssyn = 1 in (33).
4. Experimental results
To verify the feasibility and stability of the proposed control
strategy, a hardware experiment system was built as shown in Fig. 3.
The DC microgrid test system (Fig. 3 (a)) involves two buck-boost
converter interfaced DGs, two common loads, and two local loads. The
experimental setup (Fig. 3 (c)) consists of the following major parts:
1) Two buck-boost converter interfaced DGs that were built through
proper wire connection (Fig. 3 (c)) of LabVolt 8857 (IGBT converter)
and LabVolt 8325 (Inductors/Capacitors) [47].
2) An OP8660 data acquisition system from OPAL-RT [48]. The
OPAL-RT OP8660 can get and convert measured high voltage and
current signals of the buck-boost converters into low voltage signals
Electrical Power and Energy Systems 119 (2020) 105950
that are needed by the controllers developed in dSPACE MicroLabBox
1202.
3) A MicroLabBox 1202 from dSPACE. All the controllers are built
by using MicroLabBox 1202, from dSPACE. The dSPACE MicroLabBox
1202 can also communicate with dSPACE ControlDesk software run-
ning in a PC in real-time.
4) The ControlDesk is typically used to display the measured real-
time data and used as a user interface for inputs of control instructions
(such as Turn on or Turn off certain loads and set voltage reference
values) that are transferred to the buck-boost converters through the
dSPACE MicroLabBox 1202.
5) Two LabVolt 8621 modules that are served as the Load breaker
and PCC breaker, respectively. Furthermore, the two breakers can be
turned on and off by a control instruction from dSPACE MicroLabBox
1202.
The proposed control algorithms for both DGs were firstly built in
Matlab/Simulink in the PC. The Matlab/Simulink model was then
compiled and loaded as the assembly code to MicroLabBox 1202. The
whole system is then measured, controlled and monitored based on
OPAL-RT OP8660, dSPACE MicroLabBox 1202, and dSPACE
ControlDesk as explained above.
4.1. Cascaded voltage and current control
In this experimental case, the performance of the proposed NTSMC
based current and voltage control strategy for a buck-boost converter is
verified. A cascaded PI-based current and voltage control strategy is
also evaluated to make a comparison of the proposed control strategy
against the conventional one.
Generally, the response speed of the inner current-loop controller
should be designed much faster than the outer voltage-loop controller.
Thus, the current-loop NTSMC controller is firstly designed according to
the following rules: a) As ηi > 0 , without loss of generality, ηi can be
assumed to be 1 for the NTSMC based current-loop controller. b)
According to (23), we can infer that the robustness of the system with
regard to parameters uncertainties would be enhanced with the in-
crease of γi . However, a large γi value may cause overshoot or even
(32) chattering phenomena. Thus, γi should be properly designed to make a
tradeoff between these criteria. c) In order to eliminate the steady state
error, the integration term shown in (5) should be dominated, which is
achieved by setting λi as a suitably small value. d) ρi and φi are designed
by trading off between the transient and steady state performance of the
proposed control method (Table 1). e) αi and βi should be designed to
satisfy (7) and can be properly designed based on the try-and-error
method. For the NTSMC based voltage-loop controller, the parameter
design process is similar to that of the current-loop controller. Based on
the procedures described above, the parameters of the proposed NTSMC
(33)
controllers are designed and given in Table 2.
The PI parameters are designed based on the following procedures
and considerations: a) Build the Simulink model of the PI-based cas-
caded current- and voltage-loop control system of the buck-boost con-
verter as shown in Fig. 4, in which the “Buck-Boost Converter Plant
Model” can be acquired through the average model of the buck-boost
converter as shown in (1) and (2). b) The bandwidth of the current
control loop should be selected much lower than the converter
switching frequency fsw and is set as fsw /10 = 1000 Hz. c) The band-
width of the voltage control loop should be selected much lower than
that of the current control loop and is set as 1000/10 = 100 Hz. d) Based
on the bandwidths of the current and voltage control loops selected in
b) and c), the PI parameters of the current- and voltage-loop controllers
are obtained through the Simulink PID Tuning Tool, the PID Tuner,
associated with the “Current Loop PI” and “Voltage Loop PI” blocks
shown in Fig. 4.
The output reference and the load variation sequences are designed
as: 1) t = 0 − 2s , the output voltage reference is 0 V; 2) t = 2 − 4s , the
output voltage reference is 40 V; 3) t = 4 − 6s , the output voltage
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Fig. 3. Hardware laboratory testing system. (a) System topology; (b) experimental setup; (c) block diagrams and circuit connection of hardware configuration.

Table 1 Table 2
System parameters. The parameters of cascaded controllers.
Symbol Value Description Control Loops Parameter Value Control Loops Parameter Value

Vs 60 V DC power supply Current Loop αi = 9 voltage Loop αv = 9

Pnom1 300 W Rated power of DG1 βi = 7 βv = 7
Pnom2 150 W Rated power of DG2 λi = 2.3 × 10−4 λv = 4.2 × 10−4
L 5.7 mH Inductance of the inductor
ρi = 4.4 × 106 ρv = 2.4 × 105
RL 0.4 Ω Resistance of the inductor
ηi = 1 ηv = 1
C 210 uF Capacitance of the capacitor
γi = 877 γv = 95
fsw 10 kHz PWM Switching frequency
φi = 1000 φv = 100
fsam 10 kHz Voltage/Current sampling frequency
Virtual Inertia CV 1 = 200uF Synchronization kp = 0.1
Loop CV 2 = 100uF Control Loop
reference is 60 V; 4) t = 6 − 8s , the output voltage reference is 80 V; 5) D1 = 0.05 kiv = 30
D2 = 0.025
at t = 8s , the load is changed from 150Ω to 60Ω; 6) at t = 10s , the load RV 1 = 2Ω δ = 0.1
is changed from 60Ω to 150Ω. RV 2 = 4Ω
Fig. 5 compares the performance between cascade PI and cascade
NTSMC in response to the reference and load variations. As shown in
Fig. 5 (a), the proposed control strategy shows good transient and show similar response speed to the reference variation mainly due to
steady state performance in response to the output voltage reference the current flowing through the inductor was restricted to the max-
variation. The proposed control strategy and the PI control strategy imum allowed value, i.e., 4 A, as shown in Fig. 5 (b). It should be noted

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Z. Cheng, et al. Electrical Power and Energy Systems 119 (2020) 105950

Fig. 4. Simulink model used for parameter design

of PI-based cascaded current- and voltage-loop
controllers of the buck-boost converter.

Fig. 5. Performance comparison between cascade PI and cascade NTSMC in

response to reference and load variation. (a) Output voltage of the buck-boost
convert; (b) the current through the L filter.
Fig. 6. Performance comparison of the proposed NTSMCVIC method when CV 1
is set with different values.
that the current flowing through the inductor normally should be re-
stricted to its maximum allowed value in order to protect the hardware
D1, D2 , Rv1 and Rv2 are designed according to their maximum possible
experiment system. In this paper, the reference current instruction
output current and the admissible voltage droop. For the voltage syn-
generated by the voltage loop controller is limited to 4 A for both the
chronization control loop, δ should be designed as a certain value to
proposed and PI controllers. As shown in Fig. 5 (a) and (b), the pro-
reduce the inrush current, the PI parameters can be well designed by
posed NTSMC based control strategy shows lower overshoot in response
trading off between the stability and the response speed. Based on the
to the load variation than the PI-based control strategy. Furthermore,
above analysis, the parameters of the proposed VIC controller are also
the voltage and current ripples of the proposed NTSMC-based control
given in Table 2.
strategy are much lower than that of the PI-based control strategy when
The parameter Cv1 plays an important role between the virtual in-
the load is heavier, i.e., 60Ω, during t = 8 − 10s . Overall, the proposed
ertia and the response speed of the proposed VIC control strategy. In
NTSMC based control strategy shows better transient and steady state
order to design the parameter of CV 1, Fig. 6 compares the transient
performance than the convention PI based control strategy.
performance of the proposed VIC control strategy for six different CV 1
values, i.e., 20uF, 100uF, 200uF, 400uF, 1000uF, and 5000uF, respec-
4.2. Cascaded virtual inertia, voltage and current control
tively. As shown in Fig. 6, with the increase of Cv1, the virtual inertia of
DG1 is increased. However, with an increase of Cv1, it would take a
In this experimental case, the performance of the proposed cascaded
longer time to establish a new steady-state voltage in case of a load
virtual inertia, voltage and current control strategy for a buck-boost
variation, which also means that the response speed of the proposed
converter is verified. The following four different control strategies are
VIC control strategy is slower. It should be noted that besides the
separately implemented for the control of a buck-boost controller in
proposed VIC control strategy, there is typically an outer-loop economic
order to make a performance evaluation of the proposed control
dispatch (ED) or automatic generation control (AGC) strategy to restore
strategy against the conventional ones:
the DC bus voltage to its nominal value, which is out the scope of this
a) The proposed virtual inertia control plus the NTSMC-based cur-
paper. The proposed VIC control strategy should be designed fast en-
rent and voltage control loops (named as NTSMCVIC);
ough to respond to the instructions generated by certain outer loop
b) The droop control plus the NTSMC-based current and voltage
controllers, i.e., ED and AGC. Thus, in this paper, Cv1 is designed as
control loops (named as NTSMCDroop);
200uF to make a good tradeoff between the virtual inertia and the VIC
c) The droop control plus the PI-based current and voltage control
response speed. As the rated power of DG2 is half of DG1, CV 2 is de-
loops (named as PIDroop);
signed as 100uF to match its capacity.
d) The virtual inertia control plus the PI-based current and voltage
Fig. 7 presents the output voltage and the inductor current in re-
control loops (named as PIVIC).
sponse to the load variation using the above four different control
Generally, the response speed of the proposed VIC control strategy
strategies. In this case study, the load is changed from 150Ω to 100Ω at
should be designed much slower than the inner current- and voltage-
t = 8s , and then it is changed from 100Ω to 150Ω at t = 8s . As shown in
loop controllers. For the virtual inertia control loop, the parameters of

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Z. Cheng, et al.
Fig. 7. Performance comparison between NTSMCVIC, NTSMCDroop, PIDroop
and PIVIC in response to load variation. (a) output voltage of the buck-boost
converter; (b) current through the L filter.
Fig. 7, the proposed NTSMCVIC control strategy shows the lowest
overshoot in response to the load variation and provide the highest
inertia for the DC bus voltage.
4.3. Synchronization control and parallel operation
In this experimental case, the performance of the proposed syn-
chronization control and the parallel operation of two buck-boost
converters controlled by the proposed NTSMCVIC control strategy were
verified.
Fig. 8 presents the performance of the proposed NTSMCVIC strategy
during the synchronization process. First, at t = 4s , the second buck-
boost converter (DG2) was prepared to be connected to the PCC by
enabling the proposed synchronization control strategy. As shown in
Fig. 8, the output voltage of DG2 was regulated to be synchronized with
the PCC during t = 4 − 4.06s . Then, at t = 4.06s , the DG2 was connected
to the PCC when the synchronization condition was satisfied. As de-
scribed in Section 3.3, in order not to affect the current sharing ability
with the other parallel operating DGs, the voltage synchronization term
should be adjusted to zero after DG2 was connected to the PCC. As
shown in Fig. 8 (a), the voltage synchronization term ΔV can be
smoothly adjusted to zero after the plug process of DG2. The current
flowing through the switch was also smoothly regulated during the
synchronization process (Fig. 8 (b)). The output voltage difference be-
tween DG1 and DG2 was very close after the synchronization process
(Fig. 8 (c)), where the small difference after t = 4.06s was caused by the
line resistance between these two DGs. The output currents of the two
DGs were properly shared when they were operating in parallel (Fig. 8
(d)).
Fig. 9 presents the experiment results of the output voltage and
current in response to a load variation when the two DGs work in
parallel. As shown in Fig. 9, the load demand in terms of the current can
Fig. 8. Performance of the proposed NTSMCVIC strategy during the synchro-
nization control process. (a) voltage difference between the PCC breaker and
the voltage synchronization term; (b) current of the PCC breaker; (c) output
voltage of the two DGs; (d) output current of the two DGs.
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Electrical Power and Energy Systems 119 (2020) 105950
Fig. 9. Performance of the proposed NTSMCVIC strategy in response to load
variation when two DGs work in parallel. (a) output voltage of the two DGs; (b)
output current of the two DGs.
Fig. 10. Performance of the proposed NTSMCVIC strategy when DG1 is turned
off. (a) output voltage of DG1; (b) output current of the two DGs.
be properly dispatched among the two parallel operating DGs under
different load conditions and the output voltage shows overshoot-free
transient performance during the load variation process.
Fig. 10 shows the experimental results when DG1 is turned off. As
shown in Fig. 10 (b), the output current of DG2 was increased to
maintain the balance between the power generation and load demand
after DG1 was tuned off, and the output voltage of DG2 is admissibly
drooped due to the virtual inertia control characteristics. The output
voltage and current of DG2 shows smooth transition when DG1 was
turned off. Overall, the proposed control strategy can guarantee the
plug-and-play requirements for the buck-boost converters.
5. Conclusion
This paper proposes a novel cascaded control strategy for parallel
operating buck-boost DC/DC converters. The special natures of the
proposed control strategy includes a NTSMC based nested-loop voltage
and current controller which increases the robustness of the system; a
VIC controller which increases the inertia of DC/DC converter-inter-
faced DGs; a voltage synchronization controller which can satisfy the
plug-and-play requirement of a buck-boost converter. The effectiveness
and improved performance of the proposed control strategy is validated
and demonstrated on a hardware experimental system with two parallel
operating buck-boost converters in a DC microgrid.
It should be noted that the proposed VIC and voltage synchroniza-
tion control methods are only used to generate the voltage reference for
the inner voltage control loop. Thus, the proposed VIC and voltage
synchronization control methods can be applied to other kinds of DC-
DC converters for controlling parallel DC-DC converters in a DC mi-
crogrid. Furthermore, the design process of the proposed cascaded
voltage- and current-loop control method can be adopted for the output
voltage control of other kinds of DC-DC converters. Thus, the proposed
control methods should have good adaptability and reference value. For
future work, we will study the potential of applying the proposed
control methods to other kinds of DC-DC converters and to control of a
DC microgrid with advanced DC-DC converter topologies.
CRediT authorship contribution statement
Zhiping Cheng: Methodology, Writing - original draft. Zhongwen
Li: Conceptualization, Funding acquisition, Software. Shuihui Li:
Z. Cheng, et al. Electrical Power and Energy Systems 119 (2020) 105950

Writing - review & editing. Jinfeng Gao: Resources. Jikai Si: by circuit-averaging technique. IET Power Electron 2019;12(11):2858–64. https://
Visualization, Writing - review & editing. Himadry Shekhar Das: Data doi.org/10.1049/iet-pel.2018.5514.
[20] Hernandez-Marquez E, Alejandro Avila-Rea C, Rafael Garcia-Sanchez J, Silva-
curation. Weizhen Dong: Software. Ortigoza R, Silva-Ortigoza G, Taud H, et al. Robust tracking controller for a DC/DC
buck-boost converter-inverter-DC. Motor Syst, Energ 2018;11(10):1–15. https://
Declaration of Competing Interest doi.org/10.3390/en11102500.
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