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Memory Data File Examples

A ROM model is required to have a memory initialization file. For a RAM, this file is optional. TestMAX
ATPG accepts the data file format specified by Verilog. Some examples follow:

A memory initialization file for a 16x16 device, with data presented in binary.

0000000000000001
0000000000000010
0000000000000100
0000000000001000
0000000000010000
0000000000100000
0000000001000000
0000000010000000
0000000100000000
0000001000000000
0000010000000000
0000100000000000
0001000000000000
0010000000000000
0100000000000000
1000000000000000

The same data 16x16 presented in hex.

0001
0002
0004
0008
0010
0020
0040
0080
0100
0200
0400
0800
1000
2000
4000
8000

A more complicated Memory Initialization File which makes use of whitespace, comments, multiple data
entries per line, underscores in data, and address skipping. This one is 64 words of 16 bits.

0001
0002
0004
0008

0010 0020 0040 0080

0100 0200 0400 0800
1000 2000 4000 8000

# address = 0010
A001 c401 e404 700a
3816 1c2c 2e58 07b0

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23e0 07c0 25e0 0b70

363c 2c1c 7c0e b006

# address = 0020
8001 4002 2004 1008 8810 4421 2242 1184
0908 0650 0620 0950 1088

# skip to hex address 30

@30
fffe fffd fffb fff7 ffef ffdf ffbf ff7f
/* another comment */
feff fdff fbff f7ff # end of line comment
# underscores for readability
efff dfff bfff 7_f_f_f

See Also

read_memory
report_memory

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