CA Assignment

What is power pc processor and its types

SUBMITTED TO: SIR TAHIR

SUBMITTED BY: M NAVEED
ROLL NO: 14502
SECTION: BSCS 4THB (EVENING)
, 2017
What is power pc processer?
The biggest change in the Apple product line prior to 2006 was the transition from
Motorola 680×0 CPUs to the PowerPC (PPC) family of CPUs. Designed by a
consortium of Apple, IBM, and Motorola (a.k.a. the AIM Alliance) and based on IBM’s
POWER architecture, PowerPC became the most widely used RISC (Reduced
Instruction Set Computing) processor with the introduction of the Power Mac line in
March 1993.

PowerPC 601:
The first PowerPC chip was the 601, manufactured by IBM (even the ones with the
Motorola logo) and initially available in speeds ranging from 50 MHz to 80 MHz using
0.6 micron CMOS technology. The 64-bit CPU was used in the Power Mac
6100, 7100, 7200, and 8100, as well as in most of the first generation of licensed
Macintosh clones.

The 601 contains 2.8 million transistors, has a 32 KB unified level 1 (L1) cache,
supports an external L2 cache, and can process up to 3 instructions per cycle. Its large
L1 cache helped it outperform Intel’s Pentium.

The 601 contains three execution units: one for integers, one for branch processing,
and one for floating point.

The 601 was specifically designed to power the IBM RS/6000, so there are
many instructions present for that computer that were not included in future PPC
designs. This is the only PPC with a unified instruction and data cache; future models
contained separate instruction and data caches.An updated version, known as the 601v
or 601+ was also built by IBM; it was available at speeds from 90 MHz to 120
MHz, running at 2x or 3x bus speed.

PowerPC 603:
The second generation split the PowerPC (PPC) line into entry level 603 and power
user 604 chips. The 603 has only 1.6 million transistors, draws about half as much
power as the 601, has two smaller caches (8 KB for instructions, 8 KB for data vs. a 32
KB unified cache in the 601), and can process up 2 instructions per cycle (down from 3
in the 601).

Low power consumption was a key design factor, since Apple wanted to design
PowerBooks around the 603. One way the 603 reduced power consumption was with
its smaller L1 cache, which so reduced performance that Apple refused to use it in a
PowerBook. At that time, 680×0 emulation was crucial, and with such a small internal
cache, the 603 handled emulation very poorly.

However, the 603 was used in the Performa 5200 and 6200, a couple of Road

Apples that gave the 603 an undeservedly bad reputation even when running native
PPC code. The 603 was available at speeds from 75 MHz to 160 MHz (Cycle for cycle,
performance was comparable to the 601, but at lower cost.)

The 603 has five execution units, up from three in the 601. These is an integer unit,
floating point unit, branch processing unit, load/store unit, and system register unit. The
64-bit 603 can run on either a 32-bit or 64-bit data bus, although there is a severe
performance penalty when using a 32-bit data bus.

PowerPC 603e:
With a small redesign, the PPC 603e was introduced. Essentially a 603 with an
improved cache (16 KB each for instructions and data, twice as much as the original
603), it offers significantly improved performance without draining batteries too quickly.
The Performa 5260 and 6300 were designed around this improved chip, as was every
PPC-based PowerBook, starting with the PowerBook 5300. Speeds ranged from 100
MHz to 300 MHz

The 603e came in three variants. The 100-133 MHz models use 0.5 micron traces and
runs at 1.5x to 4x bus speed. The 166-200 MHz 603e uses 0.35 micron technology and
runs at 2x to 6x motherboard speed. Finally, the 200-300 MHz version uses a 0.29
micron design; it also runs from 2x to 6x bus speed. This version of the 603e requires a
minimum 50 MHz bus to achieve 300 MHz

PowerPC 604:
The “power user” second generation PowerPC (PPC) CPU was the 604, unveiled in
December 1994 along with the 603. Containing 3.6 million transistors, drawing twice the
power of the 601, and with a dual L1 cache (16 KB for instructions, 16 KB for data), this
workhorse could deal with four instructions per cycle. The 604 started at 100 MHz and
went as high as 180 MHz, running at 2x to 4x bus speed. It was first used in the Power
Mac 7600, 8500, and 9500.

With its larger L1 cache, the 604 didn’t suffer the same kind of performance issues as
the PPC 603 did when running 680×0 software in emulation.

The 604 was designed to work in tandem with other 604s, making it possible to design
computers with two or more CPUs. Daystar was the first to do this. Seeing
Daystar’s success, Apple licensed the multiprocessor technology and incorporated it
into the Mac OS. Maximum bus speed supported by the CPU is 50 MHz
The 604 has six independent executions units: two single-cycle integer units, a multi-
cycle integer unit, a floating point unit, a branch prediction unit, and a load/store unit.
This made it an incredible number cruncher and a top choice for Photoshop users.

PowerPC 604e:
The 604 was later tweaked for even more performance, giving us the 604e in July 1996.
As with the 603e, the newer CPU doubled the size of the instruction and data caches,
significantly improving performance. On top of that, the 604e can process up to six
instructions per cycle, 50% more than the 604, so overall performance was about 25%
higher than the 604 at the same clock speed. Transistor count reached 5.1 million.

While the 604 topped out at 180 MHz, the 604e began at 166 MHz and went as high as
233 MHz on a system bus as fast as 66 MHz

PowerPC G3:
Arthur, legendary King of England, became the code-name for the third generation
PowerPC (PPC) processor, eventually named the 740 and 750. The successor of
the 603e, these third-generation CPUs were optimized to run real software, not for
some theoretical ideal.

Early benchmarks show the 750 outperforming the 604e, making it look like the older
chip would be reserved for multiprocessor designs and floating-point intensive work. In
fact, a 233 MHz G3 was so efficient that it could hold its own against a 300-350 MHz
604e, so Apple moved away from the older CPU except in multiprocessor models (the
G3 has very limited dual-processor support).

Like the 604 and 604e, the G3 incorporates six separate execution units. On the G3,
there are two integer units, a floating point unit, a branch unit, a load/store unit, and a
system register unit.

The 740 and 750 can work in a dual-processor configuration. The key difference
between the 740 and 750 is support of the Level 2 (L2) cache. The 740 has no built-in
L2 cache support and is designed to use a cache on the computer’s system board.

The 750 has built-in cache support and can use either an inline cache or a backside
cache, both of which run faster than a motherboard-based cache that is limited by
system bus speed. Of the two, the backside cache provides the best performance (and,
of course, requires more expensive memory). The inline or backside cache must run
between full CPU speed and one-third of CPU speed. The L2 cache may be 256 KB,
512 KB, or 1 MB in size.
Both the 740 and the 750 used a 0.29 micron design initially and were available in
speeds of 200, 233, and 266 MHz – followed by speeds up to 466 MHz They can run at
3x to 8x bus speed, and up to 10x on the latest revision, which means a 500 MHz G3 is
possible on a 50 MHz data bus. Considering the number of Mac OS computers built
using 40 MHz motherboards, upgrades to 320 MHz were possible – but probably not
practical.

Like the 603 and 603e, the 740 and 750 are 64-bit chips that can function on either a
32-bit or 64-bit bus.

With speeds past 400 MHz, the PPC 750 was the workhorse CPU for the Mac OS until
the G4 was unveiled in August 1999.

Because of issues with cache coherency, we never saw a dual PPC 750 Mac using an
inline or backside cache. The difficulty and time involved in checking motherboard RAM
and the other cache would actually slow performance, as Be noted. If dual G3 systems
are ever made, they should be on the fastest motherboards with the largest
motherboard L2 cache possible.

PowerPC 750(G3):
The processor, more popularly referred to as the G3, has been around for nearly six
years now, and most of the PPC chip excitement today is focused on the IBM PPC 970,
dubbed the G5 by Apple's marketers. However, the old G3 750 has new life in it yet,
and I'm provisionally expecting the next generation of Apple iBooks to remain G3
powered.

Back in 1997 when the PPC 750 was introduced, it had two important innovations. First,
"these chips were optimized to run real software, not some theoretical ideal. Early
benchmarks show the 750 outperforming the 604e...."

Second, the PPC 750 supported a dedicated "backside" bus for communicating with a
closely coupled level 2 (L2) cache, connected to the core by a 64-bit bus. (On earlier
PPC Macs, the L2 cache ran at system bus speed, which topped out at 50 MHz) Apart
from reducing system bus congestion, the use of a separate L2 cache bus allowed the
CPU core to retrieve its data from the cache much faster than earlier generations of
processors, and hence cut computation time down significantly.

The G3 thus facilitated a quantum leap in PowerPC performance, eclipsing overnight

the previous 601, 603, and 604 variants of the PPC. For example, the 250 MHz PPC
750 G3 used in the original G3 PowerBook (3500) offered roughly twice the power of
the 240 MHz PPC 603e used in it's immediate predecessor, the top-of-the-
line PowerBook 3400.
IBM's later editions of the 750, known as 750CX/e/FX (which have been used in iBooks
since the September 2000 "Paris" models) incorporate a wider (256 bit) L2 cache bus
and incorporate the L2 cache on the chip itself. This means the L2 cache runs at full
CPU speed, eliminating the slower external backside cache used in earlier G3 model.

PowerPC G4:
First available in the Power Mac G4  in late 1999, the G4 processor is to the G3 as the
604 was to the 603 – and then some! Like the 604, and unlike the G3, G4 is designed
for multiprocessor operation. It also runs about 25% faster for basic floating point math
calculations and has a built-in vector processor known as AltiVec. MHz for MHz, it was
the most powerful CPU on the market in its day.

PowerPC 7400(G4):
The G4 (a.k.a. PowerPC 7400), manufactured exclusively by Motorola, initially shipped
at 350 to 500 MHz, although Motorola had issues creating enough 500 MHz CPUs for
Apple’s needs. Because of this, the 400, 450, and 500 MHz models Apple had
announced were scaled back to 350, 400, and 450 MHz – without a price reduction,
which had users up in arms. It wasn’t until February 2000 that the Power Mac G4 was
once again available in a 500 MHz version.

The 7400 has a new high-bandwidth system bus known as MPX, which more than
doubles memory access speed on logic boards that support MPX. Only the Yikes!
Power Mac G4 does not support this.

New features include the ability for one CPU to send data directly to another without
using system memory, the ability to use a 2 MB level 2 cache (previous PowerPC
designs were limited to 1 MB), 128-bit internal architecture (vs. 64-bit for other PowerPC
chips), 64- or 128-bit access to the cache (two different versions of G4; 64-bit is for
backward compatibility with older systems), and the AltiVec “Velocity Engine”
multimedia extensions.

The 7400 supports a 2x to 8x bus multiplier, but the initial run tops out at 9x. This
means a computer with 100 MHz motherboard could support a 800 MHz G4, and also
that the Beige G3 with its 66 MHz system bus could support a 533 MHz G4 – except
that the 7400 never passed the 500 MHz mark. Older Macs that use a CPU daughter
card could support a 400 MHz 7400 on their 50 MHz bus.

The G4 has a total of 7 execution units: two for integer work, plus one each for
load/store, branch/system, floating point, AltiVec ALU, and AltiVec Permute. Preliminary
SPECfp scores are about 30% higher than the G3 at the same clock speed.
AltiVec has the ability to increase performance of certain functions, especially those
found in things like QuickTime and Photoshop, by up to 16 x, although programs will
have to be modified to take advantage of the new AltiVec instructions.

PowerPC 7410(G4):
The second generation G4 arrived with the first PowerBook G4 in January 2001,
running at 400 MHz or 500 MHz The 7410 also supports a 9x bus multiplier, giving it a
small edge over the 7400, and it also supports a 133 MHz system bus. In most other
respects, the 7410 is simply a lower power version of the 7400.

PowerPC 7450(G4):
Often known as the G4e (for enhanced) or G4+, the PPC 7450 was a major redesign of
the G4 architecture. With 33 million transistors, it had over 3x as many as the 7400, and
AltiVec performance was also improved. The new CPU was first used on the 733
MHz Digital Audio Power Mac G4 when it was released in January 2001 – the same
time as the PowerBook G4.

Where the 7400 and 7410 used a level 2 (L2) cache on the system board, the 7450
includes a 256 KB L2 cache that runs at full CPU speed. Even though it is smaller than
the 512 KB, 1 MB, and 2 MB external caches used by earlier G4 chips, because it
runs at CPU speed, it generally offers superior performance.

The 7450 also includes 4 integer math execution units (3 simple + 1 complex), which is
twice as many as the 7400 and 7410. It also doubles the number of AltiVec units,
adding simple and complex to floating and permute.

PowerPC 7445(G4) & 7455(G4):

The big improvements in the January 2002 G4 include a 256-bit on-chip cache bus,
twice as wide as on earlier G4 iterations. It was the first CPU in a Mac to pass  the 1
GHz mark, and the 7455 supports a level 3 (L3) external cache up to 2 MB to further
boost performance.

The 7445 came in speeds from 600 MHz to 1.42 GHz, as did the 7455.

PowerPC 7447(G4) & 7457(G4):

The 7447 boosts the onboard L2 cache to 512 KB and uses a 130 nm process to
reduce power consumption. The 7457 adds support for an external L3 cache with up to
4 MB of memory.The 7447 offered speeds from 600 MHz to 1.42 GHz, and the 7447A
bumped that to 1.5 GHz. The 7457 had a more limited range of speeds from 867 MHz
to 1.267 GHz.

PowerPC 7448(G4):
The last G4 processor Apple used was thee 7448 found in the final generation of 15″
and 17″ PowerBooks running at 1.67 GHz. Only the hi-res 15″ and 17″ models use this
CPU, which has 1 MB of L2 cache onboard and a 200 MHz front side bus.The 7448
ranged in speed from 1.0 GHz to 1.7 GHz. It was the most powerful G4 CPU ever.

The Dual Core G4:

In 2004, Freescale changed the G4’s name to e600, so the 7448 was the last true G4. In
2007, the e600 became available in a dual-core version, the MPC8641D, where each core
had 1 MB of L2 cache on the CPU. Clock speeds ranged from 1.0 to 1.5 GHz.

PowerPC G5:
The G5 is a 64-bit member of the PowerPC processor family that is fully compatible with
32-bit code. It was first used when the Power Mac G5 was introduced in June 2003.
Only three different versions of the chip were produced before Apple made the move to
Intel CPUs in 2006. IBM was the only manufacturer of G5 CPUs.

Where the PowerPC G4 used much slower memory on a 100, 133, or 167 MHz data
bus, the G5 accesses system memory at one-half or, at worst, one-third of CPU speed.
This gives the G5 much faster access to system memory. The G5 has separate 32-bit
read and write double data rate (DDR) data buses.

The G5 CPU has two arithmetic logic units (ALUs), two double-precision floating point
units, two load/store units, and two AltiVec units. Or, more precisely, two partial AltiVec
units. One works on integer and floating point operations, the second
handles permute operations.

PowerPC 970(G5):
The first G5 CPU, the PowerPC 970, built on everything IBM had learned in producing
its POWER4 CPU for servers. As CPUs designed for servers, low power consumption
was not one of IBM’s goals, so the G5 Power Macs all needed very sophisticated
cooling systems to deal with the heat the PowerPC 970 created. The computer had a
total of nine cooling fans to control temperatures.
IBM announced the PowerPC 970 in October 2003, and it was used in the first Power
Mac G5 models (1.6 and 1.8 GHz single-processor and 2.0 GHz dual-processor), which
were introduced in June 2003.

The PPC 970 has a 512 KB Level 2 (L2) cache and uses a system bus running at half
of the CPU’s core speed in the Power Mac G5. That meant the new Power Macs had
800 MHz to 1.0 GHz data buses, a far cry from the 133 and 167 MHz buses used in
later G4 Power Macs.When he announced the Power Mac G5, Steve Jobs promised 3.0
GHz within a year, based on promises from IBM that were never fulfilled.

PowerPC 970 FX (G5):

In 2004, Apple moved to IBM’s improved CPU, the 970FX with a 64 KB instruction
cache and 32 KB data cache – a step forward from using 32 KB for each throughout the
G3 and G4 eras. The 970FX also had a much longer data pipeline than the original 970
to help boost clock speed, much like the Pentium 4.

Using liquid cooling to help dissipate the heat created by overclocking IBM’s CPUs,
Apple was able to offer 2.5 GHz and later 2.7 GHz Power Mac G5 models. The 970FX
was also used in the 2004 Xserve G5 and the iMac G5. The 970FX powered all Xserve
G5 models and all iMac G5 models. (Running the data bus in the iMac G5 at one-third
of clock speed helped reduce power draw and heat.)

Although the 970FX was far more power efficient than the 970, it didn’t have the energy
saving features required for a notebook CPU, so no PowerBook G5 was ever produced.

PowerPC 970 MP (G5):

The final CPU in the G5 line was the dual-core PowerPC 970MP, which has two cores
on a single die, each core with its own 1 MB Level 2 (L2) cache, making it a bit more
powerful than the 970FX. For the power hungry, Apple even made a Power Mac G5
Quad with two dual-core 970FX CPUs running at 2.5 GHz.

Apple only used the 970MP in the last generation of Power Mac G5 models, which were
introduced in October 2005 and discontinued in late 2006.
PowerPC Family Overview: