Hepburn AMD UMA: VER: A00

1 2 3 4 5 6 7 8
Hepburn AMD UMA

VER : A00 POWER
A A
REGULATOR CPU VR SYSTEM BATT
+1.5V_RUN/+1.1V_RUN RESET CIRCUIT CHARGER
PG 50 PG 53 PG 45 PG 47
REGULATOR DC/DC RUN POWER SW
+1.8V_SUS/+1.2V_ALW +3.3V_ALW/+5V_ALW
AC/BATT +5V/+3.3V/+1.8V/+1.2V_RUN
/+0.9V_DDR_VTT +15V_ALW/+5V_SUS CONNECTOR
+3.3V/+1.2V_SUS
FAN & THERMAL PG 49 PG 52 PG 54 PG 46
EMC1423
VCC_NB +2.5V_RUN M82_POWER
DDRII-SODIMM1 PG 29
PG 16,17
AMD S1G2 1.2V_ALW_SUS
800 MHz DDR II 64 X2 PG 51,54 PG 60 PG 55
CLOCK
(638 S1 socket) SLG8SP628VTR(QFN)
DDRII-SODIMM2 PG 25
PG 3,4,5,6
PG 16,17
Panel Connector HT_LINK

LVDS
B PG 26 LAN PG 33 B
PCIEx1 RJ45/Magnetics
5784M PG 34
HDMI CONN. HDMI
PG 28 RS780M
PCIEx1
CRT CONN. VGA EXPRESS-CARD
528 FCBGA R5538 PG 37
PG 27
21mmX21mm
PCIEx2
Side Port Memory MINI-CARD
PG 11 PCIEx1 WLAN PG 39
PG 7,8,9,10,11
SATA MINI-CARD
SATA - HDD
A_LINK WWAN
PG 30 PG 40
USB2.0
USB2.0
SATA MINI-CARD
Fixed SATA ODD USB2.0
WPAN
C PG 34 PG 39 C
SB700
USB2.0 x 4
USB conn x 4
E-SATA+USB CONN SATA PG 38
528 BGA
PG 38
21mmX21mm USB2.0
USB2.0 Biometric
PG 44
Azalia PG 12,13,14,15
1394
USB2.0 1394 CONN. PG 36
33MHz PCI 8-in-1 Card Reader
AUDIO/AMP
IDT_92HD73C Camera + D-MIC R5C833 PG 35 Card Reader CONN.
PG 31 PG 32 LPC PG 36
CIR
PG 43
Audio KBC TSOP36136TS
A-MIC SPK conn
Jacks x3 ITE8512
18X8
PG 32 PG 31 PG 32
PG 42
D Keyboard D
SPI PS/2 PG 43
USER QUANTA
FLASH Touchpad
INTERFACE
16Mbits Title
COMPUTER
PG 44 PG 41 PG 43 BLOCK DIAGRAM
Size Document Number Rev

FX6 3A
Date: Tuesday, June 03, 2008 Sheet 1 of 70

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
INDEX USB PORT# DESTINATION

Pg# Description
1 Schematic Block Diagram 0 Left side USB.
2 Index/Power States and USB/PCI/PCIe map
3-6 CPU page 1 Left side USB.
7-11 RS780M page
A 12-15 SB700 page 2 IO board A
16-17 DDRII SO-DIMM(200P)

18-23 Blank 3 IO board
24 LCD/CRT HYBRID SB700 4 WLAN
25 Clock Generator
26 LCD Conn.
27 CRT Conn 5 WWAN
28 HDMI
29 FAN /THERMAL 6 WPAN
30 SATA (HDD&CD_ROM)
31-32 Audio CODEC(92HD73)/Phone Jack 7 EXPRESS
33-34 LOM /Switch
35-36 PC CARD/1394 10 Biometric
37 EXPRESS
38 USB 11 Camera
B 39 Mini Card B
40 WWAN PCI TABLE

41 Flash ROM, RTC
42 ITE8512 PCI EXPRESS DESTINATION
PCI DEVICE IDSEL REQ#/GNT# PIRQ
43 TP/KB/CIR/BT
44 Switch,Keyboard & LED Lane 1 WLAN
45 System Reset Circuit CardBus AD17 REQ#1/GNT#1 IRQ_SERIRQ
IRQD
46 RUN POWER Lane 2 WPAN
47 Battery Charger
48 DCIN,Batt Lane 3 LOM
49 1.8V_SUS,0.9VTT
50 1.5V_RUN AND 1.1V_RUN Lane 4 EXPRESS CARD
51 +VCC_NB
52 +3.3V_ALW/+5V_SUS Lane 5 WWAN
53 VCC_VCORE
C C
54 +1.2V_ALW_SUS
55 Blank PM TABLE
56 Power Rail for system
+5V_RUN
57 Power Sequence Diagram
+3.3V_RUN
58 SMBUS BLOCK
+2.5V_RUN
59 Stitch caps and Screw hole. power
plane +15V_ALW +5V_SUS +1.8V_RUN
+5V_ALW +3.3V_SUS +1.2V_RUN
+3.3V_ALW +1.8V_SUS +1.5V_RUN
POWER STATES +0.9V_DDR_VTT +VCC_CORE
+1.2V_ALW_SUS +NB_VCORE
Signal SLP SLP ALWAYS SUS RUN CLOCKS State
State S3# S5# PLANE PLANE PLANE
S0 (Full ON) HIGH HIGH ON ON ON ON S0 ON ON ON
D D
S3 (Suspend to RAM) LOW HIGH ON ON OFF OFF S3 ON ON OFF
S4 (Suspend to DISK) LOW HIGH ON OFF OFF OFF S5 S4/AC ON OFF OFF
QUANTA
Title
COMPUTER
S5 (SOFT OFF) LOW LOW ON OFF OFF OFF S5 S4 on Battery OFF OFF OFF Index

FX6 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
+1.2V_RUN
(19)
C481 C489 C490 C483 C486 C484 C487

10U 10U 10U 0.22U 0.22U 180P 180P
10 10 10 10 10 50 50
X7R X7R X7R X7R X7R NPO NPO
0805 0805 0805 0603 0603
D D
Place close to socket
* If VLDT is connected only on one side,

one 4.7uF C101 cap should be added to
the island side
+1.2V_RUN U24A +1.2V_RUN
D1 VLDT_A0 HT LINK VLDT_B0 AE2

D2 VLDT_A1 VLDT_B1 AE3
D3 AE4 500mA
C VLDT_A2 VLDT_B2 C
D4 VLDT_A3 VLDT_B3 AE5
7 HT_CADIN0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CADOUT0 7

7 HT_CADIN#0 E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CADOUT#0 7
7 HT_CADIN1 E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CADOUT1 7
7 HT_CADIN#1 F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CADOUT#1 7
7 HT_CADIN2 G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CADOUT2 7
7 HT_CADIN#2 G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CADOUT#2 7
7 HT_CADIN3 G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CADOUT3 7
7 HT_CADIN#3 H1 L0_CADIN_L3 L0_CADOUT_L3 AA3 HT_CADOUT#3 7
7 HT_CADIN4 J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CADOUT4 7
7 HT_CADIN#4 K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CADOUT#4 7
7 HT_CADIN5 L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CADOUT5 7
7 HT_CADIN#5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CADOUT#5 7
7 HT_CADIN6 L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CADOUT6 7
7 HT_CADIN#6 M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CADOUT#6 7
7 HT_CADIN7 N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CADOUT7 7
7 HT_CADIN#7 N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CADOUT#7 7
7 HT_CADIN8 E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CADOUT8 7
7 HT_CADIN#8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CADOUT#8 7
7 HT_CADIN9 F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CADOUT9 7
7 HT_CADIN#9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CADOUT#9 7
7 HT_CADIN10 G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CADOUT10 7
B
7 HT_CADIN#10 H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CADOUT#10 7 B
7 HT_CADIN11 H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CADOUT11 7
7 HT_CADIN#11 H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CADOUT#11 7
7 HT_CADIN12 K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CADOUT12 7
7 HT_CADIN#12 K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CADOUT#12 7
7 HT_CADIN13 L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CADOUT13 7
7 HT_CADIN#13 M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CADOUT#13 7
7 HT_CADIN14 M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CADOUT14 7
7 HT_CADIN#14 M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CADOUT#14 7
7 HT_CADIN15 N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CADOUT15 7
7 HT_CADIN#15 P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CADOUT#15 7
7 HT_CLKIN0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CLKOUT0 7

7 HT_CLKIN#0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CLKOUT#0 7
7 HT_CLKIN1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CLKOUT1 7
7 HT_CLKIN#1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CLKOUT#1 7
7 HT_CTLIN0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CTLOUT0 7

7 HT_CTLIN#0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CTLOUT#0 7
7 HT_CTLIN1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CTLOUT1 7
7 HT_CTLIN#1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CTLOUT#1 7
FOX_PZ6382A-284S-41F
A A
QUANTA
Title
COMPUTER
S1G2 HT I/F

FX6 3A
Date: Wednesday, June 25, 2008 Sheet 3 of 70

5 4 3 2 1
A B C D E
Notes for the SODIMM locations:

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
DIMMA = CN5
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE DIMMB = CN6
Processor DDR2 Memory Interface
U24C
CPU_VTT_SUS_SENSE MEM:DATA
DDR_B_D0 C11 G12 DDR_A_D0
should be routed as 10mils 16 DDR_B_D[0..63]
DDR_B_D1 MB_DATA0 MA_DATA0 DDR_A_D1
DDR_A_D[0..63] 16
A11 F12
and 10mils spacing from any DDR_B_D2 MB_DATA1 MA_DATA1 DDR_A_D2
A14 H14
4 adjacent signals in X, Y, Z B14
MB_DATA3 MA_DATA3
G14 4
DDR_B_D4 G11 H11 DDR_A_D4
directions. DDR_B_D5 MB_DATA4 MA_DATA4 DDR_A_D5
E11 H12
Place Capacitors for +0.9V_CPU_M_VREF_SUS < 1" from the RS780. D12
MB_DATA6 MA_DATA6
C13
KEEP TRACE TO RESISTORS LESS DDR_B_D7 A13 E13 DDR_A_D7
+0.9V_CPU_M_VREF_SUS trace length < 6", trace width > 15mils and DDR_B_D8 MB_DATA7 MA_DATA7 DDR_A_D8
THAN 1.0" FROM CPU PIN A15 H15
20mils spacing from any adjacent signals in X, Y, Z directions. DDR_B_D9 MB_DATA8 MA_DATA8 DDR_A_D9
A16 E15
A19 E17
A20 H17
C14 E14
+0.9V_DDR_VTT U24B +0.9V_DDR_VTT DDR_B_D13 MB_DATA12 MA_DATA12 DDR_A_D13
D14 F14
C18 C17
D10 W10 D18 G17
39.2/F VTT1 MEM:CMD/CTRL/CLK VTT5 1750mA DDR_B_D16 MB_DATA15 MA_DATA15 DDR_A_D16
C10 AC10 CPU_VTT_SUS_SENSE 49 D20 G18
R426 VTT2 VTT6 DDR_B_D17 MB_DATA16 MA_DATA16 DDR_A_D17
B10 AB10 A21 C19
VTT3 VTT7 C398 DDR_B_D18 MB_DATA17 MA_DATA17 DDR_A_D18
AD10 AA10 D24 D22
VTT4 VTT8 *470P_NC DDR_B_D19 MB_DATA18 MA_DATA18 DDR_A_D19
A10 C25 E20
M_ZP VTT9 50 DDR_B_D20 MB_DATA19 MA_DATA19 DDR_A_D20
AF10 B20 E18
M_ZN MEMZP CPU_VTT_SUS_SENSE X7R DDR_B_D21 MB_DATA20 MA_DATA20 DDR_A_D21
AE10 Y10 C20 F18
MEMZN VTT_SENSE DDR_B_D22 MB_DATA21 MA_DATA21 DDR_A_D22
B24 B22
MEM_MA_RESET# MB_DATA22 MA_DATA22
T28 H16 W17 +0.9V_CPU_M_VREF_SUS DDR_B_D23 C24 C23 DDR_A_D23
39.2/F RSVD_M1 MEMVREF DDR_B_D24 MB_DATA23 MA_DATA23 DDR_A_D24
E23 F20
R423 MB_DATA24 MA_DATA24
16,17 M_ODT0 T19 B18 MEM_MB_RESET# T31
DDR_B_D25 E24 F22 DDR_A_D25
MA0_ODT0 RSVD_M2 DDR_B_D26 MB_DATA25 MA_DATA25 DDR_A_D26
16,17 M_ODT1 V22 G25 H24
MA0_ODT1 DDR_B_D27 MB_DATA26 MA_DATA26 DDR_A_D27
U21 W26 M_ODT2 16,17 G26 J19
MA1_ODT0 MB0_ODT0 DDR_B_D28 MB_DATA27 MA_DATA27 DDR_A_D28
V19 W23 M_ODT3 16,17 C26 E21
MA1_ODT1 MB0_ODT1 DDR_B_D29 MB_DATA28 MA_DATA28 DDR_A_D29
Y26 D26 E22
+1.8V_SUS MB1_ODT0 DDR_B_D30 MB_DATA29 MA_DATA29 DDR_A_D30
16,17 DDR_CS0_DIMMA# T20 G23 H20
MA0_CS_L0 DDR_B_D31 MB_DATA30 MA_DATA30 DDR_A_D31
16,17 DDR_CS1_DIMMA# U19 V26 DDR_CS0_DIMMB# 16,17 G24 H22
MA0_CS_L1 MB0_CS_L0 DDR_B_D32 MB_DATA31 MA_DATA31 DDR_A_D32
U20 W25 DDR_CS1_DIMMB# 16,17 AA24 Y24
V20 U22 AA23 AB24
AD24 AB22
16,17 DDR_CKE0_DIMMA J22 J25 DDR_CKE2_DIMMB 16,17 AE24 AA21
MA_CKE0 MB_CKE0 DDR_B_D36 MB_DATA35 MA_DATA35 DDR_A_D36
16,17 DDR_CKE1_DIMMA J20 H26 DDR_CKE3_DIMMB 16,17 AA26 W22
MA_CKE1 MB_CKE1 DDR_B_D37 MB_DATA36 MA_DATA36 DDR_A_D37
AA25 W21
3
DDR_B_D38 MB_DATA37 MA_DATA37 DDR_A_D38 3
N19 P22 AD26 Y22
To SODIMM socket A (Far/Bottom)

To SODIMM socket B (Near/TOP)
MA_CLK_H5 MB_CLK_H5 DDR_B_D39 MB_DATA38 MA_DATA38 DDR_A_D39
N20 R22 AE25 AA22
MA_CLK_L5 MB_CLK_L5 DDR_B_D40 MB_DATA39 MA_DATA39 DDR_A_D40
16 M_CLK_DDR0 E16 A17 M_CLK_DDR2 16 AC22 Y20
16 M_CLK_DDR#0 F16 A18 M_CLK_DDR#2 16 AD22 AA20
16 M_CLK_DDR1 Y16 AF18 M_CLK_DDR3 16 AE20 AA18
16 M_CLK_DDR#1 AA16 AF17 M_CLK_DDR#3 16 AF20 AB18
P19 R26 AF24 AB21
P20 R25 AF23 AD21
16,17 DDR_A_MA[0..15] DDR_B_MA[0..15] 16,17 AC20 AD19
DDR_A_MA0 DDR_B_MA0 DDR_B_D47 MB_DATA46 MA_DATA46 DDR_A_D47
N21 P24 AD20 Y18
DDR_A_MA1 MA_ADD0 MB_ADD0 DDR_B_MA1 DDR_B_D48 MB_DATA47 MA_DATA47 DDR_A_D48
M20 N24 AD18 AD17
N22 P26 AE18 W16
M19 N23 AC14 W14
M22 N26 AD14 Y14
L20 L23 AF19 Y17
M24 N25 AC18 AB17
L21 L24 AF16 AB15
L19 M26 AF15 AD15
K22 K26 AF13 AB13
R21 T26 AC12 AD13
L22 L26 AB11 Y12
K20 L25 Y11 W11
V24 W24 AE14 AB14
K24 J23 AF14 AA14
K19 J24 AF11 AB12
MA_ADD15 MB_ADD15 DDR_B_D63 MB_DATA62 MA_DATA62 DDR_A_D63
AD11 AA12
MB_DATA63 MA_DATA63
16,17 DDR_A_BS0 R20 R24 DDR_B_BS0 16,17
MA_BANK0 MB_BANK0 DDR_B_DM0 DDR_A_DM0
16,17 DDR_A_BS1 R23 U26 DDR_B_BS1 16,17 A12 E12
MA_BANK1 MB_BANK1 DDR_B_DM1 MB_DM0 MA_DM0 DDR_A_DM1
16,17 DDR_A_BS2 J21 J26 DDR_B_BS2 16,17 B16 C15
MA_BANK2 MB_BANK2 DDR_B_DM2 MB_DM1 MA_DM1 DDR_A_DM2
A22 MB_DM2 MA_DM2 E19
R19 U25 DDR_B_DM3 E25 F24 DDR_A_DM3
16,17 DDR_A_RAS# MA_RAS_L MB_RAS_L DDR_B_RAS# 16,17 MB_DM3 MA_DM3
T22 U24 DDR_B_DM4 AB26 AC24 DDR_A_DM4
16,17 DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# 16,17 MB_DM4 MA_DM4
T24 U23 DDR_B_DM5 AE22 Y19 DDR_A_DM5
16,17 DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# 16,17 MB_DM5 MA_DM5
DDR_B_DM6 AC16 AB16 DDR_A_DM6
DDR_B_DM7 MB_DM6 MA_DM6 DDR_A_DM7
2
16 DDR_B_DM[0..7] AD12 Y13 DDR_A_DM[0..7] 16
2
MB_DM7 MA_DM7
FOX_PZ6382A-284S-41F DDR_B_DQS0 C12 G13 DDR_A_DQS0
DDR_B_DQS#0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS#0
B12 H13
DDR_B_DQS1 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS1
D16 MB_DQS_H1 MA_DQS_H1 G16
DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
A24 C22
A23 C21
F26 G22
E26 G21
AC25 AD23
AC26 MB_DQS_L4 MA_DQS_L4 AC23
DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
+1.8V_SUS DDR_B_DQS#5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS#5
AF22 AB20
AE16 MB_DQS_H6 MA_DQS_H6 Y15
DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
AF12 W12
AE12 MB_DQS_L7 MA_DQS_L7 W13
R114
1K/F DDR_A_DQS0
0603 C140 DDR_B_DQS0 DDR_A_DQS1
0.1U DDR_B_DQS1 FOX_PZ6382A-284S-41F DDR_A_DQS2
10 DDR_B_DQS2 Athlon 64 S1 DDR_A_DQS3
X7R +0.9V_CPU_M_VREF_SUS DDR_B_DQS3 DDR_A_DQS4
DDR_B_DQS4
Processor Socket DDR_A_DQS5
DDR_B_DQS5 DDR_A_DQS6
DDR_B_DQS6 DDR_A_DQS7
16 DDR_A_DQS[0..7]
DDR_B_DQS7
16 DDR_B_DQS[0..7]
R145 C141 C171 DDR_A_DQS#0
1K/F 0.1U 1000P DDR_B_DQS#0 DDR_A_DQS#1
0603 10 50 DDR_B_DQS#1 DDR_A_DQS#2
X7R X7R DDR_B_DQS#2 DDR_A_DQS#3
DDR_B_DQS#3 DDR_A_DQS#4
1 1
16 DDR_A_DQS#[0..7]
PLACE CLOSE TO CPU DDR_B_DQS#7
16 DDR_B_DQS#[0..7]
sensing point for
op-amp feedback
routed near CPU
QUANTA
Title
COMPUTER
S1G2 DDRII MEMORY

FX6 3A

A B C D E
5 4 3 2 1
+1.8V_SUS +3.3V_RUN
+3.3V_RUN
R80
+3.3V_RUN
+1.8V_RUN
C98 R63 R59
*20K_NC H_THERMTRIP# 52
*0.1U_NC 10K *680_NC
R79 10 R776
R389 *34.8K_NC X7R 1M Q5
2
300 Q83 MMBT3904
2
2
CPU_MEMHOT#_L 3 1 CPU_MEMHOT# 16
3
Q84 2N7002W-7-F
1
CPU_LDT_REQ#_R 1 3 FDV301N C761 +1.8V_SUS
CPU_LDT_REQ# 9
0.1U
CPU_THERMTRIP# 2 10
X7R
D Q12 R395 D
*FDV301N_NC 10K
1
R72 0
2
Q61
MMBT3904
CPU_THERMTRIP#_1.8V 1 3 CPU_THERMTRIP#
+5V_ALW2 CPU_THERMTRIP# 13
CPU_PWRGD_SVID_REG 2-Bit Boot VID Codes

CPU_PWRGD_SVID_REG 53
R87
3
+1.8V_RUN 10K Q17 Voltage Output CPU_PROCHOT#
FDV301N SVC SVD (CPU Power)
3
2 (16)
R90 0 0 1.1V Q86 2 BID1 42
3
300 Q14 LAYOUT: ROUTE VDDA TRACE APPROX. 2N7002W-7-F

FDV301N 0 1 1.0V
1
50 mils WIDE (USE 2x25 mil TRACES TO
1
CPU_PWRGD 2 L65 ferrite bead with an approximate 1 0 0.9V
12 CPU_PWRGD EXIT BALL FIELD) AND 500 mils LONG.
C744
impedance of 33 , a maximum DC
(20)
*0.1U_NC D5 resistance of 0.025 ohm , and a current
This trace should be kept at least 20 mils away from all other signals. 1 1 0.8V
16 rating of at least 3000mA. +2.5V_CPU_VDDA_RUN +1.8V_SUS
1
X7R
*RB500V-40_NC
+1.8V_RUN +2.5V_RUN +2.5V_CPU_VDDA_RUN U24D

L18
CPU_PWRGD CPU_PWRGD_SVID_REG +2.5V_CPU_VDDA_RUN 40mA F8 M11 R452 R400 R64 R398 R71
R89 *0_NC BLM18PG330SN1B C89 C94 C93 VDDA1 KEY1 300 300 300 1K 1K
F9 W18
R99 0603 4.7U 0.22U 3300P VDDA2 KEY2
300 + C88 10 10 50 CPU_CLKIN_SC_P A9 A6 CPU_SVC_R
CPU_CLKIN_SC_N CLKIN_H SVC CPU_SVD_R CPU_SVC 53
100U X7R X7R X7R A8 A4
CLKIN_L SVD CPU_SVD 53
6.3 0805 0603
LDT_STOP# Polymer LDT_RST# B7
C 9,12 LDT_STOP# CPU_PWRGD RESET_L C
3528 A7
LDT_STOP# PWROK
F10 AF6 CPU_THERMTRIP#_1.8V
CPU_LDT_REQ#_R LDTSTOP_L THERMTRIP_L
D8 If AMD SI is not used, the SID pin can be left unconnected C6 AC7 CPU_PROCHOT# CPU_PROCHOT# 12
LDTREQ_L PROCHOT_L
and SIC should have a 300- ( 5%) pulldown to VSS. AA8 CPU_MEMHOT#_L
CPU_SIC MEMHOT_L
AF4 H_THERMDC 29
+1.8V_RUN CPU_SID SIC
RB500V-40 AF5
CPU_ALERT SID H_THERMDC
Place R78 and R77 < 1.5". AE6
ALERT_L THERMDC
W7
W8 H_THERMDA C100
Route CPU_HTREF1/0 with 5mils trace width and 10mils CPU_HTREF0 THERMDA *220P/50V_NC
R6
R97 spacing from other signals in X, Y, Z directions R76 44.2/F CPU_HTREF1 HT_REF0
+1.2V_RUN P6 H_THERMDA 29
300 R74 44.2/F HT_REF1
CPU_VDD0_RUN_FB_H
Place C212< 100mils from CPU.
F6 W9 CPU_VDDIO_SUS_FB_H 49
CPU_VDD0_RUN_FB_L VDD0_FB_H VDDIO_FB_H
E6 Y9 CPU_VDDIO_SUS_FB_L 49
LDT_RST# VDD0_FB_L VDDIO_FB_L
9,12 LDT_RST# CPU_VDD1_RUN_FB_H Y6 H6 CPU_VDDNB_RUN_FB_H 53
CPU_VDD1_RUN_FB_L VDD1_FB_H VDDNB_FB_H
AB6 G6 CPU_VDDNB_RUN_FB_L 53
VDD1_FB_L VDDNB_FB_L
D7
CPU_DBRDY G10
13,45 SB_PWRGD CPU_TMS DBRDY CPU_DBREQ#
AA9 E10
CPU_TCK TMS DBREQ_L
RB500V-40 AC9
CPU_TRST# TCK
AD9 AE9 CPU_TDO
CPU_TDI TRST_L TDO
AF9
TDI
T12 CPU_VDD0_RUN_FB_H CPU_TEST23_TSTUPD CPU_TEST28_H_PLLCHRZ_P
+1.8V_SUS AD7 J7
53 CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L T25 TEST23 TEST28_H CPU_TEST28_L_PLLCHRZ_N T11
53 CPU_VDD0_RUN_FB_L H8 T15
CPU_TEST18_PLLTEST1 TEST28_L
T17 T27 H10
CPU_TEST19_PLLTEST0 TEST18 CPU_TEST17_BP3
T29 G9 D7 T72
R383 R391 R394 TEST19 TEST17 CPU_TEST16_BP2
E7 T18
CPU_TEST25_H_BYPASSCLK_H TEST16 CPU_TEST15_BP1
T14 T23 E9 F7 T13
CPU_VDD1_RUN_FB_H CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST15 CPU_TEST14_BP0
53 CPU_VDD1_RUN_FB_H T22 E8 C7 T74
390 390 1K CPU_VDD1_RUN_FB_L TEST25_L TEST14
53 CPU_VDD1_RUN_FB_L CPU_TEST21_SCANEN
T19 T16 AB8 C3
CPU_TEST20_SCANCLK2 TEST21 TEST7
T75 AF7 K8
SCLK3 CPU_SIC CPU_TEST24_SCANCLK1 TEST20 TEST10
13 SCLK3 T73 AE7
SDATA3 R385 *0_NC CPU_SID CPU_TEST22_SCANSHIFTEN TEST24
13 SDATA3 T76 AE8 C4
R388 *0_NC CPU_ALERT CPU_TEST12_SCANSHIFTENB TEST22 TEST8
T24 AC8
CPU_TEST27_SINGLECHAIN TEST12
T77 AF8
TEST27 CPU_TEST29_H_FBCLKOUT_P
C9 T21
B CPU_TEST9_ANALOGIN TEST29_H CPU_TEST29_L_FBCLKOUT_N B
T71 C2 C8 T20
CPU_CLKIN_SC_P TEST9 TEST29_L
AA6
25 CPU_CLK C499 3900P CPU_CLKIN_SC_N TEST6
50 R378 A3 H18
X7R RSVD1 RSVD10
0 A5 H19
RSVD2 RSVD9
B3 AA7
R402 RSVD3 RSVD8
B5 D5
169/F RSVD4 RSVD7
C1 C5
RSVD5 RSVD6
25 CPU_CLK# C498 3900P

50 FOX_PZ6382A-284S-41F
X7R
1.KEEP TRACE TO RESISTOR LESS THAN 600MILS FROM CPU
PIN AND TRACE TO AC CAPS LESS THAN 1.2".
2. CPUCLK and CPUCLK# mismatch < 35 mils.
(18)
+1.8V_SUS
CPU_TEST23_TSTUPD R790 *300_NC

CPU_TEST21_SCANEN R777 300
*220_NC
*220_NC
*220_NC
*220_NC
CPU_TEST24_SCANCLK1 R778 300

300
HDT CONNECTOR
CN1
R121
R126
R127
R137
R139
1 2 +3.3V_RUN +1.8V_RUN
GND GND
3 4
Resreved1 GND
5
Resreved2 GND
6 If no use which Net
CPU_DBREQ# 7 8
CPU_DBRDY DBREQ_L GND need pull-up or down
9 10
A CPU_TCK DBRDY GND R117 R109 A
11 12
CPU_TMS TCK GND *4.7K_NC *4.7K_NC
13 14
CPU_TDI TMS GND
15 16
CPU_TRST# TDI GND Q19
17 18
TRST_L GND
2
CPU_TDO 19 20 *MMBT3904_NC
TDO GND
21 22
VDDIO1 GND CPU_RESET# LDT_RST#
+1.8V_SUS 23 24 3 1
VDDIO2 RESET_L
GND
*HDT conn_NC
25
QUANTA
R116
R110
*100K_NC
0
Title
COMPUTER
S1G2 CTRL & DEBUG
NOTE:HDT TERMINATION IS REQUIRED FOR REV.Ax SILICON ONLY. Size Document Number Rev
FX6 3A

5 4 3 2 1
5 4 3 2 1
BOTTOMSIDE DECOUPLING
PROCESSOR POWER AND GROUND +CPU_VDD0_RUN
C103 C109 C115 C122 C123 C116 C104

U24F 22U 22U 22U 22U 0.22U 0.01U 180P
+CPU_VDD0_RUN U24E +CPU_VDD1_RUN 4 4 4 4 10 16 50
AA4 VSS1 VSS66 J6
AA11 J8 X6S X6S X6S X6S X7R X7R NPO
VSS2 VSS67 0805 0805 0805 0805 0603
D G4 VDD0_1 VDD1_1 P8 AA13 VSS3 VSS68 J10 D
H2 VDD0_2 VDD1_2 P10 AA15 VSS4 VSS69 J12
J9 VDD0_3 VDD1_3 R4 AA17 VSS5 VSS70 J14
J11 VDD0_4 VDD1_4 R7 AA19 VSS6 VSS71 J16
J13 R9 AB2 J18 +CPU_VDD1_RUN
VDD0_5 VDD1_5 VSS7 VSS72
J15 VDD0_6 VDD1_6 R11 AB7 VSS8 VSS73 K2
K6 VDD0_7 VDD1_7 T2 AB9 VSS9 VSS74 K7
K10 T6 AB23 K9 C101 C111 C112 C118 C99 C105 C102
VDD0_8 VDD1_8 VSS10 VSS75 22U 22U 22U 22U 0.22U 0.01U 180P
K12 VDD0_9 VDD1_9 T8 AB25 VSS11 VSS76 K11
K14 T10 AC11 K13 4 4 4 4 10 16 50
VDD0_10 VDD1_10 VSS12 VSS77 X6S X6S X6S X6S X7R X7R NPO
L4 VDD0_11 VDD1_11 T12 AC13 VSS13 VSS78 K15
L7 T14 AC15 K17 0805 0805 0805 0805 0603
L9 VDD0_13 VDD1_13 U7 AC17 VSS15 VSS80 L6
L15 U13 AD6 L12 +1.8V_SUS +CPU_VDDNB_RUN
M2 VDD0_17 VDD1_17 U15 AD8 VSS19 VSS84 L14
M6 VDD0_18 VDD1_18 V6 AD25 VSS20 VSS85 L16
M8 V8 AE11 L18 C184 C133 C128 C134 C136 C137 C120 C127 C126
VDD0_19 VDD1_19 VSS21 VSS86 22U 22U 0.22U 0.22U 180P 180P 22U 22U 22U
M10 VDD0_20 VDD1_20 V10 AE13 VSS22 VSS87 M7
N7 V12 AE15 M9 4 4 10 10 50 50 4 4 4
VDD0_21 VDD1_21 VSS23 VSS88 X6S X6S X7R X7R NPO NPO X6S X6S X6S
N9 VDD0_22 VDD1_22 V14 AE17 VSS24 VSS89 AC6
+CPU_VDDNB_RUN N11 W4 AE19 M17 0805 0805 0603 0603 0805 0805 0805
VDD1_24 Y2 AE21 VSS26 VSS91 N4
K16 VDDNB_1 VDD1_25 AC4 AE23 VSS27 VSS92 N8
M16 AD2 +1.8V_SUS B4 N10
VDDNB_2 VDD1_26 VSS28 VSS93
P16 VDDNB_3 B6 VSS29 VSS94 N16
C T16 VDDNB_4 VDDIO27 Y25 B8 VSS30 VSS95 N18 C
+1.8V_SUS V16 V25 B9 P2
VDDNB_5 VDDIO26
VDDIO25 V23 B11
VSS31
VSS32
VSS96
VSS97 P7 DECOUPLING BETWEEN PROCESSOR AND DIMMs
H25 V21 B13 P9
J17
VDDIO1
VDDIO2
VDDIO24
VDDIO23 V18 B15
VSS33
VSS34
VSS98
VSS99 P11 PLACE CLOSE TO PROCESSOR AS POSSIBLE
K18 VDDIO3 VDDIO22 U17 B17 VSS35 VSS100 P17
K21 T25 B19 R8 +1.8V_SUS
VDDIO4 VDDIO21 VSS36 VSS101
K23 VDDIO5 VDDIO20 T23 B21 VSS37 VSS102 R10
K25 VDDIO6 VDDIO19 T21 B23 VSS38 VSS103 R16
L17 T18 B25 R18 C173 C587 C172 C585 C168 C582 C169 C581
VDDIO7 VDDIO18 VSS39 VSS104 4.7U 4.7U 4.7U 4.7U 0.22U 0.22U 0.22U 0.22U
M18 VDDIO8 VDDIO17 R17 D6 VSS40 VSS105 T7
M21 P25 D8 T9 10 10 10 10 10 10 10 10
VDDIO9 VDDIO16 VSS41 VSS106 X7R X7R X7R X7R 0603 0603 0603 0603
M23 VDDIO10 VDDIO15 P23 D9 VSS42 VSS107 T11
M25 P21 D11 T13 0805 0805 0805 0805 X7R X7R X7R X7R
VDDIO11 VDDIO14 VSS43 VSS108
N17 VDDIO12 VDDIO13 P18 D13 VSS44 VSS109 T15
D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ6382A-284S-41F D21 U8
VSS48 VSS113
Athlon 64 S1 D23 VSS49 VSS114 U10 C195,and C135 to be evenly spaced along
Processor Socket D25 U12 +1.8V_SUS
VSS50 VSS115 the VDDIO/VSS plane split
E4 VSS51 VSS116 U14
F2 VSS52 VSS117 U16
F11 U18 C132 C196 C179 C195 C135
VSS53 VSS118 0.01U 0.01U 180P 180P 180P
F13 VSS54 VSS119 V2
F15 V7 16 16 50 50 50
VSS55 VSS120 X7R X7R NPO NPO NPO
F17 VSS56 VSS121 V9
B F19 VSS57 VSS122 V11 B
F21 VSS58 VSS123 V13
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
H21 Y23 +0.9V_DDR_VTT
VSS63 VSS128
H23 VSS64 VSS129 N6
J4 VSS65 C511 C521 C504 C497 C513 C512 C517 C519
4.7U 4.7U 4.7U 4.7U 0.22U 0.22U 0.22U 0.22U
FOX_PZ6382A-284S-41F 10 10 10 10 10 10 10 10
Athlon 64 S1 X7R X7R X7R X7R 0603 0603 0603 0603
Processor Socket 0805 0805 0805 0805 X7R X7R X7R X7R
A1 A26
+0.9V_DDR_VTT
C110 C505 C507 C515

C500 C509 C508 C510 180P 180P 180P 180P
S1g2 1000P 1000P 1000P 1000P 50 50 50 50
50 50 50 50 NPO NPO NPO NPO
uPGA638 X7R X7R X7R X7R
A
Top View A
QUANTA
AF1
Title
COMPUTER
S1G2 PWR & GND

FX6 3A

5 4 3 2 1
5 4 3 2 1
D D
U10A
3 HT_CADOUT0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_CADIN0 3

3 HT_CADOUT#0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_CADIN#0 3
3 HT_CADOUT1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_CADIN1 3
3 HT_CADOUT#1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_CADIN#1 3
3 HT_CADOUT2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_CADIN2 3
3 HT_CADOUT#2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_CADIN#2 3
3 HT_CADOUT3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_CADIN3 3
3 HT_CADOUT#3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_CADIN#3 3
3 HT_CADOUT4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_CADIN4 3
3 HT_CADOUT#4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_CADIN#4 3
3 HT_CADOUT5 P22 HT_RXCAD5P HT_TXCAD5P J25 HT_CADIN5 3
HYPER TRANSPORT CPU I/F

3 HT_CADOUT#5 P23 HT_RXCAD5N HT_TXCAD5N J24 HT_CADIN#5 3
3 HT_CADOUT6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_CADIN6 3
3 HT_CADOUT#6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_CADIN#6 3
3 HT_CADOUT7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_CADIN7 3
3 HT_CADOUT#7 N25 HT_RXCAD7N HT_TXCAD7N K22 HT_CADIN#7 3
C C
3 HT_CADOUT8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_CADIN8 3
3 HT_CADOUT#8 AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_CADIN#8 3
3 HT_CADOUT9 AB25 HT_RXCAD9P HT_TXCAD9P G20 HT_CADIN9 3
3 HT_CADOUT#9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_CADIN#9 3
3 HT_CADOUT10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_CADIN10 3
3 HT_CADOUT#10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_CADIN#10 3
3 HT_CADOUT11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_CADIN11 3
3 HT_CADOUT#11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_CADIN#11 3
3 HT_CADOUT12 W21 HT_RXCAD12P HT_TXCAD12P L19 HT_CADIN12 3
3 HT_CADOUT#12 W20 HT_RXCAD12N HT_TXCAD12N J19 HT_CADIN#12 3
3 HT_CADOUT13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_CADIN13 3
3 HT_CADOUT#13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_CADIN#13 3
3 HT_CADOUT14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_CADIN14 3
3 HT_CADOUT#14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_CADIN#14 3
3 HT_CADOUT15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_CADIN15 3
3 HT_CADOUT#15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_CADIN#15 3
3 HT_CLKOUT0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_CLKIN0 3

3 HT_CLKOUT#0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_CLKIN#0 3
3 HT_CLKOUT1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN1 3
3 HT_CLKOUT#1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_CLKIN#1 3
3 HT_CTLOUT0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_CTLIN0 3

B
3 HT_CTLOUT#0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_CTLIN#0 3 B
3 HT_CTLOUT1 R21 HT_RXCTL1P HT_TXCTL1P P19 HT_CTLIN1 3
3 HT_CTLOUT#1 R20 HT_RXCTL1N HT_TXCTL1N R18 HT_CTLIN#1 3
R363 300/F C23 B24 R367 300/F
HT_RXCALP HT_TXCALP
A24 HT_RXCALN HT_TXCALN B25
RS780M A13 Rev.A12
R363,R367
RS780 301
RX780 1.21K
A A
QUANTA
Title
COMPUTER
RS780-HT LINK I/F

FX6 3A

5 4 3 2 1
5 4 3 2 1
D D
Place near RS780

U10B
D4 A5 PCIE_MTX_GRX_P0 TX2P - 1st Link Red+
GFX_RX0P GFX_TX0P HDMI_TX2+ 28
C4 PART 2 OF 6 B5 PCIE_MTX_GRX_N0 C421 0.1U/10V TX2M - 1st Link Red-
GFX_RX0N GFX_TX0N PCIE_MTX_GRX_P1 C424 HDMI_TX2- 28 TX1P - 1st Link Green+
A3 A4 0.1U/10V
GFX_RX1P GFX_TX1P PCIE_MTX_GRX_N1 C416 HDMI_TX1+ 28 TX1M - 1st Link Green-
B3 B4 0.1U/10V
C2
GFX_RX1N
GFX_RX2P
GFX_TX1N
GFX_TX2P
C3 PCIE_MTX_GRX_P2 C418 0.1U/10V
HDMI_TX1- 28
HDMI_TX0+ 28
TX0P - 1st Link Blue+ HDMI
C1 B2 PCIE_MTX_GRX_N2 C407 0.1U/10V TX0M - 1st Link Blue-
GFX_RX2N GFX_TX2N HDMI_TX0- 28
E5 D1 PCIE_MTX_GRX_P3 C406 0.1U/10V TXCP - Clock+
GFX_RX3P GFX_TX3P PCIE_MTX_GRX_N3 C408 HDMI_CLK+ 28 TXCM - Clock-
F5 D2 0.1U/10V
GFX_RX3N GFX_TX3N HDMI_CLK- 28 TX5P - 2nd Link Red+
G5 E2 C409 0.1U/10V
GFX_RX4P GFX_TX4P TX5M - 2nd Link Red-
G6 E1
GFX_RX4N GFX_TX4N TX4P - 2nd Link Green+
H5 F4
C GFX_RX5P GFX_TX5P TX4M - 2nd Link Green- C
H6 F3
GFX_RX5N GFX_TX5N TX3P - 2nd Link Blue+
J6 F1
GFX_RX6P GFX_TX6P TX3M - 2nd Link Blue-
J5 F2
GFX_RX6N GFX_TX6N
J7 H4
GFX_RX7P GFX_TX7P
J8 H3
GFX_RX7N GFX_TX7N
L5 H1
GFX_RX8P GFX_TX8P
L6 H2
GFX_RX8N GFX_TX8N
M8 J2
GFX_RX9P GFX_TX9P
L8 J1
GFX_RX9N GFX_TX9N
PCIE I/F GFX

P7 K4
GFX_RX10P GFX_TX10P
M7 K3
GFX_RX10N GFX_TX10N
P5 K1
GFX_RX11P GFX_TX11P
M5 K2
GFX_RX11N GFX_TX11N
R8 M4
GFX_RX12P GFX_TX12P
P8 M3
GFX_RX12N GFX_TX12N
R6 M1
GFX_RX13P GFX_TX13P
R5 M2
GFX_RX13N GFX_TX13N
P4 N2
GFX_RX14P GFX_TX14P
P3 N1
GFX_RX14N GFX_TX14N
T4 P1
GFX_RX15P GFX_TX15P
T3 P2
GFX_RX15N GFX_TX15N
AE3 AC1
GPP_RX0P GPP_TX0P
AD4 AC2
GPP_RX0N GPP_TX0N PCIE_TXP1_C
WLAN <----- 39 PCIE_RX1+ AE2
AD3
GPP_RX1P GPP_TX1P AB4
AB3 PCIE_TXN1_C C19 .1U/10V
PCIE_TX1+ 39 ----->WLAN
39 PCIE_RX1- GPP_RX1N GPP_TX1N PCIE_TXP2_C PCIE_TX1- 39
C15 .1U/10V
WPAN <----- 39 PCIE_RX2+ AD1
GPP_RX2P GPP_TX2P
AA2
PCIE_TXN2_C C415 .1U/10V
PCIE_TX2+ 39 ----->WPAN
39 PCIE_RX2- AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
GLAN_TXP_C C414 .1U/10V
PCIE_TX2- 39
GIGA LAN <----- 33 PCIE_RX3+/GLAN_RX+ V5
W6
GPP_RX3P GPP_TX3P
Y1
Y2 GLAN_TXN_C C411 .1U/10V
PCIE_TX3+/GLAN_TX+ 33 ----->GIGA LAN
B 33 PCIE_RX3-/GLAN_RX- GPP_RX3N GPP_TX3N PCIE_TXP4_C PCIE_TX3-/GLAN_TX- 33 B
C410 .1U/10V
EXPRESS CARD <----- 37 PCIE_RX4+ U5
U6
GPP_RX4P GPP_TX4P Y4
Y3 PCIE_TXN4_C C413 .1U/10V
PCIE_TX4+ 37 ----->EXPRESS CARD
37 PCIE_RX4- GPP_RX4N GPP_TX4N PCIE_TXP5_C PCIE_TX4- 37
U8 V1 C412 .1U/10V
WWAN <----- 40 PCIE_RX5+
U7
GPP_RX5P GPP_TX5P
V2 PCIE_TXN5_C C12 .1U/10V
PCIE_TX5+ 40 ----->WWAN
40 PCIE_RX5- GPP_RX5N GPP_TX5N PCIE_TX5- 40
C13 .1U/10V
AA8 AD7 ALINK_NBTX_SBRX_P0
12 ALINK_NBRX_SBTX_P0 SB_RX0P SB_TX0P ALINK_NBTX_SBRX_N0 ALINK_NBTX_C_SBRX_P0 12
Y8 AE7 C428 .1U/10V
12 ALINK_NBRX_SBTX_N0 SB_RX0N SB_TX0N ALINK_NBTX_SBRX_P1 ALINK_NBTX_C_SBRX_N0 12
AA7 AE6 C427 .1U/10V
Y7 AD6 C426 .1U/10V
12 ALINK_NBRX_SBTX_N1 SB_RX1N SB_TX1N ALINK_NBTX_C_SBRX_N1 12
AA5 PCIE I/F SB AB6 ALINK_NBTX_SBRX_P2 C423 .1U/10V
AA6 AC6 C17 .1U/10V
W5 AD5 ALINK_NBTX_SBRX_P3 C18 .1U/10V
Y5 AE5 C417 .1U/10V
C419 .1U/10V
PCE_CALRP(PCE_BCALRP) AC8 PCE_PCAL R33 1.27K/F
AB8 PCE_NCAL R30 2K/F +NB_VDD_MUX
PCE_CALRN(PCE_BCALRN)
RS780M A13
A A
QUANTA
Title
COMPUTER
RS780-PCIE I/F

FX6 3A

5 4 3 2 1
5 4 3 2 1
+1.8V_RUN +VDDA18PCIEPLL +NB_VDD_MUX +PLLVDD +3.3V_RUN +3.3V_AVDD RX780/RS780 POWER DIFFERENCE TABLE Close RS780.
L6 L46 L9
150mA 135mA PIN NAME RX780 RS780
BLM15AG221SN1D C20 BLM15AG221SN1D C436 BK1608HS220-T C44 AVDD NC +3.3V LCD_A0+ LCD_A1+ LCD_A2+ LCD_ACLK+
*10P/50V_NC
*10P/50V_NC
*10P/50V_NC
*10P/50V_NC
220 ohm @ 100MHz C21 2.2U 220 ohm @ 100MHz C434 2.2U 0603 2.2U AVDDDI NC +1.8V
C463
C459
C453
C443
10 10 220 ohm @ 100MHz 10 AVDDQ NC +1.8V
*10U/10V/0805_NC X5R *10U/10V/0805_NC X5R X5R PLLVDD NC +1.1V
0603 0603 0603 PLLVDD19 NC +1.8V
+1.8V_RUN +1.8V_AVDD VDDA18PCIEPLL +1.8V +1.8V LCD_A0- LCD_A1- LCD_A2- LCD_ACLK-
R52 VDDA18HTPLL +1.8V +1.8V
+1.8V_RUN +1.8V_HTPLL +1.8V_RUN +PLLVDD18 +1.8V_RUN +1.8V_AVDDQ VDDLTP18 NC +1.8V LCD_B0+ LCD_B1+ LCD_B2+ LCD_BCLK+
*10P/50V_NC
*10P/50V_NC
*10P/50V_NC
*10P/50V_NC
L17 L12 L14 0/0805 C71 VDDLT18 NC +1.8V
C449
C447
C457
C444
100mA 2.2U VDDLT33 NC NC
BLM15AG221SN1D C85 BLM15AG221SN1D C67 BLM21PG221SN1D C82 10
D C84 2.2U C69 2.2U 0805 2.2U X5R D
220 ohm @ 100MHz 220 ohm @ 100MHz LCD_B0- LCD_B1- LCD_B2- LCD_BCLK-
10 10 220 ohm @ 100MHz 10 0603
*10U/10V/0805_NC X5R *10U/10V/0805_NC X5R X5R
0603 0603 0603
U10C
100mA F12 A22 +3.3V_RUN +VDDG_NB
+3.3V_AVDD AVDD1(NC) TXOUT_L0P(NC) LCD_A0+ 26
E12
AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC)
B22 LCD_A0- 26
+1.8V_RUN +VDDG_NB +1.8V_AVDD F14 A21 LCD_A1+ 26 R24 0
AVDDDI(NC) TXOUT_L1P(NC)
G15 B21 LCD_A1- 26
AVSSDI(NC) TXOUT_L1N(NC)
+1.8V_AVDDQ H15 B20 LCD_A2+ 26
Q52 AVDDQ(NC) TXOUT_L2P(NC)
H14 A20 LCD_A2- 26
*BSS138_NL_NC AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) T68
A19
NB_TV_C TXOUT_L3P(NC) T7
E17 B19
CRT/TVOUT
T70 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) T9
2
R341 F17
*4.7K_NC T5 Y(DFT_GPIO2)
F15 B18 LCD_B0+ 26
NB_LDT_STOP# T3 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
5,12 LDT_STOP# 1 3 TXOUT_U0N(NC)
A18 LCD_B0- 26
27 VGA_RED G18 A17 LCD_B1+ 26
T4 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
G17 B17 LCD_B1- 26
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
27 VGA_GRN E18 D20 LCD_B2+ 26
R637 0 T6 GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 D21 LCD_B2- 26
GREENb(NC) TXOUT_U2N(NC)
27 VGA_BLU E19 D18
T67 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) T8
F19 D19
BLUEb(NC) TXOUT_U3N(NC) T10
+1.8V_RUN +VDDG_NB R48 R49 R50 INT_VGAHSYNC A11 B16 LCD_ACLK+ 26
27 VGAHSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) T65
INT_VGAVSYNC B11 A16 LCD_ACLK- 26
27 VGAVSYNC INT_VGA_DDCDAT DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) T66
140/F 150/F 150/F E8 D16 LCD_BCLK+ 26 +1.8V_RUN
Q3 INT_VGA_DDCCLK DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) L47
F8 D17 LCD_BCLK- 26
*BSS138_NL_NC DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
R48,R49,R50 CLOSE
TO NB R45 715/F G14 BLM15AG221SN1D
DAC_RSET(PWM_GPIO1)
2
C R39 +LPVDD C441 C440 C

5 CPU_LDT_REQ# +PLLVDD VDDLTP18(NC)
A13 220 ohm @ 100MHz
*4.7K_NC +PLLVDD A12 B13 0.1U/10V 2.2U/10V/0603
NB_ALLOW_LDTSTOP +PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
1 3 D14
LVTM
12 ALLOW_LDTSTOP +1.1V_RUN +PLLVDD18 PLLVDD18(NC)
B12 A15 +LVDDR18D
PLL PWR
PLLVSS(NC) VDDLT18_1(NC) +1.8V_RUN
B15
VDDLT18_2(NC) L11
Only for RS780 +1.8V_HTPLL H17
VDDA18HTPLL VDDLT33_1(NC)
A14
R638 0 B14
R46 +VDDA18PCIEPLL VDDLT33_2(NC) BLM15AG221SN1D
+VDDA18PCIEPLL D7
VDDA18PCIEPLL1 C63 C64
4.7K E7
VDDA18PCIEPLL2 VSSLT1(VSS)
C14 220 ohm @ 100MHz
+1.8V_RUN R344 300 D15
SYSRESET# VSSLT2(VSS) 0.1U/10V 4.7U/6.3V/0603
D8 C16
REFCLK_N SYSRESETb VSSLT3(VSS)
A10 C18
26,45 NB_PWRGD NB_LDT_STOP# POWERGOOD VSSLT4(VSS)
C10 C20
PM
INT_VGA_DDCDAT NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
27 G_DAT_DDC2 C12 E20
R47 ALLOW_LDTSTOP VSSLT6(VSS)
C22
INT_VGA_DDCCLK VSSLT7(VSS)
27 G_CLK_DDC2 4.7K C25
25 HT_REFCLK HT_REFCLKP
C24
25 HT_REFCLK# HT_REFCLKN
CLK_NB_14M E11
25 CLK_NB_14M REFCLK_P/OSCIN(OSCIN)
CLOCKs
STRAP_DEBUG_BUS_GPIO_ENABLEb REFCLK_N F11 E9 EN_LCDVDD 26
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP)
F7 BIA_PWM 26
LVDS_BLON(PCE_RCALRP)
Enables the Test Debug Bus using GPIO. 25 CLK_NB_GFX
T2
GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
G12 PANEL_BKEN 42
RX780:NB_TV_C; RS780:VSYNC# T1
25 CLK_NB_GFX# GFX_REFCLKN
RS780 RX780 RX780->Pop
R21 *0_NC U1 R35 *2.7K_NC
1 Disable Enable 25 CLK_GPP_REFCLK R22 *0_NC GPP_REFCLKP R338 *100K_NC
U2 GPP_REFCLKN
0 Enable Disable 25 CLK_GPP_REFCLK#
V4 GPPSB_REFCLKP(SB_REFCLKP)
25 CLK_NB_SBLINK
V3
25 CLK_NB_SBLINK# GPPSB_REFCLKN(SB_REFCLKN)
B +3.3V_RUN B9 B
26 LCD_DDCCLK I2C_CLK
A9 D9 TMDS_HPD
R639 *3K_NC INT_VGAVSYNC 26 LCD_DDCDAT
A8
I2C_DATA MIS. TMDS_HPD(NC)
D10 T1
HDMI_DET 28
28 HDMI_SCL T61 DDC_CLK0/AUX0P(NC) HPD(NC)
28 HDMI_SDA B8
R349 *3K_NC DDC_DATA0/AUX0N(NC) R41 0
B7 DDC_CLK1/AUX1P(NC) TVCLKIN(PWM_GPIO5) D12 SUS_STAT# 13
T62 SUS_STAT#_R
A7
R369 *3K_NC NB_TV_C T60 DDC_DATA1/AUX1N(NC) NB_THERMDA T63
THERMALDIODE_P AE8
B10 AD8
R40 0 CLK_NB_14M 51 STRP_DATA STRP_DATA THERMALDIODE_N C432 RX780/RS780 DEBUG PIN MAPPING
RS780: Enables Side port memory G11 D13 *220P_NC RX780 RS780
C50 RSVD TESTMODE 50
49.9/F AC Term closely clock C8 NB_THERMDC T64
DEBUG_OUT0 RED(DFT_GPIO0) LVDS_DIGON
AUX_CAL(NC)
RS780:HSYNC# pin for length: 50 mils RS780M A13 R42 DEBUG_OUT1 GREEN(DFT_GPIO1) LVDS_ENA_BL
1.8K/F
Selects if Memory SIDE PORT is available or not R31 DEBUG_OUT2 Y(DFT_GPIO2) LVDS_BLON
1 = Memory Side port Not available *150/F_NC
0 = Memory Side port available DEBUG_OUT3 BLUE(DFT_GPIO3) TMDS_HPD
R26 0 SYSRESET#
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1] 12,14,37,39,45 PLTRST#
5,12 LDT_RST# Place C432 close to U16. DEBUG_OUT4 TXOUT_L2N(DBG_GPIO0) AUX1N
R25 *0_NC
DEBUG_OUT5 TXCLK_LP(DBG_GPIO1) AUX1P
+3.3V_RUN +VDDG_NB DEBUG_OUT6 TXOUT_L3N(DBG_GPIO2) HPD
R787 *4.7K_NC SUS_STAT#_R +VDDG_NB +3.3V_RUN
R347 *3K_NC INT_VGAHSYNC DEBUG_OUT7 TXCLK_LN(DBG_GPIO3) AUX_CAL
R346 3K COMB_Pb(DFT_GPIO4) X
R10 R8 R23 R28 R43 C_Pr(DFT_GPIO5) X
A *10K_NC *2K_NC 4.7K 4.7K 4.7K A
DFT_GPIO1: LOAD_EEPROM_STRAPS U1
1 8
NC VCC
Selects Loading of STRAPS from EPROM 2
A1 WP
7
3 6 LCD_DDCCLK LCD_DDCCLK
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use 4
A2
VSS
SCL
SDA 5 STRP_DATA LCD_DDCDAT SUS_STAT# QUANTA
default values if not connected
COMPUTER
*10P/50V_NC
*10P/50V_NC
*10P/50V_NC
*AT24C04N-10SU-2.7_NC
C14
C16
C54
RX780: RS780_AUX_CAL RS780:SUS_STAT C8
*0.1U_NC R5 Title
16 2K RS780-LVDS
D1 X7R
1 2 SUS_STAT#_R Size Document Number Rev
12,14,37,39,45 PLTRST#
FX6 3A
*SDMK0340L-7-F_NC NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS IS MANDATORY.
5 4 3 2 1
5 4 3 2 1
RX780/RS780 POWER DIFFERENCE TABLE
PIN NAME RX780 RS780

VDDHT +1.1V +1.1V
AE14
AC3
AC4
M11
AA4
AB5
AB1
AB7
AE1
AE4
AB2
D11
E14
E15
K14
L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4
G8
D3
D5
H7
R7
N4
R1
R2
R4
U4
VDDHTRX +1.1V +1.1V
A2
B1
E4
P6
V7
V8
V6
Y6
L1
L2
L4
L7
J4
U10F VDDHTTX +1.2V +1.2V
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
RS780M A13
VDDA18PCIE +1.8V +1.8V
VDDG18 +1.8V +1.8V

D D
VDD18_MEM NC +1.8V
PART 6/6
GROUND VDDPCIE +1.1V +1.1V
VDDC +1.1V +1.1V
VDD_MEM NC +1.8V/1.5V
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
DDR2/DDR3
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VDDG33 NC +3.3V
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
+1.1V_RUN +NB_VDD_MUX
R56
80 ohm(4A)
C32
0/0805 4.7U C60 C61 C59
6.3 0.1U 0.1U 0.1U
X5R 16 16 16
0603 X7R X7R X7R VDD_PCIE +NB_VDD_MUX
C L7 C
U10E
J17 A6
100 mil Width
VDDHT_1 VDDPCIE_1 C25 C26 C22 BLM21PG221SN1D
K16
VDDHT_2 PART 5/6 VDDPCIE_2
B6
C27 C24 1U 1U 4.7U 0805
L16 C6
VDDHT_3 VDDPCIE_3 0.1U 0.1U 10 10 6.3
M16 D6
VDDHT_4 VDDPCIE_4 16 16 X6S X6S X5R
P16 E6
VDDHT_5 VDDPCIE_5 X7R X7R 0603 0603 0603
R16 F6
+VDDHTRX VDDHT_6 VDDPCIE_6
T16 G7
L16 VDDHT_7 VDDPCIE_7
H8
VDDPCIE_8
H18 J9
BLM21PG221SN1D C80 VDDHTRX_1 VDDPCIE_9
G19 K9
0805 4.7U C74 C81 C66 VDDHTRX_2 VDDPCIE_10
F20 M9
6.3 0.1U 0.1U 0.1U VDDHTRX_3 VDDPCIE_11
220 ohm @ 100MHz, 2A X5R 16 16 16
E21
VDDHTRX_4 VDDPCIE_12
L9
D22 P9
0603 X7R X7R X7R VDDHTRX_5 VDDPCIE_13
B23 R9
A23 T9
V9
VDDPCIE_16
AE25 U9
VDDHTTX_1 VDDPCIE_17 +NB_VCORE
AD24
+1.2V_RUN +VDDHTTX VDDHTTX_2
AC23 K12
L54 VDDHTTX_3 VDDC_1
AB22 J14
VDDHTTX_4 VDDC_2 C9 C10
AA21 U16
BLM21PG221SN1D VDDHTTX_5 VDDC_3 10U 10U C46 C56 C55
Y20 J11
0805 C473 C70 C65 C62 C68 VDDHTTX_6 VDDC_4 4 4 0.1U 0.1U 0.1U
220 ohm @ 100MHz, 2A W19 K15
POWER
4.7U 0.1U 0.1U 0.1U 0.1U VDDHTTX_7 VDDC_5 X6S X6S 10 10 10
V18 VDDHTTX_8 VDDC_6 M12
+1.35V_HT_VCC 6.3 16 16 16 16 U17 L14 0805 0805 X7R X7R X7R
L55 X5R X7R X7R X7R X7R VDDHTTX_9 VDDC_7
T17 L11
0603 VDDHTTX_10 VDDC_8
R17 VDDHTTX_11 VDDC_9 M13
*BLM21PG221SN1D_NC P17 M15
0805 VDDHTTX_12 VDDC_10 C34 C47 C43 C52
M17 VDDHTTX_13 VDDC_11 N12
B 0.1U 0.1U 0.1U 0.1U B
VDDC_12 N14
J10 P11 10 10 10 10
+1.8V_RUN +VDDA18PCIE VDDA18PCIE_1 VDDC_13 X7R X7R X7R X7R
P10 VDDA18PCIE_2 VDDC_14 P13
L8 K10 P14
40mil Width M10
VDDA18PCIE_3 VDDC_15
R12
BLM21PG221SN1D C30 C31 VDDA18PCIE_4 VDDC_16
L10 R15
0805 4.7U 4.7U C37 C29 C38 C35 VDDA18PCIE_5 VDDC_17
W9 VDDA18PCIE_6 VDDC_18 T11
220 ohm @ 100MHz, 2A 6.3 6.3 0.1U 0.1U 0.1U 0.1U H9 T15 220 ohm @ 100MHz, 2A
X5R X5R 16 16 16 16 VDDA18PCIE_7 VDDC_19
T10 VDDA18PCIE_8 VDDC_20 U12
0603 0603 X7R X7R X7R X7R R10 T14
VDDA18PCIE_9 VDDC_21 +1.8V_VDD_MEM +1.8V_RUN
Y9 VDDA18PCIE_10 VDDC_22 J16 L10
AA9
+1.8V_RUN AB9
VDDA18PCIE_11
AE10
80mil Width
VDDA18PCIE_12 VDD_MEM1(NC) BLM21PG221SN1D
AD9 AA11
VDDA18PCIE_13 VDD_MEM2(NC) C42 C41 C40 C39 C48 0805
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
C28 U10 AD10 0.1U 0.1U 0.1U 0.1U 4.7U
1U VDDA18PCIE_15 VDD_MEM4(NC) 16 16 16 16 6.3
VDD_MEM5(NC) AB10
10 F9 AC10 X7R X7R X7R X7R X5R
X6S VDDG18_1(VDD18_1) VDD_MEM6(NC) 0603
G9 VDDG18_2(VDD18_2)
0603 AE11 H11
VDD18_MEM1(NC) VDDG33_1(NC)
AD11 VDD18_MEM2(NC) VDDG33_2(NC) H12
+3.3V_RUN +1.35V_HT_VCC
U20 +1.8V_RUN +VDD18_MEM
3 4 R350 RS780M A13
GND1 OUT +3.3V_VDDR +3.3V_RUN
2 5 C435 L5
IN RESET#/FB 0/0805 1U 20mil Width
1 6 R381 C491 10 BLM15AG221SN1D
42,45,46 1.2V_RUN_ON EN GND2 *12.7K_NC *1U_NC X6S C49 C36
*TPS72501DCQ_NC 0603 0.1U 0.1U
A 16 16 A
C488 X7R X7R
*2.2U_NC
10
X5R
0603
QUANTA
R382
*120K_NC Title
COMPUTER
RS780-POWER

FX6 3A

5 4 3 2 1
1 2 3 4 5 6 7 8
RX780/RS780 POWER DIFFERENCE TABLE

U10D
PAR 4 OF 6
MEM_A0 AB12 AA18 MEM_DQ0 PIN NAME RX780 RS780
256-Mbit DDR2 16Mbit*16(4bank) MEM_A1 AE16
MEM_A0(NC)
MEM_A1(NC)
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC) AA20 MEM_DQ1
MEM_A2 MEM_DQ2 IOPLLVDD18 NC +1.8V
U2
Bit MEM_A3
V11
AE15
MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
Y19 MEM_DQ3
MEM_A3(NC) MEM_DQ3/DVO_D0(NC)
MEM_A0
Swap
MEM_DQ6
MEM_A4
MEM_A5
AA12 MEM_A4(NC) MEM_DQ4(NC) V17 MEM_DQ4
MEM_DQ5
IOPLLVDD NC +1.1V
M8 A0 DQ0 G8 AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
MEM_A1 M3 G2 MEM_DQ2 MEM_A6 AB14 AA15 MEM_DQ6
MEM_A2 A1 DQ1 MEM_DQ7 MEM_A7 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7
M7 A2 DQ2 H7 AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
MEM_A3 N2 H3 MEM_DQ0 MEM_A8 AD13 AC20 MEM_DQ8
A
MEM_A4 A3 DQ3 MEM_DQ1 MEM_A9 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9 A
N8 H1 AD15 AD19
SBD_MEM/DVO_I/F
N3 A5 DQ5 H9 AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
MEM_A6 N7 F1 MEM_DQ3 MEM_A11 AE13 AC18 MEM_DQ11
P2 A7 DQ7 F9 AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
MEM_A8 P8 C8 MEM_DQ11 Y14 AD22 MEM_DQ13
MEM_A9 A8 DQ8 MEM_DQ13 T2 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14
P3 A9 DQ9 C2 MEM_DQ14/DVO_D10(NC) AC22
MEM_A10 M2 D7 MEM_DQ10 MEM_BA0 AD16 AD21 MEM_DQ15
MEM_A11 A10 DQ10 MEM_DQ8 MEM_BA1 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)
P7 A11 DQ11 D3 AE17 MEM_BA1(NC)
MEM_A12 R2 D1 MEM_DQ12 MEM_BA2 AD17 Y17 MEM_DQS_P0
A12 DQ12 MEM_DQ9 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS_N0
DQ13 D9 MEM_DQS0N/DVO_IDCKN(NC) W18
MEM_BA0 L2 B1 MEM_DQ14 MEM_RAS# W12 AD20 MEM_DQS_P1
MEM_BA1 BA0 DQ14 MEM_DQ15 MEM_CAS# MEM_RASb(NC) MEM_DQS1P(NC) MEM_DQS_N1
L3 BA1 DQ15 B9 Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
MEM_WE# AD18 220 ohm @ 100MHz
MEM_DM1 MEM_CS# MEM_WEb(NC) MEM_DM0
B3 UDM AB13 MEM_CSb(NC) MEM_DM0(NC) W17
MEM_DM0 F3 B7 MEM_DQS_P1 MEM_CKE AB18 AE19 MEM_DM1 L49
LDM UDQS MEM_DQS_N1 MEM_ODT MEM_CKE(NC) MEM_DM1/DVO_D8(NC) BLM15AG221SN1D
UDQS# A8 V14 MEM_ODT(NC)
MEM_RAS# K7 AE23 +1.8V_IOPLLVDD
RAS IOPLLVDD18(NC) +1.8V_RUN
MEM_CAS# L7 F7 MEM_DQS_P0 MEM_CLKP V15 AE24 +1.1V_IOPLLVDD +NB_VDD_MUX
MEM_WE# CAS LDQS MEM_DQS_N0 MEM_CLKN MEM_CKP(NC) IOPLLVDD(NC) L52
K3 WE LDQS# E8 W14 MEM_CKN(NC)
MEM_CS# L8 +1.8V_MEM_VDDQ AD23 C465 C460 BLM15AG221SN1D
MEM_CKE CS 40.2/F R355 MEM_COMP_P AE12 IOPLLVSS(NC)
K2 CKE NC1 A2 MEM_COMPP(NC)
MEM_ODT K9 E2 40.2/F R354 MEM_COMP_N AD12 AE18 MEM_VREF1 2.2U 2.2U
MEM_CLKP ODT NC2 MEM_BA2 MEM_COMPN(NC) MEM_VREF(NC) 10 10
NC3 L1
R343 *100_NC J8 R3 RS780M A13 0603 X5R
CLK NC4 X7R 0603
K8 CLK# NC5 R7
MEM_CLKN R8
NC6
L50 J1
+1.8V_MEM_VDDQ
SBK160808G221 VDDL
J2 MEM_VREF MEM_COMP_P and MEM_COMP_N trace
VREF +1.8V_MEM_VDDQ
B J7 VSSDL width >=10mils and 10mils spacing from B
A3
E3
VSS_0 VDD_0 A1
E1
other Signals in X,Y,Z directions
C458 VSS_1 VDD_1
J3 VSS_2 VDD_2 J9
1U N1 M9
10 VSS_3 VDD_3
P9 VSS_4 VDD_4 R1
X5R
0603 A7 VSSQ_0 VDDQ_0 A9 ALL external components connected to
B2 C1
Place This CAP near to B8
VSSQ_1 VDDQ_1
C3 SPMEM signals must be removed for RX780.
VSSQ_2 VDDQ_2
SDRAM with 0.2". D2
D8
VSSQ_3 VDDQ_3 C7
C9
VSSQ_4 VDDQ_4
E7 VSSQ_5 VDDQ_5 E9
F2 VSSQ_6 VDDQ_6 G1
F8 G3
H2
VSSQ_7 VDDQ_7
G7
At least 200mils wide and locate after DDR2 SDRAM
VSSQ_8 VDDQ_8 +0.9V_MEM_VTT
H8 VSSQ_9 VDDQ_9 G9
HY5PS561621BFP-25
400M PBGA84 MEM_A8 RP24 4 3 *4P2R-47_NC C467 0.1U/10V +1.8V_MEM_VDDQ
256M EP MEM_A0 2 1
C429 0.1U/10V
MEM_A2 RP26 4 3 *4P2R-47_NC C433 0.1U/10V +1.8V_MEM_VDDQ

Only for RS780 MEM_A6 2 1
C431 0.1U/10V
+1.8V_MEM_VDDQ +1.8V_MEM_VDDQ MEM_A7 RP27 4 3 *4P2R-47_NC
MEM_A9 2 1
C C
C469 0.1U/10V +1.8V_MEM_VDDQ
MEM_A11 RP25 4 3 *4P2R-47_NC
MEM_A4 2 1 C442 0.1U/10V
MEM_BA0 RP30 4 3 *4P2R-47_NC

+0.9V_MEM_VTT C472 C451 MEM_BA2 2 1
Q4 0.1U R365 0.1U R359 C468 0.1U/10V +1.8V_MEM_VDDQ
BSC032N03S 9 +0.9V_DDR_VTT 10 1K/F 10 1K/F MEM_A10 RP32 4 3 *4P2R-47_NC
3 8 X7R X7R MEM_A5 2 1
2 7 MEM_VREF MEM_VREF1
1 6 MEM_BA1 RP31 4 3 *4P2R-47_NC
+ C86 C87 5 MEM_A1 2 1 C448 0.1U/10V
100U 22U C471
6.3 6.3 0.1U C446 MEM_A12 RP28 4 3 *4P2R-47_NC
4
3528 X5R 10 R364 0.1U R358 MEM_A3 2 1 C454 0.1U/10V +1.8V_MEM_VDDQ

0805 X7R 1K/F 10 1K/F
46 1.8V_RUN_ENABLE X7R MEM_CS# RP22 4 3 *4P2R-47_NC C437 0.1U/10V
MEM_ODT 2 1
C470 0.1U/10V +1.8V_MEM_VDDQ
MEM_CAS# RP23 4 3 *4P2R-47_NC
MEM_RAS# 2 1 C466 *0.1U/10V_NC
+1.8V_MEM_VDDQ
MEM_CKE RP29 4 3 *4P2R-47_NC
L45 MEM_WE# 2 1 C430 0.1U/10V
+1.8V_RUN
BLM21PG221SN1D
C420 + C425 C439 C445 C438 C452

22U 330U 1U 1U 0.1U 0.1U
D 6.3 6.3 6.3 6.3 10 10 D
X5R 7343 X5R X5R X7R X7R
0805
QUANTA
Local Frame Buffer(64MB) DDRII Power
Title
COMPUTER
RS780-SIDE PORT I/O

FX6 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
PLACE THESE PCIE AC COUPLING

CAPS CLOSE TO U30
R576 *8.2K_NC
U30A
R579 33 N2
SB700 P4 PCI_CLK0_R R239 22 CLK_PCI_DEBUG
9,14,37,39,45 PLTRST# A_RST# PCICLK0 PCI_CLK1_R CLK_PCI_PCCARD CLK_PCI_DEBUG 39
Part 1 of 5 P3 T48 R232 22
PCICLK1 CLK_PCI_PCCARD 35
PCI CLKS
C278 0.1U/10V ALINK_NBRX_C_SBTX_P0 PCI_CLK2
Reserved for Rubuto. 8 ALINK_NBRX_SBTX_P0
C273 0.1U/10V ALINK_NBRX_C_SBTX_N0
V23
V22
PCIE_TX0P PCICLK2 P1
P2 PCI_CLK3 PCI_CLK2 14
J6 8 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3 PCI_CLK3 14
C673 0.1U/10V ALINK_NBRX_C_SBTX_P1 V24 T4 PCI_CLK4_R R229 22 CLK_PCI_8512
PLTRST# 8 ALINK_NBRX_SBTX_P1 ALINK_NBRX_C_SBTX_N1 PCIE_TX1P PCICLK4 PCI_CLK5 CLK_PCI_8512 14,42
2 C676 0.1U/10V V25 T3
2 8 ALINK_NBRX_SBTX_N1 ALINK_NBRX_C_SBTX_P2 PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 14
1 C680 0.1U/10V U25
1 8 ALINK_NBRX_SBTX_P2 ALINK_NBRX_C_SBTX_N2 PCIE_TX2P
C679 0.1U/10V U24
D 8 ALINK_NBRX_SBTX_N2 PCIE_TX2N D
C294 0.1U/10V ALINK_NBRX_C_SBTX_P3 T23 R574 *8.2K_NC
*3800/2/1_NC 8 ALINK_NBRX_SBTX_P3 PCIE_TX3P
C282 0.1U/10V ALINK_NBRX_C_SBTX_N3 T22 N1 R573 33
8 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST# PCI_RST# 35
PCI_AD[0..31]
PCI EXPRESS INTERFACE

8 ALINK_NBTX_C_SBRX_P0 U22 PCI_AD[0..31] 35
PCIE_RX0P PCI_AD0
8 ALINK_NBTX_C_SBRX_N0 U21 U2
PCIE_RX0N AD0 PCI_AD1
8 ALINK_NBTX_C_SBRX_P1 U19 P7
PCIE_RX1P AD1 PCI_AD2
Place R580,R578 8 ALINK_NBTX_C_SBRX_N1 V19
PCIE_RX1N AD2
V4
PCI_AD3
8 ALINK_NBTX_C_SBRX_P2 R20 T1
< 100mils from pins E27,E28,E29 PCIE_RX2P AD3 PCI_AD4
8 ALINK_NBTX_C_SBRX_N2 R21 V3
8 ALINK_NBTX_C_SBRX_P3 R18 U1
PCIE_RX3P AD5 PCI_AD6
8 ALINK_NBTX_C_SBRX_N3 R17 V1
V2
R580 562/F PCIE_CALRP AD7 PCI_AD8
T25 T2
+1.2V_RUN +1.2V_PCIE_PVDD_R R578 2.05K/F PCIE_CALRN PCIE_CALRP AD8 PCI_AD9
+1.2V_PCIE_VDDR T24 W1
L34 PCIE_CALRN AD9 PCI_AD10
T9
20mil Width P24
AD10
R6 PCI_AD11
BLM21PG221SN1D PCIE_PVDD AD11 PCI_AD12
R7
0805 AD12 PCI_AD13 CLK_PCI_DEBUG C309 *10P/50V_NC
P25 R5
C310 C312 PCIE_PVSS AD13 PCI_AD14
U8
10U 1U AD14 PCI_AD15 CLK_PCI_8512 C281 *10P/50V_NC
U5
4 6.3 AD15 PCI_AD16
Y7
X5R X5R AD16 PCI_AD17 CLK_PCI_PCCARD C292 10P/50V
W8
0603 AD17 PCI_AD18
C310 AND C312 CLOSE AD18
V9
TO U600.P24 Y8 PCI_AD19
AD19 PCI_AD20
AA8
AD20 PCI_AD21
Y4
AD21 PCI_AD22
Y3
AD22 PCI_AD23
Y2
AD23 PCI_AD24
AA2
+5V_ALW2 +3.3V_ALW AD24 PCI_AD25 +3.3V_RUN
AB4
C AD25 PCI_AD26 C
25 CLK_PCIE_SB N25 AA1 RP34
PCIE_RCLKP/NB_LNK_CLKP AD26 PCI_AD27 PCI_REQ0#
25 CLK_PCIE_SB# N24 AB3 6 5
PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD28 PCI_REQ1# PCI_REQ4#
AB2 7 4
AD28 PCI_AD29 PCI_REQ2#
PCI INTERFACE
K23 AC1 8 3
R306 R307 NB_DISP_CLKP AD29 PCI_AD30 PCI_REQ3#
K22 AC2 9 2
*10K_NC *10K_NC NB_DISP_CLKN AD30 PCI_AD31
AD1 10 1
AD31 +3.3V_RUN
M24 W2 PCI_C_BE0# 35
CPU_PWRGD_Q NB_HT_CLKP CBE0#
CPU_PWRGD_Q 42 M25 U7 PCI_C_BE1# 35
NB_HT_CLKN CBE1#
AA7 PCI_C_BE2# 35 *10P8R-8.2k_NC
CBE2#
3
Q36 Q35 P17 Y1

CPU_HT_CLKP CBE3# PCI_FRAME# PCI_C_BE3# 35
*FDV301N_NC 2 M18 AA6
CPU_HT_CLKN FRAME# PCI_FRAME# 35
W5 PCI_DEVSEL#
CPU_PWRGD R308 DEVSEL# PCI_IRDY# PCI_DEVSEL# 35
*0_NC 2 *2N7002W-7-F_NC M23 AA5
1
SLT_GFX_CLKP IRDY# PCI_TRDY# PCI_IRDY# 35

M22 Y5 PCI_TRDY# 35
SLT_GFX_CLKN TRDY# PCI_PAR
U6 PCI_PAR 35
PAR PCI_STOP#
J19 W6 PCI_STOP# 35
GPP_CLK0P STOP# PCI_PERR#
J18 W4
1
GPP_CLK0N PERR# PCI_SERR# PCI_PERR# 35

V7 PCI_SERR# 35
SERR# PCI_REQ0#
L20 AC3 T82
GPP_CLK1P REQ0# PCI_REQ1# +3.3V_RUN
L19 AD4 PCI_REQ1# 35
GPP_CLK1N REQ1# PCI_REQ2#
Place the translation circuit for CPU_PWRGD close to the
CLOCK GENERATOR
AB7 T84
REQ2# PCI_REQ3#
M19 AE6 T93
SB700 to minimize stubbs when the circuit is No Stuff. M20
GPP_CLK2P REQ3#/GPIO70
AB6 PCI_REQ4#
GPP_CLK2N REQ4#/GPIO71 T32
AD2 PCI_GNT0#
GNT0# T102
PLACE THESE COMPONENTS CLOSE TO SB700, AND N22 AE4 PCI_GNT1#
GPP_CLK3P GNT1# PCI_GNT1# 35
USE GROUND GUARD FOR 32K_X1 AND 32K_X2 P22 AD5 PCI_GNT2# T38 R563
GPP_CLK3N GNT2# PCI_GNT3# 8.2K
ATi Recommend GNT3#/GPIO72
AC6 T37
L18 AE5 PCI_GNT4#
Vendor: NSK 25M_48M_66M_OSC GNT4#/GPIO73 CLKRUN#
T35
CLKRUN#
AD6 CLKRUN# 35,42
Part Number: NXG 32.768KAE12FUD 16 PPM. CLKRUN#
V5 LOCK#
B LOCK# T45 B
32K_X1 R246 0 J21 25M_X1 PCI_PIRQA#
AD3 PCI_PIRQA# 35
INTE#/GPIO33 PCI_PIRQB# R564
Y5 AC4 PCI_PIRQB# 35
R596 0 32K_X2 INTF#/GPIO34 NB_LCD_BKL_EN *8.2K_NC
4 1 AE2 T91
INTG#/GPIO35 PE_GPIO0
J20 25M_X2 INTH#/GPIO36 AE3 T89
3 2
R595 32.768KHZ G22 R259 22

LPCCLK0 LPCCLK0 14
*20M_NC R605 20M
LPCCLK1 E22 R269 22
LPCCLK1 14 Option to "Disable" clkrun.
32K_X1 A3 H24 LPC_LAD0
X1 LAD0
H23 LPC_LAD1 LPC_LAD0 39,42 Pulling it down will
LAD1 LPC_LAD1 39,42 keep the clocks running.
C691 C699 LPC_LAD2
RTC XTAL
J25 LPC_LAD2 39,42

18P 18P +1.8V_RUN LAD2 LPC_LAD3
J24
LPC
32K_X2 LAD3 LPC_LFRAME# LPC_LAD3 39,42
50 50 B3 H25
X2 LFRAME# LPC_LDRQ0# LPC_LFRAME# 39,42
COG COG H22 T51
R268 LDRQ0# LPC_LDRQ1#
AB8 T41
*10K_NC LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65 AD7
V15 IRQ_SERIRQ +RTC_CELL
SERIRQ IRQ_SERIRQ 35,42
9 ALLOW_LDTSTOP F23
ALLOW_LDTSTP R590
5 CPU_PROCHOT# F24 PROCHOT# RTCCLK C3 RTC_CLK 14
+3.3V_RUN CPU_PWRGD INTRUDER_ALERT# INTRUDER_ALERT#
RTC
5 CPU_PWRGD F22 C2
LDT_PG INTRUDER_ALERT#
CPU
G25 B2 +VBAT_IN R591 510/F

5,9 LDT_STOP# LDT_STP# VBAT +RTC_CELL
G24 *1M_NC
5,9 LDT_RST# LDT_RST#
C690 C689 R604
SB700 A12 Rev.A21 1U 0.1U/16V *0_NC
R205 10 16
*1K_NC U12 X6S X7R
8 1 0603
A VCC A0 A
7 2
PCI_GNT4# WC A1
6
SCL A2
3 CMOS Clear
PCI_REQ4# 5 4
SDA GND (Top or easy access place)
C231
*AT24C04N-10SI-2.7_NC QUANTA
*0.1U_NC
Title
COMPUTER
SB700-PCIE/PCI/LPC

FX6 3A

5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
U30D When External Clock Gen, used as 48M Clock input

R253 *2.2K_NC SB_TEST2
R252 *2.2K_NC SB_TEST1 Part 4 of 5 When Internal Clock Gen, used as 48M Clock output
R256 *2.2K_NC SB_TEST0 SB_PME# E1
SB700
35,42 SB_PME# PCI_PME#/GEVENT4#
42 SIO_EXT_WAKE# SIO_EXT_WAKE# E2 C8 CLK_SB_48M_R R600 0
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC CLK_SB_48M 25
H7 SLP_S2/GPM9#
SIO_SLP_S3# F5 G8 USB_RCOMP R251 11.8K/F
USB MISC
42 SIO_SLP_S3# SLP_S3# USB_RCOMP
SIO_SLP_S5# G1 Place R251 near pin G8. Route it with 10mils
42 SIO_SLP_S5# SLP_S5#
SIO_PWRBTN#
ACPI / WAKE UP EVENTS

42 SIO_PWRBTN# H2 Trace width and 25mils spacing to any
D PWR_BTN# D
5,45 SB_PWRGD H1
+3.3V_SUS SUS_STAT# PWR_GOOD signals in X, Y, Z directions.
9 SUS_STAT# K3
SB_TEST2 SUS_STAT#
H5 E6
SB_TEST1 TEST2 USB_FSDP13+
H4 E7
R273 *10K_NC USB_OC0_1# SB_TEST0 TEST1 USB_FSDM13-
H3
TEST0
USB 1.1
R292 *10K_NC USB_OC2_3# SIO_A20GATE Y15 F7
42 SIO_A20GATE GA20IN/GEVENT0# USB_FSDP12+
R593 *10K_NC USB_OC6# W15 E8
42 SIO_RCIN# KBRST#/GEVENT1# USB_FSDM12-
R599 *10K_NC USB_OC4# SIO_EXT_SCI# K4
42 SIO_EXT_SCI# LPC_PME#/GEVENT3#
R598 *10K_NC EXPRCRD_PWREN# K24 H11
T109 LPC_SMI#/EXTEVNT1# USB_HSDP11+ SB_USBP11+ 32
T110 F1
S3_STATE/GEVENT5# USB_HSDM11-
J10 SB_USBP11- 32 Camera
SYS_RESET# J2
SB_PCIE_WAKE# SYS_RESET#/GPM7#
33,37,39,40 SB_PCIE_WAKE# H6 E11 SB_USBP10+ 44
SIO_EXT_SMI# WAKE#/GEVENT8# USB_HSDP10+
42 SIO_EXT_SMI# F2
BLINK/GPM6# USB_HSDM10-
F11 SB_USBP10- 44 Biometric
5 CPU_THERMTRIP# J6
SMBALERT#/THRMTRIP#/GEVENT2#
45 WD_PWRGD W14 A11
NB_PWRGD USB_HSDP9+
B11
SB_RSMRST# USB_HSDM9-
42 SB_RSMRST# D3
RSMRST#
C10
USB_HSDP8+
Delay 20ms after S5 powerOK USB_HSDM8-
D10
+3.3V_SUS AE18 G11

SATA_IS0#/GPIO10 USB_HSDP7+ SB_USBP7+ 37
AD18
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSDM7-
H12 SB_USBP7- 37 EXPRESS
AA19
R589 *10K_NC SATA_DET# SMARTVOLT/SATA_IS2#/GPIO4
W17 E12 SB_USBP6+ 39
R585 *10K_NC SIO_EXT_SMI# CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSDP6+
V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSDM6-
E14 SB_USBP6- 39 WPAN
R248 *10K_NC SIO_EXT_SCI# W20
R261 *10K_NC SB_PME# SPKR CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21 C12 SB_USBP5+ 40
USB 2.0
31 SPKR SPKR/GPIO2 USB_HSDP5+
SB_SMBCLK AA18 D12 SB_USBP5- 40 WWAN
C 16,37,39,40 SB_SMBCLK SCL0/GPOC0# USB_HSDM5- C
SB_SMBDATA W18
16,37,39,40 SB_SMBDATA SDA0/GPOC1#
R264 *10K_NC SB_PCIE_WAKE# K1 B12
SCL1/GPOC2# USB_HSDP4+ SB_USBP4+ 39
K2 A12 WLAN
GPIO
SDA1/GPOC3# USB_HSDM4- SB_USBP4- 39
R586 *10K_NC SIO_EXT_WAKE# AA20
R584 10K SYS_RESET# DDC1_SCL/GPIO9
Y18 G12 SB_USBP3+ 38
R247 *10K_NC CPU_THERMTRIP# SATA_DET# DDC1_SDA/GPIO8 USB_HSDP3+
C1
LLB#/GPIO66 USB_HSDM3-
G14 SB_USBP3- 38 IO board
SHUTDOWN#/GPIO5 Y19
+3.3V_RUN SHUTDOWN#/GPIO5
29 THERM_ALERT# G5 H14 SB_USBP2+ 38
DDR3_RST#/GEVENT7# USB_HSDP2+
USB_HSDM2-
H15 SB_USBP2- 38 IO board SB JTAG
R228 *10K_NC SHUTDOWN#/GPIO5 A13 SB_USBP1+ 38 SB_TEST1 TMS
USB_HSDP1+ T50
R560 2.2K SB_SMBCLK B13 SB_USBP1- 38 Left side USB. JTAG_TDI TDI
USB_HSDM1- T53
R561 2.2K SB_SMBDATA JTAG_TDO TDO
T111
B14 SB_USBP0+ 38 JTAG_TCK TCK
USB_HSDP0+ T55
USB_OC6# B9 A14 SB_USBP0- 38 Left side USB. GND
USB_OC6#/IR_TX1/GEVENT6# USB_HSDM0- T58
EXPRCRD_PWREN# B8 +3.3V_SUS +3.3V
37,42 EXPRCRD_PWREN# USB_OC5#/IR_TX0/GPM5# T56
USB_OC4# A8 A18
USB OC
R294 0 JTAG_TDO USB_OC4#/IR_RX0/GPM4# KSO_16/EC_GPIO8
A9 B18
USB_OC2_3# R293 0 JTAG_TCK USB_OC3#/IR_RX1/GPM3# KSO_17/EC_GPIO9
38 USB_OC2_3# E5 F21
R260 0 JTAG_TDI USB_OC2#/GPM2# EC_PWM0/EC_GPIO10
F8 D21
USB_OC0_1# R267 0 SB_JTAG_RST# USB_OC1#/GPM1# SCL2/EC_GPIO11
38 USB_OC0_1# E4 F19
USB_OC0#/GPM0# SDA2/EC_GPIO12
E20 SCLK3 5
SB_AZ_BITCLK SCL3_LV/EC_GPIO13
M1 E21 SDATA3 5
SB_AZ_SDOUT AZ_BITCLK SDA3_LV/EC_GPIO14
M2 E19
SB_AZ_CODEC_SDIN0 AZ_SDOUT EC_PWM1/EC_GPIO15 GP16
31 SB_AZ_CODEC_SDIN0 J7 AZ_SDIN0/GPIO42 EC_PWM2/EC_GPO16 D19 GP16 14
GP17
HD AUDIO
J8 AZ_SDIN1/GPIO43 EC_PWM3/EC_GPO17 E18 GP17 14
L8 AZ_SDIN2/GPIO44
R788 *10K_NC SB_AZ_CODEC_SDIN0 M3 G20 STRAP pin to define
B R789 *10K_NC SB_AZ_CODEC_BITCLK SB_AZ_SYNC AZ_SDIN3/GPIO46 KSI_0/EC_GPIO18 B
L6 G21
R242 *10K_NC SB_AZ_RST# SB_AZ_RST# M4
AZ_SYNC KSI_1/EC_GPIO19
D25
use LPC or SPI ROM
AZ_RST# KSI_2/EC_GPIO20
L5 D24
AZ_DOCK_RST#/GPM8# KSI_3/EC_GPIO21
C25
KSI_4/EC_GPIO22
KSI_5/EC_GPIO23 C24
B25
KSI_6/EC_GPIO24
KSI_7/EC_GPIO25 C23
CLK_SB_48M_R
KSO_0/EC_GPIO26 B24
KSO_1/EC_GPIO27 B23
EMBEDDED CTRL
A23
Close to SB.(~50 mils from KSO_2/EC_GPIO28
KSO_3/EC_GPIO29 C22
R295 A22
*10_NC clock pin). KSO_4/EC_GPIO30
KSO_5/EC_GPIO31 B22
B21
KSO_6/EC_GPIO32
KSO_7/EC_GPIO33 A21
H19 PS2_DAT/EC_GPIO0 KSO_8/EC_GPIO34 D20
C376 H20 C20
*4.7P_NC PS2_CLK/EC_GPIO1 KSO_9/EC_GPIO35
EMBEDDED CTRL
H21 SPI_CS2#/EC_GPIO2 KSO_10/EC_GPIO36 A20

50 F25 B20
NPO IDE_RST#/F_RST#/EC_GPO3 KSO_11/EC_GPIO37
KSO_12/EC_GPIO38 B19
D22 PS2KB_DAT/EC_GPIO4 KSO_13/EC_GPIO39 A19
E24 D18
PS2KB_CLK/EC_GPIO5 KSO_14/EC_GPIO40
E25 PS2M_DAT/EC_GPIO6 KSO_15/EC_GPIO41 C18
D23 PS2M_CLK/EC_GPIO7
C331 *27P/50V_NC
Rev.A12
A C684 *27P/50V_NC SB700 A12 A
Symbol:
SB_AZ_CODEC_SDOUT R582 33 SB_AZ_SDOUT
31 SB_AZ_CODEC_SDOUT
31 SB_AZ_CODEC_SYNC SB_AZ_CODEC_SYNC R245 33 SB_AZ_SYNC 2N7002W-7-F QUANTA
14,31,42 SB_AZ_CODEC_RST#
31 SB_AZ_CODEC_BITCLK
SB_AZ_CODEC_RST#
SB_AZ_CODEC_BITCLK
R243
R581
33
33
SB_AZ_RST#
SB_AZ_BITCLK
D(3)
Title
COMPUTER
C681 *27P/50V_NC SB700-ACPI/USB/AC97
G(2) S(1)
Close to U30 C323 *27P/50V_NC Size Document Number Rev
FX6 3A

5 4 3 2 1
5 4 3 2 1
U30B
For Side port memory setting. +3.3V_RUN
C650 0.01U/16V SATA_TX0+_C AD9

SB700 AA24 IDE_DIORDY#
30 SATA_TX0+ SATA_TX0+ IDE_IORDY T104
C651 0.01U/16V SATA_TX0-_C AE9 Part 2 of 5 AA25 IDE_IRQ T99
30 SATA_TX0- SATA_TX0- IDE_IRQ
IDE_A0 Y22 IDE_DA0 T46
30 SATA_RX0- AB10 SATA_RX0- IDE_A1 AB23 IDE_DA1 T39
30 SATA_RX0+ AC10 SATA_RX0+ IDE_A2 Y23 IDE_DA2 T42 R280 R286 R297
IDE_DACK# AB24 IDE_DDACK# T105 *10K_NC *10K_NC *10K_NC
C652 0.01U/16V SATA_TX1+_C AE10 AD25 IDE_DDREQ T98
30 SATA_TX1+ SATA_TX1+ IDE_DRQ
C653 0.01U/16V SATA_TX1-_C AD10 AC25 IDE_DIOR# T103
30 SATA_TX1- SATA_TX1- IDE_IOR#
IDE_IOW# AC24 IDE_DIOW# T34
30 SATA_RX1- AD11 Y25 IDE_DCS1# T107
SATA_RX1- IDE_CS1#
30 SATA_RX1+ AE11 Y24 IDE_DCS3# T108 R279 10K LBF_ID0
D SATA_RX1+ IDE_CS3# R287 10K LBF_ID1 D
AB12 AD24 IDE_DD0 T96 R296 10K LBF_ID2
SATA_TX2+ IDE_D0/GPIO15
AC12 AD23 IDE_DD1 T90
SATA_TX2- IDE_D1/GPIO16
AE22 IDE_DD2
ATA 66/100/133
PLACE SATA AC COUPLING IDE_D2/GPIO17 T97
CAPS CLOSE TO SB700 AE12 AC22 IDE_DD3 T40
SATA_RX2- IDE_D3/GPIO18
AD12 AD21 IDE_DD4 T92 Memory Vendor LBF_ID2 LBF_ID1 LBF_ID0
SATA_RX2+ IDE_D4/GPIO19
AE20 IDE_DD5 T95
IDE_D5/GPIO20
38 SATA_TX3+_C AD13 AB20 IDE_DD6 T44 Hynix
SERIAL ATA
SATA_TX3+ IDE_D6/GPIO21 0 0 0
38 SATA_TX3-_C AE13 AD19 IDE_DD7 T106
AE19 IDE_DD8 T100 Qimonda
IDE_D8/GPIO23 0 0 1
38 SATA_RX3- AB14 AC20 IDE_DD9 T43
38 SATA_RX3+ AC14 AD20 IDE_DD10 T101 Samsung 0 1 0
SATA_RX3+ IDE_D10/GPIO25
AE21 IDE_DD11 T36
IDE_D11/GPIO26
AE14 AB22 IDE_DD12 T94
SATA_TX4+ IDE_D12/GPIO27
AD14 AD22 IDE_DD13 T33
AE23 IDE_DD14 T85
IDE_D14/GPIO29
AD15 AC23 IDE_DD15 T88 BIOS should not enable the
AE15 internal GPIO pull up resistor
SATA_RX4+ +3.3V_ALW
AB16
SATA_TX5+
ESATA AC16
SATA_TX5-
SPI_DI/GPIO12
G6
CAMERA_CBL_DET# KB_LED_DET 43 (11)
AE16 D2 CAMERA_CBL_DET# 32
SATA_RX5- SPI_DO/GPIO11 CAMERA_CBL_DET# R588 *100K_NC
AD16 D1
SATA_RX5+ SPI_CLK/GPIO47
F4
SPI_HOLD#/GPIO31
SPI ROM
R237 1K/F SATA_CAL V12 F3
SATA_CAL SPI_CS#/GPIO32
SATA_X1 Y12 U15 +3.3V_RUN
SATA_X1 LAN_RST#/GPIO13 SB700_ROM_RST# R583 *0_NC
J1 PLTRST# 9,12,37,39,45
SATA_X2 ROM_RST#/GPIO14 PCIE_MCARD1_DET# R244 100K
AA12
C SATA_X2 WLAN_RADIO_DIS# USB_MCARD1_DET# R241 100K C
M8 T49 WLAN_RADIO_DIS# 39
FANOUT0/GPIO3 PCIE_MCARD1_DET# PCIE_MCARD2_DET# R490 100K
44 SATA_ACT# W11 M5 PCIE_MCARD1_DET# 39
SATA_ACT#/GPIO67 FANOUT1/GPIO48 USB_MCARD1_DET# USB_MCARD2_DET# R445 100K
M7 USB_MCARD1_DET# 39
FANOUT2/GPIO49 PCIE_MCARD3_DET# R553 100K
PCIE_MCARD2_DET# USB_MCARD3_DET# R543 100K
SATA PWR
+1.2V_PLLVDD_SATA AA11 P5 PCIE_MCARD2_DET# 40
PLLVDD_SATA_1 FANIN0/GPIO50 USB_MCARD2_DET#
P8 USB_MCARD2_DET# 40
FANIN1/GPIO51 WPAN_RADIO_DIS_MINI#
+3.3V_XTLVDD_SATA W12 R8 T47 WPAN_RADIO_DIS_MINI# 39
XTLVDD_SATA FANIN2/GPIO52
C6 TEMP_COMM T54
TEMP_COMM PCIE_MCARD3_DET# SB_WPAN_PCIE_RST# R271 20K
B6 PCIE_MCARD3_DET# 39
TEMPIN0/GPIO61 USB_MCARD3_DET# SB_WWAN_PCIE_RST# R597 20K
A6 USB_MCARD3_DET# 39
C659 12P/50V/COG SATA_X1
HW MONITOR TEMPIN1/GPIO62 WWAN_RADIO_DIS# SB_WLAN_PCIE_RST# R275 20K
A5 T52 WWAN_RADIO_DIS# 40
TEMPIN2/GPIO63 SB_LOM_PCIE_RST# R276 20K
B5
TEMPIN3/TALERT#/GPIO64
1
Y4 R555 A4 SB_WWAN_PCIE_RST# TEMP_COMM R644 0

VIN0/GPIO53 SB_WWAN_PCIE_RST# 40
25MHz 10M B4 SB_WLAN_PCIE_RST#
VIN1/GPIO54 SB_WPAN_PCIE_RST# SB_WLAN_PCIE_RST# 39
30PPM C4
2
SATA_X2_R SATA_X2 VIN2/GPIO55 SB_LOM_PCIE_RST# SB_WPAN_PCIE_RST# 39

C658 12P/50V/COG D4
VIN3/GPIO56 LBF_ID0 SB_LOM_PCIE_RST# 33
R193 0 D5
VIN4/GPIO57 LBF_ID1
D6
VIN5/GPIO58 LBF_ID2
A7
VIN6/GPIO59
B7
VIN7/GPIO60
+3.3V_AVDD_HWM +3.3V_SUS
20mil Width L38
+1.2V_RUN +1.2V_PLLVDD_SATA
AVDD F6
BLM15AG221SN1D REQUIRED
L31 G7
AVSS
B
BLM15AG221SN1D
C256 C260 C257 SB700 A12

C344
2.2U
10
C345
0.1U
10
STRAPS B
1U *0.1U_NC 22U X5R X7R
C650 CLOSE TO THE 6.3 10 6.3 0603
BALL OF U30 X5R X7R X5R Close to SB700
0805 HWM_AGND +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_SUS +3.3V_SUS +3.3V_RUN +3.3V_ALW +3.3V_ALW +3.3V_ALW
HWM_AGND TRACE AT
LEAST 10MIL WIDE
R215 R230 R568 R566 R282 R284 R594 R258 R265 R240
*10K_NC *10K_NC *10K_NC *10K_NC 2.2K *2.2K_NC *10K_NC *10K_NC *10K_NC *10K_NC
+3.3V_RUN +3.3V_XTLVDD_SATA
12,42 CLK_PCI_8512
12 PCI_CLK5
L32 12 PCI_CLK2
BLM15AG221SN1D 12 PCI_CLK3
13 GP16
C264 C293
13 GP17
1U *0.1U_NC
12 RTC_CLK
C650 CLOSE TO THE 10 10
12 LPCCLK0
BALL OF U30 X6S X7R
12 LPCCLK1
0603 13,31,42 SB_AZ_CODEC_RST#
R216 R233 R571 R565 R281 R278 R255 R262 R236

*10K_NC *10K_NC 10K 10K *2.2K_NC 2.2K 10K 10K 10K
PCI_CLK2 PCI_CLK3 LPC_CLK0 LPC_CLK1 RTC_CLK SB_AZ_CODEC_RST# GP17 GP16
ROM TYPE:
A A
PULL BOOTFAIL USE ENABLE PCI CLKGEN INTERNAL EC
HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED H, H = Reserved
ENABLED STRAPS
DEFAULT H, L = SPI ROM QUANTA
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN
EXT. RTC
(PD on X1, EC L, H = LPC ROM DEFAULT
Title
COMPUTER
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED
SB700-HDD/POWER
DISABLED STRAPS 32KHz to DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK) Size Document Number Rev
FX6 3A

5 4 3 2 1
5 4 3 2 1
+1.2V_VDD L43
+1.2V_ALW_SUS
FBMJ4516HS111-T
1806
U30C
L40
L9
SB700 L15 +1.2V_VDD 100mil Width
+3.3V_RUN VDDQ_1 VDD_1 +1.2V_RUN
M9 Part 3 of 5 M12 *FBMJ4516HS111-T_NC
+ C233 C311 C279 C272 C308 C327 C339 VDDQ_2 VDD_2 C380 C379 C381 C378 C377 C313 C329 1806
T15 M14
C266 C261 VDDQ_3 VDD_3 1U 1U 1U 1U 22U 0.1U 0.1U
U9 N13
CORE S0
D VDDQ_4 VDD_4 D
0.1U 0.1U 220U 1U 1U 1U 1U 1U 1U 10 10 10 10 6.3 10 10 Note: FBMJ4516HS111-T
PCI/GPIO I/O
U16 P12
10 10 6.3 6.3 6.3 6.3 6.3 6.3 6.3 VDDQ_5 VDD_5 X6S X6S X6S X6S X5R X7R X7R was 110 ohm@100MHz U30E
U17 P14
X7R X7R Polymer X5R X5R X5R X5R X5R X5R VDDQ_6 VDD_6 0603 0603 0603 0603 0805
V8 R11
7343 VDDQ_7 VDD_7 4A DC 0.014ohm
W7
Y6
VDDQ_8 VDD_8
R15
T16
SB700 A2
VDDQ_9 VDD_9 VSS_1
AA4 A25
VDDQ_10 VSS_2
AB5 B1
VDDQ_11 VSS_3
AB21 D7
VDDQ_12 VSS_4
T10 F20
AVSS_SATA_1 VSS_5
U10 G19
AVSS_SATA_2 VSS_6
U11 H8
L35 AVSS_SATA_3 VSS_7
U12 K9
+3.3V_RUN Y20 L21 +1.2V_CKVDD 30mil Width +1.2V_RUN V11
AVSS_SATA_4 VSS_8
K11
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_5 VSS_9
IDE/FLSH I/O
CLKGEN I/O
AA21 L22 BLM21PG221SN1D V14 K16
C258 C296 C298 C274 C295 VDD33_18_2 CKVDD_1.2V_2 C332 C333 C334 0805 AVSS_SATA_6 VSS_10
AA22 L24 W9 L4
*22U_NC *0.1U_NC*0.1U_NC*0.1U_NC*0.1U_NC VDD33_18_3 CKVDD_1.2V_3 2.2U 2.2U 2.2U C330 AVSS_SATA_7 VSS_11
AE25 L25 Y9 L7
6.3 10 10 10 10 VDD33_18_4 CKVDD_1.2V_4 10 10 10 10U AVSS_SATA_8 VSS_12
Y11 L10
X5R X7R X7R X7R X7R X5R X5R X5R 4 AVSS_SATA_9 VSS_13
Y14 L11
0805 0603 0603 0603 X5R AVSS_SATA_10 VSS_14
Y17 L12
0603 +3.3V_ALW AVSS_SATA_11 VSS_15
AA9 L14
AVSS_SATA_12 VSS_16
AB9 L16
R290 *0_NC 0805 AVSS_SATA_13 VSS_17
AB11 M6
AVSS_SATA_14 VSS_18
AB13 M10
+1.2V_RUN
+1.2V_PCIE_VDDR
POWER AB15
AVSS_SATA_15
AVSS_SATA_16
VSS_19
VSS_20
M11
R298 *0_NC 0805 AB17 M13
L78 AVSS_SATA_17 VSS_21
AC8 M15
C
50mil Width P18 AD8
AVSS_SATA_18 VSS_22
N4 C
BLM21PG221SN1D PCIE_VDDR_1 +3.3V_ALW_R +3.3V_SUS AVSS_SATA_19 VSS_23
P19 PJP9 AE8 N12
PCIE_VDDR_2 AVSS_SATA_20 VSS_24
A-LINK I/O
0805 C683 C686 C687 C320 C325 C314 C326
22U 1U 1U 1U 1U 0.1U 0.1U
P20
P21
PCIE_VDDR_3
A17
50mil Width 2 1
VSS_25
N14
P6
6.3 6.3 6.3 6.3 6.3 10 10 PCIE_VDDR_4 S5_3.3V_1 C370 VSS_26
X5R X5R X5R X5R X5R X7R X7R
R22
PCIE_VDDR_5 S5_3.3V_2
A24
22U C366 C363 C391 C385
(5) VSS_27
P9
R24 B17 P10
3.3V_S5 I/O
0805 PCIE_VDDR_6 S5_3.3V_3 6.3 1U 1U 0.1U 0.1U POWER_JP VSS_28
R25 J4 A15 P11
PCIE_VDDR_7 S5_3.3V_4 X5R 6.3 6.3 10 10 AVSS_USB_1 VSS_29
J5 B15 P13
S5_3.3V_5 0805 X5R X5R X7R X7R AVSS_USB_2 VSS_30
L1 C14 P15
S5_3.3V_6 AVSS_USB_3 VSS_31
+1.2V_RUN +1.2V_AVDD_SATA S5_3.3V_7
L2
+1.2V_ALW_SUS Use shape short Jump. D8
D9
AVSS_USB_4 VSS_32
R1
R2
L33 AVSS_USB_5 VSS_33
D11 R4
AA14
20mil Width D13
AVSS_USB_6 VSS_34
R9
AVDD_SATA_1 AVSS_USB_7 VSS_35
GROUND
BLM21PG221SN1D AB18 D14 R10
0805 C259 C291 C263 C277 C280 AVDD_SATA_4 C352 C355 C361 C358 AVSS_USB_8 VSS_36
SATA I/O
AA15 D15 R12
22U 1U 1U 0.1U 0.1U AVDD_SATA_2 1U 1U 1U 1U AVSS_USB_9 VSS_37
AA17 G2 E15 R14
CORE S5
6.3 6.3 6.3 10 10 AVDD_SATA_3 S5_1.2V_1 6.3 6.3 6.3 6.3 AVSS_USB_10 VSS_38
AC18 G4 F12 T11
X5R X5R X5R X7R X7R AVDD_SATA_5 S5_1.2V_2 X5R X5R X5R X5R AVSS_USB_11 VSS_39
AD17 F14 T12
0805 AVDD_SATA_6 +1.2V_SUS AVSS_USB_12 VSS_40
AE17 G9 T14
AVDD_SATA_7 AVSS_USB_13 VSS_41
H9 U4
A10
20mil Width H17
AVSS_USB_14 VSS_42
U14
USB_PHY_1.2V_1 C709 AVSS_USB_15 VSS_43
B10 J9 V6
USB_PHY_1.2V_2 C696 C704 C708 C707 22U AVSS_USB_16 VSS_44
J11 Y21
0.1U 0.1U 1U 1U 6.3 AVSS_USB_17 VSS_45
J12 AB1
10 10 6.3 6.3 X5R AVSS_USB_18 VSS_46
J14 AB19
X7R X7R X5R X5R 0805 AVSS_USB_19 VSS_47
J15 AVSS_USB_20 VSS_48 AB25
+3.3V_SUS +AVDD_USB K10 AE1
L42 AVSS_USB_21 VSS_49
B K12 AE24 B
+V5_VREF1 AVSS_USB_22 VSS_50
A16 AVDDTX_0 V5_VREF AE7 K14 AVSS_USB_23
BLM21PG221SN1D B16 20mil Width L37 K15
0805 C372 C382 C362 C365 C360 C357 C353 AVDDTX_1 +3.3V_AVDDCK AVSS_USB_24
C16 AVDDTX_2 AVDDCK_3.3V J16 +3.3V_RUN PCIE_CK_VSS_9 P23
22U 1U 1U 1U 0.1U 0.1U 0.1U D16 20mil Width L39 BLM15AG221SN1D R16
6.3 6.3 6.3 6.3 10 10 10 AVDDTX_3 +1.2V_AVDDCK C343 PCIE_CK_VSS_10
D17 K17 R19
PLL
AVDDTX_4 AVDDCK_1.2V +1.2V_RUN PCIE_CK_VSS_11

X5R X5R X5R X5R X7R X7R X7R E17 BLM15AG221SN1D 2.2U T17
AVDDTX_5 PCIE_CK_VSS_12
USB I/O
0805 F15 E9 +3.3V_AVDDC C347 10 U18

AVDDRX_0 AVDDC 2.2U X5R PCIE_CK_VSS_13
F17 H18 U20
AVDDRX_1 10 0603 PCIE_CK_VSS_1 PCIE_CK_VSS_14
F18 AVDDRX_2 J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18
G15 X5R +3.3V_AVDDC J22 V20
AVDDRX_3 0603 L41 PCIE_CK_VSS_3 PCIE_CK_VSS_16
G17 AVDDRX_4 K25 PCIE_CK_VSS_4 PCIE_CK_VSS_17 V21
G18 +3.3V_SUS M16 W19
AVDDRX_5 BLM15AG221SN1D PCIE_CK_VSS_5 PCIE_CK_VSS_18
M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
C356 C383 M21 W24
SB700 A12 0.1U 2.2U PCIE_CK_VSS_7 PCIE_CK_VSS_20
P16 W25
10 10 PCIE_CK_VSS_8 PCIE_CK_VSS_21
X7R X5R F9 L17
0603 AVSSC AVSSCK
Part 5 of 5
SB700 A12
+5V_RUN R556 1K +V5_VREF1
A A
D31 C641
1U
+3.3V_RUN 2
SDMK0340L-7-F
1
SOD-323
6.3
X5R
QUANTA
Title
COMPUTER
SB700-POWER

FX6 3A

5 4 3 2 1
A B C D E
+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS

+0.9V_DDR_REF +0.9V_DDR_REF
+1.8V_SUS
CN5 BOT-UP C628 C629 CN6 BOT-DOWN C656 C663

1 2 2.2U 0.1U 1 2 2.2U 0.1U C627 2.2U/10V/0603
VREF VSS46 DDR_A_D5 10 10 VREF VSS46 DDR_B_D1 10 10
3 VSS47 DQ4 4 3 VSS47 DQ4 4
DDR_A_D1 5 6 DDR_A_D4 X7R X7R DDR_B_D4 5 6 DDR_B_D0 X7R X7R C624 2.2U/10V/0603
DDR_A_D0 DQ0 DQ5 0603 DDR_B_D5 DQ0 DQ5 0603
7 DQ1 VSS15 8 7 DQ1 VSS15 8
9 10 DDR_A_DM0 9 10 DDR_B_DM0 C626 2.2U/10V/0603
DDR_A_DQS#0 VSS37 DM0 DDR_B_DQS#0 VSS37 DM0
11 DQS#0 VSS5 12 11 DQS#0 VSS5 12
DDR_A_DQS0 13 14 DDR_A_D2 DDR_B_DQS0 13 14 DDR_B_D7 C240 2.2U/10V/0603
DQS0 DQ6 DDR_A_D3 DQS0 DQ6 DDR_B_D6
15 VSS48 DQ7 16 15 VSS48 DQ7 16
DDR_A_D6 17 18 Place C628 2.2uF and C629 0.1uF < DDR_B_D3 17 18 Place C656 2.2uF and C663 0.1uF < C239 2.2U/10V/0603
DDR_A_D7 DQ2 VSS16 DDR_A_D12 DDR_B_D2 DQ2 VSS16 DDR_B_D12
19 20 19 20
21
DQ3 DQ12
22 DDR_A_D13 500mils from DDR connector 21
DQ3 DQ12
22 DDR_B_D13 500mils from DDR connector
DDR_A_D8 VSS38 DQ13 DDR_B_D8 VSS38 DQ13 C268 2.2U/10V/0603
23 24 23 24
4
DDR_A_D9 DQ8 VSS17 DDR_A_DM1 DDR_B_D9 DQ8 VSS17 DDR_B_DM1
4
25 26 25 26
DQ9 DM1 DQ9 DM1 C267 2.2U/10V/0603
27 28 27 28
DDR_A_DQS#1 VSS49 VSS53 M_CLK_DDR0 DDR_B_DQS#1 VSS49 VSS53
29 30 M_CLK_DDR0 4 29 30 M_CLK_DDR2 4
DDR_A_DQS1 DQS#1 CK0 M_CLK_DDR#0 DDR_B_DQS1 DQS#1 CK0 C241 2.2U/10V/0603
31 32 M_CLK_DDR#0 4 31 32 M_CLK_DDR#2 4
DQS1 CK0# DQS1 CK0#
33 34 33 34
DDR_A_D10 VSS39 VSS41 DDR_A_D11 DDR_B_D10 VSS39 VSS41 DDR_B_D15 C271 2.2U/10V/0603
35 36 DDR_A_DM[0..7] 4 35 36 DDR_B_DM[0..7] 4
DDR_A_D14 DQ10 DQ14 DDR_A_D15 DDR_B_D14 DQ10 DQ14 DDR_B_D11
37 38 DDR_A_D[0..63] 4 37 38 DDR_B_D[0..63] 4
DQ11 DQ15 DQ11 DQ15 C269 2.2U/10V/0603
39 40 DDR_A_DQS[0..7] 4 39 40 DDR_B_DQS[0..7] 4
VSS50 VSS54 VSS50 VSS54
DDR_A_DQS#[0..7] 4 DDR_B_DQS#[0..7] 4
41 42 DDR_A_MA[0..15] 4,17 41 42 DDR_B_MA[0..15] 4,17
DDR_A_D16 VSS18 VSS20 DDR_A_D20 DDR_B_D16 VSS18 VSS20 DDR_B_D20
43 44 43 44
DDR_A_D17 DQ16 DQ20 DDR_A_D21 DDR_B_D21 DQ16 DQ20 DDR_B_D17 C270 0.1U/10V
45 46 45 46
DQ17 DQ21 DQ17 DQ21
47 48 47 48
DDR_A_DQS#2 VSS1 VSS6 NC_PM_EXTTS#0 CPU_MEMHOT# DDR_B_DQS#2 VSS1 VSS6 NC_PM_EXTTS#1 CPU_MEMHOT#
PC4800 DDR2 SDRAM
PC4800 DDR2 SDRAM

49 50 49 50 C238 0.1U/10V
DDR_A_DQS2 DQS#2 NC3 DDR_A_DM2 DDR_B_DQS2 DQS#2 NC3 DDR_B_DM2 CPU_MEMHOT# 5
51 52 51 52
DQS2 DM2 DQS2 DM2 C244 0.1U/10V
53 54 53 54
55 56 55 56
57 58 57 58
DQ19 DQ23 DQ19 DQ23
59 60 59 60
SO-DIMM (200P)
SO-DIMM (200P)
61 62 61 62
63 64 63 64
DQ25 DQ29 DQ25 DQ29
65 66 65 66
DDR_A_DM3 VSS23 VSS25 DDR_A_DQS#3 DDR_B_DM3 VSS23 VSS25 DDR_B_DQS#3 C625 0.1U/10V
67 68 67 68
DM3 DQS#3 DDR_A_DQS3 DM3 DQS#3 DDR_B_DQS3
69 70 69 70
NC4 DQS3 NC4 DQS3 C245 0.1U/10V
71 72 71 72
73 74 73 74
75 76 75 76
DQ27 DQ31 DQ27 DQ31
77 78 77 78
VSS4 VSS8 VSS4 VSS8
4,17 DDR_CKE0_DIMMA 79 80 DDR_CKE1_DIMMA 4,17 4,17 DDR_CKE2_DIMMB 79 80 DDR_CKE3_DIMMB 4,17
CKE0 CKE1 CKE0 CKE1
81 82 81 82
VDD7 VDD8 DDR_A_MA15 VDD7 VDD8 DDR_B_MA15
83
NC1 A15
84 83
NC1 A15
84 Note:
85 86 DDR_A_MA14 DDR_B_BS2 85 86 DDR_B_MA14
4,17 DDR_A_BS2
87
A16_BA2 A14
88
4,17 DDR_B_BS2
87
A16_BA2 A14
88
Place C627,C624,C240,C626,C239 and
DDR_A_MA12 VDD9 VDD11 DDR_A_MA11 DDR_B_MA12 VDD9 VDD11 DDR_B_MA11 C268,C267,C241,C271,C269 close to CN5
89 90 89 90
DDR_A_MA9 A12 A11 DDR_A_MA7 DDR_B_MA9 A12 A11 DDR_B_MA7
91 92 91 92 Place C270,C238,C244,C623,C237 and
93 94 93 94
95
A8 A6
96 95
A8 A6
96
C625,C245,C243 close to CN6
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4
3 97 98 97 98 3
99 100 99 100
101 102 101 102
A1 A0 A1 A0
103 104 103 104
DDR_A_MA10 VDD10 VDD12 DDR_A_BS1 DDR_B_MA10 VDD10 VDD12
105 106 DDR_A_BS1 4,17 105 106 DDR_B_BS1 4,17
DDR_A_BS0 A10/AP BA1 DDR_A_RAS# DDR_B_BS0 A10/AP BA1
4,17 DDR_A_BS0 107 108 DDR_A_RAS# 4,17 4,17 DDR_B_BS0 107 108 DDR_B_RAS# 4,17
DDR_A_WE# BA0 RAS# DDR_B_WE# BA0 RAS#
4,17 DDR_A_WE# 109 110 DDR_CS0_DIMMA# 4,17 4,17 DDR_B_WE# 109 110 DDR_CS0_DIMMB# 4,17
WE# S0# WE# S0#
111 112 111 112
DDR_A_CAS# VDD2 VDD1 M_ODT0 DDR_B_CAS# VDD2 VDD1
4,17 DDR_A_CAS# 113 114 M_ODT0 4,17 4,17 DDR_B_CAS# 113 114 M_ODT2 4,17
CAS# ODT0 DDR_A_MA13 CAS# ODT0 DDR_B_MA13
4,17 DDR_CS1_DIMMA# 115 116 4,17 DDR_CS1_DIMMB# 115 116
S1# A13 S1# A13 +1.8V_SUS
117 118 117 118
M_ODT1 VDD3 VDD6 M_ODT3 VDD3 VDD6
4,17 M_ODT1 119 120 4,17 M_ODT3 119 120
ODT1 NC2 ODT1 NC2
121 122 121 122
123 124 123 124
125 126 125 126
DQ33 DQ37 M_CLK_DDR0 DQ33 DQ37 PLACE CLOSE TO PROCESSOR R572
127 128 127 128
DDR_A_DQS#4 VSS26 VSS28 DDR_A_DM4 DDR_B_DQS#4 VSS26 VSS28 DDR_B_DM4 WITHIN 1.5 INCH C672
129 130 129 130
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4 1K 0.1U +0.9V_DDR_REF
131 132 131 132
DQS4 VSS42 DDR_A_D35 C143 DQS4 VSS42 DDR_B_D35 M_CLK_DDR2 1% 10
133 134 133 134
DDR_A_D39 VSS2 DQ38 DDR_A_D34 1.5P/50V DDR_B_D34 VSS2 DQ38 DDR_B_D39 X7R
135 136 135 136
DDR_A_D38 DQ34 DQ39 M_CLK_DDR#0 DDR_B_D38 DQ34 DQ39
137 138 137 138
DQ35 VSS55 DDR_A_D44 DQ35 VSS55 DDR_B_D44 C544
139 140 139 140
DDR_A_D40 VSS27 DQ44 DDR_A_D45 M_CLK_DDR1 DDR_B_D40 VSS27 DQ44 DDR_B_D41 1.5P/50V
141 142 141 142
DDR_A_D41 DQ40 DQ45 DDR_B_D45 DQ40 DQ45 M_CLK_DDR#2 R567
143 144 143 144
DQ41 VSS43 DDR_A_DQS#5 DQ41 VSS43 DDR_B_DQS#5 C669 C664
145 146 145 146
DDR_A_DM5 VSS29 DQS#5 DDR_A_DQS5 C138 DDR_B_DM5 VSS29 DQS#5 DDR_B_DQS5 M_CLK_DDR3 1K 0.1U 1000P
147 148 147 148
DM5 DQS5 1.5P/50V DM5 DQS5 1% 10 50
149 150 149 150
DDR_A_D46 VSS51 VSS56 DDR_A_D42 M_CLK_DDR#1 DDR_B_D42 VSS51 VSS56 DDR_B_D43 X7R X7R
151 152 151 152
DDR_A_D47 DQ42 DQ46 DDR_A_D43 DDR_B_D46 DQ42 DQ46 DDR_B_D47 C144
153 154 153 154
DQ43 DQ47 PLACE CLOSE TO PROCESSOR DQ43 DQ47 1.5P/50V
155 156 155 156
DDR_A_D52 VSS40 VSS44 DDR_A_D53 WITHIN 1.5 INCH DDR_B_D53 VSS40 VSS44 DDR_B_D48 M_CLK_DDR#3
157 DQ48 DQ52 158 157 DQ48 DQ52 158
DDR_A_D49 159 160 DDR_A_D48 DDR_B_D52 159 160 DDR_B_D49 Note: Place close to DIMM
DQ49 DQ53 DQ49 DQ53
161 162 161 162
VSS52 VSS57 M_CLK_DDR1 VSS52 VSS57
163 164 M_CLK_DDR1 4 163 164 M_CLK_DDR3 4
NCTEST CK1 M_CLK_DDR#1 NCTEST CK1
165 VSS30 CK1# 166 M_CLK_DDR#1 4 165 VSS30 CK1# 166 M_CLK_DDR#3 4
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168
DDR_A_DQS6 DQS#6 VSS45 DDR_A_DM6 DDR_B_DQS6 DQS#6 VSS45 DDR_B_DM6
169 170 169 170
DQS6 DM6 DQS6 DM6
171 172 171 172
2
2
173 174 173 174
175 176 175 176
DQ51 DQ55 DQ51 DQ55
177 178 177 178
179 180 179 180
181 182 181 182
DQ57 DQ61 DQ57 DQ61
183 VSS3 VSS7 184 183 VSS3 VSS7 184
DDR_A_DM7 185 186 DDR_A_DQS#7 DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7
187 188 187 188
DDR_A_D63 VSS34 DQS7 DDR_B_D58 VSS34 DQS7
189 190 189 190
DDR_A_D62 DQ58 VSS36 DDR_A_D58 DDR_B_D59 DQ58 VSS36 DDR_B_D62
191 192 191 192
DQ59 DQ62 DDR_A_D59 DQ59 DQ62 DDR_B_D63
193 194 193 194
SB_SMBDATA VSS14 DQ63 SB_SMBDATA VSS14 DQ63 +3.3V_RUN
13,37,39,40 SB_SMBDATA 195 196 195 196
SB_SMBCLK SDA VSS13 SB_SMBCLK SDA VSS13
13,37,39,40 SB_SMBCLK 197 198 197 198
SCL SA0 SCL SA0
+3.3V_RUN 199 200 +3.3V_RUN 199 200
C223 VDD(SPD) SA1 C249 VDD(SPD) SA1 R226 10K
201 GNDPAD1 GNDPAD2 202 201 GNDPAD1 GNDPAD2 202
C221 0.1U 203 204 R202 R201 C248 0.1U 203 204
2.2U 10 H1 H2 10K 10K 2.2U 10 H1 H2 R227
10 X7R TYCO_1775804-2 10 X7R TYCO_292406-4 10K
X7R X7R
0603 SMbus address A0 0603 SMbus address A4
CLOCK 0,1 CKE 0,1 CLOCK 2,3 CKE 2,3
1 1
QUANTA
Title
COMPUTER
DDRII SODIMMX2

FX6 3A

A B C D E
1 2 3 4 5 6 7 8
+0.9V_DDR_VTT
+0.9V_DDR_VTT
DDR_A_MA[0..15]
4,16 DDR_A_MA[0..15]
DDR_A_MA3 1 2 RP9 RP12 1 2 DDR_A_MA4

DDR_A_MA1 3 4 3 4 DDR_A_MA6
C287 0.1U/10V
C229 0.1U/10V 4P2R-47 4P2R-47
C215 0.1U/10V
A C285 0.1U/10V RP13 DDR_A_MA0 A
1 2
C307 0.1U/10V R181 47 3 4 DDR_A_MA2
4,16 DDR_A_BS0
C217 0.1U/10V 4P2R-47
C289 0.1U/10V DDR_A_MA12 1 2 RP7 R180 47
DDR_A_WE# 4,16
C252 0.1U/10V DDR_A_MA9 3 4 R184 47
DDR_A_CAS# 4,16
C227 0.1U/10V R183 47
DDR_CS1_DIMMA# 4,16
C216 0.1U/10V 4P2R-47 R185 47
M_ODT1 4,16
C247 0.1U/10V
C214 0.1U/10V
C286 0.1U/10V
C212 0.1U/10V R179 47 R199 47 DDR_CS0_DIMMA#
4,16 DDR_CKE0_DIMMA DDR_CS0_DIMMA# 4,16
C288 0.1U/10V R196 47 DDR_A_RAS#
DDR_A_RAS# 4,16
R178 47
4,16 DDR_A_BS2
C219 0.1U/10V R198 47 M_ODT0
M_ODT0 4,16
C220 0.1U/10V
C284 0.1U/10V RP11 1 2 DDR_A_MA11
4,16 DDR_CKE1_DIMMA
C283 0.1U/10V R195 47 3 4 DDR_A_MA7
C230 0.1U/10V
4P2R-47
C213 0.1U/10V
C228 0.1U/10V DDR_A_MA5 1 2 RP8 RP10 1 2 DDR_A_MA14
C251 0.1U/10V DDR_A_MA8 3 4 3 4 DDR_A_MA15
B B
C226 0.1U/10V
C211 0.1U/10V 4P2R-47 4P2R-47
R182 47 DDR_A_MA10
C250 0.1U/10V R197 47 R200 47 DDR_A_MA13
4,16 DDR_A_BS1
C301 0.1U/10V
C253 0.1U/10V
C218 0.1U/10V
C254 0.1U/10V
DDR_B_MA[0..15] +0.9V_DDR_VTT
4,16 DDR_B_MA[0..15]
RP18 1 2 DDR_B_MA14
R210 47 3 4 DDR_B_MA11
4,16 DDR_B_BS0
R211 47
4,16 DDR_B_WE#
4P2R-47
Layout Note: DDR_B_MA8 1 2 RP15
DDR_B_MA5 3 4
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT 4P2R-47
DDR_B_MA3 1 2 RP16 R212 47
DDR_B_CAS# 4,16
DDR_B_MA1 3 4 R213 47
DDR_CS1_DIMMB# 4,16
R222 47
M_ODT2 4,16
C 4P2R-47 R225 47 C
DDR_CKE3_DIMMB 4,16
DDR_B_MA9 1 2 RP14
DDR_B_MA12 3 4
Note: Reserve stitching function for CN5. 4P2R-47

R208 47 R223 47 DDR_CS0_DIMMB#
4,16 DDR_CKE2_DIMMB DDR_CS0_DIMMB# 4,16
R220 47 DDR_B_RAS#
DDR_B_RAS# 4,16
+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS R207 47
4,16 DDR_B_BS2
R214 47 M_ODT3
M_ODT3 4,16
C299 C306 C207 C206 C305 C236 C235 C302 DDR_B_MA2 1 2 RP20
DDR_B_MA0 3 4
0.1U 0.1U *0.1U_NC *0.1U_NC 0.1U *0.1U_NC *0.1U_NC 0.1U
16 16 16 16 16 16 16 16 4P2R-47 RP17 1 2 DDR_B_MA15
X7R X7R X7R X7R X7R X7R X7R X7R 3 4 DDR_B_MA7
DDR_B_MA6 1 2 RP19
+0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT DDR_B_MA4 3 4 4P2R-47
4P2R-47 R209 47 DDR_B_MA10

R221 47 R224 47 DDR_B_MA13
4,16 DDR_B_BS1
Note: Reserve stitching function for CN6.
D +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS D
QUANTA
C242 C300 C208 C303 C209 C210 C246 C304
Title
COMPUTER
0.1U *0.1U_NC 0.1U *0.1U_NC *0.1U_NC *0.1U_NC 0.1U 0.1U DDRII TERMINATION
16 16 16 16 16 16 16 16
X7R X7R X7R X7R X7R X7R X7R X7R Size Document Number Rev
FX6 3A
+0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT
1 2 3 4 5 6 7 8
5 4 3 2 1
D D
BLANK PAGE FOR PAGE C
NUMBER SAME AS DISCRETE
B B
A A
Title
Blank Page

B FX6 3A

5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE FOR PAGE

B B
A A
Title
Blank Page

CustomFX6 3A

5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE FOR PAGE

B B
A A
Title
Blank Page

CustomFX6 3A

5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE FOR PAGE

B B
A A
QUANTA
Title
COMPUTER
Blank Page

FX6 3A

5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE FOR PAGE

B B
A A
Title
Blank Page

CustomFX6 3A

5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE FOR PAGE

B B
A A
QUANTA
Title
COMPUTER
Blank Page

FX6 3A

5 4 3 2 1
5 4 3 2 1
D D
C C
BLANK PAGE FOR PAGE

B B
A A
Title
Blank Page

CustomFX6 3A

5 4 3 2 1
1 2 3 4 5 6 7 8
600 ohm +-25%@100MHz

25m ohm max DC resistance Place Decoupling Cap close to Place Decoupling Cap close to
1A current rating GROUP1 each VDD pin as possibble. GROUP2 each VDD pin as possibble.
+3.3V_RUN +3.3V_VDDIO
+3.3V_RUN +3.3V_CLK
L26 +3.3V_CLK(40 mils)
L27 +3.3V_CLK(40 mils) FBM-11-160808-601A10T 0603
FBM-11-160808-601A10T 0603 C178 C156 C176 C177 C167 C151 C152 C164
C583 C170 C576 C546 C578 C547 C566 C545 C150 22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
10U 22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 6.3 10 10 10 10 10 10 10
10 6.3 10 10 10 10 10 10 10 X5R X7R X7R X7R X7R X7R X7R X7R
X5R X5R X7R X7R X7R X7R X7R X7R X7R 0805
0805 0805
A A
+3.3V_RUN
L24 +3VS_CLK_VDDREF
FBM-11-160808-601A10T C163 +3.3V_CLK Need check footprint
0603 2.2U C563 U26 R138 *261/F_NC
10 0.1U
X5R 10 4 50 CPUCLK_R R469 0
VDDDOT CPUK8_0T CPU_CLK 5
0603 X7R 16 49 CPUCLK_R# R466 0
VDDSRC CPUK8_0C CPU_CLK# 5
26 VDDATIG
(GROUP1) 35 VDDSB
48 30 NB_GFX R470 0
VDDCPU ATIG0T CLK_NB_GFX 9
55 29 NB_GFX# R473 0
VDDHTT ATIG0C GFX_CLK CLK_NB_GFX# 9
+3.3V_RUN 56 28 R477 0
VDDREF ATIG1T CLK_PCIE_VGA
40 27 GFX_CLK# R480 0
VDD_SATA ATIG1C CLK_PCIE_VGA#
L25 +3VS_CLK_VDD48 63
FBM-11-160808-601A10T VDD48
0603 C175 C174 37 NB_SBLINK R459 0
SB_SRC0T NB_SBLINK# CLK_NB_SBLINK 9
22U 0.1U +3.3V_VDDIO 11 36 R458 0
VDDSRC_IO SB_SRC0C CLK_NB_SBLINK# 9
6.3 10 17 32 PCIE_SB R465 0
VDDSRC_IO SB_SRC1T CLK_PCIE_SB 12
X5R X7R 25 31 PCIE_SB# R468 0
VDDATIG_IO SB_SRC1C CLK_PCIE_SB# 12
0805 (GROUP2) 34 VDDSB_IO
47 VDDCPU_IO
22 PCIE_EXPCARD R484 0
SRC0T CLK_PCIE_EXPCARD 37
Place Decoupling Cap close to 21 PCIE_EXPCARD# R486 0
SRC0C CLK_PCIE_EXPCARD# 37
B 1 20 PCIE_MINI1 R488 0 B
each VDD pin as possibble. GND48 SRC1T PCIE_MINI1# R491 0
CLK_PCIE_MINI1 39
7 GNDDOT SRC1C 19 CLK_PCIE_MINI1# 39
10 15 PCIE_MINI2 R496 0
GNDSRC SRC2T CLK_PCIE_MINI2 39
18 14 PCIE_MINI2# R497 0
GNDSRC SRC2C CLK_PCIE_MINI2# 39
PCIE_MINI3 R498 0
24
33
GNDATIG QFN64 SRC3T 13
12 PCIE_MINI3# R499 0
CLK_PCIE_MINI3 40
Parallel Resonance Crystal 43
GNDSB SRC3C
9 PCIE_LOM R500 0
CLK_PCIE_MINI3# 40
CLK_PCIE_LOM 33
C567 33P GNDSATA SRC4T PCIE_LOM# R501 0
46 GNDCPU SRC4C 8 CLK_PCIE_LOM# 33
50 52 6 VGA_27M_SS R494 0
GNDHTT SRC7T/27M_SS CLK_VGA_27M_SS
2
NPO R487 60 5 VGA_27M_NSS R495 0

GNDREF SRC7C/27M CLK_VGA_27M_NSS
Y3 42 GPP_REFCLK R457 0
SRC6T/SATAT CLK_GPP_REFCLK 9
14.318MHZ *1M_NC 41 GPP_REFCLK# R456 0
SRC6C/SATAC CLK_GPP_REFCLK# 9
XTALIN_CLK 61
1
C570 33P XTALOUT_CLK_C XTALOUT_CLK 62 X1

50 R489 0 X2 NBHT R476 0
HTT0T/66M 54 HT_REFCLK 9
NPO 53 NBHT# R472 0
CLK_SCLK HTT0C/66M HT_REFCLK# 9
2 SMBCLK
CLK_SDATA 3 SMBDAT CLK_SB R493 33
48MHz_0 64 CLK_SB_48M 13
+3.3V_RUN PD# 51 PD# SEL_HT66
REF0/SEL_HTT66 59
58 SEL_SATA R146 43.2/F
REF1/SEL_SATA CLK_NB_14M 9
PD# R471 10K 37 EXPRESSCARD_REQ# 23 57 SEL_27
LOM_CLKREQ# R775 *10K_NC *CLKREQ0# REF2/SEL_27
33 LOM_CLKREQ# 38 *CLKREQ4#
MINI1CLK_REQ# R454 10K 40 MINI3CLK_REQ# 39
MINI2CLK_REQ# R453 10K *CLKREQ3# R483
39 MINI2CLK_REQ# 44 *CLKREQ2#
MINI3CLK_REQ# R123 10K 45 90.9/F
39 MINI1CLK_REQ# *CLKREQ1#
EXPRESSCARD_REQ# R144 10K
TGND
C +3.3V_RUN C
SLG8SP628VTR(QFN)
65
+3.3V_RUN
SMbus address D2 R482 R143 R140
These are for *10K_NC *10K_NC 10K

backdrive issue.
R148 SEL_HT66 CLK_SB_48M
2.2K SEL_SATA
2
Q20 SEL_27 CLK_NB_14M
3 1 CLK_SDATA
26,29,42 SMBDAT1
R485 R142 R141
2N7002W-7-F 10K *10K_NC *10K_NC C565 C575

D 10P 10P
3 50 50
G 2 1 S NPO NPO
2N7002W-7-F
+3.3V_RUN
1 Pin54/53: 66MHz 3.3V single ended HTT clock

SEL_HTT66
OSC 14M_NB
0 Pin54/53: 100MHz differential HTT clock
D D
R147 LEVEL R607 R637
2.2K 1 Pin42/41: 100MHz No_SSC-Differential SATA clock
2
Q21
26,29,42 SMBCLK1 3 1 CLK_SCLK

SEL_SATA
0 Pin42/41: 100MHz SRC clock
RX780 +1.8V 82R 130R QUANTA
2N7002W-7-F 1 Pin6/5: 27 MHz / 27_SSC MHz
RS780 +1.1V 158R 90.9R
Title
COMPUTER
SEL_27 CLOCK GENERATOR
0 Pin6/5: 100MHz SRC clock Size Document Number Rev

FX6 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
J1
Symbol: 44 LCD_BCLK-
44 LCD_BCLK- 9
43 LCD_BCLK+
2N7002W-7-F LCD_BCLK- 43 LCD_BCLK+ 9
42 42
41 LCD_B2-
41 LCD_B2- 9
D(3) 40 LCD_B2+
40 LCD_B2+ 9
R2 39
C1 39 LCD_B1-
*33_NC 38 38 LCD_B1- 9
G(2) S(1) *3.3P_NC 37 LCD_B1+
37 LCD_B1+ 9
36 36
LCD_BCLK+ 35 LCD_B0- +LCDVDD +3.3V_RUN
35 LCD_B0- 9
34 LCD_B0+
34 LCD_B0+ 9
33 33
Symbol: LCD_ACLK- 32 LCD_ACLK-
D Design current: 560mA 32
31 LCD_ACLK+ LCD_ACLK- 9 D
DTC124EUA 31 LCD_ACLK+ 9
C5 C4
Max current: 800mA 30 30
R3 29 LCD_A2- 0.1U 0.1U
Q40 29 LCD_A2- 9
*33_NC C2 28 LCD_A2+ 16 16
+PWR_SRC SI4835BDY-T1-E3 +INV_PWR_SRC 28 LCD_A2+ 9
OUT(3) *3.3P_NC 27 27 X5R X5R
26 LCD_A1-
26 LCD_A1- 9
LCD_ACLK+ LCD_A1+
IN(2) GND(1)
8 40mil 25 25 LCD_A1+ 9
40mil 1
2
7
6
24 24
23 LCD_A0- +INV_PWR_SRC
23 LCD_A0- 9
3 5 22 LCD_A0+
22 LCD_A0+ 9
21 21
C402 20 LCD_DDCCLK
20 LCD_DDCCLK 9
R324 19 LCD_DDCDAT
4
19 LCD_DDCDAT 9
200K 0.1U 18 C3
C405 50 18 0.1U
17 17 +3.3V_RUN
1000P_50V X7R 16 50
0603 16 X7R
15 15 +LCDVDD
14 0603
14
13 13 LCD_TST 42
12 12
11 11
+INV_PWR_SRC
10 10
R323 9 BACKLITEON
100K 9
8 8
7 7 Adress : A9H --Contrast
6 SMBCLK1 25,29,42
6
5 AAH --Backlight
5 SMBDAT1 25,29,42
3
4 4 INVERTER_CBL_DET# 42
2 Q46 3
42,46,49,50,52 RUN_ON 3 LCD_BAK# 42
C 2N7002W-7-F 2 C
2 PWM_VADJ 42
1
1
1 LCD_CBL_DET# 42
JAE_FI-TD44SB-LE
C6 C7
*47P_NC *47P_NC
+15V_ALW
Check with ATI FAE. The errata skip or not.
R316 0
R319
100K
R322 *0_NC
Q41
3
*BSS138_NL_NC
D16 +15V_ALW +3.3V_RUN +LCDVDD
3 1 EN_LCDVDD_1 2 1 EN_LCDVDD_2 2 Q44 Q42
9 EN_LCDVDD
DTC124EUAT-106 FDC655BN
SDMK0340L-7-F 6
R318 D17 5 4
2
1
B B
42 LCDVCC_TST_EN 2 1 2
NB_PWRGD_5V *2K_NC R320 C404 1
SDMK0340L-7-F 100K 0.1U
16
3
X5R R314
2
470
LCDVCC_ON
3 1 BACKLITEON
9 BIA_PWM
Q45 R329 R315 C403

D *BSS138_NL_NC *100K_NC 0.1U
3 *2K_NC 50
G 2 1 S R327 0 X7R
BSS138_NL 0603
3
2 2
Q39 Q38
1
2N7002W-7-F 2N7002W-7-F
+3.3V_SUS +5V_RUN
R328
2
*10K_NC
A 1 3 NB_PWRGD_5V A
9,45 NB_PWRGD
*2N7002W-7-F_NC
Q48 QUANTA
Title
COMPUTER
LCD CONN,CK-SSCD

FX6 3A

5 4 3 2 1
A B C D E
Symbol: Symbol:
BSS138_NL DA204U
+5V_RUN
D(3) P(3)N
2
G(2) S(1) N(1) P(2) D20
SDM10U45-7
1
5V_CRT_REF
4 4
C450
0.01U
+3.3V_RUN 16
X7R
2
D21 D22 D25
*DA204U_NC *DA204U_NC *DA204U_NC
R357
0_1206
3
L53
RED
9 VGA_RED
BLM18BB600SN1D
L51
GREEN
9 VGA_GRN
BLM18BB600SN1D JVGA1
6
L48 11
BLUE 1
9 VGA_BLU
BLM18BB600SN1D 7
3 12 3
2
R360 R362 R370 C455 C462 C476 C456 C464 C478 8
150/F 150/F 140/F 22P 22P 22P 10P 10P 10P 13
50 50 50 50 50 50 3
NPO NPO NPO NPO NPO NPO 9
14
T69 M_ID2# 4
(3) 10
D33 SDM10U45-7 +3.3V_RUN C477 15
+5V_RUN 2 1 CRT_VCC C422 0.1U/10V/X7R 5
CRT_VCC 0.1U
R57 1K 16 SUY_070549FR015S512ZR
X5R
R352 R340
5
U4 4.7K 4.7K R353 R339

Q51 6.8K 6.8K
R60 39 R58 0 BSS138_NL
CRT_HSYNC_R 2 4 VGAHSYNC_R
9 VGAHSYNC
R342 0 1 3
9 G_DAT_DDC2
74AHCT1G125GW
3
2
+3.3V_RUN
2
R356 0 1 3
9 G_CLK_DDC2
5
U3
2 2
R53 39 R54 0 Q53 CRT_VCC
CRT_VSYNC_R 2 4 VGAVSYNC_R BSS138_NL
9 VGAVSYNC
R55 R51
*1K_NC *1K_NC
74AHCT1G125GW
3
L15
HSYNC JVGA_HS
BLM18AG121SN1D
L13
VSYNC JVGA_VS
BLM18AG121SN1D
C73 C83 C79 C72

10P 10P 10P 10P
50 50 50 50
NPO NPO NPO NPO
Place near JVGA1 connector <

200 mil
1 1
QUANTA
Title
COMPUTER
CRT CONN

FX6 3A

A B C D E
1 2 3 4 5 6 7 8
HDMI Connector
CN3
SHELL1 20
HDMI_TX2+_C 19 22
D2+ GND
18 D2 Shield
HDMI_TX2-_C 17
A
HDMI_TX1+_C D2- A
16 D1+
15 D1 Shield
HDMI_TX1-_C 14
HDMI_TX0+_C D1-
13 D0+
12 D0 Shield
HDMI_TX0-_C 11
HDMI_CLK+_C D0-
10 CK+
9 CK Shield
HDMI_CLK-_C 8
HDMI_CEC CK-
7 CE Remote
T59
6 NC
HDMI_CLK 5
HDMI_DAT DDC CLK
4 DDC DATA
3 GND
+5V_RUN 2 +5V
HDMI_DET_R 1 23
HP DETGND
SHELL2 21
LTS_ABA-HDM-018-K05
+5V_RUN
L4
HDMI_TX2+ 1 2 HDMI_TX2+_C
8 HDMI_TX2+ HDMI_TX2- HDMI_TX2-_C
8 HDMI_TX2- 4 3
D2
+3.3V_RUN RB500V-40 EXC24CG900U
HDMI_TX2+
B R19 *0_NC HDMI_TX1+ B
1 2 HDMI_TX2-
R17 *0_NC HDMI_TX1-
1
R18 *0_NC
1
1 2 R332 R333
R13 R20 Q2 R4 R15 R330 R331 715/F 715/F
4.7K 4.7K FDV301N 6.8K 6.8K 715/F 715/F
L3
2
1 3 HDMI_DAT HDMI_TX1+ 1 2 HDMI_TX1+_C
9 HDMI_SDA 8 HDMI_TX1+
2
HDMI_TX1- HDMI_TX1-_C Q50
8 HDMI_TX1- 4 3 Q49
3
2N7002W-7-F
3
EXC24CG900U 2N7002W-7-F 2 +3.3V_RUN
2
+3.3V_RUN 2 +3.3V_RUN
R16 *0_NC
1
2
1 2
1
1 3 HDMI_CLK R14 *0_NC
9 HDMI_SCL
1 2
UMA-----Need level shift
FDV301N and change 6.7k
Q1 R290,R293. L1
HDMI_TX0+ 4 3 HDMI_TX0+_C
8 HDMI_TX0+
R7 *0_NC HDMI_TX0- 1 2 HDMI_TX0-_C
8 HDMI_TX0-
EXC24CG900U
HDMI_TX0+ HDMI_CLK+
R6 *0_NC
1 2 HDMI_TX0- HDMI_CLK-
1
R9 *0_NC
C C
1 2 R321 R317 R325 R326
715/F 715/F 715/F 715/F
L2
2
HDMI_CLK+ 1 2 HDMI_CLK+_C
8 HDMI_CLK+ Q43 Q47
HDMI_CLK- 4 3 HDMI_CLK-_C
8 HDMI_CLK-
3
2N7002W-7-F 2N7002W-7-F
EXC24CG900U 2 +3.3V_RUN 2 +3.3V_RUN
R12 *0_NC
1
1 2
R11 *0_NC
1 2
+3.3V_RUN +3.3V_RUN
for EMI
R785 R786
10K 10K
9 HDMI_DET
3
Q85
2
3
MMST3904-7-F (12)
1
D D
Q80
2 R334 1K HDMI_DET_R
FDV301N R335
10K
QUANTA
COMPUTER
1
Title
HDMI

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+5V_RUN
2
*DA204U_NC
D3
3
A A
J9
R361 0/0805 FAN1_VOUT 4
+5V_RUN 4
42 FAN1_PWM 3 3
2 2
D23 1
C461 C475 1
*SSM34PT_NC
2.2U 0.1U MLX_53398-0471
10 10
X5R X7R
0805 0402
+5V_RUN R366 4.7K

FAN1_TACH 42
C185 close to +3.3V_SUS

Place under CPU
EMC1423. +3.3V_RUN +3.3V_RUN
U6
3
B 1 10 THERM_SCL R158 B
Q18 C117 C185 VDD SCL 10K
2
2
MMST3904-7-F *2200P/50V_NC 10/20mils 2200P/50V REM_DIODE1_P 2 9 THERM_SDA
X7R X7R DP1 SDA D36
close to IC
1
REM_DIODE1_N 3 8 THERM_ALERT#_C 1 3 THERM_ALERT# THERM_ALERT# 13

DN1 ALERT#
H_THERMDA 4 7 Q25 RB500V-40
5 H_THERMDA DP2 SYS_SHDN# 2N7002W-7-F
H_THERMDC 5 6
C187 DN2 GND
10/20mils
2200P/50V EMC1423 (B) R151 *0_NC
X7R SYS_SHDN#
5 H_THERMDC THERM_STP# 42,52
C181
C187 close 0.1U/10V
+3.3V_RUN
to EMC1423.
+3.3V_RUN +3.3V_RUN R154

1M
3
Q22
2 2N7002W-7-F
1
3
R157 R153
Q26 10K 10K 2 C186
2
2N7002W-7-F 0.1U/10V
Q23
1
3 1 THERM_SDA 2N7002W-7-F
C 25,26,42 SMBDAT1 C
+3.3V_RUN
OTP 85+7 degree C
Q24
2
2N7002W-7-F
+3.3V_RUN R152 10K/F THERM_ALERT#_C
3 1 THERM_SCL
25,26,42 SMBCLK1
R155 6.8K/F SYS_SHDN#
D D
QUANTA
Title
COMPUTER
FAN/THERMAL

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Place caps close to ODD Connector.

+3.3V_RUN connector.
SATA Connector. C668 C670 C671 C678 C675

*10U/10V/0805_NC *1U_10V_0603_NC *0.1U/16V_NC *0.1U/16V_NC *1000P/50V_NC
A A
+5V_HDD Place caps close to Place caps close to
connector. +5V_MOD connector.
C643 C647 C639 C648 C662 C657

C165 C162 C161 C557 C159
10U/10V/0805 1U/10V/0603 0.1U/16V 0.1U/16V 0.1U/16V 1000P/50V
*10U/10V/0805_NC 1U/10V/0603 0.1U/16V 0.1U/16V 1000P/50V
JMOD1
CON1
Need check footprint
Need check footprint
GND1 1
GND1 1 RXP 2 SATA_TX1+ 14
RXP 2 SATA_TX0+ 14 RXN 3 SATA_TX1- 14
RXN 3 SATA_TX0- 14 GND2 4
4 5 SATA_RXN1_C C183 0.01U/16V
GND2 TXN SATA_RX1- 14
5 SATA_RXN0_C C685 0.01U/16V 6 SATA_RXP1_C C182 0.01U/16V
TXN SATA_RXP0_C SATA_RX0- 14 TXP SATA_RX1+ 14
6 C682 0.01U/16V 7
TXP SATA_RX0+ 14 GND3
GND3 7
NOTE:
C685,C682 Close to CON1 DP 8
3.3V_0 8 +3.3V_RUN 5V_0 9
3.3V_1 9 5V_1 10 +5V_MOD
3.3V_2 10 MD 11
GND4 11 GND 12
GND5 12 GND 13
B
GND6 13 GND 14 B
5V_0 14 +5V_HDD GND 15

5V_1 15 GND 16
5V_2 16
GND7 17
18 MOLEX_47628-1022
GND8
12V_0 19
12V_1 20
TYCO_2006114-1
Design current: 1050mA

Max current: 1500mA
C +5V_ALW +5V_RUN C
+5V_MOD
Q66
FDC655BN
Design current: 700mA 6 R481
+15V_ALW 5 4
Max current: 1000mA 2
1 C560 *0/0805_NC
10U
+5V_ALW +5V_HDD +5V_RUN 10 R467
3
+3.3V_ALW 0805 100K
Q34 R435 X5R
FDC655BN 100K
6 R217
+15V_ALW 5 4
2 MOD_EN
1 *0/0805_NC R422
C297 100K
3
4.7U R231 Q64
3
+3.3V_ALW 6.3 100K 2 C532

R570 (3) X5R 2N7002W-7-F Symbol:
3
100K 0603 Q63 Current = 115m 0.1U
2N7002W-7-F
1
2 Vgs = 20 50
42 MODC_EN
2N7002W-7-F Vds = 60 X7R
HDD_EN_5V Current = 115m Type = Single N 0603 D(3)
1
R234 Vgs = 20
100K R421 Vds = 60
3
Q33 100K Type = Single N G(2) S(1)

2 C290
D 2N7002W-7-F D
3
Q74 Current = 115m 0.1U

1
2 Vgs = 20 50
42 HDDC_EN
2N7002W-7-F Vds = 60 X7R
Current = 115m Type = Single N 0603 QUANTA
1
Vgs = 20
R577
100K
Vds = 60
Type = Single N
Title
COMPUTER
SATA (HDD&CD_ROM)

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+5V_SPK_AMP LIN- RIN- HP2_OUT_L HP2_OUT_R +5V_SPK_AMP JSPK1

GAIN1 GAIN2 GAIN AUD_SPK_R1 R162 0/0603 1
AUD_SPK_R2 R161 0/0603 1
2 0 0 6dB 2 2
2
C714 C718 C726 C727 AUD_SPK_L1 R160 0/0603 3
R620 R621 *47P_NC *47P_NC 220P 220P R608 AUD_SPK_L2 R159 0/0603 3
0 1 10dB 4 4
*100K_NC 100K 50 50 50 50 (2) 100K
1 0 15.6dB COH COH X7R X7R TYCO_1775295-4
1
1
AUD_AMP_GAIN1 1 1 21.6dB C602 C601 C600 C599
AUD_AMP_GAIN2 REGEN AUD_AMP_MUTE# 100P 100P 100P 100P
R609 *0_NC 50 50 50 50
2
1
NPO NPO NPO NPO
R613 R614 C719
A
100K *100K_NC INTERNAL SPEAKER AMP 0.033U TPA6040 MAX9789
A
2
16
C719 Pop Depop
1
+3.3V_RUN
R609 Depop Pop R632 *0_NC
C735 0.1U/10/X7R +3.3V_RUN
U31 C740 0.1U/10/X7R

(2)
+5V_SPK_AMP U33
5
AUD_FRONT_L C713 1 2 6800P 1206 50 LIN- 3 6 AUD_SPK_L1 TC7SZ08FU(T5L,F,T) U36
SPKR_INL OUTL+
5
AUD_FRONT_R C712 1 2 6800P 1206 50 RIN- 2 7 AUD_SPK_L2 NB_MUTE# 1 TC7SZ08FU(T5L,F,T)
SPKR_INR OUTL-
1
C698 C705 C721 4 AMP_HP1_SHUD_L# 1

1U 1U 0.1U AUD_HP2_L0 C730 2.2U/50V/1206 AUD_HP2_L0_R R791 2.2K HP2_OUT_L 27 20 AUD_SPK_R1 HP1_JD 2 4
0603 0603 10Layout Note: AUD_HP2_R0 C724 2.2U/50V/1206 AUD_HP2_R0_R R792 2.2K HP2_OUT_R 26 HP_INL TPA6040A4 OUTR+ 19 AUD_SPK_R2 EAPD# 2
AMP_HP1_SHUD# 32
2
10 10 X7R HP_INR OUTR-

Place close QFN 32PIN HPL
3
X5R X5R C715 1 2 1U 0603 10 24 16
3
U31 pin 30. AUD_SPK_ENABLE# BIAS AUD_HP2_L1 32
23 SPKR_EN# HPR 15 AUD_HP2_R1 32
AMP_HP2_EN 22
AUD_AMP_MUTE# HP_EN REGEN
25 MUTE# REGEN 4
AUD_AMP_GAIN1 31 1 SET +VDDA
+3.3V_RUN AUD_AMP_GAIN2 GAIN1 SET
R602 +VDDA
32 GAIN2
29
EMI Request
5.1K/F VOUT R511 0 0805
17 HPVDD 1 2
1
Layout Note: SENSEB 1 2 9 30 +5V_SPK_AMP C722 C728 R504 1 2 0 0805
CPVDD VDD 1U 1U R163 0 0805
Close to U32 PVDD_8 8 1 2
1
C693 C701 C694 1 2 1U 10 18 0603 0603 R618 2 1 0 0603
2
Pin 34 10U 1U 0805 16 C1P PVDD_18 10 10 R619 0 0603
12 C1N 2 1
1
1
C700 0805 0603 11 28 C706 C710 C703 R592 2 1 0 0603
2
R601 R603 1000P 10 10 CPGND GND_28 1U 10U 0.1U R631 0 0603
B
PGND_5 5 2 1 B
20K/F 39.2K/F 14 21 0603 0805 10
2
2
50 PVSS PGND_21 10 10
13 CPVSS
2
Layout Note:
3 2
3 2
C695
Place close U31.
1U TPA6040A4 Layout Note:
1
HP2_JD 2 2 0805
HP2_JD MIC1_JD 32
16
Place close to
Q75 Q76 pin 18.
1
2N7002W-7-F 2N7002W-7-F
R633 *0_NC
1 2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
FB_60ohm+-25%_100MHz AZALIA (HD) CODEC +VDDA C738 0.1U/10/X7R C737 0.1U/10/X7R
_3A_0.05ohm DC
R622 0 DVDD U35
5
0805 TC7SZ08FU(T5L,F,T) U34
1
5
C733 C732 C731 C711 C702 NB_MUTE# 1 TC7SZ08FU(T5L,F,T)
1U 1U 0.1U U32 1U 0.1U AMP_HP2_EN_L
4 1
10 10 10 10 HP2_JD 2 4 AMP_HP2_EN
2
2
R611 +VDDA 0603 0603 10 1 25 0603 EAPD# 2
5.1K/F DVDD_CORE AVDD
9 38
3
SENSEA DVDD_CORE AVDD
1 2 40
3
R606 *100K_NC DVDD
Depop R606,C717 13 SENSEA
SENSE_A
1
C720 C717 *1000P_NC 34 SENSEB R615 *2.2K_NC

R610 1000P
for using 92HD73C SENSE_B SET +5V_SPK_AMP +5V_RUN
2 1 +VDDA
39.2K/F 6
2
C 13 SB_AZ_CODEC_BITCLK HDA_BITCLK C
50 R623 33 AZ_CODEC_SDIN0 8 L79
13 SB_AZ_CODEC_SDIN0 HDA_SDI
5 39 R616 BLM21PG600SN1D
3 2
13 SB_AZ_CODEC_SDOUT HDA_SDO PORT_A_L AUD_HP1_L 32

10 41 C723 *0_NC
13 SB_AZ_CODEC_SYNC HDA_SYNC PORT_A_R AUD_HP1_R 32
1
11 37 0.033U FB_60ohm+-25%_100MHz
13,14,42 SB_AZ_CODEC_RST# HDA_RST# NC/VREFOUT_A
2 HP1_JD 16 C734 C736
HP1_JD 32 _3A_0.05ohm DC
21 X7R 1U 10U
AUD_INT_MIC_IN 32
2
PORT_B_L
Q77 22 0603 0805 Layout Note:
1
2N7002W-7-F PORT_B_R 10 10
VREFOUT_B 28 TPA6040 MAX9789 Place close to
Layout Note:
23 C723 Pop Depop U31 pin 8.
Close to U32 Pin 13 PORT_C_L
PORT_C_R 24
VREFOUT_C 29 R616 Depop Pop
18 NC/CD_L
19 35 AUD_FRONT_L
NC/CD_GND PORT_D_L AUD_FRONT_R
+5V_SPK_AMP 20 NC/CD_R PORT_D_R 36 Close to U32.
Depop R629, R627, R607,R634 32 +VDDA
VREFOUT_D
Pop R635, R612, R626 ,R636 C739 0.1U/16/0603
PORT_E_L 14 AUD_MIC_L 32
2
for using 92HD73C 15

PORT_E_R AUD_MIC_R 32
R617 R625 R627,R635 close to U32, Let DVDD width be 10-mils GPIO4/VREFOUT_E 31 AUD_MIC1_VREFO 32
5
100K 100K 1 BEEP 42
16 AUD_HP2_L0 AUD_PC_BEEP BEEP2 R630 10K BEEP1 4
PORT_F_L AUD_HP2_R0
17 2
1
PORT_F_R SPKR 13
AUD_SPK_ENABLE# 30 C729 1U
3
GPIO3/VREFOUT_F 10 U37
+3.3V_RUN 43 X5R R624 74LVC1G86GW
PORT_G_L
3
DMIC_DATA R629 *0_NC 2 44 0603 2.2K

32 DMIC_DATA DMIC0/VOL_UP/GPIO1 PORT_G_R
EAPD# 2 EAPD# R627 *0_NC 3 DMIC1/VOL_DN/GPIO2
PORT_H_L 45
D Q78 DVDD 46 D
1
2N7002W-7-F R628 PORT_H_R

*10K_NC
EAPD# 47 DMIC_CLK/GPIO0/SPDIF_IN
QUANTA
3
EAPD# 48 12 AUD_PC_BEEP
SPDIF_OUT_0 PC_BEEP
42 NB_MUTE# 2 CAP2 33
Q79
32 DMIC_CLK DMIC_DATA
R607 *0_NC
4
VREFFILT 27
COMPUTER
1
DVSS1
1
2N7002W-7-F 7 26 Title
DVSS2 AVSS1 C692 C697 AZALIA(HD) CODEC
AVSS2 42
R634 *0_NC 10U 1U
2
0805 0603 Size Document Number Rev

92HD73C/STAC9228 10 10 FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Headphone Jack
Stereo MIC Jack Array Microphone & Camera
JCAMERA1
USBP11_D+ 1
R509 0 C580 1U/10/X5R/0603 USBP11_D- 2
31 AUD_MIC1_VREFO 3
L70,L71,L72,L73,L75,L77 +CAM_VCC
4
FB_600ohm+-25%_100MHz 5
DMIC_DATA_L 6
A
_200mA_0.6ohm DC +3.3V_RUN 31 DMIC_DATA
L60 0
7 A
R514 100K L61 22 DMIC_CLK_L 8
31 DMIC_CLK 9
R502 R508 CAMERA_CBL_DET#
14 CAMERA_CBL_DET# 10
4.7K 4.7K
MIC1_JD 31
CON3 I-pex_20374-010E-1
2 TYCO_1770882-1
C574 2.2U/10/x5R/0805 AUD_MIC_L1 L70 BLM18BD601SN1D AUD_MIC_L3 4
31 AUD_MIC_L
3
C588 2.2U/10/x5R/0805 AUD_MIC_R1 L71 BLM18BD601SN1D AUD_MIC_R3 1
JACK 2 (MIC)
31 AUD_MIC_R
6
5
+3.3V_RUN R438 100K CAMERA_CBL_DET#
C573 C584
470P 470P
50 50 +3.3V_RUN
NPO NPO R524 100K
L58 DMIC_DATA
+3.6V_CAMERA
*BLM11A05S_NC
HP2_JD 31
CON4 L59 +CAM_VCC C528
+3.3V_RUN
2 TYCO_1770882-1 BLM11A05S 33P
R520 0 AUD_HP2_L2 L72 BLM18BD601SN1D AUD_HP2_L3 4 C525 50
31 AUD_HP2_L1
3 10U COH
R522 0 AUD_HP2_R2 L73 BLM18BD601SN1D AUD_HP2_R3 1
JACK 1 10
31 AUD_HP2_R1
X5R
6
5
(HP2) 0805
DMIC_CLK
R519 R521 C595 C603
*20K_NC *20K_NC 470P 470P C529
50 50 33P
B NPO NPO +3.3V_RUN 50 B
R548 100K COH
HP1_JD 31
CON5 L23
2 TYCO_1770882-1 1 2 USBP11_D-
13 SB_USBP11-
AUD_HP1_L1 R529 0 AUD_HP1_L2 L75 BLM18BD601SN1D AUD_HP1_L3 4 4 3 USBP11_D+
13 SB_USBP11+
3
AUD_HP1_R1 R546 0 AUD_HP1_R2 L77 BLM18BD601SN1D AUD_HP1_R3 1
JACK 3 (HP1) *DLW21SN900SQ2L_NC
6
5
R532 R547 (14) C609 C621 R124 0

*20K_NC *20K_NC 270P 270P
25 25
NPO NPO R125 0
+5V_RUN +3.6V_CAMERA
U43
1 5 +VDDA
IN OUT
3 EN
C741 R640
*1U/10V/0603_NC 2 4 *100K/F_NC C743 C742
C GND NC/FB *20P/50V_NC R510
C
*4.7U/6.3V/0603_NC
*TPS73601DBVR_NC 100K
+VDDA U27A
8
LM358ADR2G
3
R642 1 R516 0
*49.9K/F_NC 2 +VDDA
R526 R506
1K C577 100K
4
2.2U
Reserve for camera power INT_MIC_C_L+ 10
X5R C586
0805 0.1U
C605 10
2.2U R531 X7R
(2) C771 270P/25/NPO 10 1K
X5R U27B
8
C622 2.2U/50V/1206 AUD_HP1_L_R R793 2.2K AUD_HP1_L0 0805 LM358ADR2G
31 AUD_HP1_L
(14) J5 INT_MIC_2_L+ INT_MIC_L1+ R518 10K INT_MIC_L0+ 5
C620 2.2U/50V/1206 AUD_HP1_R_R R794 2.2K AUD_HP1_R0 2 C596 0.1U/16/X7R/0603 7 INT_MIC_IN_OP
31 AUD_HP1_R 2 AUD_INT_MIC_IN 31
1 INT_MIC_2_L- INT_MIC_L1- R517 10K INT_MIC_L0- 6
C772 270P/25/NPO 1 C594 0.1U/16/X7R/0603 C590
MLX_53780-0270 0.1U/16/X7R/0603
4
U9
AUD_HP1_L0 13 9 AUD_HP1_L1 R530
AUD_HP1_R0 INL OUTL AUD_HP1_R1 1K
15 INR OUTR 11
4 R515 100K
NC1
1
6 INT_MIC_C_L-
NC2 D30
31 AMP_HP1_SHUD# 14 SHDNR NC3 8
D 18 12 *SM05_NC D
SHDNL NC4
NC5 16
C598 2.2U/25/X5R/1206 1 20 C604 R525
C1P NC6
3 10 2.2U 1K Layout Note:
+3.3V_RUN
QUANTA
3
C1N SVDD 10
PVDD 19 Place close to CODEC.
5 2 X5R
PVSS PGND
AGND
AGND
AGND
AGND
7 SVSS SGND
AGND
17
21
C202
1U/16/0805/X5R
0805
Title
COMPUTER
C597 MAX4411ETP+ AUDIO CONN
25
24
23
22
2.2U
25 Size Document Number Rev
X5R FX6 3A
1206
1 2 3 4 5 6 7 8
5 4 3 2 1
Core Power Decoupling

+1.2V_LOM
+3.3V_LAN +2.5V_LOM
C554 C552 C506 C562 C553 C548 C523 C524 C549 +3.3V_LAN +2.5V_LOM
4.7U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U R407 *0/0805_NC
10 10 10 10 10 10 10 10 10
X5R X7R X7R X7R X7R X7R X7R X7R X7R
0805
15
19
56
61
68
U25
6
R479
+1.2V_LOM +2.5V_LOM *0/0805_NC
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
DC/VDDP
VDDP Power Decoupling
36 LAN_BIASVDDH L62 BLM18AG601SN1D
D +2.5V_LOM BIASVDDH D
5 VDDC_IO/VDDC
R418 *0/0805_NC 55 C530 0.1U/10V
VDDC_IO/VDDC
13 VDDC
C531 C108 20 23 LAN_XTALVDDH
0.1U VDDC XTALVDDH L67 BLM18AG601SN1D
0.1U 34 VDDC
10 10 60
X7R X7R VDDC C160 0.1U/10V
45 LAN_AVDDL
AVDDL/AVDDH R429 *0_NC LAN_AVDDH
38 L57 BLM18AG601SN1D
DC/AVDDH
VDDIO Power Decoupling Place one cap close to each
52 C522 0.1U/10V of the pins, 38,45, and 52
+3.3V_LAN +1.2V_LOM
L56
LAN_AVDDL
BCM5784M/5787M DC/AVDDH
C501 0.1U/10V
AVDDH_LAN_TRD2N
R96 *0_NC TRD2-
LAN_AVDDH
39 AVDDL 10mm x 10mm
C518 C526 C502 C543 51
BLM18AG601SN1D C514 4.7U/10V/0805 C516 0.1U/10V AVDDL R103 *0_NC TRD2+
4.7U 0.1U 0.1U 0.1U 68-Pin QFN TRD3_N 49 TRD3- 34
LAN_TRD2N_TRD2P TRD2-
10 10 10 10 50
TRD3_P TRD3+ 34 TRD2- 34
X5R X7R X7R X7R
0805 48 AVDDH_LAN_TRD2N R106 *0_NC LAN_AVDDL
L64 AVDDH/TRD2_N LAN_TRD2N_TRD2P LAN_TRD2P_AVDDL TRD2+
TRD2_N/TRD2_P 47 TRD2+ 34
LAN_GPHYPLLVDDL 35 46 LAN_TRD2P_AVDDL
GPHY_PLLVDDL TRD2_P/AVDDL R120 *0_NC TRD1-
BLM18AG601SN1D C541 4.7U/10V/0805 C542 0.1U/10V AVDDH_LAN_TRD1N LAN_AVDDH
42 AVDDH_LAN_TRD1N
AVDDH/TRD1_N LAN_TRD1N_TRD1P R115 *0_NC TRD1+
TRD1_N/TRD1_P 43
L66 44 LAN_TRD1P_AVDDL LAN_TRD1N_TRD1P TRD1-
TRD1_P/AVDDL TRD1- 34
C LAN_PCIEPLLVDDL 30 C
PCIE_PLLVDDL R108 *0_NC LAN_AVDDL
TRD0_N 41 TRD0- 34
BLM18AG601SN1D C559 4.7U/10V/0805 C551 0.1U/10V 40 LAN_TRD1P_AVDDL TRD1+
+3.3V_LAN TRD0_P TRD0+ 34 TRD1+ 34
LINKLED# 2 LINKLED# 34
L69 LAN_PCIEPLLVDDL 1
SPD100LED# SPD100LED# 34
LAN_PCIESDSVDDL R464 *0_NC 27 67
PCIE_PLLVDDL SPD1000LED# SPD1000LED# 34
R431 33 66
PCIE_VDDL TRAFFICLED# IO_LOM_ACTLED_YEL# 34
*4.7K_NC BLM18AG601SN1D C558 4.7U/10V/0805
C550 R461 *0_NC 24 8
PCIE_VDDL/GND GPIO2 T30
0.1U/10V
LOM_CLKREQ# 5784M------24LC02
25 LOM_CLKREQ# Ensure an external +3.3V_LAN 5787M------1M flash to support ASF feature.
R434 pull-up at pin 12 9 +3.3V_LAN
0 (WAKE#).(0725) UART_MODE BCM_WP
GPIO1_SERIALDI 7
C153 0.1U/10V LAN_PCIETXDP 26 4
8 PCIE_RX3+/GLAN_RX+ LAN_PCIETXDN PCIE_TXD_P GPIO0_SERIALDO
8 PCIE_RX3-/GLAN_RX- 25 PCIE_TXD_N
C154 0.1U/10V 31
8 PCIE_TX3+/GLAN_TX+ PCIE_RXD_P
32 R399 R403 R405 C533
8 PCIE_TX3-/GLAN_TX- PCIE_RXD_N
12 4.7K 4.7K *4.7K_NC U22 0.1U
13,37,39,40 SB_PCIE_WAKE# WAKE#
R430 0 10 8 1 10
39,40,45,51 PLTRST_SYS# PERST# BCM_SCL VCC A0
R427 *0_NC 29 65 7 2 X7R
14 SB_LOM_PCIE_RST# PCIE_REFCLK_P SCLK_EECLK NC A1
28 63 SI 6 3
25 CLK_PCIE_LOM PCIE_REFCLK_N SI SCL A2
64 BCM_SDA 5 4
25 CLK_PCIE_LOM# SO_EEDATA SDA VSS
R462 200/F LAN_XTALO 62 CS#
R823 & R824: Stuff only if no +3.3V_LAN +3.3V_RUN +3.3V_LAN CS#
24LC02BT-I/STG
pull-ups on system side
Y2
1 2 LAN_XTALI Pin 59 : Connect with GPIO to detect R919 & R922: Stuff only if U8 is installed
RJ45 cable insert or not. if not used,
25MHz R410 R411 please NC. BCM_SCL R401 4.7K
B B
LAN_DISABLE# LAN_ENERGY_DET
R412 R413
1K 1K ENERGY_DET 59 T26
SI R415 4.7K
C555 C556 is active 4.7K 4.7K
27P 22P high. 54 VAUX_PRSNT
CS# R414 4.7K
50 50 53 +2.5V_LOM
NPO NPO VMAIN_PRSNT
42 LAN_DISABLE# 3 LOW_PWR
58 TEST1/SMB_CLK VDDC_IO/VDDP 17
57 +3.3V_LAN
TEST2/SMB_DATA
LAN_XTALO 22 18 LAN_REGCTL25
LAN_XTALI XTALO REGOUT12_IO/REGCTL25 C142 C145
21 XTALI
3
*0.1U_NC *4.7U_NC
Table 1 - Component Stuffing Requirements LAN_RDAC 37 10 10
RDAC Q67 X7R X5R
1
R926 is required only if Q1 can +3.3V_LAN *MMJT9435T1G_NC 0805
not dissipate the required power
INSTALL NOT INSTALL
R437 R406 1 +2.5V_LOM
2
4
1.24K/F 1W C113 C107
3
2512 0.1U 4.7U
10 10 C158 C157
R479,R429,R407,R96,R103, R428,R425,R94,R101,R105, 14 LAN_REGCTL12
1 Q62 X7R X5R *0.1U_NC *10U_NC
REGCTL12
5787M R106,R120,R115,R108,Q67,C142, R122,R119,R111,R449, MMJT9435T1G 0805 10 10
+1.2V_LOM X7R X7R
C145,C157,C158,R418,R464, R408,R463,R460 0805
2
4
R461,L68
C125 C124
LOM_CLKREQ# 11 0.1U 10U
CLK_REQ# 10 10
Package Body
A X7R X7R A
GND
16 0805
SUPER_IDDQ/GND
BCM5784MB0KMLG
69
R428,R425,R94,R101,R105, R479,R429,R407,R96,R103, R440 *20K_NC

LAN_DISABLE# 42
R122,R119,R111,R449, R106,R120,R115,R108,Q67,C142,
R408,R463,R460 C145,C157,C158,R418,R464,
5784 R461,L68 5784M 5787M Title
LAN(BCM5784M/5787M)
Note:thermal pad R439 39k 0
R440 20k *20k_NC CustomFX6 3A
Date: Thursday, June 26, 2008 Sheet 33 of 70

5 4 3 2 1
A B C D E
RJ-45 Connector
CON2
R424 330 12 Y
33 IO_LOM_ACTLED_YEL# LED_YN
4 4
+3.3V_LAN 13 LED_YP
+3.3V_LAN RJ45-TX3- 8
TRANSFORM RJ45-TX3+
RJ45-TX1-
7
6
8
7
6
1
RJ45-TX2- 5
Q68 RJ45-TX2+ 5
4 4
L65 DDTA114YUA-7-F RJ45-TX1+ 3
D28 47K 3
24 RJ45-TX3+ RJ45-TX0- 2
CHIP SIDE MEDIA SIDE TX0+ 2
TRD3+ 1 1 2 2 RJ45-TX0+ 1
33 TRD3+ TD0+ 33 SPD100LED# 1
23 RJ45-TX3-
TX0- 10K
TRD3- 2 10
33 TRD3- TD0- SDMK0340L-7-F LED_GND
22 TXCT3
TDCT TXCT0 +3.3V_LAN
3
3
TDCT0 1:1 TXCT2 O G
TXCT1 21
TDCT 4 R492 330 9
TDCT1 RJ45-TX2+ LED_GN/AP
TX1+ 20 D34 11 LED_GP/AN
CHSGND1
CHSGND2
TRD2+ 5 R774
33 TRD2+ TD1+
19 RJ45-TX2- 4.7K 1 2
TRD2- TX1-
33 TRD2- 6 TD1- 1:1 18 RJ45-TX1+
TRD1+ TX2+ SDMK0340L-7-F
33 TRD1+ 7 TD2+ 33 SPD1000LED#
17 RJ45-TX1-
D35
14
15
TRD1- TX2-
33 TRD1- 8 TD2-
16 TXCT1 1 2
TDCT TXCT2
9 TDCT2 1:1 15 TXCT0
TDCT TXCT3 SDMK0340L-7-F +3.3V_LAN
10 TDCT3
14 RJ45-TX0+
TRD0+ TX3+
3
33 TRD0+ 11 TD3+
3
13 RJ45-TX0-
TX3-
1
TRD0- 12
33 TRD0- TD3- 1:1 Q69
LFE9283-R DDTA114YUA-7-F
D29 47K
33 LINKLED# 1 2 2
10K
SDMK0340L-7-F
3
R503 330
TRD3+ C750 6.8P 50
TRD3- C751 6.8P 50
TRD2+ C752 6.8P 50
TRD2- C753 6.8P 50
TRD1+ C754 6.8P 50
TRD1- C755 6.8P 50
TRD0+ C756 6.8P 50
TRD0- C757 6.8P 50
pop L68 for 5787M. +3.3V_LAN +3.3V_SUS

+2.5V_LOM depop L68 for 5784M.
TXCT0 R478 75/F
2 2
TXCT1 R474 75/F
0603 package. TXCT2 R450 75/F
TXCT3 R442 75/F
R451 0
L68 0603
R475 *BLM18AG601SN1D_NC C129
*0_NC 1000P
0603 3K
NPO
1808
TDCT
TDCT
TDCT
TDCT
C540 C561 C534 C564

0.1U 0.1U 0.1U 0.1U
10 10 10 10
X7R X7R X7R X7R Reserved for EMI.
1 1
QUANTA
Title
COMPUTER
LAN SWITCH

FX6 3A

A B C D E
5 4 3 2 1
+3.3V_R5C833
+3.3V_R5C833
C324 C335 C351 C388 C315 C373

10U 0.01U 0.01U 0.01U 0.01U 0.01U +3.3V_R5C833
10 25 25 25 25 25
X5R X7R X7R X7R X7R X7R
0805
D D
Place the power caps close
U13B to the relation pins. +3.3V_RUN +3.3V_R5C833
C319 C316 C321 C317
10U 0.01U 0.1U 0.01U 10 67
10 25 10 25 Place the power caps close VCC_PCI1 VCC_3V
20 VCC_PCI2
X5R X7R X7R X7R to the relation pins. 27 C392 C328
0805 VCC_PCI3 0.01U 10U R235 0/0805
32 VCC_PCI4
41 25 10
VCC_PCI5 X7R X5R
128 VCC_PCI6 0805
61 VCC_RIN
16 VCC_ROUT1
34 VCC_ROUT2
C375 C318 C354 C340 64
0.01U 0.01U 0.47U 0.47U VCC_ROUT3
114 VCC_ROUT4
25 25 10 10 120
X7R X7R X7R X7R VCC_ROUT5
0603 0603 86
VCC_MD
GND1 4
12 PCI_AD[31..0] GND2 13
PCI Bus PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
PowerOnReset for VccCore 1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
C PCI_AD25 5 118 C
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
+3.3V_R5C833 PCI_AD21 12 99
PCI_AD20 AD21 AGND1 +3.3V_R5C833
14 AD20 AGND2 102
PCI_AD19 15 103
PCI_AD18 AD19 AGND3
17 AD18 AGND4 107
PCI_AD17 18 111
R303 PCI_AD16 AD17 AGND5
19 AD16
100K PCI_AD15 36 Route to GPIOG6 (pin 94) on the +3.3V_R5C833 +3.3V_R5C833
PCI_AD14 AD15 R301
37 AD14 SIO companion chip ECE5011, with
PCI_AD13 38 10K the signal named CB_HWSPND#
PCI_AD12 AD13
39 AD12
C393 PCI_AD11 40
PCI / OTHER
PCI_AD10 AD11
GBRST# should be asserted only 1U 42 AD10 HWSPND# 69
10 PCI_AD9 43 R277 R283
when system power supply is on. X5R PCI_AD8 AD9 10K 100K
44 AD8
0603 PCI_AD7 46
PCI_AD6 AD7 Memory Stick Enable
47 AD6 MSEN 58
PCI_AD5 48
PCI_AD4 AD5
49 AD4 XDEN 55 XD Card Enable
PCI_AD3 50
PCI_AD2 AD3
PCI Bus 51 AD2 Serial ROM disable
PCI_AD1 52 57
PCI_AD0 AD1 UDIO5
53 AD0
12 PCI_PAR 33 PAR
SD Card Enable
12 PCI_C_BE3# 7 C/BE3# UDIO3 65 MMC Card Enable
12 PCI_C_BE2# 21 C/BE2# UDIO4 59
B 12 PCI_C_BE1# 35 C/BE1# B
12 PCI_C_BE0# 45 C/BE0# UDIO2 56
PCI_AD17 8
R238 100 IDSEL
UDIO1 60
12 PCI_REQ1# 124 REQ#
12 PCI_GNT1# 123 GNT# UDIO0/SRIRQ# 72 IRQ_SERIRQ 12,42
12 PCI_FRAME# 23 FRAME#
12 PCI_IRDY# 24 IRDY#
12 PCI_TRDY# 25 TRDY# PCI Bus
12 PCI_DEVSEL# 26 DEVSEL#
12 PCI_STOP# 29 115 PCI_PIRQB# 12
1394 Interrupt
STOP# INTA#
12 PCI_PERR# 30 PERR#
12 PCI_SERR# 31 SERR# INTB# 116 PCI_PIRQA# 12
Media card Interrupt
71 GBRST#
12 PCI_RST# 119 PCIRST#
12 CLK_PCI_PCCARD 121 PCICLK
13,42 SB_PME# 70 PME# TEST 66 T112 PAD

R302 *0_NC
117 CLKRUN#
CoreLogic CLOCKRUN# 12,42 CLKRUN#
The ICH schematics need to include a

pull-up resistor to implement CLKRUN#,
and the ICH schematics must have a CLK_PCI_PCCARD R5C833T_V00
AJ5C8320H00 R300
pull-down, or constantly drive thesignal 100K
low, in order to disable CLKRUN#.
A R257 A
33
Refer to DELL
C348
M07 schematic
X06 QUANTA
12P
50
COG Title
COMPUTER
R5C833/PCI

FX6 3A

5 4 3 2 1
A B C D E
+3.3V_R5C833
1 1
80 mils
L44 J7
+3.3V_RUN_PHY
BLM18PG181SN1D TPB0N 1
C384 C368 C369 C386 0603 TPB0P 2
10U 0.1U 0.01U 1000P TPA0N 3 8
U13A 10 10 25 50 modify TPA0P 4 7
X5R X7R X7R X7R 5
0805 6
JST_06FFS-SP-TF(LF)(SN)
98 Place these caps as close to the U20 as possible.

AVCC_PHY1
106
AVCC_PHY2
110
AVCC_PHY3
112
AVCC_PHY4
AS CLOSE AS POSSIBLE TO R5C833

113 TPBIAS0
GUARD GND TPBIAS0 C359 0.33U
16 *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically.
R266 R272 X7R *TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible.
1394_XI 94 0603 *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).
C389 22P/50V XI C364 0.01U
2
25
Y1 56.2/F/0603 56.2/F/0603 X7R
24.576MHZ 104 TPB0N
TPBN0
1
1394_XO 95 105 TPB0P

C394 27P/50V R299 0 XO TPBP0
2
Populate C390 for

8 IN1 CARD READER 2
IEEE1394/SD
R5C832 chip 108 TPA0N

TPAN0
RICOH_FILO 96 109 TPA0P
C390 *0.01U/25V_NC FIL0 TPAP0 +3.3V_RUN_CARD +3.3V_RUN_CARD
CON6
1 24 SD/XD/MS_DATA2
RICOH_REXT101 R285 R288 SD_CD# SD(CD2/WP2/GND) MS-5(DATA2)
2 25
R291 10K/F REXT C371 270P SD_WP# SD(CD1) XD-9(GND) MS_INS#
3 26
25 SD(WP1) MS-6(INS)
4 27
NPO XD/MMS_DATA7 XD-18(VCC) SD-3(VSS1) SD/XD/MS_DATA3
5 28
RICOH_VREF100 56.2/F/0603 56.2/F/0603 XD/MMS_DATA6 XD-17(D7) MS-7(DATA3) XD/MMS_DATA5
6 29
C374 0.01U/25V VREF XD/MMS_DATA5 XD-16(D6) MMC-(D5) R575 0 SD/XD/MS_CLK
7 30
XD/MMS_DATA4 XD-15(D5) MS-8(SCLK) SD/XD/MS_CMD
8 31
R289 5.11K/F SD/XD/MS_DATA1 XD-14(D4) SD-2(CMD)
9 32
SD/XD/MS_DATA3 SD-8(DAT1) MS-9(VCC) XD/MMS_DATA4
10 33
Circuit area : As small as possible. SD/XD/MS_DATA0 XD-13(D3) MMC-(D4)
11 34
Place these caps as close SD/XD/MS_DATA2 SD-7(DAT0) MS-10(VSS) SD/XD/MS_DATA3
12 35
XD/MMS_DATA7 XD/MMS_DATA7 XD-12(D2) SD-1(DAT3) XD_WP#
to the U13 as possible. MDIO17
87 13
MMC-(D7) XD-8(-WP)
36
SD/XD/MS_DATA1 14 37 SD/XD/MS_DATA2
XD/MMS_DATA6 XD-11(D1) SD-9(DAT2) SD/XD/MS_CMD
92 15 38
MDIO16 SD-6(GND/VSS2) XD-7(WE) XD_ALE
16 39
XD/MMS_DATA5 XD/MMS_DATA6 MS-1(VSS) XD-6(ALE) XD_CLE
89 17 40
MDIO15 SD/XD/MS_CMD MMC-(D6) XD-5(CLE) XD_CE#
18 41
XD/MMS_DATA4 SD/XD/MS_CLK R569 0 MS-2(BS) XD-4(CE) SD/XD/MS_CLK
MDIO14 91 19 SD-5(CLK) XD-3(RE) 42
SD/XD/MS_DATA1 20 43 SD_WP#(XDR/B#)
SD/XD/MS_DATA3 SD/XD/MS_DATA0 MS-3(VCC/DATA1) XD-2(R/-B) XD_CDSW#
90 21 44
MDIO13 SD/XD/MS_DATA0 XD-10(D0) XD-1(CD)
22 MS-4(SDIO/DATA0) XD-0(GND) 45
93 SD/XD/MS_DATA2 23 46
MDIO12 SD-4(VCC/VDD) GND
GND 47
3 81 SD/XD/MS_DATA1 C638 3
MDIO11 TAISOL_144-2400002900
*270P_NC
82 SD/XD/MS_DATA0 25 C758 C646 C633 C677 C759 C760 (15)
MDIO10 *27P_NC 2.2U *27P_NC 27P
NPO *270P_NC 270P
50 6.3 25 25 50 50
75 XD_WP# NPO X5R NPO NPO
MDIO05 0603 NPO NPO
88 SD/XD/MS_CMD
MDIO08 +3.3V_R5C833
83 XD_ALE +3.3V_R5C833 +3.3V_RUN_CARD Close CON6 pin4
MDIO19
85 XD_CLE
MDIO18 U14
78 XD_CE# 5 1 +3.3V_RUN_CARD
MDIO02 R305 IN OUT C674 C644 C640
3 NC
*10K/F_NC 0.01U 0.01U 0.01U R304
77 SD_WP#(XDR/B#) MC_PWR_CTRL_0 4 2 C396 25 25 25 150K
MDIO03 D15 1SS355 EN GND 1U X7R X7R X7R
80 SD_CD# TPS2051BDBV 10
MDIO00 X5R
close to the Chip
D14 1SS355 XD_CDSW# C397 0603
79 MS_INS# 0.1U
MDIO01 10
X7R AAT4250 will be tested
84 SD/XD/MS_CLK by 2'nd source after
MDIO09
proto2 build.
MDIO04
76 MC_PWR_CTRL_0 SD Protect
74
MDIO06 T57 PAD R309 0
97
4 RSV 4
MDIO07
73 49
Q37
R5C833T_V00
SD_WP#(XDR/B#) 3 1 SD_WP#
QUANTA
*2N7002W-7-F_NC
COMPUTER
2
Title
XD_CDSW# IEEE1394/CARD READER

FX6 3A

A B C D E
1 2 3 4 5 6 7 8
A A
L36 +1.5V_CARD
13
13
SB_USBP7-
SB_USBP7+
4
1
3
2
USBP7_D-
USBP7_D+
Express Card
C337 C342
*DLW21SN900SQ2L_NC 0.1U 0.1U +1.5V_CARD Max. 650mA, Average 500mA.
10 10
X7R X7R
+3V_CARD Max. 1300mA, Average 1000mA.
R250 0
R249 0
+1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
U28
Please the cap
near connector.
17 AUXIN AUXOUT 15
B +3.3V_CARD 2 3 B
3.3VIN_0 3.3VOUT_0
4 3.3VIN_1 3.3VOUT_1 5
CN2 12 11
C341 C336 C346 1.5VIN_0 1.5VOUT_0
1 GND_1 14 1.5VIN_1 1.5VOUT_1 13
0.1U 0.1U 10U USBP7_D- 2
10 10 6.3 USBP7_D+ USB-
3 USB+
X7R X7R X5R CPUSB# 4 R558 100K ExpressSwitch +3.3V_SUS
CPUSB# +3.3V_SUS
0603 5 CARD_RESET#
RSV_0
6 RSV_1 20 SHDN# PERST# 8
Please the cap 7 EXPRCRD_STDBY# 1 10 EXPRCRD_PWREN# R562 100K
13,16,39,40 SB_SMBCLK SMBCLK T83 STBY# CPPE#
near connector. 8 6 9 CPUSB# R559 100K
13,16,39,40 SB_SMBDATA SMBDATA 9,12,14,39,45 PLTRST# SYSRST# CPUSB#
9 +1.5V_0 OC# 19
+1.5V_CARD 10 +1.5V_1 16 NC
13,33,39,40 SB_PCIE_WAKE# 11 WAKE# 7 GND0 RCLKEN 18
+3.3V_CARDAUX 12 +3.3VAUX
CARD_RESET# 13 PERST# R5538D001-TR-F
+3.3V_CARD 14 +3.3V_1
15 +3.3V_2
25 EXPRESSCARD_REQ# 16 CLKREQ#
EXPRCRD_PWREN# 17
13,42 EXPRCRD_PWREN# CPPE# +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
18 REFCLK-
25 CLK_PCIE_EXPCARD#
19 REFCLK+
25 CLK_PCIE_EXPCARD C665 C635 C645 C667 C636 C666
20 GND_2
21 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
8 PCIE_RX4- PERn0
22 10 10 10 10 10 10
8 PCIE_RX4+ PERp0
23 X7R X7R X7R X7R X7R X7R
GND_3
24 PETn0
8 PCIE_TX4-
25
NC1
NC2
NC3
NC4
NC5
8 PCIE_TX4+ PETp0
26 GND_4
C
Please the cap Please the cap Please the cap Please the cap Please the cap Please the cap C
MOLEX_48303-0033 near pin 12 & near pin 2 & 4 near pin 17 near pin 15 near pin 3 & 5 near pin 11 &
27
28
29
30
31
14(1.5VIN). (3.3VIN). (AUXIN). (AUXOUT). (3.3VOUT). 13(1.5VOUT).
PCI-Express TX and RX direct to connector.
D D
QUANTA
Title
COMPUTER
EXPRESS

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
External USB PORT hookup reference. Your design may

need more or less external ports and may be mapped Side External USBX2
differently +USB_SIDE_PWR (10)
L19 1 9
USBP0_D- USBP0_D- VBUS GND ESATA_TX3+_R
13 SB_USBP0- 4 3 2 D- A+ 10
1 2 USBP0_D+ USBP0_D+ 3 11 ESATA_TX3-_R
13 SB_USBP0+ + C485 D+ A-
C496 4 12
DLP11SN900HL2L 150U C492 0.1U GND GND SATA_RX3-_C C96 2200P/50V/X7R ESATA_RX3-_R
B- 13
6.3 150P 10 14 SATA_RX3+_C C95 2200P/50V/X7R ESATA_RX3+_R
A
Polymer 25 X7R B+ A
5 VBUS GND 15
(6) 7343 NPO USBP1_D- 6 16
USBP1_D+ D- Shield
7 D+ Shield 17
8 GND GND 18
GND 19
CN4
+ C482 C503 ESATA+USB CONN
*150U_NCC495 0.1U
6.3 150P 10
L20 Polymer 25 X7R
4 3 USBP1_D- 7343 NPO
13 SB_USBP1-
1 2 USBP1_D+
13 SB_USBP1+
DLP11SN900HL2L USBx2 & ESATA COMBO
(7) PJP14
1 2
(3) (4)
+5V_ALW
Place one 150uF cap by each
Platforms should put in PADS for the USB chokes if they FS2 USB connector.
*455/5A_NC U7
have the room. Chokes should be NOPOP. 1 2 2 1 +USB_SIDE_PWR
IN GND
B
42 USB_SIDE_EN# 3 EN1# OUT1 7 B
OC1# 8 USB_OC0_1# 13
ESD3 4 6
USBP0_D- USBP1_D- C494 C493 EN2# OUT2
1 1 6 6 OC2# 5
2 5 +USB_SIDE_PWR 0.1U *10U_NC
USBP0_D+ 2 5 USBP1_D+ 10 10
3 3 4 4
X7R X5R
SRV05-4.TCT 0805 TPS2062DR
(7)
PJP5
Place one 150uF cap by each
E-SATA Re-driver 1 2
(3) (4) USB connector.
+1.8V_RUN +5V_ALW
FS1 USB_BACK_PWR
*455/5A_NC U16
1 2 2 IN GND 1
C762 C764 C763 C765

C 0.1U/ 10V 0.1U/ 10V 0.1U/ 10V 0.1U/ 10V 42 USB_BACK_EN# 3 EN1# OUT1 7 C
OC1# 8 USB_OC2_3# 13
4 EN2# OUT2 6
C204 C205 5
0.1U *10U_NC OC2#
10 10
X7R X5R
(10) 0805 TPS2062DR
+1.8V_RUN +1.8V_RUN
U50
R779 0 1 20 R795 300
EQA EN
2 VDD VDD 19
C655 2200P/50V/X7R SATA_TX3+ 3 18 ESATA_TX3+_L C766 2200P/50V/X7R ESATA_TX3+_R
14 SATA_TX3+_C AI+ AO+
C654 2200P/50V/X7R SATA_TX3- 4 17 ESATA_TX3-_L C767 2200P/50V/X7R ESATA_TX3-_R
14 SATA_TX3-_C AI- AO-
5 GND GND 16
6 VDD VDD 15
C768 2200P/50V/X7R ESATA_RX3+_L 7 14 ESATA_RX3+_R
14 SATA_RX3+ BO+ BI+
C769 2200P/50V/X7R ESATA_RX3-_L 8 13 ESATA_RX3-_R
14 SATA_RX3- BO- BI-
9 GND GND 12
10 EQB VDD 11
R780 0 USB_BACK_PWR
JUSB1
PI2EQX3211BHE MB side
10
9
8
USBP3+ 7
13 SB_USBP3+ 6
D USBP3- D
13 SB_USBP3- 5
SATA_TX3+ ESATA_TX3+_L
SATA_TX3- R781 *0_NC ESATA_TX3-_L USBP2+ 4
13 SB_USBP2+ 3
R782 *0_NC USBP2-
ESATA_RX3+_L
ESATA_RX3-_L R783 *0_NC
ESATA_RX3+_R
ESATA_RX3-_R
13 SB_USBP2- 2
1 QUANTA
R784 *0_NC
ACES_88513-104N
Title
COMPUTER
USB

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
TH21 TH22
H-TC118BC197D63P2 H-TC118BC197D63P2 L74 +3.3V_WLAN
MiniCard WLAN connector USBP4_D- 1 2 SB_USBP4- 13
USBP4_D+ 4 3 SB_USBP4+ 13
4
2
*DLW21SN900SQ2L_NC
Layout Note: RP6
1
1
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN R528 and R527 4P2R-2.2K
R528 0
close to choke
2
J12 as possible to Q29
3
1
1 2 R527 0 minimize stubs. *2N7002W-7-F_NC
13,33,37,40 SB_PCIE_WAKE# WAKE# +3.3V
COEX2_WLAN_ACTIVE 3 4 WLAN_SMBCLK 1 3
COEX1_BT_ACTIVE_MINI Reserved GND SB_SMBCLK 13,16,37,40
A
5 Reserved +1.5V 6 A
MINI1CLK_REQ# 7 8
25 MINI1CLK_REQ# CLKREQ# Reserved
9 10 R446 *0_NC
GND Reserved
11 REFCLK- Reserved 12
25 CLK_PCIE_MINI1#
25 CLK_PCIE_MINI1
13 REFCLK+ Reserved 14
15 GND Reserved 16
R173 0 +3.3V_WLAN
MINI1CLK_REQ# PLTRST_SYS# 33,40,45,51
17 Reserved GND 18
19 20 R176 *0_NC WLAN_RADIO_OFF#
Reserved Reserved
2
21 22 Q30
C637 GND PERST# SB_WLAN_PCIE_RST# 14 *2N7002W-7-F_NC
8 PCIE_RX1- 23 PERn0 +3.3Vaux 24 +3.3V_WLAN
220P 25 26 WLAN_SMBDATA 1 3
8 PCIE_RX1+ PERp0 GND SB_SMBDATA 13,16,37,40
50 27 28
X7R GND +1.5V WLAN_SMBCLK
29 GND SMB_CLK 30
31 32 WLAN_SMBDATA
8 PCIE_TX1- PETn0 SMB_DATA R174 *0_NC
33 PETp0 GND 34
8 PCIE_TX1+ USBP4_D-
35 GND USB_D- 36
PCIE_MCARD1_DET# 37 38 USBP4_D+
14 PCIE_MCARD1_DET# Reserved USB_D+ USB_MCARD1_DET#
39 Reserved GND 40 USB_MCARD1_DET# 14
PCI-Express TX and RX direct to connector 41 Reserved LED_WWAN# 42
43 44
RSV_ICH_CL_CLK1 45
Reserved LED_WLAN#
46
LED_WLAN_OUT# 44 Suport for WoW
T87 PAD Reserved LED_WPAN#
RSV_ICH_CL_DATA1
Non-iAMT T86 PAD RSV_ICH_CL_RST1#
47
49
Reserved +1.5V 48
50 WLAN_RADIO_OFF# 2 1
T81 PAD Reserved GND WLAN_RADIO_DIS# 14
51 Reserved +3.3V 52
LTS_AAA-PCI-041-K01 D13 Prevent backdrive when

SDMK0340L-7-F
DEBUG PINS WoW is enabled.
JMINI Pin Debug Pin Name EC Pin R170 *0_NC
B B
16 HOST_DEBUG_TX 70
Place caps close to
17 HOST_DEBUG_RX 71 connector. +PWR_SRC +PWR_SRC +3.3V_ALW +3.3V_WLAN
+3.3V_WLAN Q27
19 8051_TX 82 +1.5V_RUN *SI3456DV_NC
R171 6
42 8051_RX 81 *100K_NC 5 4
R175 2
*100K_NC 1
C619 C608 C613 C612 C606 + C642
0.1U 0.047U 0.1U 0.047U 4.7U *330U_NC C610 C611
3
10 10 10 10 10 6.3 0.047U 0.047U WLAN_ENABLE
+3.3V_WLAN +3.3V_RUN X7R X7R X7R X7R X5R POSCAP 10 10
3
0805 7343 X7R X7R Q28A R169
5 *470K_NC
R557 0_0805
6
Q28B
4
2 *2N7002DW-7-F_NC C203
42 AUX_EN_WOWL
R172 *4700P_NC
MiniCard WPAN connector *200K_NC 50
1
R177 *2N7002DW-7-F_NC X7R
*100K_NC 0603
+3.3V_RUN +3.3V_RUN +1.5V_RUN
J11
13,33,37,40 SB_PCIE_WAKE# COEX2_WLAN_ACTIVE
1 WAKE# +3.3V 2 (17)
3 Reserved GND 4 Place caps close to connector.
COEX1_BT_ACTIVE_MINI 5 6
C
MINI2CLK_REQ# Reserved +1.5V R539 *0_NC +1.5V_RUN
C
25 MINI2CLK_REQ# 7 CLKREQ# Reserved 8
R538 *0_NC LPC_LFRAME# 12,42
9 GND Reserved 10 LPC_LAD3 12,42
11 12 R537 *0_NC
25 CLK_PCIE_MINI2# REFCLK- Reserved LPC_LAD2 12,42
13 14 R536 *0_NC
25 CLK_PCIE_MINI2 REFCLK+ Reserved LPC_LAD1 12,42
COEX2_WLAN_ACTIVE 15 16 R535 *0_NC
GND Reserved LPC_LAD0 12,42
(17) R541 0
R187 *0_NC PLTRST_SYS# 33,40,45,51 C618 C617
17 Reserved GND 18
R191 C225 9,12,14,37,45 PLTRST# R552 *0_NC R540 *0_NC 0.047U 0.047U
12 CLK_PCI_DEBUG 19 Reserved Reserved 20 WPAN_RADIO_DIS_MINI# 14
*100K_NC *33P_NC 21 22 10 10
50 GND PERST# SB_WPAN_PCIE_RST# 14 X7R X7R
8 PCIE_RX2- 23 PERn0 +3.3Vaux 24 +3.3V_RUN
COH 25 26 C615
8 PCIE_RX2+ PERp0 GND
27 28 *100P_NC
GND +1.5V 50
29 GND SMB_CLK 30 SB_SMBCLK 13,16,37,40
31 32 X7R
8 PCIE_TX2- PETn0 SMB_DATA SB_SMBDATA 13,16,37,40 +3.3V_RUN
8 PCIE_TX2+
33 PETp0 GND 34
35 36 USBP6_D-
PCIE_MCARD3_DET# GND USB_D- USBP6_D+
14 PCIE_MCARD3_DET# 37 Reserved USB_D+ 38
39 40 USB_MCARD3_DET#
Reserved GND USB_MCARD3_DET# 14
PCI-Express TX and RX direct to connector 41 Reserved LED_WWAN# 42
43 Reserved LED_WLAN# 44
45 46 LED_WPAN# C616 C614 C632 C634 C607
Reserved LED_WPAN# LED_WPAN# 44
MINI2CLK_REQ# 47 48 0.1U 0.047U 0.1U 0.047U 4.7U
Reserved +1.5V 10 10 10 10 10
49 Reserved GND 50
51 52 X7R X7R X7R X7R X5R
C630 Reserved +3.3V 0805
220P LTS_AAA-PCI-041-K01
50
X7R
D D
L76
USBP6_D- 1 2 SB_USBP6- 13
USBP6_D+ 4 3
TH16
H-TC118BC197D63P2
TH15
H-TC118BC197D63P2 *DLW21SN900SQ2L_NC
SB_USBP6+ 13
QUANTA
R545 0
Layout Note:
R545 and R544 Title
COMPUTER
close to choke MINI CARD
as possible to
1
R544 0 minimize stubs. Size Document Number Rev

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
TH7 TH8
H-TC118BC197D63P2 H-TC118BC197D63P2
1
A A
MiniCard WWAN connector

+3.3V_RUN +3.3V_RUN +1.5V_RUN
J10
13,33,37,39 SB_PCIE_WAKE# 1 WAKE# +3.3V 2
T79 PAD 3 Reserved GND 4
T80 PAD 5 Reserved +1.5V 6
MINI3CLK_REQ# 7 8 UIM_PWR
25 MINI3CLK_REQ# CLKREQ# Reserved
9 10 UIM_DATA
GND Reserved UIM_CLK
25 CLK_PCIE_MINI3#
11 REFCLK- Reserved 12 Place C484 close to J10
13 14 UIM_RESET
25 CLK_PCIE_MINI3 REFCLK+ Reserved UIM_VPP
15 GND Reserved 16
R448 0
PLTRST_SYS# 33,39,45,51
17 Reserved GND 18
19 Reserved Reserved 20
WWAN_RADIO_DIS# 14
21 GND PERST# 22 R447 *0_NC
SB_WWAN_PCIE_RST# 14
+1.5V_RUN Place caps close to connector.
8 PCIE_RX5- 23 PERn0 +3.3Vaux 24 +3.3V_RUN
8 PCIE_RX5+ 25 PERp0 GND 26
27 GND +1.5V 28
29 GND SMB_CLK 30
SB_SMBCLK 13,16,37,39
8 PCIE_TX5-
31 PETn0 SMB_DATA 32 SB_SMBDATA 13,16,37,39
B 33 34 C535 C536 B
8 PCIE_TX5+ PETp0 GND USBP5_D- 33P
35 GND USB_D- 36 0.047U
PCIE_MCARD2_DET# 37 38 USBP5_D+ 10 50
14 PCIE_MCARD2_DET# Reserved USB_D+
39 40 USB_MCARD2_DET# X7R COH
Reserved GND USB_MCARD2_DET# 14
PCI-Express TX and RX direct to connector 41 Reserved LED_WWAN# 42 PAD T78
43 Reserved LED_WLAN# 44
45 Reserved LED_WPAN# 46
49 50 +3.3V_RUN
MINI3CLK_REQ# Reserved GND
LTS_AAA-PCI-041-K01
C568
220P + C572 + C520
50 C537 C571 C538 C539 330U *330U_NC
X7R 33P 0.047U 33P 0.047U 6.3 6.3
50 10 50 10 POSCAP POSCAP
COH X7R COH X7R 7343 7343
Place C383, C367 close to JSIM1

ESD1
UIM_RESET 1 6 UIM_VPP UIM_PWR
UIM_PWR 1 6 UIM_PWR
C1 VCC GND C5 2 2 5 5
UIM_CLK 3 4 UIM_DATA L63
UIM_RESET UIM_VPP 3 4 USBP5_D-
C2 RST VPP C6 1 2 SB_USBP5- 13
SRV05-4.TCT USBP5_D+ 4 3 SB_USBP5+ 13
UIM_CLK C3 C7 UIM_DATA C57 C51 C53 C58 C33 C45
CLK DATA 33P 33P *100P_NC 33P 33P 1U *DLW21SN900SQ2L_NC
50 50 50 50 50 10 Layout Note:
GND
GND
GND
C C
COH COH X7R COH COH X5R R444 and R443
0603 R444 0
JSIM1 close to choke
1
2
3
FOX_2WM610C1C-DS-7F as possible to
Note: Place caps on UIMlines close to WWAN connector R443 0 minimize stubs.
D D
QUANTA
Title
COMPUTER
WWAN

FX6 3A

1 2 3 4 5 6 7 8
A B C D E
RTC BATTERY
+RTC_CELL +3.3V_ALW +PWR_SRC
4 D32 4
U29
1 2 3 OUT IN 1
4 5/3#
SDMK0340L-7-F
2 GND SHDN 5
C661 C649
16Mbit (2M Byte), SPI +3.3V_ALW +3.3V_ALW *4.7U_NC *MAX1615EUK-T+_NC *1U_NC
6.3 25
X5R X7R
0603 0805
D18
BT1
R167 1 2 +RTC_1 R218 1K +RTC 2
10K 1
U8 R165 SDMK0340L-7-F
1 8 10K LTS_AAA-BAT-019-K01 RTC-BATTERY
42 EC_FLASH_SPI_CS# CE# VDD
R533 15 6 C660
42 EC_FLASH_SPI_CLK SCK
R168 15 5 1U (3)
42 EC_FLASH_SPI_DIN SI
R166 15 2 7 25
42 EC_FLASH_SPI_DO SO HOLD# X5R
3 4 0603
C201 WP# VSS C199
22P SST25VF016B-50-4C-S2AF 0.1U
50 10
NPO X7R
3 3
2 2
1 1
QUANTA
Title
COMPUTER
FLASH /RTC

FX6 3A

A B C D E
1 2 3 4 5
U5 +RTC_CELL
43 KSO[0..16]
43 KSI[0..7]
3 R113 0
ITE8512E VBAT1
VCC 11 +3.3V_RUN
44 LED_MASK# KSO16
57 KSO17/GPC5 LQFP-128L VSTBY1 26 +3.3V_ALW R112
*0_NC
C131
0.1U
56 KSO16/GPC3 VSTBY2 50
KSO15 55 92 10
KSO14 KSO15 VSTBY3 X7R
54 KSO14 VSTBY4 114
KSO13 53 121
+3.3V_ALW KSO12 KSO13 VSTBY5
52 KSO12/SLCT VSTBY6 127
KSO11 51
KSO10 KSO11/ERR
46 KSO10/PE
KSO9 45
A
KSO8 KSO9/BUSY HWPG A
44 KSO8/ACK ADC0/GPI0 66 HWPG 45
C155 10U C106 0.1U C148 0.1U C130 0.1U C97 0.1U KSO7 43 67 CPU_PWRGD_Q
KSO7/PD7 ADC1/GPI1 CPU_PWRGD_Q 12
6.3 10 10 10 10 KSO6 42 68
0603 X7R X7R X7R X7R KSO5 KSO6/PD6 ADC2/GPI2 LCD_CBL_DET# +3.3V_RUN
41 KSO5/PD5 KEYBOARD ADC3/GPI3 69 LCD_CBL_DET# 26
X5R KSO4 40 70 INVERTER_CBL_DET#
KSO4/PD4 ADC4/GPI4 INVERTER_CBL_DET# 26
KSO3 39 71
KSO3/PD3 ADC5/GPI5 PBAT_PRES# 48
KSO2 38 72 ADP_OC
KSO1 KSO2/PD2 ADC6/GPI6 IRQ_SERIRQ
Place these caps close to ITE8512. 37 KSO1/PD1 ADC/DAC ADC7/GPI7 73 SIO_SLP_S5# 13
R104 10K
KSO0 36 LCD_BAK# R93 10K
KSO0/PD0
DAC0/GPJ0 76 ADAPT_TRIP_SEL 47
KSI7 65 77 +3.3V_ALW
KSI7 DAC1/GPJ1 SIO_EXT_WAKE# 13
KSI6 64 78
KSI6 DAC2/GPJ2 LAN_DISABLE# 33
KSI5 63 79
KSI5 DAC3/GPJ3 EXPRCRD_PWREN# 13,37
KSI4 62 80 SMBDAT0 1 2 RP3
KSI4 DAC4/GPJ4 SB_RSMRST# 13
KSI3 61 81 1 2 SMBCLK0 3 4 2.2KX2
KSI3/SLIN DAC5/GPJ5 SIO_PWRBTN# 13
KSI2 60 D10 SDMK0340L-7-F
KSI1 KSI2/INT SMBDAT1
59 KSI1/AFD 1 2 RP4
KSI0 58 SMBCLK1 3 4 10KX2
KSI0/STB
PWM0/GPA0 24 BREATH_LED# 44
25 SMBDAT2 1 2 RP5
PWM1/GPA1 BAT2_LED# 44 SMBCLK2
13,14,31 SB_AZ_CODEC_RST# 22 LPCRST/WUI4/GPD2 PWM2/GPA2 28 FAN1_PWM 29 3 4 2.2KX2
12,14 CLK_PCI_8512 13 LPCCLK PWM3/GPA3 29 PWM_VADJ 26
12,39 LPC_LFRAME# 6 LFRAME PWM4/GPA4 30 BAT1_LED# 44
10 31 KB_BACKLITE_EN
12,39 LPC_LAD0 LAD0 PWM5/GPA5 KB_BACKLITE_EN 43
12,39 LPC_LAD1 9 LAD1 PWM PWM6/GPA6 32 CAP_LED# 43
12,39 LPC_LAD2 8 LAD2 PWM7/GPA7 34
BEEP 31
12,39 LPC_LAD3 7 LAD3
47 INVERTER_CBL_DET# R270 100K
TACH0/GPD6 FAN1_TACH 29
93 48 KB_DET# R587 *100K_NC
12,35 CLKRUN# CLKRUN/GPH0/ID0 TACH1/GPD7 PANEL_BKEN 9
B 5 LPC LCD_CBL_DET# R1 100K B
12,35 IRQ_SERIRQ SERIRQ
13 SIO_EXT_SMI# 2 1 15 ECSMI/GPD4 TMRI0/WUI2/GPC4 120 LID_SW# 43
D6 2 1SDMK0340L-7-F 23 124
13 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/WUI3/GPC6 MEDIA_INT# 43
D4 2 1SDMK0340L-7-F 126
13 SIO_A20GATE D12 SDMK0340L-7-F 17 GA20/GPB5
26 LCD_TST LPCPD/WUI6/GPE6
2 1 D11 4 108 HWPG R417 100K
13 SIO_RCIN# KBRST/GPB6 RXD/GPB0 WIRELESS_ON/OFF# 44
WRST# SDMK0340L-7-F 14 109 SUS_ON R134 100K
WRST TXD/GPB1 AUX_EN_WOWL 39
16 119 RUN_ON R135 100K
26 LCD_BAK# PWUREQ/GPC7 CRX0/GPC0 CIRRX 43
IR/UART CTX0/GPB2 123 RUN_ON 26,46,49,50,52
31 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 HDDC_EN 30
13,35 SB_PME# 20 L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 95 CPU_VCORE_ENABLE 53
+3.3V_ALW
SMBCLK0
Discrete Board ID Straps
47,48 SMBCLK0 110 SMCLK0/GPB3
BAT SMBDAT0 111 100 SUS_ON
47,48 SMBDAT0 SMDAT0/GPB4 FLFRAME/GPG2/LF KB_DET# SUS_ON 46,49
FLRST/GPG0/TM 106 KB_DET# 43
SMBCLK1 115 104
25,26,29 SMBCLK1 SMBDAT1 SMCLK1/GPC1 FLAD3/GPG6 1.2V_ALW_SUS_ON 54
CLK,LCD,THERMAL 25,26,29 SMBDAT1 116 SMDAT1/GPC2 SMBUS LPC/FWH
SMBCLK2 FLASH FLAD2/SO 103 EC_FLASH_SPI_DO 41 (1)
117 102 R433 R132 R130 R129
43 SMBCLK2 SMBDAT2 SMCLK2/GPF6 FLAD1/SI EC_FLASH_SPI_DIN 41
GFX THM,LAN,MEDIA 43 SMBDAT2 118 SMDAT2/GPF7 FLAD0/SCE 101 EC_FLASH_SPI_CS# 41
105 *10K_NC 10K 10K 10K
FLCLK EC_FLASH_SPI_CLK 41
1.2V_RUN_ON 85 USB_BACK_EN#
10,45,46 1.2V_RUN_ON PS2CLK0/GPF0 BID1
45,53 CPU_VCORE_PWRGD 86 PS2DAT0/GPF1 EGAD/GPE1 82 PS_ID 48
EGPC 83 CHIPSET_ID1
EGCS/GPE2 5V_ALW_ON 52 USB_SIDE_EN#
45 RESET_OUT# 87 PS2CLK1/GPF2 EGCLK/GPE3 84 SNIFFER_GREEN# 44
C 43 NUM_LED# 88 PS2DAT1/GPF3 PS/2 C
89 R432 R133 R131 R128

43 CLK_TP_SIO PS2CLK2/GPF4
90 96 USB_SIDE_EN#
43 DAT_TP_SIO PS2DAT2/GPF5 GPH3/ID3 USB_BACK_EN# USB_SIDE_EN# 38
97 10K *10K_NC *10K_NC *10K_NC
GPH4/ID4 USB_BACK_EN# 38
GPIO 98 BID1
GPH5/ID5 BID1 5
99 CHIPSET_ID1
+3.3V_ALW ITE8512_XTAL1 GPH6/ID6
128 CK32K GPG1/ID7 107 MODC_EN 30
ITE8512_XTAL2 2 UMA
CK32KE
R95 1 VSS1 RI1/WUI0/GPD0 18 SIO_SLP_S3# 13 VGA_IDENTIFY
ITE8512IX_JX 12 21
VSS2 RI2/WUI1/GPD1 ACAV_IN 47
100K 27 35 USB_SIDE_EN#
VSS3 WUI5/GPE5 SNIFFER_PWR_SW# 44
D9 49
WRST# VSS4 1 = Discrete Gfx.
29,52 THERM_STP# 1 2 91 VSS5 RING/PWRFAIL/LPCRST/GPB7 112 NB_VCORE_RUN_ON 51
C119
+3.3V_ALW
113 VSS6
CHIPSET_ID1 BID1 BID0 0 = UMA.
0.1U 122 125
VSS7 PWRSW/GPE4 MAIN_PWR_SW# 44
SDMK0340L-7-F 16 L21 CHIPSET_ID1 BID1 USB_BACK_EN# FX6 (UMA) FX6A (Dis)
X7R 74 33 LCDVCC_TST_EN 1 0 0 SSI (X00) SSI (X00)
AVCC GINT/GPD5 LCDVCC_TST_EN 26
0603 75 1 0 1 PT (X01) PT (X01)
BLM11A05S AVSS 1 1 0 ST (X02) ST (X02)
C114 IT8512E/JX 1 1 1 QT (A00) QT (A00)
W1 need close U13. L22 0.1U/10V LQFP128-16X16-4-FX2 1 0 0 (A01) (A01)
32KHz Clock. 1 0 1
ITE8512_XTAL2 BLM11A05S
CLK_PCI_8512 ITE8512IX_JX
D R118 D
0 (8)
W1
4 1 ITE8512_XTAL1 R102 C745 C770
3 2
10 *1U_NC
10
0.1U
16
QUANTA
C139 32.768KHZ
18P
C149
18P
C121
2.2P
X5R
0603
X7R
ADP_OC R86 0 Title

COMPUTER
IINP 47
50 50 50 ITE8512IX pin12 connect to GND. R91 *0_NC ITE8512
ADAPT_OC 47
COG COG NPO
ITE8512JX pin12 connect to 0.1uF, 1uF. Size Document Number Rev
FX6 3A

1 2 3 4 5
1 2 3 4 5 6 7 8
TP +5V_RUN KEYBOARD CONNECTOR

+3.3V_ALW
42 KSO[0..16]
+3.3V_ALW R68 10K
42 KSI[0..7]
1
3
JKB1
RP33
GND1
42 KB_DET# 1
R156 +3.3V_RUN +3.3V_RUN +5V_RUN KSI7
4.7KX2 100K KSI6 2
KSI4 3
JP2 KSI2 4
2
4
5
1
A A
KSI5
R380 Q59 KSI1 6
42 LID_SW# 1 7
2
L29 BLM11A601S TP_CLK 100K DDTA114YUA-7-F KSI3
42 CLK_TP_SIO 2 47K 8
KSI0
L30 BLM11A601S TP_DATA 3 KSO5 9
42 DAT_TP_SIO 4 42 NUM_LED# 1 3 2 10
KSO4
5 10K 11
KSO7
+5V_RUN 6 12
KSO6
C593 C592 C192 C190 Q60 KSO8 13
ACES_88513-064N
3
10P 10P 10P 10P C198 C197 C191 C193 2N7002W-7-F R66 220 NUM_LED_L KSO3 14
50 50 50 50 0.1U 0.047U 0.047U 0.1U KSO1 15
NPO NPO NPO NPO 10 10 10 10 +3.3V_RUN +3.3V_RUN +5V_RUN KSO2 16
X7R X7R X7R X7R KSO0 17
KSO12 18
KSO16 19
20
1
KSO15
R379 Q57 KSO13 21
22
2
100K DDTA114YUA-7-F KSO14
+3.3V_ALW
47K
KSO9 23
Media Button 42 CAP_LED# 1 3 2 KSO11 24
25
10K KSO10
26
1
CAP_LED_L
NUM_LED_L 27
Q58 28
GND2
3
+3.3V_ALW *DA204U_NC 2N7002W-7-F R67 220 CAP_LED_L 29
D24 30
+3.3V_ALW +5V_ALW
3
R136 JP1
B 100K I2C 1 5V_PWR
B
42 SMBCLK2 2 CLK
3 HRS-FH28-60(30)SB-1SH(05)
42 SMBDAT2 DAT
R368 10K 4
42 MEDIA_INT# INT
5 GND
6 CP2 *100PX4_NC CP1 *100PX4_NC
44 HDD_LED LED1
C474
44 WLAN_LED 7 LED2 8 7 KSO12 8 7 KSO14
1U
44 BT_LED 8 LED3 6 5 KSO16 6 5 KSO9
10 9 3V_ALW 4 3 KSO15 4 3 KSO11
X5R 10 REV 2 1 KSO13 2 1 KSO10
0603 50 50
ACES_88511-1041 NPO NPO
1206 1206
CP4 *100PX4_NC CP3 *100PX4_NC

8 7 KSO4 8 7 KSO3
6 5 KSO7 6 5 KSO1
4 3 KSO6 4 3 KSO2
2 1 KSO8 2 1 KSO0
50 50
NPO NPO
Consumer IR +3.3V_ALW +3.3V_ALW
C90
1206 1206
KSI7 CP6 *100PX4_NC CP5 *100PX4_NC

8 7 KSI6 8 7 KSI1
*100P_NC 6 5 KSI4 6 5 KSI3
R310 R311 50 4 3 KSI2 4 3 KSI0
100 10K U15 NPO 2 1 KSI5 2 1 KSO5
50 50
C C
CIRRX 4 NPO NPO
42 CIRRX IRTX
3 1206 1206
VCC
2 GND1
1 GND2 100P CAPS CLOSE TO JKB1
TSOP36136TS
C399 C400
4.7U 0.1U
10
X5R
10
X7R
Key board Illumination
0805
(11)
+KB_LED +KB_LED
J4
Q82 1
+3.3V_ALW +15V_ALW +5V_RUN FS3 +KB_LED R796 100K 1
SI2304BDS-T1-E3 14 KB_LED_DET 2
1206L050YR 2
3 3
1 2 LED_PWM 3 1 LED_PWM 4
R797 4 C188
200K ACES_88513-044N 0.1U
Q70 10
2
*SI2304BDS-T1-E3_NC X7R
42 KB_BACKLITE_EN
3 1
R513 R512
*100K_NC *100K_NC
C579 R505
2
D *10U_NC *20K_NC D
6.3
6
X5R
2 0603
Q71B C589 QUANTA
3
*2N7002DW-7-F_NC *4700P/50V/0603_NC
1
42 KB_BACKLITE_EN 5
Q71A
*2N7002DW-7-F_NC Title
COMPUTER
4
TP/KB/CIR/BT

FX6 3A

1 2 3 4 5 6 7 8
A B C D E
ESD2
USBP10_D- 1 6
Biometric 2
1 6
5 +3.3V_ALW
WLAN +3.3V_WLAN +3.3V_WLAN +5V_RUN Sniffer Switch ON/OFF Sniffer Switch
USBP10_D+ 2 5
3 3 4 4
+3.3V_ALW SW1
*SRV05-4.TCT_NC +1.8V_RUN +3.3V_RUN
1
J3 1
R534 Q73 S1
1
2
L28 4.7K DDTA114YUA-7-F
USBP10_D- 2 47K
R313
13 SB_USBP10- 4 3 3 2 G
1 2 USBP10_D+ 1 3 2 100K
13 SB_USBP10+ 4 39 LED_WLAN_OUT#
5 10K
*DLW21SN900SQ2L_NC R312 0 SNIFFER1 3
6 42 WIRELESS_ON/OFF# S0
4
ACES_88511-0641 Q72 4
3
R150 0 2N7002W-7-F R523 C401 LSS12P-PC-V-T/R
WLAN_LED 43 *1U_NC
10
R149 0 220 X5R
0603
HDD activity LED. Power Buttom +3.3V_SUS +5V_SUS +5V_SUS +3.3V_SUS +3.3V_SUS +5V_SUS
Sniffer Buttom
+3.3V_RUN +5V_RUN
42 LED_MASK#
1
R38 R62
2
+3.3V_RUN R203 100K 100K Q6
47K
*0_NC R204 DDTA114YUA-7-F
0 1 3 2 4 BREATH_PWRLED 1 3 2
42 BREATH_LED# 42 SNIFFER_GREEN#
1 10K
Q56 U17 Q7
R206 Q31 2N7002W-7-F TC7SZ04FU(T5L,F,T) 2N7002W-7-F
3
2
100K DDTA114YUA-7-F
3
47K
1 3 2 R61 220 SNIFFER G_R
14 SATA_ACT#
10K
+3.3V_ALW
Q32 R192
Power Switch
3
2N7002W-7-F
HDD_LED 43
3 220 3
R372
100K
BT / UWB LED +3.3V_RUN
R373 10K POWER_ SW_IN0#
42 LED_MASK# 42 MAIN_PWR_SW#
+3.3V_RUN R73 R75 +5V_RUN C480

*0_NC 0 1U
10
X5R
1
0603
R81 Q8
2
100K DDTA114YUA-7-F +3.3V_ALW

47K
39 LED_WPAN# 1 3 2
10K
R376
Q11 100K
3
2N7002W-7-F
SNIFFER2
42 SNIFFER_PWR_SW#
R65
BT_LED 43
This circuit is only needed if 220 C479
*1U_NC
the platform has the SNIFFER. 10
X5R
0603
2 2
Battery status.
+3.3V_ALW +3.3V_ALW +5V_ALW2
1
R84 Q15 +3.3V_ALW +3.3V_ALW

2
100K DDTA114YUA-7-F
47K
1
42 BAT1_LED# 1 3 2
10K
*DA204U_NC *DA204U_NC
Q16 D27 D26
3
2N7002W-7-F R82
3
BAT1_LED
RBAT1_LED 48
SNIFFER2 POWER_ SW_IN0#
220
SNIFFER2 C746 100P/50/X7R

+3.3V_ALW SNIFFER G_R C747 100P/50/X7R
RBREATH_PWRLED C748 100P/50/X7R
POWER_ SW_IN0# C749 100P/50/X7R
J2
1
1 GND
1 Q13 SNIFFER2 2 1
DDTA114YUA-7-F SNIFFER G_R SSW1
47K 3 SLED1
4 SLED2
2 5
42 BAT2_LED#
10K
BREATH_PWRLED R374 220 RBREATH_PWRLED
POWER_ SW_IN0#
6
7
GND
PLED QUANTA
PSW
JST_SM07B-SHLS-TF(LF)(SN) COMPUTER
3
R77 Title
BAT2_LED SWITCH/LED
RBAT2_LED 48 SNIFFER Y_R:WLAN on/off
68 SNIFFER G_R:AP detection Size Document Number Rev
FX6 3A

A B C D E
1 2 3 4 5 6 7 8
Symbol:
2N7002W-7-F
D(3)
G(2) S(1)
A A
B B
+3.3V_ALW
+3.3V_ALW R404 *0_NC

14
1.2V_RUN_ON 10,42,46
U18A
R384 0 1
54 1.2V_ALW_SUS_PWRGD HWPG 42
+3.3V_ALW
14
3
R386 0 2 U21A
49 1.8V_SUS_PWRGD
U21B
14
1
SN74AHC08PW 3 4 U23A
2 6 1 U23B
5 3 R416 0 4
SN74AHC08PW 2 6 SB_PWRGD
SB_PWRGD 5,13
SN74AHC08PW R419 05
42 RESET_OUT#
SN74AHC08PW
SN74AHC08PW
R397 0
42,53 CPU_VCORE_PWRGD
U18B
R390 0 4 R409 0
50 1.5V_RUN_PWRGD 51 NB_VCORE_PWRGD
6
R393 0 5
50 1.1V_RUN_PWRGD
+1.8V_RUN
SN74AHC08PW
C C
SB_PWRGD
R189
U11
*0_NC
1 5 C222 *0.1U/10V/X7R_NC
NC VCC
R190 0 2
13 WD_PWRGD A
3 4 R186 *33_NC
GND Y NB_PWRGD 9,26
*SN74AUC1G17DBVR_NC
+3.3V_SUS R188 0
WD_PWRGD:
C200 0.1U
16
Push/Pull when A11SB700, OD when A12SB700.
X5R (3)
5
U19
PLTRST# 2
9,12,14,37,39 PLTRST#
4 PLTRST_SYS# 33,39,40,51
R164 *0_NC 1
74AHC1G08GW
D D
QUANTA
Title
COMPUTER
System Reset Circuit

FX6 3A

1 2 3 4 5 6 7 8
1 2 3 4 5
+3.3V_ALW +5V_ALW2 +15V_ALW +5V_ALW PQ17 +5V_RUN +5V_RUN

+3.3V_ALW +5V_ALW2 +15V_ALW +5V_ALW PQ10 +5V_SUS +5V_SUS SI4800BDY-T1-E3
SI4800BDY-T1-E3 MAX : 0.432
8 3
8 3 7 2
7 2 PR171 PR172 PR173 6 1
PR51 PR52 PR49 6 1 *100K_NC 100K 100K 5
*100K_NC 100K 100K 5
PC36 PR57
4
PC30 PR50 RUN_ENABLE 0.1U 20K
4
+5V_SUS_ENABLE 0.1U 20K 50
3
50 0603
3
0603 RUN_ON# 5 RUN_ENABLE
SUS_ON# 5 PQ50A PC38
6
A PQ11A 2N7002DW-7-F 4700P/50V/0603 A
4
6
2N7002DW-7-F PC29 2
4
26,42,49,50,52 RUN_ON
2 4700P/50V/0603 PQ50B
42,49 SUS_ON
PQ11B 2N7002DW-7-F
1
2N7002DW-7-F
1
+3.3V_RUN
+15V_ALW +3.3V_ALW PQ21 +3.3V_RUN MAX : 5.228A
FDS8880_NL
+15V_ALW +3.3V_ALW PQ33 +3.3V_SUS
SI4800BDY-T1-E3 +3.3V_SUS 8 3
8 3
MAX : 0.431A PR67
7
6
2
1
7 2 100K 5
6 1
PR94 5 PC43 PR69
4
100K 3.3V_RUN_ENABLE 0.1U 20K
PC58 PR80 50
3
SUS_ENABLE 0.1U 20K PQ20 0603
50 RUN_ON# 2
3
PQ34 0603
SUS_ON# 2 2N7002W-7-F PC42
1
4700P/50V/0603
2N7002W-7-F PC63
1
4700P/50V/0603
+15V_ALW +1.8V_SUS PQ13 +1.8V_RUN +1.8V_RUN

FDS8880_NL
MAX : 2.735A
B
8 3 B
+15V_ALW +1.2V_ALW_SUS +1.2V_SUS 7 2
FL11 PR169 6 1
*FBMH3225HM202NT_NC 100K 5
PC32 PR53
4
PQ52 1.8V_RUN_ENABLE 0.1U 20K
FDC655BN 50
3
6 PQ49 0603
5 4 RUN_ON# 2
PR189 2
100K 1 2N7002W-7-F
1
PC31
PC175 PR184 4700P/50V/0603
3
1.8V_RUN_ENABLE 11
1.2V_SUS_ENABLE 0.1U 20K
50
3
PQ51 0603
SUS_ON# 2
(19) +1.2V_RUN
2N7002W-7-F
1
PC179 +3.3V_ALW +5V_ALW2 +15V_ALW

4700P/50V/0603 +1.2V_ALW_SUS PQ27 +1.2V_RUN MAX : 1.883A
FDS6298
8 3
7 2
PR70 PR71 PR72 6 1
*100K_NC 100K 100K 5
PC51 PR73
4
1.2V_RUN_ENABLE 0.1U 20K
50
3
+5V_SUS +3.3V_SUS +1.8V_SUS +0.9V_DDR_VTT 0603
5
PQ25A
6
C 2N7002DW-7-F PC49 C
4
2 4700P/50V/0603
10,42,45 1.2V_RUN_ON
PQ25B
PR77 PR74 PR75 PR76 2N7002DW-7-F
1
*22_NC *22_NC *22_NC *22_NC
3
SUS_ON# 2 2 2 2
PQ32 PQ29 PQ30 PQ31 Reserve discharge path

1
*2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC
+5V_RUN +3.3V_RUN +2.5V_RUN +1.5V_RUN +1.8V_RUN
PR55 PR65 PR64 PR63 PR58

*1K_NC *1K_NC *1K_NC *1K_NC *1K_NC
3
3
RUN_ON# 2 2 2 2 2
PQ14 PQ19 PQ18 PQ16 PQ15

1
1
*2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC
D D
Reserve discharge path
QUANTA
Title
COMPUTER
RUN POWER SW

M-09 3A

1 2 3 4 5
A B C D E
+PWR_SRC
PQ37
Id=9.6A@Vgs=10V
SI4835BDY-T1-E3
8
PQ39 1 7
2 6
SI4835BDY-T1-E3 3 5
CHGR_IN
8 PR135 FL6
+DC_IN_SS +DC_IN_SS 7 1 0.01/F/2512 HI1206T161R-10(160,6A)
4
6 2 1 2
5 3 +DC_IN_SS
4
1 PC125 PC128 1
4
PR27 PR26 *2200P/50V_NC *0.1U/50V/0603_NC
10K 100K PR114
470K
3
2
PQ9
1
2N7002W-7-F
+DC_IN_SS
LDO
CSSN
CSSP
2
RB500V-40
PD8 PC126 PC127 PC122 PC124
PR131 2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206
1
365K/F
PC118
PR130 1U/25V/0805
49.9K/F
28
27
1
LDO
CSSP
GND
CSSN
BST
PC116 22 PC113 1U/10V/0603 PC121
DCIN
5
6
7
8
0.01U/25V LDO 0.1U/50V/0603
PR122 PQ41
10K/F 8731_ACIN 2 25 4 SI4800BDY-T1-E3
2 ACIN BST 2
PR132
21 33/F/0603 PC120
1
2
3
ACAV_IN LDO 1U/10V/0603 PL5 +VCHGR_1
42 ACAV_IN 13 ACOK
26 PC110 PR124 FL3
VCC 3300P/50V SIL104R-5R8PF (6A/16mOhm) 0.01/F/2512 HI1206T161R-10(160,6A)
+3.3V_ALW 11 VDD
24 DHI CHG_CS 1 2
DHI +VCHGR 48
5
6
7
8
PR123 PC100 0.1U/50V/0603 23 LX
4
15.8K/F LX PR133 1/0603
10 20 DLO 4 PR127
42,48 SMBCLK0 SCL DLO
9 2.2/0805 PC112 PC114 PC115 PC109 PC108 PC96 PC99 PC105
42,48 SMBDAT0 SDA
3300P/50V/0603
1000P/50V
2200P/50V
0.1U/50V/0603
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
14 19 PQ40
BATSEL PGND SI4812BDY-T1-E3
SMBUS Address 12
1
2
3
IINP 8 18
42 IINP IINP CSIP PC101
17 1000P/50V
CSIN
6 CCV
CSIP
+VCHGR
5 CCI FBSA 15
CSIN
Max Charging current
PR126
10K/F FBSB 16 PR128
100
setting 4.7A
4 CCS PC119
GND
DAC
3 220P/50V
REF
MAX8731AETI+
7
12
PR120 PC102 PC103 PC106 PC107 8731REF PU7

8.45K 0.1U/10V 0.01U/25V 0.01U/25V 0.01U/25V SIL104R-5R8PF ( 5.8U +/-30%/Isat=5.5A/Irms=6A/DCR_typ=16mOhm/10X10.1X3.8 )
PC111 PC104
SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm )
1U/10V/0603
3 0.1U/10V 3
SJ1
2 1
SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A)
2 1
Jump20X10
TABLE 1
+3.3V_ALW TRIP CURRENT
ADAPTER(W) Ra Rb Rc **Rd
(A)
+5V_ALW2 PR2
65 3.17 57.6K 13K 105 N/A
+5V_ALW2 *100K_NC
90 4.43 51.1K 17.8K 348 33.2K
PR6 Ra PR116
*51.1K/F_NC *1M_NC PC4 PC5 ADAPT_OC 42 130 6.43 32.4K 20.5K 100 27.4K
*0.01U/25V_NC
*100P/50V_NC
PR115
PU6A *100K_NC
*LM393DR2G_NC
150 7.43 30.9K 24.9K 432 88.7K
8
Rd
3
42 ADAPT_TRIP_SEL 3 + **PR119 is popluated if ADAPT_TRIP_SEL is used to program for the

PR7 *33.2K/F_NC 1 2 PR1
2 PQ3 *1K_NC next lower adapter.
PR117 *0_NC - *2N7002W-7-F_NC
1
4
4
Rb 4
PR119 PC95 PC93 PC94 PC92 PC91
*0.01U/25V_NC
*0.01U/25V_NC
*100P/50V_NC
*100P/50V_NC
*17.8K/F_NC *0.1U/10V_NC
5
+
7
6
PR118 Rc
-
QUANTA
*348/F/0603_NC PU6B
*LM393DR2G_NC
Title
COMPUTER
BATTERY CHARGER
For GPRS immunity place PC41 & PC39 as close to
the IC as possible Size Document Number Rev
FX6 3A

A B C D E
A B C D E
+3.3V_ALW
2
PC89 2200P/50V
+3.3V_ALW +3.3V_ALW
PD2 PD1 PD6 PD7
3
1 1
PC90 0.1U/50V/0603 *DA204U_NC *DA204U_NC DA204U *DA204U_NC
+VCHGR 47
SUY_200185MR009S509ZL PR113 PR112

BATT1+ 1
RP1 SMBUS Address=16H 10K 10K
100/4P2R
BATT2+ 2
SMB_CLK 3 1 2 SMBCLK0 42,47
SMB_DAT 4 3 4 SMBDAT0 42,47
BATT_PRES# 5
SYSPRES# 6 1 2 PBAT_PRES# 42
BATT_VOLT 7 3 4 PBAT_ALARM#
BATT1- 8 RP21
BATT2- 9 100/4P2R
JABT1
+5V_ALW2 +3.3V_ALW
2
Change F/T:BAT-200045MR009GX31ZR-9P-R-V(0822)
PR20
*DA204U_NC 2.2K
PD4
3
PQ4
2 FDV301N 2
DOCK_PSID 3 1 PR17 100

PS_ID 42
2
+5V_ALW2 +5V_ALW2
PR18
100K/F
2
PD3 PR22
3
10K *DA204U_NC
*SSM24PT_NC
2 PR24 PD5
*100_NC
3
PQ8
1
PS_ID_DISABLE#
MMST3904-7-F
PR21
15K/F
RBAT2_LED 44
RBAT1_LED 44
PL1
BLM11B102SPT
J8 Change Value per GG updated
3 PQ38 3
EMI requirement on 0812
8 SI4835BDY-T1-E3 +DC_IN_SS
BAT2_LED +DC_IN
BAT1_LED 7
6 FL5 8
LED_DET BLM41PG600SN1L
PSID 5 1 7
4 +DCIN_JACK 2 6
GND
GND 3 3 5
DC 2
1 PC10 PC12 PR16 PC16 PC14 PC117
DC FL4 0.1U/50V/0603 0.01U/25V 10K/F/0603 0.1U/50V/0603 0.1U/50V/0603 10U/25V/1206
4
BLM41PG600SN1L
-DCIN_JACK
MOLEX_87438-0843
PC15
0.47U/25V/0805 PR23
240K
RV2 RV1
*VZ0603M260APT_NC *VZ0603M260APT_NC
PR25
47K
4 4
+DCIN_JACK -DCIN_JACK
PC200 PC201 PC202 PC203 PC204 PC205

QUANTA
1000P 0.01U 0.1U 1000P 0.01U 0.1U
Title
COMPUTER
DCIN & BATT

FX6 3A

A B C D E
5 4 3 2 1
FL1 +PWR_SRC
HI1206T161R-10(160,6A)
1P8V_SUS_PWR_SRC
SJ6
(5) 51116S3 2 1 51116S5
2 1
+1.8V_SUS
+0.9V_DDR_VTT Jump20X10 PC53 PC52 PC55 PC54 +1.8V_SUS
PC60 PC83 PC84 2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206
D TDC : 1.925A 1U/10V/0603 *0.1U/10V_NC *0.1U/10V_NC
TDC : 11.473A D
5
6
7
8
9
MAX : 1.925A PQ28
MAX : 11.473A
OCP : 2.75A PR96
4 FDS8880_NL OCP : 16.39A
*0_NC PU4
TPS51116PWPRG4 (100)
1
2
3
4 CPU_VTT_SUS_SENSE
1 19 51116DH
VLDOIN DRVH
2 20 PL3 (5)
+0.9V_DDR_VTT VTT VBST PC62 0.1U/50V/0603 MPC1040LR88_0.88uH(17A/2.3mOhm)
4 18 51116LX +1.8V_SUS
PC73 PC74 VTTSNS LL
(5) 51116DL
10U/10V/0805 10U/10V/0805 5 17
GND DRVL
3 16 + PC184 + PC183
VTTGND PGND
5
6
7
8
9
PC182 220U/4V/ESR25 220U/4V/ESR25
PR212 DIS_MODE 6 11 51116S3 PR110 *0_NC PR213 0.1U/10V
MODE S3 RUN_ON 26,42,46,50,52
*0/0603_NC 4 PQ36 2.2/F/0603
7 12 51116S5 PHK28NQ03LT
+0.9V_DDR_REF VTTREF S5 SUS_ON 42,46
5VIN 5VIN
(P3)
8 14
1
2
3
COMP V5IN PC188
9 13 +3.3V_ALW 2200p/50V
PC189 VDDSNS PGOOD PR105 100K
GND
GND
GND
GND
GND
GND
GND
0.033U/16V 10 15
VDDQSET CS
C C
21
22
23
24
25
26
27
FOR DDR II PC72 PC185 PR210
1.8V_SUS_PWRGD 45
PR208 0.1U/10V *1000P/50V_NC 11.8K/F
*0_NC OCP Setting
DIS_MODE 5VIN (Note 1)
+5V_ALW2
PR220 PC69
+1.8V_SUS *0/0603_NC 4.7U/25V/0805
+5V_ALW
(5)
Mode Discharge Mode

PC82 PR108
+1.8V Tracking Discharge *18P/50V_NC *143K/F_NC PR104
*0_NC
5 CPU_VDDIO_SUS_FB_H
GND Non-Tracking Discharge
5 CPU_VDDIO_SUS_FB_L
B PR109 PR111 B
*100K/F_NC *0_NC
Routing as Differential signal.
SJ7
2 2 1 1
Jump20X10
MPC1040LR88 (0.88U +/- 20%/Isat=24A/Irms=17A/DCR_typ=2.3mOhm/11.5X10X4)
Frequency=400KHz, I_ripple=4.54A, Rtrip=11.8Kohm

(Note 1) Current Limiting Setting :
Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)
A A
QUANTA
Title
COMPUTER
1.8V_SUS&0.9VTT

FX6 3A

5 4 3 2 1
5 4 3 2 1
PC79
+1.8V_SUS 10U/4V/0805
+1.5V_RUN
6237REF +1.8V_SUS (5) TDC : 0.805A
D D
MAX : 0.805A
+3.3V_SUS PU5 MAX8794ETB+

10 IN OUT 9 +1.5V_RUN
PR90 PR91 +3.3V_ALW PR227 *0_NC
49.9K/F/0603 *30K/F/0603_NC
PR209 100K 2 6
45 1.5V_RUN_PWRGD VCC OUTS
(5)
5 PGOOD PGND 8
7 SHDN AGND 3
26,42,46,49,52 RUN_ON PC71 PC66
4 REFIN REFOUT 1 10U/4V/0805 10U/4V/0805
BP
11
PC80
PR95 PC70 PC64 PC75 1U/10V/0603 SJ4
150K/F/0603 1U/10V/0603 *0.01U/16V_NC 1U/10V/0603 2 1
2 1
C C
Jump20X10
PC34
+1.8V_SUS 10U/4V/0805 +1.1V_RUN
TDC : 1.330A
+1.8V_SUS (5)
6237REF
MAX : 1.330A
+3.3V_SUS PU2 MAX8794ETB+

B 10 IN OUT 9 +1.1V_RUN B
PR59 PR60 +3.3V_ALW PR228 *0_NC
90.9K/F/0603 *69.8/F/0603_NC
PR61 100K 2 6
45 1.1V_RUN_PWRGD VCC OUTS
(5)
5 PGOOD PGND 8
7 SHDN AGND 3
26,42,46,49,52 RUN_ON PR62 200K PC37 PC40
4 REFIN REFOUT 1 10U/4V/0805 10U/4V/0805
BP
11
PC41
0.1U PC33
PR56 PC39 10 PC35 1U/10V/0603 SJ5
110K/F/0603 1U/10V/0603 X7R 1U/10V/0603 2 1
2 1
Jump20X10
A A
QUANTA
Title
COMPUTER
1.5V_RUN&1.1V_RUN

FX6 3A

5 4 3 2 1
5 4 3 2 1
FL2 +PWR_SRC
HI1206T161R-10(160,6A)
NBCORE_PWR_SRC
PC87 PC88 PC1

2200P/50V 0.1U/50V/0603 10U/25V/1206
+NB_VCORE
D
NB_VCORE D
5
6
7
8
PR214
*100K_NC PQ1 TDC : 4.9A
51117DH 4 SI4800BDY-T1-E3
MAX : 4.9A
OCP : 7A
1
2
3
(5) PU1 TPS51117RGYR PC7 (5)
0.1U/50V/0603
42 NB_VCORE_RUN_ON 1 14
EN_PSV VBST
+NB_VCORE 2 13 PL4
TON DRVH SIL104R-1R5PF (10A/8.1mOhm)
PR125 3 12 51117LX
300/0603 VOUT LL
+5VCC_NB 4 11
V5FILT TRIP
5
6
7
8
NB_VCORE_FB 5 10 +5VCC_NB (P3) + PC86
VFB V5DRV PC85 220U/4V
6 9 51117DL 4 PR3 0.1U/10V
45 NB_VCORE_PWRGD PGOOD DRVL 2.2/F/0603 R1
THERM
7 8 PQ2
GND PGND SI4812BDY-T1-E3
1
2
3
PR5
C C
100K PR8 PC97
15
PC6 PR10 24.9K/F/0603 *0.015U/50V/0603_NC
1U/10V/0603 11.8K/F/0603 PC3
PC98 PC8 (54) 2200p/50V
+3.3V_ALW 1U/10V/0603 0.1U/10V
SJ8
2 1
2 1
Jump20X10
+3.3V_ALW PR11
178K/F/0603
PR15 NB_VCORE_FB
+5V_ALW2 +5VCC_NB 237K/F
PR225
PR224
*0/0603_NC
100K
PR182
R2
Frequency=300khZ
3
10K/F
+5V_ALW
2
PR9
PLTRST_SYS# STRP_DATA +NB_VCORE
75K/F/0603 HIGH LOW 1.1V
1
3
PQ53
2 2N7002W-7-F
9 STRP_DATA
PC9 HIGH HIGH 1.0V
B PQ6 0.01U/25V B
LOW LOW 1.1V
1
2N7002W-7-F
SIL104R-1R5A-R ( 1.5U +/- 30%/ Irms=10A/DCR_max=8.1mOhm/10.1X10X3.8 )
LOW HIGH 1.1V
3
SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A) +NB_VCORE=0.75*(1+R1/R2)
33,39,40,45 PLTRST_SYS# 2
1
PQ5
2N7002W-7-F
A A
QUANTA
Title
COMPUTER
VCC_NB

FX6 3A

5 4 3 2 1
5 4 3 2 1
TON GND OPEN VCC
Frequency (KHz)
400/500 400/300 200/300
(5V/3.3V)
FL10 +DC1_PWR_SRC
HI1206T161R-10(160,6A)
+PWR_SRC
+5V_ALW2 PR198 +5V_VCC1

D D
PR81 *10/0603_NC
390K
PC46 PC45 PC162 PC163 PC164 PC165 PC47 PC48
10U/25V/1206 10U/25V/1206 0.1U/50V/0603 2200P/50V 6237REF 0.1U/50V/0603 2200P/50V 10U/25V/1206 10U/25V/1206
ISL6237_ONLOD
PC180
4.7U/25V/0805
PR82 PR194
150K *0_NC
PR192
*0_NC
ISL6237_ONLOD
PC177
0.1U/50V/0603 PC59 PC178 PC176 +3.3V_ALW +3.3V_ALW
*1U/10V/0603_NC 1U/10V/0603 0.1U/10V PR190
*0_NC TDC : 6.04A
PR193
MAX : 6.04A
5
6
7
8
*0_NC
+5V_ALW
+5V_ALW 4
PQ24
SI4800BDY-T1-E3
OCP : 8.63A
TDC : 5.69A PU10 (5)
42
8
7
6
5
4
3
2
1
MAX : 5.69A
1
2
3
8
7
6
5
41 PL10
LDO
ONLDO
REF
PAD
LDOREFIN
VIN
NC
VCC
TON
PAD
OCP : 8.13A PQ23
SI4800BDY-T1-E3 +5V_DH
40 PAD +3.3V_LX
SIL1045R-3R3A (8A/21mOhm)
4 (5) 39 PAD
(5) 38 PR188
PAD 340K/F
C +5V_ALW 9 BYP REFIN2 32 C
PL9 3 10 31
2
1
SIL1045R-3R3A (8A/21mOhm) OUT1 ILIM2
11 FB1 OUT2 30
+5V_LX 12 29
ILIM1 SKIP#
5
6
7
8
PR181 270K/F POK1 13 ISL6237IRZ-T 28 POK2 + PC166
+5V_EN1 PGOOD1 PGOOD2 +3.3V_EN2 PC50 220U/6.3V/ESR25
14 EN1 EN2 27
15 26 +3.3V_DH 4 0.1U/10V
PR187 DH1 DH2
16 LX1 LX2 25
8
7
6
5
PC161+ *0/0603_NC 37
220U/6.3V/ESR25 PC44 PC171 PAD PQ26
36
1
2
3
PAD
PGND
0.1U/10V +5V_DL 0.1U/50V/0603 PC169 SI4812BDY-T1-E3 PR79
BST1
BST2
4
GND
VDD
PAD
PAD
PAD
DL1
DL2
PQ22 0.1U/50V/0603 *0/0603_NC
NC
SI4812BDY-T1-E3
PR176
3
2
1
35
34
33
17
18
19
20
21
22
23
24
PR177 1/0603
1/0603
SECFB
+3.3V_DL
+3.3V_ALW
+5V_ALW2 SJ2
2 2 1 1
PR191 (5) +5V_ALW PC167

39K 1U/10V/0603 Jump20X10 PR180 PR183
+5V_ALW2 100K 100K
PD9
BAT54S-7-F POK2
1 PC170
B B
+3.3V_EN2 0.1U/50V/0603
THERM_STP# 29,42
PC172 3
0.1U/50V/0603
PR179 200K PD11 BAS316 2
+5V_EN1 POK1
42 5V_ALW_ON H_THERMTRIP# 5
PD10 PC173
1 BAT54S-7-F 0.1U/50V/0603
PR218 PR202
*100K_NC *0_NC +15V_ALW 3
+5V_ALW2 PR174 *0_NC SECFB
2
(5)
(5) PC174
PC133 0.1U/50V/0603
SIL1045R-3R3A ( 3.3U +/- 30%/ Isat=9A/Irms=8A/DCR_max=21mOhm/10.1X10X4.5 )
1U/10V/0603
+3.3V_SUS
+2.5V_RUN
SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A)
PU8
3 IN OUT 4
26,42,46,49,50 RUN_ON 1 SHDN
2 GND SET 5
(5)
MAX8863SEUK+T
A PC137 PR137 PC136 PC131 PR136 A
*0.01U/16V_NC 100K *20P/50V_NC 10U/4V/0805 *100K_NC
QUANTA
PR139
100K Title
COMPUTER
3.3V_ALW & 5V_ALW

FX6 3A

5 4 3 2 1
A B C D E F G H
PL7
CPU_VDDNB_RUN MPLC0730L3R3 (5.7A/30mOhm) PQ44 FL8
SJ9 HI1206T161R-10(160,6A)
2 1
TDC : 2.1A +CPU_VDDNB_RUN
UGATE_NB 8 G1 D1 1 +PWR_SRC
2 1
OCP : 3A PR29 7 S1D2 2 (P1)
Jump20X10 47/F
CPU_VDDNB_RUN_J G2 LGATE_NB
ISL6265 Pin1 OFS VFIXEN 5 CPU_VDDNB_RUN_FB_H 6 3
6265AGND PC138 PC139 PC141 PC168 PC192 PC193
5 S2 4 2200P/50V 0.1U/50V/0603 4.7U/25V/0805 1000P 0.01U 0.1U
1.2V + PC140
V X SI4914DY-T1-E3
PR28 330U/2.5V/ESR9
+5V_SUS +5V_ALW2 +5VCC 47/F
3.3V
X V 5 CPU_VDDNB_RUN_FB_L
5V
X X PR31 6265AGND 6265AGND
1 1
*0/0603_NC
PR32
10/0603
+PWR_SRC
VFIXEN VID Codes PR35 PC20
22.1K/F 1000P/50V FL7
PC144 HI1206T161R-10(160,6A)
SVC SVD Output 1U/10V CPU_VIN0
PR141
10/0603 6265AGND (P1)
0 0 1.1 CPU_VIN0 + PC123 + PC129
PC134 PC135 PC132 PC130 PC190 PC197 PC198 PC199 100U/25V 100U/25V
PC146 PC142 2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206 10U/25V/1206 1000P 0.01U 0.1U
0 1 1.0 33P/50V 1200P/50V
5
6
7
8
9
PC145
0.01U/50V LGATE_NB
1 0 0.9 PR144 4
PR143 11.3K/F PQ42
44.2K/F PHASE_NB NTMFS4707NT1G
1 1 0.8 6265AGND +CPU_VDD0_RUN
1
2
3
+5VCC 6265AGND UGATE_NB
+1.8V_SUS +3.3V_RUN +3.3V_SUS PC147
0.1U/50V/0603 PL6
ETQP4LR36WFC_0.36UH
49
48
47
46
45
44
43
42
41
40
39
38
37
+3.3V_ALW PU9 1 2
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
GND
VIN
VCC
PR147 *0_NC
PR149
4
PR38 1/0603
5
6
7
8
9
5
6
7
8
9
6265AGND
PR217 PR216 10K PR142

*10K_NC 10K PR145 *10K_NC 1 36 2.2/0805 PC17 + PC18 + PC19 +
OFS/VFIXEN BOOT_NB PR151 PC148 330U/2V/ESR9 330U/2V/ESR9 330U/2V/ESR9
4 4
1/0603 0.22U/25V/0603
42,45 CPU_VCORE_PWRGD 2 35
2
PGOOD BOOT_0 PC143 2
1
2
3
1
2
3
2200P/50V/0603
5 CPU_PWRGD_SVID_REG 3 34 UGATE_0
PWROK UGATE_0 PQ43 ISP_0
Pin 49 is GND Pin +CPU_VDD0_RUN
NTMFS4108NT1G PQ45
PHASE_0 *NTMFS4108NT1G_NC ISN_0
PR219
5 CPU_SVD 4
SVD PHASE_0
33 TDC : 18A
*100K_NC
5 ISL6265HRTZ-T 32
5 CPU_SVC SVC PGND_0
6 31 LGATE_0 +5VCC FL9 +PWR_SRC

42 CPU_VCORE_ENABLE ENABLE LGATE_0 PC150 HI1206T161R-10(160,6A)
6265AGND
2.2U/10V/0603 CPU_VIN1
PR44 18K/F PR43 100K/F 7 30
RBIAS PVCC
(105) (P1)
PR153 255/F PC149 4700P/25V 8 29 LGATE_1
OCSET LGATE_1 PC159 PC158 PC157 PC154 PC191 PC194 PC195 PC196
5
6
7
8
9
2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206 10U/25V/1206 1000P 0.01U 0.1U
PR154 1K/F 9 28
VDIFF_0 PGND_1
4
10 27 PHASE_1 PQ48
FB_0 PHASE_1 NTMFS4707NT1G
1
2
3
PR155 54.9K/F PC151 1200P/50V 11 26 UGATE_1
COMP_0 UGATE_1 PL8 +CPU_VDD1_RUN
ETQP4LR36WFC_0.36UH
PR156 6.81K/F 12 25 1 2
PC23 180P/50V VW_0 BOOT_1
COMP_1
VDIFF_1
VSEN_0
VSEN_1
PR157 PC153
RTN_0
RTN_1
4
ISN_0
ISN_1
ISP_0
VW_1
ISP_1
PC152 1000P/50V 1/0603 0.22U/25V/0603
FB_1
5
6
7
8
9
5
6
7
8
9
PC21 + PC22 + PC26 +
330U/2V/ESR9 330U/2V/ESR9 330U/2V/ESR9
4 4 PR167
13
14
15
16
17
18
19
20
21
22
23
24
(P4) 2.2/0805
3 3
PR164 ISN_1
1
2
3
1
2
3
22K/F
ISP_0 PC160
PQ47 2200P/50V/0603
Close to NTMFS4108NT1G PQ46
PR36 *NTMFS4108NT1G_NC +CPU_VDD1_RUN
10 CPU PR162 PC155
+CPU_VDD0_RUN
socket 4.02K/F 0.1U/16V/0603
TDC : 18A
ISN_0 PC156 PR163
0.1U/16V/0603 4.02K/F PR165
22K/F
ISP_1
5 CPU_VDD0_RUN_FB_H
(P4) ISN_1
5 CPU_VDD0_RUN_FB_L
PR37
10
PR47 PC27
6.81K/F 1000P/50V
Close to
PR41
10 CPU socket
PR166
*10_NC PC25
4700P/25V
PC28
1200P/50V
PR46
5 CPU_VDD1_RUN_FB_L
1K/F
PC24
5 CPU_VDD1_RUN_FB_H
180P/50V
PR39 +1.8V_SUS
10
4 PR48 PR45 4
+CPU_VDD1_RUN
Option for 255/F 54.9K/F
Uni-plane
QUANTA
Title
COMPUTER
CPU_CORE_POWER

FX6 3A
A B C D E F G H
5 4 3 2 1
FL12 +PWR_SRC
D HI1206T161R-10(160,6A) D
1P2V_PWR_SRC
PC186 PC187 PC77

2200P/50V 0.1U/50V/0603 10U/25V/1206
+1.2V_ALW_SUS
+1.2V_ALW_SUS TDC : 2.177A
PR215
MAX : 2.177A
100K
1P2V_DH
OCP : 3.11A
PU3 TPS51117RGYR PC68 PQ35

(5) 0.1U/50V/0603 (5)
1 14 1 D1 G1 8
C 42 1.2V_ALW_SUS_ON EN_PSV VBST C
+1.2V_ALW_SUS 2 13 2 S1D2 7 PL2
TON DRVH MPLC0730L3R3 (5.7A/30mOhm)
PR98 3 12 1P2V_LX 3 G2 6
300/0603 VOUT LL
+5VCC_1P2V 4 11 4 S2 5
V5FILT TRIP
1P2V_FB 5 10 +5VCC_1P2V SI4914DY-T1-E3 (19) + PC57
VFB V5DRV PC56 220U/4V
6 9 1P2V_DL PR201 PR87 PC65 0.1U/10V
45 1.2V_ALW_SUS_PWRGD PGOOD DRVL *2.2/F/0603_NC 47.5K/F/0603 *0.015U/50V/0603_NC
THERM
7 8
GND PGND
PR85
100K
15
PC61 PR205 1P2V_FB

PC67 PC76 1U/10V/0603 7.5K/F/0603
1U/10V/0603 0.1U/10V PC181
+3.3V_ALW *2200p/50V_NC
SJ3
2 1
2 1 PR86
75K/F/0603
Jump20X10
B B
PR103
+5V_ALW2 +5VCC_1P2V 237K/F
PR222 Frequency=300KHz
*0/0603_NC
+5V_ALW
MPLC0730L3R3 ( 3.3U +/- 20%/ Isat=5.7A/DCR_max=30mOhm/7.2X7X3 )
SI4914DY-T1-E3 ( Vds=30V/Id_U=5.6A/Id_L=6.4A/Rdson_L=27mOhm )
A A
QUANTA
Title
COMPUTER
1.2V_ALW_SUS

FX6 3A

5 4 3 2 1
1 2 3 4 5
A A
BLANK PAGE FOR PAGE

B
NUMBER SAME AS DISCRETE B
C C
D D
QUANTA
Title
COMPUTER
VGA_M82

FX6 3A

1 2 3 4 5
5 4 3 2 1
D D
C
AMD S1G2 C
+2.5V_RUN
VCCA 2.5V
CPU_VDD0_RUN VDD CORE0 DDRII SODIMMX2--SYSTEM
0.375-1.500V 18A CPU_VDDIO_SUS
VDD MEM 4A
CPU_VDD0_RUN CPU_VDD1_RUN VDD CORE1 CPU_VTT_SUS
0.375-1.500V 18A VTT_MEM 0.5A
+PWR_SRC CPU core CPU_VDD1_RUN
BATTERY PWM CPU_VDD_NB
BATTERY CHARGER CPU_VDD_NB VDD NB DDRII SIDE PORT MEMORY
MAX17009 +1.8V
MAX8731 +1.2V_RUN BEAD VDD MEM
VLDT 1.2V TPDA
+1.8V_SUS CLOCK GEN
+1.8V_SUS VDDIO MEM TPDA +1.2V
DDR2 PWM BEAD 1.2V 0.2A
AC ADAPTOR LDO VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +3.3V
VTT_MEM TPDA BEAD 3.3V 0.5A
MAX8632
+NB_VCORE +3.3V
HD CODEC
+1.2V SW BEAD 3.3V CORE 0.3A AUDIO
+1V~+1.2V SW +1.2V_ALW_SUS RS780 +5V OP
+1.2V_RUN BEAD 5V ANALOG 0.1A
MAX8717 VDDHTTX 1.2V 0.5A
+1.1V_RUN Jumper +NB_VDD_MUX
VDDHTRX 1.1V 0.45A
RS780 +NB_VDD_MUX GBIT ENTHENET
BEAD VDDHT 1.1V 0.6A +1.2VDUAL
+3.3V_ALW +NB_VDD_MUX BEAD 1.2V 0.5A
+5V SW VDDPCIE 1.1V 0.7A +2.5VDUAL
+3V SW +5V_ALW +1.8V_RUN BEAD 2.5V 0.5A
BEAD VDDA18HTPLL 1.8V 0.25A +3.3VDUAL
MAX8744 +1.8V_RUN BEAD 3.3V 0.5A
BEAD VDDA18PCIE 1.8V 0.25A
+1.8V_RUN
BEAD VDDA18PCIEPLL 1.8V 0.25A
+NB_VCORE +3.3VDUAL ITE8512-EC
VDDC 1.0V-1.1V 7A Jumper
+1.8V_SUS +1.5V_RUN +3.3V_RUN +3.3VALW 3.3V 0.5A
+1.5V SW BEAD VDDG33 3.3V 0.03A RS780
MAX8794 +1.8V_RUN
VDDG18 1.8V 0.005A
+1.8V_RUN
B VDD18_MEM 1.8V 0.005A LCD PANEL B
+1.8V_RUN +3.3V
BEAD VDD_MEM 1.8V 0.15A SW 3.3V 1.5A
+3.3V_ALW +1.1V_RUN +3.3V_RUN +5V
+1.1V SW BEAD AVDD 3.3V 0.135A BEAD 5V 0.5A
MAX8794 +1.8V_RUN
BEAD VDDLT18 0.08A
+1.8V_RUN BACK LIGHT
BEAD VDDLTP18 0.08A +5V
+3.3V_RUN +5V
BEAD VDDLT33 0.22A VDD_LED_BL_RUN
+NB_VDD_MUX LED_BL
BEAD PLLs 1.8V 0.1A +VIN
+VDD_MAIN
PLLs 1.1/1.2V 0.15A
USB X2 FR
+5VDUAL
5VDual
USB X7 FR
+3.3V_ALW +3.3V_SUS SB SB700 +5VDUAL
SWITCH +1.2V_RUN 5VDual
BEAD PCIE IO 0.8A
+1.2V_RUN
BEAD PCIE PVDD 80mA EXPRESS CARD
+1.2V_RUN +1.5V
+3.3V_SUS +3.3V_RUN BEAD ATA I/O 0.2A 1.5V (S0, S1) 0.7A
SWITCH +1.2V_RUN +3.3V
BEAD ATA PLL 0.01A 3.3V (S0, S1) 1.3A
+3.3V_RUN VDD33_18 +3.3VDUAL
3.3V OR 1.8v I/O 0.45A 3.3V (S3, S5) 0.3A
+1.2V_RUN
+5V_ALW +5V_SUS SB CORE 0.6A
SWITCH +1.2V_ALW_SUS MINI PCIE SLOT1
1.2V S5 PW 0.22A +1.5V
+3.3V_SUS 1.5V (S0, S1) 0.7A
3.3V S5 PW 0.01A +3.3V SIM
+3.3V_SUS 3.3V (S0, S1) 1.3A
+5V_SUS +5V_RUN BEAD USB I/O 0.2A +3.3VDUAL
SWITCH +1.2V_SUS 3.3V (S3, S5) 0.3A
BEAD USB CORE 0.2A
MINI PCIE SLOT2

+1.5V
+1.8V_SUS +1.8V_RUN 1.5V (S0, S1) 0.7A
SWITCH +3.3V
3.3V (S0, S1) 1.3A
+3.3VDUAL
3.3V (S3, S5) 0.3A
A +1.2V_ALW_SUS +1.2V_RUN A
SWITCH MINI PCIE SLOT2
+1.5V
1.5V (S0, S1) 0.7A
+3.3V
3.3V (S0, S1) 1.3A
+3.3VDUAL
3.3V (S3, S5) 0.3A
QUANTA
Title
COMPUTER
Power Rail for system

FX6 3A

5 4 3 2 1
5 4 3 2 1
D
ADAPTER D
RUN_ON
+PWR_SRC FDS4435BZ +INV_PWR_SRC
BATTERY
+5V_ALW
1.2V_ALW_SUS_ON
ISL6237 TPS51117 TPS51117 TPS51116 ISL6265 MAX8632
C C
MAX8731 +15V_ALW
GFX_RUN_ON
CPU_VCORE_ENABLE
NB_VCORE_RUN_ON
Charger
5V_ALW_ON
SUS_ON
SUS_ON
+1.2V_ALW_SUS
SUS_ON
1.2V_RUN_ON
+CPU_VDD0_RUN +VCC_GFX_CORE
+5V_ALW +3.3V_ALW +NB_VCORE +1.8V_SUS +0.9V_DDR_VTT +CPU_VDD1_RUN
+CPU_VDDNB_RUN +1.1V_GFX_PCIE
WLAN_3V_ENABLE
SI4336DY FDC655BN
RUN_ON
ENAB_3VLAN
RUN_ON
SUS_ON
B B
FDC655BN SI4336DY SI3456DV-T1-E3 SI4800BDY
RUN_ON
RUN_ON
RUN_ON
FDC655BN FDC655BN SI4800BDY
SI4856ADY MAX8794 MAX8794
MAX8863 +1.2V_RUN +1.2V_SUS
+3.3V_RUN +3.3V_LAN +3.3VSUS
RUN_ON
MODC_EN#
HDDC_EN#
+3.3V_WLAN +1.8V_RUN +1.5V_RUN +1.1V_RUN

5784M
+2.5VRUN LOM_REGCTL12_PNP
+5V_RUN
MMJT9435T1G
( Q62 )
+1.2V_LOM
+5V_HDD +5V_MOD +VDDA
LOM_REGCTL25
A
L41 5784M A
( Q25) +2.5V_LOM
QUANTA
Title
COMPUTER
+5V_SPK_AMP Power Sequence Diagram

FX6 3A

5 4 3 2 1
1 2 3 4 5 6 7 8
+3.3V_RUN
2.2K 2.2K
AA18 SB_SMBCLK 197

DIMM0
SB700 W18 SB_SMBDATA 195
P16
A A
197
DIMM1
195
P16
8
Express
10
7 Card
+3.3V_ALW P37
CHARGER
9
P47
2.2K 2.2K 32
SMBCLK0 100 MiniCard
110 3
BATTERY 30 WWAN
P40
111 SMBDAT0 4 CONN P48
B
100 B
32
MiniCard
+3.3V_RUN
30 WPAN
+3.3V_ALW P39
2.2K 2.2K
10K 10K
+3.3V_RUN
115 SMBCLK1 CLK_SCLK 2
2N7002
116 SMBDAT1 CLK GEN.
CLK_SDATA 3
2N7002
P25
SIO +3.3V_RUN +3.3V_RUN
10K 10K
+3.3V_RUN
THERM_SCL 10
2N7002
C C
ITE8512E EMC1423
THERM_SDA 9
2N7002
P29
+3.3V_RUN
6
INVERTER
5
+3.3V_ALW P26
2.2K 2.2K
117 SMBCLK2 2
Media
118 SMBDAT2 3
Button P49
D D
QUANTA
Title
COMPUTER
SMBUS BLOCK

FX6 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
PV1 PV2
TH26 (13) TH4
H-RE36X107D16X87P2
2
TH23 TH31 H-O126X158D126X158N PAD138X98XH PAD158X98XH 1 h-tc276bc236d126p2-v4
2
1 h-c236d126p2-v4 1 H-TC216BC236D126P2-V4
TH17 TH13
H-RE36X107D16X87P2 H-RE36X107D16X87P2
5 3
GND
GND
5 3 5 3
1
H-TC276BC3
1
1
1
D D
UMA only. 15D110P2
4
4
4
TH20 TH27 TH24 TH14
2
2
1 h-tc315bc236d126p2-v4 1 h-tc354bs335d126p2-v4 1 h-ts335bc335d126p2-v4 TH9 1 h-c236d126p2-v4
H-OB166X87D166X87N
5 3 TH6 TH32 5 3 5 3 5 3
1 2h-tc197bc216d126p2-v4 H-C126D126N
1
5 3
4
4
1
H-C315D CPU TH
4
TH25 TH1 TH2
2
h-tc197bc236d126p2-v4 h-tc197bc236d126p2-v4 H-TC197BC236D110P2-V4
C
110P2-V4 H-C276D157P2 H-C276D177P2 1 1 1 C
TH19 TH18 TH10 TH11

+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +CPU_VDDNB_RUN +CPU_VDDNB_RUN H-C276D157P2 H-C276D157P2 H-C276D157P2 H-C276D177P2 5 3 5 3 5 3
C180 C189 C322 C265 C146 C147

*0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC
4
10 10 10 10 10 10
X7R X7R X7R X7R X7R X7R
+3.3V_RUN +3.3V_RUN +3.3V_RUN +1.2V_VDD +NB_VDD_MUX TH3
2
+3.3V_ALW 1 h-tc197bc236d126p2-v4
+3.3V_RUN +3.3V_RUN +3.3V_RUN TH33
H-TC138BC205D83P2
C276 C338 C631 C716 C23 C232 C234 C275
*0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC C350 *0.01U_NC *0.01U_NC *0.01U_NC 5 3
10 10 10 10 10 *0.1U_NC 25 25 25
X7R X7R X7R X7R X7R 10 X7R X7R X7R
X7R
1
B +3.3V_RUN B
4
+PWR_SRC+PWR_SRC+PWR_SRC +CPU_VDD0_RUN +CPU_VDD0_RUN
C91 C92
*0.01U_NC *0.01U_NC
C166 C194 C224 25 25 H-TC197BC236D110P2
*0.1U_NC *0.1U_NC *0.1U_NC X7R X7R
50 50 50
X7R X7R X7R
0603 0603 0603 +PWR_SRC +PWR_SRC +PWR_SRC +NB_VCORE
TH28 TH29
2
+CPU_VDD0_RUN +CPU_VDD0_RUN 1 h-tsbc315d126p2-v4 1 h-tsbc315d110p2-v4
+3.3V_RUN +3.3V_RUN +3.3V_RUN C569
C78 C77 C688 C591 *1000P_NC C11
*0.01U_NC *0.01U_NC *0.1U_NC *0.1U_NC 50 *0.1U_NC
25 25 50 50 X7R 10 5 3 5 3
C262 C367 C349 X7R X7R X7R X7R X7R
*0.1U_NC *0.1U_NC *0.1U_NC 0603 0603
10 10 10
X7R X7R X7R
+1.2V_AVDD_SATA +1.2V_VDD +1.2V_VDD
h-o71x118d32x79p2
4
+CPU_VDD0_RUN +CPU_VDD0_RUN
A C75 C76 +PWR_SRC TH34 TH35 A

+3.3V_ALW +3.3V_ALW +3.3V_ALW_R *0.01U_NC *0.01U_NC h-o71x118d32x79p2 h-o71x118d32x79p2
25 25
X7R X7R
C725
C255 C395 C387 *0.1U_NC Title
*0.1U_NC *0.1U_NC *0.1U_NC 50 SCREL HOLE
1
10 10 10 X7R
X7R X7R X7R 0603 Size Document Number Rev
+3.3V_RUN +3.3V_ALW_R +1.2V_VDD B FX6 3A

5 4 3 2 1
A B C D E
Change List
Item Page# Date T Issue Description Solution Description Rev
X00-1
4 1 25 8/13/2007 EE CLK_NB_14MB need resistor to a voltage divider. RS780 voltage level is +1.1V. Chagne R607 from 33 ohm to 158/F, added R637 90.9/F, depop R608 10k for RS780. X00-1 4
2 4 8/13/2007 EE Remove R516 0 ohm reserved resistor for MEMVREF. FX6/GX3 use 1.8V/2 Remove R516 0 ohm. X00-1
3 5,12 8/13/2007 EE CPU_LDT_REQ#R should pull up to +1.8V_SUS. POP R38 and Depop R415. X00-1
4 8,51 8/13/2007 EE Connect STRP_DATA to VCORE PWM of NB for Power play. Connect STRP_DATA from U23.B10 to PQ1.2. X00-1
5 13 8/13/2007 EE IDE_RST#/F_RST#/IMC_GPO3 defaults to output driven low. Remove R720 20k. X00-1
6 14 8/13/2007 EE GP16,GP17 for ROM sel. Hepburn connect to EC spi rom. For SB, EC is on LPC bus. Depop R430 and pop R420. For LPC. X00-1
7 14 8/13/2007 EE ATI recommend that AVDD should tie to +3.3V_S5 power rail. Chagne L46 from +3.3V_SUS to +3.3V_ALW. X00-1
8 14 8/13/2007 EE ATI recommend that AZ_RST#, LPCCLK0, LPCCLK1 should pull up to +3.3V_S5 with a 10-k. Chagne R378,R396,R408 from +3.3V_SUS to +3.3V_ALW. X00-1
9 8 8/13/2007 EE S1G2 didn't use DDR_CS2_DIMMA/B# pin. Remove DDR_CS2_DIMMA/B# from CN5,CN6 X00-1
3 Chagne from X00-1 to X00-2 3
10 08 8/14/2007 EE Follow ATI recommend. Change Q59,Q20 from MMBT3904 to FDV301N and remove R54,R492. X00-2
11 5 8/14/2007 EE Follow ATI recommend. Modify VID table. X00-2
12 16 8/14/2007 EE Remove single net DDR_CS3_DIMMA/B# Remove single net CN5.120,CN6.120 X00-2
13 5 8/14/2007 EE Change the CPU_PWRGD,LDT_STOP#, LDT_RST# from +1.8V_RUN to +1.8V_SUS. Pull-up R193,R180,R184 from +1.8V_RUN to +1.8V_SUS(VDDIO). X00-2
14 5 8/14/2007 EE Follow ATI recommend.CPU pin C2 need pull-down with 0 ohm. Pop R536 0 ohm. X00-2
15 5 8/14/2007 EE To save the space. There is no need to have these resister in Griffin system. Remove R556,R169,R161,R554,R553,R555,R172,R191,R165,R168,R196,R205 X00-2
16 5 8/14/2007 EE Follow ATI.The HDT we have (you have) right now is Purple Possum system. It's 1.8V level design. Pop R213 0 ohm and depop R212,Q35,R216. X00-2
17 5,53 8/14/2007 EE CPU_PWRGD_SVID_REG should be level shifted to 3.3V for the ISL6265. Vih(min) is 2V. Added Q76,R161. X00-2
18 5 8/14/2007 EE Diode D7 blocks a low input to the CPU MEMHOT_L so the circuit would not work as drawn Remove D7 and reserved R159 680 ohm for DDRII thermal IC in the future. X00-2
2 2
19 19 8/14/2007 EE HDMI strap is on Hsync.Add 10k-ohm PU (to 3.3V) on VGAHSYNC before buffer U6. Discrete only. Pull up R191 10k ohm to +3.3V_RUN at VGASYNC X00-2
20 8,28 8/14/2007 EE DDC3 is 5V tolerance. There is no need to add level shifters, Discrete only. Remove R18,R19,R22,R30,Q12,Q18. Remove off page HDMI_SCL,HDMI_SDA.Add TP on U23.A8 X00-2
21 39 8/14/2007 EE For LPC connect to WPAN socket: Reserve 0ohm, and NC when PD. Added R720,R763~R766 0 ohm for LPC signals. X00-2
Chagne from X00-2 to X00-3

22 29 8/15/2007 EE Reserve the caps for any noise coupling issue happening. Depop C338 and close Q37. Added C920 and close EMC1423. X00-3
23 29 8/15/2007 EE Added Q77 2N7002 isolation circuit. Added Q77 instead R406 ohm and change Q42 from +3.3V_SUS to +3.3V_RUN. X00-3
24 X00-3
25 X00-3
26 49 8/15/2007 P FAE Suggetion for OCP setting Change PR97 from 7.15K to 8.45K X00-3
1 1
27 52 8/15/2007 P Charge pump from +5V LDO, might cause high ripple voltage Add P112 to reduce ripple voltage X00-3
28 52 8/15/2007 P PR219 no need such hige rating component Change PR219 from 0805 to 0603 and remove one X00-3
PROJECT : Hepburn DOC. NO. : 204 REV: X00 QUANTA

APPROVED BY : Cory Lin CHECKED BY: Cory Lin DRAWN BY : Leo Tseng DATE : Aug. 13 , 2007 SHEET 1 OF 11 COMPUTER
A B C D E
A B C D E
Change List
29 52 8/15/2007 P PC474 should populated for filter Populate PC474 X00-3
4 30 52 8/15/2007 P Reserve feedback circuit for testing Add PR169 and PR218 X00-3 4
31 28 8/15/2007 EE No need to implement shunt resistors for HDMI on M82S Discrete only. Remove R159,R160,R163,R164 180 ohm. X00-3
32 36 8/15/2007 EE Follow vendor review. Added RC to include more different memory card. Pop C860 270pF and added C921 0.01u, R456 150k. X00-3
33 19,27 8/15/2007 EE Follow M82-S reference schematic. Discrete only. There is double PU for CRT DDC.Remove R522,R519 2.2k and change R520,R486,R521,R485 to 2.2k. X00-3

34 42 8/16/2007 P Load switch voltage drop is out of spec. Change PQ13 from SI4800BDY to SI4856BDY X00-4
35 42 8/16/2007 P Load switch voltage drop is out of spec. Change PQ29 from SI4800BDY to SI4336DY X00-4
36 42 8/16/2007 P Load switch voltage drop is out of spec. Change PQ20 from SI4800BDY to SI4336DY X00-4
37 5,29 8/16/2007 EE Follow SMSC feedback. Change C341 from 220p to 2200p and depop C212 X00-4
38 15 8/16/2007 EE Follow ATI SB700 checklist. Change C518,C519,C529 to 1uF, C524 to 22uF. X00-4
3 3
39 15 8/16/2007 EE Follow ATI SB700 checklist. Change C496,C494,C495,C489 to 2.2uF. X00-4
EE Chagne from X00-4 to X00-5

40 19 8/17/2007 EE Move CLK_VGA_27M_SS to GPIO16 and reserved it for spread spectrum. Discrete only. Reserved R196 0 ohm for EXT CLK GEN. X00-5
41 29,43,44 8/17/2007 EE Added ESD diode. Added D35,D36,D37,D38 X00-5
42 38 8/17/2007 EE Follow ATI SB700 checklist. Change C96,C208 from 0.01u to 0.1u to meet SB700 checklist. X00-5

43 8 8/20/2007 EE Change VGAH(V)SYNC to INT_VGAH(V)SYNC from PU to PD for disable side prot memry. Discrete only. Depop R497 and pop R500. X00-6
44 25 8/20/2007 EE It's no need to reserve 49.9 ohm and change R243,R235 from 47.5 to 0 ohm, depop R236 261/F. Remove 49.9 ohm, change R243,R235 from 47.5 to 0 ohm and depop R236. X00-6
45 25 8/20/2007 EE Follow FAE feedback. Added Decoupling caps for U16's VDDIO. Added Decoupling caps C685,C924~C930 and L93 for U16's VDDIO. X00-6
2 46 12,20 8/20/2007 EE Follow ATI FAE recommend. Set GPIO to turn on M82 +3.3V_DELAY. Discrete only. Connect GFX_RUN_ON from SB700 pin AC6 to R513. X00-6 2
47 12,14,18 8/20/2007 EE Follow ATI FAE recommend to change the M82 reset signal for power express. Discrete only. Added R458,R457,D39,D40,R205 for power express. X00-6
48 14 8/20/2007 EE Follow ATI FAE recommend. Change R421,R429 from 10k to 2.2k. X00-6
49 34 8/20/2007 EE Follow BCM FAE recommend to remove external RC termination. Remove (R690~R697 and C794~C797) X00-6
50 33 8/20/2007 EE Follow BCM recommend to add the required grounding for all the package signals and powertermination. Add U29 pin 69 thermal GND pad. X00-6

51 42 8/21/2007 EE Follow Card reader vendor recommend to add PU resistor for IRQ_SERIRQ. Add R267 10K ohm to pull-up +3.3V_RUN. X00-7
52 41 8/21/2007 EE There is no +3.3V_RTC_LDO power rail. Change the +3.3V_RTC_LDO to +3.3V_ALW. X00-7
53 21 8/21/2007 EE Added +1.8V_GFX power rail for M82-S power express Discrete only. Change the M82-S +1.8V_RUN to +1.8V_GFX and added +1.8V_GFX power switch. X00-7
54 51 8/21/2007 P Connect thermal pad to AGND Add pin15 to AGND X00-7

1 1
55 52 8/21/2007 P Preserve component for MAX8778 Add PC115 X00-7
56 54 8/21/2007 P Connect thermal pad to AGND Add pin15 to AGND X00-7

APPROVED BY : Cory Lin CHECKED BY: Cory Lin DRAWN BY : Leo Tseng DATE : Sep. 19 , 2007 SHEET 2 OF 11 COMPUTER
A B C D E
A B C D E
Change List
57 55 8/21/2007 P Change feedback resistor for 1.1V output Change PR66 to 63.4K X00-7
4 58 55 8/21/2007 P Change feedback resistor for +1.1V_GFX_PCIE output Change PR68 to 4.53K X00-7 4

59 12,35 8/22/2007 EE Change the PCI_PIRQD to PCI_PIRQB. ATI must use INTH#/GPIO36 to control M82-S reset signal. Change the PCI_PIRQD to PCI_PIRQB and move to U31.AC4 X00-8
60 12 8/22/2007 EE ATI use INTH#/GPIO36 (PE_GPIO0) to control M82-S reset signal. Added PE_GPIO0 on U31.AE3 to control M82-S reset. X00-8
61 48 8/22/2007 P Pin define is wrong. Change JABT1 pin define X00-8
62 48 8/22/2007 P Remove AC_OFF function Remove PQ24 X00-8
63 9 8/23/2007 EE Remove resistor for RX780. Remove R490,R42,R84,R32,R63,R112,R119,R131 for RX780. X00-8
64 22 8/23/2007 EE Added level shift on M82-S thermal IC SMBUS2. Discrete only. Added Q88,Q87 and remove R144,R137 0 ohm. X00-8
65 34 8/23/2007 EE Follow FM6 to modify the +3.3V_LAN power source form +3.3V_ALW to +3.3V_SUS. Depop +3.3V_ALW to +3.3V_LAN switch circuit and added R767 to connect +3.3V_SUS to +3.3V_LAN. X00-8
66 55 8/23/2007 EE We don't use RUNPWROK and use GFX_RUN_ON to turn on GFX power. Remove PR169. X00-8
3 3
67 12 8/23/2007 EE Follow ATI checklist. Reserved J13 for Rubuto. Added J13 for Rubuto system. X00-8
68 34 8/23/2007 EE Follow Dell. Change the LED signals. LINKLED connect to G_LED.SPD100LED connect to amber LED. X00-8

69 9 8/24/2007 EE Check the CLK GEN vendor (RT&CLG). They don't have PA_RS7X0A1 issue. Remove R29,R33,R37,R34 and connect to GPP_SB_REFCLK directly from CLK GEN SB_SRC CLK. X00-9
70 26 8/24/2007 EE Added OR gate to support backlight from EC and NB. Added U225,C932 and pop R464. X00-9
71 45 8/24/2007 EE Added AND gate in system reset circuit. Remove R204,R209 and added U226,U227. X00-9
72 31,32 8/24/2007 EE Change the audio to IDT STAC9228/92HD73C. Change the audio to IDT STAC9228/92HD73C. X00-9
73 25 8/24/2007 EE Follow RS780 check list to change the ferrite bead for CLK GEN power. Change the L34 ,L93 and added L107,L108 to FBM-11-160808-601A10T X00-9
74 11 8/24/2007 EE Follow RS780 check list. Added C997,C998 1U and change L15 from 4.7U to 1U. X00-9
75 22,26 8/28/2007 EE Added reduce WWAN interference solution. Added C1001~C1008, R835,R836. X00-10
76 42,43 8/28/2007 EE Chagne MEDIA_INT to active low. MEDIA_INT# need pull-up +3.3V_ALW. Move R217 to page 43, pull-up to +3.3V_ALW. Added RC to MEDIA_INT#. X00-10
77 44 8/28/2007 EE Chagne power switch and sniffer switch power rail. Chagne R461,R21 from +RTC_CELL to +3.3V_ALW. X00-10
78 42,53 8/28/2007 EE Chagne CPU_VCORE_PWRGD pull up power rail. Chagne PR35 from +3.3V_ALW to +3.3V_SUS and depop R574. X00-10
79 43 8/28/2007 EE Added the NUM, CAP low active circuit and swap keyboard signals. Added CP7 and Q80,Q82,Q81,Q83,R834,R832. X00-10
80 39 8/28/2007 EE Depop debug board's 0 ohm. Depop debug board's 0 ohm R322,R685,R720,R763,R764,R765,R766 X00-10
81 30 8/28/2007 EE ODD SATA is not need +3.3V_RUN. Remove +3.3V_RUN decoup caps for ODD SATA. Remove R745,R747,R307,R744,R313. X00-10
82 46 8/28/2007 P USB Charger Function Add +5V_ALW to +5V_SUS Load Switch for USB Charger X00-10
83 52 8/28/2007 P USB Charger Function Change +5V_ALW to +5V_ALW2 X00-10

1 1
84 52 8/28/2007 P USB Charger Function Change +5V_SUS to +5V_ALW X00-10
85 52 8/28/2007 P USB Charger Function Remove PR213 and PD1 X00-10

A B C D E
A B C D E
Change List
86 52 8/28/2007 P USB Charger Function Change +3.3V_DL to +5V_DL X00-10
4 87 51 8/28/2007 P FAE Suggest 237K for 300KHz frequency Change from 178K to 237K X00-10 4
88 54 8/28/2007 P FAE Suggest 237K for 300KHz frequency Change from 178K to 237K X00-10
89 49 8/28/2008 P FAE Suggest connect to GND Change to connect to GND X00-10
90 49 8/28/2008 EE Follow AMD recomment. Added buffer work around circuit to NB_PWRGD. Added U234 buffer to seperate NB_PWRGD and WD_PWRGD. X00-10

91 25 8/29/2008 EE Added MINI3CLK_REQ#,EXPRESSCARD_REQ# pull-up resistor. Added R837,R859 10k pull up to +3.3V_RUN. X00-11
92 9 8/29/2008 EE pop R495 and remove PANEL_BKEN from RS7800 pop R495 0 ohm and remove R806. X00-11
93 28,44 8/29/2008 EE Add ESD, Choke for Biometric and HDMI. Add ESD3 for Biometric and L109~L112 for HDMI. X00-11
94 24 8/29/2008 EE Follow AMD recomment. Change the voltage level for hybrid IC SEL pin. Change R89 from 0 ohm to 8.2k ohm. X00-11
95 10 8/30/2008 EE Add work around TPS72501 to create 1.35V to RS780 VDDHTTX power rail. RS780 Rev.A11 only. Used TPS72501 to create +1.35V_HT_VCC and added L113 for option. X00-11
3 3
96 9 8/30/2008 EE Added PD resistor 2.7k for INT_EN_LCDVDD. Added R863 2.7k for INT_EN_LCDVDD. X00-11
97 10 8/30/2008 EE Follow ATI checklist. Added L114 to reduce noise for VDDPCIE. Added L114 to VDD_PCIE. X00-11
98 46 8/30/2007 P For more suitable RDSON Change to SI4800BDY X00-11
99 48 8/30/2007 P Footprint is not correct Change to new footprint "BAT-200045MR009H577ZR-9P-R-V" X00-11
100 49 8/30/2007 P MPL104S-0R9 is not PSL Change to MPC1040LR88 X00-11
101 52 8/30/2007 P Reserve GPIO for USB Charger Add 5V_ALW_ON GPIO for USB charger enable X00-11
102 52 8/30/2007 P FAE suggest connect to +3.3V_DL Connect to +3.3V_DL X00-11
103 52 8/30/2007 P For Uni material Change to 0.1u/0603 X00-11
104 53 8/30/2007 P MPL73-3R3 is not PSL Change to MPLC0730L3R3 X00-11
2 105 53 8/30/2007 P FAE Suggest PR43=18K, PR42=100K Change to PR43=18K, PR42=100K X00-11 2
106 53 8/30/2007 P FAE Suggest PR198=16.2K, PR205=4.02K Change to PR198=16.2K, PR205=4.02K X00-11
107 53 8/30/2007 P FAE Suggest PR199=16.2K, PR200=4.02K Change to PR199=16.2K, PR200=4.02K X00-11
108 54 8/30/2007 P MPL73-4R7 is not PSL Change to MPLC0730L4R7 X00-11
109 54 8/30/2007 P For High=1.0, Low=0.9 Output Change PR207 to 20K/F X00-11
110 55 8/30/2007 P For High=1.0, Low=0.9 Output Change PR64 to 69.8K/F X00-11
111 56 8/30/2007 P For High=1.0, Low=0.9 Output Change PR66 to 22.6K/F X00-11

112 32 8/31/2007 EE Follow ME feedback. Used MIC connector in MB side. Pop J14 and remove M1 X00-12
113 19,20 8/31/2007 EE Follow ATI FAE. Reserved GFX thermal protect function. Added U241,Q98,Q99,R870,R871.R872 X00-12
1 1
114 53 9/1/2007 P FAE Suggest to remove sense resistor for saving space Remove PR179, PR180 X00-12
115 53 9/1/2007 P FAE Suggest to remove sense resistor for saving space Remove PR194, PR195 X00-12

APPROVED BY : Cory Lin CHECKED BY: Cory Lin DRAWN BY : Cory Lin DATE : Sep. 19 , 2007 SHEET 4 OF 11 COMPUTER
A B C D E
A B C D E
Change List
116 55 9/01/2008 P Change to hight rating mosfet for 9.4A Change to FDS8880_NL
4 117 55 9/01/2008 P Change to hight rating mosfet for 9.4A Change to FDS6676AS_NL 4
118 55 9/01/2008 P Change to hight rating mosfet for 9.4A Change to SIL104R-1R0
119 47 9/01/2008 P Cancel this function. It's no use. Remove PR74, PQ15
120 29 9/01/2008 EE Follow FAE feedback. Pull up resistor to +3.3V_SUS. Added R877 10k ohm to pull up +3.3V_SUS. X00-12
121 36 9/01/2008 EE Follow FAE feedback. Added C1032 270p_NC to SD_CD# Added C1032 270p_NC to CON5 pin 2 SD_CD#. X00-12
122 15 9/01/2008 EE Follow AMD feedback. Change SB700 VDD power rail from +1.2V_RUN to +1.2V_ALW_SUS. Added L90 and connect to +1.2V_ALW_SUS. Depop L39. X00-12
123 24 9/01/2008 EE Follow AMD feedback. Change R89 from 0 ohm to 8.2k ohm. Change R89 from 0 ohm to 8.2k ohm. X00-12
124 26 9/01/2008 EE Reserved caps for reduce SMBUS1 overshoot and under shoot. Reserved C1011,C1012 47p in J1 pin5,6 X00-12
125 52 9/03/2008 P Reserved for MAX8778 Add PR114 X00-12
126 55 9/03/2008 P Reserved snubber Add PR245, PC211 X00-12

3 3
127 42 9/03/2008 EE ITE 8512 FAE concern pin 126,pin 23,pin 4,pin 15 have leakage . Added D43~D46 to U13 pin 126, pin 23, pin 4, pin 15. X00-12
128 5 9/03/2008 EE Follow AMD feedback. Added 2 * MOSFET for CPU_PWRGD_SVID_REG level shift. Added Q100,R881and modify Q76 to gate by CPU_PWRGD. X00-12
Chagne from X00-12 to X00-13 X00-12
129 49,51,54 9/04/2008 P Dell suggest to add 0.1u cap near IC feedback pin to reduce feedback noise. Add 0.1u cap X00-13
130 51 9/04/2008 P FAE suggest to add PR460,PC451 and PQ115 for voltage shift function. Aadd PR460,PC451 and PQ115 for voltage shift function. X00-13
131 19 9/04/2008 EE Follow ATI feedback. Reserved R889 1M for Y2 27Mhz. X00-13
132 42 9/04/2008 EE Added D47 Added D47 to connect WRST# and THERM_STP# X00-13
133 33 9/04/2008 EE Reserved BCM5784M SUPER_IDDQ circuit. Reserved R888 20k ohm. X00-13
134 9,27 9/04/2008 EE Add RS780 CRT I2C function. Connect U13 pin E8,F8 to CRT DDC bus. X00-13
2 135 9,28 9/04/2008 EE Add RS780 HDMI I2C function. Connect U13 pin A8,B8 to HDMI DDC bus and Added level shift(R886,R887,Q101,Q102) X00-13 2

136 31 9/05/2008 EE Added 4 * 0 ohm for EMI. Added R898~R901 to JSPK1. X00-14
137 55 9/05/2008 EE Footprint is different with PL9 sepc. Change PL9 footprint to SIL104. X00-14
138 24 9/05/2008 EE ATI has update power express circuit. Added R890~R897and depop Q3~Q10. X00-14
139 13,39 9/05/2008 EE Added SB_USBP8 to WLAN. Added L115, R902, R903. X00-14
140 Chagne from X00-14 to X00-15 X00-15
141 43 9/06/2008 EE Added KB BACKLITE power switch circuit. Added Q104,Q103,C1033,C1034,R190,R907,R908,R909 to option +KB_LED power source. X00-15
142 43 9/06/2008 EE Added TP power rail and change LID_SW# power rail Added C385 and PU to +3.3V_SUS to JP2.5. Change R455 to +3.3V_ALW. X00-15
1
Chagne from X00-15 to X00-16 1
143 9 9/11/2008 EE There is on need pull-up resistor to work around for RS780 A11. Depop R416 X00-16
144 44 9/12/2008 EE There is not work in DC IN LED for SSI build. Depop Q16, Q17, R44, R45 X00-16

A B C D E
A B C D E
Change List
145 9 9/14/2007 EE Follow ATI FAE feedback. Change the RS780 strap pin. Depop R419 and pop R420. X00-16
1 9 10/01/2007 EE Follow ATI FAE feedback. Don't need LDT_STOP#, CPU_LDT_REQ# level shift. Depop the level shift Q52,Q3,R341,R39 and added R637, R638 0 ohm. X01-1
2 9 10/01/2007 EE Follow ATI FAE feedback. Change the RS780 debug strap pin. Added R639 3k ohm to PU +3.3V_RUN and depop the R349. X01-1
3 12 10/26/2007 EE Follow AMD SCL. Depop R694 1M ohm. X01-1
P1 52 10/30/2007 P ALW_PWRGD_3V_5V is dummy net Remove PR178,PR182 and change connect to +3.3V_ALW X01-1
P2 51 10/30/2007 P NB_VCORE will OVP when voltage switch Follow FAE suggestion to put PR178 and PR182 X01-1
P3 47,48 10/30/2007 P +5V_ALW issue when USB charger disabled in S5 Change +5V_ALW to +5V_ALW2 for below terminal PU6.8, PR115,PR22, PD4.1, PD5.1 X01-1
P4 47 10/30/2007 P To solve EE noise made by charger Change charger output Cap 10U/25V from X6S to X5R CAP (PN: CH6104K9207) X01-1
P5 51 10/30/2007 P Change capacitor to resistor for reserve pull low Change PC11 to PR214 X01-1
P6 54 10/30/2007 P 1.2V_ALW_SUS_ON is floating Add a resistor PR215 to pull low X01-1

3 3
P7 47,51,52 10/30/2007 P SI4810 EOL Issue Change PQ40,PQ2,PQ22,PQ26 to SI4812 X01-1
P8 51,54 10/30/2007 P To reduce Vo jitter issue Change PC57 and PC86 to 220u/2.5V/ESR15 X01-1
4 10 10/31/2007 EE RS780M change form A11 to A12 and don't need work around. Pop L54 and Depop L55,C488,U20,R381,R382,C491. X01-1
5 13,37,42 10/31/2007 EE Added Express card power enable on SB700. It's for Express card hot plug. Change U30.B8 from USB_OC5# to EXPRCRD_PWREN# and connect to CN2. X01-1
6 28 10/31/2007 EE Follow ANT HDMI detect circuit. Added Q80, and remove R336,D19 X01-1
7 32 10/31/2007 EE Added +3.6V_CAMERA Camera power circuit Added U43,C741,C743,C742,R640,R642.Remove C527. Modify JCAMERA1 pin define and L58 power rail. X01-1
8 38 10/31/2007 EE Added USB charge circuit for leakage. Added Q81,R643,U44,U45. X01-1
9 42 10/31/2007 EE Swap U5.31 NUM_LED# and U9.98 KB_BACKLITE_EN Swap U5.31 NUM_LED# and U5.98 KB_BACKLITE_EN X01-1
10 44 10/31/2007 EE Depop SNIFFER_YELLOW LED circuit. and Swap WIRELESS_ON/OFF#, SNIFFER_PWR_SW# circuit. Depop R377,Q55,Q54,R371 and Swap R376 SNIFFER_PWR_SW#, R313 WIRELESS_ON/OFF# signals X01-1
2 11 43 10/31/2007 EE Change KB_LED pwoer ciruit. Pop R507, Add Q82 and Depop R513,R512,Q71,Q70,C589,C579,R505 and modify J4 pin define. X01-1 2
12 9,45 10/31/2007 EE Depop SB700 A11 WD_PWRGD work around circuit. Depop U11,C222,R186 and pop R186,R344 X01-1
13 42 11/01/2007 EE Change GPIO and remove SNIFFER_YELLOW function. Move 5V_ALW_ON to U5.83, Move NUM_LED# to U5.88 and remove R377,Q55,Q54,R371 X01-1

14 5,12 11/01/2007 EE +5V_ALW issue when USB charger disabled in S5 Change R87,R306 from +5V_ALW to +5V_ALW2. X01-2
15 33,34 11/02/2007 EE Change BCM5787M to BCM5784M. Change BCM5787M to BCM5784M. X01-2
16 31 11/02/2007 EE Change STAC9228 to 92HD73C. Change STAC9228 to 92HD73C. X01-2
17 14 11/05/2007 EE Follow ATI SCL and feedback. Added R644 0 ohm connect U30.C6 TEMP_COMM to GND. X01-2
18 13,39 11/05/2007 EE Change WLAN from USB port 8 to USB port 4. Change WLAN from SB_USBP8+/- to SB_USBP4+/- and Move to U30.B12,U30.A12. X01-2
19 38 11/05/2007 EE Co-lay USB Q-switch and 0 ohm Reserved R645~R648 0 ohm with U44 pin 2,3,5,6,U45 pin 2,3,5,6. X01-2
1 1
P1 52 10/30/2007 P ALW_PWRGD_3V_5V is dummy net Remove PR178,PR182 and change connect to +3.3V_ALW X01-2
P2 51 10/30/2007 P NB_VCORE will OVP when voltage switch Follow FAE suggestion to put PR178 and PR182 X01-2

A B C D E
A B C D E
Change List
P3 47,48 10/30/2007 P +5V_ALW issue when USB charger disabled in S5 Change +5V_ALW to +5V_ALW2 for below terminal PU6.8, PR115,PR22, PD4.1, PD5.1 X01-2
4 P4 47 10/30/2007 P To solve EE noise made by charger Change charger output Cap 10U/25V from X6S to X5R CAP (PN: CH6104K9207) X01-2 4
P5 51 10/30/2007 P Change capacitor to resistor for reserve pull low Change PC11 to PR214 X01-2
P6 54 10/30/2007 P 1.2V_ALW_SUS_ON is floating Add a resistor PR215 to pull low X01-2
P7 47,51,52 10/30/2007 P SI4810 EOL Issue Change PQ40,PQ2,PQ22,PQ26 to SI4812 X01-2
P8 51,54 10/30/2007 P To reduce Vo jitter issue Change PC57 and PC86 to 220u/2.5V/ESR15 X01-2
P9 46 11/05/2007 P Modify +5V_SUS load switch Remove PQ12 X01-2
P10 53 11/05/2007 P FAE suggest to reserve Add PR241 X01-2
P11 54 11/05/2007 P Modify current limit value Change PR228 from 10K to 5.9K X01-2
P12 49,51,53,54,55 11/05/2007 P To solve power good glitch issue Connect IC power to +5V_ALW2 X01-2
P13 49 11/05/2007 P Set tracking discharge mode PR206 populate and PR208 NC X01-2
3 3
P14 52 11/05/2007 P 5V_ALW_ON pull low at initial state Add PR218 X01-2
P15 53 11/05/2007 P CPU_VCORE_ENABLE pull low at initial state Add PR219 X01-2
20 42,44,48 11/06/2007 EE Remove DC IN LED circuit and change signal name DCIN_DETECT_LED# to CHIPSET_ID1. Remove R37,Q10,Q9,R69 and change U5.99 signal name DCIN_DETECT_LED# to CHIPSET_ID1. X01-2
P16 51,54 11/06/2007 P For space saving. Remove PC2,PC81. X01-2
21 42 11/07/2007 EE Add BID1 to EC pin98 Connect R130,R131 to U5.98 X01-2
22 25,42 11/07/2007 EE Remove double pull-up resistor. Remove R107,RP2,R455 X01-2

23 5 11/09/2007 EE Solve glitch from CPU_PWRGD. Added C744 0.1uF on CPU_PWRGD. X01-3
24 14,42 11/09/2007 EE Solve S5 leakage. Connect L38 from +3.3V_ALW to +3.3V_SUS and remove R92 for SIO_SLP_S5#. X01-3
2 P17 49,51,54 11/12/2007 P Reserve for solving giltch issue caused by IC power rail Add PR220,PR221,PR222,PR223,PR224 X01-3 2
P18 51 11/12/2007 P Follow AMD FAE suggest +NB_VCORE dynamic voltage design Remove PQ7,PC13,PR19,PR12 X01-3
P19 54 11/12/2007 P To solve jitter issue Change PL2 from 4R7 to 3R3 X01-3
25 43 11/14/2007 EE Follow ANT reference to solve S3 leakage. Change R389,R99,R97,R90 pull-up from +1.8V_SUS to +1.8V_RUN. X01-3
26 12 11/15/2007 EE Solve CPU_PWRGD voltage too low(+1.5V). Change Q36 from MMBT3904 to FDV301N. X01-3
27 42 11/15/2007 EE Check with power team and EC. The charge IC INP pin can be read with EC ADC function. Pop R86 0 ohm and depop R91 0 ohm. X01-3
28 14,33,36,42 11/15/2007 EE Follow XTAL vendor feedback to change the XTAL caps. Change C139, C149 to 18pF. C394 to 27pF. C556 to 22pF, C658, C659 to 12pF X01-3
29 43 11/15/2007 EE Follow Dell recommend. Change R507 0 ohm to FS3. X01-3
30 31,32 11/16/2007 EE Follow IDT recommend to change caps for batter Audio Precision. Change C730, C724, C622, C620 from 1uF to 2.2uF. X01-3
31 5,12 11/16/2007 EE Follow ANT 3.2 reference schematic to remove CPU_PROCHOT# level shift. Remove R441, R436, Q65. X01-3
1 1

32 9 11/19/2007 EE Update RS780M symbol. Update U16 symbol. X01-4

A B C D E
A B C D E
Change List
P20 46 11/19/2007 P Reduce RUN/SUS PW switch circuit. Remove PR(89,93,197,200,170,168,68,66) and change PQ(34,51,49,20) to 2N7002W-7-F. X01-4
4 P21 46 11/19/2007 P Reduce RUN/SUS PW switch circuit. PC58,PC32,PC43,PC51,PC30,PC36,PC175 from 10U/1206 to 0.1U/0603 X01-4 4
33 44 11/19/2007 EE Sniffer should be during S5.Dell define our Sniffer switch need to stay 'ON' after the WiFi can be enable. change R313 to +3.3V_ALW. X01-4
34 14 11/19/2007 EE Follow AMD SB700 design guideline to add series resistor. Add R649, R650 4.99 ohm at U39 AD13,AE13 SATA_TX3+/- for ESATA signals. X01-4
35 14 11/20/2007 EE Depop Q-switch function on PT build. Depop Q81,R643,U44,U45 and pop R645~R648. X01-4
P22 47 11/20/2007 P UL schemaitc are going to be replaced by EC control UL schemaitc components are NC X01-4
P23 49 11/20/2007 P Reduce Jitter Change PC183 and PC184 from 330u/ESR15 to 220u/ESR25 X01-4
P24 52 11/20/2007 P PC168 is no use for schematic Remove PC168 X01-4
P25 53 11/20/2007 P To reduce input ripple Add PC190 and PC191 X01-4
P26 47,48 11/20/2007 P 2nd Source suggest to change Change PD8 to RB500V-40 , PQ4 to FDV301N X01-4
36 42 11/21/2007 EE Follow ITE feedback to reserve caps for ITE8512JX. Add C745, R651 to U9 pin 12. X01-4
3 3
37 38 11/21/2007 EE Change USB Q-switch power rail from +3.3V_RUN to +3.3V_SUS. Change U44 pin 8, U45 pin 8 from +3.3V_RUN to +3.3V_SUS, Q81 pin2 from RUN_ON to SUS_ON. X01-4
38 33,34 11/21/2007 EE Modify LAN 1000 LED circuit to solve BCM5784M LED issue. Add D36,R774 to solve BCM5784M 1000 LED issue. X01-4
39 28 11/22/2007 EE Change HDMI connector symbol. Change CN3 connector symbol. X01-4
40 28 11/22/2007 EE Remove these 20K ohm resistors because it is for desktop design or codec internal headphone amplifier. Depop R519, R521, R532, and R547. X01-4
41 38 11/22/2007 EE For EMI solution to pop choke. Pop L19,L20 and depop R78, R83,R85,R88. X01-4
42 50 11/23/2007 EE Base on RS780M T13 timing. +1.8V_RUN rise need before then +1.1V_RUN. Change PR62 from 0 ohm to 200k ohm and depop PC41 from 0.01u to 0.1u. X01-4
P27 53 11/24/2007 P EMI Solution Add PC168,PC192,PC193,PC197,PC198,PC199,PC194,PC195,PC196 X01-4
P28 48 11/24/2007 P For ESD protect EMI Suggestion PD6 populate X01-4
43 25 11/23/2007 EE EMI Solution EMI Suggestion C565, C575 populate X01-4
2 44 12 11/23/2007 EE EMI Solution EMI Suggestion C292 populate X01-4 2
45 32 11/23/2007 EE EMI Solution EMI Suggestion C573,C584,C595,C603 change form 220pF to 470pF. X01-4
46 32 11/23/2007 EE IDT had found out the resonance on portA and suggested change 220pF to 47pF for EMI. Change C621, C609 from 220pF to 47pF. X01-4

47 41 11/26/2007 EE BT1 connector pin define is different before. Change BT1 pin 2 to GND, pin 1 to +RTC. X01-5
48 42 11/26/2007 EE Sniffer power switch needs to wake up EC, when battery only. So it needs to use WUI pin. Swap U5.108 SNIFFER_PWR_SW# and U5.35 WIRELESS_ON/OFF# X01-5
49 36 11/26/2007 EE EMI Solution Add C758~C760 27pF for EMI solution. X01-5
P29 51 11/26/2007 P FAE suggest to reserve RC to slow down voltage switch add the R/C at PQ53 to slow down PQ53 switcher to against OVP, and remove R/C in front of PQ5 X01-5
P30 51,54 11/26/2007 P Got more performance for jitter issue Change PC97 and PC72 from 220u/2.5V/ESR15 to 220u/4V/ESR40 X01-5
50 32 11/26/2007 EE Follow FAE suggest. Change U9 pin 21~25 to NC. X01-5

1 1
51 38 11/26/2007 EE EMI Solution Populate ESD3 for EMI suggest. X01-5
52 5 11/26/2007 EE Solve system shut down issue from CPU_THERMTRIP#. Add Q83,Q84,R776,C761 and connect H_THERMTRIP# to 3V, 5V ALW circuit. X01-5

A B C D E
A B C D E
Change List
53 12 11/28/2007 EE Follow ANT 3.2 schematic. Depop R576, R574. X01-5
4 54 33 11/28/2007 EE Follow Broadcom FAE feedback. BCM5784M CLKREQ# can't work. Pop R434 ohm and depop R431 4.7k ohm before CLKREQ can work. X01-5 4

1 5 12/28/2007 EE Follow AMD Griffin sighting Dec 18.pdf to reserve resistor for system hang or shut downboot issue. Add R777,R778 and pop R121 300 ohm resistor for system hang or shut down issue. X02-1
2 43 1/2/2008 EE Change MMB pin 1 power source to 5V_ALW to fix LED flash issue when AC/Bat plug in. Change JP1.1 from +5V_ALW2 to +5V_ALW. X02-1
3 43 1/4/2008 EE Change Num, Cap power rail to +5V_RUN to fix Num, Cap LED flash issue when AC/Bat plug in. Change Q57~Q60, R380, R379 power rail to +5V_RUN. X02-1
4 38 1/10/2008 EE Fulfill Reliability team request. Connect JUSB1.8 to USB_BACK_PWR. X02-1
5 43 1/11/2008 EE Avoid system can enter S3 mode but wake up fail problem. Change the lid switch IC power source from 3.3V_SUS to 3.3V_ALW. X02-1
6 32 1/11/2008 EE Change L61 to 22 ohm. It will help DMIC_CLK_L performance. Change L61 to from 0 ohm to 22 ohm. X02-1
7 38 1/11/2008 EE Remove USB charge function. Remove R643, Q81, U44, U45, R645~R648. X02-1
8 38 1/14/2008 EE Follow AMD AN_SB700AB5. Added re-driver IC to increase signal stress for ESATA. Remove R649,R650 4.99 ohm. Added U50 3211B,R769~R784 0 ohm, C762~C765 0.1u, C766~C769 0.01u. X02-1
3 3
9 28 1/14/2008 EE Modify HDMI detect circuit. Added Q85,R785,R786. X02-1
10 42 1/14/2008 EE Change EC from ITE8512IX to ITE8512JX. The pin12 need connect to 0.1uF, 1uF. Change R651 to C770 0.1u, pop C745 1u for EC ITE8512 rev change. X02-1
11 12,14, 1/16/2008 EE Follow DELL recommand to void the PCICLK5 emission issue even AMD solved it in BIOS code Move R232 22 ohm and CLK_PCI_PCCARD signal form PCICLK5 to PCICLK1. X02-1
P1 47 1/21/2008 P Change to X6S material due to not support pulse charge Change PC105, PC99, PC96 and PC108 to X6S material X02-1
P2 51 1/21/2008 P Derating team suggest for WCETPA Change PR10 from 10K ohm to 11.8K ohm. X02-1
P3 52 1/21/2008 P Derating team suggest for WCETPA Change PR188 from 294K ohm to 340K ohm. X02-1
P4 54 1/21/2008 P Derating team suggest for WCETPA Change PR205 from 5.9K ohm to 7.5K ohm. X02-1

12 28 1/29/2008 EE DDC Capacitance over spec 50pf. We will add level shift circuit to reduce Capacitance. Change Q1, Q2 to FDV301N. It will reduce the DDC Capacitance. X02-2
2 13 15 1/29/2008 EE Follow AMD feedback.IDE and Flash Interface Not Implemented: Decoupling caps not used. Depop C258, C296, C298, C274, C295. X02-2 2
14 15 1/29/2008 EE Follow AMD SB700 checklist item 1-34, 1-35. Change L35 to BLM21PG221SN1D, C330 to 10U. X02-2
15 9, 13 1/29/2008 EE Follow AMD RS780M item 8-7, SB700 item 7-1, 7-2 checklist to reserve PD resistor. Reserve R787 4.7k ohm and R788, R789 10k ohm. X02-2
16 12 1/30/2008 EE Follow AMD SB700 checklist item 12-4 to depop RP34. Depop RP34 8.2k ohm. X02-2
17 9 1/30/2008 EE Follow AMD SB700 checklist item 24-17. Change PU resistor to 300 ohm. Change R344 4.7k to 300 ohm. X02-2
18 13 1/30/2008 EE Follow AMD SB700 checklist item 24-24. Depop PU resistor. Depop R264 10k ohm. X02-2
19 11 1/30/2008 EE Follow AMD checklist item 17-2, 17-4, 17-6. Depop termination resistors. Depop R343, RP22~RP32 47 ohm. X02-2
20 9 1/30/2008 EE Follow AMD checklist item 18-31. Depop PD resistors. Depop R338 100k ohm. X02-2
21 28 1/30/2008 EE Follow EMI suggest to pop comon mode choke for HDMI. Pop L1~L4 EXC24CG240Uand depop R6, R9, R11, R12, R14, R16, R18, R19 ohm. X02-2
22 28 1/30/2008 EE HDMI test Voltage level fail. Change R317, R321, R325, R326, R330~R333 to 715 ohm. X02-2
1 1
23 38 1/30/2008 EE Follow EMI suggest to pop comon mode choke for USB. Pop L19, L20 DLP11SN900HL2L. Depop R78, R83, R85, R88 0 ohm. X02-2
24 29 1/30/2008 EE OTP change to 85C.THERM_ALERT#_C and SYS_SHDN# leakage will affect OTP thermal limit. Change OTP resistor to 10k, 6.8k ohm. Add D35 to prevent leakage. X02-2

A B C D E
A B C D E
Change List
25 27 1/31/2008 EE Follow EMI suggest to pop caps for CRT. Pop C455, C462, C476 22pF and C456, C464, C478, C79, C72 10pF. X02-2
4 26 9,25 2/1/2008 EE Follow CLK Gen vendor feedback to solve EA fail. Change R146 to 43.2 ohm, R40 to 0 ohm, C50 to 49.9 ohm. X02-2 4
P5 53 2/1/2008 EE To solve transient response fail Change PC17~PC19, PC21, PC22, PC26. X02-2
27 27 2/1/2008 EE Follow AMD AN_RS780G1.pdf. DAC Output Imbalance. Change R48, R370 to 140 ohm. X02-2
28 42 2/12/2008 EE Use ITE8512 pin 22 detect SB_AZ_CODEC_RST# to mute speaker pop noise. Connect SB_AZ_CODEC_RST# and U5 pin 22. X02-2
29 5 2/12/2008 EE Follow ANT 4.1d. CPU_TEST23_TSTUPD need PD 300 ohm. PD R790 300 ohm for CPU_TEST23_TSTUPD. X02-2
30 43 2/12/2008 EE Add JP1 pin 10 to +3.3V_ALW, let +3.3V_ALW get lower drop voltage on MMB side. Add JP1 pin 10 to +3.3V_ALW. X02-2
P6 50,52 2/13/2008 P Change PU2, PU5 and PU8 VCC power rail to reduce S5 power consumption. Change PJP2.1 to +3.3V_SUS and add PR226~PR229 0 ohm. X02-2
31 38 2/22/2008 EE Pop ESATA re-driver for stress ESATA signals on formal build. Pop C726~C765, U50, depop R781~R784 and change C654, C655, C768, C769 to 0.01u. X02-2
32 31 2/22/2008 EE Dell recommend change caps for IDT AP test on formal build. Change C712, C713 to 6800pF. X02-2
3 3
Chagne from X02-2 to A00-1

1 42 3/14/2008 EE Chagne board ID for A00. Pop R129 and depop R128. A00-1
P1 53 3/14/2008 P Follow EMI suggest. Pop PC192, PC198, PC195 0.01u and PC193, PC196, PC199 0.1u. A00-1
2 31,32 3/14/2008 EE Need meet WLP4.0 : 1. Add 2.2K-ohm resistors to prevent amplifier clipping. Add R791~R794 2.2k ohm. A00-1
Need meet WLP4.0 : 2. Add 220PF capacitors to allow proper dynamic range measurent. Add C771, C772 220pF and pop C726, C727 to 220pF. A00-1
7~11,27,30,
3 38,45 3/17/2008 EE Follow Safety request. Change USB power control IC location same as FM6 location. Swap U7, U19 and U10, U16 location. U7 and U16 are 2062AD. Swap D33 and D18, R218 and R570 A00-1
4 38 3/18/2008 EE TI can't finish some necessary legal submission for new 2062AD. Change to old part 2062DR. Change U7, U16 to 2062DR (AL002062005). A00-1
15,49,50,51
5 ,52,55 3/18/2008 EE Remove Power Jump for QT build. Remove PJP1~PJP4, PJP6~PJP8, PJP10~PJP13, PJP15~PJP17 and short PJP9. A00-1
6 38 3/18/2008 EE Follow QSMC request to remove USB co-lay 0 ohm. Remove R78, R83, R85, R88 0 ohm. A00-1
2 7 38 3/18/2008 EE Change the USB Power Jump to short pad fp. Change PJP5, PJP14 fp to SHORT-10A. A00-1 2
8 42 3/19/2008 EE Follow IT8512JX glitch.doc FA report. Depop 1uF for ITE8512JX pin 12. Depop C745 1uF. A00-1
10 38 3/20/2008 EE Pericom request. Add 300ohm to reduce output swing, change AC caps to 2.2nF and set EQ to GND. Add R795 300 ohm. Chagne C95,C96,C654,C655,C766~C769 to 2.2nF and PD U50 pin1, pin10 to GND. A00-1
11 14, 43 3/20/2008 EE Follow Dell request. Add LED KB BK detect function. Add R796 100k ohm , PD R797 200k ohm to J4 pin2 and connect to U30 pin G6. A00-1
12 28 3/20/2008 EE Change to FDV301N will pass HDMI 7-12 HDMI detect test. Change Q80 from MM3904 to FDV301N. A00-1
13 59 3/26/2008 EE Follow EMI team request, add two EMI SPRING near sniffer switch area and HDMI connector. Add PV1 near SW1 and PV2 near CN3. A00-1
14 32 3/26/2008 EE Follow IDT request, change 220pF to 270pF will over 80db on DTM. Change C609, C621, C771, C772 from 220pF to 270pF. A00-1
15 36 3/27/2008 EE Follow EMI team request, add a 27p capacitor for 8 in 1 card reader. Pop C760 27pF for EMI. A00-1
P2 48 3/27/2008 EE Follow EMI team request, add two set of 1000pF, 0.01uF, 0.1uF on J8 +DCIN_JACK , -DCIN_JACK. Add PC200~PC202 on J8 +DCINI_JACK, PC203~PC205 on J8 -DCIN_JACK. A00-1
1 1
P3 49, 51 3/27/2008 EE Follow EMI team request, pop PR3, PC3 for NB_VCORE and pop PR213, PC188 for +1.8V_SUS pop PR3, PC3 for NB_VCORE and pop PR213, PC188 for +1.8V_SUS A00-1
16 5, 42 3/27/2008 EE Use BID1 to control CPU_PROCHOT#. When system need change state to P1 by HTC. Add Q86 2N7002W-7-F and remove R420 0 ohm for use BID1 to control CPU_PROCHOT#. A00-1
PROJECT : Hepburn DOC. NO. : 204 REV: A00 QUANTA

APPROVED BY : Cory Lin CHECKED BY: Cory Lin DRAWN BY : Leo Tseng DATE : Mar. 20 , 2008 SHEET 9 OF 11 COMPUTER
A B C D E
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Hepburn AMD UMA: VER: A00

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Hepburn AMD UMA: VER: A00

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Hepburn AMD UMA

Panel Connector HT_LINK

Size Document Number Rev

Date: Tuesday, June 03, 2008 Sheet 1 of 70

INDEX USB PORT# DESTINATION

16-17 DDRII SO-DIMM(200P)

40 WWAN PCI TABLE

S0 (Full ON) HIGH HIGH ON ON ON ON S0 ON ON ON

Size Document Number Rev

Date: Tuesday, June 03, 2008 Sheet 2 of 70

C481 C489 C490 C483 C486 C484 C487

Place close to socket

* If VLDT is connected only on one side,

+1.2V_RUN U24A +1.2V_RUN

D1 VLDT_A0 HT LINK VLDT_B0 AE2

7 HT_CADIN0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CADOUT0 7

7 HT_CLKIN0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CLKOUT0 7

7 HT_CTLIN0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CTLOUT0 7

Size Document Number Rev

Date: Wednesday, June 25, 2008 Sheet 3 of 70

Notes for the SODIMM locations:

To SODIMM socket A (Far/Bottom)

Size Document Number Rev

Date: Wednesday, June 25, 2008 Sheet 4 of 70

CPU_PWRGD_SVID_REG 2-Bit Boot VID Codes

300 Q14 LAYOUT: ROUTE VDDA TRACE APPROX. 2N7002W-7-F

+1.8V_RUN +2.5V_RUN +2.5V_CPU_VDDA_RUN U24D

25 CPU_CLK# C498 3900P

CPU_TEST23_TSTUPD R790 *300_NC

CPU_TEST24_SCANCLK1 R778 300

Date: Wednesday, June 25, 2008 Sheet 5 of 70

C103 C109 C115 C122 C123 C116 C104

C110 C505 C507 C515

Size Document Number Rev

Date: Wednesday, June 25, 2008 Sheet 6 of 70

3 HT_CADOUT0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_CADIN0 3

HYPER TRANSPORT CPU I/F

3 HT_CLKOUT0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_CLKIN0 3

3 HT_CTLOUT0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_CTLIN0 3

RS780M A13 Rev.A12

Size Document Number Rev

Date: Tuesday, June 03, 2008 Sheet 7 of 70

Place near RS780

PCIE I/F GFX

Size Document Number Rev

Date: Wednesday, June 25, 2008 Sheet 8 of 70

C R39 +LPVDD C441 C440 C

RX780/RS780 POWER DIFFERENCE TABLE

PIN NAME RX780 RS780

VDDG18 +1.8V +1.8V

VDDC +1.1V +1.1V

Size Document Number Rev

Date: Wednesday, June 25, 2008 Sheet 10 of 70

RX780/RS780 POWER DIFFERENCE TABLE

MEM_A2 RP26 4 3 *4P2R-47_NC C433 0.1U/10V +1.8V_MEM_VDDQ

MEM_BA0 RP30 4 3 *4P2R-47_NC

3528 X5R 10 R364 0.1U R358 MEM_A3 2 1 C454 0.1U/10V +1.8V_MEM_VDDQ

C420 + C425 C439 C445 C438 C452

Size Document Number Rev

Date: Wednesday, June 25, 2008 Sheet 11 of 70

PLACE THESE PCIE AC COUPLING

PCI EXPRESS INTERFACE

These are for 10K_NC 10K_NC 10K

2N7002W-7-F 10K 10K_NC 10K_NC C565 C575