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FM8 Hanks Intel Discrete GFX VER : 3A


PWA:W021J
A A

PWB:W018J
FAN & THERMAL POWER
Penryn SMSC1423
PG 39
REGULATOR CPU VR
POWER (478 Micro-FCPGA) +1.5V_RUN/+1.05V_VCCP
PG 51
SYSTEM PG 48
CLOCK DC/DC
RESET CIRCUIT PG 44 +3.3V_ALW/+5V_ALW/
SLG8SP513V REGULATOR
+15V_ALW PG 52
BATT (QFN-64) +1.8V_SUS/+1.25V_RUN
PG 3,4 PG 17 /+0.9V_DDR_VTT
AC/BATT CHARGER PG 46 PG 49 VGA Core
PG 50
CONNECTOR 1066 MHz FSB
RUN POWER SW
PG 54 +3.3V_SUS/+5V_SUS LVDS
+5V/+3.3V/+1.8V
Panel Connector
PG 53 PG 26
PCIEx16
CANTIGA ATI M92-XT
B
HDMI B

DDR2-SODIMM1 667/800 MHZ DDR II PCI EXPRESS GFX HDMI CONN.


1329 uFCBGA GDDR3 x 4 PG 26
PG 15,16 (256M 64bits)
PG 23 VGA
667/800 MHZ DDR II PG 18,19,20,21,22 CRT CONN.
DDR2-SODIMM2 PG 27
PG 5,6,7,8,9,10
PG 15,16 LAN
USB2.0 x 3
USB conn x 3 BCM5784M RJ45/Magnetics
SATA-ODD SATA PG 35
DMI interface PCIEx1 PG 43
PG 36 PG 42
PCIEx1
SATA-HDD SATA EXPRESS-CARD
USB2.0
PG 36 R5538
PG 30
ICH9-M PCIEx2
E-SATA Combo PI2EQX3211BHE SATA USB2.0 MINI-CARD
C with USB CONN PG 35 PG 35 PCIEx1 WLAN C
676 BGA PG 34
USB2.0
IHDA
USB2.0 MINI-CARD
AUDIO/AMP PG 11,12,13,14 WWAN
PG 33
92HD73C Camera + D-MIC
PG 41 LPC MINI-CARD
PG 40
WPAN
PG 33
Audio Audio KBC
SPK conn Jacks x3 ITE8512 1394
17X8 1394 CONN.
PG 40 PG 41 33MHz PCI 8-in-1 Card Reader PG 29
PG 31 Keyboard
R5C833
SPI PS/2 PG 37 Card Reader CONN.
PG 28 PG 30
D
USER D

INTERFACE FLASH Touchpad


PG 38 2Mbyts
QUANTA
PG 32 PG 37
Title
COMPUTER

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Schematic Block Diagram1

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 1 of 58


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Table of Contents Power States


CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
1 Schematic Block Diagram
2 Front Page +PWR_SRC 10V~+19V 4,26,32,34,46,48,49,50,51,52 MAIN POWER S0~S5
3-4 Penryn
+RTC_CELL +3.0V~+3.3V 11,14,31,32 RTC S0~S5
5-10 Cantiga
A 11-14 ICH9M +3.3V_ALW +3.3V 3,13,31,32,36,37,38,44,46,49,52,53,54 8051 POWER ALWON S0~S5 A

15-16 DDRII SO-DIMM(200P)


+5V_ALW2 +5V 38,48,49,52,53,54 LARGE POWER RUN_ON S0~S5
17 Clock Generator
18-23 M92-S2-XT +3.3V_LAN +3.3V 42,43 LAN POWER AUX_ON
24 BLANK PAGE
+5V_SUS +5V 14,35,36,38,50,51,52,53 SLP_S5# CTRLD POWER SUS_ON
25 BLANK PAGE
26 LCD CONN / HDMI CONN +3.3V_SUS +3.3V 3,11,12,13,14,20,26,30,38,43,48,50,51,53 SLP_S5# CTRLD POWER SUS_ON
27 CRT CONN
+1.8V_SUS +1.8V 6,8,9,15,48,49,50,53 SODIMM POWER SUS_ON
28 5C833/PCI
29 IEEE1394 +0.9V_DDR_VTT +0.9V 16,49,53 SODIMM POWER RUN_ON
30 Express/Card Reader
+5V_RUN +5V 14,20,26,27,36,37,39,40,41,53 SLP_S3# CTRLD POWER RUN_ON
31 SIO (ITE8512)
3,6,8,9,11,12,13,14,15,17,20,22,26,27,28,30
32 FLASH / RTC +3.3V_RUN +3.3V ,31,33,34,36,39,40,41,42,51,53 SLP_S3# CTRLD POWER RUN_ON
33 MINI-Card (WPAN, WWAN)
+1.8V_RUN +1.8V 19,20,21,22,23,38,53 SDVO POWER RUN_ON
34 MINI-Card (WLAN)
B 35 USB +1.5V_RUN +1.5V 4,9,14,30,31,33,34,48,53 CALISTOGA/ICH9 POWER RUN_ON B

36 SATA (HDD & CD_ROM)


+1.2V_LOM +1.25V 42 LOM POWER +3.3V_LAN
37 TP / KEYBOARD
38 SWITCH / /LED +1.1V_GFX_PCIE +1.1V 21,50 VGA POWER RUN_ON
39 FAN / THERMAL
+1.05V_VCCP +1.05V 3,4,5,6,8,9,11,14,48 CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON
40 Azelia CODEC
41 AUDIO CONN +VCC_CORE +0.7V~+1.77V 4,51 CPU CORE POWER IMVP_VR_ON
42 LAN (RTL8111B/8111C) LCDVCC_TST_EN
+LCDVCC +3.3V 26 LCD Power & ENVDD
43 LAN RJ-45 / TRANSFORM
44 System Reset Circuit +5V_MOD +5V 36 Module Power MODC_EN
45 Blank Page
+5V_HDD +5V 36 HDD Power HDDC_EN
46 Changer (MAX8731A)
47 Blank Page
48 1.05VCCP & 1.5VRUN
49 1.8VSUS & 0.9VTT
C C
50 VGA_M82
51 CPU_ISL6266 (2PHASE) GND PLANE PAGE DESCRIPTION
52 MAX8744 (+5V,3.3V)
GND_CHG
53 Run Power Switch 46
54 DCin & Batt GND_1.05V
47
55 PAD & SCREW
GND_VGA
56 EMI CAP 50
57 SMBUS BLOCK GND_SIGNAL
51
58 Power Block Diagram
AGND_DC/DC
52

GND ALL

D D

QUANTA
Title
COMPUTER

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Index & Power Status

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 2 of 58


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H_A#[3..16] U31A H_D#[0..63] U31B H_D#[0..63]


5 H_A#[3..16] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 5 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 5 D[1]# D[33]#

ADDR GROUP 0
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 5 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# 5 F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 5 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 5 D[6]# D[38]#

DATA GRP 0

DATA GRP 2
H_A#10 N3 +1.05V_VCCP H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# 5 Layout Note: K24 D[8]# D[40]# Y25
H_A#12 P2 Place R12 H_D#9 G24 W 22 H_D#41
A[12]# D[9]# D[41]#

CONTROL
H_A#13 L2 D20 H_IERR# R84 56 H_D#10 J24 Y23 H_D#42
A[13]# IERR# +1.05V_VCCP close to D[10]# D[42]#
H_A#14 P4 B3 H_D#11 J23 W 24 H_D#43
A
H_A#15 A[14]# INIT# H_INIT# 11 CPU. H_D#12 D[11]# D[43]# H_D#44 A
P1 R12 H22 W 25
H_A#16 A[15]# *51/F_NC H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 5 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
5 H_ADSTB#0 H_REQ#[0..4] ADSTB[0]# D[14]# D[46]#
C1 H_RESET# H_D#15 H23 AB25 H_D#47
5 H_REQ#[0..4] RESET# H_RESET# 5 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
H_REQ#1 REQ[0]# RS[0]# H_RS#0 5 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H2 REQ[1]# RS[1]# F4 H_RS#1 5 5 H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 5
H_REQ#2
H_REQ#3
K2
J3
REQ[2]# RS[2]# G3
G2
H_RS#2 5 11 5 H_DINV#0 H25 DINV[0]# DINV[2]# U22 H_DINV#2 5
REQ[3]# TRDY# H_TRDY# 5 H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AE24 H_D#48
5 H_A#[17..35] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
A[18]# D[18]# D[50]#

ADDR GROUP 1
H_A#19 R3 AD4 ITP_BPM#0 H_D#19 R23 AB22 H_D#51
A[19]# BPM[0]# PAD T1 D[19]# D[51]#
H_A#20 W6 AD3 ITP_BPM#1 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# PAD T2 D[20]# D[52]#

XDP/ITP SIGNALS
H_A#21 U4 AD1 ITP_BPM#2 Place voltage H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# PAD T3 D[21]# D[53]#

DATA GRP 1

DATA GRP 3
H_A#22 Y5 AC4 ITP_BPM#3 H_D#22 L22 AD20 H_D#54
A[22]# BPM[3]# PAD T6 divider within D[22]# D[54]#
H_A#23 U1 AC2 ITP_BPM#4 H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# ITP_BPM#5 PAD T4 0.5" of GTLREF H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK pin H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21
H_A#27 W2 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS +1.05V_VCCP H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# ITP_DBRESET# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 ITP_DBRESET# 13 T25 D[30]# D[62]# AF22
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# D[31]# D[63]#
W3 A[32]# 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#33 AA4 THERMAL R92 56 +1.05V_VCCP R86 M26 AF24
H_A#34 A[33]# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
AB2 1K/F N24 AC20
A[34]# 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
H_A#35 AA3 D21 H_PROCHOT#
A[35]# PROCHOT# PAD T17
B V1 A24 H_THERMDA V_CPU_GTLREF AD26 R26 COMP0 COMP0 B
5 H_ADSTB#1 ADSTB[1]# THERMDA H_THERMDC H_THERMDA 39 CPU_TEST1 GTLREF COMP[0] COMP1 COMP1
B25 R93 *1K/F_NC C23 MISC COMP[1] U26
THERMDC H_THERMDC 39 TEST1
A6 R87 *1K/F_NC CPU_TEST2 D25 AA1 COMP2 COMP2
11 H_A20M# A20M# TEST2 COMP[2]
ICH

A5 C7 H_THERM CPU_TEST3 C24 Y1 COMP3 COMP3


11 H_FERR# FERR# THERMTRIP# PAD T18 TEST3 COMP[3]
C4 R85 CPU_TEST4 AF26
11 H_IGNNE# IGNNE# PAD T8 TEST4
R35 56 +1.05V_VCCP 2K/F PAD T7 CPU_TEST5 AF1 E5
CPU_TEST6 TEST5 DPRSTP# H_DPRSTP# 6,11,51
11 H_STPCLK# D5 STPCLK# H CLK PAD T81 A26 TEST6 DPSLP# B5 H_DPSLP# 11
C6 CPU_TEST7 C3 D24
11 H_INTR LINT0 PAD T5 TEST7 DPW R# H_DPWR# 5
B4 A22 B22 D6 R22 R23 R90 R89
11 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 17 6,17 CPU_MCH_BSEL0 BSEL[0] PW RGOOD H_PWRGOOD 11
A3 A21 B23 D7 54.9/F 27.4/F 54.9/F 27.4/F
11 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 17 6,17 CPU_MCH_BSEL1 BSEL[1] SLP# H_CPUSLP# 5
6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 51
Quard Core Only
F6 D2 Penryn Ball-out Rev 1a
TP2 TDI_1/RSV RSVD[06] TP4
TP7 D3 TDO_2/RSV
Comp0,2 connect with
Zo=27.4ohm,Comp1,3 connect with
TP12 N5
M4
BMP_1#[0]/RSV Zo=55ohm, make those traces
TP8 BMP_1#[1]/RSV length shorter than 0.5".Trace
TP5 B2 BMP_1#[2]/RSV
AE8 H_THERMDA C543 H_THERMDC should be at least 25 mils away
TP11 BMP_1#[3]/VSS
D8 *2200P_NC 50
TP1 DCLKPH_1/VSS from any other toggling signal.
TP6 F8 ACLKPH_1/VSS
FSB BCLK BSEL2 BSEL1 BSEL0
TP15 D22 GTLREF_2/RSV
TP9 T2 THRMDA_1/RSV
533 133 0 0 1
V3 +1.05V_VCCP +3.3V_ALW
TP3 THRMDC_1/RSV
TP14 AA8 HFPLL_1/VSS
667 166 0 1 1
TP13 AC8 SPARE_1[4]/VSS Voltage Level shift
TP10 AA7 BR1#/VCC
800 200 0 1 0
R88 1066 266 0 0 0
Penryn Ball-out Rev 1a *2.2K_NC

2
C C
Q18

H_PROCHOT# 1 3 CPU_PROCHOT#

*2N7002W-7-F_NC
Populate ITP700Flex for bringup
+3.3V_RUN
H_THERMTRIP# 6,52

R28 3
+3.3V_SUS 10M Q6
ITP_DBRESET# R64 150 2 2N7002W-7-F
3

H_THERM 2
1

+1.05V_VCCP C24
ITP_BPM#5 R15 54.9/F Q7 0.1U
1

MMST3904-7-F 10
ITP_TDI R19 54.9/F

ITP_TDO R14 54.9/F

ITP_TMS R20 54.9/F ITP disable guidelines


Signal Resistor Value Connect To Resistor Placement
D Layout nopte: D
R11 54.9/F ITP_TCK TDI 150 ohm +/- 5% VTT Within 2.0" of the ITP
Place R10,R11,R14,R15,
R19,R20 close to CPU TMS 39 ohm +/- 5% VTT Within 2.0" of the ITP
R10 54.9/F ITP_TRST#
TRST# 680 ohm +/- 5% GND Within 2.0" of the ITP
QUANTA
TCK 27 ohm +/- 5% GND Within 2.0" of the ITP
Title
COMPUTER
TDO Open VTT Within 2.0" of the ITP Penryn Processor (HOST BUS)

ITP_EN R268 Depop +3VRUN Close to CK410M Pin8 Size Document Number Rev
FM8 2A

Date: Tuesday, November 25, 2008 Sheet 3 of 58

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+VCC_CORE +VCC_CORE U31D


U31C A4 P6
VSS[001] VSS[082]
A7 VCC[001] VCC[068] AB20 A8 VSS[002] VSS[083] P21
A9 VCC[002] VCC[069] AB7 A11 VSS[003] VSS[084] P24
+VCC_CORE All use 10U 4V(+-20%,X6S,0805)Pb-Free. A10 VCC[003] VCC[070] AC7 A14 VSS[004] VSS[085] R2
A12 VCC[004] VCC[071] AC9 A16 VSS[005] VSS[086] R5
A13 VCC[005] VCC[072] AC12 A19 VSS[006] VSS[087] R22
A15 VCC[006] VCC[073] AC13 A23 VSS[007] VSS[088] R25
C32 C47 C39 C33 C522 A17 AC15 AF2 T1
*10U_NC 10U 10U 10U 10U VCC[007] VCC[074] VSS[008] VSS[089]
A18 VCC[008] VCC[075] AC17 B6 VSS[009] VSS[090] T4
4 4 4 4 4 A20 AC18 B8 T23
A
805 805 805 805 805 VCC[009] VCC[076] VSS[010] VSS[091] A
B7 VCC[010] VCC[077] AD7 B11 VSS[011] VSS[092] T26
B9 VCC[011] VCC[078] AD9 B13 VSS[012] VSS[093] U3
B10 VCC[012] VCC[079] AD10 B16 VSS[013] VSS[094] U6
B12 VCC[013] VCC[080] AD12 B19 VSS[014] VSS[095] U21
+VCC_CORE B14 AD14 B21 U24
VCC[014] VCC[081] VSS[015] VSS[096]
B15 VCC[015] VCC[082] AD15 B24 VSS[016] VSS[097] V2
B17 VCC[016] VCC[083] AD17 C5 VSS[017] VSS[098] V5
B18 VCC[017] VCC[084] AD18 C8 VSS[018] VSS[099] V22
C54 C60 C64 C73 C29 B20 AE9 C11 V25
10U 10U *10U_NC 10U 10U VCC[018] VCC[085] VSS[019] VSS[100]
C9 VCC[019] VCC[086] AE10 C14 VSS[020] VSS[101] W1
4 4 4 4 4 C10 AE12 C16 W4
805 805 805 805 805 VCC[020] VCC[087] VSS[021] VSS[102]
C12 VCC[021] VCC[088] AE13 C19 VSS[022] VSS[103] W 23
C13 VCC[022] VCC[089] AE15 C2 VSS[023] VSS[104] W 26
C15 VCC[023] VCC[090] AE17 C22 VSS[024] VSS[105] Y3
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C25 VSS[025] VSS[106] Y6
C18 VCC[025] VCC[092] AE20 D1 VSS[026] VSS[107] Y21
D9 VCC[026] VCC[093] AF9 D4 VSS[027] VSS[108] Y24
+VCC_CORE D10 AF10 AA2
VCC[027] VCC[094] VSS[109]
D12 VCC[028] VCC[095] AF12 D11 VSS[029] VSS[110] AA5
D14 VCC[029] VCC[096] AF14 D13 VSS[030]
D15 VCC[030] VCC[097] AF15 D16 VSS[031] VSS[112] AA11
C66 C65 C61 C55 C521 D17 AF17 D19 AA14
10U *10U_NC 10U 10U *10U_NC VCC[031] VCC[098] VSS[032] VSS[113]
D18 VCC[032] VCC[099] AF18 D23 VSS[033] VSS[114] AA16
4 4 4 4 4 E7 AF20 +1.05V_VCCP D26 AA19
805 805 805 805 805 VCC[033] VCC[100] VSS[034] VSS[115]
E9 VCC[034] E3 VSS[035] VSS[116] AA22
E10 VCC[035] VCCP[01] G21 E6 VSS[036] VSS[117] AA25
E12 VCC[036] VCCP[02] V6 E8 VSS[037] VSS[118] AB1
E13 J6 C17 E11 AB4
+VCC_CORE VCC[037] VCCP[03] + 220U VSS[038] VSS[119]
E15 VCC[038] VCCP[04] K6 E14 VSS[039] VSS[120] AB8
B E17 M6 2.5 E16 AB11 B
VCC[039] VCCP[05] 7343 VSS[040] VSS[121]
E18 VCC[040] VCCP[06] J21 E19 VSS[041] VSS[122] AB13
E20 VCC[041] VCCP[07] K21 E21 VSS[042] VSS[123] AB16
C48 C40 C34 C31 C28 F7 M21 E24 AB19
10U 10U 10U *10U_NC 10U VCC[042] VCCP[08] VSS[043] VSS[124]
F9 VCC[043] VCCP[09] N21 F5 VSS[044] VSS[125] AB23
4 4 4 4 4 F10 N6 AB26
805 805 805 805 805 VCC[044] VCCP[10] VSS[126]
F12 VCC[045] VCCP[11] R21 F11 VSS[046] VSS[127] AC3
F14 R6 +1.5V_RUN F13 AC6
VCC[046] VCCP[12] VSS[047] VSS[128]
F15 VCC[047] VCCP[13] T21 F16 VSS[048]
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F19 VSS[049] VSS[130] AC11
F18 VCC[049] VCCP[15] V21 F2 VSS[050] VSS[131] AC14
F20 VCC[050] VCCP[16] W 21 F22 VSS[051] VSS[132] AC16
F25 VSS[052] VSS[133] AC19
+VCC_CORE AA9 B26 G4 AC21
VCC[052] VCCA[01] VSS[053] VSS[134]
AA10 VCC[053] VCCA[02] C26 G1 VSS[054] VSS[135] AC24
AA12 VCC[054] G23 VSS[055] VSS[136] AD2
AA13 VCC[055] VID[0] AD6 VID0 51 G26 VSS[056] VSS[137] AD5
C514 C509 C505 C503 C520 C517 AA15 AF5 C545 C547 H3 AD8
VCC[056] VID[1] VID1 51 VSS[057] VSS[138]
10U 10U *10U_NC 10U *10U_NC 10U AA17 AE5 0.01U 10U H6 AD11
VCC[057] VID[2] VID2 51 VSS[058] VSS[139]
4 4 4 4 4 4 AA18 AF4 25 4 H21 AD13
VCC[058] VID[3] VID3 51 VSS[059] VSS[140]
805 805 805 805 805 805 AA20 AE3 H24 AD16
VCC[059] VID[4] VID4 51 VSS[060] VSS[141]
AB9 VCC[060] VID[5] AF3 VID5 51 J2 VSS[061] VSS[142] AD19
AC10 VCC[061] VID[6] AE2 VID6 51 J5 VSS[062] VSS[143] AD22
6 inside cavity, north side, primary layer. AB10 VCC[062] J22 VSS[063] VSS[144] AD25
AB12 VCC[063]
Layout Note: J25 VSS[064] VSS[145] AE1
AB14 AF7 VCCSENSE Place C545 near PIN K1 AE4
VCC[064] VCCSENSE VCCSENSE 51 VSS[065] VSS[146]
+VCC_CORE AB15 K4
VCC[065] B26. VSS[066]
AB17 VCC[066] K23 VSS[067] VSS[148] AE11
AB18 AE7 VSSSENSE K26 AE14
VCC[067] VSSSENSE VSSSENSE 51 VSS[068] VSS[149]
C
L3 VSS[069] VSS[150] AE16 C
C504 C506 C508 C512 C516 C519 Penryn Ball-out Rev 1a L6 AE19
.
*10U_NC 10U 10U 10U 10U 10U VSS[070] VSS[151]
. L21 VSS[071] VSS[152] AE23
4 4 4 4 4 4 L24 AE26
805 805 805 805 805 805 +VCC_CORE VSS[072] VSS[153]
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
M22 VSS[075] VSS[156] AF8
6 inside cavity, south side, primary layer. M25 VSS[076] VSS[157] AF11
R30 N1 AF13
100/F VSS[077] VSS[158]
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
VCCSENSE P3 A25
+PWR_SRC VSSSENSE VSS[081] VSS[162]
39 29 VSS[163] AF25
+1.05V_VCCP Penryn Ball-out Rev 1a

R26
+ C525 + C501 + C502 + C538 100/F
*100U_NC *100U_NC 100U 100U
C51 C57 C58 C41 C42 C50 25 25 25 25
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
10 10 10 10 10 10
Route VCCSENSE and VSSSENSE
Layout Note: traces at 27.4ohms and
Layout out: Need to add 100uF cap on PWR_SRC for cap singing. length matched to within 25
Place these inside socket cavity on North side secondary. Place on PWR_SRC near +VCC_CORE. mil. Place PU and PD within
2 inch of CPU.
D D

QUANTA
Title
COMPUTER

https://Dr-Bios.com
Penryn Processor (HOST BUS)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 4 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U33A
H_A#[3..35] 3
A14 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G8 H_D#_1 H_A#_5 F16 A
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
H_D#4 G2 M16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H6 H_D#_5 H_A#_9 J13
H_D#6 H2 P16 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F6 H_D#_7 H_A#_11 R16
H_D#8 D4 N17 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H3 H_D#_9 H_A#_13 M13
H_D#10 M9 E17 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
M11 H_D#_11 H_A#_15 P17
H_D#12 J1 F17 H_A#16
H_D#13 H_D#_12 H_A#_16 H_A#17
J2 H_D#_13 H_A#_17 G20
H_D#14 N12 B19 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
J6 H_D#_15 H_A#_19 J16
H_D#16 P2 E20 H_A#20
H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H_D#_17 H_A#_21 H16
H_D#18 R2 J20 H_A#22
H_D#19 H_D#_18 H_A#_22 H_A#23
N9 H_D#_19 H_A#_23 L17
H_D#20 L6 A17 H_A#24
H_D#21 H_D#_20 H_A#_24 H_A#25
M5 H_D#_21 H_A#_25 B17
H_D#22 J3 L16 H_A#26
H_D#23 H_D#_22 H_A#_26 H_A#27
N2 H_D#_23 H_A#_27 C21
H_D#24 R1 J17 H_A#28
H_D#25 H_D#_24 H_A#_28 H_A#29
N5 H_D#_25 H_A#_29 H20
H_D#26 N6 B18 H_A#30
H_D#27 H_D#_26 H_A#_30 H_A#31
P13 H_D#_27 H_A#_31 K17
H_D#28 N8 B20 H_A#32
H_D#29 H_D#_28 H_A#_32 H_A#33
L7 H_D#_29 H_A#_33 F21
H_D#30 N10 K21 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B M3 H_D#_31 H_A#_35 L20 B
H_D#32 Y3
+1.05V_VCCP H_D#33 H_D#_32
AD14 H_D#_33 H_ADS# H12 H_ADS# 3
H_D#34 Y6 B16
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 Y10 G17
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
H_D#36 Y12 A9
H_D#_36 H_BNR# H_BNR# 3
1

HOST
H_D#37 Y14 F11
H_D#_37 H_BPRI# H_BPRI# 3
R441 H_D#38 Y7 G12
H_D#_38 H_BREQ# H_BR0# 3
221/F H_D#39 W2 E9
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AA8 B10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 Y9 AH7 CLK_MCH_BCLK 17
2

H_SWING H_D#42 H_D#_41 HPLL_CLK


AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# 17
H_D#43 AA9 J11
H_D#_43 H_DPW R# H_DPWR# 3
1

H_D#44 AA11 F9
H_D#_44 H_DRDY# H_DRDY# 3
2

R439 Layout Note: H_D#45 AD11 H_D#_45 H_HIT# H9 H_HIT# 3


100/F C554 0.1uF place close H_D#46 AD10 E12
H_D#_46 H_HITM# H_HITM# 3
0.1U/10V H_D#47 AD13 H11
to pin C5 H_LOCK# 3
1

H_D#48 H_D#_47 H_LOCK#


AE12 C9 H_TRDY# 3
2

H_D#49 H_D#_48 H_TRDY#


AE9 H_D#_49
H_D#50 AA2
H_D#51 H_D#_50
AD8 H_D#_51
H_D#52 AA3
H_D#53 H_D#_52
AD3 H_D#_53 H_DINV#_0 J8 H_DINV#0 3
H_D#54 AD7 L3
H_D#_54 H_DINV#_1 H_DINV#1 3
H_RCOMP H_D#55 AE14 Y13
H_D#_55 H_DINV#_2 H_DINV#2 3
H_D#56 AF3 Y1
H_D#_56 H_DINV#_3 H_DINV#3 3
1

H_D#57 AC1
R434 H_D#58 H_D#_57
AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0 3
24.9/F H_D#59 AC3 M7
H_D#_59 H_DSTBN#_1 H_DSTBN#1 3
H_D#60 AE11 AA5
C H_D#_60 H_DSTBN#_2 H_DSTBN#2 3 C
Layout Note: H_D#61 AE8 AE6 H_DSTBN#3 3
2

H_D#62 H_D#_61 H_DSTBN#_3


H_RCOMP trace should be AG2 H_D#_62
H_D#63 AD6 L9
10-mil wide with 20-mil H_D#_63 H_DSTBP#_0 H_DSTBP#0 3
H_DSTBP#_1 M8 H_DSTBP#1 3
spacing. AA6
H_DSTBP#_2 H_DSTBP#2 3
H_SWING C5 AE5
+1.05V_VCCP H_SW ING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP E3 H_RCOMP
H_REQ#_0 B15 H_REQ#0 3
H_REQ#_1 K13 H_REQ#1 3
2

H_REQ#_2 F13 H_REQ#2 3


R447 R142 0 B13
H_REQ#_3 H_REQ#3 3
1K/F 1 2 C12 B14
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E11 H_CPUSLP#
B6 H_RS#0 3
1

H_RS#_0
H_RS#_1 F12 H_RS#1 3
H_RS#_2 C8 H_RS#2 3
H_REF A11 H_AVREF
B11 H_DVREF
1
1

C571 CANTIGA_1p0
R448 0.1U/10V
2

2K/F
2

Layout Note:
Place the 0.1 uF
D
decoupling capacitor D
within 100 mils from
GMCH pins.
QUANTA
Title
COMPUTER

https://Dr-Bios.com
Cantiga (HOST)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 5 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U33B
+1.8V_SUS
M36
RSVD1
N36 AP24

CONTROL/COMPENSATION
RSVD2 SA_CK_0 M_CLK_DDR0 15
R33 AT21 M_CLK_DDR1 15
R180 RSVD3 SA_CK_1
T33 AV24 M_CLK_DDR3 15
1K/F RSVD4 SB_CK_0
AH9 AU20 M_CLK_DDR4 15
RSVD5 SB_CK_1
AH10
RSVD6 Layout Note:
SM_RCOMP_VOH AH12 AR24
AH13
RSVD7 SA_CK#_0
AR21
M_CLK_DDR#0 15
+1.8V_SUS U33C place R189 close to MCH, 500mil
RSVD8 SA_CK#_1 M_CLK_DDR#1 15
K12 AU24 M_CLK_DDR#3 15
C288 C301 RSVD9 SB_CK#_0 +VCC_PEG
AL34 AV20 M_CLK_DDR#4 15 PCIE_MTX_GRX_N[0..15] 18
RSVD10 SB_CK#_1

1
0.01U 2.2U R187 AK34
RSVD11 PCIE_MTX_GRX_P[0..15] 18
A 25 10 3.01K AN35 BC28 L32 R189 49.9/F A
RSVD12 SA_CKE_0 DDR_CKE0_DIMMA 15,16 L_BKLT_CTRL +VCC3G_PCIE_R
AM35 AY28 R161 G32 T37 1 2
RSVD13 SA_CKE_1 DDR_CKE1_DIMMA 15,16 L_BKLT_EN PEG_COMPI
T24 AY36 80.6/F M32 T36
SM_RCOMP_VOL RSVD14 SB_CKE_0 DDR_CKE3_DIMMB 15,16 L_CTRL_CLK PEG_COMPO
BB36

2
SB_CKE_1 DDR_CKE4_DIMMB 15,16

RSVD
B31 SMRCOMPP M33
RSVD15 SMRCOMPN L_CTRL_DATA PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N[0..15] 18
AJ6 BA17 DDR_CS0_DIMMA# 15,16 K33 H44
C290 C304 RSVD16 SA_CS#_0 L_DDC_CLK PEG_RX#_0 PCIE_MRX_GTX_N1
M1 AY16 DDR_CS1_DIMMA# 15,16 J33 J46
RSVD17 SA_CS#_1 L_DDC_DATA PEG_RX#_1

1
0.01U 2.2U R185 AV16 L44 PCIE_MRX_GTX_N2
SB_CS#_0 DDR_CS2_DIMMB# 15,16 PEG_RX#_2 PCIE_MRX_GTX_N3
25 10 1K/F AR13 L40
SB_CS#_1 DDR_CS3_DIMMB# 15,16 PEG_RX#_3 PCIE_MRX_GTX_N4
AY21 R166 M29 N41
RSVD20 80.6/F L_VDD_EN PEG_RX#_4 PCIE_MRX_GTX_N5
BD17 M_ODT0 15,16 C44 P48
SA_ODT_0 LVDS_IBG PEG_RX#_5 PCIE_MRX_GTX_N6
AY17 B43 N44

2
SA_ODT_1 M_ODT1 15,16 LVDS_VBG PEG_RX#_6 PCIE_MRX_GTX_N7
A47 BF15 M_ODT2 15,16 E37 T43
RSVD21 SB_ODT_0 +1.8V_SUS LVDS_VREFH PEG_RX#_7 PCIE_MRX_GTX_N8
BG23 AY13 M_ODT3 15,16 E38 U43
RSVD22 SB_ODT_1 LVDS_VREFL PEG_RX#_8

LVDS
BF23 C41 Y43 PCIE_MRX_GTX_N9
RSVD23 SMRCOMPP LVDSA_CLK# PEG_RX#_9 PCIE_MRX_GTX_N10
BH18 BG22 C40 Y48
RSVD24 SM_RCOMP SMRCOMPN LVDSA_CLK PEG_RX#_10 PCIE_MRX_GTX_N11
BF18 BH21 B37 Y36
RSVD25 SM_RCOMP# LVDSB_CLK# PEG_RX#_11 PCIE_MRX_GTX_N12
A37 AA43
+3.3V_RUN SM_RCOMP_VOH R206 LVDSB_CLK PEG_RX#_12 PCIE_MRX_GTX_N13
BF28 AD37
SM_RCOMP_VOH SM_RCOMP_VOL PEG_RX#_13 PCIE_MRX_GTX_N14

DDR
BH28 *1K/F_NC H47 AC47
R186 10K PM_EXTTS#0 SM_RCOMP_VOL LVDSA_DATA#_0 PEG_RX#_14 PCIE_MRX_GTX_N15
E46 AD39
PM_EXTTS#1 LVDSA_DATA#_1 PEG_RX#_15
R178 10K AV42 V_DDR_MCH_REF_L R207 1 2 0 V_DDR_MCH_REF G40 PCIE_MRX_GTX_P[0..15] 18
SM_VREF LVDSA_DATA#_2

GRAPHICS
AR36 R188 0 A40 H43 PCIE_MRX_GTX_P0
SM_PWROK LVDSA_DATA#_3 PEG_RX_0 PCIE_MRX_GTX_P1
BF17 2 1 J44
SM_REXT R152 499/F PEG_RX_1 PCIE_MRX_GTX_P2
BC36 H48 L43
+1.05V_VCCP SM_DRAMRST# R205 LVDSA_DATA_0 PEG_RX_2 PCIE_MRX_GTX_P3
D45 L41
*1K/F_NC LVDSA_DATA_1 PEG_RX_3 PCIE_MRX_GTX_P4
B38 F40 N40
R144 56 THERMTRIP_MCH# DPLL_REF_CLK LVDSA_DATA_2 PEG_RX_4 PCIE_MRX_GTX_P5
A38 B40 P47
DPLL_REF_CLK# LVDSA_DATA_3 PEG_RX_5 PCIE_MRX_GTX_P6
E41 N43

CLK
DPLL_REF_SSCLK PEG_RX_6 PCIE_MRX_GTX_P7
F41 A41 T42
DPLL_REF_SSCLK# LVDSB_DATA#_0 PEG_RX_7 PCIE_MRX_GTX_P8
H38 U42
LVDSB_DATA#_1 PEG_RX_8 PCIE_MRX_GTX_P9
F43 CLK_MCH_3GPLL 17 G37 Y42
PEG_CLK LVDSB_DATA#_2 PEG_RX_9 PCIE_MRX_GTX_P10
E43 CLK_MCH_3GPLL# 17 J37 W47
PEG_CLK# LVDSB_DATA#_3 PEG_RX_10 PCIE_MRX_GTX_P11
Y37
PEG_RX_11 PCIE_MRX_GTX_P12
B42 AA42
B LVDSB_DATA_0 PEG_RX_12 PCIE_MRX_GTX_P13 B
G38 AD36
LVDSB_DATA_1 PEG_RX_13 PCIE_MRX_GTX_P14
Layout Note: AE41 F37 AC48

PCI-EXPRESS
DMI_RXN_0 DMI_MRX_ITX_N0 12 LVDSB_DATA_2 PEG_RX_14 PCIE_MRX_GTX_P15
Location of all MCH_CFG strap AE37 DMI_MRX_ITX_N1 12 K37 AD40
DMI_RXN_1 LVDSB_DATA_3 PEG_RX_15
AE47 DMI_MRX_ITX_N2 12
resistors needs to be close to DMI_RXN_2 PCIE_MTX_GRX_C_N0 C626 0.1U PCIE_MTX_GRX_N0
AH39 DMI_MRX_ITX_N3 12 J41
minmize stub. DMI_RXN_3 PEG_TX#_0 PCIE_MTX_GRX_C_N1 C636 0.1U PCIE_MTX_GRX_N1
M46
PEG_TX#_1 PCIE_MTX_GRX_C_N2 C643 0.1U PCIE_MTX_GRX_N2
AE40 DMI_MRX_ITX_P0 12 F25 M47
DMI_RXP_0 TVA_DAC PEG_TX#_2 PCIE_MTX_GRX_C_N3 C622 0.1U PCIE_MTX_GRX_N3
3,17 CPU_MCH_BSEL0 T25 AE38 DMI_MRX_ITX_P1 12 H25 M40
CFG_0 DMI_RXP_1 TVB_DAC PEG_TX#_3 PCIE_MTX_GRX_C_N4 C610 0.1U PCIE_MTX_GRX_N4
3,17 CPU_MCH_BSEL1 R25 AE48 DMI_MRX_ITX_P2 12 K25 M42
CFG_1 DMI_RXP_2 TVC_DAC PEG_TX#_4

TV
P25 AH40 +1.05V_VCCP R48 PCIE_MTX_GRX_C_N5 C624 0.1U PCIE_MTX_GRX_N5
3,17 CPU_MCH_BSEL2 CFG3 CFG_2 DMI_RXP_3 DMI_MRX_ITX_P3 12 PEG_TX#_5 PCIE_MTX_GRX_C_N6 PCIE_MTX_GRX_N6
PAD T30 P20 H24 N38 C615 0.1U
CFG4 CFG_3 TV_RTN PEG_TX#_6 PCIE_MTX_GRX_C_N7 C648 0.1U PCIE_MTX_GRX_N7
PAD T39 P24 AE35 DMI_MTX_IRX_N0 12 Non-iAMT T40
CFG_4 DMI_TXN_0 PEG_TX#_7
R167 2 1 *2.21K/F_NCCFG5 C25 AE43 DMI_MTX_IRX_N1 12 U37 PCIE_MTX_GRX_C_N8 C653 0.1U PCIE_MTX_GRX_N8
CFG6 CFG_5 DMI_TXN_1 PEG_TX#_8 PCIE_MTX_GRX_C_N9 C666 0.1U PCIE_MTX_GRX_N9
PAD T41 N24 AE46 DMI_MTX_IRX_N2 12 U40
CFG7 CFG_6 DMI_TXN_2 R183 PEG_TX#_9 PCIE_MTX_GRX_C_N10 C667 0.1U PCIE_MTX_GRX_N10
DMI

PAD T37 M24 AH42 DMI_MTX_IRX_N3 12 C31 Y40


CFG8 CFG_7 DMI_TXN_3 1K/F TV_DCONSEL_0 PEG_TX#_10 PCIE_MTX_GRX_C_N11 C686 0.1U PCIE_MTX_GRX_N11
PAD T36 E21 E32 AA46
CFG_8 TV_DCONSEL_1 PEG_TX#_11
CFG

R158 2 1 *2.21K/F_NCCFG9 C23 AD35 DMI_MTX_IRX_P0 12 AA37 PCIE_MTX_GRX_C_N12 C685 0.1U PCIE_MTX_GRX_N12
CFG10 CFG_9 DMI_TXP_0 MCH_CLVREF PEG_TX#_12 PCIE_MTX_GRX_C_N13 C682 0.1U PCIE_MTX_GRX_N13
PAD T38 C24 AE44 DMI_MTX_IRX_P1 12 AA40
CFG11 CFG_10 DMI_TXP_1 PEG_TX#_13 PCIE_MTX_GRX_C_N14 C695 0.1U PCIE_MTX_GRX_N14
PAD T33 N21 AF46 DMI_MTX_IRX_P2 12 AD43
CFG_11 DMI_TXP_2 PEG_TX#_14

1
T34 CFG12 P21 AH43 AC46 PCIE_MTX_GRX_C_N15 C696 0.1U PCIE_MTX_GRX_N15
PAD CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 12 PEG_TX#_15
T35 CFG13 T21 R184
PAD CFG_13
T32 CFG14 R20 C310 499/F E28 J42 PCIE_MTX_GRX_C_P0 C628 0.1U PCIE_MTX_GRX_P0
PAD CFG_14 CRT_BLUE PEG_TX_0
T31 CFG15 M20 0.1U L46 PCIE_MTX_GRX_C_P1 C630 0.1U PCIE_MTX_GRX_P1
PAD CFG_15 PEG_TX_1
R160 2 1 *2.21K/F_NCCFG16 L21 G28 M48 PCIE_MTX_GRX_C_P2 C639 0.1U PCIE_MTX_GRX_P2

2
CFG_16 CRT_GREEN PEG_TX_2
GRAPHICS VID

+3.3V_RUN CFG17 H21 M39 PCIE_MTX_GRX_C_P3 C619 0.1U PCIE_MTX_GRX_P3


PAD T40 CFG_17 PEG_TX_3
T42 CFG18 P29 J28 M43 PCIE_MTX_GRX_C_P4 C609 0.1U PCIE_MTX_GRX_P4
PAD CFG_18 CRT_RED PEG_TX_4

VGA
R173 *4.02K_NC CFG19 R28 R47 PCIE_MTX_GRX_C_P5 C625 0.1U PCIE_MTX_GRX_P5
R170 *4.02K_NC CFG20 CFG_19 PEG_TX_5 PCIE_MTX_GRX_C_P6 C613 0.1U PCIE_MTX_GRX_P6
T28 B33 T91 PAD G29 N37
CFG_20 GFX_VID_0 CRT_IRTN PEG_TX_6 PCIE_MTX_GRX_C_P7 C645 0.1U PCIE_MTX_GRX_P7
GFX_VID_1
B32 T90 PAD CL_VREF~=0.35V PEG_TX_7
T39
G33 H32 U36 PCIE_MTX_GRX_C_P8 C649 0.1U PCIE_MTX_GRX_P8
GFX_VID_2 T44 PAD CRT_DDC_CLK PEG_TX_8
F33 J32 U39 PCIE_MTX_GRX_C_P9 C658 0.1U PCIE_MTX_GRX_P9
GFX_VID_3 T46 PAD CRT_DDC_DATA PEG_TX_9
R29 E33 J29 Y39 PCIE_MTX_GRX_C_P10 C672 0.1U PCIE_MTX_GRX_P10
13 PM_BMBUSY# PM_SYNC# GFX_VID_4 T43 PAD CRT_HSYNC PEG_TX_10
B7 E29 Y46 PCIE_MTX_GRX_C_P11 C678 0.1U PCIE_MTX_GRX_P11
3,11,51 H_DPRSTP# PM_EXTTS#0 PM_DPRSTP# CRT_TVO_IREF PEG_TX_11 PCIE_MTX_GRX_C_P12 C677 0.1U PCIE_MTX_GRX_P12
N33 L29 AA36
15 PM_EXTTS#0 PM_EXTTS#1 PM_EXT_TS#_0 CRT_VSYNC PEG_TX_12 PCIE_MTX_GRX_C_P13 C691 0.1U PCIE_MTX_GRX_P13
C P32 AA39 C
15 PM_EXTTS#1 PM_EXT_TS#_1 PEG_TX_13
PM

AT40 C34 AD42 PCIE_MTX_GRX_C_P14 C688 0.1U PCIE_MTX_GRX_P14


13,44 ICH_PWRGD PWROK GFX_VR_EN T45 PAD PEG_TX_14
PLTRST#_R AT11 AD46 PCIE_MTX_GRX_C_P15 C701 0.1U PCIE_MTX_GRX_P15
R154 *0_NC THERMTRIP_MCH# T20 RSTIN# PEG_TX_15
3,52 H_THERMTRIP# THERMTRIP#
R32
13,51 DPRSLPVR DPRSLPVR CANTIGA_1p0
AH37 CL_CLK0 13
CL_CLK
AH36 CL_DATA0 13
CL_DATA
T97 BG48 AN36
ME

PAD NC_1 CL_PWROK ICH_CL_PWROK 13,31


PAD T99 BF48 AJ35 ICH_CL_RST0# 13
NC_2 CL_RST#
PAD T100 BD48 AH34
NC_3 CL_VREF MCH_CLVREF
PAD T101 BC48
NC_4
PAD T96 BH47
NC_5
PAD T48 BG47
NC_6
PAD T98 BE47 N28
NC_7 DDPC_CTRLCLK
PAD T95 BH46 M28
NC_8 DDPC_CTRLDATA
PAD T47 BF46 G36
NC_9 SDVO_CTRLCLK
NC

PAD T94 BG45 E36


NC_10 SDVO_CTRLDATA
PAD T93 BH44 K36 CLK_3GPLLREQ# 17
NC_11 CLKREQ#
MISC

PAD T92 BH43 H36 MCH_ICH_SYNC# 13


NC_12 ICH_SYNC#
PAD T88 BH6
NC_13
PAD T87 BH5
NC_14 R136 56
PAD T85 BG4 B12 +1.05V_VCCP
NC_15 TSATN
PAD T84 BH3
NC_16
BF3
NC_17
BH2
NC_18
BG2 B28
NC_19 HDA_BCLK
BE2 B30
NC_20 HDA_RST#
BG1 B29
HDA

NC_21 HDA_SDI
BF1
NC_22 HDA_SDO
C29 Low=DMIx2
BD1
NC_23 HDA_SYNC
A28 CFG5 DMI X2 Select High=DMIx4(Default)
BC1
NC_24
F1
NC_25
PCI Express Low= Reveise Lane
CFG9 Graphic Lane High=Normal operation
D D
CANTIGA_1p0 FSB Dynamic Low=Dynamic ODT Disable
CFG16 ODT High=Dynamic ODT Enable(default).

SDVO/PCIE
Low=Only SDVO or PCIEx1 is
operational (defaults)
QUANTA
12 SB_NB_PCIE_RST#
CFG20
R126 *0_NC

PLTRST#_R
Concurrent
Operation
High=SDVO and PCIEx1 are operating
simultaneously via PEG port Title
COMPUTER
12,18,30,31,33,34,42 PLTRST# R127 0 R134 100 Cantiga (HOST)
Low=No SDVO Device Present
(default) Size Document Number Rev
SDVO_CRTL_DATA SDVO Present. High=SDVO Device Present FM8 2A

Date: Tuesday, November 25, 2008 Sheet 6 of 58


1 2 3 4 5 6 7 8

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1 2 3 4 5 6 7 8

15 DDR_A_D[0..63] 15 DDR_B_D[0..63]
U33D U33E
DDR_A_D0 AJ38 BD21 DDR_A_BS0 DDR_B_D0 AK47 BC16 DDR_B_BS0
SA_DQ_0 SA_BS_0 DDR_A_BS0 15,16 SB_DQ_0 SB_BS_0 DDR_B_BS0 15,16
DDR_A_D1 AJ41 BG18 DDR_A_BS1 DDR_B_D1 AH46 BB17 DDR_B_BS1
SA_DQ_1 SA_BS_1 DDR_A_BS1 15,16 SB_DQ_1 SB_BS_1 DDR_B_BS1 15,16
DDR_A_D2 AN38 AT25 DDR_A_BS2 DDR_B_D2 AP47 BB33 DDR_B_BS2
A SA_DQ_2 SA_BS_2 DDR_A_BS2 15,16 SB_DQ_2 SB_BS_2 DDR_B_BS2 15,16 A
DDR_A_D3 AM38 DDR_B_D3 AP46
DDR_A_D4 SA_DQ_3 DDR_A_RAS# DDR_B_D4 SB_DQ_3
AJ36 SA_DQ_4 SA_RAS# BB20 DDR_A_RAS# 15,16 AJ46 SB_DQ_4
DDR_A_D5 AJ40 BD20 DDR_A_CAS# DDR_B_D5 AJ48 AU17 DDR_B_RAS#
SA_DQ_5 SA_CAS# DDR_A_CAS# 15,16 SB_DQ_5 SB_RAS# DDR_B_RAS# 15,16
DDR_A_D6 AM44 AY20 DDR_A_WE# DDR_B_D6 AM48 BG16 DDR_B_CAS#
SA_DQ_6 SA_W E# DDR_A_WE# 15,16 SB_DQ_6 SB_CAS# DDR_B_CAS# 15,16
DDR_A_D7 AM42 DDR_B_D7 AP48 BF14 DDR_B_WE#
SA_DQ_7 SB_DQ_7 SB_W E# DDR_B_WE# 15,16
DDR_A_D8 AN43 DDR_B_D8 AU47
DDR_A_D9 SA_DQ_8 DDR_B_D9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
DDR_A_D10 AU40 DDR_B_D10 BA48
SA_DQ_10 DDR_A_DM[0..7] 15 SB_DQ_10
DDR_A_D11 AT38 AM37 DDR_A_DM0 DDR_B_D11 AY48
SA_DQ_11 SA_DM_0 SB_DQ_11 DDR_B_DM[0..7] 15
DDR_A_D12 AN41 AT41 DDR_A_DM1 DDR_B_D12 AT47 AM47 DDR_B_DM0
DDR_A_D13 SA_DQ_12 SA_DM_1 DDR_A_DM2 DDR_B_D13 SB_DQ_12 SB_DM_0 DDR_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
DDR_A_D14 AU44 AU39 DDR_A_DM3 DDR_B_D14 BA47 BD40 DDR_B_DM2
DDR_A_D15 SA_DQ_14 SA_DM_3 DDR_A_DM4 DDR_B_D15 SB_DQ_14 SB_DM_2 DDR_B_DM3
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
DDR_A_D16 AV39 AY6 DDR_A_DM5 DDR_B_D16 BC46 BG11 DDR_B_DM4
SA_DQ_16 SA_DM_5 SB_DQ_16 SB_DM_4

A
DDR_A_D17 AY44 AT7 DDR_A_DM6 DDR_B_D17 BC44 BA3 DDR_B_DM5

B
DDR_A_D18 SA_DQ_17 SA_DM_6 DDR_A_DM7 DDR_B_D18 SB_DQ_17 SB_DM_5 DDR_B_DM6
BA40 SA_DQ_18 SA_DM_7 AJ5 BG43 SB_DQ_18 SB_DM_6 AP1
DDR_A_D19 BD43 DDR_B_D19 BF43 AK2 DDR_B_DM7
SA_DQ_19 DDR_A_DQS[0..7] 15 SB_DQ_19 SB_DM_7
DDR_A_D20 AV41 AJ44 DDR_A_DQS0 DDR_B_D20 BE45
SA_DQ_20 SA_DQS_0 SB_DQ_20 DDR_B_DQS[0..7] 15
DDR_A_D21 AY43 AT44 DDR_A_DQS1 DDR_B_D21 BC41 AL47 DDR_B_DQS0
SA_DQ_21 SA_DQS_1 SB_DQ_21 SB_DQS_0

MEMORY
DDR_A_D22 BB41 BA43 DDR_A_DQS2 DDR_B_D22 BF40 AV48 DDR_B_DQS1

MEMORY
DDR_A_D23 SA_DQ_22 SA_DQS_2 DDR_A_DQS3 DDR_B_D23 SB_DQ_22 SB_DQS_1 DDR_B_DQS2
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
DDR_A_D24 AY37 AW 12 DDR_A_DQS4 DDR_B_D24 BG38 BG37 DDR_B_DQS3
DDR_A_D25 SA_DQ_24 SA_DQS_4 DDR_A_DQS5 DDR_B_D25 SB_DQ_24 SB_DQS_3 DDR_B_DQS4
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
DDR_A_D26 AV37 AU8 DDR_A_DQS6 DDR_B_D26 BH35 BB2 DDR_B_DQS5
DDR_A_D27 SA_DQ_26 SA_DQS_6 DDR_A_DQS7 DDR_B_D27 SB_DQ_26 SB_DQS_5 DDR_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 DDR_A_DQS#[0..7] 15 BG35 SB_DQ_27 SB_DQS_6 AU1
DDR_A_D28 AY38 AJ43 DDR_A_DQS#0 DDR_B_D28 BH40 AN6 DDR_B_DQS7
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 DDR_B_DQS#[0..7] 15
DDR_A_D29 BB38 AT43 DDR_A_DQS#1 DDR_B_D29 BG39 AL46 DDR_B_DQS#0
DDR_A_D30 SA_DQ_29 SA_DQS#_1 DDR_A_DQS#2 DDR_B_D30 SB_DQ_29 SB_DQS#_0 DDR_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
DDR_A_D31 AW 36 BD37 DDR_A_DQS#3 DDR_B_D31 BH34 BH41 DDR_B_DQS#2
DDR_A_D32 SA_DQ_31 SA_DQS#_3 DDR_A_DQS#4 DDR_B_D32 SB_DQ_31 SB_DQS#_2 DDR_B_DQS#3
B BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37 B
DDR_A_D33 AU11 BD8 DDR_A_DQS#5 DDR_B_D33 BG12 BG9 DDR_B_DQS#4
DDR_A_D34 SA_DQ_33 SA_DQS#_5 DDR_A_DQS#6 DDR_B_D34 SB_DQ_33 SB_DQS#_4 DDR_B_DQS#5
BC11 AU9 BH11 BC2
SYSTEM

DDR_A_D35 SA_DQ_34 SA_DQS#_6 DDR_A_DQS#7 DDR_B_D35 SB_DQ_34 SB_DQS#_5 DDR_B_DQS#6


BA12 AM8 BG8 AT2

SYSTEM
DDR_A_D36 SA_DQ_35 SA_DQS#_7 DDR_B_D36 SB_DQ_35 SB_DQS#_6 DDR_B_DQS#7
AU13 SA_DQ_36 DDR_A_MA[0..14] 15,16 BH12 SB_DQ_36 SB_DQS#_7 AN5
DDR_A_D37 AV13 BA21 DDR_A_MA0 DDR_B_D37 BF11
SA_DQ_37 SA_MA_0 SB_DQ_37 DDR_B_MA[0..14] 15,16
DDR_A_D38 BD12 BC24 DDR_A_MA1 DDR_B_D38 BF8 AV17 DDR_B_MA0
DDR_A_D39 SA_DQ_38 SA_MA_1 DDR_A_MA2 DDR_B_D39 SB_DQ_38 SB_MA_0 DDR_B_MA1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
DDR_A_D40 BB9 BH24 DDR_A_MA3 DDR_B_D40 BC5 BC25 DDR_B_MA2
DDR_A_D41 SA_DQ_40 SA_MA_3 DDR_A_MA4 DDR_B_D41 SB_DQ_40 SB_MA_2 DDR_B_MA3
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
DDR_A_D42 AU10 BA24 DDR_A_MA5 DDR_B_D42 AY3 AW 25 DDR_B_MA4
DDR_A_D43 SA_DQ_42 SA_MA_5 DDR_A_MA6 DDR_B_D43 SB_DQ_42 SB_MA_4 DDR_B_MA5
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
DDR_A_D44 BA11 BG27 DDR_A_MA7 DDR_B_D44 BF6 AU28 DDR_B_MA6
DDR_A_D45 SA_DQ_44 SA_MA_7 DDR_A_MA8 DDR_B_D45 SB_DQ_44 SB_MA_6 DDR_B_MA7
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW 28
DDR_A_D46 AY8 AW 24 DDR_A_MA9 DDR_B_D46 BA1 AT33 DDR_B_MA8
DDR_A_D47 SA_DQ_46 SA_MA_9 DDR_A_MA10 DDR_B_D47 SB_DQ_46 SB_MA_8 DDR_B_MA9
BA6 BC21 BD3 BD33
DDR

DDR_A_D48 SA_DQ_47 SA_MA_10 DDR_A_MA11 DDR_B_D48 SB_DQ_47 SB_MA_9 DDR_B_MA10


AV5 BG26 AV2 BB16

DDR
DDR_A_D49 SA_DQ_48 SA_MA_11 DDR_A_MA12 DDR_B_D49 SB_DQ_48 SB_MA_10 DDR_B_MA11
AV7 SA_DQ_49 SA_MA_12 BH26 AU3 SB_DQ_49 SB_MA_11 AW 33
DDR_A_D50 AT9 BH17 DDR_A_MA13 DDR_B_D50 AR3 AY33 DDR_B_MA12
DDR_A_D51 SA_DQ_50 SA_MA_13 DDR_A_MA14 DDR_B_D51 SB_DQ_50 SB_MA_12 DDR_B_MA13
AN8 SA_DQ_51 SA_MA_14 AY25 AN2 SB_DQ_51 SB_MA_13 BH15
DDR_A_D52 AU5 DDR_B_D52 AY2 AU33 DDR_B_MA14
DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52 SB_MA_14
AU6 SA_DQ_53 AV1 SB_DQ_53
DDR_A_D54 AT5 DDR_B_D54 AP3
DDR_A_D55 SA_DQ_54 DDR_B_D55 SB_DQ_54
AN10 SA_DQ_55 AR1 SB_DQ_55
DDR_A_D56 AM11 DDR_B_D56 AL1
DDR_A_D57 SA_DQ_56 DDR_B_D57 SB_DQ_56
AM5 SA_DQ_57 AL2 SB_DQ_57
DDR_A_D58 AJ9 DDR_B_D58 AJ1
DDR_A_D59 SA_DQ_58 DDR_B_D59 SB_DQ_58
AJ8 SA_DQ_59 AH1 SB_DQ_59
DDR_A_D60 AN12 DDR_B_D60 AM2
DDR_A_D61 SA_DQ_60 DDR_B_D61 SB_DQ_60
C
AM13 SA_DQ_61 AM3 SB_DQ_61 C
DDR_A_D62 AJ11 DDR_B_D62 AH3
DDR_A_D63 SA_DQ_62 DDR_B_D63 SB_DQ_62
AJ12 SA_DQ_63 AJ3 SB_DQ_63
CANTIGA_1p0 CANTIGA_1p0

D D

QUANTA
Title
COMPUTER

https://Dr-Bios.com
Cantiga (HOST)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 7 of 58


1 2 3 4 5 6 7 8
5 4 3 2 1

U33F
U33G +3.3V_RUN
+1.8V_SUS
R97 10 D8
AP33 W 28 1 2 +VCC_GMCH_L 1 2 AG34
VCC_SM_1 VCC_AXG_NCTF_1 VCC_1
AN33 VCC_SM_2 VCC_AXG_NCTF_2 V28 AC34 VCC_2
BH32 W 26 SDMK0340L-7-F AB34
VCC_SM_3 VCC_AXG_NCTF_3 VCC_3
BG32 VCC_SM_4 VCC_AXG_NCTF_4 V26 AA34 VCC_4
BF32 VCC_SM_5 VCC_AXG_NCTF_5 W 25 Y34 VCC_5
BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25 V34 VCC_6
BC32 VCC_SM_7 VCC_AXG_NCTF_7 W 24 Layout Note: U34 VCC_7
BB32 VCC_SM_8 VCC_AXG_NCTF_8 V24 Inside GMCH cavity. AM33 VCC_8
BA32 W 23 +1.05V_VCCP AK33
VCC_SM_9 VCC_AXG_NCTF_9 VCC_9
D
AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23 Ivcc=1930.4+508.12=2438.52mA AJ33 VCC_10 D
AW 32 VCC_SM_11 VCC_AXG_NCTF_11 AM21 AG33 VCC_11
AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21 AF33 VCC_12
AU32 AK21 C546
VCC_SM_13 VCC_AXG_NCTF_13

1
AT32 W 21 + 220U AE33

VCC CORE
VCC_SM_14 VCC_AXG_NCTF_14 VCC_13
AR32 V21 Layout Note: 2.5 C152 C217 C303 C266 AC33

POWER
VCC_SM_15 VCC_AXG_NCTF_15 7343 22U/4V 0.22U/10V 0.22U/10V 0.1U/10V VCC_14
AP32 U21 370 mils from edge. AA33

2
VCC_SM_16 VCC_AXG_NCTF_16 VCC_15
AN32 VCC_SM_17 VCC_AXG_NCTF_17 AM20 Y33 VCC_16
2600mA BH31 VCC_SM_18 VCC_AXG_NCTF_18 AK20 W 33 VCC_17
BG31 VCC_SM_19 VCC_AXG_NCTF_19 W 20 V33 VCC_18
BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20 U33 VCC_19
BG30 VCC_SM_21 VCC_AXG_NCTF_21 AM19 AH28 VCC_20
BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19 AF28 VCC_21
BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19 AC28 VCC_22
BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19 AA28 VCC_23
BD29 AH19 AJ26
VCC SM
VCC_SM_25 VCC_AXG_NCTF_25 VCC_24
BC29 VCC_SM_26 VCC_AXG_NCTF_26 AG19 AG26 VCC_25
BB29 VCC_SM_27 VCC_AXG_NCTF_27 AF19 AE26 VCC_26
BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19 AC26 VCC_27
AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19 AH25 VCC_28
AW 29 VCC_SM_30 VCC_AXG_NCTF_30 AA19 AG25 VCC_29
AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19 AF25 VCC_30
AU29 VCC_SM_32 VCC_AXG_NCTF_32 W 19 AG24 VCC_31
AT29 V19 AJ23 +1.05V_VCCP
VCC_SM_33 VCC_AXG_NCTF_33 VCC_32
AR29 U19 AH23

POWER
VCC_SM_34 VCC_AXG_NCTF_34 VCC_33
AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17 AF23 VCC_34
VCC_AXG_NCTF_36 AK17 VCC_NCTF_1 AM32
BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17 T32 VCC_35 VCC_NCTF_2 AL32
BB24 VCC_SM_37/NC VCC_AXG_NCTF_38 AG17 VCC_NCTF_3 AK32
BD16 VCC_SM_38/NC VCC_AXG_NCTF_39 AF17 VCC_NCTF_4 AJ32
C BB21 VCC_SM_39/NC VCC_AXG_NCTF_40 AE17 VCC_NCTF_5 AH32 C
AW 16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17 VCC_NCTF_6 AG32
AW 13 VCC_SM_41/NC VCC_AXG_NCTF_42 AB17 VCC_NCTF_7 AE32
AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17 VCC_NCTF_8 AC32
VCC_AXG_NCTF_44 W 17 VCC_NCTF_9 AA32
VCC GFX NCTF

VCC_AXG_NCTF_45 V17 VCC_NCTF_10 Y32


VCC_AXG_NCTF_46 AM16 VCC_NCTF_11 W 32
Y26 AL16 +1.8V_SUS U32
AE25
VCC_AXG_1
VCC_AXG_2
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48 AK16 VCC_SM VCC_NCTF_12
VCC_NCTF_13 AM30
AB25 VCC_AXG_3 VCC_AXG_NCTF_49 AJ16 VCC_NCTF_14 AL30
AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16 VCC_NCTF_15 AK30
AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16 VCC_NCTF_16 AH30

1
AC24 AF16 + C629 AG30
VCC_AXG_6 VCC_AXG_NCTF_52 C308 220U/4V C314 C307 VCC_NCTF_17
AA24 VCC_AXG_7 VCC_AXG_NCTF_53 AE16 VCC_NCTF_18 AF30
Y24 AC16 0.1U/10V 22U/4V 22U/4V AE30

2
VCC_AXG_8 VCC_AXG_NCTF_54 VCC_NCTF_19
AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16 VCC_NCTF_20 AC30
AC23 AA16 4 AB30
VCC_AXG_10 VCC_AXG_NCTF_56 VCC_NCTF_21
AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16 Layout Note: VCC_NCTF_22 AA30
AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W 16 Place C308 where LVDS VCC_NCTF_23 Y30
AJ21 V16 and DDR2 taps. Layout Note: W 30

VCC NCTF
VCC_AXG_13 VCC_AXG_NCTF_59 VCC_NCTF_24
AG21 VCC_AXG_14 VCC_AXG_NCTF_60 U16 Place on the edge. VCC_NCTF_25 V30
AE21 VCC_AXG_15 VCC_NCTF_26 U30
AC21 VCC_AXG_16 VCC_NCTF_27 AL29
AA21 VCC_AXG_17 VCC_NCTF_28 AK29
Y21 VCC_AXG_18 VCC_NCTF_29 AJ29
AH20 VCC_AXG_19 VCC_NCTF_30 AH29
AF20 VCC_AXG_20 VCC_NCTF_31 AG29
AE20 VCC_AXG_21 VCC_NCTF_32 AE29
AC20 VCC_AXG_22 VCC_NCTF_33 AC29
B
AB20 VCC_AXG_23 VCC_NCTF_34 AA29 B
AA20 VCC_AXG_24 VCC_NCTF_35 Y29
T17 VCC_AXG_25 VCC_NCTF_36 W 29
T16 VCC_AXG_26 VCC_NCTF_37 V29
AM15 VCC_AXG_27 VCC_NCTF_38 AL28
AL15 VCC_AXG_28 VCC_NCTF_39 AK28
AE15 VCC_AXG_29 VCC_NCTF_40 AL26
AJ15 VCC_AXG_30 VCC_NCTF_41 AK26
AH15 VCC_AXG_31 VCC_NCTF_42 AK25
AG15 VCC_AXG_32 VCC_NCTF_43 AK24
AF15 VCC_AXG_33 VCC_NCTF_44 AK23
AB15 VCC_AXG_34
AA15
VCC GFX

VCC_AXG_35
Y15 VCC_AXG_36
V15 VCC_AXG_37
U15 VCC_AXG_38
AN14
40 AM14
U14
VCC_AXG_39
VCC_AXG_40
AV44 VCCSM_LF1
CANTIGA_1p0
VCC SM LF

+1.05V_VCCP VCC_AXG_41 VCC_SM_LF1 VCCSM_LF2


T14 VCC_AXG_42 VCC_SM_LF2 BA37
AM40 VCCSM_LF3
VCC_SM_LF3 VCCSM_LF4
VCC_SM_LF4 AV21
2

AY5 VCCSM_LF5
VCC_SM_LF5 VCCSM_LF6
VCC_SM_LF6 AM10
R147 BB13 VCCSM_LF7
*0_NC VCC_SM_LF7
1

1
1

AJ14 C243 C234 C216 C263 C325 C321 C351


VCC_AXG_SENSE 0.1U/10V 0.1U/10V 0.22U/10V 0.22U/10V 0.47U/10V 1U/10V 1U/10V
AH14
2

VSS_AXG_SENSE
2

A A

R140
*0_NC
QUANTA
1

CANTIGA_1p0
Title
COMPUTER

https://Dr-Bios.com
Cantiga (HOST)
UMA: Places R140,R147 to 10 ohm. Size Document Number Rev
Dis: Please R140,R147 to 0 ohm. FM8 2A

Date: Tuesday, November 25, 2008 Sheet 8 of 58


5 4 3 2 1
5 4 3 2 1

+1.05V_VCCP +1.05V_VCCP
+1.05V_VCCP U33H
VCC_HV
852mA

2
VTT_1 U13
R100 D9
0
45mA MAx. B27
VTT_2
T13
U12 *SDMK0340L-7-F_NC
VCCA_CRT_DAC_1 VTT_3

1
FB_120ohm+-25%_100mHz A26 T12

1
VCCA_CRT_DAC_2 VTT_4 C315 C136 C282 C131 + C544 +VCC_HV_L
U11
_200mA_0.2ohm DC VTT_5
T11 2.2U/6.3V 4.7U/6.3V 0.47U/6.3V 4.7U 220U/4V

2
VTT_6

1
CRT
L24 A25 U10 603 7343

2
+VCCA_HPLL VCCA_DAC_BG VTT_7 6.3 2
2 1 B25 T10
BLM11A121S VSSA_DAC_BG VTT_8 R98
VTT_9 U9
603 T9 Close to VTT *10_NC
VTT_10
2

1
C185 U8

2
+VCCA_MPLL_L 4.7U C169 VTT_11
F47 T8
VCCA_DPLLA VTT_12

VTT
603 0.1U/10V AB total 64.8mA U7 Place on chip edge.
1

2
6.3 VTT_13
D L48 VCCA_DPLLB VTT_14 T7 D
L23 24mA U6
VTT_15

PLL
BLM11A121S +VCCA_HPLL AD1 T6 +3.3V_RUN
603 VCCA_HPLL VTT_16
139.2mA VTT_17 U5
2 1 +VCCA_MPLL +VCCA_MPLL AE1 T5
10V VCCA_MPLL VTT_18
VTT_19 V3
VTT_20 U3
1 R104 2 J48 VCCA_LVDS VTT_21 V2
1

A LVDS
0.5/F 603 13.2mA U2
C147 VTT_22
J47 VSSA_LVDS VTT_23 T2
1

0.1U V1
2

C146 10V +1.5V_RUN VTT_24


U1 +1.05V_VCCP
22U VTT_25
414uA
2

1206 10V AD48 Reserved L pad for


VCCA_PEG_BG

1
C585
inductor. 11

1
C342 C583 *10U_NC

A PEG
0.1U 50mA 1U/10V 603

2
10V 6.3

2
+VCCA_PEG_PLL AA48 VCCA_PEG_PLL

1
L67 805
C361 AR20 1uH/300MA
0.1U VCCA_SM_1
AP20 +1.8V_SUS

2
10V VCCA_SM_2
AN20
AR17
VCCA_SM_3
VCCA_SM_4 POWER

1
AP17
VCCA_SM_5 R450
11 AN17
AT16
VCCA_SM_6 1
VCCA_SM_7

1
A SM
480mA AR16 VCCA_SM_8
+1.05V_VCCP +VCCA_SM AP16 C582

2
VCCA_SM_9 0.1U/10V

2
1

+VCC_SM_CK_L
2

1
+ C566 C253 C252 C260 C249 C584
+1.05V_VCCP 100U 4.7U *22U_NC 22U 1U 10U
L34 7343 603 805 805 603 603
2

2
1 2 +VCCA_PEG_PLL 2V 6.3 10 10 10 6.3
BLM21PG221SN1D AP28
VCCA_SM_CK_1
1

C 805 AN28 B22 +VCC_AXF C


VCCA_SM_CK_2 VCC_AXF_1

AXF
AP25 B21
R221 VCCA_SM_CK_3 VCC_AXF_2
FB_220ohm+-25%_100MHz AN25
VCCA_SM_CK_4 VCC_AXF_3
A21
1/F L33 24mA AN24
_2A_0.1ohm DC 603 2 1 +VCCA_SM_CK AM28
VCCA_SM_CK_5
+1.05V_VCCP
2

VCCA_SM_CK_NCTF_1

A CK
1uH/300mA AM26
+VCCA_PEG_PLL_R VCCA_SM_CK_NCTF_2
AM25 VCCA_SM_CK_NCTF_3 119.85mA
1

1
1uH+-20%_300mA AL25 BF21 +VCC_SM_CK
VCCA_SM_CK_NCTF_4 VCC_SM_CK_1
1

SM CK
C292 C293 C272 AM24 BH20
C365 *22U/10V_NC 22U/10V 0.1U/10V VCCA_SM_CK_NCTF_5 VCC_SM_CK_2
AL24 BG20
2

2
10U VCCA_SM_CK_NCTF_6 VCC_SM_CK_3
AM23 BF20
2

603 VCCA_SM_CK_NCTF_7 VCC_SM_CK_4


AL23 VCCA_SM_CK_NCTF_8
6.3
118.8mA
K47
VCC_TX_LVDS
B24
VCCA_TV_DAC_1
A24 C35 105.3mA

TV
+1.05V_VCCP VCCA_TV_DAC_2 VCC_HV_1 +3.3V_VCC_HV
50mA VCC_HV_2
B35

HV
L35 A35
+VCCD_PEG_PLL VCC_HV_3 +VCC_PEG
BLM18PG181SN1D A32 1782mA L75 91uH+-20%_1.5A

HDA
603 VCC_HDA
V48 2 1 +1.05V_VCCP
VCC_PEG_1
1

U48 91nH/1.5A
VCC_PEG_2

1
PEG
R222 V47
VCC_PEG_3

2
1 U47 + C689

D TV/CRT
+VCCD_TVDAC VCC_PEG_4 C674 C676 4.7U
M25 VCCD_TVDAC VCC_PEG_5 U46
220U/4V 22U/10V 603
2

1
+VCCD_QDAC L28 2V 6.3
+VCCD_PEG_PLL_RC C135 0.1U/10V VCCD_QDAC +VCC_DMI
AH48
+VCCA_MPLL VCC_DMI_1
157.2mA 2 1 AF1
VCCD_HPLL VCC_DMI_2
AF48 456mA

DMI
AH47
C368 +VCCD_PEG_PLL VCC_DMI_3 L73
2 1 AA47
VCCD_PEG_PLL VCC_DMI_4
AG47 91uH+-20%_1.5A
10U 2 1 +1.05V_VCCP
603 C360 91nH/1.5A
6.3 0.1U/10V M38
LVDS
VCCD_LVDS_1

1
L37 A8 +VTTLF1
VCCD_LVDS_2 VTTLF1 +VTTLF2 C340
L1

VTTLF
VTTLF2 +VTTLF3 0.1U/10V
B AB2 B

2
VTTLF3

+1.05V_VCCP
+1.5V_RUN R175 2 1 *0_NC +VCCD_TVDAC CANTIGA_1p0

2
603
1

R176 D30
C294 C295 0 SDM10K45-7-F
*0.01U_NC *0.1U_NC
2

25 10V

2 1
R453
+3.3V_VCC_HV 10
+1.5V_RUN R174 2 1 0 +VCCD_QDAC +VTTLF1

1
+VTTLF2 R455 1 2 0 +3.3V_RUN
603 +VTTLF3
1

1
C273 C279
0.01U 0.1U C194 C189 C242 C606
2

25 10V 0.47U/10V 0.47U/10V 0.47U/10V 0.1U/10V

2
A A

QUANTA

https://Dr-Bios.com Title

Size
COMPUTER
Cantiga (HOST)

Document Number
FM8
Rev
2A

Date: Tuesday, November 25, 2008 Sheet 9 of 58


5 4 3 2 1
5 4 3 2 1

U33J
U33I BG21 AH8
VSS_199 VSS_297
L12 VSS_200 VSS_298 Y8
AU48 VSS_1 VSS_100 AM36 AW 21 VSS_201 VSS_299 L8
AR48 VSS_2 VSS_101 AE36 AU21 VSS_202 VSS_300 E8
AL48 VSS_3 VSS_102 P36 AP21 VSS_203 VSS_301 B8
BB47 VSS_4 VSS_103 L36 AN21 VSS_204 VSS_302 AY7
AW 47 VSS_5 VSS_104 J36 AH21 VSS_205 VSS_303 AU7
AN47 VSS_6 VSS_105 F36 AF21 VSS_206 VSS_304 AN7
AJ47 VSS_7 VSS_106 B36 AB21 VSS_207 VSS_305 AJ7
D
AF47 VSS_8 VSS_107 AH35 R21 VSS_208 VSS_306 AE7 D
AD47 VSS_9 VSS_108 AA35 M21 VSS_209 VSS_307 AA7
AB47 VSS_10 VSS_109 Y35 J21 VSS_210 VSS_308 N7
Y47 VSS_11 VSS_110 U35 G21 VSS_211 VSS_309 J7
T47 VSS_12 VSS_111 T35 BC20 VSS_212 VSS_310 BG6
N47 VSS_13 VSS_112 BF34 BA20 VSS_213 VSS_311 BD6
L47 VSS_14 VSS_113 AM34 AW 20 VSS_214 VSS_312 AV6
G47 VSS_15 VSS_114 AJ34 AT20 VSS_215 VSS_313 AT6
BD46 VSS_16 VSS_115 AF34 AJ20 VSS_216 VSS_314 AM6
BA46 VSS_17 VSS_116 AE34 AG20 VSS_217 VSS_315 M6
AY46 VSS_18 VSS_117 W 34 Y20 VSS_218 VSS_316 C6
AV46 VSS_19 VSS_118 B34 N20 VSS_219 VSS_317 BA5
AR46 VSS_20 VSS_119 A34 K20 VSS_220 VSS_318 AH5
AM46 VSS_21 VSS_120 BG33 F20 VSS_221 VSS_319 AD5
V46 VSS_22 VSS_121 BC33 C20 VSS_222 VSS_320 Y5
R46 VSS_23 VSS_122 BA33 A20 VSS_223 VSS_321 L5
P46 VSS_24 VSS_123 AV33 BG19 VSS_224 VSS_322 J5
H46 VSS_25 VSS_124 AR33 A18 VSS_225 VSS_323 H5
F46 VSS_26 VSS_125 AL33 BG17 VSS_226 VSS_324 F5
BF44 VSS_27 VSS_126 AH33 BC17 VSS_227 VSS_325 BE4
AH44 VSS_28 VSS_127 AB33 AW 17 VSS_228
AD44 P33 AT17 BC3
AA44
Y44
VSS_29
VSS_30
VSS_31
VSS_128
VSS_129
VSS_130
L33
H33
R17
M17
VSS_229
VSS_230
VSS_231
VSS VSS_327
VSS_328
VSS_329
AV3
AL3
U44 VSS_32 VSS_131 N32 H17 VSS_232 VSS_330 R3
T44 K32 C17 P3
M44
F44
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
F32
C32 BA16
VSS_233

VSS_235
VSS_331
VSS_332
VSS_333
F3
BA2
BC43 VSS_36 VSS_135 A31 VSS_334 AW 2
AV43 VSS_37 VSS_136 AN29 AU16 VSS_237 VSS_335 AU2
C AU43 VSS_38 VSS_137 T29 AN16 VSS_238 VSS_336 AR2 C
AM43 VSS_39 VSS_138 N29 N16 VSS_239 VSS_337 AP2
J43 VSS_40 VSS_139 K29 K16 VSS_240 VSS_338 AJ2
C43 VSS_41 VSS_140 H29 G16 VSS_241 VSS_339 AH2
BG42 VSS_42 VSS_141 F29 E16 VSS_242 VSS_340 AF2
AY42 VSS_43 VSS_142 A29 BG15 VSS_243 VSS_341 AE2
AT42 VSS_44 VSS_143 BG28 AC15 VSS_244 VSS_342 AD2
AN42 VSS_45 VSS_144 BD28 W 15 VSS_245 VSS_343 AC2
AJ42 VSS_46 VSS_145 BA28 A15 VSS_246 VSS_344 Y2
AE42 VSS_47 VSS_146 AV28 BG14 VSS_247 VSS_345 M2
N42 VSS_48 VSS_147 AT28 AA14 VSS_248 VSS_346 K2
L42 VSS_49 VSS_148 AR28 C14 VSS_249 VSS_347 AM1
BD41 VSS_50 VSS_149 AJ28 BG13 VSS_250 VSS_348 AA1
AU41 VSS_51 VSS_150 AG28 BC13 VSS_251 VSS_349 P1
AM41 VSS_52 VSS_151 AE28 BA13 VSS_252 VSS_350 H1
AH41 VSS_53 VSS_152 AB28
AD41 VSS_54 VSS_153 Y28 VSS_351 U24
AA41 VSS_55 VSS_154 P28 AN13 VSS_255 VSS_352 U28
Y41 VSS_56 VSS_155 K28 AJ13 VSS_256 VSS_353 U25
U41 VSS_57 VSS_156 H28 AE13 VSS_257 VSS_354 U29
T41 VSS_58 VSS_157 F28 N13 VSS_258
M41 VSS_59 VSS_158 C28 L13 VSS_259
G41 VSS_60 VSS_159 BF26 G13 VSS_260 VSS_NCTF_1 AF32
B41 VSS_61 VSS_160 AH26 E13 VSS_261 VSS_NCTF_2 AB32
BG40 VSS_62 VSS_161 AF26 BF12 VSS_262 VSS_NCTF_3 V32
BB40 VSS_63 VSS_162 AB26 AV12 VSS_263 VSS_NCTF_4 AJ30
AV40 VSS_64 VSS_163 AA26 AT12 VSS_264 VSS_NCTF_5 AM29
AN40 C26 AM12 AF29

VSS NCTF
VSS_65 VSS_164 VSS_265 VSS_NCTF_6
H40 VSS_66 VSS_165 B26 AA12 VSS_266 VSS_NCTF_7 AB29
B
E40 VSS_67 VSS_166 BH25 J12 VSS_267 VSS_NCTF_8 U26 B
AT39 VSS_68 VSS_167 BD25 A12 VSS_268 VSS_NCTF_9 U23
AM39 VSS_69 VSS_168 BB25 BD11 VSS_269 VSS_NCTF_10 AL20
AJ39 VSS_70 VSS_169 AV25 BB11 VSS_270 VSS_NCTF_11 V20
AE39 VSS_71 VSS_170 AR25 AY11 VSS_271 VSS_NCTF_12 AC19
N39 VSS_72 VSS_171 AJ25 AN11 VSS_272 VSS_NCTF_13 AL17
L39 VSS_73 VSS_172 AC25 AH11 VSS_273 VSS_NCTF_14 AJ17
B39 VSS_74 VSS_173 Y25 VSS_NCTF_15 AA17
BH38 VSS_75 VSS_174 N25 Y11 VSS_275 VSS_NCTF_16 U17
BC38 VSS_76 VSS_175 L25 N11 VSS_276
BA38 J25 G11 BH48

VSS SCB
VSS_77 VSS_176 VSS_277 VSS_SCB_1
AU38 VSS_78 VSS_177 G25 C11 VSS_278 VSS_SCB_2 BH1
AH38 VSS_79 VSS_178 E25 BG10 VSS_279 VSS_SCB_3 A48
AD38 VSS_80 VSS_179 BF24 AV10 VSS_280 VSS_SCB_4 C1
AA38 VSS_81 VSS_180 AD12 AT10 VSS_281 VSS_SCB_5 B2
Y38 VSS_82 VSS_181 AY24 AJ10 VSS_282 VSS_SCB_6 A3
U38 VSS_83 VSS_182 AT24 AE10 VSS_283
T38 VSS_84 VSS_183 AJ24 AA10 VSS_284 NC_26 E1
J38 VSS_85 VSS_184 AH24 M10 VSS_285 NC_27 D2
F38 VSS_86 VSS_185 AF24 BF9 VSS_286 NC_28 C3
C38 VSS_87 VSS_186 AB24 BC9 VSS_287 NC_29 B4
BF37 VSS_88 VSS_187 R24 AN9 VSS_288 NC_30 A5
BB37 VSS_89 VSS_188 L24 AM9 VSS_289 NC_31 A6
AW 37 VSS_90 VSS_189 K24 AD9 VSS_290 NC_32 A43
AT37 J24 G9 A44

NC
VSS_91 VSS_190 VSS_291 NC_33
AN37 VSS_92 VSS_191 G24 B9 VSS_292 NC_34 B45
AJ37 VSS_93 VSS_192 F24 BH8 VSS_293 NC_35 C46
H37 VSS_94 VSS_193 E24 BB8 VSS_294 NC_36 D47
C37 VSS_95 VSS_194 BH23 AV8 VSS_295 NC_37 B47
BG36 VSS_96 VSS_195 AG23 AT8 VSS_296 NC_38 A46
A BD36 VSS_97 VSS_196 Y23 NC_39 F48 A
AK15 VSS_98 VSS_197 B23 NC_40 E48
AU36 VSS_99 VSS_198 A23 NC_41 C48
B48
CANTIGA_1p0
CANTIGA_1p0 NC_42
QUANTA
Title
COMPUTER

https://Dr-Bios.com
Cantiga (HOST)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 10 of 58


5 4 3 2 1
1 2 3 4 5 6 7 8

32.768KHZ R511 10M +RTC_CELL +RTC_CELL


2 1

1
W1 R302 R299
ICH_RTCX1 1 4 ICH_RTCX2 332K/F 332K/F

2
2 3 ICH_INTVRMEN ICH_LAN100_SLP
1

1
C716 32.768KHZ C723
A A
12P/50V 12P/50V
2

2
R296 R293
*0_NC *0_NC

2
+RTC_CELL ICH9M Internal VR Enable Strap ICH9M LAN100 SLP Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) (Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled Low = Internal VR Disabled
1

ICH_INTVRMEN High = Internal VR Enabled(Default) ICH_LAN100_SLP High = Internal VR Enabled(Default)


R295 R531 R291 +1.05V_VCCP
1M 20K 20K
U22A
2

ICH_RTCRST# ICH_RTCX1 C23 K5


RTCX1 FW H0/LAD0 LPC_LAD0 31,33

2
ICH_SRTCRST# ICH_RTCX2 C24 K4
RTCX2 FW H1/LAD1 LPC_LAD1 31,33
ICH_INTRUDER# L6 R277 R521 R276
FW H2/LAD2 LPC_LAD2 31,33
ICH_RTCRST# A25 K2 *56_NC *56_NC 56
RTCRST# FW H3/LAD3 LPC_LAD3 31,33
ICH_SRTCRST# F20 SRTCRST#
1

ICH_INTRUDER# C22 K3 LPC_LFRAME# 31,33

1
C422 C410 INTRUDER# FW H4/LFRAME# H_DPRSTP#

RTC
LPC
1U/10V 1U/10V ICH_INTVRMEN B22 J3 H_DPSLP#
PAD T149
2

ICH_LAN100_SLP INTVRMEN LDRQ0# H_FERR#


A22 LAN100_SLP LDRQ1#/GPIO23 J1 PAD T73

T107 PAD GLAN_CLK E25 N7 SIO_A20GATE


GLAN_CLK A20GATE SIO_A20GATE 31
A20M# AJ27 H_A20M# 3
C13 LAN_RSTSYNC
Reserved for AJ25 H_DPRSTP# +3.3V_RUN
DPRSTP# H_DPRSTP# 3,6,51
B Intel Nineveh T120 PAD LAN_RXD0 F14 AE23 H_DPSLP# B
LAN_RXD0 DPSLP# H_DPSLP# 3
R558 1 2 33 ACZ_BIT_CLK T129 PAD LAN_RXD1 G13
40 ICH_AZ_CODEC_BITCLK design. LAN_RXD2 LAN_RXD1 H_FERR#_L H_FERR#
T127 PAD D14 AJ26 2 1 H_FERR# 3

LAN / GLAN
LAN_RXD2 FERR#

2
T135 PAD LAN_TXD0 R275 56
2

T136 PAD LAN_TXD1 D13 AD22 R582


C777 LAN_TXD2 LAN_TXD0 CPUPW RGD H_PWRGOOD 3 R546 10K
T128 PAD D12 LAN_TXD1
*27P/50V_NC E13 AF25 8.2K
1

R326 *10K_NC LAN_TXD2 IGNNE# H_IGNNE# 3

1
+3.3V_SUS 2 1 B10 AE22 SIO_A20GATE
GLAN_DOCK#/GPIO56 INIT# H_INIT# 3
AG25 SIO_RCIN#

CPU
INTR H_INTR 3
R509 24.9/F B28 L3 SIO_RCIN#
GLAN_COMPI RCIN# SIO_RCIN# 31
R565 1 2 33 ACZ_SYNC +1.5V_PCIE_ICH 1 2 GLAN_COMP B27
40 ICH_AZ_CODEC_SYNC GLAN_COMPO
NMI AF23 H_NMI 3
R552 1 2 33 ACZ_RST# ACZ_BIT_CLK AF6 AF24
31,40 ICH_AZ_CODEC_RST# HDA_BIT_CLK SMI# H_SMI# 3 +1.05V_VCCP
ACZ_SYNC AH4
R562 1 HDA_SYNC
40 ICH_AZ_CODEC_SDOUT 2 33 ACZ_SDOUT
STPCLK# AH27 H_STPCLK# 3
ACZ_RST# AE7 HDA_RST#

2
AG26 THERMTRIP#_ICH
THRMTRIP#
Place all series terms close to ICH9 except for SDIN input 40 ICH_AZ_CODEC_SDIN0 AF4 HDA_SDIN0
R514
lines,which should be close to source.Placement of R558,R565, PAD AG4 AG27 56
T146 HDA_SDIN1 TP9 PAD T105
R552&R562 should equal distance to the T split trace. Basically, PAD AH3

IHDA
T150 HDA_SDIN2
PAD AE5

1
keep the same distance from T for all series termination T144 HDA_SDIN3 THERMTRIP#_ICH
resistors. ACZ_SDOUT AG5 AH11
HDA_SDOUT SATA4RXN
SATA4RXP AJ11
+3.3V_SUS R559 2 1 *10K_NC AG7 AG12
HDA_DOCK_EN#/GPIO33 SATA4TXN PAD T130
R557 2 1 *10K_NC AE8 AF12
HDA_DOCK_RST#/GPIO34 SATA4TXP PAD T134

PAD SATA_ACT# AG8 AH9 SATA_RX5- 35


T137 SATALED# SATA5RXN E-SATA
C SATA5RXP AJ9 SATA_RX5+ 35 C
C748 0.01U/16V SATA_TX0-_C AJ16 AE10 SATA_TX5-_C
36 SATA_TX0- 36 SATA_RX0- SATA0RXN SATA5TXN
C745 0.01U/16V SATA_TX0+_C Master HDD AH16 AF10 SATA_TX5+_C

SATA
36 SATA_TX0+ 36 SATA_RX0+ SATA0RXP SATA5TXP
SATA_TX0-_C AF17
SATA_TX0+_C SATA0TXN
AG17 SATA0TXP SATA_CLKN AH18 CLK_PCIE_SATA# 17
C749 0.01U/16V SATA_TX1-_C AJ18
36 SATA_TX1- SATA_CLKP CLK_PCIE_SATA 17
C757 0.01U/16V SATA_TX1+_C AH13
36 SATA_TX1+ 36 SATA_RX1- SATA1RXN
SATA ODD AJ13 AJ7 24.9/F R548
36 SATA_RX1+ SATA1RXP SATARBIAS#
SATA_TX1-_C AG14 SATA1TXN SATARBIAS AH7 SATABIAS 1 2 Place within 500mils
SATA_TX1+_C AF14 of ICH9 ball
C762 0.01U/16V SATA_TX5-_C SATA1TXP
35 SATA_TX5-
C765 0.01U/16V SATA_TX5+_C ICH9M REV 1.0
35 SATA_TX5+

Distance between the ICH-9 M and cap on the "P"


+3.3V_RUN
signal should be identical distance between the
ICH-9 M and cap on the "N" signal for same pair.

2
XOR Chain Entrance Strap R561
*1K_NC
ICH RSVD HDA SDOUT Description 1

0 0 RSVD ACZ_SDOUT
ICH_RSVD 13
0 1 Enter XOR Chain
2

D 1 0 Normal Operation (Default) R520 D


*1K_NC
1 1 Set PCIE port config bit 1
QUANTA
1

Title
COMPUTER

https://Dr-Bios.com
ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 11 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U22D
Place TX DC blocking caps close ICH9. 33 PCIE_RX1- N29 PERN1 DMI0RXN V27 DMI_MTX_IRX_N0 6
33 PCIE_RX1+ N28 PERP1 DMI0RXP V26 DMI_MTX_IRX_P0 6
C717 1 2 0.1U 10 PCIE_TXN1_C PCIE_TXN1_C P27 U29
33 PCIE_TX1- PETN1 DMI0TXN DMI_MRX_ITX_N0 6
C718 1 2 0.1U 10 PCIE_TXP1_C MiniWWAN PCIE_TXP1_C P26 U28

Direct Media Interface


33 PCIE_TX1+ PETP1 DMI0TXP DMI_MRX_ITX_P0 6

34 PCIE_RX2- L29 PERN2 DMI1RXN Y27 DMI_MTX_IRX_N1 6


C714 1 2 0.1U 10 PCIE_TXN2_C L28 Y26
34 PCIE_TX2- 34 PCIE_RX2+ PERP2 DMI1RXP DMI_MTX_IRX_P1 6
C715 1 2 0.1U 10 PCIE_TXP2_C PCIE_TXN2_C M27 W 29
34 PCIE_TX2+ PETN2 DMI1TXN DMI_MRX_ITX_N1 6
MiniWLAN PCIE_TXP2_C M26 W 28
PETP2 DMI1TXP DMI_MRX_ITX_P1 6
C712 1 2 0.1U 10 PCIE_TXN3_C J29 AB27
33 PCIE_TX3- 33 PCIE_RX3- PERN3 DMI2RXN DMI_MTX_IRX_N2 6
C713 0.1U 10 PCIE_TXP3_C

PCI-Express
A 33 PCIE_TX3+ 1 2 33 PCIE_RX3+ J28 PERP3 DMI2RXP AB26 DMI_MTX_IRX_P2 6 A
PCIE_TXN3_C K27 AA29
PETN3 DMI2TXN DMI_MRX_ITX_N2 6
MiniWPAN PCIE_TXP3_C K26 AA28
PETP3 DMI2TXP DMI_MRX_ITX_P2 6
C711 1 2 0.1U 10 PCIE_TXN4_C
30 PCIE_TX4-
C710 1 2 0.1U 10 PCIE_TXP4_C G29 AD27
30 PCIE_TX4+ 30 PCIE_RX4- PERN4 DMI3RXN DMI_MTX_IRX_N3 6
30 PCIE_RX4+ G28 PERP4 DMI3RXP AD26 DMI_MTX_IRX_P3 6
PCIE_TXN4_C H27 AC29
PETN4 DMI3TXN DMI_MRX_ITX_N3 6
C721 1 2 0.1U 10 GLAN_TXN_C Express Card PCIE_TXP4_C H26 AC28
42 PCIE_TX6-/GLAN_TX- PETP4 DMI3TXP DMI_MRX_ITX_P3 6
C722 1 2 0.1U 10 GLAN_TXP_C
42 PCIE_TX6+/GLAN_TX+
T55 PAD E29 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 17
T104 PAD E28 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 17
T106 PAD F27 PETN5
T108 PAD F26 PETP5 DMI_ZCOMP AF29
AF28 DMI_COMP 1 2 Place within 500mils of ICH9
DMI_IRCOMP +1.5V_PCIE_ICH
C29 R265 24.9/F
42 PCIE_RX6-/GLAN_RX- PERN6/GLAN_RXN
42 PCIE_RX6+/GLAN_RX+ C28 PERP6/GLAN_RXP USBP0N AC5 ICH_USBP0- 35
GLAN_TXN_C D27 AC4 ICH_USBP0+ 35
Side pair Top / left
GLAN_TXP_C PETN6/GLAN_TXN USBP0P
Giga Bit LOM D26 PETP6/GLAN_TXP USBP1N AD3 ICH_USBP1- 35
Side pair bottom / left
USBP1P AD2 ICH_USBP1+ 35
ICH_SPI_CS1#_R Boot BIOS Strap D23 AC1 ICH_USBP2- 35
T112 PAD SPI_CLK USBP2N Side pair top/right(DB)
PCI_GNT0# D24 AC2 ICH_USBP2+ 35
T111 PAD SPI_CS0# USBP2P
GNT0# SPI_CS1# ICH_SPI_CS1#_R F23 AA5
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
2

USBP3P AA4

SPI
LPC 11 No stuff No stuff T110 PAD D25 SPI_MOSI USBP4N AB2 ICH_USBP4- 34
Mini Card (WLAN)
R560 R519 E23 AB3 ICH_USBP4+ 34
T109 PAD SPI_MISO USBP4P
*1K_NC *1K_NC PCI 10 No stuff Stuff AA1 ICH_USBP5- 33
USB_OC0_1# USBP5N Mini Card (WWAN)
35 USB_OC0_1# N4 AA2 ICH_USBP5+ 33
1

OC0#/GPIO59 USBP5P
SPI 01 Stuff No stuff N5 OC1#/GPIO40 USBP6N W5 ICH_USBP6- 33
Mini Card (WPAN)
USB_OC2# N6 W4 PCI Pullups
35 USB_OC2#
OC3# P6
OC2#/GPIO41 USB USBP6P
Y3
ICH_USBP6+ 33
ICH_USBP7- 30
OC4# OC3#/GPIO42 USBP7N Express Card
B M1 OC4#/GPIO43 USBP7P Y2 ICH_USBP7+ 30 B
OC5# N2 W1 +3.3V_RUN
OC5#/GPIO29 USBP8N PAD T71 RP43
OC6# M4 W2
OC6#/GPIO30 USBP8P PAD T72
OC7# M3 V2 PCI_FRAME# 6 5
OC7#/GPIO31 USBP9N PAD T151
OC8# N3 V3 PCI_TRDY# 7 4 PCI_PLOCK#
OC8#/GPIO44 USBP9P PAD T148
OC9# N1 U5 PCI_DEVSEL# 8 3 PCI_STOP#
OC9#/GPIIO45 USBP10N PAD T142
OC10# P5 U4 PCI_REQ1# 9 2 PCI_PIRQD#
OC10#/GPIO46 USBP10P PAD T145
OC11# P3 U1 ICH_USBP11- 41 10 1 PCI_IRDY#
OC11#/GPIO47 USBP11N +3.3V_RUN
USBP11P U2 ICH_USBP11+ 41 Camera
Places within 500 mils R338 22.6/F
of the ICH9 1 2 USBRBIAS AG2 +3.3V_RUN
USBRBIAS RP44
AG1 USBRBIAS# PCI_PIRQA# 6 5
ICH9M REV 1.0 PCI_SERR# 7 4
PCI_REQ0# 8 3 PCI_PIRQB#
ICH_IRQH_GPIO5 9 2 PCI_PIRQC#
10 1 PCI_PERR#
+3.3V_RUN
+3.3V_SUS
WWAN Noise - ICH improvements RP45
OC6# C788 1 2 *0.1U_NC 10 OC7# 6 5
OC4# C462 1 2 *0.1U_NC 10 OC6# 7 4 OC9#
OC5# C464 1 2 *0.1U_NC 10 OC5# 8 3 USB_OC2#
OC7# C465 1 2 *0.1U_NC 10 OC4# 9 2 USB_OC0_1#
OC8# C463 1 2 *0.1U_NC 10 10 1 OC8# SB_WPAN_PCIE_RST# R555 2 1 20K
USB_OC2# C807 *0.1U_NC 10 +3.3V_SUS SB_WWAN_PCIE_RST# R540 20K
1 2 2 1
USB_OC0_1# C786 1 2 *0.1U_NC 10 10KX8 SB_WLAN_PCIE_RST# R549 2 1 20K
OC9# C789 1 2 *0.1U_NC 10 OC10# R543 2 1 10K +3.3V_SUS SB_LOM_PCIE_RST# R554 2 1 20K
OC11# R563 2 1 10K SB_NB_PCIE_RST# R352 2 1 20K
OC3# R556 2 1 10K
C C
BIOS should not enable the
internal GPIO pull up resistor.
28 PCI_AD[0..31] U22B
PCI_AD0 D11 F1 PCI_REQ0# CLK_PCI_ICH
AD0 REQ0# PCI_REQ0# 28
PCI_AD1 C8 G4 PCI_GNT0#
AD1 PCI GNT0# PCI_GNT0# 28

2
PCI_AD2 PCI_REQ1#
PCI_AD3
D9
E12
AD2 REQ1#/GPIO50 B6
A7 PCI_GNT1#
PAD T143 Non-iAMT +3.3V_SUS Add Buffers as needed for
AD3 GNT1#/GPIO51 PAD T67
PCI_AD4 E9 F13 SB_WWAN_PCIE_RST# R564 C453 Loading and fanout concerns.
AD4 REQ2#/GPIO52 SB_WWAN_PCIE_RST# 33
PCI_AD5 C9 F12 PCI_GNT2# *10_NC 1 2
AD5 GNT2#/GPIO53 PAD T133
PCI_AD6 E10 E6 SB_LOM_PCIE_RST#
SB_LOM_PCIE_RST# 42

2 1
PCI_AD7 AD6 REQ3#/GPIO54 PCI_GNT3# 0.047U 10
B7 AD7 GNT3#/GPIO55 F6 PAD T139

5
PCI_AD8 C7 U28
PCI_AD9 AD8 C783
C5 AD9 C/BE0# D8 PCI_C_BE0# 28 2
PCI_AD10 G11 B4 *8.2P_NC 4
PCI_C_BE1# 28 PCI_RST# 28

1
PCI_AD11 AD10 C/BE1# PCI_RST#_G
F8 AD11 C/BE2# D6 PCI_C_BE2# 28 1
PCI_AD12 F11 A5
AD12 C/BE3# PCI_C_BE3# 28
PCI_AD13 E7 AD13
Reserved for 16 TC7SZ32FU(T5L,F,T)
PCI_AD14 A3 D3 PCI_IRDY# EMI.Place
AD14 IRDY# PCI_IRDY# 28
PCI_AD15 D2 E3 +3.3V_SUS
PCI_AD16 AD15 PAR PCI_RST#_G
PCI_PAR 28 resister and cap C775
F10 AD16 PCIRST# R1
PCI_AD17 D5 C6 PCI_DEVSEL# close to ICH. 1 2
AD17 DEVSEL# PCI_DEVSEL# 28
PCI_AD18 D10 E4 PCI_PERR#
AD18 PERR# PCI_PERR# 28
PCI_AD19 B3 C2 PCI_PLOCK# 0.047U 10
AD19 PLOCK# PCI_PLOCK#

5
PCI_AD20 F7 J4 PCI_SERR# U23
AD20 SERR# PCI_SERR# 28
PCI_AD21 C3 A4 PCI_STOP# 2
AD21 STOP# PCI_STOP# 28
PCI_AD22 F3 F5 PCI_TRDY# 4
AD22 TRDY# PCI_TRDY# 28 PLTRST# 6,18,30,31,33,34,42
PCI_AD23 F4 D7 PCI_FRAME# PCI_GNT3# PCI_PLTRST# 1
AD23 FRAME# PCI_FRAME# 28
PCI_AD24 C1 AD24
1
PCI_AD25 G7 C14 PCI_PLTRST# TC7SZ32FU(T5L,F,T)
PCI_AD26 AD25 PLTRST#
D H7 AD26 PCICLK D4 CLK_PCI_ICH CLK_PCI_ICH 17
R553 D
PCI_AD27 D1 R2 *1K_NC
AD27 PME# ICH_PME# 28
PCI_AD28 G5
PCI_AD29 AD28
H6
QUANTA
2

PCI_AD30 AD29
G1 AD30
PCI_AD31 H3 AD31

PCI_PIRQA#
Interrupt I/F SB_WPAN_PCIE_RST#
A16 away override strap.
Title
COMPUTER

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T152 PAD J5 PIRQA# PIRQE#/GPIO2 H4 SB_WPAN_PCIE_RST# 33
PCI_PIRQB# E1 K6 SB_WLAN_PCIE_RST# Low = A16 swap override enabled. ICH9-M (USB,DMI,PCIE,PCI)
28 PCI_PIRQB# PIRQB# PIRQF#/GPIO3 SB_WLAN_PCIE_RST# 34
PCI_PIRQC# J6 F2 SB_NB_PCIE_RST# SB_NB_PCIE_RST# High = Default.
28 PCI_PIRQC# PIRQC# PIRQG#/GPIO4 SB_NB_PCIE_RST# 6
PCI_PIRQD# C4 G2 ICH_IRQH_GPIO5 Size Document Number Rev
T147 PAD PIRQD# PIRQH#/GPIO5 PAD T154
FM8 2A
ICH9M REV 1.0
Date: Tuesday, November 25, 2008 Sheet 12 of 58
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_SUS
Non-iAMT
RP41
1 2 ICH_SMBCLK
3 4 ICH_SMBDATA Place these close to ICH9.
2.2KX2
CLK_ICH_48M
+3.3V_SUS Non-iAMT

2
A +3.3V_RUN A
R539 *10K_NC RSV_ICH_CL_RST1#
Non-iAMT ASF 2.0 R533
2
2
1
1 10K ICH_RI# R566
+3.3V_SUS R320 2 1 10K SIO_EXT_SCI# *10_NC
R524 2 1 1K PCIE_WAKE#

1 1
2
RP40
1 2 ICH_SMLINK0
3 4 ICH_SMLINK1 R518 C795
8.2K *4.7P_NC

2
*10KX2_NC

1
U22C
ICH_SMBCLK R538 1 2 0 ICH_SMLINK0 ICH_SMBCLK G16 AH23 50
ICH_SMBDATA R535 1 30,33,34 ICH_SMBCLK SMBCLK SATA0GP/GPIO21
2 0 ICH_SMLINK1 30,33,34 ICH_SMBDATA
ICH_SMBDATA A13 SMBDATA SATA1GP/GPIO19 AF19
RSV_ICH_CL_RST1# E17 AE21 CLK_ICH_14M

SMB
T121 PAD

SATA
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36

GPIO
T126 PAD ICH_SMLINK0 C17 AD20
SMLINK0 SATA5GP/GPIO37

2
T125 PAD ICH_SMLINK1 B18 SMLINK1 CLK_ICH_14M
CLK14 H1 CLK_ICH_14M 17
+3.3V_RUN ICH_RI# F19 AF3 CLK_ICH_48M R353
CLK_ICH_48M 17

Clocks
RI# CLK48 *10_NC
T141 PAD RSV_LPCPD# R4 P1 ICH_SUSCLK
PAD T74

1 1
SUS_STAT#/LPCPD# SUSCLK
2

3 ITP_DBRESET# G19 SYS_RESET#


SLP_S3# C16 SIO_SLP_S3# 31
R580 M6 E16 C461
6 PM_BMBUSY# PMSYNC#/GPIO0 SLP_S4# PAD T123
8.2K G17 *4.7P_NC
SIO_SLP_S5# 31

2
USB_MCARD1_DET# SLP_S5#
34 USB_MCARD1_DET# A17
1

CLKRUN# SMBALERT#/GPIO11
S4_STATE#/GPIO26 C10
A14 50
17 H_STP_PCI# STP_PCI#/GPIO15
2

E19 G20 ICH_PWRGD


17 H_STP_CPU# STP_CPU#/GPIO25 PW ROK ICH_PWRGD 6,44
DPRSLPVR

SYS GPIO
DPRSLPVR 6,51
R581 CLKRUN#

Power MGT
28,31 CLKRUN#
L4 CLKRUN#/GPIO32 DPRSLPVR/GPIO16 M2
B *10_NC R321 8.2K B
PCIE_WAKE# E20 B13 ICH_BATLOW# 2 1 +3.3V_SUS
30,33,34,42 PCIE_WAKE#
1

IRQ_SERIRQ W AKE# BATLOW #


28,31 IRQ_SERIRQ M5 SERIRQ
THERM_ALERT# AJ23 R3
39 THERM_ALERT# THRM# PW RBTN# SIO_PWRBTN# 31
Option to " Disable " ICH_PWRGD R530 2 1 10K
clkrun. Pulling it down IMVP_PWRGD D21 D20 RSV_ICH_LAN_RST#
31,44,51 IMVP_PWRGD VRMPW RGD LAN_RST# PAD T113
DPRSLPVR R356 1 2 100K
will keep the clks ICH_RSMRST#
T59 PAD A20 TP8 RSMRST# D22 ICH_RSMRST# 31
running. ICH_RSMRST# R517 2 1 10K
USB_MCARD2_DET# AG19 R5
33 USB_MCARD2_DET# TACH1/GPIO1 CK_PW RGD CLK_PWRGD 17
USB_MCARD3_DET# AH21 RSV_ICH_LAN_RST# R526 2 1 10K
33 USB_MCARD3_DET# TACH2/GPIO6
AG21 R6 ICH_CL_PWROK
31 SIO_EXT_WAKE# TACH3/GPIO7 CLPW ROK ICH_CL_PWROK 6,31
SIO_EXT_SMI# ICH_CL_PWROK R547 2 1 1M
31 SIO_EXT_SMI#
SIO_EXT_SCI#
A21
C12
GPIO8
B16
Non-iAMT
31 SIO_EXT_SCI# LANPHYPC/GPIO12 SLP_M# PAD T62
T61 PAD C21 ENGDET/GPIO13
37 KB_LED_DET# AE18 TACH0/GPIO17 CL_CLK0 F24 CL_CLK0 6
PCIE_MCARD1_DET# R354 2 1 4.7K K1 B19 RSV_ICH_CL_CLK1
34 PCIE_MCARD1_DET# GPIO18 CL_CLK1 PAD T118

GPIO
PCIE_MCARD2_DET#

Controller Link
33 PCIE_MCARD2_DET# AF8 GPIO20
PCIE_MCARD3_DET# AJ22 F22
33 PCIE_MCARD3_DET# SCLOCK/GPIO22 CL_DATA0 CL_DATA0 6 +3.3V_SUS
A9 C19 RSV_ICH_CL_DATA1
34 WLAN_RADIO_DIS# QRT_STATE0/GPIO27 CL_DATA1 PAD T115
T116 PAD D19 QRT_STATE1/GPIO28
L1 C25 CL_VREF0 RSV_GPIO10 R532 2 1 10K
17 SATA_CLKREQ# SATACLKREQ#/GPIO35 CL_VREF0
PLTRST_DELAY# AE19 A19 CL_VREF1
18 PLTRST_DELAY# SLOAD/GPIO38 CL_VREF1
33 WPAN_RADIO_DIS_MINI# AG22 SDATAOUT0/GPIO39
33 WWAN_RADIO_DIS# AF21 SDATAOUT1/GPIO48 CL_RST0# F21 ICH_CL_RST0# 6
T56 PAD AH24 D18 CL_RST1#
GPIO49 CL_RST1# PAD T122
T68 PAD A8 GPIO57/CLGPIO5
A16 RSV_GPIO24
MEM_LED/GPIO24 PAD T63
SPKR M7 C18 RSV_GPIO10
40 SPKR SPKR ALERT#/GPIO10 PAD T117
MCH_ICH_SYNC# RSV_GPIO14
C 6 MCH_ICH_SYNC# AJ24
B21
MCH_SYNC# NETDETECT/GPIO14 C11
C20 RSV_WOL_EN
PAD T64 DIS:ALW C

MISC
11 ICH_RSVD TP3 W OL_EN/GPIO9 PAD T114
TP9
T57 PAD
T60 PAD TP10
AH20
AJ20
TP9 R325 8.2K UMA:SUS
TP11 TP10
T58 PAD AJ21 TP11 2 1 +3.3V_SUS +3.3V_RUN +3.3V_ALW +3.3V_SUS
ICH9M REV 1.0 Non-iAMT

2
R525 2 1 10K PLTRST_DELAY#
+3.3V_RUN +3.3V_RUN R516 R313 R314
Non-iAMT 3.24K/F *3.24K/F_NC*3.24K/F_NC
SMbus address D2
1

1
2
4
R544
+3.3V_RUN *1K_NC These are for CL_VREF0 CL_VREF1
backdrive issue. RP42
R522 2 1 *2.2K_NC IMVP_PWRGD 2.2KX2
2

1
SPKR
2

1
R527 1 2 100K USB_MCARD2_DET# C729 R515 C421 R310
1
3

R294 1 2 100K USB_MCARD3_DET# Q40 0.1U 453/F *0.1U_NC *453/F_NC


R355 1 2 100K PCIE_MCARD1_DET# No Reboot strap. 3 1
30,33,34 ICH_SMBDATA MEM_SDATA 15

2
R551 1 2 100K PCIE_MCARD2_DET#

2
R292 1 2 100K PCIE_MCARD3_DET# Low = Default.
SPKR High = No Reboot. 2N7002W-7-F 10 10

+3.3V_RUN

+3.3V_RUN
CL_VREF0/1 ~=0.405V
2

R286 2 1 *10K_NC MCH_ICH_SYNC# Q41


D R545 2 1 10K IRQ_SERIRQ 3 1 D
30,33,34 ICH_SMBCLK MEM_SCLK 15
R289 2 1 10K THERM_ALERT#

2N7002W-7-F
QUANTA
+3.3V_SUS

Title
COMPUTER

https://Dr-Bios.com
R523 2 1 10K RSV_WOL_EN ICH9-M (PM,GPIO,SMB,CL)
R305 2 1 10K SIO_EXT_SMI#
R317 1 2 100K USB_MCARD1_DET# Size Document Number Rev
FM8 2A

Date: Tuesday, November 25, 2008 Sheet 13 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U22E U22F
AA26 VSS[001] VSS[107] H5 +RTC_CELL A23 VCCRTC VCC1_05[01] A15 +1.05V_VCCP
AA27 J23 B15 +1.05V_VCCP +1.5V_RUN
VSS[002] VSS[108] VCC1_05[02]

2
AA3 J26 A6 C15 D15
VSS[003] VSS[109] V5REF VCC1_05[03]

2
AA6 J27 C415 C414 C413 D15 1
VSS[004] VSS[110] VCC1_05[04] R290
AB1 AC22 1U 0.1U 0.1U AE1 E15 C743 C761

1
VSS[005] VSS[111] R333 10 10 10 10 V5REF_SUS VCC1_05[05] 0.1U 0.1U
AA23 K28 F15 3 1 2

1
VSS[006] VSS[112] VCC1_05[06] 10 10
AB28 VSS[007] VSS[113] K29 +5V_RUN 1 2 AA24 VCC1_5_B[01] VCC1_05[07] L11
AB29 L13 AA25 L12 2 10
VSS[008] VSS[114] D17 VCC1_5_B[02] VCC1_05[08]
AB4 VSS[009] VSS[115] L15 AB24 VCC1_5_B[03] VCC1_05[09] L14
AB5 L2 +3.3V_RUN 2 1 +ICH_V5REF_RUN AB25 L16 BAT54C T/R
VSS[010] VSS[116] 603 VCC1_5_B[04] VCC1_05[10] 805
AC17 VSS[011] VSS[117] L26 AC24 VCC1_5_B[05] VCC1_05[11] L17
AC26 L27 SDMK0340L-7-F 2mA AC25 L18
VSS[012] VSS[118] VCC1_5_B[06] VCC1_05[12]

2
A
AC27 VSS[013] VSS[119] L5 AD24 VCC1_5_B[07] VCC1_05[13] M11 A
AC3 L7 C434 AD25 M18 1uH+-20%_800mA
VSS[014] VSS[120] 0.1U VCC1_5_B[08] VCC1_05[14]
AD1 M12 Non-iAMT AE25 P11

1
VSS[015] VSS[121] VCC1_5_B[09] VCC1_05[15]

CORE
AD10 M13 R344 10 10 AE26 P18 L41 +1.5V_RUN
VSS[016] VSS[122] VCC1_5_B[10] VCC1_05[16] 1uH R268 1
AD12 VSS[017] VSS[123] M14 +5V_SUS 1 2 AE27 VCC1_5_B[11] VCC1_05[17] T11
AD13 M15 AE28 T18 +1.5V_DMIPLL 2 1+1.5V_DMIPLL_R 2 1
VSS[018] VSS[124] D19 VCC1_5_B[12] VCC1_05[18]
AD14 VSS[019] VSS[125] M16 AE29 VCC1_5_B[13] VCC1_05[19] U11

2
AD17 M17 +3.3V_SUS 2 1 +ICH_V5REF_SUS F25 U18
VSS[020] VSS[126] VCC1_5_B[14] VCC1_05[20] C400 C399
AD18 VSS[021] VSS[127] M23 G25 VCC1_5_B[15] VCC1_05[21] V11

2
AD21 M28 SDMK0340L-7-F 2mA H24 V12 0.01U 10U

1
VSS[022] VSS[128] C446 VCC1_5_B[16] VCC1_05[22] 25 6.3
AD28 VSS[023] VSS[129] M29 H25 VCC1_5_B[17] VCC1_05[23] V14
AD29 N11 0.1U J24 V16 603

1
VSS[024] VSS[130] 10 VCC1_5_B[18] VCC1_05[24]
AD4 VSS[025] VSS[131] N12 J25 VCC1_5_B[19] VCC1_05[25] V17
AD5 N13 K24 V18 L80
VSS[026] VSS[132] VCC1_5_B[20] VCC1_05[26] +VCC_DMI_ICH
AD6 VSS[027] VSS[133] N14 K25 VCC1_5_B[21] +1.05V_VCCP
AD7 N15 L23 23mA BLM21PG331SN1D
VSS[028] VSS[134] VCC1_5_B[22]

1
AD9 N16 L24 R29 805
VSS[029] VSS[135] VCC1_5_B[23] VCCDMIPLL

VCCA3GP
AE12 N17 L25 48mA C737
VSS[030] VSS[136] VCC1_5_B[24] 4.7U
AE13 N18 M24 W 23

2
VSS[031] VSS[137] VCC1_5_B[25] VCC_DMI[1] 603
AE14 VSS[032] VSS[138] N26 M25 VCC1_5_B[26] VCC_DMI[2] Y23
AE16 N27 N23 2mA 6.3
VSS[033] VSS[139] +1.5V_RUN VCC1_5_B[27]
AE17 VSS[034] VSS[140] P12 N24 VCC1_5_B[28] V_CPU_IO[1] AB23 +1.05V_VCCP
AE2 VSS[035] VSS[141] P13 N25 VCC1_5_B[29] V_CPU_IO[2] AC23

1
AE20 VSS[036] VSS[142] P14 P24 VCC1_5_B[30] VCC3_3 308mA
AE24 P15 P25 AG29 +3.3V_RUN C732 C754 C742
VSS[037] VSS[143] L79 VCC1_5_B[31] VCC3_3[01] 0.1U 0.1U 4.7U
AE3 P16 FB_330ohm+-25%_100mHz_ R24

2
VSS[038] VSS[144] BLM21PG331SN1D VCC1_5_B[32] 10 10 603
AE4 P17 R25 AJ6
AE6
VSS[039] VSS[145]
P2 805 1.5A_0.09 ohm DC R26
VCC1_5_B[33] VCC3_3[02] 6.3
VSS[040] VSS[146] VCC1_5_B[34]
AE9 VSS[041] VSS[147] P23 R27 VCC1_5_B[35] VCC3_3[07] AC10
AF13 P28 +1.5V_PCIE_ICH T24
VSS[042] VSS[148] VCC1_5_B[36]

2
B AF16 VSS[043] VSS[149] P29 646mA T27 VCC1_5_B[37] VCC3_3[03] AD19 WWAN Noise - ICH improvements B

VCCP_CORE
AF18 P4 T28 AF20 C793 C724 C779
VSS[044] VSS[150] VCC1_5_B[38] VCC3_3[04] 0.1U 0.1U 0.1U +3.3V_RUN
AF22 P7 T29 AG24

1
VSS[045] VSS[151] C408 VCC1_5_B[39] VCC3_3[05] 10 10 10
AH26 VSS[046] VSS[152] R11 U24 VCC1_5_B[40] VCC3_3[06] AC20
1

2
AF26 R12 + 220uF U25
VSS[047] VSS[153] 2.5 C394 C396 C731 VCC1_5_B[41]
AF27 VSS[048] VSS[154] R13 V24 VCC1_5_B[42] VCC3_3[08] B9

1
AF5 R14 7343 22U 22U 2.2U V25 F9
2

1
VSS[049] VSS[155] VCC1_5_B[43] VCC3_3[09]

2
AF7 R15 10 10 10 U23 G3 C728 C767 C778 C730
VSS[050] VSS[156] 1206 1206 805 VCC1_5_B[44] VCC3_3[10] C774 C734 C770 *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC
AF9 R16 W 24 G6

2
VSS[051] VSS[157] VCC1_5_B[45] VCC3_3[11] 0.1U 0.1U 0.1U
AG13 R17 W 25 J2

PCI

1
VSS[052] VSS[158] VCC1_5_B[46] VCC3_3[12] 10 10 10 +3.3V_RUN
AG16 VSS[053] VSS[159] R18 K23 VCC1_5_B[47] VCC3_3[13] J7
AG18 R28 Y24 K7 10 10 10 10
VSS[054] VSS[160] VCC1_5_B[48] VCC3_3[14] R510 0
AG20 VSS[055] VSS[161] T12 Y25 VCC1_5_B[49] 11mA
AG23 T13 AJ4 +VCC_HDA 2 1
VSS[056] VSS[162] +VCCSATPLL VCCHDA
AG3 VSS[057] VSS[163] T14 AJ19 VCCSATAPLL
AG6 T15 +1.5V_RUN AJ3 +VCCSUSHDA +3.3V_SUS
VSS[058] VSS[164] VCCSUSHDA

1
AG9 T16 +1.5V_RUN AC16 C791 R568 0
VSS[059] VSS[165] VCC1_5_A[01] TP_VCCSUS1.05_1 0.1U +VCCSUSHDA
AH12 VSS[060] VSS[166] T17 AD15 VCC1_5_A[02] VCCSUS1_05[1] AC8 PAD T140 2 1
1

1
AH14 T23 AD16 F17 TP_VCCSUS1.05_2 10

2
VSS[061] VSS[167] VCC1_5_A[03] VCCSUS1_05[2] PAD T119

1
AH17 B26 R328 C752 AE15 11mA C782
VSS[062] VSS[168] VCC1_5_A[04] +1.5V_RUN

ARX
AH19 U12 0 1U AF15 0.1U
2

VSS[063] VSS[169] 10 VCC1_5_A[05] TP_VCCSUS1.5_1 R528 *0_NC 10


AH2 U13 AG15 AD8

2
VSS[064] VSS[170] 603 VCC1_5_A[06] VCCSUS1_5[1] PAD T138
AH22 U14 AH15 2 1
2

VSS[065] VSS[171] +VCCSATPLL_L VCC1_5_A[07] TP_VCCSUS1.5_2 1


AH25 VSS[066] VSS[172] U15 AJ15 VCC1_5_A[08] VCCSUS1_5[2] F18 2
AH28 U16 C744 0.1U
VSS[067] VSS[173] L50 10
AH5 VSS[068] VSS[174] U17 +1.5V_RUN AC11 VCC1_5_A[09]
AH8 AD23 10uH AD11 A18 +1.5V_SUS
VSS[069] VSS[175] VCC1_5_A[10] VCCSUS3_3[01]
1

AJ12 U26 805 AE11 D16 +3.3V_SUS R569 *0_NC

VCCPSUS
VSS[070] VSS[176] C747 VCC1_5_A[11] VCCSUS3_3[02] +VCCSUSHDA 2
AJ14 VSS[071] VSS[177] U27 10uH+-20%_100mA AF11 VCC1_5_A[12] VCCSUS3_3[03] D17 1

ATX
AJ17 U3 1U AG10 E22
2

VSS[072] VSS[178] VCC1_5_A[13] VCCSUS3_3[04]

1
C C
AJ8 V1 +VCCSATPLL 47mA 10 AG11 11mA C799
VSS[073] VSS[179] VCC1_5_A[14]

1
B11 V13 603 AH10 C751 *0.1U_NC
VSS[074] VSS[180] VCC1_5_A[15]
1

B14 V15 AJ10 AF1 C773 C772 0.1U 10

2
VSS[075] VSS[181] C423 C424 VCC1_5_A[16] VCCSUS3_3[05] 0.22U 0.22U 10
B17 V23 VCC1_5_A TOTAL 1.342A VCCSUS 3_3 212mA

2
VSS[076] VSS[182] 1U 10U
B2 V28 AC9
2

VSS[077] VSS[183] 10 6.3 VCC1_5_A[17] 10V 10V


B20 VSS[078] VSS[184] V29 VCCSUS3_3[06] T1
B23 V4 603 603 AC18 T2
VSS[079] VSS[185] VCC1_5_A[18] VCCSUS3_3[07]
B5 VSS[080] VSS[186] V5 AC19 VCC1_5_A[19] VCCSUS3_3[08] T3
B8 VSS[081] VSS[187] W 26 VCCSUS3_3[09] T4 WWAN Noise - ICH improvements RESERVE 1.5V_SUS FOR VCCSUSHDA
C26 VSS[082] VSS[188] W 27 AC21 VCC1_5_A[20] VCCSUS3_3[10] T5
C27 VSS[083] VSS[189] W3 VCCSUS3_3[11] T6
E11 Y1 G10 U6 +1.5V_SUS
VCCPUSB

VSS[084] VSS[190] VCC1_5_A[21] VCCSUS3_3[12]

1
E14 Y28 +1.5V_RUN G9 U7 C764 C790 C438 C753 C781 +3.3V_SUS
VSS[085] VSS[191] VCC1_5_A[22] VCCSUS3_3[13] *0.1U_NC *0.1U_NC *0.1U_NC *0.1U_NC 0.1U U27
E18 VSS[086] VSS[192] Y29 11mA VCCSUS3_3[14] V6
E2 Y4 AC12 V7 10 10 10 10 10 3 4

2
VSS[087] VSS[193] VCC1_5_A[23] VCCSUS3_3[15] VIN VOUT
E21 VSS[088] VSS[194] Y5 AC13 VCC1_5_A[24] VCCSUS3_3[16] W6
E24 AG28 +1.5V_RUN AC14 W7
VSS[089] VSS[195] VCC1_5_A[25] VCCSUS3_3[17] C454
E5 VSS[090] VSS[196] AH6 VCCSUS3_3[18] Y6
E8 AF2 AJ5 Y7 1 R347
VSS[091] VSS[197] VCCUSBPLL VCCSUS3_3[19] SHDN R1
2

F16 B25 T7 *1U/6.3V_NC *22.1K/F_NC


VSS[092] VSS[198] VCCSUS3_3[20]
2

F28 C780 AA7


VSS[093] VCC1_5_A[26]
USB CORE

F29 A1 0.1U C769 AB6 G22 +VCCCL1_05 C457


1

VSS[094] VSS_NCTF[01] 10 0.1U VCC1_5_A[27] VCCCL1_05


G12 A2 AB7 2 5
1

VSS[095] VSS_NCTF[02] 10 VCC1_5_A[28] +VCCCL1_5 GND SET *4.7U/6.3V_NC


G14 VSS[096] VSS_NCTF[03] A28 AC6 VCC1_5_A[29] VCCCL1_5 G23
G18 A29 AC7 *IC(5P) RT9193-15PB(SOT-23)_NC
VSS[097] VSS_NCTF[04] VCC1_5_A[30]

1
G21 VSS[098] VSS_NCTF[05] AH1

2
G24 AH29 TP_VCCSUSLAN1 A10 A24 C736 C735 C738 R346
G26
VSS[099] VSS_NCTF[06]
AJ1 Non-iAMT
T66
T65
PAD TP_VCCSUSLAN2 A11
VCCLAN1_05[1] VCCCL3_3[1]
B24
+3.3V_RUN
*0.1U_NC *1U_NC 0.1U R2 *100K/F_NC

2
VSS[100] VSS_NCTF[07] PAD VCCLAN1_05[2] VCCCL3_3[2] 10 10 10
G27 AJ2 Non-iAMT

1
VSS[101] VSS_NCTF[08] 603
D G8 VSS[102] VSS_NCTF[09] AJ28 +3.3V_RUN A12 VCCLAN3_3[1] 19mA D
H2 VSS[103] VSS_NCTF[10] AJ29 19mA B12 VCCLAN3_3[2]
2

H23 VSS[104] VSS_NCTF[11] B1


H28 B29 C763 ICH_GLANPLL A27 +1.5V_RUN
H29
VSS[105] VSS_NCTF[12] 0.1U VCCGLANPLL
QUANTA
1

VSS[106]
GLAN POWER

10 23mA D28 VCCGLAN1_5[1]


ICH9M REV 1.0
+1.5V_PCIE_ICH
D29
E26
VCCGLAN1_5[2]
VCCGLAN1_5[3]
L42 1uH/300mA_8 ICH_GLANPLL
Title
COMPUTER

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E27 VCCGLAN1_5[4]
1

C726 80mA C395 C401 ICH9-M (POWER,GND)


4.7U A26 10U 2.2U
+3.3V_RUN VCCGLAN3_3
6.3 805 603 Size Document Number Rev
2

603 1mA ICH9M REV 1.0 10 6.3 FM8 2A

Date: Tuesday, November 25, 2008 Sheet 14 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS


DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7 DDR_B_DM[0..7] 7
V_DDR_MCH_REF V_DDR_MCH_REF
DDR_A_DQS[0..7] 7 DDR_B_D[0..63] 7
DDR_A_DQS#[0..7] 7 DDR_B_DQS[0..7] 7
DDR_A_MA[0..14] 7,16 DDR_B_DQS#[0..7] 7
JDIM1 JDIM2
DDR_B_MA[0..14] 7,16
1 VREF VSS46 2 1 VREF VSS46 2
3 4 DDR_A_D4 V_DDR_MCH_REF 3 4 DDR_B_D4
DDR_A_D1 VSS47 DQ4 DDR_A_D5 DDR_B_D0 VSS47 DQ4 DDR_B_D1 V_DDR_MCH_REF
5 DQ0 DQ5 6 5 DQ0 DQ5 6
DDR_A_D0 7 8 DDR_B_D5 7 8
DQ1 VSS15 DDR_A_DM0 DQ1 VSS15 DDR_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
DDR_A_DQS#0 11 12 DDR_B_DQS#0 11 12
DQS#0 VSS5 DQS#0 VSS5

1
DDR_A_DQS0 13 14 DDR_A_D7 DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DQS0 DQ6

1
A A
15 16 DDR_A_D6 C348 C332 15 16 DDR_B_D3
DDR_A_D3 VSS48 DQ7 0.1U 2.2U DDR_B_D2 VSS48 DQ7 C341 C334
17 18 17 18

2
DDR_A_D2 DQ2 VSS16 DDR_A_D13 603 DDR_B_D7 DQ2 VSS16 DDR_B_D12 0.1U 2.2U
19 20 19 20

2
DQ3 DQ12 DDR_A_D9 10 6.3 DQ3 DQ12 DDR_B_D13 603
21 VSS38 DQ13 22 21 VSS38 DQ13 22
DDR_A_D12 23 24 DDR_B_D8 23 24 10 6.3
DDR_A_D8 DQ8 VSS17 DDR_A_DM1 DDR_B_D9 DQ8 VSS17 DDR_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR3 6
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#3 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D10 35 36 DDR_A_D14 DDR_B_D10 35 36 DDR_B_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15 DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40

41 VSS18 VSS20 42 41 VSS18 VSS20 42


DDR_A_D17 43 44 DDR_A_D20 DDR_B_D17 43 44 DDR_B_D16
DDR_A_D21 DQ16 DQ20 DDR_A_D16 DDR_B_D20 DQ16 DQ20 DDR_B_D21
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 VSS1 VSS6 48 47 VSS1 VSS6 48
DDR_A_DQS#2 49 50 PM_EXTTS#0 PM_EXTTS#0 6 DDR_B_DQS#2 49 50 PM_EXTTS#1 PM_EXTTS#1 6
DDR_A_DQS2 DQS#2 NC3 DDR_A_DM2 DDR_B_DQS2 DQS#2 NC3 DDR_B_DM2
51 DQS2 DM2 52 51 DQS2 DM2 52
53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D22 55 DQ18 DQ22 56 DDR_A_D18 DDR_B_D22 55 DQ18 DQ22 56 DDR_B_D18 +1.8V_SUS Place these Caps near So-Dimm1.
PC4800 DDR2 SDRAM
DDR_A_D23 57 58 DDR_A_D19 DDR_B_D19 57 58 DDR_B_D23
DQ19 DQ23 DQ19 DQ23
59 VSS22 VSS24 60 59 VSS22 VSS24 60
DDR_A_D24 61 62 DDR_A_D29 DDR_B_D29 61 62 DDR_B_D24
DDR_A_D25 DQ24 DQ28 DDR_A_D28 DDR_B_D28 DQ24 DQ28 DDR_B_D25
63 64 63 64

PC4800 DDR2 SDRAM


DQ25 DQ29 DQ25 DQ29

1
65 66 65 66 C258 C181 C264 C255 C572
VSS23 VSS25 VSS23 VSS25
SO-DIMM (200P)

DDR_A_DM3 67 68 DDR_A_DQS#3 DDR_B_DM3 67 68 DDR_B_DQS#3 2.2U 2.2U 2.2U 2.2U 2.2U


DM3 DQS#3 DDR_A_DQS3 DM3 DQS#3 DDR_B_DQS3 603 603 603 603 603
69 70 69 70

2
NC4 DQS3 NC4 DQS3 6.3 6.3 6.3 6.3 6.3
B 71 VSS9 VSS10 72 71 VSS9 VSS10 72 B
DDR_A_D26 73 74 DDR_A_D31 DDR_B_D26 73 74 DDR_B_D31
DQ26 DQ30 DQ26 DQ30

SO-DIMM (200P)
DDR_A_D30 75 76 DDR_A_D27 DDR_B_D27 75 76 DDR_B_D30
DQ27 DQ31 DQ27 DQ31
77 VSS4 VSS8 78 77 VSS4 VSS8 78
79 80 79 80 +1.8V_SUS
6,16 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6,16 6,16 DDR_CKE3_DIMMB CKE0 CKE1 DDR_CKE4_DIMMB 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84 Place these Caps near So-Dimm2.
DDR_A_BS2 85 86 DDR_A_MA14 DDR_B_BS2 85 86 DDR_B_MA14
7,16 DDR_A_BS2 A16_BA2 A14 7,16 DDR_B_BS2 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
A12 A11 A12 A11

1
DDR_A_MA9 91 92 DDR_A_MA7 DDR_B_MA9 91 92 DDR_B_MA7 C555 C569 C576 C580 C560
DDR_A_MA8 A9 A7 DDR_A_MA6 DDR_B_MA8 A9 A7 DDR_B_MA6 2.2U 2.2U 2.2U 2.2U 2.2U
93 A8 A6 94 93 A8 A6 94
95 96 95 96 603 603 603 603 603

2
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4
97 A5 A4 98 97 A5 A4 98
DDR_A_MA3 99 100 DDR_A_MA2 DDR_B_MA3 99 100 DDR_B_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_B_MA1 A3 A2 DDR_B_MA0 6.3 6.3 6.3 6.3 6.3
101 A1 A0 102 101 A1 A0 102
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1
A10/AP BA1 DDR_A_BS1 7,16 A10/AP BA1 DDR_B_BS1 7,16
DDR_A_BS0 107 108 DDR_A_RAS# DDR_B_BS0 107 108 DDR_B_RAS# +1.8V_SUS
7,16 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 7,16 7,16 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 7,16
7,16 DDR_A_WE#
DDR_A_WE# 109 W E# S0# 110 DDR_CS0_DIMMA# 6,16 7,16 DDR_B_WE#
DDR_B_WE# 109 W E# S0# 110 DDR_CS2_DIMMB# 6,16 Place these Caps near So-Dimm1.
111 VDD2 VDD1 112 111 VDD2 VDD1 112
DDR_A_CAS# 113 114 M_ODT0 DDR_B_CAS# 113 114 M_ODT2
7,16 DDR_A_CAS# CAS# ODT0 M_ODT0 6,16 7,16 DDR_B_CAS# CAS# ODT0 M_ODT2 6,16

1
115 116 DDR_A_MA13 115 116 DDR_B_MA13
6,16 DDR_CS1_DIMMA# S1# A13 6,16 DDR_CS3_DIMMB# S1# A13

1
117 118 117 118 +
M_ODT1 VDD3 VDD6 M_ODT3 VDD3 VDD6 C251 C164 C287 C244 C338
6,16 M_ODT1 119 ODT1 NC2 120 6,16 M_ODT3 119 ODT1 NC2 120
121 122 121 122 0.1U 0.1U 0.1U 0.1U *330U/6.3V_NC

2
DDR_A_D36 VSS11 VSS12 DDR_A_D33 DDR_B_D32 VSS11 VSS12 DDR_B_D36 7343
123 DQ32 DQ36 124 123 DQ32 DQ36 124
DDR_A_D37 125 126 DDR_A_D32 DDR_B_D33 125 126 DDR_B_D37 6.3
DQ33 DQ37 DQ33 DQ37 10 10 10 10
127 VSS26 VSS28 128 127 VSS26 VSS28 128
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_B_DQS#4 129 130 DDR_B_DM4 +1.8V_SUS
C DQS#4 DM4 DQS#4 DM4 C
DDR_A_DQS4 131 DQS4 VSS42 132 DDR_B_DQS4 131 DQS4 VSS42 132 Place these Caps near So-Dimm2.
133 134 DDR_A_D34 133 134 DDR_B_D38
DDR_A_D35 VSS2 DQ38 DDR_A_D39 DDR_B_D34 VSS2 DQ38 DDR_B_D39
135 DQ34 DQ39 136 135 DQ34 DQ39 136
DDR_A_D38 137 138 DDR_B_D35 137 138
DQ35 VSS55 DQ35 VSS55

1
139 140 DDR_A_D44 139 140 DDR_B_D44
DDR_A_D41 VSS27 DQ44 DDR_A_D45 DDR_B_D41 VSS27 DQ44 DDR_B_D45 C297 C285 C298 C247
141 DQ40 DQ45 142 141 DQ40 DQ45 142
DDR_A_D40 143 144 DDR_B_D40 143 144 0.1U 0.1U 0.1U 0.1U

2
DQ41 VSS43 DDR_A_DQS#5 DQ41 VSS43 DDR_B_DQS#5
145 VSS29 DQS#5 146 145 VSS29 DQS#5 146
DDR_A_DM5 147 148 DDR_A_DQS5 DDR_B_DM5 147 148 DDR_B_DQS5
DM5 DQS5 DM5 DQS5 10 10 10 10
149 VSS51 VSS56 150 149 VSS51 VSS56 150
DDR_A_D42 151 152 DDR_A_D43 DDR_B_D47 151 152 DDR_B_D43
DDR_A_D46 DQ42 DQ46 DDR_A_D47 DDR_B_D42 DQ42 DQ46 DDR_B_D46
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
DDR_A_D48 157 158 DDR_A_D52 DDR_B_D52 157 158 DDR_B_D48
DDR_A_D53 DQ48 DQ52 DDR_A_D49 DDR_B_D49 DQ48 DQ52 DDR_B_D55
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 NCTEST CK1 164 M_CLK_DDR1 6 163 NCTEST CK1 164 M_CLK_DDR4 6
165 VSS30 CK1# 166 M_CLK_DDR#1 6 165 VSS30 CK1# 166 M_CLK_DDR#4 6
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168 +3.3V_RUN
DDR_A_DQS6 DQS#6 VSS45 DDR_A_DM6 DDR_B_DQS6 DQS#6 VSS45 DDR_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172
DDR_A_D50 173 174 DDR_A_D51 +3.3V_RUN DDR_B_D53 173 174 DDR_B_D54
DQ50 DQ54 DQ50 DQ54

1
DDR_A_D54 175 176 DDR_A_D55 DDR_B_D51 175 176 DDR_B_D50
DQ51 DQ55 DQ51 DQ55 C69 C70
177 VSS33 VSS35 178 177 VSS33 VSS35 178
DDR_A_D56 179 180 DDR_A_D60 DDR_B_D56 179 180 DDR_B_D61 2.2U 0.1U

2
DQ56 DQ60 DQ56 DQ60
1

DDR_A_D61 181 182 DDR_A_D57 DDR_B_D57 181 182 DDR_B_D60 603


DQ57 DQ61 C71 C72 DQ57 DQ61 6.3 10
183 VSS3 VSS7 184 183 VSS3 VSS7 184
DDR_A_DM7 185 186 DDR_A_DQS#7 2.2U 0.1U DDR_B_DM7 185 186 DDR_B_DQS#7
2

DM7 DQS#7 DDR_A_DQS7 603 DM7 DQS#7 DDR_B_DQS7


187 VSS34 DQS7 188 187 VSS34 DQS7 188
D DDR_A_D59 189 190 6.3 10 DDR_B_D62 189 190 D
DDR_A_D62 DQ58 VSS36 DDR_A_D58 DDR_B_D59 DQ58 VSS36 DDR_B_D58
191 DQ59 DQ62 192 191 DQ59 DQ62 192
193 194 DDR_A_D63 193 194 DDR_B_D63
CLK_SDATA VSS14 DQ63 CLK_SDATA VSS14 DQ63 +3.3V_RUN
195 196 195 196
13 MEM_SDATA
13 MEM_SCLK
+3.3V_RUN
CLK_SCLK 197
199
SDA
SCL
VSS13
SA0 198
200 +3.3V_RUN
CLK_SCLK 197
199
SDA
SCL
VSS13
SA0 198
200 R49 2 1 10K
QUANTA
VDD(SPD) SA1 VDD(SPD) SA1
COMPUTER
2

2-1734073-1 SMbus address A4 1-1734075-1


R46 R47 R51 Title

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SMbus address A0 10K 10K 10K DDR2 SO-DIMM
CLOCK 0,1 CLOCK 2,3
H 5.2 H 9.2 Size Document Number Rev
CKE 0,1 CKE 2,3
1

FM8 2A

Date: Tuesday, November 25, 2008 Sheet 15 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+0.9V_DDR_VTT Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

A A

1
C241 C296 C588 C286 C587 C182 C312 C261 C165 C148 C153 C313 C302 C179
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U

2
10 10 10 10 10 10 10 10 10 10 10 10 10 10

+0.9V_DDR_VTT

1
C219 C203 C245 C235 C250 C195 C319 C277 C175 C311 C158 C190 C594 C257
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
2

2
10 10 10 10 10 10 10 10 10 10 10 10 10 10

B B
+0.9V_DDR_VTT
7,15 DDR_A_MA[0..14] DDR_B_MA[0..14] 7,15
RP18 RP17
DDR_A_MA8 2 1 1 2 DDR_B_MA11
DDR_A_MA9 4 3 3 4 DDR_B_MA7

56X2 56X2
RP16 RP15
DDR_A_MA5 2 1 1 2 DDR_B_MA6
DDR_A_MA3 4 3 3 4 DDR_B_MA4

56X2 56X2
RP8 RP7
7,15 DDR_A_BS1 DDR_A_BS1 2 1 1 2 DDR_B_RAS#
DDR_B_RAS# 7,15
7,15 DDR_A_RAS# DDR_A_RAS# 4 3 3 4 DDR_B_BS1
DDR_B_BS1 7,15
56X2 56X2
RP3 RP4
DDR_A_MA13 2 1 1 2 M_ODT2
M_ODT2 6,15
M_ODT0 4 3 3 4 DDR_B_MA13
6,15 M_ODT0
56X2 56X2
RP22 RP13
DDR_A_MA7 2 1 1 2 DDR_B_MA5
DDR_A_MA11 4 3 3 4 DDR_B_MA8

56X2 56X2
RP21 RP19
C C
DDR_A_MA12 2 1 1 2 DDR_B_MA9
7,15 DDR_A_BS2 DDR_A_BS2 4 3 3 4 DDR_B_MA12 Layout notice:
Layout notice: Please these resistor
Please these resistor 56X2 56X2
RP20 RP14 closely DIMMB,all
closely DIMMA,all DDR_A_MA6 DDR_B_MA3 trace length<750 mil.
2 1 1 2
trace length<750 mil. DDR_A_MA4 4 3 3 4 DDR_B_MA1

56X2 56X2
RP6 RP12
DDR_A_BS0 2 1 1 2 DDR_B_MA10
7,15 DDR_A_BS0
DDR_A_MA10 4 3 3 4 DDR_B_BS0
DDR_B_BS0 7,15
56X2 56X2
RP5 RP9
DDR_A_CAS# 2 1 1 2 DDR_B_WE#
7,15 DDR_A_CAS# DDR_B_WE# 7,15
DDR_A_WE# 4 3 3 4 DDR_B_CAS#
7,15 DDR_A_WE# DDR_B_CAS# 7,15
56X2 56X2
RP11 RP10
DDR_A_MA0 2 1 1 2 DDR_B_MA2
DDR_A_MA2 4 3 3 4 DDR_B_MA0

56X2 56X2
R121 1 2 56 R116 2 1 56
6,15 M_ODT1 M_ODT3 6,15
DDR_A_MA1 R137 1 2 56 R156 2 1 56
DDR_B_BS2 7,15
R119 1 2 56 R129 2 1 56
6,15 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 6,15
R117 1 2 56 R118 2 1 56
6,15 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 6,15
R165 1 2 56 R163 2 1 56
6,15 DDR_CKE0_DIMMA DDR_CKE3_DIMMB 6,15
D R171 1 2 56 R162 2 1 56 D
6,15 DDR_CKE1_DIMMA DDR_CKE4_DIMMB 6,15
DDR_A_MA14 R168 1 2 56 R155 2 1 56 DDR_B_MA14

QUANTA
Title
COMPUTER

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DDR2 RES. ARRAY

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 16 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Add capacitor pads for improving WWAN.

C402 20P 50 CLK_ICH_48M U21


C392 1 2 *27P_NC 50 CLK_ICH_14M
C389 1 2 *27P_NC 50 CLK_PCI_8512
C709 1 2 *27P_NC 50 CLK_PCI_PCCARD +CK_VDD_PCI 9 61
VDD_PCI CPU-0 CLK_CPU_BCLK 3
C398 1 2 *27P_NC 50 CLK_PCI_ICH 4 60
VDD_REF CPU-0# CLK_CPU_BCLK# 3
+CK_VDD_PLL3 23
+CK_VDD_48 VDD_PLL3
16 VDD_48 CPU-1 58 CLK_MCH_BCLK 5
+CK_VDD_SRC 46 57
VDD_SRC CPU-1# CLK_MCH_BCLK# 5
62
A
+CK_VDD_MAIN 19
VDD_CPU
CK505 SRC-8/CPU_ITP 54
53
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
A

VDD_IO SRC-8#/CPU_ITP#
Y2 27
CLK_XTAL_IN 1 2 CLK_XTAL_OUT 33
VDD_IO
VDD_IO
QFN64
43 VDD_IO SRC-0/DOT96 20 CLK_PCIE_VGA 18
14.318MHZ 52 21 CLK_PCIE_VGA# 18
VDD_IO SRC-0#/DOT96#
2

2
C405 C406 56
33P 33P VDD_IO 27M_NSS R280 2
SRC-1/SE1 24 1 33 CLK_VGA_27M_NSS 19
15 25 27M_SS R281 2 1 *33_NC CLK_VGA_27M_SS 19
1

1
50 50 GND SRC-1#/SE2
18
14.318MHz 22
GND
28 +3.3V_RUN
GND SRC-2/SATA CLK_PCIE_SATA 11
26 GND SRC-2#/SATA# 29 CLK_PCIE_SATA# 11
30 GND
36 GND CR#_C/SRC-3 31 CLK_PCIE_MINI3 33
SATA_CLKREQ# R261 1 2 475/F 49 32 H_STP_PCI# R312 2 1 10K
13 SATA_CLKREQ# GND CR#_D/SRC-3# CLK_PCIE_MINI3# 33
CLK_3GPLLREQ# R260 1 2 475/F 59 H_STP_CPU# R311 2 1 10K
6 CLK_3GPLLREQ# GND
1 GND SRC-4 34 CLK_MCH_3GPLL 6
SRC-4# 35 CLK_MCH_3GPLL# 6
CLK_LPC_DEBUG R508 1 2 22 SATA_CLKREQ#_C 8
33 CLK_LPC_DEBUG CR#_A/PCI-0
CLK_PCI_PCCARD R507 2 1 33 CLK_3GPLLREQ#_C 10 45
28 CLK_PCI_PCCARD CR_B/PCI-1 PCI_STOP#/SRC-5 H_STP_PCI# 13
PCI_PCCARD 11 44
TME/PCI-2 CPU_STOP#/SRC5-5# H_STP_CPU# 13
CLK_PCI_8512 R257 2 1 33 PCI_SIO 12
31 CLK_PCI_8512 SRC5_EN/PCI-3
27M_SEL 13 48
27M_SEL/PCI-4 SRC-6 CLK_PCIE_EXPCARD 30
CLK_PCI_ICH R258 2 1 33 PCI_ICH 14 47
12 CLK_PCI_ICH ITP_EN/PCIF-5# SRC-6# CLK_PCIE_EXPCARD# 30
CLK_ICH_48M R269 2 1 33 51 MINI1CLK_REQ#_C R298 1 2 475/F MINI1CLK_REQ#
13 CLK_ICH_48M CR#_F/SRC-7 MINI1CLK_REQ# 34
50 CARD_CLK_REQ#_C R297 1 2 475/F CARD_CLK_REQ#
CR#_E/SRC-7# CARD_CLK_REQ# 30
L44 R274 2.2K FSA 17
3,6 CPU_MCH_BSEL0 FSA/USB48
BLM18AG601SN1D R272 1 2 0 FSB 64 37
3,6 CPU_MCH_BSEL1 FSB/TEST_MODE SRC-9 CLK_PCIE_MINI2 33
B L39 R263 2 1 10K FSC 5 38 B
3,6 CPU_MCH_BSEL2 FSC/TEST_SEL/REF SRC-9# CLK_PCIE_MINI2# 33
BLM18AG601SN1D
CLK_ICH_14M R262 2 1 33 55 41
13 CLK_ICH_14M RESET# SRC-10 CLK_PCIE_ICH 12
13 CLK_PWRGD 63 CK_PW RGD/PD# SRC-10# 42 CLK_PCIE_ICH# 12
CLK_XTAL_OUT 2 40
XOUT CR#_H/SRC-11 CLK_PCIE_LOM 42
CLK_XTAL_IN 3 39
XIN CR#_G/SRC-11# CLK_PCIE_LOM# 42
CLK_SDATA 6
CLK_SCLK SDATA
7 SCLK GND 65

+3.3V_RUN
SLG8SP513V
CLK_3GPLLREQ# R251 2 1 10K
SATA_CLKREQ# R252 2 1 10K
CARD_CLK_REQ# R300 2 1 10K
MINI1CLK_REQ# R301 2 1 10K
PCI_PCCARD R505 1 2 *10K_NC

+3.3V_RUN +3.3V_RUN
PCI_SIO R266 1 2 *10K_NC
L48 BLM21PG600SN1D UMA without iAMT
+CK_VDD_MAIN

2
805
120 ohms@100Mhz R506
1

*10K_NC
C407 C727 C418 C733 C417 C409 C420 FSC FSB FSA CPU SRC PCI
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U *10U_NC
2

1
603 1 0 1 100 100 33
C C
10 10 10 10 10 10 6.3 PCI_ICH
0 0 1 133 100 33
L47 BLM21PG600SN1D R271 2.2 +3.3V_RUN 0 1 1 166 100 33
Non-iAMT

2
1 2 +CK_VDD_PCI
805 R503 0 1 0 200 100 33
SMbus address D2
1

120 ohms@100Mhz *10K_NC

2
4
C720 C719 0 0 0 266 100 33
0.1U 0.1U These are for
2

1
backdrive issue. RP39 1 0 0 333 100 33
10 10 2.2KX2
R512 2.2 1 1 0 400 100 33
2

1 2 +CK_VDD_PLL3
1
3

Q65 R506 POP: For Internal pull-low. 1 1 1 RSVD 100 33


1

3 1 CLK_SDATA R503 POP: For internal pull-high.


31,39 SMBDAT1
C725
0.1U 27M_SEL
2

2N7002W-7-F
10
+3.3V_RUN 27M_SEL PIN20 PIN21 PIN24 PIN25
R270 2.2
1 2 +CK_VDD_48 (PIN13)
96/ 96/

2
+3.3V_RUN 0=UMA DOT96T DOT96C 100M_T 100M_C
1

R253
C403 C404 10K
0.1U 4.7U 1 = Disc.
2

603
GRFX down SRCT0 SRCC0 27Mout 27MSSout

1
10 6.3
D 27M_SEL D

R529 2.2
2

1 2 +CK_VDD_SRC
Q64 2 QUANTA
1

3 1 CLK_SCLK R256
31,39 SMBCLK1
C740
0.1U
C739
0.1U
*10K_NC
COMPUTER
2

2N7002W-7-F Title

https://Dr-Bios.com
1

10 10 CLOCK GENERATOR

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 17 of 58


1 2 3 4 5 6 7 8
5 4 3 2 1

U32A
PART 1 OF 10
6 PCIE_MTX_GRX_P[0..15] 6 PCIE_MRX_GTX_P[0..15]
6 PCIE_MTX_GRX_N[0..15] 6 PCIE_MRX_GTX_N[0..15]

PCIE_MTX_GRX_P0 AF30 AH30 PCIE_MRX_GTX_C_P0


PCIE_MTX_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_MRX_GTX_C_N0 PCIE_MRX_GTX_P0 0.1U PCIE_MRX_GTX_C_P0
AE31 PCIE_RX0N PCIE_TX0N AG31 2 1 C814 10
PCIE_MRX_GTX_P1 0.1U 2 1 C815 10 PCIE_MRX_GTX_C_P1
D PCIE_MTX_GRX_P1 AE29 AG29 PCIE_MRX_GTX_C_P1 D
PCIE_MTX_GRX_N1 PCIE_RX1P PCIE_TX1P PCIE_MRX_GTX_C_N1 PCIE_MRX_GTX_P2 0.1U PCIE_MRX_GTX_C_P2
AD28 PCIE_RX1N PCIE_TX1N AF28 2 1 C816 10
PCIE_MRX_GTX_P3 0.1U 2 1 C817 10 PCIE_MRX_GTX_C_P3
PCIE_MTX_GRX_P2 AD30 AF27 PCIE_MRX_GTX_C_P2
PCIE_MTX_GRX_N2 PCIE_RX2P PCIE_TX2P PCIE_MRX_GTX_C_N2 PCIE_MRX_GTX_P4 0.1U PCIE_MRX_GTX_C_P4
AC31 PCIE_RX2N PCIE_TX2N AF26 2 1 C818 10

PCIE_MRX_GTX_P5 0.1U 2 1 C819 10 PCIE_MRX_GTX_C_P5


PCIE_MTX_GRX_P3 AC29 AD27 PCIE_MRX_GTX_C_P3
PCIE_MTX_GRX_N3 PCIE_RX3P PCIE_TX3P PCIE_MRX_GTX_C_N3 PCIE_MRX_GTX_P6 0.1U PCIE_MRX_GTX_C_P6
AB28 PCIE_RX3N PCIE_TX3N AD26 2 1 C820 10

PCI-EXPRESS INTERFACE
PCIE_MRX_GTX_P7 0.1U 2 1 C821 10 PCIE_MRX_GTX_C_P7
PCIE_MTX_GRX_P4 AB30 AC25 PCIE_MRX_GTX_C_P4
PCIE_MTX_GRX_N4 PCIE_RX4P PCIE_TX4P PCIE_MRX_GTX_C_N4 PCIE_MRX_GTX_P8 0.1U PCIE_MRX_GTX_C_P8
AA31 PCIE_RX4N PCIE_TX4N AB25 2 1 C822 10
PCIE_MRX_GTX_P9 0.1U 2 1 C823 10 PCIE_MRX_GTX_C_P9
PCIE_MTX_GRX_P5 AA29 Y23 PCIE_MRX_GTX_C_P5
PCIE_MTX_GRX_N5 PCIE_RX5P PCIE_TX5P PCIE_MRX_GTX_C_N5 PCIE_MRX_GTX_P10 0.1U PCIE_MRX_GTX_C_P10
Y28 PCIE_RX5N PCIE_TX5N Y24 2 1 C824 10

PCIE_MRX_GTX_P11 0.1U 2 1 C825 10 PCIE_MRX_GTX_C_P11


PCIE_MTX_GRX_P6 Y30 AB27 PCIE_MRX_GTX_C_P6
PCIE_MTX_GRX_N6 PCIE_RX6P PCIE_TX6P PCIE_MRX_GTX_C_N6 PCIE_MRX_GTX_P12 0.1U PCIE_MRX_GTX_C_P12
W 31 PCIE_RX6N PCIE_TX6N AB26 2 1 C826 10
PCIE_MRX_GTX_P13 0.1U 2 1 C827 10 PCIE_MRX_GTX_C_P13
PCIE_MTX_GRX_P7 W 29 Y27 PCIE_MRX_GTX_C_P7
C
PCIE_MTX_GRX_N7 PCIE_RX7P PCIE_TX7P PCIE_MRX_GTX_C_N7 PCIE_MRX_GTX_P14 0.1U PCIE_MRX_GTX_C_P14 C
V28 PCIE_RX7N PCIE_TX7N Y26 2 1 C828 10

PCIE_MRX_GTX_P15 0.1U 2 1 C829 10 PCIE_MRX_GTX_C_P15


PCIE_MTX_GRX_P8 V30 W 24 PCIE_MRX_GTX_C_P8
PCIE_MTX_GRX_N8 PCIE_RX8P PCIE_TX8P PCIE_MRX_GTX_C_N8
U31 PCIE_RX8N PCIE_TX8N W 23

PCIE_MRX_GTX_N0 0.1U 2 1 C830 10 PCIE_MRX_GTX_C_N0


PCIE_MTX_GRX_P9 U29 V27 PCIE_MRX_GTX_C_P9
PCIE_MTX_GRX_N9 PCIE_RX9P PCIE_TX9P PCIE_MRX_GTX_C_N9 PCIE_MRX_GTX_N1 0.1U PCIE_MRX_GTX_C_N1
T28 PCIE_RX9N PCIE_TX9N U26 2 1 C831 10
PCIE_MRX_GTX_N2 0.1U 2 1 C832 10 PCIE_MRX_GTX_C_N2
PCIE_MTX_GRX_P10 T30 U24 PCIE_MRX_GTX_C_P10
PCIE_MTX_GRX_N10 PCIE_RX10P PCIE_TX10P PCIE_MRX_GTX_C_N10 PCIE_MRX_GTX_N3 0.1U PCIE_MRX_GTX_C_N3
R31 PCIE_RX10N PCIE_TX10N U23 2 1 C833 10
PCIE_MRX_GTX_N4 0.1U 2 1 C834 10 PCIE_MRX_GTX_C_N4
PCIE_MTX_GRX_P11 R29 T26 PCIE_MRX_GTX_C_P11
PCIE_MTX_GRX_N11 PCIE_RX11P PCIE_TX11P PCIE_MRX_GTX_C_N11 PCIE_MRX_GTX_N5 0.1U PCIE_MRX_GTX_C_N5
P28 PCIE_RX11N PCIE_TX11N T27 2 1 C835 10
PCIE_MRX_GTX_N6 0.1U 2 1 C836 10 PCIE_MRX_GTX_C_N6
PCIE_MTX_GRX_P12 P30 T24 PCIE_MRX_GTX_C_P12
PCIE_MTX_GRX_N12 PCIE_RX12P PCIE_TX12P PCIE_MRX_GTX_C_N12 PCIE_MRX_GTX_N7 0.1U PCIE_MRX_GTX_C_N7
N31 PCIE_RX12N PCIE_TX12N T23 2 1 C837 10
PCIE_MRX_GTX_N8 0.1U 2 1 C838 10 PCIE_MRX_GTX_C_N8
PCIE_MTX_GRX_P13 N29 P27 PCIE_MRX_GTX_C_P13
PCIE_MTX_GRX_N13 PCIE_RX13P PCIE_TX13P PCIE_MRX_GTX_C_N13 PCIE_MRX_GTX_N9 0.1U PCIE_MRX_GTX_C_N9
B M28 PCIE_RX13N PCIE_TX13N P26 2 1 C839 10 B

PCIE_MRX_GTX_N10 0.1U 2 1 C840 10 PCIE_MRX_GTX_C_N10


PCIE_MTX_GRX_P14 M30 P24 PCIE_MRX_GTX_C_P14
PCIE_MTX_GRX_N14 PCIE_RX14P PCIE_TX14P PCIE_MRX_GTX_C_N14 PCIE_MRX_GTX_N11 0.1U PCIE_MRX_GTX_C_N11
L31 PCIE_RX14N PCIE_TX14N P23 2 1 C841 10
PCIE_MRX_GTX_N12 0.1U 2 1 C842 10 PCIE_MRX_GTX_C_N12
PCIE_MTX_GRX_P15 L29 M27 PCIE_MRX_GTX_C_P15
PCIE_MTX_GRX_N15 PCIE_RX15P PCIE_TX15P PCIE_MRX_GTX_C_N15 (1.1V) PCIE_MRX_GTX_N13 0.1U PCIE_MRX_GTX_C_N13
K30 PCIE_RX15N PCIE_TX15N N26 2 1 C843 10

100 MHz (+/-300 ppm) input frequency, 0-0.7 V single-ended swing. +PCIE_VDDC PCIE_MRX_GTX_N14 0.1U 2 1 C844 10 PCIE_MRX_GTX_C_N14
clock must be provided less than 400ns
after CLKREQ# is asserted PCIE_MRX_GTX_N15 0.1U 2 1 C845 10 PCIE_MRX_GTX_C_N15

AK30 AA22 PCIE_CALRN 2.0K R591


17 CLK_PCIE_VGA PCIE_REFCLKP PCIE_CALRN
17 CLK_PCIE_VGA# AK32 PCIE_REFCLKN
Y22 PCIE_CALRP 1.27K R592
PCIE_CALRP

R55 *0_NC
13 PLTRST_DELAY# 1 2 AL27 PERSTB
R56 0
1 2 M92-S2/M92-XT
A 6,12,30,31,33,34,42 PLTRST# A

QUANTA
43 COMPUTER
M92-S2 XT AJ072800T04 100-CG1675(216-0728004) Title
VGA-M92-XT (PCIe)
M92-S2 AJ072800T03 100-CG1643(216-0728003)
Size Document Number Rev
FM8 2A

Date: Tuesday, November 25, 2008 Sheet 18 of 58


5 4 3 2 1

https://Dr-Bios.com
5 4 3 2 1

VGA_BLU
MEMORY APERTURE SIZE SELECT VGA_GRN
VGA_RED
MEMORY CFG3 CFG2 CFG1 CFG0 36 48 DIS only
SIZE GPIO9 GPIO13 GPIO12 GPIO11 Q69 U32B R413 R414 R415 Layout Note:
SI2303BDS-T1-E3 PART 2 OF 10 150/F 150/F 150/F
Place 150 ohm
128MB 0 0 0 termination resistors
+3.3V_DELAY 3 1 +3.3V_RUN
DVP PORT DAC1 close to ATI CHIP.

1
256MB 0 0 1 U1 AM26 VGA_RED
8 R649 DVPCLK R
AK26
VGA_RED 27

2
RB
100K AC7
DVPCNTL_0
64MB 0 1 0 Y2
DVPCNTL_1
U5 AL25 VGA_GRN VGA_GRN 27

2
DVPCNTL_2 G
AJ25
GB
D 512MB 1 0 0 AA1
DVPCNTL_MVP_0
D
Y4
DVPCNTL_MVP_1 VGA_BLU
AH24 VGA_BLU 27
B
AG25
+3.3V_DELAY BB
8

3
R651 75K/F Y7
R595 1 DVPDATA_0
2 10K RAM_CFG0 2 Q72 V2 AH26 VGAHSYNC
VGAHSYNC 27
R597 1 DVPDATA_1 HSYNC
2 *10K_NC RAM_CFG1 2N7002W-7-F Y8 AJ27 VGAVSYNC
VGAVSYNC 27
R599 1 DVPDATA_2 VSYNC
2 *10K_NC RAM_CFG2 C867 V4

1
0.1U DVPDATA_3 +1.8V_RUN
AB7
DVPDATA_4
W1
10 DVPDATA_5 +AVDD L82 BLM15BD121SN1D
AB8 AG24
DVPDATA_6 AVDD
W3
OPTIONAL RC NETWORK DVPDATA_7
AB9
26,44,48,49,53 RUN_ON
R654 *0_NC
51 TO FINE TUNE
POWER SEQUENCING
W5
AC6
DVPDATA_8
DVPDATA_9 C846 C847 C848 C849
DVPDATA_10 10nF 0.1U 1uF 4.7uF
W6
31 AD7
DVPDATA_11
DVPDATA_12
GPIO Straps DESCRIPTION OF DEFAULT SETTINGS FM8 21,31 GFX_ON GFX_RUN_ON 50 AA3
DVPDATA_13 AVSSQ
AE22
R666 0 AC8
table setting DVPDATA_14
AA5
C868 As M82 design, for GPIO use DVPDATA_15 +1.8V_RUN
GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable) AE8
*0.1U_NC DVPDATA_16
GPIO0 0: 50% Tx output swing for mobile mode 0 AA6
DVPDATA_17
1: full Tx output swing (Default setting for Desktop) 25 AE9 AE23 +VDD1DI L83 BLM15BD121SN1D
603 DVPDATA_18 VDD1DI
AB4
RAM_TYPE_CFG0 DVPDATA_19
GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable) AD9
RAM_TYPE_CFG1 DVPDATA_20
GPIO1 0: Tx de-emphasis disabled for mobile mode 0 AB2
DVPDATA_21
1: Tx de-emphasis enabled (Default setting for Desktop) RAM_TYPE_CFG2 AC10 C850 C851 C852
RAM_TYPE_CFG3 DVPDATA_22 10nF 0.1U 1uF
AC5
DVPDATA_23
GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
GPIO2 0 : Default. (Driver Controlled Gen2) 0 VSS1DI
AD23
1 : Strap Controlled Gen2 R631 *0_reserve
OSC_SPREAD 1 2
Place very close to ASIC balls.
GPIO3 ATI reserved configuration straps. 0 I/O +3.3V_DELAY
C C
GPIO4 R633 *0_reserve GPIO0 U6 AD22 RSET R612 499R
ATI reserved configuration straps. 0 CLK_VGA_27M_SSIN_R GPIO1 GPIO_0 RSET
17 CLK_VGA_27M_SS 1 2 U10
GPIO2 GPIO_1
GPIO_5_AC_BATT T10

1
GPIO3 GPIO_2
GPIO5 0 : Battery saving mode = 0.0 V 0 U8
GPIO_3_SMBDATA
1 : AC (Performance mode) = 3.3 V R636 GPIO4 U7
*10K_reserve GPIO5 GPIO_4_SMBCLK DAC2
T9
R635 0 R619 1 0 GPIO_5_AC_BATT R616 R617
0 2 T8 AM12
GPIO6 ATI Internal use only
R634 100/F 1 2
50 GFX_CORE_CNTRL2
T7
GPIO_6_TACH R2
AK12 10K 10K

2
17 CLK_VGA_27M_NSS 31 PANEL_BKEN GPIO_7_BLON R2B
HDMI_HD_EN P10
R637 120/F GPIO_8_ROMSO HPD1
T158 PAD P4
GPIO_9_ROMSI
T159 PAD P2 AL11
+3.3V_DELAY RAM_CFG0 GPIO_10_ROMSCK G2
N6 AJ11

3
OSC_OUT RAM_CFG1 GPIO_11 G2B
1 2 XTALIN 23 N5
R603 *10K_NC GPIO0 R643 *182R_reserve RAM_CFG2 GPIO_12
1 2 N3 2

2
R604 *10K_NC GPIO1 GPIO_13
R605
1
1
2
2 *10K_NC GPIO2 R644 R638 *221/F_reserve R618 1 0 2
35 T86 PAD Y9
N1
GPIO_14_HPD2 B2
AK10
AL9 Q67
50 GFX_CORE_CNTRL0

1
R606 *10K_NC GPIO3 CLK_VGA_27M_SSIN_R GPIO_15_PWRCNTL_0 B2B MMST3904-7-F
1 2 *1M_reserve M4

3
R607 *10K_NC GPIO4 R141 1 *0_NC 2 GPIO_16_SSIN
R608
1
1
2
2 *10K_NC GPIO5 1
Y4
2 1 2
48 52 21 THERMAL_INT# R6
W10
GPIO_17_THERMAL_INT
XTALOUT 23 T23 PAD

1
R640 *0_reserve TEMP_FAIL GPIO_18_HPD3
M2 AL13 2 HDMI_DET 26
*27MHZ_reserve R622 1 0 GPIO_19_CTF H2SYNC
50 GFX_CORE_CNTRL1 2 P8 AJ13

1
GPIO_20_PWRCNTL_1 V2SYNC
20 BB_ENA P7
R611 10K HDMI_HD_EN GPIO_21_BB_EN Q68 R625
1 2 19 48 T89 PAD N8

1
R613 *10K_NC TEMP_FAIL GFX_CLKREQ# GPIO_22_ROMCSB DTC114TUAT106
1 2 N7 100K
R614 10K GFX_CLKREQ# R642 *1M_reserve R449 2 GPIO_23_CLKREQB
1 2 1 1K L6
1

R615 10K VGAVSYNC JTAG_TRSTB


1 2 T13 PAD L5 AH12

2
R620 10K VGAHSYNC C860 C861 JTAG_TDI C
1 2 T28 PAD L3
*12P_reserve *12P_reserve JTAG_TCK
L1 AM10
2

T24 PAD JTAG_TMS Y


T25 PAD K4
R628 1 JTAG_TDO
2 *10K_NC VGAVSYNC 50 50 AJ9
R627 1 VGAHSYNC COMP
2 *10K_NC
R624 1 2 10K TEMP_FAIL +3.3V_DELAY
35 AB13 AE20
T21 PAD GENERICA A2VDD
B
T20 PAD W8 B
GENERICB C856
T22 PAD W9
GENERICC *0.1U_NC
T10 PAD W7
+3.3V_RUN GENERICD
Spread Spectrum T12 PAD AD10
GENERICE_HPD4
If U4, the discrete spread spectrum chip
HPD1 AC14 +1.8V_RUN
is not used, then pop R48 in order to +1.8V_RUN HPD1
pull-down BXTALOUT for EMI reasons. AE17 +A2VDDQ L85
R659 R660 A2VDDQ BLM15BD121SN1D
2 1
*10K_reserve *10K_reserve R639 499/F VREFG AC16
R664 *10K_reserve VREFG
U45 C857 C858
1 2
OSC_OUT 1 8 R641 249/F 0.1U 1uF
XIN/CLKIN XOUT
2 7 +3VL L81 +3.3V_RUN AE19
R669 *0_reserve VSS VDD *BLM11A05S_reserve C859 0.1U A2VSSQ
1 2 3 6 C955 C956 RESERVED
1

SO PD# *10U_reserve *0.1U_reserve


OSC_SPREAD 4 5 805 N10
SSCLK REFCLK T29 PAD NC_PWRGOOD
10 10
2

+1.8V_RUN AB22 +1.8V_RUN


*P1819GF-08SR_reserve T27 PAD RSVD#8
T26 PAD AC22
RSVD#9
AD19
R596 10K RAM_TYPE_CFG0 VDD2DI
1 2 S0
R598 1 2 10K RAM_TYPE_CFG1
R600 1 2 *10K_NC RAM_TYPE_CFG2
R601 1 2 *10K_NC RAM_TYPE_CFG3 -1.75% (DOWN) 0 L9 C863
T77 PAD NC#1 *0.1U_NC
T49 PAD N9
NC#2

T161 PAD AB16 AC19


RSVD#3 VSS2DI
26 ENVDD 1 2 AB12
R645 0 RSVD#2
26 BIA_PWM AB11
RSVD#1

A 38 R621
10K R57 1K
A

RAM_TYPE
RAM_TYPE
RAM_TYPE
RAM_TYPE Quanta PN Quanta PN 1 2 AF24 AG13 R2SET R646 715
Vendor PN 31 level PN TESTEN R2SET
Memory Straps _CFG3 _CFG2 _CFG1 _CFG0 (QuantaBuy) (WinBuy)
800MHz M92-S2/M92-XT
0 0 1 0 AKD5LWGT501 AKD5LWGT504 K4J10324QD-HC12 31FM8MB0030
512MB(32M*32) Samsung
900MHz
QUANTA
AKD5LWFT^03 AKD5LWFT^00 31FM8MB0000
512MB(32M*32) Qimonda 0 0 1 1 HYB18H1G321AF-11
Title
COMPUTER
800MHz
256MB(16M*32) Samsung 0 0 0 1 AKD5FWGT500 AKD5FWGT503 K4J52324QH-HC12 31FM8MB0040 VGA-M92-XT (PCIe)

900MHz Size Document Number Rev


0 0 0 0 AKD5FWHTW03 AKD5FWHTW06 H5RS5223CFR-11C 31FM8MB0020 FM8 2A
256MB(16M*32) Hynix
Date: Tuesday, November 25, 2008 Sheet 19 of 58
5 4 3 2 1

https://Dr-Bios.com
5 4 3 2 1

+1.8V_RUN
layout note: close to VDDR1#[1:17]

L12 BLM18PG121SN1D (1.1V)


C869 C870 C871 C872 C873 C874 C875 C877 C878 +1.1V_GFX_PCIE +PCIE_VDDC
10nF 10nF 10nF 10nF 10nF 100nF 100nF 100nF 100nF

1
C168 C183 C211 (PCIE_VDDC 1.1V @ 1A )
10U 1U 0.1U
603 <Size>

2
6.3 10 10
+1.8V_RUN
C879 C880 C881 C882 C883 C886

1
1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 100nF C68 C74 C196
10U 1U 0.1U
603 <Size>

2
6.3 10 10
D C888 C892 C889 C893 C894 D
1uF_6.3V 100nF 1uF_6.3V 10nF 10U
U32D
+1.8V_RUN PART 4 OF 10
+1.8V_RUN

C895 C896 C897


H13
H16
VDDR1#1 POWER AB23 (1.1V)
10U 10U 10U VDDR1#2 PCIE_VDDR#1
H19 VDDR1#3 PCIE_VDDR#2 AC23
J10 AD24 +PCIE_VDDC
VDDR1#4 PCIE_VDDR#3
J23 AE24
VDDR1#5 PCIE_VDDR#4
J24 AE25
VDDR1#6 PCIE_VDDR#5
J9 AE26
VDDR1#7 PCIE_VDDR#6
K10 AF25
VDDR1#8 PCIE_VDDR#7
K23 AG26
VDDR1#9 PCIE_VDDR#8 C899 C900 C901 C902 C903 C904 C906 C907
K24 VDDR1#10
K9 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 10U
VDDR1#11
L11 VDDR1#12
L12 VDDR1#13
L13 VDDR1#14
L20 L23
VDDR1#15 PCIE_VDDC#1
L21 L24
VDDR1#16 PCIE_VDDC#2
L22 L25
+1.8V_RUN VDDR1#17 PCIE_VDDC#3 U32E
L26
PCIE_VDDC#4 PART 5 OF 10
M22
PCIE_VDDC#5
N22
L87 +VDD_CT PCIE_VDDC#6
AA20 N23
VDD_CT#1 PCIE_VDDC#7
BLM15BD121SN1D
AA21
AB20
VDD_CT#2 PCIE_VDDC#8
N24
R22 AA27
GND F18
C909 C910 C911 C912 C913 VDD_CT#3 PCIE_VDDC#9 PCIE_VSS#1 GND#33
AB21 VDD_CT#4 PCIE_VDDC#10 T22 AB24 PCIE_VSS#2 GND#34 F2
10U 100nF 1uF_6.3V 1uF_6.3V 100nF U22 AB32 F20
PCIE_VDDC#11 PCIE_VSS#3 GND#35
PCIE_VDDC#12 V22 AC24 PCIE_VSS#4 GND#36 F22
(0.9~1.2V) AC26 PCIE_VSS#5 GND#37 F24
AC27 F26
+3.3V_DELAY +VCC_GFX_CORE PCIE_VSS#6 GND#38
AD25 F6
PCIE_VSS#7 GND#39
AD32 F8
PCIE_VSS#8 GND#40
AA17 AA15 AE27 G10
VDDR3#1 VDDC#1 PCIE_VSS#9 GND#41
C AA18 M11 +BBP AF32 G27 C
VDDR3#2 VDDC#2 PCIE_VSS#10 GND#42
AB17 M12 AG27 G31
C914 C915 C916 C908 VDDR3#3 VDDC#3 PCIE_VSS#11 GND#43
AB18 N15 AH32 G8
1uF_6.3V 1uF_6.3V 100nF 100nF VDDR3#4 VDDC#4 PCIE_VSS#12 GND#44
VDDC#5 N17 K28 PCIE_VSS#13 GND#45 H14
R13 C917 C918 K32 H17
VDDC#6 100nF 1uF_6.3V PCIE_VSS#14 GND#46
VDDC#7 R16 L27 PCIE_VSS#15 GND#47 H2
AA11 VDDR4#1 VDDC#8 R18 M32 PCIE_VSS#16 GND#48 H20
+1.8V_RUN AA12 R21 N25 H6
VDDR4#2 VDDC#9 PCIE_VSS#17 GND#49
Y11 T12 N27 J27
VDDR4#3 VDDC#10 PCIE_VSS#18 GND#50
Y12 T15 P25 J31
VDDR4#4 VDDC#11 PCIE_VSS#19 GND#51
T17 P32 K11
VDDC#12 PCIE_VSS#20 GND#52
VDDC#13 T20 R27 PCIE_VSS#21 GND#53 K2
VDDC#14 U13 T25 PCIE_VSS#22 GND#54 K22
C919 C920 C921 C922 U11 U16 T32 K6
1uF_6.3V 100nF 1uF_6.3V 100nF VDDR5#1 VDDC#15 PCIE_VSS#23 GND#55
U12 U18 U25 M6
VDDR5#2 VDDC#16 PCIE_VSS#24 GND#56
V11 U21 U27 N11
+1.8V_RUN VDDR5#3 VDDC#17 PCIE_VSS#25 GND#57
V12 V15 V32 N12
VDDR5#4 VDDC#18 PCIE_VSS#26 GND#58
V17 W25 N13
VDDC#19 PCIE_VSS#27 GND#59
V20 W26 N16
VDDC#20 PCIE_VSS#28 GND#60
V21 W27 N18
L88 BLM15BD121SN1D +VDDRH1 VDDC#21 PCIE_VSS#29 GND#61
L17 Y13 Y25 N21
VDDRHA VDDC#22 PCIE_VSS#30 GND#62
Y16 Y32 P6
VDDC#23 PCIE_VSS#31 GND#63
Y18 P9
C923 C924 VDDC#24 GND#64
VDDC#25 Y21 GND#65 R12
1uF_6.3V 1uF_6.3V R15
GND#66
A3 GND#1 GND#67 R17
L16 A30 R20
VSSRHA GND#2 GND#68
AA13 T13
+VDDCI GND#3 GND#69
M13 AA16 T16
VDDCI#1 GND#4 GND#70
M15 AB10 T18
VDDCI#2 GND#5 GND#71
VDDCI#3
M16 (0.9~1.2V) AB15
GND#6 GND#72
T21
M17 AB6 T6
VDDCI#4 GND#7 GND#73
M18 AC9 U15
VDDCI#5 GND#8 GND#74
M20 AD6 U17
VDDCI#6 GND#9 GND#75
M21 AD8 U20
VDDCI#7 GND#10 GND#76
N20 AE7 U3
VDDCI#8 GND#11 GND#77
AG12 GND#12 GND#78 U9
B AH10 GND#13 GND#79 V13 B
AH28 V16
GND#14 GND#80
B10 V18
GND#15 GND#81
B12 V6
GND#16 GND#82
B14 Y10
M92-S2/M92-XT GND#17 GND#83
B16 Y15
+BBP GND#18 GND#84
B18 Y17
(0.9~1.2V) GND#19 GND#85
B20 Y20
GND#20 GND#86
3 1 +VCC_GFX_CORE B22 Y6
GND#21 GND#87
B24 T11
Q71 Q70 GND#22 GND#88
B26 R11
2N7002W-7-F GND#23 GND#89
3 1 +1.8V_RUN B6
2

GND#24
(0.9~1.2V) B8 GND#25
1

C1 GND#26
C866 SI2303BDS-T1-E3 +VCC_GFX_CORE C32
2

1U GND#27
E28
2

GND#28
<Size> 1 2
layout note: close to VDDC#[1:25] F10
F12
GND#29
A32
+5V_RUN GND#30 VSS_MECH#1
10 R652 100K F14 AM1
GND#31 VSS_MECH#2
F16 AM32
GND#32 VSS_MECH#3
3

2 Q74 C925 C926 C927 C929 C930


19 BB_ENA
2N7002W-7-F 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V M92-S2/M92-XT
1

R653
10K

(0.9~1.2V)
C931 C932 C933 C934 C935 C936 C937 C939 +VCC_GFX_CORE
1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V 1uF_6.3V (0.9~1.2V)
+VDDCI L89
BLM18EG221SN1D
(0.9~1.2V)
C941 C942 C943 C944 C945
+VCC_GFX_CORE 100nF 100nF 1uF_6.3V 1uF_6.3V 10U
A A

C947 C946 C948


10U 10U 10U

QUANTA

https://Dr-Bios.com Title

Size
COMPUTER
VGA-M92-XT (PCIe)

Document Number
FM8
Rev
2A

Date: Tuesday, November 25, 2008 Sheet 20 of 58


5 4 3 2 1
5 4 3 2 1

MEMORY INTERFACE

U32C
D PART 3 OF 10 D
36 42 47
M_MDA0 K27 K17 M_MAA0
M_MDA1 DQA_0 MAA_0 M_MAA1
M_MDA2
J29 DQA_1 MEMORY MAA_1 J20
M_MAA2
M_MDA3
H30 DQA_2 MAA_2 H23
M_MAA3
M92 thermal monitor change external to internal. 10/20
M_MDA4
H32
G29
DQA_3 INTERFACE MAA_3 G23
G24 M_MAA4
M_MDA5 DQA_4 MAA_4 M_MAA5
F28 DQA_5 MAA_5 H24
M_MDA6 F32 J19 M_MAA6
M_MDA7 DQA_6 MAA_6 M_MAA7
F30 DQA_7 MAA_7 K19
M_MDA8 C30 J14 M_MAA8
M_MDA9 DQA_8 MAA_8 M_MAA9 +3.3V_ADM1032A
F27 DQA_9 MAA_9 K14
M_MDA10 A28 J11 M_MAA10
M_MDA11 DQA_10 MAA_10 M_MAA11
C28 DQA_11 MAA_11 J13
M_MDA12 E27 J16 BA0 +3.3V_ADM1032A
M_MDA13 DQA_12 MAA_BA0 BA1
G26 DQA_13 MAA_BA1 L15
M_MDA14 D26 H11 A12
DQA_14 MAA_12

2
M_MDA15 F25 G11 BA2
M_MDA16 DQA_15 MAA_BA2 Q75
A25 DQA_16 THERMAL MONITOR

1
M_MDA17 C25 3 1
DQA_17 31 SMBCLK2
M_MDA18 E25
M_MDA19 DQA_18 M_DQMA#0 R671 R672
D24 DQA_19 DQMA_0 E32
M_MDA20 E23 E30 M_DQMA#1 2N7002W-7-F 4.7K 4.7K
M_MDA21 DQA_20 DQMA_1 M_DQMA#2
F23 A21

2
M_MDA22 DQA_21 DQMA_2 M_DQMA#3 +3.3V_ADM1032A
D22 DQA_22 DQMA_3 C21 U46
M_MDA23 F21 E13 M_DQMA#4
DQA_23 DQMA_4 VGA_THERMDP 23

2
M_MDA24 E21 D12 M_DQMA#5 8 1
DQA_24 DQMA_5 SCLK VDD

1
M_QSA#[7..0] M_MDA25 D20 E3 M_DQMA#6 Q76
22 M_QSA#[7..0] DQA_25 DQMA_6
M_MDA26 F19 F4 M_DQMA#7 3 1 7 2 C957
M_QSA[7..0] DQA_26 DQMA_7 31 SMBDAT2 SDATA D+
22 M_QSA[7..0] M_MDA27 A19 2N7002W-7-F 2200P

2
M_MDA28 DQA_27 THERMAL_INT# 50
D18 DQA_28 6 ALERT# D- 3 VGA_THERMDN 23
C M_DQMA#[7..0] M_MDA29 F17 19 THERMAL_INT# C
22 M_DQMA#[7..0] DQA_29
M_MDA30 A17 H28 M_QSA0 5 4 MB_THERM# MB_THERM# 52
M_MDA[63..0] M_MDA31 DQA_30 QSA_0 M_QSA1 GND THERM#
C17 DQA_31 QSA_1 C27
22 M_MDA[63..0] M_MDA32 E17 A23 M_QSA2
DQA_32 QSA_2 ADM1032ARMZ-1
M_MAA[11..0] M_MDA33 D16 E19 M_QSA3

WRITE STROBE READ STROBE


22 M_MAA[11..0] DQA_33 QSA_3
M_MDA34 F15 E15 M_QSA4
DQA_34 QSA_4

1
M_MDA35 A15 D10 M_QSA5 C958
M_MDA36 DQA_35 QSA_5 M_QSA6 0.1U
D14 DQA_36 QSA_6 D6
BA[2..0] M_MDA37 F13 G5 M_QSA7 MB_THERM# R673 2 1 10K
22 BA[2..0] +3.3V_ADM1032A

2
M_MDA38 DQA_37 QSA_7 10
A13 DQA_38
M_MDA39 C13 THERMAL_INT# R674 2 1 10K
A12 M_MDA40 DQA_39
22 A12 E11 DQA_40
M_MDA41 A11 H27 M_QSA#0
M_MDA42 DQA_41 QSA_0B M_QSA#1
C11 DQA_42 QSA_1B A27
M_MDA43 F11 C23 M_QSA#2
M_MDA44 DQA_43 QSA_2B M_QSA#3
A9 DQA_44 QSA_3B C19
M_MDA45 C9 C15 M_QSA#4
M_MDA46 DQA_45 QSA_4B M_QSA#5
F9 DQA_46 QSA_5B E9
M_MDA47 D8 C5 M_QSA#6
M_MDA48 DQA_47 QSA_6B M_QSA#7 Q80
E7 DQA_48 QSA_7B H4
M_MDA49 A7 SI2303BDS-T1-E3
M_MDA50 DQA_49
C7 DQA_50
M_MDA51 F7 L18 +3.3V_ADM1032A 3 1 +3.3V_SUS
M_MDA52 DQA_51 ODTA0
A5 DQA_52 ODTA1 K16
M_MDA53 E5 DQA_53

1
M_MDA54 C3

2
M_MDA55 DQA_54 R686
E1 DQA_55 CLKA0 H26 CLKA0 22
M_MDA56 G7 G9 CLKA1 22 100K
M_MDA57 DQA_56 CLKA1
G6 DQA_57
M_MDA58 G1

2
M_MDA59 DQA_58
G3 DQA_59 CLKA0B H25 CLKA0# 22
M_MDA60 J6 H9 CLKA1# 22
B M_MDA61 DQA_60 CLKA1B B
J1 DQA_61

3
M_MDA62 J3
M_MDA63 DQA_62 Q81
J5 DQA_63 RASA0B G22 RASA0# 22 19,31 GFX_ON 2
DIVIDER RESISTORS DDR2 GDDR3 RASA1B G17 RASA1# 22 2N7002W-7-F

1
+1.8V_RUN
MVREF TO 1.8V 100R 40.2R CASA0B G19 CASA0# 22
CASA1B G16 CASA1# 22
R656 MVREF TO GND 100R 100R
40.2 H22 CSA0_0# 22
CSA0B_0
CSA0B_1 J22 CSA0_1# 22
MVREFD_A K26 MVREFDA
J26 MVREFSA
CSA1B_0 G13 CSA1_0# 22
R657 C950 C951 K13 CSA1_1# 22
100R 0.1U 10nF CSA1B_1
+1.8V_RUN
CKEA0 K20 CKEA0 22
CLKTESTA K8 J17 +1.8V_RUN
CLKTESTA CKEA1 CKEA1 22
CLKTESTB L7
R658 CLKTESTB
40.2 MEMTEST J8 G25 WEA0# 22
MEM_CALRP1 WEA0B
WEA1B H10 WEA1# 22
MVREFS_A R661 R662 R663
4.7K 4.7K 243R
R151
R665 C952 C953 +1.8V_RUN G20 2K/F
100R 0.1U 10nF NC_MAA_13
G14 NC_MAA_14
R667 4.7K K7
R668 4.7K NC_MEM_CALRN1
K25 NC_MEM_CALRP0 DRAM_RST L10 DRAM_RST# 22
R670 4.7K J25
A NC_MEM_CALRN0 A
M92-S2/M92-XT
2

C884 R192
1uF_6.3V 4.7K
QUANTA
1

Title
COMPUTER
VGA-M92-XT (PCIe)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 21 of 58


5 4 3 2 1

https://Dr-Bios.com
5 4 3 2 1

M_MDA[63..0]
21 M_MDA[63..0]

M_MAA[11..0]
21 M_MAA[11..0]
M_QSA[7..0]
21 M_QSA[7..0]
M_QSA#[7..0]
21 M_QSA#[7..0]
M_DQMA#[7..0] +1.8V_RUN +1.8V_RUN +1.8V_RUN +1.8V_RUN
21 M_DQMA#[7..0]
U47 U48
M_MDA30 T3 A1 M_MDA39 T3 A1 U49 U50
DRAM_RST# M_MDA31 T2 DQ31 | DQ23 VDDQ M_MDA38 T2 DQ31 | DQ23 VDDQ M_MDA17 M_MDA49
21 DRAM_RST# A12 A12 T3 A1 T3 A1
M_MDA29 R3 DQ30 | DQ22 VDDQ#A12 M_MDA36 R3 DQ30 | DQ22 VDDQ#A12 M_MDA18 DQ31 | DQ23 VDDQ M_MDA51 DQ31 | DQ23 VDDQ
C1 C1 T2 A12 T2 A12
M_MDA24 R2 DQ29 | DQ21 VDDQ#C1 M_MDA34 R2 DQ29 | DQ21 VDDQ#C1 M_MDA19 DQ30 | DQ22 VDDQ#A12 M_MDA50 DQ30 | DQ22 VDDQ#A12
C4 C4 R3 C1 R3 C1
M_MDA27 M3
M_MDA25 N2
DQ28
DQ27
| DQ20
| DQ19
VDDQ#C4
VDDQ#C9
C9 M_MDA33 M3
M_MDA37 N2
DQ28
DQ27
| DQ20
| DQ19
VDDQ#C4
VDDQ#C9
C9 GDDR3 M_MDA16
M_MDA21
R2
DQ29
DQ28
| DQ21
| DQ20
VDDQ#C1
VDDQ#C4
C4 M_MDA55
M_MDA52
R2
DQ29
DQ28
| DQ21
| DQ20
VDDQ#C1
VDDQ#C4
C4
C12 C12 M3 C9 M3 C9
M_MDA28 L3 DQ26 | DQ18 VDDQ#C12 M_MDA32 L3 DQ26 | DQ18 VDDQ#C12 M_MDA23 DQ27 | DQ19 VDDQ#C9 M_MDA53 DQ27 | DQ19 VDDQ#C9
E1 E1 N2 C12 N2 C12
M_MDA26 M2 DQ25 | DQ17 VDDQ#E1 M_MDA35 M2 DQ25 | DQ17 VDDQ#E1 M_MDA22 DQ26 | DQ18 VDDQ#C12 M_MDA48 DQ26 | DQ18 VDDQ#C12
E4 E4 L3 E1 L3 E1
D M_MDA17 T10 DQ24 | DQ16 VDDQ#E4
E9 M_MDA49 T10 DQ24 | DQ16 VDDQ#E4
E9 M_MDA20 M2
DQ25 | DQ17 VDDQ#E1
E4
Rank 1 M_MDA54 M2
DQ25 | DQ17 VDDQ#E1
E4 D
M_MDA18 T11 DQ23 | DQ31 VDDQ#E9 M_MDA51 T11 DQ23 | DQ31 VDDQ#E9 M_MDA30 DQ24 | DQ16 VDDQ#E4 M_MDA39 DQ24 | DQ16 VDDQ#E4
M_MDA19 R10 DQ22 | DQ30 VDDQ#E12
E12
J4
Rank 0 M_MDA50 R10 DQ22 | DQ30 VDDQ#E12
E12
J4 M_MDA31
T10
T11
DQ23 | DQ31 VDDQ#E9
E9
E12
Top Layer M_MDA38
T10
T11
DQ23 | DQ31 VDDQ#E9
E9
E12
M_MDA16 R11 DQ21 | DQ29 VDDQ#J4 M_MDA55 R11 DQ21 | DQ29 VDDQ#J4 M_MDA29 DQ22 | DQ30 VDDQ#E12 M_MDA36 DQ22 | DQ30 VDDQ#E12
M_MDA21 M10 DQ20 | DQ28 VDDQ#J9
J9
N1
Bottom Layer M_MDA52 M10 DQ20 | DQ28 VDDQ#J9
J9
N1 M_MDA24
R10
R11
DQ21 | DQ29 VDDQ#J4
J4
J9
U49 - Lower M_MDA34
R10
R11
DQ21 | DQ29 VDDQ#J4
J4
J9
M_MDA23 N11 DQ19 | DQ27 VDDQ#N1 M_MDA53 N11 DQ19 | DQ27 VDDQ#N1 M_MDA27 DQ20 | DQ28 VDDQ#J9 DQ20 | DQ28 VDDQ#J9
M_MDA22 L10 DQ18 | DQ26 VDDQ#N4
N4
N9
U47 - Lower M_MDA48 L10 DQ18 | DQ26 VDDQ#N4
N4
N9 M_MDA25
M10
N11
DQ19 | DQ27 VDDQ#N1
N1
N4
U50 - Upper M_MDA33
M_MDA37
M10
N11
DQ19 | DQ27 VDDQ#N1
N1
N4
M_MDA20 M11 DQ17 | DQ25 VDDQ#N9 M_MDA54 M11 DQ17 | DQ25 VDDQ#N9 M_MDA28 DQ18 | DQ26 VDDQ#N4 M_MDA32 DQ18 | DQ26 VDDQ#N4
M_MDA11 G10 DQ16 | DQ24 VDDQ#N12
N12
R1
U48 - Upper M_MDA60 G10 DQ16 | DQ24 VDDQ#N12
N12
R1 M_MDA26
L10
M11
DQ17 | DQ25 VDDQ#N9
N9
N12 M_MDA35
L10
M11
DQ17 | DQ25 VDDQ#N9
N9
N12
M_MDA15 F11 DQ15 | DQ7 VDDQ#R1 M_MDA56 F11 DQ15 | DQ7 VDDQ#R1 M_MDA1 DQ16 | DQ24 VDDQ#N12 M_MDA46 DQ16 | DQ24 VDDQ#N12
R4 R4 G10 R1 G10 R1
M_MDA10 F10 DQ14 | DQ6 VDDQ#R4 M_MDA57 F10 DQ14 | DQ6 VDDQ#R4 M_MDA2 DQ15 | DQ7 VDDQ#R1 M_MDA44 DQ15 | DQ7 VDDQ#R1
R9 R9 F11 R4 F11 R4
M_MDA13 E11 DQ13 | DQ5 VDDQ#R9 M_MDA63 E11 DQ13 | DQ5 VDDQ#R9 M_MDA0 DQ14 | DQ6 VDDQ#R4 M_MDA47 DQ14 | DQ6 VDDQ#R4
R12 R12 F10 R9 F10 R9
M_MDA12 C10 DQ12 | DQ4 VDDQ#R12 M_MDA62 C10 DQ12 | DQ4 VDDQ#R12 M_MDA3 DQ13 | DQ5 VDDQ#R9 M_MDA45 DQ13 | DQ5 VDDQ#R9
V1 V1 E11 R12 E11 R12
M_MDA9 C11 DQ11 | DQ3 VDDQ#V1 M_MDA61 C11 DQ11 | DQ3 VDDQ#V1 M_MDA5 DQ12 | DQ4 VDDQ#R12 M_MDA42 DQ12 | DQ4 VDDQ#R12
V12 V12 C10 V1 C10 V1
M_MDA14 B10 DQ10 | DQ2 VDDQ#V12 +1.8V_RUN M_MDA59 B10 DQ10 | DQ2 VDDQ#V12 +1.8V_RUN M_MDA4 DQ11 | DQ3 VDDQ#V1 M_MDA41 DQ11 | DQ3 VDDQ#V1
C11 V12 C11 V12
M_MDA8 B11 DQ9 | DQ1 M_MDA58 B11 DQ9 | DQ1 M_MDA7 DQ10 | DQ2 VDDQ#V12 +1.8V_RUN M_MDA40 DQ10 | DQ2 VDDQ#V12 +1.8V_RUN
A2 A2 B10 B10
M_MDA1 G3 DQ8 | DQ0 VDD M_MDA46 G3 DQ8 | DQ0 VDD M_MDA6 DQ9 | DQ1 M_MDA43 DQ9 | DQ1
A11 A11 B11 A2 B11 A2
M_MDA2 DQ7 | DQ15 VDD#A11 M_MDA44 F2 DQ7 | DQ15 VDD#A11 M_MDA11 DQ8 | DQ0 VDD M_MDA60 DQ8 | DQ0 VDD
F2 F1 F1 G3 A11 G3 A11
M_MDA0 DQ6 | DQ14 VDD#F1 M_MDA47 F3 DQ6 | DQ14 VDD#F1 M_MDA15 DQ7 | DQ15 VDD#A11 M_MDA56 DQ7 | DQ15 VDD#A11
F3 F12 F12 F2 F1 F2 F1
M_MDA3 DQ5 | DQ13 VDD#F12 M_MDA45 E2 DQ5 | DQ13 VDD#F12 M_MDA10 DQ6 | DQ14 VDD#F1 M_MDA57 DQ6 | DQ14 VDD#F1
E2 M1 M1 F3 F12 F3 F12
M_MDA5 C3 DQ4 | DQ12 VDD#M1 M_MDA42 C3 DQ4 | DQ12 VDD#M1 M_MDA13 DQ5 | DQ13 VDD#F12 M_MDA63 DQ5 | DQ13 VDD#F12
M12 M12 E2 M1 E2 M1
M_MDA4 C2 DQ3 | DQ11 VDD#M12 M_MDA41 C2 DQ3 | DQ11 VDD#M12 M_MDA12 DQ4 | DQ12 VDD#M1 M_MDA62 DQ4 | DQ12 VDD#M1
V2 V2 C3 M12 C3 M12
M_MDA7 DQ2 | DQ10 VDD#V2 M_MDA40 B3 DQ2 | DQ10 VDD#V2 M_MDA9 DQ3 | DQ11 VDD#M12 M_MDA61 DQ3 | DQ11 VDD#M12
B3 V11 V11 C2 V2 C2 V2
M_MDA6 DQ1 | DQ9 VDD#V11 M_MDA43 B2 DQ1 | DQ9 VDD#V11 M_MDA14 DQ2 | DQ10 VDD#V2 M_MDA59 DQ2 | DQ10 VDD#V2
B2 B3 V11 B3 V11
DQ0 | DQ8 DQ0 | DQ8 M_MDA8 DQ1 | DQ9 VDD#V11 M_MDA58 DQ1 | DQ9 VDD#V11
B1 B1 B2 B2
VSSQ VSSQ DQ0 | DQ8 DQ0 | DQ8
B4 B4 B1 B1
RASA0# VSSQ#B4 RASA1# VSSQ#B4 VSSQ VSSQ
21 RASA0# H10 B9 21 RASA1# H10 B9 B4 B4
BA2 | RAS VSSQ#B9 BA2 | RAS VSSQ#B9 VSSQ#B4 VSSQ#B4
21 BA0 G9 B12 21 BA0 G9 B12 21 BA2 H10 B9 21 BA2 H10 B9
BA1 | BA0 VSSQ#B12 BA1 | BA0 VSSQ#B12 BA2 | RAS VSSQ#B9 BA2 | RAS VSSQ#B9
21 BA1 G4 D1 21 BA1 G4 D1 21 BA1 G9 B12 21 BA1 G9 B12
BA0 | BA1 VSSQ#D1 BA0 | BA1 VSSQ#D1 BA1 | BA0 VSSQ#B12 BA1 | BA0 VSSQ#B12
D4 D4 21 BA0 G4 D1 21 BA0 G4 D1
M_MAA7 L4 VSSQ#D4 M_MAA7 VSSQ#D4 BA0 | BA1 VSSQ#D1 BA0 | BA1 VSSQ#D1
D9 L4 D9 D4 D4
M_MAA8 K2 A11 | A7 VSSQ#D9 M_MAA8 A11 | A7 VSSQ#D9 M_MAA11 VSSQ#D4 M_MAA11 VSSQ#D4
D12 K2 D12 L4 D9 L4 D9
M_MAA3 M9 A10 | A8 VSSQ#D12 M_MAA3 M9 A10 | A8 VSSQ#D12 M_MAA10 A11 | A7 VSSQ#D9 M_MAA10 A11 | A7 VSSQ#D9
G2 G2 K2 D12 K2 D12
M_MAA10 A9 | A3 VSSQ#G2 M_MAA10 K11 A9 | A3 VSSQ#G2 M_MAA9 A10 | A8 VSSQ#D12 M_MAA9 A10 | A8 VSSQ#D12
K11 G11 G11 M9 G2 M9 G2
M_MAA11L9 A8/AP | A10 VSSQ#G11 M_MAA11 L9 A8/AP | A10 VSSQ#G11 M_MAA8 A9 | A3 VSSQ#G2 M_MAA8 A9 | A3 VSSQ#G2
L2 L2 K11 G11 K11 G11
M_MAA2K10 A7 | A11 VSSQ#L2 M_MAA2 K10 A7 | A11 VSSQ#L2 M_MAA7 A8/AP | A10 VSSQ#G11 M_MAA7 A8/AP | A10 VSSQ#G11
L11 L11 L9 L2 L9 L2
M_MAA1H11 A6 | A2 VSSQ#L11 M_MAA1 H11 A6 | A2 VSSQ#L11 M_MAA6 A7 | A11 VSSQ#L2 M_MAA6 A7 | A11 VSSQ#L2
P1 P1 K10 L11 K10 L11
M_MAA0 K9 A5 | A1 VSSQ#P1 M_MAA0 A5 | A1 VSSQ#P1 M_MAA5 A6 | A2 VSSQ#L11 M_MAA5 A6 | A2 VSSQ#L11
P4 K9 P4 H11 P1 H11 P1
M_MAA9 M4 A4 | A0 VSSQ#P4 M_MAA9 M4 A4 | A0 VSSQ#P4 M_MAA4 A5 | A1 VSSQ#P1 M_MAA4 A5 | A1 VSSQ#P1
P9 P9 K9 P4 K9 P4
M_MAA6 K3 A3 | A9 VSSQ#P9 M_MAA6 A3 | A9 VSSQ#P9 M_MAA3 A4 | A0 VSSQ#P4 M_MAA3 A4 | A0 VSSQ#P4
P12 K3 P12 M4 P9 M4 P9
M_MAA5 H2 A2 | A6 VSSQ#P12 M_MAA5 H2 A2 | A6 VSSQ#P12 M_MAA2 A3 | A9 VSSQ#P9 M_MAA2 A3 | A9 VSSQ#P9
T1 T1 K3 P12 K3 P12
M_MAA4 K4 A1 | A5 VSSQ#T1 M_MAA4 A1 | A5 VSSQ#T1 M_MAA1 A2 | A6 VSSQ#P12 M_MAA1 A2 | A6 VSSQ#P12
T4 K4 T4 H2 T1 H2 T1
C A0 | A4 VSSQ#T4 A0 | A4 VSSQ#T4 M_MAA0 A1 | A5 VSSQ#T1 M_MAA0 A1 | A5 VSSQ#T1 C
T9 T9 K4 T4 K4 T4
CASA0# VSSQ#T9 CASA1# VSSQ#T9 A0 | A4 VSSQ#T4 A0 | A4 VSSQ#T4
21 CASA0# F9 T12 21 CASA1# F9 T12 T9 T9
CS | CAS VSSQ#T12 CS | CAS VSSQ#T12 CSA0_1# VSSQ#T9 CSA1_1# VSSQ#T9
A3 A3 21 CSA0_1# F9 T12 21 CSA1_1# F9 T12
CKEA0 VSS CKEA1 VSS CS | CAS VSSQ#T12 CS | CAS VSSQ#T12
21 CKEA0 H9 A10 21 CKEA1 H9 A10 A3 A3
WE | CKE VSS#A10 WE | CKE VSS#A10 WEA0# VSS WEA1# VSS
G1 G1 21 WEA0# H9 A10 21 WEA1# H9 A10
VSS#G1 VSS#G1 WE | CKE VSS#A10 WE | CKE VSS#A10
21 BA2 H3 G12 21 BA2 H3 G12 G1 G1
RAS | BA2 VSS#G12 RAS | BA2 VSS#G12 RASA0# VSS#G1 RASA1# VSS#G1
L1 L1 21 RASA0# H3 G12 21 RASA1# H3 G12
CSA0_0# VSS#L1 CSA1_0# VSS#L1 RAS | BA2 VSS#G12 RAS | BA2 VSS#G12
21 CSA0_0# F4 L12 21 CSA1_0# F4 L12 L1 L1
CAS | CS VSS#L12 CAS | CS VSS#L12 +1.8V_RUN CASA0# VSS#L1 CASA1# VSS#L1
V3 V3 21 CASA0# F4 L12 21 CASA1# F4 L12
WEA0# VSS#V3 +1.8V_RUN WEA1# VSS#V3 CAS | CS VSS#L12 CAS | CS VSS#L12
21 WEA0# H4 V10 21 WEA1# H4 V10 V3 V3
CKE | WE VSS#V10 CKE | WE VSS#V10 CKEA0 VSS#V3 +1.8V_RUN CKEA1 VSS#V3
21 CKEA0 H4 V10 21 CKEA1 H4 V10
CLKA0# CLKA1# CKE | WE VSS#V10 CKE | WE VSS#V10 +1.8V_RUN
21 CLKA0# J10 21 CLKA1# J10
CLKA0 CK L90 CLKA1 CK L91 CLKA0# CLKA1#
21 CLKA0 J11 K1 21 CLKA1 J11 K1 21 CLKA0# J10 21 CLKA1# J10
CK VDDA L92 CK VDDA L93 CLKA0 CK L94 CLKA1 CK L95
K12 K12 21 CLKA0 J11 K1 21 CLKA1 J11 K1
M_QSA3 VDDA#K12 M_QSA4 VDDA#K12 CK VDDA L96 CK VDDA L97
P3 P3 K12 K12
M_QSA2 RDQS3 | RDQS2 BLM18AG221SN1D M_QSA6 RDQS3 | RDQS2 BLM18AG221SN1D M_QSA2 VDDA#K12 BLM18AG221SN1D M_QSA6 VDDA#K12
P10 P10 P3 P3
M_QSA1 RDQS2 | RDQS3 BLM18AG221SN1D M_QSA7 RDQS2 | RDQS3 BLM18AG221SN1D M_QSA3 RDQS3 | RDQS2 BLM18AG221SN1D M_QSA4 RDQS3 | RDQS2 BLM18AG221SN1D
D10 D10 P10 P10
M_QSA0 RDQS1 | RDQS0 C959 C960 M_QSA5 RDQS1 | RDQS0 C961 C965 M_QSA0 RDQS2 | RDQS3 M_QSA5 RDQS2 | RDQS3 BLM18AG221SN1D
D3 D3 D10 D10
RDQS0 | RDQS1 0.1U 10nF RDQS0 | RDQS1 0.1U 10nF M_QSA1 RDQS1 | RDQS0 C962 C963 M_QSA7 RDQS1 | RDQS0 C964 C966
D3 D3
M_QSA#3 M_QSA#4 RDQS0 | RDQS1 0.1U 10nF RDQS0 | RDQS1 0.1U 10nF
P2 P2
M_QSA#2 WDQS3 | WDQS2 M_QSA#6 WDQS3 | WDQS2 M_QSA#2 M_QSA#6
P11 J12 P11 J12 P2 P2
M_QSA#1 WDQS2 | WDQS3VSSA#J12 M_QSA#7 WDQS2 | WDQS3VSSA#J12 M_QSA#3 WDQS3 | WDQS2 M_QSA#4 WDQS3 | WDQS2
D11 J1 D11 J1 P11 J12 P11 J12
M_QSA#0 WDQS1 | WDQS0 VSSA M_QSA#5 WDQS1 | WDQS0 VSSA M_QSA#0 WDQS2 | WDQS3VSSA#J12 M_QSA#5 WDQS2 | WDQS3VSSA#J12
D2 D2 D11 J1 D11 J1
WDQS0 | WDQS1 WDQS0 | WDQS1 M_QSA#1 WDQS1 | WDQS0 VSSA M_QSA#7 WDQS1 | WDQS0 VSSA
D2 D2
M_DQMA#3 N3 M_DQMA#4 N3 WDQS0 | WDQS1 WDQS0 | WDQS1
J3 J3
+1.8V_RUN M_DQMA#2 N10 DM3 | DM2 RFU2 M_DQMA#6 N10 DM3 | DM2 RFU2 M_DQMA#2 M_DQMA#6
N3 J3 N3 J3
M_DQMA#1 E10 DM2 | DM3 +1.8V_RUN M_DQMA#7 E10 DM2 | DM3 M_DQMA#3 DM3 | DM2 RFU2 M_DQMA#4 DM3 | DM2 RFU2
J2 A12 21 J2 A12 21 N10 N10
M_DQMA#0 E3 DM1 | DM0 RFU1 M_DQMA#5 E3 DM1 | DM0 RFU1 M_DQMA#0 DM2 | DM3 M_DQMA#5 DM2 | DM3
E10 J2 A12 21 E10 J2 A12 21
DM0 | DM1 DM0 | DM1 M_DQMA#1 DM1 | DM0 RFU1 M_DQMA#7 DM1 | DM0 RFU1
V4 V4 E3 E3
DRAM_RST# RFU0 DRAM_RST# RFU0 DM0 | DM1 DM0 | DM1
V9 V9 V4 V4
RESET R677 RESET R680 DRAM_RST# RFU0 DRAM_RST# RFU0
V9 V9
R675 R676 0R R678 R679 0R RESET R681 RESET R684
A4 A4
2.37K 243R ZQ 2.37K 243R ZQ R682 0R R683 0R
A4 A4
243R ZQ 243R ZQ
VREF_LOWER H1 VREF_UPPER H1
VREF VREF VREF_LOWER# VREF_UPPER#
A9 +1.8V_RUN A9 +1.8V_RUN H1 H1
R685 C971 MF C972 MF VREF VREF
H12 H12 A9 A9
5.49K 10nF VREF#H12 GND | VDD R687 10nF VREF#H12 GND | VDD VREF_LOWER MF VREF_UPPER MF
H12 H12
+1.8V_RUN 5.49K VREF#H12 GND | VDD VREF#H12 GND | VDD
VREF_LOWER#

+1.8V_RUN
VREF_UPPER#

HYB18H1G321AF-11 HYB18H1G321AF-11
B C973 C974 HYB18H1G321AF-11 HYB18H1G321AF-11 B
R691 0.1U 10nF C975 C976
2.37K R692 0.1U 10nF
2.37K

C977
R693 10nF C978
5.49K R694 10nF
close to U50
5.49K

+1.8V_RUN
+1.8V_RUN
CLKA0 60.4R R695
CLKA0# 60.4R R696

CKEA0 121R R697

1
CSA0_0# 82.5R R698 C1039 C1040 C987 C1044 C1045 C979 C980 C981 C982 C983
WEA0# 121R R699 10U 10U 1U 0.01U 0.01U 0.1U 0.1U 0.1U 0.1U 0.1U
RASA0# 121R R700 603 603 25 25 10 10 10 10 10

2
CASA0# 121R R701 6.3 6.3 10
CSA0_1# 121R R730
CSA1_1# 121R R729
CLKA1 60.4R R704
CLKA1# 60.4R R705
CKEA1 121R R707
CSA1_0# 82.5R R706
WEA1# 121R R708
RASA1# 121R R709
CASA1# 121R R710

close to U47 close to U48 close to U49

+1.8V_RUN +1.8V_RUN +1.8V_RUN


2

1
C1092 C1093 C660 C1049 C1050 C1006 C1007 C1008 C1009 C1010 C1103 C1104 C954 C1060 C1061 C1017 C1018 C1019 C1020 C1021 C1101 C1115 C984 C1119 C1120 C1028 C1029 C1030 C1031 C1032
10U 10U 1U 0.01U 0.01U 0.1U 0.1U 0.1U 0.1U 0.1U 10U 10U 1U 0.01U 0.01U 0.1U 0.1U 0.1U 0.1U 0.1U 10U 10U 1U 0.01U 0.01U 0.1U 0.1U 0.1U 0.1U 0.1U
A 603 603 25 25 10 10 10 10 10 603 603 25 25 10 10 10 10 10 603 603 25 25 10 10 10 10 10 A
1

6.3 6.3 10 6.3 6.3 10 6.3 6.3 10 2

QUANTA

https://Dr-Bios.com
Base on M82 GDDR Caps.
Title
COMPUTER
VGA-M82-S (VRAM)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 22 of 58


5 4 3 2 1
5 4 3 2 1

U32J
Part 10 of 10

XTAL / PLL +1.8V_RUN

H7 AF14 +DPLL_PVDD L98


D T163 PAD NC_SPV18 DPLL_PVDD D
BLM15BD121SN1D

C1131 C1132 C1133 C1134


10nF 0.1U 10U 10U

J7 SPVSS
AE14
DPLL_PVSS
(1.1V)
(0.9~1.2V)
L99 +SPV10 H8 +PCIE_VDDC
+VCC_GFX_CORE SPV10
BLM15BD121SN1D

C1135 C1136 C1137 C1138 AD14 +DPLL_VDDC L100


1uF_6.3V 1uF_6.3V 0.1U 10nF DPLL_VDDC BLM15BD121SN1D
C1139 C1140 C1141 C1142
10nF 0.1U 1uF_6.3V 10U
+1.8V_RUN

AM28 AM30 +PCIE_PVDD L101


19 XTALIN XTALIN PCIE_PVDD BLM15BD121SN1D
C1144 C1145 C1146 C1147
1uF_6.3V 10nF 0.1U 10U
19 XTALOUT AK28 XTALOUT

NC_MPV18 L8 PAD T164

C M92-S2/M92-XT C

U32H
Part 8 of 10

I2C / DDC / AUX


AUX1P
AD2 6 +3.3V_DELAY
27 G_CLK_DDC2 AC1
DDC6CLK AUX1N
AD4
LVDS
CRT 27 G_DAT_DDC2 AC3 DDC6DATA
AE6 LCD_DDCCLK
LCD_DDCCLK 26

TMDP / DAC1
DDC1CLK LCD_DDCDAT LCD_DDCDAT R418 2
DDC1DATA AE5 LCD_DDCDAT 26 1 2.2K
LCD_DDCCLK R404 2 1 2.2K

AD13
AUX2P
AD11
AUX2N

DDC2CLK AC11
AC13
HDMI_SCL 26 HDMI
DDC2DATA HDMI_SDA 26

AE16
DDCCLK_AUX5P

LVTMDP / DAC2
B B
DDCDATA_AUX5N AD16

R1 AD20
SCL NC_DDCCLK_AUX7P
R3 AC20
SDA NC_DDCDATA_AUX7N

M92-S2/M92-XT

U32I
Part 9 of 10

+1.8V_RUN
TSS FDO
L102 +TSVDD AD17 R5
BLM15BD121SN1D TSVDD TS_FDO

C1155 C1156 T4
0.1U DPLUS VGA_THERMDP 21
1uF_6.3V
GND AC17
TSVSS
DMINUS T2 VGA_THERMDN 21
A A

M92-S2/M92-XT

QUANTA
COMPUTER

https://Dr-Bios.com
Title
VGA-M92-XT (PCIe)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 23 of 58


5 4 3 2 1
5 4 3 2 1

TMDP(HDMI) INTERFACE LVDS INTERFACE


U32F
PART 6 OF 10

D U32G D
+DPA_PVDD AG8
DPA AK3 Part 7 of 10
DPA_PVDD TX2P_DPA0P
TX2M_DPA0N AK1

AH3 +DPF_PVDD AG19


DPF RSVD#6 AK24
AJ23
TX1P_DPA1P NC_DPF_PVDD RSVD#4
TX1M_DPA1N AH1
AG7 DPA_PVSS T2X5P_DPF0P AL23 LCD_B2+ 26
TX0P_DPA2P AG3 T2X5M_DPF0N AK22 LCD_B2- 26
TX0M_DPA2N AG5
AF20 NC_DPF_PVSS T2X4P_DPF1P AH22 LCD_B1+ 26
+DPA_VDD18 AF11 AF2 AJ21
NC_DPA_VDD18#2 TXCAP_DPA3P T2X4M_DPF1N LCD_B1- 26
AE11 NC_DPA_VDD18#1 TXCAM_DPA3N AF4
T2X3P_DPF2P AL21 LCD_B0+ 26
AH5 +DPF_VDD18 AG17 AK20
DPA_VSSR#5 DPF_VDD18#2 T2X3M_DPF2N LCD_B0- 26
DPA_VSSR#3 AG1 AF16 DPF_VDD18#1
DPA_VSSR#4 AG6 T2XCFP_DPF3P AH20 LCD_BCLK+ 26
DPA_VSSR#2 AE3 T2XCFM_DPF3N AJ19 LCD_BCLK- 26
+DPA_VDD10 AF6 AE1
DPA_VDD10#1 DPA_VSSR#1
AF7 DPA_VDD10#2 DPF_VSSR#4 AM22
DPF_VSSR#5 AM24
DPF_VSSR#2 AG23
+DPF_VDD10 AG22 AF23
DPF_VDD10#2 DPF_VSSR#1
DPB TX5P_DPB0P AK8
AL7
HDMI_TX2+ 26 AF22 DPF_VDD10#1 DPF_VSSR#3 AM20
C TX5M_DPB0N HDMI_TX2- 26 C

TX4P_DPB1P AJ7 HDMI_TX1+ 26


+DPA_PVDD AG10 DPB_PVDD TX4M_DPB1N AH6 HDMI_TX1- 26 DPE RSVD#7 AL19
AK18
RSVD#5
TX3P_DPB2P AK6 HDMI_TX0+ 26
TX3M_DPB2N AM5 HDMI_TX0- 26 T2X2P_DPE0P AH18 LCD_A2+ 26
T2X2M_DPE0N AJ17 LCD_A2- 26
AG11 DPB_PVSS TXCBP_DPB3P AK5 HDMI_CLK+ 26
AM3 HDMI_CLK- 26 +DPF_PVDD AG18 AL17
TXCBM_DPB3N DPE_PVDD T2X1P_DPE1P LCD_A1+ 26
T2X1M_DPE1N AK16 LCD_A1- 26
DPB_VSSR#5 AM8
DPB_VSSR#2 AG9 T2X0P_DPE2P AH16 LCD_A0+ 26
DPB_VSSR#1 AF10 T2X0M_DPE2N AJ15 LCD_A0- 26
+DPA_VDD18 AE13 AM6 AF19
NC_DPB_VDD18#1 DPB_VSSR#4 DPE_PVSS
AF13 NC_DPB_VDD18#2 DPB_VSSR#3 AH8 T2XCEP_DPE3P AL15 LCD_ACLK+ 26
T2XCEM_DPE3N AK14 LCD_ACLK- 26
+DPF_VDD18 AG16 AM14
DPE_VDD18#2 DPE_VSSR#3
CALIBRATION AG15 DPE_VDD18#1 DPE_VSSR#2 AH14
AG14
+DPA_VDD10 DPE_VSSR#1
AF8 DPB_VDD10#1 DPAB_CALR AE10 DPAB_CALR 150R R721
DPE_VSSR#4 AM16
AF9 DPB_VDD10#2 DPE_VSSR#5 AM18

B M92-S2/M92-XT B

+DPF_VDD10 AG21
CALIBRATION
DPE_VDD10#2
AG20 DPE_VDD10#1 DPEF_CALR AF17 DPEF_CALR 150R R726

+1.8V_RUN for HDMI interface use M92-S2/M92-XT


+1.8V_RUN
L103 +DPA_PVDD
for LVDS interface use
BLM15BD121SN1D
C1157 C1158 C1159 L106 +DPF_PVDD
4.7uF_6.3V 1uF_6.3V 0.1U BLM15BD121SN1D
C1173 C1167 C1168
4.7uF_6.3V 1uF_6.3V 0.1U
+1.8V_RUN

+1.8V_RUN

L104 +DPA_VDD18
BLM15BD121SN1D
(1.1V) C1160 C1161 C1162 L108 +DPF_VDD18
4.7uF_6.3V 1uF_6.3V 0.1U BLM15BD121SN1D
+PCIE_VDDC (1.1V) C1172 C1174 C1169
4.7uF_6.3V 1uF_6.3V 0.1U
A +PCIE_VDDC A
L105
BLM18PG300SN1D
+DPA_VDD10 QUANTA
L107 +DPF_VDD10
C1163
4.7uF_6.3V
C1164
1uF_6.3V
C1165
0.1U
BLM18PG300SN1D
Title
COMPUTER
C1170 C1166 C1171 VGA-M92-XT (PCIe)
4.7uF_6.3V 1uF_6.3V 0.1U
Size Document Number Rev
FM8 2A

Date: Tuesday, November 25, 2008 Sheet 24 of 58


5 4 3 2 1

https://Dr-Bios.com
5 4 3 2 1

D D

C C

B B

A A

QUANTA
COMPUTER

https://Dr-Bios.com
Title
VGA-M82-S (PCIe)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 25 of 58


5 4 3 2 1
5 4 3 2 1

J1
44 LCD_BCLK-
44 LCD_BCLK+
43 43
42 +LCDVCC +3.3V_RUN
42 LCD_B2-
41 41 LCD_B2- 24
+15V_ALW +3.3V_RUN +LCDVCC 40 LCD_B2+
40 LCD_B2+ 24
Q49 39
FDC655BN 39 LCD_B1-
38 38 LCD_B1- 24

1
6 37 LCD_B1+
37 LCD_B1+ 24

2
5 4 36 C7 C6 C5
R384 36 LCD_B0- 0.1U 0.047U 0.1U
2 35 LCD_B0- 24

2
330K 35 LCD_B0+
1 34 34 LCD_B0+ 24

2
33 10 10 10
33

2
R383 32 LCD_ACLK-

3
D
47 C498 C495 32 LCD_ACLK+ D
31 31
LCDVCC_ON 805 22U 0.01U 30

1
1206 30 LCD_A2-
29 LCD_A2- 24

1
29

1
10 25 28 LCD_A2+
28 LCD_A2+ 24

2
27 27
R388 C499 26 LCD_A1-
26 LCD_A1- 24
*100K_NC 0.01U 25 LCD_A1+
LCD_A1+ 24

1
25
24

2
25 24 LCD_A0-
23 23 LCD_A0- 24
22 LCD_A0+
22 LCD_A0+ 24
+3.3V_RUN +3.3V_SUS 21
21

3
20 LCD_DDCCLK
20 LCD_DDCCLK 23
2 2 19 LCD_DDCDAT
19 LCD_DDCDAT 23
Q47 18
18

1
Q50 2N7002W-7-F 17 +3.3V_RUN

1
R385 R386 2N7002W-7-F 17
16 16
*47K_NC 47K 15
R6 *0_NC 15 +LCDVCC
14 14 Adress : A9H --Contrast
Support the new imbeded 1 2 13 LCD_TST 31 AAH --Backlight

2
13
12
diagnostics. 12
11
D1 11 +GFX_PWR_SRC
10 10 (3)08/22: delete SM Bus and add

3
19 ENVDD 1 9 9
8
12 contrast function
EN_LCDVCC Q3 8
3 2 7 7
DDTC124EUA-7-F 6
6 LCD_CONTRAST 31
31 LCDVCC_TST_EN 2 5 5
4 INVERTER_CBL_DET# 31

1
BAT54C T/R 4
3 3 LCD_BAK# 31
C 2 ATI_PWM C
2
1 1 LCD_CBL_DET# 31
FI-TD44SB-LE

+3.3V_RUN
Shunt capacitors on LVDS for improving WWAN.
Populate R379 for DPST
2

LCD_B0- C16 1 2 *3.3P_NC 50 LCD_B0+


implementation only. R380 LCD_B1- C10 *3.3P_NC 50 LCD_B1+
12 *10K_NC LCD_B2- C15
1
1
2
2 *3.3P_NC 50 LCD_B2+
LCD_A0- C13 1 2 *3.3P_NC 50 LCD_A0+
R379 *0_NC LCD_A1- C12 1 2 *3.3P_NC 50 LCD_A1+ EXC24CG240U EXC24CG240U
1

1 2 LCD_A2- C3 1 2 *3.3P_NC 50 LCD_A2+ HDMI_TX2+_R 4 3 HDMI_TX2+_C HDMI_TX0+_R 2 1 HDMI_TX0+_C


19 BIA_PWM
HDMI_TX2-_R 1 2 HDMI_TX2-_C HDMI_TX0-_R 3 4 HDMI_TX0-_C
R400 0
1 2 ATI_PWM L6 L7
31 PWM_VADJ
LCD_ACLK-
LCD_ACLK- 24
R31 *0_NC R33 *0_NC
2

1 2 1 2
+PWR_SRC +GFX_PWR_SRC R4 2 C2 R32 *0_NC R34 *0_NC
*0_NC 1 2 1 2
40mil *3.3P_NC
1

40mil 6
1

4 5 LCD_ACLK+
LCD_ACLK+ 24 EXC24CG240U EXC24CG240U
2 50
1 HDMI_TX1+_R 1 2 HDMI_TX1+_C HDMI_CLK+_R 1 2 HDMI_CLK+_C
1

HDMI_TX1-_R 4 3 HDMI_TX1-_C HDMI_CLK-_R 4 3 HDMI_CLK-_C


2

Q1 C4 C11 LCD_BCLK-
LCD_BCLK- 24
3

R7 C14 FDC658AP 0.1U 0.1U L5 L4


2

B B
100K 0.1U 603 603
1

603 50 50 R1 C1 R29 *0_NC R25 *0_NC


2

50 *0_NC *3.3P_NC 1 2 1 2
1

R27 *0_NC R24 *0_NC


1
2

LCD_BCLK+ 1 2 1 2
LCD_BCLK+ 24
R5 50
100K

+3.3V_DELAY
HDMI
3 1

CN1 R394 2 1 499/F HDMI_TX2+_R


R191 0 20 R395 2 1 499/F HDMI_TX2-_R
Q48 HDMI_TX2+_C SHELL1
19,44,48,49,53 RUN_ON 2 +5V_RUN 19 D2+ GND 22
2N7002W-7-F 603 18 R393 2 1 499/F HDMI_TX1+_R
HDMI_TX2-_C D2 Shield R392
17 2 1 499/F HDMI_TX1-_R
1

D2-
1

HDMI_TX1+_C 16 D1+ R396


15 D1 Shield 2 1 499/F HDMI_TX0+_R
1

1
R21 R13 HDMI_TX1-_C 14 R397 2 1 499/F HDMI_TX0-_R
4.7K 4.7K HDMI_TX0+_C D1-
13 D0+
R389 R387 12 R391 2 1 499/F HDMI_CLK+_R
2

Q4 FDV301N 2.2K 2.2K HDMI_TX0-_C D0 Shield R390


11 D0- 2 1 499/F HDMI_CLK-_R
HDMI_CLK+_C 10
2

CK+

3
1 3 HDMI_CLK 9
23 HDMI_SCL CK Shield
HDMI_CLK-_C 8 +5V_RUN 2
CK- Q5
7 CE Remote
6 2N7002W-7-F
2

1
C25 0.1U/10V/X7R HDMI_TX2+_R NC
24 HDMI_TX2+ +3.3V_DELAY 5 DDC CLK
4 DDC DATA
2

C26 0.1U/10V/X7R HDMI_TX2-_R 3


24 HDMI_TX2- GND
A C23 0.1U/10V/X7R HDMI_TX1+_R 2 A
24 HDMI_TX1+ +5V
1 3 HDMI_DAT 19 HDMI_DET 1 23
23 HDMI_SDA HP DETGND
C22 0.1U/10V/X7R HDMI_TX1-_R 21
24 HDMI_TX1- SHELL2
C27 0.1U/10V/X7R HDMI_TX0+_R
24 HDMI_TX0+
Q2 FDV301N 46 LTS_ABA-HDM-018-K06 QUANTA
C30 0.1U/10V/X7R HDMI_TX0-_R +5V_RUN
24 HDMI_TX0-
24 HDMI_CLK+
C21

C20
0.1U/10V/X7R

0.1U/10V/X7R
HDMI_CLK+_R

HDMI_CLK-_R Title
COMPUTER

https://Dr-Bios.com
24 HDMI_CLK- 45 Remove P1 C500 LCD CONN & CK-SSCD
*0.1U_NC
Size Document Number Rev
FM8 2A

Date: Tuesday, November 25, 2008 Sheet 26 of 58


5 4 3 2 1
A B C D E

4 4

+3.3V_RUN +5V_RUN

2
D2

2
SDM10K45-7-F

1
Layout Note:
Setting R,G,B treac
D4 D5 D6
impedance to 50 ohm.

3
*DA204U_NC *DA204U_NC *DA204U_NC
+5V_CRT_REF
L21 BLM18BB750SN1D RED
19 VGA_RED
603
PAD T15 M_SEN#_R

L13 BLM18BB750SN1D GREEN


19 VGA_GRN
603 JVGA1
6
11
L11 BLM18BB750SN1D BLUE 1
19 VGA_BLU
603 7
2

3 1 12 3

1
R44 R53 R69 C62 C76 C93 C67 C77 C108 2
150/F 150/F 150/F 22P 22P 22P 10P 10P 10P 8
13
2

2
50 50 50 50 50 50 3
1

9
14
PAD T9 M_ID2# 4
10
33 +3.3V_DELAY +CRT_VCC 15
5

SUY_ 070549FR015S512ZR

3
1

3
1
2
RP2 C35 RP1
2.2KX2 0.01U 2.2KX2
Q53

1
BSS138-7-F 25
+5V_RUN +CRT_VCC

4
2

4
2
1 3 G_DAT_DDC2_C
23 G_DAT_DDC2
D24
R38 1K
2 1 2 1

2
+3.3V_RUN
5

SDM10K45-7-F

2
U2
R399 0
2 4 VGAHSYNC_R 1 2 1 3 G_CLK_DDC2_C
19 VGAHSYNC 23 G_CLK_DDC2

1
2 2
74AHCT1G125GW Q52
BSS138-7-F C49 C59
C46 0.1U Place near *10P_NC *10P_NC

2
2 1 U1,U2 < 200
50 50
mil L10 BLM11A05S
HSYNC JVGA_HS
5

10 603
U1
R398 0 L8 BLM11A05S
2 4 VGAVSYNC_R 1 2 VSYNC JVGA_VS
19 VGAVSYNC
603

1
74AHCT1G125GW
C36 C45 C43 C38
10P 10P 10P 10P
2

2
50 50 50 50

Place near JVGA1


connector < 200 mil

1 1

QUANTA
Title
COMPUTER

https://Dr-Bios.com
CRT&TV CONN

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 27 of 58


A B C D E
A B C D E

+3.3V_R5C833

1
C475 C428 C437 C439 C447 C455
10U 0.01U 0.01U 0.01U 0.01U 0.01U
603

2
6.3 25 25 25 25 25
1 1

+3.3V_R5C833
+3.3V_R5C833

Place the power caps close


U24B to the relation pins. +3.3V_RUN +3.3V_R5C833
R363 0

1
C430 C431 C432 C433 10 67 1 2
10U 0.1U 0.01U 0.01U VCC_PCI1 VCC_3V 805
20 VCC_PCI2
603 27

2
VCC_PCI3

1
6.3 10 25 25 32 C452 C436
Place the power caps close VCC_PCI4 0.1U 10U
41 VCC_PCI5
to the relation pins. 128 603

2
VCC_PCI6 10 6.3
61 VCC_RIN
16 VCC_ROUT1
34
VCC_ROUT2
64 VCC_ROUT3
1

1
114
C435 C448 C429 C474 VCC_ROUT4
120 VCC_ROUT5
0.01U 0.01U 0.47U 0.47U
2

2
603 603 86
25 25 10 10 VCC_MD

12 PCI_AD[31..0] GND1 4
GND2 13
PCI Bus PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
2 PCI_AD28 AD29 GND5 2
PowerOnReset for VccCore 1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
+3.3V_R5C833 PCI_AD21 12 99
PCI_AD20 AD21 AGND1
14 AD20 AGND2 102
PCI_AD19 15 103
AD19 AGND3
1

PCI_AD18 17 107
PCI_AD17 AD18 AGND4
18 111
R341 PCI_AD16 AD17 AGND5
19 AD16
100K PCI_AD15 36
PCI_AD14 AD15 +3.3V_R5C833 +3.3V_R5C833
37
2

PCI_AD13 AD14
38
PCI_AD12 AD13
39
AD12
1

1
C440 PCI_AD11 40 R337 10K

PCI / OTHER
PCI_AD10 AD11
GBRST# should be asserted only 1U 42
AD10 HWSPND#
69 1 2 +3.3V_R5C833
603 PCI_AD9 43 R332 R331 Memory Stick Enable
when system power supply is on.
2

10 PCI_AD8 AD9 10K 100K


44
PCI_AD7 AD8
46 XD Card Enable

2
PCI_AD6 AD7
47 58
PCI_AD5 AD6 MSEN
48
PCI_AD4 AD5 Serial ROM disable
49 55
PCI_AD3 AD4 XDEN
50
PCI_AD2 AD3
PCI Bus 51 SD Card Enable
PCI_AD1 AD2
52 57
PCI_AD0 AD1 UDIO5
53 MMC Card Enable
AD0
12 PCI_PAR 33
PAR
12 PCI_C_BE3# 7 65
C/BE3# UDIO3
12 PCI_C_BE2# 21 59
3 C/BE2# UDIO4 3
12 PCI_C_BE1# 35 C/BE1#
12 PCI_C_BE0# 45 C/BE0# UDIO2 56
PCI_AD17 R351 100 8 IDSEL
UDIO1 60
12 PCI_REQ0# 124
REQ#
12 PCI_GNT0# 123 72 IRQ_SERIRQ 13,31
GNT# UDIO0/SRIRQ#
12 PCI_FRAME# 23
FRAME#
12 PCI_IRDY# 24
IRDY#
12 PCI_TRDY# 25
TRDY# PCI Bus
12 PCI_DEVSEL# 26 DEVSEL#
12 PCI_STOP# 29 115 PCI_PIRQB# 12
1394 Interrupt
STOP# INTA#
12 PCI_PERR# 30
PERR# Media card Interrupt
12 PCI_SERR# 31 SERR# INTB# 116 PCI_PIRQC# 12
71 GBRST#
12 PCI_RST# 119
PCIRST#

17 CLK_PCI_PCCARD 121
PCICLK

12 ICH_PME# 70 PME# TEST 66 T69 PAD


R339 0
1

117 CLKRUN#
13,31 CLKRUN#
R334
100K
CoreLogic CLOCKRUN#
2

R5C833T_V00
The ICH schematics need to include a
pull-up resistor to implement CLKRUN#,
and the ICH schematics must have a
4 pull-down, or constantly drive thesignal 4
low, in order to disable CLKRUN#. CLK_PCI_PCCARD
1

R362
22
QUANTA
COMPUTER
1 2

https://Dr-Bios.com
Title
C482 5 IN 1 CONTROLLER
1P
2

Size Document Number Rev


50 FM8 2A

Date: Tuesday, November 25, 2008 Sheet 28 of 58


A B C D E
A B C D E

80 mils AS CLOSE AS POSSIBLE TO 1394 CONNECTOR.

L55 BLM18PG181SN1D *DLW21HN121SQ2L_NC


+3.3V_RUN_PHY
+3.3V_R5C833
603 4 3
modify 4 3
1 1 2 2

1
1 C478 C481 C480 C484 1
U24A 10U 0.1U 0.01U 1000P L77
603 CN3

2
6.3 10 25 50 FOX_UV31413-WRJOL-7H

TPB0N R489 0 TPB0- 1 1

1
AVCC_PHY1
98 Place these caps as close to the R5C833 as possible.
106 TPB0P R492 0 TPB0+ 2
AVCC_PHY2 2
AVCC_PHY3 110
112 TPA0N R499 0 TPA0- 3
AVCC_PHY4 3
AS CLOSE AS POSSIBLE TO R5C833 TPA0P R497 0 TPA0+ 4 4

5
6
113 TPBIAS0
GUARD GND TPBIAS0 C487 0.33U 603

5
6
16 4 3
4 3
1 1 2 2
C458 22P 1394_XI 94 R369 R368
XI 56.2/F 56.2/F L78
2

50 C485 0.01U
Y3 25 *DLW21HN121SQ2L_NC
24.576MHZ 104 TPB0N
TPBN0
1

C466 22P 1394_XO 95 105 TPB0P


XO TPBP0
50
IEEE1394/SD

*TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible.


108 TPA0N *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically.
TPAN0 *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).
C470 *0.01U_NCRICOH_FILO 96 109 TPA0P
FIL0 TPAP0
2 25 2

10K/F
R364 1 2RICOH_REXT101 REXT R367 R366
56.2/F 56.2/F C486 270P
25
C479 0.01U RICOH_VREF100
VREF
25
R371 5.11K/F

Place these caps as close


to the U24 as possible. Circuit area : As small as possible.
87 XD/MMS_DATA7 30
MDIO17
92 XD/MMS_DATA6 30
MDIO16

MDIO15 89 XD/MMS_DATA5 30

MDIO14 91 XD/MMS_DATA4 30
90 SD/XD/MS_DATA3 30
MDIO13
93 SD/XD/MS_DATA2 30
MDIO12
81 SD/XD/MS_DATA1 30
MDIO11
82 SD/XD/MS_DATA0 30
MDIO10

75 XD_WP# 30
MDIO05
3 3
MDIO08 88 SD/XD/MS_CMD 30 +3.3V_R5C833
MDIO19 83 XD_ALE 30
85 XD_CLE 30
MDIO18

2
78 R340
MDIO02 XD_CE# 30
*10K_NC

77

1
MDIO03 SD_WP#(XDR/B#) 30
close to the Chip
80 SD_CD# 2 1
MDIO00 XD_CDSW# 30
D21 BAS316
SD_CD# 30
79 MS_INS# 2 1
MDIO01 D20 BAS316
MS_INS# 30
84 R440 1 2 30
MDIO09 SD/XD/MS_CLK 30

76 MC_PWR_CTRL_0 30
MDIO04
74
MDIO06 T70 PAD
97
RSV
5
73
MDIO07 C632
22p
R5C833T_V00 50
33

4 4

QUANTA
COMPUTER

https://Dr-Bios.com
Title
IEEE 1394

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 29 of 58


A B C D E
1 2 3 4 5 6 7 8

Express Card/CARD READER


J6
XD/MMS_DATA4 25
A 29 XD/MMS_DATA4 A
26 SD/XD/MS_DATA1
SD/XD/MS_DATA1 29
XD/MMS_DATA5 24
29 XD/MMS_DATA5
27 SD/XD/MS_DATA3
SD/XD/MS_DATA3 29
XD/MMS_DATA6 23
29 XD/MMS_DATA6
28 SD/XD/MS_DATA0
SD/XD/MS_DATA0 29
XD/MMS_DATA7 22
29 XD/MMS_DATA7
29 SD/XD/MS_DATA2
SD/XD/MS_DATA2 29
21
30 SD/XD/MS_CMD
SD/XD/MS_CMD 29
SD/XD/MS_CLK 20
29 SD/XD/MS_CLK
31
19
32 XD_WP#
XD_WP# 29
ICH_SMBDATA 18
13,33,34 ICH_SMBDATA
33 XD_ALE
XD_ALE 29
ICH_SMBCLK 17
13,33,34 ICH_SMBCLK
34 XD_CLE
XD_CLE 29
16
35 XD_CE#
XD_CE# 29
MS_INS# 15
29 MS_INS#
36
SD_CD# 14
29 SD_CD#
37 PCIE_WAKE#
PCIE_WAKE# 13,33,34,42
13
38 CARD_CLK_REQ#
CARD_CLK_REQ# 17
XD_CDSW# 12
29 XD_CDSW#
39 EXPRCRD_PWREN#
SD_WP#(XDR/B#) EXPRCRD_PWREN# 31
29 SD_WP#(XDR/B#) 11
40
B MC_PWR_CTRL_0 10 B
29 MC_PWR_CTRL_0
41 PLTRST#
PLTRST# 6,12,18,31,33,34,42
9
42
8
43
+1.5V_RUN 7
44 +1.5V_RUN
6
45
5
46
+3.3V_RUN 4
47 +3.3V_RUN
3
48
2
49
+3.3V_SUS 1
50 +3.3V_SUS

88242-5001

C C

J7

1
2
12 ICH_USBP7- ICH_USBP7- 3
12 ICH_USBP7+ ICH_USBP7+ 4
5
PCIE_TX4- 6
12 PCIE_TX4- PCIE_TX4+
12 PCIE_TX4+ 7
8
PCIE_RX4- 9
12 PCIE_RX4-
PCIE_RX4+ 10
12 PCIE_RX4+
11
CLK_PCIE_EXPCARD# 12
17 CLK_PCIE_EXPCARD# CLK_PCIE_EXPCARD
17 CLK_PCIE_EXPCARD 13
D 14 D

ACS_88513-144N
QUANTA
Title
COMPUTER

https://Dr-Bios.com
8/28:change PN to 88513-144N ExpressCard/SmartCard

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 30 of 58


1 2 3 4 5 6 7 8
5 4 3 2 1

U20 +RTC_CELL
+3.3V_ALW 37 KSO[0..16]
R238 0
3 1 2 +3.3V_ALW
37 KSI[0..7] ITE8512E VBAT1
VCC 11 +3.3V_RUN

2
SMBDAT0 4 3 RP26
LQFP-128L

2
57 26 +3.3V_ALW SMBCLK0 2 1 2.2KX2
T50 PAD KSO17/GPC5 VSTBY1
2

2
KSO16 56 50 R237 C383
C679 C708 C707 C706 C349 KSO15 KSO16/GPC3 VSTBY2 *0_NC 0.1U SMBDAT1
55 92 4 3 RP25

1
10U 0.1U 0.1U 0.1U 0.1U KSO14 KSO15 VSTBY3 SMBCLK1
54 114 2 1 10KX2
1

1
603 KSO13 KSO14 VSTBY4 10
53 KSO13 VSTBY5 121
6.3 10 10 10 10 KSO12 52 127 SMBDAT2 4 3 RP24
KSO11 KSO12/SLCT VSTBY6 SMBCLK2
51 KSO11/ERR 2 1 2.2KX2
KSO10 46
KSO9 KSO10/PE
D Place these caps close to ITE8512. 45 KSO9/BUSY D
KSO8 44 66 HWPG SIO_SLP_S5# R229 *100K_NC
KSO8/ACK ADC0/GPI0 HWPG 44
KSO7 43 67
KSO7/PD7 ADC1/GPI1 IMVP6_PROCHOT# 51
KSO6 42 68
KSO5 KSO6/PD6 ADC2/GPI2 LCD_CBL_DET# SUS_ON R500
41 KSO5/PD5 KEYBOARD ADC3/GPI3 69 LCD_CBL_DET# 26 2 1 100K
KSO4 40 70 INVERTER_CBL_DET# HWPG R210 100K
KSO4/PD4 ADC4/GPI4 INVERTER_CBL_DET# 26
KSO3 39 71 IMVP_VR_ON R234 *100K_NC
KSO3/PD3 ADC5/GPI5 PBAT_PRES# 54
KSO2 38 72
KSO2/PD2 ADC6/GPI6 IINP 46
KSO1 37 ADC/DAC 73 SIO_SLP_S5#
KSO1/PD1 ADC7/GPI7 SIO_SLP_S5# 13
KSO0 36 KSO0/PD0
DAC0/GPJ0 76 PAD T52
KSI7 65 77 +3.3V_RUN
KSI7 DAC1/GPJ1 SIO_EXT_WAKE# 13
KSI6 64 78
KSI6 DAC2/GPJ2 LAN_DISABLE# 42
KSI5 63 79 LCD_CBL_DET# R214 2 1 10K
KSI5 DAC3/GPJ3 EXPRCRD_PWREN# 30
KSI4 62 80 INVERTER_CBL_DET# R220 2 1 10K
KSI4 DAC4/GPJ4 ICH_RSMRST# 13
KSI3 61 81 1 2 IRQ_SERIRQ R494 2 1 10K
KSI3/SLIN DAC5/GPJ5 SIO_PWRBTN# 13
KSI2 60 D12 SDMK0340L-7-F LCD_BAK# R487 2 1 *10K_NC
KSI1 KSI2/INT
59 KSI1/AFD
KSI0 58 KSI0/STB
PW M0/GPA0 24 BREATH_LED# 38
ICH_AZ_CODEC_RST2# R481 1 2 *0_NC 25
PW M1/GPA1 BAT2_LED# 38
R485 1 2 0 22 28
6,12,18,30,33,34,42 PLTRST# LPCRST/W UI4/GPD2 PW M2/GPA2 FAN1_PWM 39
17 CLK_PCI_8512 13 LPCCLK PW M3/GPA3 29 PWM_VADJ 26
11,33 LPC_LFRAME# 6 LFRAME PW M4/GPA4 30 BAT1_LED# 38
11,33 LPC_LAD0 10 LAD0 PW M5/GPA5 31 KB_BACKLITE_EN 37
9 PWM 32 PAD T160 +3.3V_RUN
11,33 LPC_LAD1 LAD1 PW M6/GPA6
11,33 LPC_LAD2 8 LAD2 PW M7/GPA7 34 BEEP 40
11,33 LPC_LAD3 7 LAD3
47 R239 ICH_AZ_CODEC_RST2#
TACH0/GPD6 FAN1_TACH 39
13,28 CLKRUN# 93 CLKRUN/GPH0/ID0 TACH1/GPD7 48 PANEL_BKEN 19 100K
C IRQ_SERIRQ 5 LPC C
13,28 IRQ_SERIRQ SERIRQ

3
D11 2 SDMK0340L-7-F
1 15 120 Q77
13 SIO_EXT_SMI# ECSMI/GPD4 TMRI0/W UI2/GPC4 LID_SW# 37
D10 2 SDMK0340L-7-F
1 23 124 PAD T103 2 2N7002W-7-F
13 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/W UI3/GPC6 R278

3
D14 2 SDMK0340L-7-F
1 126
11 SIO_A20GATE GA20/GPB5

1
17 11,40 ICH_AZ_CODEC_RST# 1 2 2

1
26 LCD_TST LPCPD/W UI6/GPE6 C687
D13 2 SDMK0340L-7-F
1 4 108 LCD_CONTRAST1
3 390K *0.1U_NC 24
11 SIO_RCIN#

2
WRST# KBRST/GPB6 RXD/GPB0 Q78 10
14 W RST TXD/GPB1 109 PAD T157
LCD_BAK# 16 119 MMST3904-7-F
26 LCD_BAK# PW UREQ/GPC7 CRX0/GPC0
IR/UART CTX0/GPB2 123 RUN_ON_1 44
40 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 HDDC_EN 36
R594 *0_NC 20 95 IMVP_VR_ON
6,12,18,30,33,34,42 PLTRST# L80LLAT/W UI7/GPE7 CTX1/GPH2/ID2 IMVP_VR_ON 51
ICH_AZ_CODEC_RST2# R593 0 Board ID Straps
SMBCLK0 110
Charge and BAT 46,54 SMBCLK0
SMBDAT0 SMCLK0/GPB3 SUS_ON +3.3V_ALW
46,54 SMBDAT0 111 SMDAT0/GPB4 FLFRAME/GPG2/LF 100 SUS_ON 49,53 Discrete
FLRST/GPG0/TM 106 KB_DET# 37
SMBCLK1 115 104
CLK, LCD and Thermal 17,39 SMBCLK1
SMBDAT1 SMCLK1/GPC1 FLAD3/GPG6 ICH_CL_PWROK 6,13
17,39 SMBDAT1 116 SMDAT1/GPC2 SMBUS LPC/FWH
FLASH FLAD2/SO 103 EC_FLASH_SPI_DO 32
SMBCLK2 117 102
G_Thermal 21 SMBCLK2 SMCLK2/GPF6 FLAD1/SI EC_FLASH_SPI_DIN 32

1
SMBDAT2 118 101
21 SMBDAT2 SMDAT2/GPF7 FLAD0/SCE EC_FLASH_SPI_CS# 32
and Media button FLCLK 105 EC_FLASH_SPI_CLK 32
R236 R248 R245 R244
10K *10K_NC 10K 10K

85

2
PS2CLK0/GPF0
86 82
RESET_OUT#
13,44,51 IMVP_PWRGD
RESET_OUT# 87
PS2DAT0/GPF1
EGPC EGAD/GPE1
EGCS/GPE2 83
84
PS_ID 54
5V_SUS_ON 52 31 USB_BACK_EN#
BID1
44 RESET_OUT# PS2CLK1/GPF2 EGCLK/GPE3 GFX_ON 19,21
88 PS/2 CHIPSET_ID1
B T51 PAD PS2DAT1/GPF3 B
USB_SIDE_EN#
1

37 CLK_TP_SIO 89 PS2CLK2/GPF4

2
90 96 USB_SIDE_EN#
37 DAT_TP_SIO PS2DAT2/GPF5 GPH3/ID3 USB_SIDE_EN# 35
R534 97 USB_BACK_EN#
GPH4/ID4 USB_BACK_EN# 35
1K GPIO 98 BID1 R235 R247 R246 R243
+3.3V_ALW GPH5/ID5 CHIPSET_ID1 *10K_NC 10K *10K_NC *10K_NC
99
2

ITE8512_XTAL1 GPH6/ID6
128 107 MODC_EN 36

1
CK32K GPG1/ID7
2

ITE8512_XTAL2 2 CK32KE
R488 1 18 UMA
VSS1 RI1/W UI0/GPD0 SIO_SLP_S3# 13
D31 100K ITE8512IX_JX 12 21
VSS2 RI2/W UI1/GPD1 ACAV_IN 46
1 2 WRST# 27 35
39,52 THERM_STP# PCB_BEEP_EN 40
1 1

VSS3 W UI5/GPE5
49 VSS4
SDMK0340L-7-F C702 91 112 VGA_IDENTIFY
1U VSS5 RING/PW RFAIL/LPCRST/GPB7
113 VSS6
603 +3.3V_ALW 122 125 MAIN_PWR_SW# 38
2

10 L74 BLM11A05S VSS7 PW RSW /GPE4


4 23 49 BID0
74 AVCC GINT/GPD5 33 LCDVCC_TST_EN 26
603 75 CHIPSET_ID1 BID1 USB_BACK_EN# FM6B(UMA) FM6 (Dis)
AVSS
2

C692 0 0 0 SSI (X00) SSI (X00)


0.1U ITE8512E 0 0 1 PT (X01) PT (X01)
32KHz Clock. L76 LQFP128-16X16-4-FX2 0 1 0 ST (X02) ST (X02)
1

10 0 1 1 QT (A00) QT (A00)
ITE8512_XTAL2 603 0 0 0 (A01) (A01)
BLM11A05S 0 0 1

(3)08/22: delete SM Bus and add


A CLK_PCI_8512 ITE8512IX_JX A
W2 contrast function +3.3V_RUN
4 1 ITE8512_XTAL1
R490
QUANTA
2

3 2 10 C380
0.1U R567
C385 32.768KHZ C384 *10K_NC
COMPUTER
1

18P 18P 10
1

50 50 R572 *0_NC Title

https://Dr-Bios.com
1

C704 LCD_CONTRAST1 1 2 Ultra I/O Controller ECE5028


LCD_CONTRAST 26
2.2P
2

Size Document Number Rev


50 FM8 2A

Date: Tuesday, November 25, 2008 Sheet 31 of 58


5 4 3 2 1
5 4 3 2 1

RTC BATTERY
16Mbit (2M Byte), SPI +3.3V_ALW +3.3V_ALW

+RTC_CELL +3.3V_ALW +PWR_SRC

1
R504

1
10K
R254 U26
U41 10K 1 2 3 1

2
D32 OUT IN
31 EC_FLASH_SPI_CS# 1 CE# VDD 8 4 5/3#
R264 1 2 15 6 SDMK0340L-7-F
31 EC_FLASH_SPI_CLK

2
SCK

1
D D
R242 1 2 15 5 C468 2 5 C450
31 EC_FLASH_SPI_DIN SI GND SHDN
R502 1 2 15 2 7 2.2U *1U_NC
31 EC_FLASH_SPI_DO SO HOLD# 603 *MAX1615EUK-T+_NC 805

2
2
C393 3 4 6.3 25
22P W P# VSS C390
SST25VF016B-50-4C-S2AF 0.1U

1
50 BT1
10 1 2 +RTC_1 1 2 +RTC 2
D18 R218 1K 1
SDMK0340L-7-F

2
C802 AAA-BAT-019-K01 RTC-BATTERY
1U
603

1
10

C C

B B

A A

QUANTA
Title
COMPUTER

https://Dr-Bios.com
Ultra I/O Controller ECE5028

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 32 of 58


5 4 3 2 1
1 2 3 4 5 6 7 8

L53
USBP6 D+ 1 2 ICH_USBP6+ 12
USBP6 D- 4 3 ICH_USBP6- 12
*PLW3216S900SQ2T1_NC
A A
1206
MiniCard Robson, BT. UWB connector
1 2
+3.3V_RUN +3.3V_RUN +1.5V_RUN R349 0

J11 1 2
R350 0
13,30,34,42 PCIE_WAKE# 1 W AKE# 3.3V_1 2
COEX2_WLAN_ACTIVE 3 4
34 COEX2_WLAN_ACTIVE RESERVED_1 GND0
34 COEX1_BT_ACTIVE_MINI 5 RESERVED_2 1.5V_1 6
MINICLK_REQ# 7 8 R575 1 2 0
T153 PAD CLKREQ# UIM_PW R LPC_LFRAME# 11,31
9 10 R576 1 2 0 +1.5V_RUN
GND1 UIM_DATA LPC_LAD3 11,31
11 12 R577 1 2 0
17 CLK_PCIE_MINI3# REFCLK- UIM_CLK LPC_LAD2 11,31
13 14 R578 1 2 0
17 CLK_PCIE_MINI3 REFCLK+ UIM_RESET LPC_LAD1 11,31
15 16 R579 1 2 0
GND2 UIM_VPP LPC_LAD0 11,31

1
R361 0
1 2 C460 C800
R541 1 PLTRST# 6,12,18,30,31,34,42
2 0 17 18 0.047U 0.047U

2
6,12,18,30,31,34,42 PLTRST# R570 1 UIM_C8 GND3
17 CLK_LPC_DEBUG
2 0 19 UIM_C4 W _DISABLE# 20 WPAN_RADIO_DIS_MINI# 13
21 22 1 2 10 10
GND4 PERST# R360 *0_NC SB_WPAN_PCIE_RST# 12
12 PCIE_RX3- 23 PERn0 3.3VAUX1 24 +3.3V_RUN
12 PCIE_RX3+ 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 30 +3.3V_RUN
GND7 SMB_CLK ICH_SMBCLK 13,30,34
12 PCIE_TX3- 31 PETn0 SMB_DATA 32 ICH_SMBDATA 13,30,34
12 PCIE_TX3+ 33 PETp0 GND8 34
35 36 USBP6 D-
GND9 USB_D-

1
37 38 USBP6 D+
13 PCIE_MCARD3_DET# RESERVED_3 USB_D+

2
B 39 40 + B
RESERVED_4 GND10 USB_MCARD3_DET# 13
41 42 C459 C801 C444 C441 C442 C471
RESERVED_5 LED_W W AN# 0.1U 0.047U 0.1U 0.047U 4.7U *330U/6.3V_NC
43 44

2
RESERVED_6 LED_W LAN# 603 7343
45 RESERVED_7 LED_W PAN# 46
COEX2_WLAN_ACTIVE 47 48 10 10 10 10 6.3 6.3
RESERVED_8 1.5V_3
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52
2

C803 R571
*33P_NC *100K_NC LTS_AAA-PCI-092-K01
1

50

MiniCard WWAN connector


+3.3V_RUN +3.3V_RUN +1.5V_RUN

J12

13,30,34,42 PCIE_WAKE# 1 W AKE# 3.3V_1 2


T75 PAD 3 RESERVED_1 GND0 4
T156 PAD 5 RESERVED_2 1.5V_1 6
7 8 UIM_PWR
T155 PAD CLKREQ# UIM_PW R
9 10 UIM_DATA
GND1 UIM_DATA UIM_CLK
17 CLK_PCIE_MINI2#
11 REFCLK- UIM_CLK 12
13 14 UIM_RESET
17 CLK_PCIE_MINI2 REFCLK+ UIM_RESET UIM_VPP
15 GND2 UIM_VPP 16
L54
C R542 0 USBP5 D+ C
1 2 PLTRST# 6,12,18,30,31,34,42
1 2 ICH_USBP5+ 12
17 18 USBP5 D- 4 3 ICH_USBP5- 12
UIM_C8 GND3
19 UIM_C4 W _DISABLE# 20 WWAN_RADIO_DIS# 13
21 22 *PLW3216S900SQ2T1_NC
GND4 PERST#
12 PCIE_RX1- 23 PERn0 3.3VAUX1 24 1 2 SB_WWAN_PCIE_RST# 12
Layout Note:
25 26 R550 *0_NC R359 and R358
12 PCIE_RX1+ PERp0 GND5 +3.3V_RUN
27 GND6 1.5V_2 28 1 2 close to choke
29 GND7 SMB_CLK 30 ICH_SMBCLK 13,30,34 R359 0
PCI-Express TX and RX 31 32 as possible to
12 PCIE_TX1- PETn0 SMB_DATA ICH_SMBDATA 13,30,34 minimize stubs.
direct to connector 12 PCIE_TX1+ 33 PETp0 GND8 34 1 2
35 36 USBP5 D- R358 0
GND9 USB_D- USBP5 D+
13 PCIE_MCARD2_DET# 37 RESERVED_3 USB_D+ 38
39 RESERVED_4 GND10 40 USB_MCARD2_DET# 13
41 RESERVED_5 LED_W W AN# 42 PAD T76
43 RESERVED_6 LED_W LAN# 44
45 RESERVED_7 LED_W PAN# 46
47 RESERVED_8 1.5V_3 48 +1.5V_RUN +3.3V_RUN Place caps close to connector.
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52

1
1

1
LTS_AAA-PCI-092-K01 C483 C477 C476 C467 C805 C804 + C473 + C472
0.047U 33P 33P 0.047U 33P 0.047U 100uF *330U_NC
7343

2
10 50 50 10 50 10 6.3 6.3

ESD3
JSIM1 UIM_RESET UIM_VPP UIM_PWR
1 1 6 6
UIM_PWR 5 6 2 5 UIM_PWR
VCC GND UIM_CLK 2 5 UIM_DATA
D 3 3 4 4 D
UIM_RESET 3 4 UIM_VPP
RST VPP
2

C510 C515 C507 C513 C511


UIM_CLK 1 2 UIM_DATA 33P 33P IP4220CZ6 33P 33P 1U
CLK DATA 603 QUANTA
1

50 50 50 50 10

TYC_1747314-1
Title
COMPUTER

https://Dr-Bios.com
MINI-PCI

Place as close as possible to JSIM1 connector Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 33 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

MiniCard WLAN connector

+3.3V_RUN +3.3V_RUN +1.5V_RUN

J10 L49
USBP4 D+ 1 2 ICH_USBP4+ 12
1 2 USBP4 D- 4 3 ICH_USBP4- 12
A 13,30,33,42 PCIE_WAKE# W AKE# 3.3V_1 A
33 COEX2_WLAN_ACTIVE 3 RESERVED_1 GND0 4
5 6 *PLW3216S900SQ2T1_NC
33 COEX1_BT_ACTIVE_MINI RESERVED_2 1.5V_1
MINI1CLK_REQ# MINI1CLK_REQ# 7 8 1206
17 MINI1CLK_REQ# CLKREQ# UIM_PW R
9 GND1 UIM_DATA 10
1

17 CLK_PCIE_MINI1# 11 REFCLK- UIM_CLK 12 1 2


C796 13 14 R315 0
220P 17 CLK_PCIE_MINI1 REFCLK+ UIM_RESET
15 16
2

GND2 UIM_VPP
1 2
50 R316 0
R537 0
1 2 PLTRST# 6,12,18,30,31,33,42
17 UIM_C8 GND3 18
19 20 WLAN_RADIO_OFF#
UIM_C4 W _DISABLE#
21 GND4 PERST# 22 R536 *0_NC
12 PCIE_RX2- 23 PERn0 3.3VAUX1 24 1 2 SB_WLAN_PCIE_RST# 12
12 PCIE_RX2+ 25 PERp0 GND5 26 +3.3V_RUN
27 GND6 1.5V_2 28
29 30 WLAN_SMBCLK
GND7 SMB_CLK WLAN_SMBDATA
PCI-Express TX and RX 12 PCIE_TX2- 31 PETn0 SMB_DATA 32
direct to connector 12 PCIE_TX2+
33 PETp0 GND8 34
35 36 USBP4 D-
GND9 USB_D- USBP4 D+ +3.3V_RUN
13 PCIE_MCARD1_DET# 37 RESERVED_3 USB_D+ 38
39 RESERVED_4 GND10 40 USB_MCARD1_DET# 13
41 RESERVED_5 LED_W W AN# 42
43 RESERVED_6 LED_W LAN# 44

4
2
T132 PAD 45 RESERVED_7 LED_W PAN# 46
Non-iAMT T124 PAD 47
49
RESERVED_8 1.5V_3 48
50 RP38
T131 PAD RESERVED_9 GND11
51 52 2.2KX2
RESERVED_10 3.3V_2 Q39

2
B *2N7002W-7-F_NC B

3
1
LTS_AAA-PCI-092-K01
WLAN_SMBCLK 1 3 ICH_SMBCLK 13,30,33

1 2
R303 *0_NC

+3.3V_RUN

Q36

2
*2N7002W-7-F_NC

WLAN_SMBDATA 1 3 ICH_SMBDATA 13,30,33

1 2
R304 *0_NC

Suport for WoW


WLAN_RADIO_OFF# 2 1 WLAN_RADIO_DIS# 13
D16
SDMK0340L-7-F
C C

1 2 Prevent backdrive when


R327 *0_NC
WoW is enabled.

+1.5V_RUN +3.3V_RUN Place caps close to connector.

1
1

2
+ C419
C755 C759 C758 C750 C756 C787 C792 *330U/6.3V_NC
0.047U 0.047U 0.1U 0.047U 0.1U 0.047U 4.7U 7343

2
805 6.3
10 10 10 10 10 10 10

D D

QUANTA
Title
COMPUTER

https://Dr-Bios.com
MDC CONN.

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 34 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Side External USBX2


External USB PORT hookup reference. Your design may
need more or less external ports and may be mapped
differently
+USB_SIDE_PWR 1 9
USBP0 D- VBUS GND ESATA_TX5+_R
2 D- A+ 10
DLW21HN900SQ2L USBP0 D+ 3 11 ESATA_TX5-_R
ICH_USBP0-_R USBP0 D- D+ A-
12 ICH_USBP0- 1 2 4 GND GND 12

1
ICH_USBP0+_R 4 3 USBP0 D+ C602 13 SATA_RX5-_C C697 0.01U/16V ESATA_RX5-_R
12 ICH_USBP0+ B-
150P C601 14 SATA_RX5+_C C690 0.01U/16V ESATA_RX5+_R
A L70 1206 25 0.1U B+ A
5 15

2
NPO USBP1 D- VBUS GND
6 D-
10 USBP1 D+ 7 16
D+ Shield
1 2 8 GND Shield 17
R456 *0_NC +USB_SIDE_PWR 18
Shiled
19
USBx2 & ESATA COMBO
Shield
1 2

1
R457 *0_NC JUSB1
C300 C299 FOX_3Q31815C-KB2B1B3-8H
150P 0.1U

2
DLW21HN900SQ2L 25
ICH_USBP1-_R 1 2 USBP1 D- NPO 10
12 ICH_USBP1-
ICH_USBP1+_R 4 3 USBP1 D+
12 ICH_USBP1+
L72 1206

1 2
R459 *0_NC

1
R462
2
*0_NC
E-SATA Re-driver SATA_TX5+ 1
R212 *0_NC
2 ESATA_TX5+_R2
+1.8V_RUN SATA_TX5- 1 2 ESATA_TX5-_R2

Platforms should put in PADS for the USB chokes if they R219 *0_NC

have the room. Chokes should be NOPOP. ESATA_RX5+_L R225 *0_NC ESATA_RX5+_R
1 2
C670 C698 C669 C684 ESATA_RX5-_L 1 2 ESATA_RX5-_R
0.1U/ 10V 0.1U/ 10V 0.1U/ 10V 0.1U/ 10V
B R227 *0_NC B

Place ESD diodes as close as USB connector.


+1.8V_RUN +1.8V_RUN

ESD2
USBP0 D- USBP1 D+ U37
1 1 6 6 R470 0
2 5 +USB_SIDE_PWR 1 2 1 20
USBP0 D+ 2 5 USBP1 D- EQA EN C675 0.01U/16V
3 3 4 4 2 VDD VDD 19
11 SATA_TX5+ 3 18 ESATA_TX5+_R2 ESATA_TX5+_R
*SRV05-4.TCT_NC AI+ AO+ ESATA_TX5-_R2 ESATA_TX5-_R
11 SATA_TX5- 4 AI- AO- 17
5 GND GND 16
6 15 C681 0.01U/16V
C694 0.01U/16V ESATA_RX5+_L VDD VDD ESATA_RX5+_R
11 SATA_RX5+ 7 BO+ BI+ 14
C700 0.01U/16V ESATA_RX5-_L 8 13 ESATA_RX5-_R
11 SATA_RX5- BO- BI-
9 GND GND 12
1 2 10 EQB VDD 11
Place one 150uF cap by each
+5V_SUS 45 Remove PJP8
USB connector.
R486 0 PI2EQX3211BHE ESATA_TX5+_R2 2 1 ESATA_TX5-_R2
U7 R216 499/F
2 IN GND 1

3 7 +USB_SIDE_PWR
31 USB_SIDE_EN# EN1# OUT1
OC1# 8 USB_OC0_1# 12
Each channel is 1A
45
1

+USB_SIDE_PWR +5V_SUS
C
4 EN2# OUT2 6 Remove PJP17 C
C600 C596 5
*10U_NC 0.1U OC2# U16
2

805 2 1
10 10 TPS2062AD + C620 IN GND
150U
7343 3 7 +USB_BACK_PWR
31 USB_BACK_EN#
2

6.3 EN1# OUT1


OC1# 8 USB_OC2# 12
4 6 +USB_BACK_PWR
EN2# OUT2

1
OC2# 5
C556 C561

1
*10U_NC 0.1U

2
805 TPS2062AD + C586
10 10 150U
LN1 1206 7343

2
ICH_USBP2- 4 3 USBP2 D- 6.3
12 ICH_USBP2-
ICH_USBP2+ 1 2 USBP2 D+
12 ICH_USBP2+
DLW21HN900SQ2L

R169 *0_NC J5
1 2 +USB_BACK_PWR 1 1

1
USBP2 D+ 2
C271 C267 USBP2 D- 2
R172 *0_NC 3 3
1 2 150P 0.1U 4

2
25 4
NPO 10 1775295-4

D D

Place ESD diodes as close as USB connector.

USBP2 D- 1
ESD1
6
QUANTA
1 6
USBP2 D+
2
3
2
3
5
4
5
4
+USB_BACK_PWR

Title
COMPUTER

https://Dr-Bios.com
*SRV05-4.TCT_NC SERIAL PORT & USB

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 35 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CON4
SATA Connector.
ODD Connector
GND1 1
RXP 2 SATA_TX0+ 11 CN2
RXN 3 SATA_TX0- 11
4 S1 1
GND2 SATA_RXN0_C C741 0.01U/16V GND1
TXN 5 SATA_RX0- 11 TXP 2 SATA_TX1+ 11
6 SATA_RXP0_C C746 0.01U/16V 14 3 SATA_TX1- 11
TXP SATA_RX0+ 11 14 TXN
GND3 7 GND2 4
5 SATA_RXN1_C C705 0.01U/16V
RXN SATA_RX1- 11
6 SATA_RXP1_C C703 0.01U/16V
RXP SATA_RX1+ 11
A 3.3V_0 8 +3.3V_RUN GND3 7 A
9 S7
3.3V_1 P1
3.3V_2 10 DP 8
GND4 11 +5V 9
GND5 12 +5V 10 +5V_MOD
GND6 13 15 15 MD 11
5V_0 14 +5V_HDD GND 12
5V_1 15 GND 13
16 P6
5V_2 48325-1106
GND7 17
RSVD 18
19
9/9 update PN
GND8
12V_0 20
12V_1 21
12V_2 22

67492-1441
9/9 update PN

+3.3V_RUN Place caps close to connector.


+5V_MOD

C760 C766 C776 C771 C768 C640 C646 C651 C664 C654
*10U/10V/0805_NC *1U_10V_0603_NC *0.1U/16V_NC *0.1U/16V_NC *1000P/50V_NC
B *10U/10V/0805_NC 1U/10V/0603 0.1U/16V 0.1U/16V 1000P/50V B

Place caps close to connector.

+5V_HDD Place caps close to connector.

C806 C798 C785 C794 C784 C797

10U/10V/0805 1U/10V/0603 0.1U/16V 0.1U/16V 0.1U/16V 1000P/50V

+5V_SUS +5V_MOD +5V_RUN

Q61
*SI4800BDY-T1-E3_NC
8 3 R213 0
7 2 1 2
+3.3V_ALW 6 1 805
5

1
+5V_SUS +5V_HDD +5V_RUN C364
*10U_NC

4
1
Q42 805 R226

2
*FDC655BN_NC R267 10 *100K_NC
6 R329 0 *100K_NC R259

2
5 4 1 2 +15V_ALW 2 1 MOD_EN_5V
2 805 *100K_NC

2
1

1
2

6
C C
C427 R330 2
3

+3.3V_ALW +15V_ALW *4.7U_NC *100K_NC Q33B


1

603 *2N7002DW-7-F_NC
2

1
3
6.3

1
31 MODC_EN 5
1

R342 Q33A C375

1
R343 2 1 HDD_EN_5V *2N7002DW-7-F_NC *0.1U_NC

2
*100K_NC 603
*100K_NC R255 25
6

*100K_NC
2

2
Q43B
*2N7002DW-7-F_NC
1
3

31 HDDC_EN 5
Q43A C445
1

*2N7002DW-7-F_NC *0.1U_NC
4

603
R335 25
*100K_NC
2

D D

QUANTA
Title
COMPUTER

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SATA (HDD&CD_ROM)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 36 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

KEYBOARD CONNECTOR
+5V_RUN +3.3V_ALW R91 1 2 10K
+3.3V_ALW +3.3V_ALW
JKB1
Touch Pad

GND1
31 KB_DET# 1

2
KSI7
2

1
3
R233 KSI6
RP23 100K KSI4 3
KSI2 4
4.7KX2 KSI5 5

1
KSI1 6
A
JP1 KSI3 7 A
31 KSO[0..16]

2
4
KSI0 8
31 LID_SW# 9
1 KSO5
1 31 KSI[0..7] 10
L37 1 2 BLM18AG601SN1D TP_CLK 2 KSO4
31 CLK_TP_SIO 2 11
603 3 KSO7
L38 1 3 12
31 DAT_TP_SIO 2 BLM18AG601SN1D TP_DATA 4 4
KSO6
13
603 5 KSO8
5 KSO3 14
+5V_RUN 6 6 15
KSO1
88513-064N KSO2 16
17
1

1
C376 C377 KSO0
10P 10P C378 C366 C381 C382 C372 C379 KSO12 18
10P 10P 0.1U 0.047U 0.047U 0.1U KSO16 19
2

2
50 50 KSO15 20
50 50 10 10 10 10 KSO13 21
KSO14 22
KSO9 23
KSO11 24
KSO10 25
26
27
28

GND2
29
30
FH28-60(30)SB-1SH(86)
08-05 add
For running board
B
33 B

CP2 100PX4 CP1 100PX4


C125 100P KSI7 8 7 KSO12 8 7 KSO14
50 6 5 KSO16 6 5 KSO9
4 3 KSO15 4 3 KSO11
2 1 KSO13 2 1 KSO10

1206 50 1206 50

CP4 100PX4 CP3 100PX4


8 7 KSO4 8 7 KSO3
6 5 KSO7 6 5 KSO1
4 3 KSO6 4 3 KSO2
2 1 KSO8 2 1 KSO0

1206 50 1206 50

CP6 100PX4 CP5 100PX4


8 7 KSI6 8 7 KSI1
6 5 KSI4 6 5 KSI3
4 3 KSI2 4 3 KSI0
2 1 KSI5 2 1 KSO5
C C
1206 50 1206 50

100P CAPS CLOSE TO JKB1

Key board Illumination

+KB_LED

J4 +KB_LED
R115 100K 1
+3.3V_ALW +15V_ALW +5V_RUN +KB_LED 1
13 KB_LED_DET# 1 2 2 2
1206L050YR 3 3

1
1 2 LED_PWM 4
FS1 1206 4 C170
R105 88513-044N 0.1U

2
2

Q9 200K
R45 R36 *SI2304BDS-T1-E3_NC 10

2
*100K_NC *100K_NC
3 1
Q8
1

SI2304BDS-T1-E3
C56
2

D *10U_NC R42 LED_PWM 3 1 D


6.3 *20K_NC
3

5 603
Q11A C37
2
QUANTA
6

*2N7002DW-7-F_NC *4700P/50V/0603_NC
4

31 KB_BACKLITE_EN 2
Q11B
*2N7002DW-7-F_NC Title
COMPUTER

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31 KB_BACKLITE_EN
1

TOUCH PAD, BULE TOOTH & FIR

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 37 of 58


1 2 3 4 5 6 7 8
A B C D E

4 4

Power button cable


7 J3
Battery status. 1 1
BREATH_PWRLED 2
POWER_ SW_IN0# 2
3
Power Switch 4
3
4
+3.3V_ALW +3.3V_ALW +5V_ALW2
1775295-4
1

+3.3V_ALW

1
R41
100K
2

1
47K
R43
2

1 3 2 Q12 100K
31 BAT1_LED#
10K
Q10 DDTA114YUA-7-F R40 10K

2
2N7002W-7-F 2 1 POWER_ SW_IN0#
31 MAIN_PWR_SW#
3

1
BAT1_LED C53
R52 2 1 220 RBAT1_LED 54 1U/10V

2
3 3

+3.3V_ALW
1

47K
2 Q16
31 BAT2_LED#
10K
DDTA114YUA-7-F
3

BAT2_LED
R68 2 1 68 RBAT2_LED 54
BREATH_LED# C80 *100P_NC 50

POWER_ SW_IN0# C63 *100P_NC 50

+3.3V_ALW
2 2
+3.3V_SUS +5V_SUS +5V_SUS

2
R50 28 *DA204U_NC
100K
2

D3
R48 100

3
1 3 2 4 BR_LED 1 2 BREATH_PWRLED
31 BREATH_LED#
POWER_ SW_IN0#
Q17 U4
2N7002W-7-F TC7SZ04FU(T5L,F,T)
3

1 1

QUANTA
Title
COMPUTER

https://Dr-Bios.com
SWITCH, KEYBOARD & LED

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 38 of 58


A B C D E
1 2 3 4 5 6 7 8

D25
*SSM34PT_NC
1 2
11 +5V_RUN
J9
+5V_RUN FAN1_VOUT 4 4

2
FAN1_PWM 3
31 FAN1_PWM 3
2 2
2

1
1 1 *DA204U_NC
C523 C524
2.2U 0.1U MLX_53398-0471 D26
1

2
A A
805

3
10 10

FAN1_PWM
+5V_RUN R401 4.7K
FAN1_TACH 31

+3.3V_RUN

Place under CPU 10/20mils


REM_DIODE1_P
+3.3V_RUN
U10
3

1
C518 C160 1 10 THERM_SCL
Q51 *2200P_NC 2200P VDD SCL
2

2
MMST3904-7-F 2 9 THERM_SDA

2
DP1 SDA
1

50 REM_DIODE1_N 50 3 8 THERM_ALERT#_C 1 3 THERM_ALERT# THERM_ALERT# 13


DN1 ALERT#
H_THERMDA 4 7 close to ICH
3 H_THERMDA DP2 SYS_SHDN#
Q35

1
C184 5 6
2200P DN2 GND 2N7002W-7-F
B B
EMC1423-1-AIZL-TR

1
H_THERMDC 50 SYS_SHDN#
3 H_THERMDC THERM_STP# 31,52
C161
0.1U

2
+3.3V_RUN
Cap should close to thermal IC 10

1
+3.3V_RUN +3.3V_RUN R125
1M

3
Q23

2
2 2N7002W-7-F
1

1
3

1
R113 R112
Q20 10K 10K 2 C202
2

2N7002W-7-F 0.1U
2

2
Q25

1
3 1 THERM_SDA 2N7002W-7-F 10
17,31 SMBDAT1

+3.3V_RUN
OTP 85 degree C
Q19
2

2N7002W-7-F
+3.3V_RUN R102 1 2 10K/F THERM_ALERT#_C
C C
3 1 THERM_SCL
17,31 SMBCLK1
R122 1 2 6.8K/F SYS_SHDN#

D D

QUANTA
Title
COMPUTER

https://Dr-Bios.com
FAN & THERMAL

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 39 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+5V_SPK_AMP LIN- RIN- HP2_OUT_L HP2_OUT_R J2


AUD_SPK_R1 R408 2 1 0 603 1
1

1
C370 C369 C358 C350 +5V_SPK_AMP AUD_SPK_R2 R406 0 603
30 2 1 2
2

2
*47P_NC *47P_NC 220P 220P AUD_SPK_L1 R405 2 1 0 603 3
R472 R215 AUD_SPK_L2 R407 0 603 3
2 1 4

2
100K *100K_NC 50 50 50 50 4
R467 1775295-4

2
100K

1
AUD_AMP_GAIN1 C102 C101 C100 C99
AUD_AMP_GAIN2 100P 100P 100P 100P
GAIN1 GAIN2 GAIN

1
R468 *0_NC

2
0 0 6dB REGEN AUD_AMP_MUTE# 50 50 50 50

1
R474 R209
A A
*100K_NC 100K 0 1 10dB C655
0.068UF

2
1 0 15.6dB 16

1
1 R442 1 2 *0_NC 1 1 21.6dB
30 R195 *0_NC
R496 4.99K/F +3.3V_RUN 1 2
2 1
VDD +5V_SPK_AMP
INTERNAL SPEAKER AMP +3.3V_RUN

1
+5V_SPK_AMP C328

1
C887 0.1U/10V 0.1U C343
1

1
C634 C633 C638 U18 U15 0.1U
1 2

2
1U 1U 0.1U 10 TC7SZ08FU(T5L,F,T)

2
C641

5
C642 0.015U U52A 603 603 AUD_FRONT_L C665 1 2 0.068U 1206 50 LIN- 3 6 AUD_SPK_L1 10

2
SPKR_INL+ OUTL+

5
AUD_FRONT_L_1 3 MAX4492AUD+ 10 10 10 Layout Note: AUD_FRONT_R C663 1 2 0.068U 1206 50 RIN- 2 7 AUD_SPK_L2 NB_MUTE# 1
VDD
AUD_FRONT_L 2.2U 1206 50 SPKR_INR+ OUTL- AMP_HP1_SHUD_L#
1 Place close 4 1
2 AUD_HP2_L0 C647 2 1 AUD_HP2_L0_R 1 R208 2 2.2K HP2_OUT_L 27 20 AUD_SPK_R1 HP1_JD 2 4
0.1U/16V R308
VSS
U18 pin 23. AUD_HP2_R0 C637 2 1 AUD_HP2_R0_R 1 R203 2 2.2K HP2_OUT_R 26
HP_INL
HP_INR
TPA6040A4 OUTR+
OUTR-
19 AUD_SPK_R2 EAPD# 2
AMP_HP1_SHUD# 41
BUFFER_VIAS 1 2 2.2U 1206 50 U13
QFN 32PIN

11

3
41 BUFFER_VIAS
C335 1 2 1U 603 10 24 16 TC7SZ08FU(T5L,F,T)

3
BIAS HPL AUD_HP2_L1 41
14K/F AUD_SPK_ENABLE# 23 15
SPKR_EN# HPR AUD_HP2_R1 41
Layout Note: AMP_HP2_EN 22
R228 +VDDA AUD_AMP_MUTE# HP_EN REGEN R589 1 +VDDA
25 4 2 0
Close to U18 Pin 34 5.1K/F AUD_AMP_GAIN1 31
MUTE# SPKR_INL-
1 SET R590 1 2 0 AUD_PC_BEEP
SENSEB +3.3V_RUN AUD_AMP_GAIN2 GAIN1 SPKR_INR-
1 2 32
GAIN2
29
VOUT
17 +5V_SPK_AMP
HPVDD

1
C374 9 30 VDD +5V_SPK_AMP C492 C813
R443 1 CPVDD VDD
B 2 *0_NC R230 R231 1000P 8 1U 1U B
PVDD_8

1
20K/F 39.2K/F C362 C337 C671 1 2 1U 10 18 603 603

2
50 10U 1U 805 16 C1P PVDD_18 10 10
30 12

1
805 603 C1N C336 C635 C339
11 28 Layout Note:

3 2

3 2

2
R495 4.99K/F 10 10 CPGND GND_28 1U 10U 0.1U
5
2 1 14
PGND_5
21 603 805 Place close U18.

2
PVSS PGND_21 10 10 10
41 HP2_JD 2 2 MIC1_JD 41 13
CPVSS

2
+5V_SPK_AMP
Q62 Q63 C652

1
2N7002W-7-F 2N7002W-7-F 1U TPA6040A4 R193 *0_NC

1
C644
4

C650 0.015U U52B 805 Layout Note: +3.3V_RUN 1 2


AUD_FRONT_R_1 5 MAX4492AUD+ 16
VDD
7 AUD_FRONT_R Place close to +3.3V_RUN

1
6 pin 18. C331

1
0.1U/16V R498
VSS
0.1U U17 C333
+3.3V_RUN
FB_60ohm+-25%_100MHz +VDDA
BUFFER_VIAS 1 2 R201 +VDDA TC7SZ08FU(T5L,F,T) 0.1U
11

2
5.1K/F _3A_0.05ohm DC 10
AZALIA (HD) CODEC

2
5
14K/F SENSEA 1 2 DVDD 10

5
NB_MUTE# 1

1
C352 C367 C359 C656 C693 4 AMP_HP2_EN_L 1
U19
1

1
C346 11 1U 1U 0.1U 1U 0.1U HP2_JD 2 4 AMP_HP2_EN
R198 1000P 10 10 10 10 EAPD# 2

2
39.2K/F 603 603 10 1 25 603 U14

3
50 DVDD_CORE AVDD TC7SZ08FU(T5L,F,T)
9 38

3
DVDD_CORE AVDD
2 1 40
3 2

DVDD

2
Depop R479,C699 R479
*100K_NC 13 SENSEA
2
for using 92HD73C C699 SENSE_A
34 SENSEB

1
HP1_JD 41 SENSE_B +VDDA +5V_SPK_AMP +5V_RUN
*1000P_NC 50
Q31 ICH_AZ_CODEC_BITCLK 6 R223 *2.2K_NC
1

C 11 ICH_AZ_CODEC_BITCLK HDA_BITCLK C
2N7002W-7-F R211 1 2 33 AZ_CODEC_SDIN0 8 SET 2 1
11 ICH_AZ_CODEC_SDIN0 HDA_SDI BLM21PG600SN1D
Layout Note: 5 39 L36
11 ICH_AZ_CODEC_SDOUT HDA_SDO PORT_A_L AUD_HP1_L 41
Close to U19 Pin 13 11 ICH_AZ_CODEC_SYNC 10 41 AUD_HP1_R 41

1
HDA_SYNC PORT_A_R C680 R482
11,31 ICH_AZ_CODEC_RST# 11
HDA_RST# NC/VREFOUT_A
37 FB_60ohm+-25%_100MHz
0.068UF *0_NC C371 C373
21 1U 10U _3A_0.05ohm DC

2
PORT_B_L AUD_INT_MIC_IN 41
22 16 603 805 Layout Note:
ICH_AZ_CODEC_BITCLK R217 *22_NC C363 *1P_NC PORT_B_R 10 10
28 Place close to
VREFOUT_B
+5V_SPK_AMP
PORT_C_L
23
24
1 pin 8.
PORT_C_R
29
VREFOUT_C
18
2

NC/CD_L AUD_FRONT_L_1 +VDDA C673


19
NC/CD_GND PORT_D_L
35 AUD_FRONT_L_1 41 Close to U19
R199 R466 20 36 AUD_FRONT_R_1 0.1U
NC/CD_R PORT_D_R AUD_FRONT_R_1 41
100K 100K Depop R477,R478,R484,R473 32 16
VREFOUT_D
Pop R476,R480,R483,R475 2 1
14
1

PORT_E_L AUD_MIC_L 41
41 AUD_SPK_ENABLE# AUD_SPK_ENABLE# for using 92HD73C PORT_E_R
15 AUD_MIC_R 41

5
R476,R483 close to U19, Let DVDD width be 10-mils 31 AUD_MIC1_VREFO 41
GPIO4/VREFOUT_E C657 1U R469 10K 1 BEEP 31
3

16 AUD_HP2_L0 AUD_PC_BEEP 1 2BEEP2 2 1 BEEP1 4


EAPD# PORT_F_L AUD_HP2_R0 603 10
2 17 2 SPKR 13

1
AUD_SPK_ENABLE# PORT_F_R
30
Q29 +3.3V_RUN GPIO3/VREFOUT_F R471 603
1

3
2N7002W-7-F 43 2.2K U36
DMIC_DATA R477 *0_NC PORT_G_L 74LVC1G86GW
41 DMIC_DATA 2 44
DMIC0/VOL_UP/GPIO1 PORT_G_R
1

EAPD# 3

2
3

Q58 R202 R478 *0_NC DMIC1/VOL_DN/GPIO2


45
*10K_NC R480 DVDD PORT_H_L
D 31 PCB_BEEP_EN 2 31 NB_MUTE# 2 46 D
0 R476 0 PORT_H_R
Q60
1

2N7002W-7-F 2N7002W-7-F EAPD# EAPD# 47


R483 0 48
DMIC_CLK/GPIO0/SPDIF_IN
SPDIF_OUT_0 PC_BEEP
12
33
QUANTA
CAP2
41 DMIC_CLK
R484
DMIC_DATA R475
*0_NC
0 4
DVSS1
VREFFILT
27
COMPUTER

1
7 26 Title
DVSS2 AVSS1 C668 C683 Azelia CODEC
42
AVSS2 10U 1U

2
R473 *0_NC 92HD73C 805 603 Size Document Number Rev
10 10 FM8 2A

Date: Tuesday, November 25, 2008 Sheet 40 of 58


1 2 3 4 5 6 7 8

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1 2 3 4 5 6 7 8

Headphone Jack Array Microphone & Camera 21 25


JCAMERA1
Stereo MIC Jack USBP11 D+
USBP11 D-
1
1
2 2 50
+CAM_VCC 3 3 C456 1 2 220P
40 DMIC_CLK L2 0 603 DMIC_CLK_L 4 4
5 5 40 AUD_HP1_L
C809 2 1 2.2U AUD_HP1_L_R 1 R348 2 2.2K AUD_HP1_L0
C388 1U +3.3V_RUN L1 0 603 DMIC_DATA_L 6 6 1206 50
40 DMIC_DATA
40 AUD_MIC1_VREFO 2 1 7
7
603 10 1 2 40 AUD_HP1_R
C808 2 1 2.2U AUD_HP1_R_R 1 R345 2 2.2K AUD_HP1_R0
R282 100K 1206 50
L22.L24,L29,L30,L31,L32 87212-0700l-7p-l C449 1 2 220P

2
DMIC_DATA 50
R241 R250 FB_600ohm+-25%_100MHz MIC1_JD 40
15

1
4.7K 4.7K _200mA_0.6ohm DC +3.3V_RUN L59 603 U25
C18 BLM11A05S 9/11 for dell request AUD_HP1_L0 13 9 AUD_HP1_L2
CON2 *33P_NC AUD_HP1_R0 INL OUTL AUD_HP1_R2
15 11

2
INR OUTR
A
2 1770882-4 50 +5V_RUN L56 603
NC1 4 A
40 AUD_MIC_L
C386 1 2AUD_MIC_L1
2.2U L40 1 2 BLM18BD601SN1D AUD_MIC_L2 4 *BLM11A05S_NC 22 6
1206 50 603 NC2
3 40 AMP_HP1_SHUD# 14 8
SHDNR NC3
C387 1 2 2.2UAUD_MIC_R1 L43 1 2 BLM18BD601SN1D AUD_MIC_R2 1 L57 603 +CAM_VCC 18 12
40 AUD_MIC_R
1206 50 603 6
JACK 2 (MIC) DMIC_CLK
+3.6V_CAMERA
*BLM11A05S_NC SHDNL NC4
16
C497 C451 1 NC5
5 2 2.2U 1 C1P NC6 20

1
+3.3V_RUN 10U 1206 16 3 10
C1N SVDD +3.3V_RUN
C391 C397 C19 10 19
PVDD

2
220P 220P JACK_GND 1 2 *33P_NC X5R 5 2

GND
GND
GND
GND
GND
2

2
R322 100K 50 805 PVSS PGND C443
7 SVSS SGND 17
50 50 1U

1
2
L3 C469 MAX4411ETP+ 805

21
22
23
24
25
HP2_JD 40
1 2 USBP11 D- 2.2U 16
12 ICH_USBP11-
4 3 USBP11 D+ 1206

1
12 ICH_USBP11+
16
CON3 *PLW3216S900SQ2T1_NC
2 1770882-4
L45 1 2 BLM18BD601SN1D AUD_HP2_L2 4
40 AUD_HP2_L1
603 3
JACK 1 1
1206
2
L46 1 2 BLM18BD601SN1D AUD_HP2_R2 R17 0
40 AUD_HP2_R1
603
1
6
(HP2)
2

5 1 2

1
R284 R283 +5V_RUN R18 0 +3.6V_CAMERA
*20K_NC *20K_NC C411 C416 U30
2 220P 220P 1 5

2
IN OUT
1

50 50 JACK_GND +3.3V_RUN 3 EN R382


1 2 C493 2 GND NC/FB 4 *100K/F_NC C494 C496
R336 100K *1U_NC *20P_NC *4.7U_NC +VDDA
603 *TPS73601DBVR_NC 50 603
10 6.3
HP1_JD 40

2
R378
*100K_NC
CON5 R381 +VDDA U29A

8
R318 0 2 1770882-4 *49.9K/F_NC *LM358ADR2G_NC

1
AUD_HP1_L2 L51 1 2 BLM18BD601SN1D AUD_HP1_L3 4 3

2
R319 0 603 3 1 R377 *0_NC
JACK 3 (HP1)

2
B AUD_HP1_R2 L52 1 AUD_HP1_R3
2 BLM18BD601SN1D 1 R585 2 +VDDA B

2
603 6 *1K_NC C490 R376
5 *2.2U_NC *100K_NC

4
2

805

1
R324 R323 C425 C426 INT_MIC_C_L+ 10 C491
44

1
*20K_NC *20K_NC 220P 220P JACK_GND *0.1U_NC
2

2
C811

2
50 50 *2.2U_NC R586 10
1

805 *1K_NC

1
10
JP2
C489 *0.1U_NC U29B

8
603 16 R374 *10K_NC LM358ADR2G
2 INT_MIC_2_L+ 2 1 INT_MIC_L1+ 2 1 INT_MIC_L0+ 5 C812 *0.1U_NC
2 INT_MIC_IN_OP 2
1 7 1 AUD_INT_MIC_IN 40
1 INT_MIC_2_L- INT_MIC_L1-
2 1 2 1 INT_MIC_L0- 6
R373 *10K_NC 603 16

2
C488 *0.1U_NC

4
*53780-0270_NC R584 603 16
1 *1K_NC
2

2
M1 INT_MIC_C_L- 1 2
*NEI_TC2008H010_NC R375 *100K_NC
D22

2
08-26 CHANGE C810 *SM05_NC
P/N CHANGE TO TC2008H010 *2.2U_NC R583
805 *1K_NC Layout Note:

3
10
Place close to CODEC.

1
C C

1
Gur_0808: 0 ohm removal,
INTERNAL SUBWOOFER AMP L58 BLM18PG121SN1D
1U/10V
C529 CC0603 U34
delete R304, R309
CN7
AUD_MONO_OUT AUD_SUB_IN+ 1 2 SUB_IN+ 2 11 SUB_OUT+ 1
IN+ OUT+ 1
120ohm, 2A 1 2 SUB_IN- 3 MAX9759 10 SUB_OUT- 2
+5V_SPK_AMP IN- OUT- 2
SYNC Condition C528 C532 1U/10V
TQFN 16PIN
MLX_53261-0271
VDD Spread-spectrum mode with fS = 1200kHz ±70kHz. 100P CC0603 1
VDD
2

1
50 C853 C530 C412
R417 GND Fixed-frequency mode with fS = 1100kHz. NPO R402 100K 0.1U/10V 3300P 3300P
100K +5V_SPK_AMP 1 2 5 4

2
SHDN# GND +5V_SPK_AMP
FLOAT Fixed-frequency mode with fS = 1500kHz. SUB_MUTE#
+5V_SPK_AMP 1 2 8
1

SYNC R357 100K MUTE#


Clocked Fixed-frequency mode with fS = external clock frequency. PVDD
9
3

1
C854
33
2

2 0.1U/10V
40 AUD_SPK_ENABLE#
R411 SYNC 7 6

2
SYNC PGND

1
*100K_NC Q79 13 C885
1

2N7002W-7-F SYNC_OUT 10U/10V


AUD_SUB_GAIN1 16 12 CC0805
1

2
G1 PVDD

1
AUD_SUB_GAIN2 15 C855
G2 0.1U/10V
17 Exposed Paddle PGND 14 2

MAX9759ETE+
+5V_SPK_AMP
2

R609 +5V_SPK_AMP
100K
GAIN1 GAIN2 GAIN
0 0 24dB
2

+5V_SPK_AMP
30 30 30
1

BUFFER_VIAS +5V_SPK_AMP R403 R416


D
BUFFER_VIAS 40
BUFFER_VIAS
0 1 18dB D
100K 100K
2

BUFFER_VIAS U52C U52D 1 0 12dB


2

R602 C862 C526 0.47U/6.3V R410 10K/F MAX4492AUD+ 12 MAX4492AUD+


1

VDD
100K 1 2 1 2 10 R610 C876 C531 14 AUD_MONO_OUT AUD_SUB_GAIN1 1 1 6dB
40 AUD_FRONT_L_1 R713 VDD
AUD_SUB_GAIN2
2.2U/10V 8 1 2 13
1

VSS
CC0805 1 2 1 2 1 2 9
1

40 AUD_FRONT_R_1 VSS
1

10K/F 0.068U/16V 0.068U/16V


11

C527 0.47U/6.3V R307 10K/F R412 R409


QUANTA
11

10K/F R720 *100K_NC *100K_NC


1

C865 30 20K/F

https://Dr-Bios.com
C864 0.015U R306 100K/F 30 COMPUTER
2

0.068U/16V 1 2
2

Title
R623 4.99K/F R719 14K/F AUDIO CONN
2 1 1 2
Size Document Number Rev
FM8 2A

Date: Tuesday, November 25, 2008 Sheet 41 of 58


1 2 3 4 5 6 7 8
5 4 3 2 1

+1.2V_LOM
Core Power Decoupling
+3.3V_LAN

C221 C154 C208 C220 C549 C113 C207 C564 C226 T78
4.7U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U PAD
10 10 10 10 10 10 10 10 10
X5R X7R X7R X7R X7R X7R X7R X7R X7R
805

+3.3V_LAN

15
19
56
61

68
U9

6
D D

VDDP Power Decoupling +1.2V_LOM +1.2V_IO

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

DC/VDDP
L27
+1.2V_IO BLM18AG601SN1D
36 LAN_BIASVDDH 1 2
BIASVDDH
5
C177 C123 VDDC_IO/VDDC C178 0.1U 10
55
0.1U VDDC_IO/VDDC L29
0.1U 13
10 10 VDDC LAN_XTALVDDH BLM18AG601SN1D
20 23
X7R X7R VDDC XTALVDDH
34 1 2
VDDC
60
VDDC C201 0.1U 10
45 LAN_AVDDL
AVDDL/AVDDH L26
BLM18AG601SN1D
VDDIO Power Decoupling 38 LAN_AVDDH 1 2
DC/AVDDH
+3.3V_LAN
52

C539 C130 C162 C112


+1.2V_LOM L25
BLM18AG601SN1D
LAN_AVDDL
BCM5784M DC/AVDDH

4.7U
10
0.1U
10
0.1U
10
0.1U
10
1 2 39
AVDDL 10mm x 10mm
51
X5R X7R X7R X7R C540 4.7U/10V/0805 C156 0.1U 10 AVDDL
68-Pin QFN TRD3_N
49 TRD3- 43 Place one cap close pin 42, 48 respectively.
805 805 10 50
TRD3_P TRD3+ 43
L28 48 LAN_AVDDH C115 0.1U/10V
BLM18AG601SN1D AVDDH/TRD2_N
47 TRD2- 43
LAN_GPHYPLLVDDL TRD2_N/TRD2_P
1 2 35 46 TRD2+ 43
GPHY_PLLVDDL TRD2_P/AVDDL
R145 2 1 200/F LAN_XTALO C200 4.7U/10V/0805 C187 0.1U 10
805 10 42 LAN_AVDDH C145 0.1U/10V
L64 AVDDH/TRD1_N
Y1 43 TRD1- 43
LAN_XTALI BLM18AG601SN1D TRD1_N/TRD1_P
1 2 44 TRD1+ 43
LAN_PCIEPLLVDDL TRD1_P/AVDDL
1 2 30
PCIE_PLLVDDL
25MHz 41 TRD0- 43
C562 4.7U/10V/0805 C557 0.1U 10 TRD0_N
40
C 805 10 TRD0_P TRD0+ 43 27 C
C254 C262 2
27P 22P L65 LINKLED#
50 50 BLM18AG601SN1D 27
PCIE_PLLVDDL
SPD100LED#
SPD1000LED#
1
67
Remove LAN LED function
NPO NPO 1 2 LAN_PCIESDSVDDL 33 66
PCIE_VDDL TRAFFICLED#
C563 4.7U/10V/0805 24 8 LAN_GPIO T83
805 10 C558 0.1U 10 PCIE_VDDL/GND GPIO2
+3.3V_LAN
R78 & R76: Stuff only if U5 is installed
PAD

9 +3.3V_LAN
UART_MODE BCM_WP
7
C229 1 GPIO1_SERIALDI
12 PCIE_RX6+/GLAN_RX+ 2 0.1U 10 LAN_PCIETXDP 26 4

1
C228 1 LAN_PCIETXDN PCIE_TXD_P GPIO0_SERIALDO
12 PCIE_RX6-/GLAN_RX- 2 0.1U 10 25
PCIE_TXD_N
12 PCIE_TX6+/GLAN_TX+ 31
PCIE_RXD_P R78 R77 R76 C114
12 PCIE_TX6-/GLAN_TX- 32
PCIE_RXD_N 4.7K *4.7K_NC 4.7K
13,30,33,34 PCIE_WAKE# 12 U5 0.1U
R94 0 WAKE# 10
6,12,18,30,31,33,34 PLTRST# 10 8 1

2
R96 *0_NC PERST# BCM_SCL VCC A0 X7R
12 SB_LOM_PCIE_RST# 29 65 7 2
PCIE_REFCLK_P SCLK_EECLK SI NC A1
17 CLK_PCIE_LOM 28 63 6 3
PCIE_REFCLK_N SI BCM_SDA SCL A2
17 CLK_PCIE_LOM# 64 5 4
SO_EEDATA CS# SDA VSS
62
+3.3V_LAN CS# BCM_SCL R79 4.7K
24LC02BT-I/STG

Gur_0331: change "LAN_DISABLE#" SI R80 4.7K


to "LAN_DISABLE" for high active
1

T16 T79 T82 CS# R81 4.7K


R75 R74 59 LAN_ENERGY_DET T80 PAD PAD PAD
4.7K +3.3V_RUN +3.3V_LAN ENERGY_DET
4.7K LAN_DISABLE
PAD
is hign active R82 1K 54
2

R83 1K VAUX_PRSNT +1.2V_IO


53
VMAIN_PRSNT
31 LAN_DISABLE# 3
LOW_PWR
58 17 R120 0
TEST1/SMB_CLK VDDC_IO/VDDP
57
TEST2/SMB_DATA
LAN_XTALO 22 18 LAN_REGCTL25
B
LAN_XTALI XTALO REGOUT12_IO/REGCTL25 B
21
XTALI
LAN_RDAC 37
RDAC +3.3V_LAN
R451
2 1/F 1 C573 C578
R114
1.24K/F
39 2512 0.1U
10
4.7U
10

3
Make sure it +3.3V_LAN X7R X5R
805
stays high when LAN_REGCTL12
14 1 Q27
2

not driven by REGCTL12 STN790A-E(585B)


BCM5784M. R95 +1.2V_LOM
*4.7K_NC

2
4
C537 C567
1

LOMCLK_REQ# 11 0.1U 10U


CLK_REQ# 10 10
Package Body X7R X7R
GND

16 805
SUPER_IDDQ/GND
BCM5784MA0KMLG
69

Note:thermal pad

A A

QUANTA

https://Dr-Bios.com Title
COMPUTER
LAN

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 42 of 58


5 4 3 2 1
5 4 3 2 1

RJ-45 Connector
50 CON1 2006123-4

TRANSFORM RJ45-TX3- 8 8
RJ45-TX3+ 7
RJ45-TX1- 7
6 6
L63 RJ45-TX2- 5
D
RJ45-TX3+ RJ45-TX2+ 5 D
CHIP SIDE MEDIA SIDE TX0+ 24 4 4
TRD3+ 1 RJ45-TX1+ 3
42 TRD3+ TD0+ 3
23 RJ45-TX3- RJ45-TX0- 2
TRD3- TX0- RJ45-TX0+ 2
42 TRD3- 2 TD0- 1 1
TXCT3
TDCT 3
TXCT0 22
27
TDCT0 1:1 TXCT2
TXCT1 21
TDCT 4 TDCT1 RJ45-TX2+ O G
TX1+ 20
TRD2+
42 TRD2+ 5 TD1+
19 RJ45-TX2- Remove LAN LED function
TRD2- TX1-

CHSGND1
CHSGND2
42 TRD2- 6 TD1- 1:1 18 RJ45-TX1+
TRD1+ TX2+
42 TRD1+ 7 TD2+
17 RJ45-TX1-
TRD1- TX2-
42 TRD1- 8 TD2-
16 TXCT1

9
10
TDCT TXCT2
9 TDCT2 1:1 15 TXCT0
TDCT TXCT3
10 TDCT3
14 RJ45-TX0+
TRD0+ TX3+
42 TRD0+ 11 TD3+
13 RJ45-TX0-
TRD0- TX3-
42 TRD0- 12 TD3- 1:1
MGG3S-00006 or H5120NL

C C

TRD3+ C550 6.8P 50


TRD3- C553 6.8P 50
TRD2+ C559 6.8P 50
TRD2- C565 6.8P 50
TRD1+ C568 6.8P 50
TRD1- C570 6.8P 50 TXCT0 R150 75/F
TRD0+ C577 6.8P 50 TXCT1 R143 75/F
TRD0- C581 6.8P 50 TXCT2 R128 75/F
TXCT3 R124 75/F

C129
1000P
3K
X7R
TDCT 1808
TDCT
B B
TDCT
TDCT

LAYOUT NOTE:

1
C224 C214 C246 C248
0.1U 0.1U 0.1U 0.1U CAP CLOSE TO TRANSFORMER
10 10 10 10 one cap for each pin

2
+3.3V_LAN +3.3V_SUS

R157 0 Reserved for EMI.


603

A A

QUANTA
Title
COMPUTER

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LAN SWITCH

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 43 of 58


5 4 3 2 1
1 2 3 4 5 6 7 8

+3.3V_SUS +3.3V_ALW

2
A A
R279 R285
0 *0_NC

5 1
13,31,51 IMVP_PWRGD 2
4 ICH_PWRGD 6,13
31 RESET_OUT# 1

U39

3
74AHC1G08GW

Keep Away from high speed buses

B +3.3V_ALW B

14
U40A
1
3
48 1.5V_RUN_PWRGD 2
U40C
SN74AHC08PW 9
8
10
U40B
50 GFX_PCIE_PWRGD 4 SN74AHC08PW
6
50 GFX_CORE_PWRGD 5

SN74AHC08PW

U40D
12
11 HWPG
HWPG 31
48 1.05V_RUN_PWRGD 13

SN74AHC08PW
C C

+3.3V_ALW

U38
74AHC1G08GW
5

49 1.8V_SUS_PWRGD 2
4 RUN_ON 19,26,48,49,53
31 RUN_ON_1 1
3

R491 1 2 *0_NC

D D
R493 2 1 *10K_NC RUN_ON

R249 2 1 *10K_NC RUN_ON_1 QUANTA


Title
COMPUTER

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System Reset Circuit

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 44 of 58


1 2 3 4 5 6 7 8
1 2 3 4 5

A A

B B

C C

D D

QUANTA
Title
COMPUTER

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Battery Selector

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 45 of 58


1 2 3 4 5
A B C D E

+PWR_SRC
Id=9.6A@Vgs=10V
PQ17
SI4835DDY-T1-E3

1 8
2 7
PQ19 3 6
SI4835DDY-T1-E3 5

8 1 PR107 0.01/F 2512


45

1 4
+DC_IN_SS 7 2 1 2 +DC_IN_SS
+DC_IN_SS
6 3
5

1
PC146 PC52 PR109
1 2200P 0.1U 1

4
603 470K
Remove PJP4

2
50 50
1 2 1 2
PR53 10K PR54 100K

CSSN
CSSP
3
2

PQ7

1
2N7002W-7-F

2
+DC_IN_SS FL3 FL2

LDO HI1206T161R-10(160,6A) HI1206T161R-10(160,6A)

1
PD4

1
SDM10K45-7-F

1
PR67 PC62 PC51 PC147 PC148

1
365K/F 1U 2200P 0.1U 10U PC50

1
805 603 1206 10U

28

27

2
1
25 PR61 0 603 50 50 25 1206

2
PR69 25

CSSP
GND

CSSN
LDO 49.9K/F 22 PC63 1U
DCIN LDO
2 1 2 1
1

603 10

1
2 1 8731_ACIN 2 25 BST PC71 RDS(ON)=30m ohm
ACIN BST

5
6
7
8
2 PR55 PC74 0.01U PR66 0.1U 2

1
10K/F 25 33/F 603 PQ4
21 603 50 4 SI4800BDY-T1-E3
2

LDO PC72 1U
13

2
31 ACAV_IN ACOK
26 2 1 PC55 PL2 PR134
VCC FL4
1

+3.3V_ALW 11 603 10 3300P 5.8UH+-30%5.5A SIL104R-5R8B 0.01/F 2512

1
2
3
VDD DHI CHG_CS
DHI 24 1 2 1 2 1 2 +VCHGR 54
PR57 1 2 10*10.1

5
6
7
8

2
15.8K/F PC70 0.1U 23 LX PR56 1 HI1206T161R-10(160,6A)

4
LX

1
603 50 603 PR47 PC24 PC132
2

10 20 DLO 50 4 2.2 3300P 2200P


31,54 SMBCLK0 SCL DLO

1
9 805 PC133 PC134

2
31,54 SMBDAT0 SDA
14 19 RDS(ON)=20m 50 1000P 50 0.1U PC15 PC31 PC131

2 1
BATSEL PGND
SMBUS Address 12 GNDA_CHG 603 10U *10U_NC 10U

1
2
3

2
31 IINP
IINP 8 IINP CSIP 18 ohm PQ26 PC56 50 50 1206 1206 1206

12H
Adress :
SI4800BDY-T1-E3 1000P 25 25 25
17
9

1
CSIN 50
6
CCV
PR68 CSIP Max Charging current
PR50
2

4.7K 5 15 2 1 +VCHGR
CCI FBSA
100 CSIN setting 4.7A
16
FBSB

2
4
CCS PC67
GND
DAC
1

3 220P

1
REF
1

PR65 PC73 PC79 PC76 PC75 MAX8731A 50


TABLE 1
1 7

12

8.45K/F 0.1U 0.01U 0.01U 0.01U 8731REF PU3


1

10 25 25 25
2

PC78 PC77
2

3 1U 0.1U 3
TRIP CURRENT
2

603 ADAPTER(W) Ra Rb Rc **Rd


10 10 PR64 0
(A)
603
GNDA_CHG 65 3.17 57.6K 13K 105 N/A
90 4.43 51.1K 17.8K 348 33.2K
130 6.43 32.4K 20.5K 100 27.4K
150 7.43 30.9K 24.9K 432 88.7K
200 9.75
11.28
19.1K 28K 301 36.5K
230 (see note3) 32.4K 6.49K 115 N/A
Note 1: PR96 is popluated if ADAPT_TRIP_SEL is used to program for
the next lower adapter.
ADAPT_TRIP_SET is floating for the higher adaptor,
grounded for the lower adaptor.
Note 2: 24.9K at PR96 allows the 65W adaptor seetting to switch
down to 45W.
4 4

Note 3: PR35 must be 5mOhms instead of 10mOhms for the 230W adaptor.

QUANTA
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Title
Charger (ISL88731)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 46 of 58


A B C D E
1 2 3 4 5

A A

BLANK PAGE FOR PAGE


B B

NUMBER SAME AS DISCRETE

C C

D D

QUANTA
Title
COMPUTER

1 2
https://Dr-Bios.com
3 4
Size

Date:
Document Number
FM8

Tuesday, November 25, 2008 Sheet


5
47 of 58
Rev
2A
5 4 3 2 1

+PWR_SRC

32 45 Remove PJP17

1
Discrete Max current(TDC)->7A
PC34 PC137 PC139 PC38
10U *10U_NC 0.1U 2200P
OCP->10A

2
1206 1206 50 50 Freq=300KHZ
25 25
603

5
6
7
8
D D
PC126
*0.1U_NC 51117DH 4 PQ24 +1.05V_VCCP
1 2
FDS8878
45

1
2
3
PR118
PU6 PC135
0 PR125 0
1 2 1 EN_PSV VBST 14 2 1
19,26,44,49,53 RUN_ON
603
2 13 PL4 Remove PJP13,PJP15
TON DRVH 0.1U 1.5UH30%10A(SIL104R-1R5B)
45 +1.05V_VCCP 3 VOUT LL 12 50 51117LX 1 2
603
+5V_ALW2 1 2 4 V5FILT TRIP 11
PR108

5
6
7
8
9

1
300/0603 51117_FB 5 10 +5V_ALW2
VFB V5DRV

2
6 9 51117DL 4 PQ23 PR33 + PC159
44 1.05V_RUN_PWRGD PGOOD DRVL FDS6680AS *2.2/F/0603_NC PC158 220UF/ 2.5V/ ESR15

EPAD
7 8 0.1U

1
GND PGND
50

1
2
3
2

2
PR3
603
1

2
PR106 TPS51117RGYR PR130 20K/F/0603

15

1
100K PC118 PC136 13K/F PC1
1

*0.1U_NC 1U/10V/0603 PC39 *47P_NC


2

1
PC113 50 PR122 0 *2200p/50V_NC 50
1

2
1U/10V/0603
2

603
C +3.3V_SUS 603 C
UMA Max current(TDC)->12.1A
OCP->17.54A
Freq=300KHZ
Rds-on=7.25mOhm
PR2 Rds-on=8.519mOhm(@60C) 51117_FB

2 1

237K/F PR15
603 49.9K/F/0603

+3.3V_SUS
1

B B
PR164
100K
2

PU7 RT9018B Max current(TDC)->2.06A


44 1.5V_RUN_PWRGD 1 POK 8
GND
2 VEN ADJ 7
19,26,44,49,53 RUN_ON PR163 0 3 VIN 6
VO +1.5V_RUN
4 VPP NC 5
2

1
9

+1.8V_SUS PR165 PR160 0 603


*100K_NC +5V_ALW2 PR161 PC175
9
2

49.9K/F 10U Remove PJP22


R1 45
2

Remove PJP21 805


45 PC174 PC179 PC180 PC173 4
2 1

1U 0.1U 0.1U 0.1U


805 25 25 25
1

PR162
10 603 603 603 56K
Vout =0.8(1+R1/R2)
=1.5V
R2
1

A A

QUANTA
Title
COMPUTER

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1.05_VCCP & 1.5V_RUN

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 48 of 58


5 4 3 2 1
5 4 3 2 1

D D

45
PR76 *0_NC +PWR_SRC

S3_1.8V S5_1.8V

2
PC80 PC162 PC82 PC163
Remove PJP18
PC91 PC92 2200P 0.1U 10U 10U

1
0.1U 0.1U PR145 50 50 1206 1206

5
6
7
8
9
25 25 *2.2/F_NC 603 25 25
603 603 603 Discrete Max current(TDC)->16A
4 PQ30 OCP->22.4A
NTMFS4821NT1G
45 +1.8V_SUS Freq=400KHZ

1
2
3
PC84
PU4 TPS51116_8 PC160
1 VLDOIN DRVH 19 +1.8V_DH *2200P_NC
50
45
C 1U/10V/0603 PR71 0 PC85 2 C
+0.9V_DDR_VTT 2 VTT VBST 20 1 0.1U PL6
603 50 603 P2
PC87 PC86 4 18 +1.8V_LX +1.8V_SUS
10U 10U VTTSNS LL 0.88uH_MPC1040LR88
805 805 5 17 +1.8V_DL
10 10 GND DRVL
Remove PJP7

1
3 VTTGND PGND 16

5
6
7
8
9
PR144 PC153 + PC157
DIS_MODE 6 11 S3_1.8V PR81 0 *2.2/F_NC 0.1U *330U/2.5V/ESR15_NC

2
MODE S3 RUN_ON 19,26,44,48,53 + PC156
4 PQ29 603 25
PR75 0 S5_1.8V PR82 0 NTMFS4846NT1G 330U/2.5V/ESR15
V_DDR_MCH_REF 7 VTTREF S5 12 SUS_ON 31,53 603 Remove PJP14,PJP16
1

5VIN 8 14 5VIN

1
2
3
PC89 COMP V5IN PC161
0.033U 9 13 2 PR77 1 +3.3V_ALW *2200P_NC
2

VDDSNS PGOOD 100K


GND
GND
GND
GND
GND
GND
GND

603 50
PR78 0 10 15
25 VDDQSET CS
1.8V_SUS_PWRGD 44
UMA Max current(TDC)->10.25A
21
22
23
24
25
26
27

FOR DDR II PC88


*1000P_NC OCP->14.9A
1

PR74 Freq=400KHZ
2

PC93 50 11K/F
DIS_MODE *0.1U_NC
2

PR73 0 50 Rds-on=7.7mOhm
5VIN

603
Rds-on=9mOhm(@60C)
PR83 0 PC94
+1.8V_SUS 4.7U
+5V_ALW2
1 2 805
PR72 *0_NC 10

B
45 B

PC90 PR79
*18P_NC *14.3K/F_NC
50

PR80
*10K/F_NC
(Note 1) Current Limiting Setting :
Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)

A A

QUANTA
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Title
1.8VSUS & 0.9VTT (TPS51116)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 49 of 58


5 4 3 2 1
1 2 3 4 5

+5V_SUS
+PWR_SRC
45
PR23
GFX_+5V_RUN 2 1

10
603
Remove PJP3

1
PD9

2
A A
19 GFX_RUN_ON GFX_RUN_ON PC41 SDM10K45-7-F PC58 PC57

2
2.2U 10U 10U PC60 PC59

2
PC29 10 1206 1206 2200P 0.1U

1
1U 25 25 603

1
805 50 50
10
603 Max current(TDC)->12A
1

OCP->16.8A
PR12 Freq=300KHZ
*61.9K/F_NC

28

27

26

25

24

23

22
2

PU1

5
6
7
8
+VCC_GFX_CORE

TPO

SHDNA#

AVDD

SKIP#

GND

PGND1

VDD
PR121 *0_NC 4 PQ5
+VCC_GFX_CORE PR16 *0_NC FDS6298
1 TON LGATE 21
PR137 1 603 PC142 0.22U PL5
13
603 603
2 20 1 2 1 2
45

1
2
3
OVP/UVP BOOT 805 50 0.75U +-20% 14.5A(FDVE0630-R75M=P3)
2.0V GFX_REF ISL88550LX
3 REF PHASE 19 2 1
PR17

1
1 2 4 18 ISL88550DH
ILIM UGATE

5
6
7
8
9
475K/F MAX8632 PR143
5 POK1 VIN 17 2.2 Remove PJP6,PJP12
2

1
ISL88550DL 4 + PC155
805
PC128 PR8 PC151 330U/2.5V/ESR15
6 16 17

2
511K/F POK2 OUT 0.1U
0.22U PQ27
1

2
6.3 7 15 FDMS8672S

1
2
3
STBY# FB PC152 10
29

PGND2
2

EPAD

REFIN
VTTR
VTTS
B 30 32 1500P B

VTTI
EPAD EPAD

VTT
31 33

SS
+3.3V_SUS EPAD EPAD 50
PR133 0
PR11 100K

10

11

12

13

14
2 1 Rds-on=7.25mOhm 603
1 2 GFX_REF Rds-on=8.519mOhm(@60C)
PC20 0.047U
10 +1.8V_SUS

1
PR10 100K Place near GND pin24
2 1 45

1
+ PC44 PR48
PR132 10K/F 10U Remove PJP2 PC61 16.5K/F
2 1 1206 1000P 402

2
6.3 Max current(TDC)->1.89A PR52
50
1

44 GFX_PCIE_PWRGD PR129 PC26 +1.1V_GFX_PCIE


100K/F 1U 0.7V
PR126 100K 603 +3.3V_SUS
2

10 115K/F
44 GFX_CORE_PWRGD 2 1 45

1
PR51
1

1
PC33 PC37 Remove PJP11 115K/F
22U 22U PR49
PR60
1

805 805 57.6K/F PR58


2

3
PC21 4 4 1 2 402 *10K_NC

2
0.01U PQ8 PR59
2

16 BSS138-7-F 10K
301/F
2 GFX_CORE_CNTRL1 19
+3.3V_SUS 603
PR169
115K/F
2

C C
PC64

1
PR63 0.01U/16V
*10K_NC

3
PR62
1

10K
19 GFX_CORE_CNTRL0 2 1 2 PQ28
BSS138-7-F

1
PC154
0.01U +3.3V_SUS

1
2

16

PR167

3
*10K_NC
PQ38 PR168
BSS138-7-F 10K
2 GFX_CORE_CNTRL2 19

PC182

1
0.01U/16V

GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 GFX_CORE_CNTRL2 +VCC_GFX_CORE


D D
LOW LOW LOW 0.9
HIGH LOW LOW 1.0V
HIGH HIGH LOW 1.1V
QUANTA
HIGH HIGH HIGH 1.2V Title
COMPUTER

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VGA DC/DC

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 50 of 58


1 2 3 4 5
5 4 3 2 1

+PWR_SRC
45 Remove PJP1,PJP5
+3.3V_SUS
D D

PT1
1

1
PR38

PAD

2
10 PQ6 PR34
603 NTMFS4821NT1G *2.2_NC PC49 PC48 PC53 PC54 PC145 PC144 PC150 PC149

5
6
7
8
9
805 0.1U 2200P 10U 10U 10U *10U_NC 0.1U 2200P

1
PR41 1 2 0 50 50 1206 1206 1206 1206 50 50
H_DPRSTP# 3,6,11

2
UG1 4
PR40 1 603 25 25 25 25 603
2 499/F DPRSLPVR 6,13
PC47

2
PR39 1 2 0 *1500P_NC

1
2
3
IMVP_VR_ON 31
PC45 50

CLK_EN#
0.1U P3
VID6 4

1
PL3 0.36uH_30A_ETQP4LR36WFC
VID5 4
10 PH1 2 1 +VCC_CORE
VID4 4
VID3 4

1
VID2 4 PQ25

3
+3.3V_RUN +3.3V_SUS NTMFS4846NT1G PR31
VID1 4

5
6
7
8
9

5
6
7
8
9
VID0 4 2.2

49

48

47

46

45

44

43

42

41

40

39

38

37
805
1

PU2 LG1 4 4

1
3V3

CLK_EN#

DPRSTP#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
GND

DPRSLPVR

VR_ON
PR166 PR36 PC69 + PC42 + PC66
1.91K/F *1.91K/F_NC PC40 0.1U 330U 330U

1
2
3

1
2
3

1
1500P 50 2 2
2

2
13,31,44 IMVP_PWRGD 1 36 PR26 603 50
PGOOD BOOT1 603 7343 7343

1
PR37 0 1
2 1 2 35 UG1 PC36 PQ22
3 H_PSI# PSI# UGATE1
0.22U NTMFS4846NT1G

2
PR32 4.99K/F 25
PWR_MON 2 1 3 34 PH1
PMON PHASE1 603 VSUM PR43 3.65K/F 603

+3.3V_SUS
PR25
1
499/F
2
PC43
2
0.1U
1
PR27 147K/F
2 1 4
RBIAS PGND1
33 PR44 10K 603
45
C +5V_SUS ISEN1 1 2 C
10
5 32 LG1 PR46 1 603
31 IMVP6_PROCHOT# VR_TT# LGATE1 ISL6266_VO
PC32
PR24 *4.02K/F_NC
PR22
*NTC_470K_NC
2 1 6
NTC
ISL6262A PVCC
31 1 2
ISEN2
PR45
1
10K
2
603 +PWR_SRC

PC30 0.015U
LG2 2.2U
MAT 2 1 2 1 7
SOFT LGATE2
30
10
PC35 *0.01U_NC
ERTJ0EV474J 16 16 805

1
Close to Phase 1 Inductor ISL6266_VO PR19 12.7K/F 8 29
OCSET PGND2

1
PQ1 PR13
PC28 1000P NTMFS4821NT1G *2.2_NC PC18 PC3 PC121 PC120 PC7 PC6 PC5 PC4

5
6
7
8
9
2 1 9 28 PH2 805 0.1U 2200P *10U_NC 10U 10U *10U_NC 0.1U 2200P

2
VW PHASE2
50 50 1206 1206 1206 1206 50 50

2
50 UG2 4
603 25 25 25 25 603

2
PR21 6.81K/F 10 27 UG2
COMP UGATE2 PC27 PC25
2 1
PR20 0.22U *1500P_NC

1
2
3
PC22 220P 1
11 26 25 50
FB BOOT2
2 1 603 603 P4 PL1 0.36uH_30A_ETQP4LR36WFC
50 12 25 PH2 2 1
FB2 NC +VCC_CORE
PC2 470P
PR1
DROOP

2 1 2 1

3
1

1
VSUM

ISEN2

ISEN1
VDIFF

VSEN

PQ20
GND

97.6K/F
VDD
RTN

DFB

50
VIN
VO

PR6 NTMFS4846NT1G PR120

5
6
7
8
9

5
6
7
8
9
1K 2.2
805
13

14

15

16

17

18

19

20

21

22

23

24

1
PR9 PC16 1000P LG2 4 4
2

2
2 1 2 1 PC68 + PC65 + PC46
PR5 0
ISEN2

ISEN1

0.1U 330U 330U

1
1

255 50 PC10 0.22U


2 1 50 2 2

1
2
3

1
2
3

2
PC19 PR116 1 2 ISL6266_VO PC125
PR14 603 7343 7343
2 1 1K 25 603 1500P
1K +PWR_SRC 50
10n PC17 0.22U
2

B B
50
VSUM

1 2
25 603
PR117
2
ISL6266_VO

2 1 PR114 PQ18
3.83K/F
603 10
45 NTMFS4846NT1G

PC14 180P 603 PR115 10 VSUM PR139 3.65K/F 603


1

2 1 1 2 +5V_SUS
603 PR140 10K
50 ISEN2 1 2 603
1

2
2

PC13 PC12 PC11 PR141 1


PC9 PC8 0.33U 0.1U 1U ISL6266_VO 603
2

10n 0.01U 16 50 10 PR42 0


1

50 16 PR142 10K
603 603 603 ISEN1
603 1 2 603

PR119
4 VCCSENSE 2 1
0
PR113
4 VSSSENSE 2 1 VSUM
0
2

PR131
Parallel PC123 PC122 PR127 2.61K/F
0.22U 0.068U 11K/F
1

10 16
1

603
PR128
10K_NTC
1

ISL6266_VO
A A

Close to Phase 1 Inductor QUANTA

https://Dr-Bios.com Title
COMPUTER
CPU_Core_2Phase (ISL6266)

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 51 of 58


5 4 3 2 1
5 4 3 2 1

PR150
1 2 ISL6237_ONLOD

1
PR170 0
PD13 390K PR148
1 2 150K/F
603

2
D *UDZSTE-175.6B_NC D

+PWR_SRC
+5V_ALW2

1
10

1
PC177 PC111 PC110 PC178 PR146 PR152 1 2

1
10U 10U 10U 10U PC176 PC109 0 0 PR149 PC181 PC112

2
1206 1206 1206 1206 0.1U 2200P 603 603 PC99 0.1U 2200P

2
25 25 25 25 50 50 4.7U PR91 50 50

2
10 PR153 0
603 603
1206 *0_NC

2
PC103
PC101 0.1U/10V

1
2

2
ISL6237_ONLOD
PR90
PC100 2 1 *0_NC PC102
0.1U 1U PR147

1
50 1U/10V/0603 603 *0_NC
10 +3.3V_ALW
603 PR151

5
6
7
8
+5V_SUS
PQ37
4 SI4800BDY-T1-E3
*0_NC

42
8
7
6
5
4
3
2
1

1
2
3
8
7
6
5
41 PL7

PAD
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
PAD 3.3UH +-30% 8A(SIL1045R-3R3)
PQ36 40 PAD
SI4800BDY-T1-E3 4 +5V_DH 39 +3.3V_LX 1 2
PAD
38 PAD
C +5V_SUS 9 32 PR93 249K/F C
PL8 BYP REFIN2
3 10 31 1 2
2
1
3.3UH +-30% 8A(SIL1045R-3R3) PR98 249K/F OUT1 PU5 ILIM2 PR95
11 FB1 OUT2 30

1
1 2 +5V_LX 1 2 12 29 PR99 0
ILIM1 SKIP#

5
6
7
8

2
POK1 13 MAX17020ETJ+ 28 POK2 0 + PC170
+5V_EN1 PGOOD1 PGOOD2 +3.3V_EN2 PC166
14 EN1 EN2 27 220U
PR97 15 26 +3.3V_DH 4 0.1U 6.3

2
DH1 DH2
1

*0_NC 16 25 603
LX1 LX2 7343
2

8
7
6
5

+ PC165 37 50
PAD

2
220U PC164 36 PR94

1
2
3
PAD

2
PGND
7343 0.1U +5V_DL PC106 PQ34

BST1

BST2
4 *0_NC

GND
VDD
2

PAD
PAD
PAD

DL1

DL2
6.3 603 PC107 NTMS4816NR2G

NC
0.1U

1
50 50 0.1U

1
PR96 50
3
2
1

35
34
33

17
18
19
20
21
22
23
24
0 603
PQ35 603
NTMS4816NR2G PR105
PR102 1 603 +3.3V_DL

SECFB
1 603

+5V_ALW2 PR104 0

2
+3.3V_ALW +3.3V_ALW
603
PC108
1U

1
603
10
PR100 PR101
100K 100K
+5V_ALW2

2
PC167 0.1U
B +5V_ALW2 +3.3V_RUN B
BAT54S-7-F POK2
52 2 1 1
3V_ALW_PWRGD
PC169
603 50 POK1
5V_ALW_PWRGD
1

PD11 32 1
PR159 PC168 0.1U
39K 2 1 2 0.1U

2
603 50
+15V_ALW 50 PC171
2

PQ40 603 0.1U

1
2N7002W-7-F PQ32
1 50
3 1 DDTA114YUA-7-F
MB_THERM# 21 603
PR171 0 PD12 3

SECFB
PR156 3 1+15V_ALWP 2
47K

0 +5V_ALW2
+3.3V_EN2 1 2
10K

PR157 0 H_THERMTRIP# 3,6 BAT54S-7-F


PR103
2

PR154 200K PD10 BAS316 PC172


2

31 5V_SUS_ON 1 2 +5V_EN1 2 1 0.1U


1

PR158 0 THERM_STP# 31,39 0


50
3

PR155 PQ33 603


2
*0_NC 2N7002W-7-F
1 2
1

48 52
A A

QUANTA
Title
COMPUTER

https://Dr-Bios.com
3VALW,5V,3V, Power On

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 52 of 58


5 4 3 2 1
1 2 3 4 5

+5V_RUN +3.3V_SUS
+5V_ALW2 +3.3V_ALW +15V_ALW +3.3V_ALW +3.3V_SUS
+5V_ALW2 +3.3V_ALW +15V_ALW +5V_SUS PQ11 +5V_RUN TDC : 2.78A PQ14 TDC : 0.44A
SI4800BDY-T1-E3 FDC655BN
6

1
8 3 5 4

1
7 2 PR88 PR89 PR87 2
PR86 PR85 PR84 6 1 100K *100K_NC 100K 1

2
100K *100K_NC 100K 5

2
PC98

3
PC96 SUS_3.3V_ENABLE 0.1U

1
RUN_ENABLE_5V 0.1U 603

3
A A
603 50

3
50 SUS_ON_3.3V# 5
RUN_ON# 5 PQ13A

6
2N7002DW-7-F

4
6

1
PC95 2 PC97
31,49 SUS_ON

4
2 PQ12A 4700P PQ13B 4700P
19,26,44,48,49 RUN_ON
2N7002DW-7-F 603 2N7002DW-7-F 603

2
1 50 50
PQ12B
2N7002DW-7-F

+15V_ALW +1.8V_SUS +1.8V_RUN +1.8V_RUN


PQ10
FDS6298 TDC : 3.87A
8 3
1

7 2
B PR70 6 1 B
100K 5

2
PC83
2

4
RUN_ENABLE_1.8V 0.1U

1
603
3

50
RUN_ON# 2
PQ9
1

2N7002W-7-F PC81
0.047U

25

+3.3V_RUN
+15V_ALW +3.3V_ALW PQ16 +3.3V_RUN
FDS8880_NL TDC : 5.23A
8 3
7 2
1

6 1
PR92 5

2
100K
PC105
4

C C
0.1U
2

1
RUN_ENABLE_3.3V 603
50
3

RUN_ON# 2
PC104
PQ15 4700P
1

2N7002W-7-F 25

+1.8V_SUS +5V_SUS +3.3V_SUS


Reserve discharge path

1
R146 R365 R273
*30/F_NC *1K_NC *1K_NC

Reserve discharge path

3 2

3 2

3 2
+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.9V_DDR_VTT SUS_ON_3.3V# 2 2 2

Q26 Q45 Q34

1
1

*2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC


R232 R370 R200 R372 R182
1K *10_NC *1K_NC *1K_NC *1K_NC
3 2

3 1

3 2

3 2

3 2

D D
RUN_ON# 2 2 2 2 2
Q32
Q44 Q30 Q46 Q28
QUANTA
1

2N7002W-7-F *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC

Title
COMPUTER

https://Dr-Bios.com
RUN POWER SW

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 53 of 58


1 2 3 4 5
A B C D E

+3.3V_ALW

2
PC119 1 2 2200P 50

PC124 1 2 1000P 50 +3.3V_ALW

PD7 PD6 PD8 PD5

3
1 1
PC127 *DA204U_NC *DA204U_NC *DA204U_NC *DA204U_NC
1 2 0.1U 50
+VCHGR 46

2
603
PR124
JBAT1 10K
BATT1+ 1 SMBUS Address 16
2 PR112 100
Adress : 16H

1
BATT2+
SMB_CLK 3 1 2 SMBCLK0 31,46
SMB_DAT 4 1 2 SMBDAT0 31,46
5 PR110 100 PR123 100
BATT_PRES#
SYSPRES# 6 1 2 PBAT_PRES# 31
BATT_VOLT 7 1 2 PBAT_ALARM#
8 PR111 100
BATT1-
BATT2- 9
1113.28
200045MR009H579ZL

+5V_ALW2

+3.3V_ALW

1
PD2
DA204U PR35
2.2K

3
2 2
PQ3

2
2N7002W-7-F
PR29 100
DB_PSID PR7 0 DOCK_PSID 3 1 1 2 PS_ID 31
603

2
J8 PR4 +5V_ALW2 +5V_ALW2

1
100K/F
8 PC23
BAT2_LED RBAT2_LED 38

2
7 RBAT1_LED 38 100P

2
BAT1_LED

2
6 -DCIN_JACK 50
LED_DET DB_PSID PD1 PR30
PSID 5

3
4 -DCIN_JACK *BAS316_NC 10K PD3
GND *DA204U_NC
GND 3 2
2

3
DC +DCIN_JACK
1 1 2 PS_ID_DISABLE#

1
DC

1
PQ2
+DCIN_JACK PR18 MMST3904-7-F PR28 *100_NC
87438-0843 15K/F
2

PC115

2
PC117 PC116 PC114 100P
1

2200P 1000P 0.1U 50


50 50 50
603
Change Value per GG updated

3 3

EMI requirement on 0812


PQ21
+DC_IN SI4835DDY-T1-E3 +DC_IN_SS
+DCIN_JACK FL1
-DCIN_JACK BLM41PG600SN1L 1 8
+DCIN_JACK 2 7
-DCIN_JACK 3 6

1
5
1

1
PC129 PC130 PR136
0.1U 0.47U 240K PC143 PR138 PC141 PC140 PC138

4
603 805 0.01U 10K/F 0.1U 0.1U 10U
2

2
50 25 603 603 603 1206

2
25 50 50 25

2
PRV2
*VZ0603M260APT_NC
PRV1
2

*VZ0603M260APT_NC PR135
47K
1

4 4

QUANTA
Title
COMPUTER

https://Dr-Bios.com
DCIN,BATT CONNECTOR

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 54 of 58


A B C D E
1 2 3 4 5 6 7 8

FOR CPU use


TH2 TH1 TH3
H4 H12 H11 H5 H-TC118BC197D63P2 H-TC118BC197D63P2 H-TC118BC197D63P2
*H-C276D177P2_NC *H-C276D177P2_NC *H-C276D177P2_NC *H-C276D177P2_NC
H-C276D157P2 H-C276D157P2 H-C276D157P2 H-C276D177P2

1
A A
1

1
For MiniCard nut use.
on 31' header

H3 H1 H20 H15 H14 H10


*H-TC315BC394D79P2_NC *H-TC315BC394D126P2_NC *H-TC315BC394D126P2_NC *H-TC315BC335D126P2_NC *H-C256D154P2_NC *H-C256D154P2_NC
H-TC315BC394D79P2 H-TC315BC394D126P2 H-TC315BC394D126P2 H-TC315BC335D126P2 H-C256D154P2 H-C256D154P2
1

1
For GPU nut use.

B B
PV1 PV2
H2 H23 H22 H18
*o-o177x472d177x472n_NC *H-TC315BC394D126P2_NC *H-TC315BC394D126P2_NC *h-fm8b-1_NC *PAD138X98XH_NC *PAD138X98XH_NC
o-o177x472d177x472n H-TC315BC394D126P2 H-TC315BC394D126P2 h-fm8b-1

GND

GND
1

1
H19 H16 H9 H24
*H-TC315BC394D126P2_NC *H-TC315BC394D126P2_NC *H-TC315BC394D126P2_NC *h-TC256BC315D110P2_NC
H-TC315BC394D126P2 H-TC315BC394D126P2 H-TC315BC394D126P2 h-TC256BC315D110P2
1

C C

H7
*h-tc256bc315d126p2_NC
h-tc256bc315d126p2
1

H8 H6 H13 H21 H17


D *H-C228D228N_NC *H-C228D228N_NC *H-C197D197N_NC *H-C394D394N_NC *H-TC256BC315D126P2_NC D
H-C228D228N H-C228D228N H-C197D197N H-C394D394N H-TC256BC315D126P2

QUANTA
1

Title
COMPUTER

https://Dr-Bios.com
SCREW PAD

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 55 of 58


1 2 3 4 5 6 7 8
5 4 3 2 1

Reserved for EMI.

D D

C C

B B

A A

QUANTA
Title
COMPUTER

https://Dr-Bios.com
EMI CAP

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 56 of 58


5 4 3 2 1
1 2 3 4 5 6 7 8

30
+3.3V_SUS 32 MINI CARDS

WLAN_SMBCLK 30
WLAN_SMBDAT 32 MINICARD-WLAN
A 2.2K 2.2K A

AJ26 ICH_SMBCLK 30
ICH9-M
AD19 ICH_SMBDATA 8 EXPRESS CARD

+3.3V_ALW +3.3V_RUN MEM_SCLK


197
100 7002 195 DIMM0
3

2.2K 2.2K 4 BATTERY +3.3V_RUN 197


7002 195 DIMM1
100
110 SMBCLK0 10
MEM_SDATA
111 SMBDAT0 9 CHARGER

B B

+3.3V_RUN
+3.3V_ALW

2.2K 2.2K
10K 10K

+3.3V_RUN
115 SMBCLK1 7002 7
116 6 CLOCK
SMBDAT1
7002 (SLG8SP513VTR)

+3.3V_RUN +3.3V_RUN
SIO
ITE8512 10K 10K
C C

+3.3V_RUN
10
7002
THERMAL
9 (EMC1423)
7002

+3.3V_ALW +3.3V_RUN +3.3V_ADM1032A

2.2K 2.2K 4.7K 4.7K

+3.3V_ADM1032A
117 SMBCLK2 7002 8
D
118 SMBDAT2 7 M92 S2 XT/THERMAL D

7002 (ADM1032ARMZ)
QUANTA
+3.3V_ADM1032A
Title
COMPUTER

https://Dr-Bios.com
SMBUS BLOCK

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 57 of 59


1 2 3 4 5 6 7 8
5 4 3 2 1

VER : 1A

Adapter
D D

PWR_SRC
Charger
MAX8731AETI+

Battery
MAXIM TI TI MAXIM Intersil
MAX17020ETJ+ TPS51116PWPRG4 LDO TPS51117RGYR MAX8632ETI+ LDO ISL6262A

IMVP_VR_ON
+5V_ALW2 5V_ALW_ON SUS_ON RUN_ON +1.8V_SUS
+1.8V_SUS
+15V_ALW +3.3V_ALW +5V_SUS +1.8V_SUS +0.9V_DDR_VTT +VCC_CORE

C C

RT9018B

RUN_ON

+1.5V_RUN
RUN_ON RUN_ON

+VCC_GFX_CORE +1.1V_GFX_PCIE
Fairchild Fairchild Fairchild Fairchild
FDS8880 FDC655BN SI4800BDY FDS6298
RUN_ON SUS_ON RUN_ON RUN_ON RUN_ON

+3.3V_RUN +3.3V_SUS +5V_RUN +1.8V_RUN +1.05V_VCCP

B B

A A

QUANTA
Title
COMPUTER

https://Dr-Bios.com
Schematic Block Diagram1

Size Document Number Rev


FM8 2A

Date: Tuesday, November 25, 2008 Sheet 58 of 58


5 4 3 2 1

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