Um8 - Uma 1125 - R1a - New Cardreader

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UM8 UMA SYSTEM DIAGRAM

14.318MHz
+3V/+5V PG.34
CLOCK GEN
PG.2
A
+1.05V/+1.8V A
PG.36
SODIMM1 DDR3 INTEL
CPU Core PG.39 Max. 4GB
VGA Core/+1.1V PG.12
Channel A Arrandale PI3VDP411LSZDE HDMI HDMI PG.24
PG.27
PG.38 37.5mm X 37.5mm
SODIMM2 DDR3 989pin PGA CRT
DB1
+1.5V/+0.75V Max. 4GB CRT
PG.35 Channel B TDP 35W
PG.13
+1.05VTT PG.37 PG.3~6 LVDS LVDS PG.22

FDI DMI
B UMA VGACORE B
4M ROM
PG.26
Charger PG.33
FAN & THERMAL
DB2 GMT G990/
EMC1422-1-AIZL-TR PG.30
LANEO SATA0
HDD
USB 2.0 INTEL PCH PG.28
WWAN PORT5
Ibex Peak-m SATA1 ODD PG.28
PCI-E x 1
27mm X 25mm
LANE6 LANE1
1071pin FCBGA USB2.0 USB2.0 Webcam
C
LAN WLAN USB 2.0 TDP 5W X1 X1
C
Atheros/AR8152 PORT4 PG.22

10/100 USB 2.0 PORT0,1,7 PORT0,1,7 PORT11
PCI-E x 1
PORT12 PORT9
LANE5 Card Reader BT Stackup

PG.7~11 RTS5138 BT365
eSATA USB 2.0 PG.23 PG.32
TOP
SN75LVCP412 PORT8 VCC
Combo port Azalia IN1
PG.27
LPC Speaker IN2
PG.31
D
KBC AUDIO GND D
ITE 8502 PG.25 CODEC BOT
HP/MIC
ALC269-GR Quanta Computer Inc.
KB TP 1M ROM Analog MIC PROJECT : UM8 UMA
PG.28 PG.28 PG.26 Size Document Number Rev
1A
BLOCK DIAGRAM
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Date: Wednesday, November 25, 2009
7
Sheet 1
8
of 46
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+1.05V_PCH
L14
1 2
25mA
+VDDIO_CLK
HCB1608KF-181T15_6
C113
C109
0.1U/ 10V/X7R
0.1U/ 10V/X7R
+3.3V_RUN
1
L13
2
HCB1608KF-181T15_6
300mA
+VDDSE_CLK
C106
C101
10U/6.3V_8/X5R
0.1U/ 10VX7R
PDC (Power Cap quantities follow UM3)
02
A C112 10U/6.3V_8/X5R C110 0.1U/ 10V/X7R A
C108 0.1U/ 10V/X7R
C107 0.1U/ 10V/X7R
C111 0.1U/ 10V/X7R
Place each 0.1uF cap close to pin
Place each 0.1uF cap close to pin

8/20 Wait Victor check
Check CLK P/N and footprint Place within 0.5"

45 U6 CLK_BUF_BCLKP_R
of C/G
RP4
+VDDSE_CLK 5 VDD_LCD CPU-0 23 4 3 0X2 CLK_BUF_BCLKP 8
29 22 CLK_BUF_BCLKN_R 2 1
VDD_REF CPU-0# CLK_BUF_BCLKN 8
1 VDD_USB CPU-1 20
B B
17 VDD_SRC CPU-1# 19
24
+VDDIO_CLK 18
VDD_CPU
9LRS3197 3 CLK_BUF_DREFCLKP_R RP5 2 1 0X2 CLK_BUF_DREFCLKP 8
VDD_CPU_IO DOT96T_LPR CLK_BUF_DREFCLKN_R
15 VDD_SRC_IO DOT96C_LPR 4 4 3 CLK_BUF_DREFCLKN 8
31 13 CLK_BUF_PCIE_3GPLLP_R RP6 2 1 0X2
25,30 SMBDAT2 SDATA SRC-1 CLK_BUF_PCIE_3GPLLP 8
32 14 CLK_BUF_PCIE_3GPLLN_R 4 3
25,30 SMBCLK2 SCLK SRC-1# CLK_BUF_PCIE_3GPLLN 8
+3.3V_RUN R113 10K 16 10 CLK_BUF_DREFSSCLKP_R RP7 2 1 0X2

CPU_STOP# SATA CLK_BUF_DREFSSCLKP 8
CLK_PCH_14M R99 33/J_4 CPU_SEL 30 11 CLK_BUF_DREFSSCLKN_R 4 3
8 CLK_PCH_14M REF_0/CPU_SEL SATA# CLK_BUF_DREFSSCLKN 8
C96 *10P/50V_4_NC/COG
CK_PWRGD_R 25 6
CK_PWRGD/PD#_3.3 27MHz_nonSS
Place R8044 within 0.5" of C/G 27MHz_SS 7 Discrete only
XTAL_OUT 27
XTAL_IN XOUT
28 33
9
XIN
VSS_SATA
QFN32 GND
VSS_REF 26 SLG: SLG8SP590VTR Seligo QPN: AL8SP590000
2 21
8
VSS_USB
VSS_LCD
VSS_CPU
VSS_SRC 12 SLG: SLG8SP585VTR Seligo QPN: AL8SP585000
RSC: RTM875N-632-VB-GRT Realtek QPN: AL000875002
9LRS3197
C C
+3.3V_RUN +3.3V_RUN
BOM check
Y4
R107 R106
*10K_NC 1K/J_4 XTAL_IN 1 2XTAL_OUT
14.318MHZ
1
CPU_SEL CK_PWRGD_R
C99 C100
33P/50V_4/NPO 33P/50V_4/NPO
2
3
R101 Q14
10K FDN357N R105
*100K/F_4_NC
39 VR_PWRGD_CLKEN# 2
0 1 R8253 => UM7 POP

1
D UM9 DE-POP D
CPU_SEL CPU0/1=133MHz CPU0/1=100MHz 0918 check
(default)
Quanta Computer Inc.
PROJECT : UM8 UMA
Size Document Number Rev
1A
Clock Gen(9LRS3197)/HOLES
Date: Wednesday, November 25, 2009 Sheet 2 of 46
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03
DPLL_REF_SSCLK/DPLL_REF_SSCLK#: DIS UMA
U15A Embedded Display Port PLL Differential Clock in. DPLL_REF_SSCLK GND PCH
PEG_COMP R316 49.9/F_4
PEG_ICOMPI B26
A26
DPLL_REF_SSCLK# GND PCH
PEG_ICOMPO
9 DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27
C23 A25 PEG_RBIAS R315 750/F_4
9 DMI_TXN1 DMI_RX#[1] PEG_RBIAS
9 DMI_TXN2 B22 DMI_RX#[2]
A21 K35 U15B TP48
9 DMI_TXN3 DMI_RX#[3] PEG_RX#[0]
J34 R117 20/F_4 H_COMP3 AT23 A16
PEG_RX#[1] COMP3 BCLK CLK_CPU_BCLKP 10
B24 J33 R115 20/F_4 H_COMP2 AT24 B16
9 DMI_TXP0 DMI_RX[0] PEG_RX#[2] COMP2 BCLK# CLK_CPU_BCLKN 10
R118 49.9/F_4 H_COMP1 G16 TP49
A 9 DMI_TXP1 D23
B23
DMI_RX[1] PEG_RX#[3] G35
G32 R116 49.9/F_4 H_COMP0 AT26 COMP1 MISC AR30 For ITP CLk
A
9 DMI_TXP2 DMI_RX[2] PEG_RX#[4] COMP0 BCLK_ITP
9 DMI_TXP3 A22 DMI_RX[3] PEG_RX#[5] F34 25 H_CPUDET# AH24 SKTOCC# BCLK_ITP# AT30
PEG_RX#[6] F31
D24 D35 E16
9
9
DMI_RXN0
DMI_RXN1 G24
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8] E33 H_CATERR# AK14 CATERR#
CLOCKS PEG_CLK#
PEG_CLK
D16
CLK_PCIE_3GPLLP 8
CLK_PCIE_3GPLLN 8
9 DMI_RXN2 F23 DMI_TX#[2] PEG_RX#[9] C33 10 H_PECI AT15 PECI
H23 D32 H_PROCHOT# AN26 THERMAL A18 CLK_DREFSSCLKP_R R317 0
9 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] PROCHOT# DPLL_REF_SSCLK CLK_DREFSSCLKP 8
B32 AK15 A17 CLK_DREFSSCLKN_R R318 0
PEG_RX#[11] 10 H_THERM THERMTRIP# DPLL_REF_SSCLK# CLK_DREFSSCLKN 8
9 DMI_RXP0 D25 DMI_TX[0] PEG_RX#[12] C31
9 DMI_RXP1 F24 DMI_TX[1] PEG_RX#[13] B28
E23 B30 H_CPURST# AP26 F6 DDR3_DRAMRST#
9 DMI_RXP2 DMI_TX[2] PEG_RX#[14] RESET_OBS# SM_DRAMRST# DDR3_DRAMRST# 12,13
9 DMI_RXP3 G23 DMI_TX[3] PEG_RX#[15] A31 9 PM_SYNC AL15 PM_SYNC
J35
TP30 AN14
AN27
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R319
AM1 SM_RCOMP_1 R320
100/F_4
24.9/F_4
PEG_RX[0] 10 H_PWRGOOD VCCPWRGOOD_0 SM_RCOMP[1]
PEG_RX[1] H34
H33
9 PM_DRAM_PWRGD AK13 SM_DRAMPWROK MISC SM_RCOMP[2] AN1 SM_RCOMP_2 R321
R127
130/F_4
10K/J_4
PEG_RX[2] +1.05V_VTT
FDI_TXN0 E22 F35 AM26 AN15
9 FDI_TXN0 FDI_TX#[0] PEG_RX[3] TAPPWRGOOD PM_EXT_TS#[0] PM_EXTTS#0 12
FDI_TXN1 D21 G33 AP15
9 FDI_TXN1 FDI_TX#[1] PEG_RX[4] PM_EXT_TS#[1] PM_EXTTS#1 13
FDI_TXN2 D19 E34 H_VTTPWRGD AM15 R123 10K/J_4 +1.05V_VTT
9 FDI_TXN2 FDI_TX#[2] PEG_RX[5] 32 H_VTTPWRGD VTTPWRGOOD
FDI_TXN3 D18 F32 CPU_PLTRST# AL14 R122 *12.4K/F_NC
9 FDI_TXN3 FDI_TX#[3] PEG_RX[6] 9,25,31 PLTRST# RSTIN#
FDI_TXN4 G21 D34 R139 1.5K/F_4 AT28 TP47
9 FDI_TXN4 FDI_TX#[4] PEG_RX[7] PRDY#
FDI_TXN5 TP16
9 FDI_TXN5
FDI_TXN6
E19
F21
FDI_TX#[5]
Intel(R) FDI PEG_RX[8] F33
B33 R137 750/F_4
PWR MANAGEMENT
PREQ# AP27
AN28 XDP_TCLK TP14
PCI EXPRESS -- GRAPHICS

9 FDI_TXN6 FDI_TX#[6] PEG_RX[9] TCK
FDI_TXN7 G18 D31 TP35
9 FDI_TXN7 FDI_TX#[7] PEG_RX[10]
A32 AP28 XDP_TMS TP15
PEG_RX[11] TMS
PEG_RX[12] C30
FDI_TXP0 D22 A28 AT27 XDP_TRST# TP12
B
9
9
9
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP1
FDI_TXP2
C21
D20
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
B29
A30
TP24
TP25
AJ22
AK22
BPM#[0]
BPM#[1]
JTAG & BPM TRST#
TDI AT29 XDP_TDI TP13 B

FDI_TXP3 C18 TP19 AK24 AR27 XDP_TDO TP28
9 FDI_TXP3 FDI_TX[3] BPM#[2] TDO
FDI_TXP4 G22 L33 TP23 AJ24 AR29 XDP_TDI_M TP21
9 FDI_TXP4 FDI_TX[4] PEG_TX#[0] BPM#[3] TDI_M
FDI_TXP5 E20 M35 TP26 AJ25 AP29 XDP_TDO_M TP20
9 FDI_TXP5 FDI_TX[5] PEG_TX#[1] BPM#[4] TDO_M
FDI_TXP6 F20 M33 TP29 AH22
9 FDI_TXP6 FDI_TX[6] PEG_TX#[2] BPM#[5]
FDI_TXP7 G19 M30 TP18 AK23
9 FDI_TXP7 FDI_TX[7] PEG_TX#[3] BPM#[6]
L31 TP27 AH23 AN25 R103 0
PEG_TX#[4] BPM#[7] DBR# XDP_DBRESET# 9
9 FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32
E17 M29 IC,AUB_CFD_rPGA,R1P0
9 FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
PEG_TX#[7] J31
9 FDI_INT C17 FDI_INT PEG_TX#[8] K29
PEG_TX#[9] H30
9 FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
9 FDI_LSYNC1 D17 FDI_LSYNC[1] PEG_TX#[11] F29
PEG_TX#[12] E28
PEG_TX#[13] D29
PEG_TX#[14] D27
PEG_TX#[15] C26
PEG_TX[0] L34
PEG_TX[1] M34
PEG_TX[2] M32
PEG_TX[3] L30
M31 +1.05V_VTT
PEG_TX[4]
PEG_TX[5] K31
PEG_TX[6] M28
H31 H_CATERR# R119 49.9/F_4
PEG_TX[7] H_PROCHOT# R102 49.9/F_4
PEG_TX[8] K28
G30 CPU_PLTRST# R138 *68/J_4_NC
PEG_TX[9] H_CPURST# R304 *68/J_4_NC
C PEG_TX[10] G29 C
PEG_TX[11] F28
PEG_TX[12] E27
PEG_TX[13] D28
PEG_TX[14] C27
PEG_TX[15] C25
IC,AUB_CFD_rPGA,R1P0
JTAG MAPPING
+1.5V_SUS XDP_TDO_M
CPU THERMTRIP Intel Suggest to reserve
R100
0 ohm below for CPU AP29
0 and AR29 pins.
PM_THRMTRIP# 34
25,39 IMVP_PWRGD
(DS 403777 Page 81)
R136
1.1K/F XDP_TDI_M
PM_DRAM_PWRGD XDP_TRST#
3
Q12
2 *2N7002W-7-F_NC
Use a voltage divider with VDDQ (1.5 V) R301
R135 rail (ON in S3) and resistor combination 51/J_4
1
3
*2.2K/J_4_NC
R104
R 104 3K/F of 1.1K ± (to VDDQ)/3K ± (to GND)
H_THERM 2 to convert to processor VTT level.
D D
Q13
1
*MMST3904-7-F_NC

PROJECT : UM8 UMA
1A
PROCESSER 1/4(HOST&PEX)
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AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

04
A A
U15C 13 M_B_DQ[0..63] U15D
12 M_A_DQ[0..63] M_A_DQ0 A10 M_B_DQ0
SA_DQ[0] SA_CK[0] AA6 M_A_CLKP0 12 B5 SB_DQ[0] SB_CK[0] W8 M_B_CLKP0 13
M_A_DQ1 C10 AA7 M_B_DQ1 A5 W9
SA_DQ[1] SA_CK#[0] M_A_CLKN0 12 SB_DQ[1] SB_CK#[0] M_B_CLKN0 13
M_A_DQ2 C7 P7 M_B_DQ2 C3 M3
SA_DQ[2] SA_CKE[0] M_A_CKE0 12 SB_DQ[2] SB_CKE[0] M_B_CKE0 13
M_A_DQ3 A7 M_B_DQ3 B3
M_A_DQ4 B10 SA_DQ[3] M_B_DQ4 SB_DQ[3]
SA_DQ[4] SA_CK[1] Y6 M_A_CLKP1 12 E4 SB_DQ[4] SB_CK[1] V7 M_B_CLKP1 13
M_A_DQ5 D10 Y5 M_B_DQ5 A6 V6
SA_DQ[5] SA_CK#[1] M_A_CLKN1 12 SB_DQ[5] SB_CK#[1] M_B_CLKN1 13
M_A_DQ6 E10 P6 M_B_DQ6 A4 M2
SA_DQ[6] SA_CKE[1] M_A_CKE1 12 SB_DQ[6] SB_CKE[1] M_B_CKE1 13
M_A_DQ7 A8 M_B_DQ7 C4
M_A_DQ8 SA_DQ[7] M_B_DQ8 SB_DQ[7]
D8 SA_DQ[8] SA_CS#[0] AE2 M_A_CS#0 12 D1 SB_DQ[8] SB_CS#[0] AB8 M_B_CS#0 13
M_A_DQ9 F10 AE8 M_B_DQ9 D2 AD6
SA_DQ[9] SA_CS#[1] M_A_CS#1 12 SB_DQ[9] SB_CS#[1] M_B_CS#1 13
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 SA_DQ[10] M_B_DQ11 SB_DQ[10]
F7 SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 12 F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 13
M_A_DQ12 E9 AF9 M_B_DQ12 C2 AD1
SA_DQ[12] SA_ODT[1] M_A_ODT1 12 SB_DQ[12] SB_ODT[1] M_B_ODT1 13
M_A_DQ13 B7 M_B_DQ13 F5
SA_DQ[13] M_A_DM[0..7] 12 SB_DQ[13] M_B_DM[0..7] 13
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
M_A_DQ15 C6
SA_DQ[15] SA_DM[1] D7 M_A_DM1 M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ16 H10
SA_DQ[16] SA_DM[2] H7 M_A_DM2 M_B_DQ16 H6 SB_DQ[16] SB_DM[2] H3 M_B_DM2 processor. All DM signal can be left as
M_A_DQ17 G8 M7 M_A_DM3 M_B_DQ17 G2 K1 M_B_DM3 NC on Clarkfield and connect directly to
M_A_DQ18 K7 SA_DQ[17] SA_DM[3] SB_DQ[17] SB_DM[3]
SA_DQ[18] SA_DM[4] AG6 M_A_DM4 M_B_DQ18 J6 SB_DQ[18] SB_DM[4] AH1 M_B_DM4
GND on So-DIMM side for Clarkfield
M_A_DQ19 J8 AM7 M_A_DM5 M_B_DQ19 J3 AL2 M_B_DM5
M_A_DQ20 G7 SA_DQ[19] SA_DM[5]
AN10 M_A_DM6 M_B_DQ20 G1
SB_DQ[19] SB_DM[5]
AR4 M_B_DM6 design only
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]
DDR SYSTEM MEMORY A

M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7
DDR SYSTEM MEMORY B

M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 SA_DQ[22] M_A_DQSN[0..7] 12 J2 SB_DQ[22] M_B_DQSN[0..7] 13
M_A_DQ23 J10 C9 M_A_DQSN0 M_B_DQ23 J1 D5 M_B_DQSN0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQSN1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQSN1
L7 SA_DQ[24] SA_DQS#[1] F8 J5 SB_DQ[24] SB_DQS#[1] F4
M_A_DQ25 M6 J9 M_A_DQSN2 M_B_DQ25 K2 J4 M_B_DQSN2
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] SB_DQ[25] SB_DQS#[2]
SA_DQ[26] SA_DQS#[3] N9 M_A_DQSN3 M_B_DQ26 L3 SB_DQ[26] SB_DQS#[3] L4 M_B_DQSN3
B M_A_DQ27 L9 AH7 M_A_DQSN4 M_B_DQ27 M1 AH2 M_B_DQSN4 B
M_A_DQ28 SA_DQ[27] SA_DQS#[4] SB_DQ[27] SB_DQS#[4]
L6 SA_DQ[28] SA_DQS#[5] AK9 M_A_DQSN5 M_B_DQ28 K5 SB_DQ[28] SB_DQS#[5] AL4 M_B_DQSN5
M_A_DQ29 K8 AP11 M_A_DQSN6 M_B_DQ29 K4 AR5 M_B_DQSN6
M_A_DQ30 N8 SA_DQ[29] SA_DQS#[6] SB_DQ[29] SB_DQS#[6]
SA_DQ[30] SA_DQS#[7] AT13 M_A_DQSN7 M_B_DQ30 M4 SB_DQ[30] SB_DQS#[7] AR8 M_B_DQSN7
M_A_DQ31 P9 M_B_DQ31 N5
M_A_DQ32 AH5 SA_DQ[31] M_A_DQSP[0..7] 12 SB_DQ[31] M_B_DQSP[0..7] 13
SA_DQ[32] SA_DQS[0] C8 M_A_DQSP0 M_B_DQ32 AF3 SB_DQ[32] SB_DQS[0] C5 M_B_DQSP0
M_A_DQ33 AF5 F9 M_A_DQSP1 M_B_DQ33 AG1 E3 M_B_DQSP1
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
SA_DQ[34] SA_DQS[2] H9 M_A_DQSP2 M_B_DQ34 AJ3 SB_DQ[34] SB_DQS[2] H4 M_B_DQSP2
M_A_DQ35 AK7 M9 M_A_DQSP3 M_B_DQ35 AK1 M5 M_B_DQSP3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
SA_DQ[36] SA_DQS[4] AH8 M_A_DQSP4 M_B_DQ36 AG4 SB_DQ[36] SB_DQS[4] AG2 M_B_DQSP4
M_A_DQ37 AG5 AK10 M_A_DQSP5 M_B_DQ37 AG3 AL5 M_B_DQSP5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
SA_DQ[38] SA_DQS[6] AN11 M_A_DQSP6 M_B_DQ38 AJ4 SB_DQ[38] SB_DQS[6] AP5 M_B_DQSP6
M_A_DQ39 AJ6 AR13 M_A_DQSP7 M_B_DQ39 AH4 AR7 M_B_DQSP7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
SA_DQ[40] M_A_A[0..15] 12 AK3 SB_DQ[40] M_B_A[0..15] 13
M_A_DQ41 AJ9 Y3 M_A_A0 M_B_DQ41 AK4 U5 M_B_A0
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
SA_DQ[42] SA_MA[1] W1 AM6 SB_DQ[42] SB_MA[1] V2
M_A_DQ43 AK12 AA8 M_A_A2 M_B_DQ43 AN2 T5 M_B_A2
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
SA_DQ[44] SA_MA[3] AA3 AK5 SB_DQ[44] SB_MA[3] V3
M_A_DQ45 AL7 V1 M_A_A4 M_B_DQ45 AK2 R1 M_B_A4
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
SA_DQ[46] SA_MA[5] AA9 AM4 SB_DQ[46] SB_MA[5] T8
M_A_DQ47 AL8 V8 M_A_A6 M_B_DQ47 AM3 R2 M_B_A6
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
SA_DQ[48] SA_MA[7] T1 AP3 SB_DQ[48] SB_MA[7] R6
M_A_DQ49 AM10 Y9 M_A_A8 M_B_DQ49 AN5 R4 M_B_A8
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
SA_DQ[50] SA_MA[9] U6 AT4 SB_DQ[50] SB_MA[9] R5
M_A_DQ51 AL11 AD4 M_A_A10 M_B_DQ51 AN6 AB5 M_B_A10
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
SA_DQ[52] SA_MA[11] T2 AN4 SB_DQ[52] SB_MA[11] P3
M_A_DQ53 AN9 U3 M_A_A12 M_B_DQ53 AN3 R3 M_B_A12
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
SA_DQ[54] SA_MA[13] AG8 AT5 SB_DQ[54] SB_MA[13] AF7
M_A_DQ55 AP12 T3 M_A_A14 M_B_DQ55 AT6 P5 M_B_A14
C M_A_DQ56 AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15 C
SA_DQ[56] SA_MA[15] V9 AN7 SB_DQ[56] SB_MA[15] N1
M_A_DQ57 AN12 M_B_DQ57 AP6
M_A_DQ58 AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
SA_DQ[58] AP8 SB_DQ[58]
M_A_DQ59 AT14 M_B_DQ59 AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
SA_DQ[60] AT7 SB_DQ[60]
M_A_DQ61 AL13 M_B_DQ61 AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
SA_DQ[62] AR10 SB_DQ[62]
M_A_DQ63 AP14 M_B_DQ63 AT10
SA_DQ[63] SB_DQ[63]
12 M_A_BS#0 AC3 SA_BS[0] 13 M_B_BS#0 AB1 SB_BS[0]

12 M_A_BS#1 AB2 SA_BS[1] 13 M_B_BS#1 W5 SB_BS[1]
12 M_A_BS#2 U7 SA_BS[2] 13 M_B_BS#2 R7 SB_BS[2]
12 M_A_CAS# AE1 SA_CAS# 13 M_B_CAS# AC5 SB_CAS#

12 M_A_RAS# AB3 SA_RAS# 13 M_B_RAS# Y7 SB_RAS#
12 M_A_WE# AE9 SA_WE# 13 M_B_WE# AC6 SB_WE#
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0
D D
Channel A DQ[15,32,48,54], DM[5]

Requires minimum 12mils spacing
with all other signals, including data signals.
Channel B DQ[16,18,36,42,56,57,60,61,62] Quanta Computer Inc.
Requires minimum 12mils spacing
with all other signals, including data signals. PROJECT : UM8 UMA
www.vinafix.vn
1A
PROCESSER 2/4(DDR)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Name different with power

+VCC_CORE
C308
C329
AG35
*22U/6.3V_8/X5R_NC
AG34
22U/6.3V_8/X5R AG33
U15F
VCC1
VCC2
VTT0_1
VTT0_2
AH14
AH12
C341
18A
+1.05V_VTT
10U/6.3V_8/X5R
AT21
U15G
VAXG1
05
SENSE
LINES
VCC3 VTT0_3 AH11 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 38
C104 *22U/6.3V_8/X5R_NC
AG32 AH10 C339 10U/6.3V_8/X5R AT18 AT22
VCC4 VTT0_4 VAXG3 VSSAXG_SENSE VSS_AXG_SENSE 38
C102 22U/6.3V_8/X5R AG31 J14 C121 10U/6.3V_8/X5R AT16
C116 22U/6.3V_8/X5R AG30 VCC5 VTT0_5 C133 10U/6.3V_8/X5R +VCC_GFX_CORE VAXG4
VCC6 VTT0_6 J13 AR21 VAXG5
C128 22U/6.3V_8/X5R AG29 H14 C124 *10U/6.3V_8/X5R_NC AR19
C328 22U/6.3V_8/X5R AG28 VCC7 VTT0_7 C336 *10U/6.3V_8/X5R_NC VAXG6
H12 AR18
GRAPHICS VIDs
C117 22U/6.3V_8/X5R AG27 VCC8 VTT0_8 C127 *10U/6.3V_8/X5R_NC VAXG7
A VCC9 VTT0_9 G14 AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 38 A
C306 *22U/6.3V_8/X5R_NC
AG26 G13 C137 *10U/6.3V_8/X5R_NC AP21 AP22
VCC10 VTT0_10 VAXG9 GFX_VID[1] GFXVR_VID_1 38
C319 *22U/6.3V_8/X5R_NC
AF35 G12 C136 *10U/6.3V_8/X5R_NC C120 C126 AP19 AN22
C125 22U/6.3V_8/X5R AF34 G11 C342 22U/6.3V_8/X5R 10U/6.3V_8/X5R
10U/6.3V_8/X5R AP18 AP23
C97 22U/6.3V_8/X5R AF33 F14 C130 22U/6.3V_8/X5R AP16 AM23
C103 *10U/6.3V_8/X5R_NC
AF32 F13 C340 *22U/6.3V_8/X5R_NC AN21 AP24
C330 10U/6.3V_8/X5R AF31 F12 AN19 AN24
GRAPHICS
C325 *10U/6.3V_8/X5R_NC
AF30 F11 AN18
C305 10U/6.3V_8/X5R VCC16 VTT0_16 VAXG15 R306 4.7K/F_4
AF29 VCC17 VTT0_17 E14 AN16 VAXG16
C118 *10U/6.3V_8/X5R_NC
AF28 VCC18 VTT0_18 E12 AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN GFXVR_EN 38
C307 10U/6.3V_8/X5R AF27 D14 AM19 AT25
C326 10U/6.3V_8/X5R VCC19 VTT0_19 VAXG18 GFX_DPRSLPVR
AF26 VCC20 VTT0_20 D13 AM18 VAXG19 GFX_IMON AM24 GFXVR_IMON 38
C119 10U/6.3V_8/X5R AD35 D12 AM16
C333 10U/6.3V_8/X5R AD34 VCC21 VTT0_21 VAXG20 R114 *1K/F_4_NC
D11 AL21
1.1V RAIL POWER

VCC22 VTT0_22 + C140 VAXG21
C320 10U/6.3V_8/X5R AD33
VCC23 VTT0_23 C14 Please note that +VCC_GFX_CORE C129 C123 AL19 VAXG22
C115
C98
*10U/6.3V_8/X5R_NC
AD32
10U/6.3V_8/X5R AD31 VCC24
VCC25
VTT0_24
VTT0_25
C13
C12
should be 1.05V in Auburndale 330U/2.5V_7343 22U/6.3V_8/X5R
22U/6.3V_8/X5R AL18
AL16
VAXG23
VAXG24
2A
C318 *10U/6.3V_8/X5R_NC
AD30 C11 AK21 AJ1 +1.5V_SUS
C332 10U/6.3V_8/X5R AD29 VCC26 VTT0_26 VAXG25 VDDQ1 C147 1U/6.3V/X5R
- 1.5V RAILS
VCC27 VTT0_27 B14 AK19 VAXG26 VDDQ2 AF1
C105 *10U/6.3V_8/X5R_NC
AD28 B12 AK18 AE7 C149 1U/6.3V/X5R
C122 *10U/6.3V_8/X5R_NC VCC28 VTT0_28 VAXG27 VDDQ3 C148 1U/6.3V/X5R
AD27 VCC29 VTT0_29 A14 AK16 VAXG28 VDDQ4 AE4
C146 1U/6.3V/X5R
POWER
AD26 VCC30 VTT0_30 A13 AJ21 VAXG29 VDDQ5 AC1
C304 *470U_NC AC35 A12 AJ19 AB7 C145 1U/6.3V/X5R
VCC31 VTT0_31 VAXG30 VDDQ6 C150 22U/6.3V_8/X5R
+
AC34 VCC32 VTT0_32 A11 AJ18 VAXG31 VDDQ7 AB4

C296 *470U_NC AC33 AJ16 Y1 C151 *22U/6.3V_8/X5R_NC
VCC33 VAXG32 VDDQ8
+
+
AC32 VCC34 AH21 VAXG33 VDDQ9 W7

AC31 AH19 W4 C152 330U/2V_7343
VCC35 VAXG34 VDDQ10
AC30 VCC36 VTT0_33 AF10 +1.05V_VTT AH18 VAXG35 VDDQ11 U1
AC29 VCC37 VTT0_34 AE10 AH16 VAXG36 VDDQ12 T7
AC28 AC10 C139 22U/6.3V_8/X5R T4
VCC38 VTT0_35 VDDQ13
CPU CORE SUPPLY
B AC27 AB10 C134 22U/6.3V_8/X5R P1 B

AC26 Y10 N7
DDR3
AA35 VCC41 VTT0_38 W10 VDDQ16 N4
AA34 VCC42 VTT0_39 U10 VTT Rail Values are VDDQ17 L1
FDI
AA33 T10 +1.05V_VTT J24 H1
AA32
VCC43 VTT0_40
J12 Auburndal VTT=1.05V C132 22U/6.3V_8/X5R J23
VTT1_45 VDDQ18
VCC44 VTT0_41 C327 *22U/6.3V_8/X5R_NCH25 VTT1_46
POWER
AA31 VCC45 VTT0_42 J11 Clarksfield VTT=1.1V VTT1_47

AA30 VCC46 VTT0_43 J16
AA29 VCC47 VTT0_44 J15
AA28 VCC48 VTT0_59 P10 +1.05V_VTT
AA27 +1.05V_VTT K26 N10 C337 10U/6.3V_8/X5R
VCC49 VTT1_48 VTT0_60
PEG & DMI

AA26 AN33 C131 22U/6.3V_8/X5R J27 L10 C338 *10U/6.3V_8/X5R_NC
VCC50 PSI# H_PSI# 39 VTT1_49 VTT0_61
Y35 C138 22U/6.3V_8/X5R J26 K10 C331 22U/6.3V_8/X5R
VCC51 C135 *22U/6.3V_8/X5R_NC J25 VTT1_50 VTT0_62 C335 *22U/6.3V_8/X5R_NC
Y34 J22
1.1V
VCC52 C141 *22U/6.3V_8/X5R_NC H27 VTT1_51 VTT1_63
Y33 VCC53 VID[0] AK35 VID0 39 VTT1_52 VTT1_64 J20
Y32 VCC54 VID[1] AK33 VID1 39 G28 VTT1_53 VTT1_65 J18
Y31 VCC55 VID[2] AK34 VID2 39 G27 VTT1_54 VTT1_66 H21
Y30 VCC56 VID[3] AL35 VID3 39 G26 VTT1_55 VTT1_67 H20
Y29 AL33 F26 H19
CPU VIDS
VCC57 VID[4] VID4 39 VTT1_56 VTT1_68

Y28 VCC58 VID[5] AM33 VID5 39 E26 VTT1_57
Y27 VCC59 VID[6] AM35 VID6 39 E25 VTT1_58
Y26 AM34 DPRSLPVR 39 L26 +1.8V_RUN
1.8V
VCC60 PROC_DPRSLPVR VCCPLL1 C114 22U/6.3V_8/X5R
V35 VCC61 VCCPLL2 L27
V34 M26 C324 4.7U/6.3V/X5R
VCC62 VCCPLL3 C323 2.2U/ 6.3V/X5R
V33 VCC63
V32 G15 TP32 C322 1U/6.3V/X5R
VCC64 VTT_SELECT IC,AUB_CFD_rPGA,R1P0 C321 1U/6.3V/X5R
V31 VCC65
V30 VCC66 H_VTTVID1=Low, 1.1V VTT_SELECT:
V29 VCC67 H_VTTVID1=High, 1.05V High level 1.05V for Auburndale
V28
C
V27
VCC68 Low level 1.1V for Clarksfield C
VCC69
V26 VCC70
U35 VCC71
U34 +VCC_CORE
VCC72
U33 AN35
SENSE LINES
VCC73 ISENSE I_MON 39

U32 VCC74
U31 B15 VCC_SENSE & VSS_SENSE:
VCC75 VTT_SENSE VTT_SENSE 37 SC(V1.0)P19
U30 VCC76 VSS_SENSE_VTT A15 TP_VSS_SENSE_VTT R97 VID0 R280 1K/J_4 +1.05V_VTT
U29 T28 100/F 100- ±1% pull-down to GND near processor R290 *1K/J_4_NC
VCC77 VID1 R288 1K/J_4
U28 VCC78
U27 R298 *1K/J_4_NC
VCC79 VID2 R281 1K/J_4
U26 VCC80 VCC_SENSE AJ34 VCCSENSE 39
R35 AJ35 VSSSENSE 39 R291 *1K/J_4_NC
VCC81 VSS_SENSE VID3 R282 *1K/J_4_NC
R34 VCC82
R33 R292 1K/J_4
VCC83 VID4 R283 *1K/J_4_NC
R32 VCC84
R31 R293 1K/J_4
VCC85 R98 VID5 R287 1K/J_4
R30 VCC86
R29 100/F R297 *1K/J_4_NC
VCC87 VID6 R284 *1K/J_4_NC
R28 VCC88
R27 R294 1K/J_4
VCC89 PROC_DPRSLPVR: DPRSLPVR R285 1K/J_4
R26 VCC90
P35 SC(V1.0)P19: R295 *1K/J_4_NC
VCC91 It is important to have the resistor stuffing options H_PSI# R286 *1K/J_4_NC
P34 VCC92
P33 VSS_SENSE_VTT: in the design for the Turbo functionality. R296 1K/J_4
VCC93 SC(V1.0)P20 The stuffing and no-stuffing of the resistors
P32 VCC94 Connect VSS_SENSE_VTT to GND will depend on the POC configuration of AUB
P31 VCC95 or can be left floating. and CFD
P30 VCC96 Note: CRB has the VSS_SENSE_VTT floating. CRB(V1.0)P67: HFM_VID : Max 1.4V
P29 uses 1K pull-up and pull-down resistors
D P28
VCC97 LFM_VID : Min 0.65V D
VCC98 CRB default setting is "1"
P27 VCC99
P26 VCC100
0525 Steg : As an option, VTT_SENSE pin on the
processor can be left floating. But the platform needs to
have the FB (feedback) pin of the VR tied to the VTT Quanta Computer Inc.
plane regulation.
PROJECT : UM8 UMA
www.vinafix.vn
1A
PROCESSER 3/4(POWER)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

U15H U15I
AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U15E
06
K27 VSS161
AT20 AE34 K9 +M_VREF_DQ_DIMM0 J17 AT2 TP50
VSS1 VSS81 VSS162 SA_DIMM_VREF RSVD_NCTF_41
AT17 VSS2 VSS82 AE33 K6 VSS163 +M_VREF_DQ_DIMM1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 K3 VSS164 RSVD_NCTF_43 AR1
A AR28 AE31 J32 CFG0 AM30 AL28 A
VSS4 VSS84 VSS165 CFG[0] RSVD45
AR26 VSS5 VSS85 AE30 J30 VSS166 AM28 CFG[1] RSVD46 AL29
AR24 VSS6 VSS86 AE29 J21 VSS167 AP31 CFG[2] RSVD47 AP30
AR23 AE28 J19 CFG3 AL32 AP32
VSS7 VSS87 VSS168 CFG4 CFG[3] RSVD48
AR20 VSS8 VSS88 AE27 H35 VSS169 AL30 CFG[4] RSVD49 AL27
AR17 VSS9 VSS89 AE26 H32 VSS170 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H28 VSS171 AN29 CFG[6]
AR12 AD10 H26 CFG7 AM32 AT32
VSS11 VSS91 VSS172 CFG[7] RSVD51
AR9 VSS12 VSS92 AC8 H24 VSS173 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H22 VSS174 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H18 VSS175 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H15 VSS176 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H13 VSS177 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H11 VSS178 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H8 VSS179 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H5 VSS180 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 H2 VSS181 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 G34 VSS182 AK30 CFG[17]
AN34 VSS22 VSS102 AB28 G31 VSS183 H16 RSVD_TP_86 KEY A2
AN31 VSS23 VSS103 AB27 G20 VSS184 RSVD62 D15
AN23 VSS24 VSS104 AB26 G9 VSS185 AP25 RSVD1 RSVD63 C15
AN20 AB6 G6 AL25 AJ15 RSVD64_R R120 *0_NC
VSS25 VSS105 VSS186 RSVD2 RSVD64 RSVD65_R R129 *0_NC
AN17 AA10 G3 AL24 AH15
RESERVED
VSS26 VSS106 VSS187 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F30 VSS188 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F27 VSS189 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F25 VSS190 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F22 VSS191 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F19 VSS192 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 F16 VSS193
B AM11 VSS33 VSS113 W32 E35 VSS194 G25 RSVD11 RSVD_TP_71 AA2 B
AM8 VSS34 VSS114 W31 E32 VSS195 G17 RSVD12 RSVD_TP_72 AA1
AM5 VSS35 VSS115 W30 E29 VSS196 E31 RSVD13 RSVD_TP_73 R9
AM2 VSS36 VSS116 W29 E24 VSS197 E30 RSVD14 RSVD_TP_74 AG7
AL34 W28 E21 B19 AE3
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E18
E13
VSS198
VSS199
VSS200
VSS R313 *0_NC TP_RSVD17_R
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
V4
V5
AL20 W6 E11 R314 *0_NC TP_RSVD18_R B20 N2
VSS40 VSS120 VSS201 RSVD18 RSVD_TP_78
AL17 VSS41 VSS121 V10 E8 VSS202 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E5 VSS203 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 E2 VSS204
AL6 VSS44 VSS124 U2 D33 VSS205 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D30 VSS206 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D26 VSS207 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D9 VSS208 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D6 VSS209 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 D3 VSS210 J28 RSVD27
AK17 VSS50 VSS130 T30 C34 VSS211 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C32 VSS212 A33 RSVD_NCTF_29
AJ23 T28 C29 C35 AP34 R111 0
VSS52 VSS132 VSS213 RSVD_NCTF_30 VSS
AJ20 VSS53 VSS133 T27 C28 VSS214
AJ17 VSS54 VSS134 T26 C24 VSS215 B35 RSVD_NCTF_31
AJ14 T6 C22 TP31 AJ13
VSS55 VSS135 VSS216 RSVD32
AJ11 VSS56 VSS136 R10 C20 VSS217
TP34 AJ12 RSVD33 R8237 => UM7 POP
AJ8
AJ5
VSS57 VSS137 P8
P4
C19
C16
VSS218 TP22
AH25
AK26
RSVD34 UM9 DE-POP
AJ2
VSS58
VSS59
VSS138
VSS139 P2 B31
VSS219
VSS220
TP17 AL26
RSVD35
RSVD36
0918 check
AH35 VSS60 VSS140 N35 B25 VSS221 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B21 VSS222 AJ26 RSVD38
C AH33 VSS62 VSS142 N33 B18 VSS223 AJ27 RSVD39 C
AH32 VSS63 VSS143 N32 B17 VSS224 AP1 RSVD_NCTF_40
AH31 VSS64 VSS144 N31 B13 VSS225
AH30 N30 B11 IC,AUB_CFD_rPGA,R1P0
VSS65 VSS145 VSS226
AH26 VSS69 VSS149 N26 A29 VSS230
AH20 N6 A27 CFG7 R110 *3.01K/F_4_NC
VSS70 VSS150 VSS231
AH17 VSS71 VSS151 M10 A23 VSS232
AH13 VSS72 VSS152 L35 A9 VSS233
AH9 L32 CFG0 R112 *3.01K/F_4_NC
VSS73 VSS153
AH6 VSS74 VSS154 L29 AT35 VSS_NCTF1
AH3 VSS75 VSS155 L8 AT1 VSS_NCTF2
AG10 L5 AR34
NCTF
VSS76 VSS156 VSS_NCTF3 CFG4 R108 *3.01K/F_4_NC

AF8 VSS77 VSS157 L2 B34 VSS_NCTF4
AF4 K34 B2 CFG3 R109 *3.01K/F_4_NC
VSS78 VSS158 VSS_NCTF5
AF2 VSS79 VSS159 K33 B1 VSS_NCTF6
AE35 VSS80 VSS160 K30 A35 VSS_NCTF7
1 0
CFG4 Enabled; An external Display port
(Display Port Disabled; No Physical Display Port device is connected to the Embedded
Presence) attached to Embedded Diplay Port Display port
D D
The Clarkfield processor's PCI Express interface may CFG0
not meet PCI Express 2.0 jitter specifications. Intel (PCI-Epress
recommends placing a 3.01K +/- 5% pull down resistor to Single PEG Bifurcation enabled
Configuration Select)
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this CFG3
issue is fixed. (PCI-Epress Static Normal Operation Lane Numbers Reversed Quanta Computer Inc.
Lane Reversal) 15 -> 0 , 14 -> 1
PROJECT : UM8 UMA
www.vinafix.vn
1A
PROCESSER 4/4 (GND)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
INTVRMEN - Integrated SUS 1.1V VRM Enable

High - Enable Internal VRs UMA CRT,LVDS&HDMI signals
IBEX PEAK-M (LVDS,DDI) +3.3V_RUN
C287 18P/50V_4/COG U14D
PANEL_BKEN T48 Ibex-M BJ46
2
IBEX PEAK-M (HDA,JTAG,SATA) 22,25 PANEL_BKEN L_BKLTEN SDVO_TVCLKINN
1
ENVDD T47 4 OF 10 BG46
22 ENVDD L_VDD_EN SDVO_TVCLKINP
2
Y5 R265 R92 R91
U14A 22 BIA_PWM Y48 L_BKLTCTL SDVO_STALLN BJ48
32.768KHZ 10M/J_4 BG48
LCD_DDCCLK AB48 SDVO_STALLP 2.2K/J_4 2.2K/J_4
3
4
RTC_X1 B13 22 LCD_DDCCLK LCD_DDCDAT Y45 L_DDC_CLK

Ibex-M D33 BF45
1
A RTCX1 FWH0 / LAD0 LAD0 25,31 22 LCD_DDCDAT L_DDC_DATA SDVO_INTN A
C288 18P/50V_4/COG RTC_X2 D13 1 OF 10
RTCX2 FWH1 / LAD1 B33
C32
LAD1 25,31 L_CTRL_CLK AB46
SDVO SDVO_INTP BH45
LPC FWH2 / LAD2
FWH3 / LAD3 A32
LAD2
LAD3
25,31
25,31
L_CTRL_DATA V48
L_CTRL_CLK
L_CTRL_DATA SDVO_CTRLCLK T51 HDMI_SCL
HDMI_SCL 24
RTC_RST# C14 C34 T53 HDMI_SDA
T25 PAD RTCRST# FWH4 / LFRAME# LFRAME# 25,31 SDVO_CTRLDATA HDMI_SDA 24
A34 R65 2.37K/F_4 AP39
LDRQ0# T4
SRTC_RST# D17 F34 LVDS_VBG PAD AP41
LVD_IBG
BG44
T26 PAD SRTCRST# RTC (+3V) LDRQ1# / GPIO23
AB9
T6 PAD LVD_VBG DDPB_AUXN
BJ44
SERIRQ SERIRQ 25 DDPB_AUXP 25
DISPLAY PORT B
SM_INTRUDER# A16 INT_HDMI_HPD
INTRUDER#
AK7
HDD T3 PAD AT43
AT42
LVD_VREFH DDPB_HPD AU38
SATA0RXN SATA_RXN0 28 T10 PAD LVD_VREFL
+RTC_CELL R266 330K/J_6 PCH_INVRMEN A14 AK6 BD42 INT_HDMI_TXDN0 C76 0.1U/10V_4/X7R
INTVRMEN SATA0RXP SATA_RXP0 28 DDPB_0N INT_HDMI_TXDN2_C 24
AK11 LVDS--A BC42 INT_HDMI_TXDP0 C74 0.1U/10V_4/X7R
Digital Display Interface

T24 PAD SATA0TXN SATA_TXN0 28 DDPB_0P INT_HDMI_TXDP2_C 24
SATA0TXP AK9 SATA_TXP0 28 22 LCD_ACLK- AV53 LVDSA_CLK# DDPB_1N BJ42 INT_HDMI_TXDN1 C73 0.1U/10V_4/X7R
INT_HDMI_TXDN1_C 24
22 LCD_ACLK+ AV51 LVDSA_CLK DDPB_1P BG42 INT_HDMI_TXDP1 C71 0.1U/10V_4/X7R
INT_HDMI_TXDP1_C 24
ACZ_BITCLK A30 AH6 BB40 INT_HDMI_TXDN2 C68 0.1U/10V_4/X7R
HDA_BCLK SATA1RXN SATA_RXN1 28 DDPB_2N INT_HDMI_TXDN0_C 24
ACZ_SYNC D29 AH5 BB47 BA40 INT_HDMI_TXDP2 C66 0.1U/10V_4/X7R
HDA_SYNC SATA1RXP SATA_RXP1 28 22 LCD_A0- LVDSA_DATA#0 DDPB_2P INT_HDMI_TXDP0_C 24
31 ACZ_SPKR P1 SPKR SATA1TXN AH9 SATA_TXN1 28 22 LCD_A1- BA52 LVDSA_DATA#1 DDPB_3N AW38 INT_HDMI_TXCN C62 0.1U/10V_4/X7R
INT_HDMI_TXCN_C 24
ACZ_RST# C30 AH8 AY48 BA38 INT_HDMI_TXCP C57 0.1U/10V_4/X7R
HDA_RST# SATA1TXP SATA_TXP1 28 22 LCD_A2- LVDSA_DATA#2 DDPB_3P INT_HDMI_TXCP_C 24
G30 INT_TXLOUTN3 AV47
31 ACZ_SDIN0 HDA_SDIN0 T8 PAD LVDSA_DATA#3
F30 AF11 DG: Place TX cap close to connector ODD Y49
E32
HDA_SDIN1 IHDA SATA2RXN
AF9 BB48
DDPC_CTRLCLK
AB49
11 F32
HDA_SDIN2
HDA_SDIN3
SATA2RXP
SATA2TXN AF7 SATA port 2/3 are not support in HM55 .
22
22
LCD_A0+
LCD_A1+ BA50
LVDSA_DATA0
LVDSA_DATA1
DDPC_CTRLDATA
35
DISPLAY PORT C
ACZ_SDOUT B29
PCH_GPIO33 H32 HDA_SDO SATA2TXP AF6 They are only in PM 55 22 LCD_A2+
INT_TXLOUTP3
AY49 LVDSA_DATA2 DDPC_AUXN BE44 Close to VGA side
25 PCH_MELOCK HDA_DOCK_EN# / GPIO33 (+3V) T9 PAD AV48 LVDSA_DATA3 DDPC_AUXP BD44
R339 0 J30 AH3 AV40 VGA_BLU R95 2 1 150/F_4
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN DDPC_HPD
SATA SATA3RXP AH1
AF3 24 AP48
LVDS--B BE40 C592 *22P_NC
SATA3TXN LVDSB_CLK# DDPC_0N
PCH_JTAG_TCK_BUF M3
SATA3TXP AF1 ESATA AP47 LVDSB_CLK DDPC_0P BD40
BF41
1 2
TP37 JTAG_TCK DDPC_1N
AD9 AY53 BH41 50
SATA4RXN SATA_RXN4 27 LVDSB_DATA#0 DDPC_1P
PCH_JTAG_TMS K3 AD8 AT49 BD38 VGA_GRN R83 2 1 150/F_4
TP38 JTAG_TMS SATA4RXP SATA_RXP4 27 LVDSB_DATA#1 DDPC_2N
SATA4TXN AD6 SATA_TXN4 27 AU52 LVDSB_DATA#2 DDPC_2P BC38
B PCH_JTAG_TDI C593 *22P_NC B
K1 AD5 AT53 BB36
TP39 JTAG_TDI JTAG SATA4TXP SATA_TXP4 27 T13 PAD LVDSB_DATA#3 DDPC_3N
DDPC_3P BA36 1 2
TP40
PCH_JTAG_TDO J2 JTAG_TDO SATA5RXN AD3 Distance between the PCH and cap AY51 LVDSB_DATA0 50
PCH_JTAG_RST# J4
SATA5RXP AD1
AB3
on the "P" signal should be identical AT48
AU50
LVDSB_DATA1 DDPD_CTRLCLK U50
U52 VGA_RED R94 2 1 150/F_4
TP41 TRST# SATA5TXN
SATA5TXP AB1 distace between the PCH and cap on T12 PAD AT51
LVDSB_DATA2
LVDSB_DATA3
DDPD_CTRLDATA
DISPLAY PORT D
must add test point. the "N" signal for the same pair. DDPD_AUXN BC46 C594 *22P_NC
VGA_BLU AA52 BD46 1 2
31 VGA_BLU CRT_BLUE DDPD_AUXP
SPI_CLK BA2 AF16 VGA_GRN AB53 AT38
26 SPI_CLK SPI_CLK SATAICOMPO 31 VGA_GRN CRT_GREEN DDPD_HPD
VGA_RED AD53 50
TP5 31 VGA_RED CRT_RED
SPI_CS0# SATA_COMP R58 37.4/F_4
26 SPI_CS0# AV3 SPI_CS0# SATAICOMPI AF15 +1.05V_PCH
DDCCLK V51
CRT DDPD_0N BJ40
BG40
TP4 31 DDCCLK CRT_DDC_CLK DDPD_0P
SPI_CS1# AY3 T3 SATA_LED# DDCDAT V53 BJ38
TP43 SPI_CS1# SPI SATALED# SATA_LED# 29 31 DDCDATA CRT_DDC_DATA DDPD_1N
DDPD_1P BG38
R85 33/J_4 Y53 BF37
31 VGAHSYNC CRT_HSYNC DDPD_2N
SPI_SI AY1 R84 33/J_4 Y51 BH37
26 SPI_SI SPI_MOSI 31 VGAVSYNC CRT_VSYNC DDPD_2P
Y9 SATA_DET0# BE36
TP6
SPI_SO AV1
(+3V) SATA0GP / GPIO21 V1 SATA_DET1# R78 1K/D_4 AD48 DDPD_3N
BD36
26 SPI_SO SPI_MISO (+3V_S5) SATA1GP / GPIO19 DAC_IREF DDPD_3P
TP3
C362 *100P/NPO_NC IbexPeak-M_Rev1_0
UMA 0.5% AB51 CRT_IRTN
20 1 2 Serial ATA LED: This signal is an DIS 1% IbexPeak-M_Rev1_0
1205 The SATALED# signal is open-drain output pin driven during
Flash Descriptor Security Override open-collector and requires a SATA command activity. It is to be
weak external pull-up (8.2 k +5V_RUN
connected to external circuitry that
Low = Enabled to 10 k ) to +V3.3. can provide the current to drive a +3.3V_RUN Q11
platform LED. When active, the LED
2
GPIO33 High = Disabled 2N7002K-T1-E3
R242 10K/J_4 SATA_LED# is on. When tri-stated, the LED is off. LCD_DDCDAT R90 2 1 2.2K/J_4
An external pull-up resistor to Vcc3_3 PANEL_BKEN R76 2 1 100K/J_4 INT_HDMI_HPD 1 3 HDMI_DET 24
+3.3V_RUN is required. LCD_DDCCLK R89 2 1 2.2K/J_4
R37 10K/J_4 SATA_DET0# ENVDD R77 2 1 100K/J_4
C R240 10K/J_4 SATA_DET1# L_CTRL_CLK R86 10K/F_4 R74 C
100K/J_4 R96 *0/J_4_NC
L_CTRL_DATA R87 10K/F_4
R62 2 *1K_NC PCH_GPIO33
1
+3.3V_RUN
iTPM ENABLE/DISABLE
R263 *1K_NC SPI_SI

(Internal 20K/F pull high to +3.3V_RUN)
TPM Function +3.3V_SUS Res. of TDI near PCH
Note : GPIO33 is a signal used for Flash
Descriptor Security Override/ME Debug Enable Mount
Mode.This signal should be only asserted Disable NC
lowthrough an external pull-down in (Default) R228 R229 R230 R231
manufacturing or debug environments ONLY.
*200_NC *200_NC *200_NC *20K/F_4_NC
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
1mA R244 51/J_4 PCH_JTAG_TCK_BUF
For AUDIO
25,31 ACZ_RST#_AUDIO
R276
R273
33/J_4 ACZ_RST#
33/J_4 ACZ_SDOUT
+RTC_CELL RTC R245
*100_NC
R246
*100_NC
R247
*100_NC
R248
*10K_NC
NC all Res. when
PCH is production
stage.
31 ACZ_SDOUT_AUDIO
C292 *10P/50V_4_NC/COG
Res. of TDO
R274 33/J_4 ACZ_SYNC Note : Only pop when PCH is production
31 ACZ_SYNC_AUDIO PCH ES1 stage : NC
D C293 *10P/50V_4_NC/COG R267 20K/F_4 RTC_RST# D
C289 1U/6.3V/X5R PCH ES2 stage : pop stage & need "JTAG boundary Scan".
R275 33/J_4 ACZ_BITCLK Remember to depop XDP side Res.
31 ACZ_BITCLK_AUDIO
C294 10P/50V_4/COG
R271 20K/F_4 SRTC_RST#
55 C291 1U/6.3V/X5R
No Reboot strap.
+3.3V_RUN R226 *1K/F_4_NC ACZ_SPKR R268 1M/J_4 SM_INTRUDER# Quanta Computer Inc.
Low = Default.
SPKR High = No Reboot. PROJECT : UM8 UMA
www.vinafix.vn
1A
PCH 1/5 (SATA,HDA,LPC)
1 2 3 4 5 6 7 8
5 4 3 2 1
IBEX PEAK-M (GND)

AY7
B11
U14I
VSS[159]
VSS[160]
VSS[259]
VSS[260]
H49
H5 IBEX PEAK-M (PCI-E,SMBUS,CLK)
08
B15 VSS[161] VSS[261] J24
B19 K11 U14B
VSS[162] VSS[262] +3.3V_SUS
B23 VSS[163] VSS[263] K43
B31 K47 Ibex-M
B35
VSS[164]
VSS[165]
VSS[264]
VSS[265] K7 BG30 PERN1 2 OF 10 SMBus SMBALERT# 10K/J_4 R261
D B39 VSS[166] VSS[266] L14 BJ30 PERP1 (+3V_S5) SMBALERT# / GPIO11 B9 D
B43 L18 BF29 H14 ICH_SMBCLK 2.2K/J_4 R51
VSS[167] VSS[267] PETN1 SMBCLK ICH_SMBDATA 2.2K/J_4 R259
B47 VSS[168] VSS[268] L2 BH29 PETP1 SMBDATA C8
B7 L22 J14 SMBL0ALERT# 10K/J_4 R49
VSS[169] VSS[269] PCIE_RXN1
(+3V_S5) SML0ALERT# / GPIO60 SMB_CLK_ME0 2.2K/J_4 R258
BG12 VSS[170] VSS[270] L32 31 PCIE_RXN1 AW30 PERN2 SML0CLK C6
BB12 L36 PCIE_RXP1 BA30 G8 SMB_DATA_ME0 2.2K/J_4 R33
VSS[171] VSS[271] 31 PCIE_RXP1 PERP2 SML0DATA
BB16 L40 [WLAN] C54 0.1U/ 10V/X7R PCIE_TXN1_C BC30 M14 SML1ALERT# 10K/J_4 R45
VSS[172] VSS[272] 31 PCIE_TXN1 PETN2 (+3V_S5) SML1ALERT# / GPIO74
BB20 L52 C53 0.1U/ 10V/X7R PCIE_TXP1_C BD30 E10 SMB_CLK_ME1 2.2K/J_4 R43
VSS[173] VSS[273] 31 PCIE_TXP1 PETP2 (+3V_S5) SML1CLK / GPIO58
BB24 M12 G12 SMB_DATA_ME1 2.2K/J_4 R48
VSS[174] VSS[274] (+3V_S5) SML1DATA / GPIO75
BB30 VSS[175] VSS[275] M16 AU30 PERN3
BB34 VSS[176] VSS[276] M20 AT30 PERP3 SMB1 Check R value...
BB38 N38 AU32
BB42
VSS[177] VSS[277]
M34 AV32
PETN3 (R8283, R8296)
VSS[178] VSS[278] PETP3
BB49 VSS[179] VSS[279] M38 CL_CLK1 T13
BB5
BC10
VSS[180] VSS[280] M42
M46
BA32
BB32
PERN4 Controller T11 ICH_SMBCLK
VSS[181] VSS[281] PERP4 CL_DATA1 ICH_SMBCLK 31
BC14
BC18
VSS[182] VSS[282] M49
M5
BD32
BE32
PETN4 Link T9 ICH_SMBDATA
VSS[183] VSS[283] PETP4 CL_RST1# ICH_SMBDATA 31
BC2 VSS[184] VSS[284] M8
BC22 VSS[185] VSS[285] N24 BF33 PERN5
BC32 VSS[186] VSS[286] P11 BH33 PERP5
BC36 VSS[187] VSS[287] AD15 BG32 PETN5
BC40 VSS[188] VSS[288] P22 BJ32 PETP5
BC44 VSS[189] VSS[289] P30
PCIE_RXN6_LAN PCI-E* PEG
BC52 VSS[190] VSS[290] P32 31 PCIE_RXN6_LAN BA34 PERN6
BH9 P34 PCIE_RXP6_LAN AW34 H1 PEG_CLKREQ# T23
VSS[191] VSS[291] 31 PCIE_RXP6_LAN PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47
BD48
BD49
VSS[192] VSS[292] P42
P45
PCIE Clock Request [LAN] 31 PCIE_TXN6_LAN
C50
C56
0.1U/ 10V/X7R
PCIE_TXN6_LAN_C BC34
0.1U/ 10V/X7R
PCIE_TXP6_LAN_C BD34 PETN6 CLKOUT_PEG_A_N AD43
AD45
VSS[193] VSS[293] +3.3V_RUN 31 PCIE_TXP6_LAN PETP6 CLKOUT_PEG_A_P
BD5 VSS[194] VSS[294] P47 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLLN 3
C BE12 R2 PCIE_CLK_REQ1# R241 10K/J_4 AT34 AN2 C
VSS[195] VSS[295] PERN7 CLKOUT_DMI_P CLK_PCIE_3GPLLP 3
BE16 R52 PCIE_CLK_REQ2# R243 10K/J_4 AU34
VSS[196] VSS[296] PERP7
BE20 VSS[197] VSS[297] T12 AU36 PETN7
BE24 T41 +3.3V_SUS AV36 AT1 CLK_DREFSSCLKN
VSS[198] VSS[298] PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DREFSSCLKN 3
BE30 T46 AT3 CLK_DREFSSCLKP
VSS[199] VSS[299] CLKOUT_DP_P / CLKOUT_BCLK1_P CLK_DREFSSCLKP 3
BE34 T49 PCIE_CLK_REQ0# R42 10K/J_4 BG34
VSS[200] VSS[300] PCIE_CLK_REQ3# R260 10K/J_4 PERN8
BE38 VSS[201] VSS[301] T5 BJ34 PERP8
BE42 T8 PCIE_CLK_REQ4# R31 10K/J_4 BG36 AW24
VSS[202] VSS[302] PETN8 CLKIN_DMI_N CLK_BUF_PCIE_3GPLLN 2
BE46 U30 PCIE_CLK_REQB#_R R28 10K/J_4 BJ36 BA24
VSS[203] VSS[303] PETP8 CLKIN_DMI_P CLK_BUF_PCIE_3GPLLP 2
BE48 VSS[204] VSS[304] U31 AK48 CLKOUT_PCIE0N
BE50 U32 PCIE_CLK_REQ5# R255 10K/J_4 AK47
VSS[205] VSS[305] CLKOUT_PCIE0P
BE6 VSS[206] VSS[306] U34 CLKIN_BCLK_N AP3 CLK_BUF_BCLKN 2
BE8 P38 PCIE_CLK_REQ0# P9 AP1
VSS[207] VSS[307] PCIECLKRQ0# / GPIO73 (+3V_S5) CLKIN_BCLK_P CLK_BUF_BCLKP 2
BF3 V11 31 CLK_PCIE_WLANN AM43
From CLK BUFFER

VSS[208] VSS[308] CLKOUT_PCIE1N
BF49 VSS[209] VSS[309] P16 PCIECLKRQ{0,3,4,5,6,7}# should have a 31 CLK_PCIE_WLANP AM45 CLKOUT_PCIE1P
BF51 VSS[210] VSS[310] V19 10K pull-up to +V3.3A.PCIECLKRQ{1,2} MiniWLAN CLKIN_DOT_96N F18 CLK_BUF_DREFCLKN 2
BG18 V20 should have a 10K pull-up to +3.3S 31 PCIE_CLK_REQ1# U4 E18 CLK_BUF_DREFCLKP 2
BG24
VSS[211] VSS[311]
V22
PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P
VSS[212] VSS[312] (DS 401376 Table2-26)
BG4 VSS[213] VSS[313] V30 AM47 CLKOUT_PCIE2N
BG50 VSS[214] VSS[314] V31 AM48 CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N AH13 CLK_BUF_DREFSSCLKN 2
BH11 VSS[215] VSS[315] V32 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLKP 2
BH15 V34 PCIE_CLK_REQ2# N4
BH19
VSS[216] VSS[316]
V35 CLK_DREFSSCLKN PCIECLKRQ2# / GPIO20 (+3V)
VSS[217] VSS[317] +3.3V_SUS CLK_DREFSSCLKP
BH23 V38 AH42 P41
BH31
VSS[218]
VSS[219]
VSS[318]
VSS[319] V43
PEG_CLKREQ#
6 R249 10K/J_4 R252
AH41
CLKOUT_PCIE3N
CLKOUT_PCIE3P
REFCLK14IN
C67 *5.6P/50V_4_NC/COG
CLK_PCH_14M 2
BH35 VSS[220] VSS[320] V45
BH39 V46 PCIE_CLK_REQ3# A8 J42 CLK_PCI_FB
VSS[221] VSS[321] PCIECLKRQ3# / GPIO25 (+3V_S5) CLKIN_PCILOOPBACK CLK_PCI_FB 9
BH43 V47 *0_NC R256 T27
VSS[222] VSS[322]
BH47 VSS[223] VSS[323] V49 *0_NC AM51 CLKOUT_PCIE4N Intel recommendation
B BH7 VSS[224] VSS[324] V5 AM53 CLKOUT_PCIE4P XTAL25_IN AH51 XTAL25_IN R81 *0_NC B
C12 VSS[225] VSS[325] V7 Q8 XTAL25_OUT AH53 XTAL25_OUT RC0402
C50 V8 PCIE_CLK_REQ4# M9
VSS[226] VSS[326] FDN357N PCIECLKRQ4# / GPIO26 (+3V_S5)
D51 VSS[227] VSS[327] W2 XCLK_RCOMP AF38 XCLK_RCOMP +1.05V_PCH
E12 W52 R69 90.9/F_4
VSS[228] VSS[328] SMB_CLK_ME1
E16 VSS[229] VSS[329] Y11 1 3 SMBCLK1 25 AJ50 CLKOUT_PCIE5N
E20 Y12 AJ52 T45 CLK_FLEX0 T11
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64
P43 CLK_FLEX1 T7
VSS[231] VSS[331] PCIE_CLK_REQ5# (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65 CLK_FLEX2 T5
E30 Y19 H6 T42
2
E34
VSS[232] VSS[332]
Y23
PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66
N50 CLK_FLEX3
E38
VSS[233] VSS[333]
Y28
(+3V) CLKOUTFLEX3 / GPIO67 R277 22/J_4
CLK_48M_CARD 23
VSS[234] VSS[334]
E42 Y30 AK53
E46
VSS[235]
VSS[236]
VSS[335]
VSS[336] Y31 +3.3V_SUS
31 CLK_PCIE_LANN
31 CLK_PCIE_LANP AK51
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P Clock Flex 55
E48 Y32 LAN C295
VSS[237] VSS[337]
E6 VSS[238] VSS[338] Y38 31 PCIE_CLK_REQB#_R
PCIE_CLK_REQB#_R P13 PEG_B_CLKRQ# / GPIO56(+3V_S5) R8236 => UM7 POP 33ohm
5.6P/50V_4/COG
E8
F49
VSS[239] VSS[339] Y43
Y46
UM9 POP 22ohm
VSS[240] VSS[340] 0918 check
2
F5 P49 IbexPeak-M_Rev1_0
VSS[241] VSS[341]
G10 Y5
G14
VSS[242]
VSS[243]
VSS[342]
VSS[343] Y6 SMB_DATA_ME1 1 3 SMBDAT1 25
43
G18 VSS[244] VSS[344] Y8
G2 P24 XTAL25_IN C89 27p/NPO
VSS[245] VSS[345]
G22 VSS[246] VSS[346] T43 Q10 POP Y8201, C8411, C8412 and R8401, de-POP R8999
1
G32 VSS[247] VSS[347] AD51
FDN357N
UMA for Internal GFX 25MHz
G36 VSS[248] VSS[348] AT8
G40 AD47 R80 Y3
VSS[249] VSS[349] 1M/F_4
G44 Y47
2
VSS[250] VSS[350]
G52 VSS[251] VSS[351] AT12 de-POP Y8201, C8411, C8412 and R8401, POP R8999
AF39 AM6 DIS XTAL25_OUT C88 27p/NPO
H16
VSS[252] VSS[352]
AT13
for Internal GFX
A VSS[253] VSS[353] A
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_Rev1_0 Quanta Computer Inc.
PROJECT : UM8 UMA
www.vinafix.vn
1A
PCH 2/5 (PCIE, SMBUS, CK)
5 4 3 2 1
1 2 3 4 5 6 7 8
+3.3V_RUN
IBEX PEAK-M (PCI,USB,NVRAM)
H40
U14E
AD0 Ibex-M NV_CE#0 AY9
IBEX PEAK-M (DMI,FDI,GPIO)
09
N34 AD1 5 OF 10 NV_CE#1 BD1
RP13 C44 AP15 U14C
PCI_PIRQD# AD2 NV_CE#2
5 6 A38 AD3 NV_CE#3 BD8 FDI_RXN0 BA18 FDI_TXN0 3
PCI_IRDY# 4 7 PCI_SERR# C36 BC24 Ibex-M BH17
AD4 3 DMI_RXN0 DMI0RXN FDI_RXN1 FDI_TXN1 3
A PCI_STOP# 3 8 REQ1# J34 AV9 BJ22 3 OF 10 BD16 A
AD5 NV_DQS0 3 DMI_RXN1 DMI1RXN FDI_RXN2 FDI_TXN2 3
PCI_PIRQA# 2 9 PCI_FRAME# A40 BG8 AW20 BJ16
PCI_PIRQC# 1 10 +3.3V_RUN D45
E36
AD6
AD7 NVRAM NV_DQS1
AP7
3
3
DMI_RXN2
DMI_RXN3 BJ20
DMI2RXN
DMI3RXN
FDI_RXN3
FDI_RXN4 BA16
BE14
FDI_TXN3
FDI_TXN4
3
3
AD8 NV_DQ0 / NV_IO0 FDI_RXN5 FDI_TXN5 3
8.2KX8 H48 AP6 BD24 BA14
AD9 NV_DQ1 / NV_IO1 3 DMI_RXP0 DMI0RXP FDI_RXN6 FDI_TXN6 3
E40 AD10 NV_DQ2 / NV_IO2 AT6 3 DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 3
+3.3V_SUS C40 AT9 BA20
AD11 NV_DQ3 / NV_IO3 3 DMI_RXP2 DMI2RXP
RP3 M48 BB1 BG20 BB18
AD12 NV_DQ4 / NV_IO4 3 DMI_RXP3 DMI3RXP FDI_RXP0 FDI_TXP0 3
5 6 USB_OC7# M45 AV6 BF17
AD13 NV_DQ5 / NV_IO5 FDI_RXP1 FDI_TXP1 3
USB_OC6# 4 7 USB_OC0# F53 BB3 BE22 BC16
AD14 NV_DQ6 / NV_IO6 3 DMI_TXN0 DMI0TXN FDI_RXP2 FDI_TXP2 3
USB_OC3# 3 8 USB_OC5# M40 BA4 BF21 BG16
USB_OC1# 2 9 USB_OC2# M43
AD15
AD16
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8 BE4
3
3
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4 AW16
FDI_TXP3
FDI_TXP4
3
3
USB_OC4# 1 10 +3.3V_SUS J36 BB6 BE18 BD14
AD17 NV_DQ9 / NV_IO9 3 DMI_TXN3 DMI3TXN FDI_RXP5 FDI_TXP5 3
K48 AD18 NV_DQ10 / NV_IO10 BD6 FDI_RXP6 BB14 FDI_TXP6 3
8.2KX8 F40 BB7 BD22 BD12
AD19 NV_DQ11 / NV_IO11 3 DMI_TXP0 DMI0TXP FDI_RXP7 FDI_TXP7 3
C42 AD20 NV_DQ12 / NV_IO12 BC8 3 DMI_TXP1 BH21 DMI1TXP
+3.3V_RUN K46 BJ8 BC20
AD21 NV_DQ13 / NV_IO13 3 DMI_TXP2 DMI2TXP
RP14 M51 BJ6 BD18 BJ14
AD22 NV_DQ14 / NV_IO14 3 DMI_TXP3 DMI3TXP FDI_INT FDI_INT 3
5 6 PCI_PLOCK# J52 BG6 BF13
AD23 NV_DQ15 / NV_IO15 FDI_FSYNC0 FDI_FSYNC0 3
USB_MCARD1_DET# 4 7 PCI_PERR# K51 BH13
AD24 FDI_FSYNC1 FDI_FSYNC1 3
PCI_DEVSEL# 3 8 REQ0# L34 BD3 NV_ALE BH25 BJ12
AD25 NV_ALE DMI_ZCOMP FDI_LSYNC0 FDI_LSYNC0 3
PCI_TRDY# 2 9 PCI_PIRQB# F42 AY6 NV_CLE +1.05V_PCH DMI_COMP BF25 BG14
AD26 NV_CLE DMI_IRCOMP FDI_LSYNC1 FDI_LSYNC1 3
INTH# 1 10 +3.3V_RUN J40 R60 49.9/F_4
AD27
G46 AD28
8.2KX8 F44
M47
AD29 NV_RCOMP AU2
T6
System Power Management P12
H36
AD30
AD31 PCI NV_RB# AV7
3 XDP_DBRESET#
TP46 M6
B17
SYS_RESET#
SYS_PWROK
SLP_S3#
SLP_S4# H7
SIO_SLP_S3# 25
TP9
R30 0 PCH_PWROK K5 PWROK SLP_M#
J50 C/BE0# NV_WR#0_RE# AY8 25,30 ECPWROK MEPWROK SLP_M# K8 TP10
B G42 C/BE1# NV_WR#1_RE# AY5 TP23 N2 B
H47 TP44 RSV_ICH_LAN_RST# A10
C/BE2# LAN_RST#
G34 AV11 3 PM_DRAM_PWRGD D9 M1 SUS_PWR_ACK 25
C/BE3# NV_WE#_CK0
BF5 C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 P7
PCI_PIRQA#
PCI_PIRQB#
G38 PIRQA#
NV_WE#_CK1 37 25 RSMRST#
TP45
RSMRST# (+3V_S5) ACPRESENT / GPIO31
(+3V) CLKRUN# / GPIO32 Y1
AC_PRESENT 25
CLKRUN# 25
H51 PIRQB# 25 PM_PWRBTN#_R P5 PWRBTN# (+3V_S5) SUS_STAT# / GPIO61 P8
PCI_PIRQC# B37 H18 F3 TP42
PCI_PIRQD# PIRQC# USBP0N USBP0- 31 (+3V_S5) SUSCLK / GPIO62 SIO_SLP_S5#
A44 PIRQD# USBP0P J18
A18
USBP0+ 31 USB #0 PM_RI# F14
(+3V_S5) SLP_S5# / GPIO63 E4
A6 PM_BATLOW#
SIO_SLP_S5# 25
REQ0# USBP1N USBP1- 31 RI# (+3V_S5) BATLOW# / GPIO72
F51 C18
REQ1# A46
REQ0# USBP1P
N20
USBP1+ 31 USB #1 31
3
PCIE_WAKE#
PM_SYNC
J12
BJ10
WAKE#
F6
REQ2# REQ1# / GPIO50 (+5V) USBP2N USBP2- 27 PMSYNCH (+3V_S5) SLP_LAN# / GPIO29
31 USB_MCARD1_DET#
USB_MCARD1_DET#
B45
M53
REQ2# / GPIO52 (+5V) USBP2P P20
J20
USBP2+ 27 USB #2 (eSATA)
REQ3# / GPIO54 (+5V) USBP3N
L20 IbexPeak-M_Rev1_0
GNT0# USBP3P
F48 GNT0# USBP4N F20 USBP4- 31
GNT1# K45
F36
GNT1# / GPIO51 (+3V) USBP4P G20
A20
USBP4+ 31 WLAN +3.3V_RUN
GNT3# GNT2# / GPIO53 (+3V) USBP5N USBP5- 31
H53 GNT3# / GPIO55 (+3V) USBP5P C20
M22
USBP5+ 31 WWAN +3.3V_RUN REQ2# R71 8.2K
PIRQE# USBP6N PIRQE# R70 8.2K
B41 PIRQE# / GPIO2 USBP6P N22
R88 PIRQF# K53 (+5V) B21 CLKRUN# R221 8.2K PIRQF# R93 8.2K
*10K/F_4_NC R75 BT_DET# PIRQF# / GPIO3 (+5V) USBP7N XDP_DBRESET# R41 10K/J_4 BT_DET# R64 8.2K
27 BT_DET# A36 PIRQG# / GPIO4 USBP7P D21
*1K/F_4_NC INTH# A48 (+5V) H22
PIRQH# / GPIO5 (+5V) USBP8N USBP8- 27
TP8 K6
USBP8P J22
E22
USBP8+ 27 BT +3.3V_SUS
PCIRST# USBP9N
USBP9P F22 Connect this signal on PCH directly to the
PCI_SERR# E44 A22 PM_RI# R52 10K/J_4
R73
*1K/F_4_NC
PCI_PERR# E50
SERR#
PERR# USB USBP10N
USBP10P C22
G24
reset button and pull‐up this signal to
+V3.3 (Core rail) through a weak pull‐up
PM_BATLOW#
PCIE_WAKE#
R257
R46
10K/J_4
1K/J_4
USBP11N USBP11- 22
C USBP11P H24 USBP11+ 22 Webcam resistor (8.2 to 10‐k ). C
PCI_IRDY# A42 L24
IRDY# USBP12N USBP12- 23 SUS_PWR_ACK R227 10K/J_4
PCI_DEVSEL#
H44
F46
PAR USBP12P M24
A24
USBP12+ 23 Card Reader AC_PRESENT R27 10K/J_4
PCI_FRAME# DEVSEL# USBP13N
C46 FRAME# USBP13P C24
RSMRST# R269 10K/J_4
PCI_PLOCK# D49 RSV_ICH_LAN_RST# R262 10K/J_4
PLOCK#
R8404, R8403 and R8402 USBRBIAS# B25 USB_BIAS R272 22.6/F_4 PCH_PWROK R270 10K/J_4
PCI_STOP#
=> UM7 POP 22ohm PCI_TRDY#
D41
C48
STOP#
D25
UM9 POP 22ohm TRDY# USBRBIAS
0918 check 54 TP7 PME# M7 PME# USB_OC0#
N16 USB_OC0# 31 DMI Termination Voltage
PLT_RST-R# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1#
PLTRST# (+3V_S5)OC1# / GPIO40 USB_OC1# 27
F16 USB_OC2#
R279 CLK_33M_LPC_R
*22/J_4_NC N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3# Set to Vcc when LOW
31 CLK_33M_LPC CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42
P53 CLKOUT_PCI1 E14 USB_OC4# NV_CLE
R82 22/J_4 CLK_33M_KBC_R P46 (+3V_S5)OC4# / GPIO43 G16 USB_OC5# Set to Vcc/2 when HIGH +1.8V_RUN
25 CLK_33M_KBC CLKOUT_PCI2 (+3V_S5) OC5# / GPIO9
R278 22/J_4 CLK_PCI_FB_R P51 F12 USB_OC6#
8 CLK_PCI_FB CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10
P48 T15 USB_OC7#
CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 NV_ALE R264 *1K_NC
CLKOUT_PCI[0..4]:
22 ohm series resistor is recommend IbexPeak-M_Rev1_0 NV_CLE R53 *1K_NC
+3.3V_SUS
(single & double load) on PDG v1.1
Danbury Technology Enabled
Reserve capacitor pads for U5 C21 High = Enable
improving WWAN. *MC74VHC1G08DFT2G_NC *0.1U/10V_NC/X7R NV_ALE
D Boot BIOS Strap 5 Low = Disable D
PLT_RST-R# 2
CLK_33M_KBC CLK_33M_LPC A16 swap override Strap/Top-Block GNT0# GNT#1 Boot BIOS Location 4
54 Swap Override jumper 1
PLTRST# 3,25,31
0 0 LPC
R44 R34
3
C90 C297 Low = A16 swap 0 1 Reserved (NAND) 100K/F_4 *100K/F_4_NC

10P/50V/COG *5.6P/50V_4_NC/COG override/Top-Block Quanta Computer Inc.
GNT3# Swap Override enabled 1 0 PCI R23 0
High = Default
1 1 SPI PROJECT : UM8 UMA
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1A
PCH 3/5 (PCI,ONFI,USB,DMI)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) IBEX PEAK-M (GND)

U14F U14H
Ibex-M
PCH_GPIO0 Y3 6 OF 10 AH45 AB16 AK30
BMBUSY# / GPIO0 (+3V) CLKOUT_PCIE6N VSS[0] VSS[80]
CLKOUT_PCIE6P AH46 AA19 VSS[1] VSS[81] AK31
25 SIO_EXT_SMI# C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
VSS[3] VSS[83]
25 SIO_EXT_SCI# D37 TACH2 / GPIO6 (+3V) AM19 VSS[4] VSS[84] AK35
CLKOUT_PCIE7N AF48 AA24 VSS[5] VSS[85] AK38
J32 AF47 AA26 AK43
A
25 SIO_EXT_WAKE# TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87] AK46 A
TP11 PCH_GPIO8 F10 AA30 AK49
GPIO8 (+3V_S5) MISC AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89] AK5
LAN_PHY_PWR_CTRL K9 U2 AA32 AK8
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE GATEA20 25 VSS[10] VSS[90]
AB11 VSS[11] VSS[91] AL2
T7 GPIO15 (+3V_S5) AB15 VSS[12] VSS[92] AL52
AB23 VSS[13] VSS[93] AM11
SATA4GP AA2 AM3 AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLK_CPU_BCLKN 3 VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24
R72 0 PCIE_MCARD1_DET#_R F38 AM1 AB32 AM20
31 PCIE_MCARD1_DET# TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P CLK_CPU_BCLKP 3 VSS[16] VSS[96]
PCIE_MCARD2_DET# Y7 BG10 PCH_PECI_R AB43 AM24
SCLOCK / GPIO22(+3V) PECI H_PECI 3 VSS[18] VSS[98]
GPIO27 reserve for R50 *10K_NC GPIO27 AB12
GPIO27 (+3V_S5) RCIN# T1 RCIN# 25 AB5 VSS[20] VSS[100] AM28
internal VR. TP_PCH_GPIO28 CPU AB8 VSS[21] VSS[101] BA42
V13 GPIO28 (+3V_S5) PROCPWRGD BE10 H_PWRGOOD 3 AC2 VSS[22] VSS[102] AM30
AC52 VSS[23] VSS[103] AM31
SATA2GP AB7 BD10 PCH_THRMTRIP#_R AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# H_THERM 3 VSS[24] VSS[104]
R54 56/F AD12 AM34
SATA3GP VSS[25] VSS[105]
AB13 SATA3GP / GPIO37 TP1 BA22 +1.05V_VTT AD16 VSS[26] VSS[106] AM35
(+3V) AW22 R56 56/F AD23 AM38
BT_RADIO_DIS# TP2 VSS[27] VSS[107]
27 BT_RADIO_DIS# P3 BB22 AD30 AM39
SDATAOUT0 / GPIO39 (+3V) TP3 VSS[28] VSS[108]
TP4 AY45
AY46
0821 UM8-0821_2.DSN AD31
AD32
VSS[29] VSS[109] AM42
AU20
GPIO46 TP5 VSS[30] VSS[110]
F1 PCIECLKRQ7# / GPIO46 (+3V_S5) TP6 AV43 AD34 VSS[31] VSS[111] AM46
TP7 AV45 AU22 VSS[32] VSS[112] AV22
WWAN_RADIO_DIS# AB6 AF13 AD42 AM49
31 WWAN_RADIO_DIS# SDATAOUT1 / GPIO48 (+3V) TP8 VSS[33] VSS[113]
TP9 M18 AD46 VSS[34] VSS[114] AM7
CRIT_TEMP_REP# AA4 N18 AD49 AA50
25 CRIT_TEMP_REP# SATA5GP / GPIO49 (+3V) TP10 VSS[35] VSS[115]
B RSVD TP11 AJ24
AK41
AD7
AE2
VSS[36] VSS[116] BB10
AN32
B
TP12 VSS[37] VSS[117]
GPIO24 register not cleared TP13 AK42 AE4 VSS[38] VSS[118] AN50
by CF9h reset event. TP14 M32 AF12 VSS[39] VSS[119] AN52
H10 GPIO24 TP15 N32 Y13 VSS[40] VSS[120] AP12
GPIO45 H3 (+3V_S5) M30 AH49 AP42
VGA_TYPE PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 VSS[41] VSS[121]
F8 GPIO57 TP17 N30 AU4 VSS[42] VSS[122] AP46
USB_MCARD2_DET# M11 (+3V_S5) H12 AF35 AP49
31 USB_MCARD2_DET# STP_PCI# / GPIO34 (+3V) TP18 VSS[43] VSS[123]
GPIO35 V6 AA23 AP13 AP5
WLAN_RADIO_DIS# SATACLKREQ# / GPIO35(+3V) TP19 VSS[44] VSS[124]
31 WLAN_RADIO_DIS# V3 AB45 AN34 AP8
SLOAD / GPIO38 (+3V) NC_1
AB38 AF45
VSS[45] VSS[125]
AR2
NC_2 VSS[46] VSS[126]
NC_3 AB42 AF46 VSS[47] VSS[127] AR52
NC_4 AB41 AF49 VSS[48] VSS[128] AT11
NC_5 T39 AF5 VSS[49] VSS[129] BA12
INIT3_3V# P6 AF8 VSS[50] VSS[130] AH48
TP24 C10 AG2 VSS[51] VSS[131] AT32
AG52 VSS[52] VSS[132] AT36
A4 VSS_NCTF_1 VSS_NCTF_16 BH2 AH11 VSS[53] VSS[133] AT41
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1
BJ2
AH24
AH32
VSS[56] VSS[136] AV12
AV16
VGA_TYPE VSS_NCTF_5 VSS_NCTF_20 VSS[57] VSS[137]
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
B2 VSS_NCTF_7 VSS_NCTF_22 BJ49 AH43 VSS[59] VSS[139] AV24
R36 B4 BJ5 AH47 AV30
VSS_NCTF_8 VSS_NCTF_23 VSS[60] VSS[140]
10K/F_4 B52 VSS_NCTF_9 VSS_NCTF_24 BJ50 AH7 VSS[61] VSS[141] AV34
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 VSS_NCTF_11 VSS_NCTF_26 BJ53 AJ2 VSS[63] VSS[143] AV42
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
C BF1 VSS_NCTF_13 VSS_NCTF_28 D2 AJ22 VSS[65] VSS[145] AV49 C
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 VSS_NCTF_15 VSS_NCTF_30 E1 AJ26 VSS[67] VSS[147] AV8
VSS_NCTF_31 E53 AJ28 VSS[68] VSS[148] AW14
AJ32 VSS[69] VSS[149] AW18
IbexPeak-M_Rev1_0 AJ34 AW2
VSS[70] VSS[150]
AT5 VSS[71] VSS[151] BF9
AJ4 VSS[72] VSS[152] AW32
AK12 VSS[73] VSS[153] AW36
AM41 VSS[74] VSS[154] AW40
AN19 VSS[75] VSS[155] AW52
AK26 VSS[76] VSS[156] AY11
AK22 VSS[77] VSS[157] AY43
AK23 VSS[78] VSS[158] AY47
AK28 VSS[79]
IbexPeak-M_Rev1_0
+3.3V_RUN
R40 10K GPIO35 +3.3V_RUN BMBUSY#:(Intel feedback)
RCIN# R224 10K Follow CRB checklist, 1K is
GATEA20 R223 10K for intel BIOS validation purpose.
BT_RADIO_DIS# R225 10K
SATA2GP R25 10K PCH_GPIO0 R239 10K
SATA3GP R55 10K BMBUSY#:
SATA4GP R238 10K WWAN_RADIO_DIS# R38 10K If not used, require a weak pull-up
PCIE_MCARD1_DET#_R R66 10K (8.2- KΩ to 10 kΩ) to Vcc3_3.
D D
PCIE_MCARD2_DET# R26 10K CRB(V1.0)P28: it has 1K PU and
SIO_EXT_SMI# R67 10K 100 ohm on this net for validation purpose.
+3.3V_SUS SIO_EXT_SCI# R68 10K
SIO_EXT_WAKE# R63 10K
WLAN_RADIO_DIS# R222 10K
TP_PCH_GPIO28 R39 10K CRIT_TEMP_REP# R219 10K
GPIO46 R254 10K USB_MCARD2_DET# R29 10K Quanta Computer Inc.
GPIO45 R251 10K WWAN_RADIO_DIS# 1-X High = Strong (Default)
LAN_PHY_PWR_CTRL R32 *10K_NC
PROJECT : UM8 UMA
www.vinafix.vn
1A
PCH 4/5 (GPIO & Strap)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
need check to change to 470 ohm
+VCCA_DAC_1_2
L10
Cap quantities follow UM3
11
+3.3V_RUN
HCB1608KF-181T15
1.524A U14G POWER U14J POWER
+1.05V_PCH AB24 VCCCORE[1] VCCADAC[1] AE50 C91 22U/6.3V_8/X5R VCCACLK = 100mA max Ibex-M 3.208A
A C51 1U/6.3V/X5R AB26 Ibex-M C86 0.1U/ 10V/X7R +1.05V_PCH L9 *10uH_NC +1.1V_LAN_VCCA_CLK AP51 10 OF 10VCCIO[5] V24 +1.05V_PCH A
C43 10U/6.3V_8/X5R VCCCORE[2] C83 0.01U/25V_4/X7R C80 *1U/6.3V_NC/X5R VCCACLK[1]
AB28 VCCCORE[3] 7 OF 10 VCCADAC[2] AE52 VCCIO[6] V26
AD26 C93 10U/6.3V_8/X5R C92 *10U/6.3V_0805_NC/X5RAP53 Y24 C47 1U/6.3V/X5R
VCCCORE[4] VCCACLK[2] VCCIO[7]
AD28 VCCCORE[5] CRT VSSA_DAC[1] AF53 Y20 DCPSUSBYP VCCIO[8] Y26
AF26 VCCCORE[6] DCPSUSBYP
USB 0.163A
AF28 VCCCORE[7] VSSA_DAC[2] AF51 VCCSUS3_3[1] V28 +3.3V_SUS
AF30 C35 0.1U/ 10V/X7R U28
VCCCORE[8] VCCSUS3_3[2] C30 0.1U/ 10V/X7R
AF31 VCCCORE[9] VCCSUS3_3[3] U26
AH26 VCCCORE[10] VCCALVDS AH38 +3.3V_RUN R57 1 2 0 +VCCLAN AF23 VCCLAN[1] VCCSUS3_3[4] U24 C49 0.1U/ 10V/X7R
AH28 VCCCORE[11] VSSA_LVDS AH39 VCCSUS3_3[5] P28
C34 *1U/6.3V_NC/X5R
AH30
AH31
VCCCORE[12] LVDS AP43 +VCCTX_LVDS L6 0.1uH +1.8V_RUN
AF24 VCCLAN[2] VCCSUS3_3[6] P26
N28
VCCCORE[13] VCCTX_LVDS[1] VCCSUS3_3[7]
AJ30 VCCCORE[14] VCCTX_LVDS[2] AP45 VCCSUS3_3[8] N26
AJ31 VCCCORE[15] VCCTX_LVDS[3] AT46 +1.05V_PCH AD38 VCCME[1] VCCSUS3_3[9] M28
AT45 C75 C72 C79 M26
VCCTX_LVDS[4] 0.01U/25V_4/X7R0.01U/25V_4/X7R22U/6.3V_8/X5R C69 22U/6.3_8/X5R AD39 VCCSUS3_3[10]
VCC CORE VCCME[2] VCCSUS3_3[11] L28
3.208A 0.357A C70 22U/6.3_8/X5R AD41 VCCSUS3_3[12] L26
+1.05V_PCH AK24 VCCIO[24] VCC3_3[2] AB34 VCCME[3] VCCSUS3_3[13] J28
VCCSUS3_3[14] J26
L5 *1uH_NC +1.05V_LAN_VCCAPLL_EXP BJ24 AB35 C65 1U/6.3V/X5R AF43 H28 +3.3V_SUS
+3.3V_RUN
C32 *10U/6.3V_0805_NC/X5R VCCAPLLEXP VCC3_3[3] VCCME[4] VCCSUS3_3[15]
+1.05V_PCH HVCMOS +3.3V_RUN VCCSUS3_3[16] H26
3.208A AN20 VCCIO[25] VCC3_3[4] AD35 AF41 VCCME[5] VCCSUS3_3[17] G28
+1.05V_PCH AN22 G26
C45 10U/6.3V_8/X5R AN23 VCCIO[26] C60 0.1U/ 10V/X7R AF42
VCCSUS3_3[18]
F28
VCCIO[27] VCCME[6] VCCSUS3_3[19]
Clock and Miscellaneous

C38 1U/6.3V/X5R AN24 VCCIO[28] F26 C48
C42 1U/6.3V/X5R VCCSUS3_3[20]
C44 1U/6.3V/X5R
AN26 VCCIO[29] 0.035A C77
V39 VCCME[7] VCCSUS3_3[21] E28 10U/6.3V_8/X5R
AN28 VCCIO[30] VCCVRM[2] AT24 +1.8V_RUN VCCSUS3_3[22] E26
C46 1U/6.3V/X5R BJ26 VCCIO[31] 0.061A 10U/6.3V_8/X5R V41 C28
VCCME[8] VCCSUS3_3[23]
BJ28 VCCIO[32] VCCDMI[1] AT16 +1.05V_VTT VCCSUS3_3[24] C26
B AT26 VCCIO[33]
AT28 VCCIO[34]
DMI AU16
V42 VCCME[9] VCCSUS3_3[25] B27
A28
B
VCCDMI[2] C33 1U/6.3V/X5R VCCSUS3_3[26]
AU26 VCCIO[35] Y39 VCCME[10] VCCSUS3_3[27] A26
AU28 VCCIO[36]
AV26 VCCIO[37] Y41 VCCME[11] VCCSUS3_3[28] U23
AV28 VCCIO[38] PCI E* VCCPNAND[1] AM16 3.208A
AW26 VCCIO[39] VCCPNAND[2] AK16 Y42 VCCME[12] VCCIO[56] V23 +1.05V_PCH
AW28 VCCIO[40] VCCPNAND[3] AK20 0.156A +VCCRTCEXT +V5REF_SUS R59 100
BA26 VCCIO[41] VCCPNAND[4] AK19 +1.8V_RUN V9 DCPRTC V5REF_SUS F24 +5V_SUS
BA28 VCCIO[42] AK15 C24 0.1U/ 10V/X7R >1mA
VCCPNAND[5] D8 RB500V-40
BB26 VCCIO[43] VCCPNAND[6] AK13
C26 0.1U/ 10V/X7R
0.072A +3.3V_SUS
BB28 VCCIO[44] VCCPNAND[7] AM12 +1.8V_RUN AU24 VCCVRM[3]
BC26 VCCIO[45] AM13 C39 1U/6.3V/X5R
VCCPNAND[8]
BC28 VCCIO[46] VCCPNAND[9] AM15 0.072A
BD26 VCCIO[47]
+1.1V_VCCADPLLA
BB51 VCCADPLLA[1] >1mA
BD28 VCCIO[48] BB53 VCCADPLLA[2]
BE26 VCCIO[49] NAND / SPI V5REF K49 +V5REF R79 100 +5V_RUN
BE28 VCCIO[50] 0.073A D9 RB500V-40
BG26 VCCIO[51]
BG28 VCCIO[52]
VCCME3_3[1] AM8
AM9
0.085A +1.1V_VCCADPLLB
BD51
BD53
VCCADPLLB[1]
PCI/GPIO/LPC
+3.3V_RUN
VCCME3_3[2] +3.3V_RUN VCCADPLLB[2]
BH27 VCCIO[53] AP11 3.208A C78 1U/6.3V/X5R
VCCME3_3[3]
AN30 VCCIO[54] VCCME3_3[4] AP9
C23 0.1U/ 10V/X7R
+1.05V_PCH AH23 VCCIO[21] 0.357A
AN31 VCCIO[55] AJ35 VCCIO[22] VCC3_3[8] J38 +3.3V_RUN
0.357A C55 1U/6.3V/X5R AH35 L38
C59 1U/6.3V/X5R VCCIO[23] VCC3_3[9]
+3.3V_RUN AN35 VCC3_3[1] AF34 VCCIO[2] VCC3_3[10] M36
C63 0.1U/ 10V/X7R C64 1U/6.3V/X5R AH34 N36 C58 0.1U/ 10V/X7R
VCCIO[3] VCC3_3[11] C61 0.1U/ 10V/X7R
AF32 VCCIO[4] VCC3_3[12] P36
0.035A AT22 VCCVRM[1] VCC3_3[13] U35
+1.8V_RUN
BJ18
FDI C25 +VCCSST
0.1U/ 10V/X7R V12
VCC3_3[14] AD13
C VCCFDIPLL DCPSST C
L26 *1uH_NC +1.05V_VCCFDIPLL 3.208A
+1.05V_PCH C290 *10U/6.3V_0805_NC/X5R
AM23 +V1.1LAN_INT_VCCSUS Y22
VCCIO[1] C37 0.1U/ 10V/X7R DCPSUS
3.208A IbexPeak-M_Rev1_0 PCI/GPIO/LPC AK3 +1.05V_VCCSATAPLL L25 *10uH_NC +1.05V_PCH
VCCSATAPLL[1] C283 *1U/6.3V_NC/X5R
+1.05V_PCH 0.163A P18 VCCSUS3_3[29] VCCSATAPLL[2] AK1
C282 *10U/6.3V_0805_NC/X5R
+3.3V_SUS U19 VCCSUS3_3[30]
U20 VCCSUS3_3[31]
C36 0.1U/ 10V/X7R U22 AT20 +1.8V_RUN
VCCSUS3_3[32] VCCVRM[4]
0.035A
V15 VCC3_3[5] VCCIO[9] AH22 +1.05V_PCH
+1.05V_PCH L7 10uH +1.1V_VCCADPLLA 0.357A V16 AH19
VCC3_3[6] VCCIO[10] C41 1U/6.3V/X5R
+3.3V_RUN Y16 VCC3_3[7] VCCIO[11] AD20
C31 0.1U/ 10V/X7R AF22
+ C87 VCCIO[12]
220U C81
>1mA VCCIO[13] AD19
+1.05V_VTT AT18 V_CPU_IO[1] VCCIO[14] AF20
3528 1U/6.3V/X5R C28 4.7U/6.3V/X5RAU18
C29 0.1U/ 10V/X7R V_CPU_IO[2] SATA VCCIO[15] AF19
C40 0.1U/ 10V/X7R

CPU VCCIO[16] AH20
AB19
VCCIO[17]
2mA VCCIO[18] AB20
+RTC_CELL A12 VCCRTC VCCIO[19] AB22
L8 10uH +1.1V_VCCADPLLB C285 0.1U/ 10V/X7R RTC AD22
C284 0.1U/ 10V/X7R VCCIO[20]
C286 1U/6.3V/X5R 1.998A
L30 VCCSUSHDA VCCME[13] AA34 +1.05V_PCH
+ C85
220U/ C84 R61
6mA VCCME[14] Y34
+3.3V_SUS 1 2 0 HDA VCCME[15] Y35
3528 1U/6.3V/X5R AA35
C52 1U/6.3V/X5R VCCME[16]
D D
IbexPeak-M_Rev1_0

PROJECT : UM8 UMA
www.vinafix.vn
1A
PCH 5/5 (POWER)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
4 M_A_A[0..15]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
JDIM3A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ[0..63] 4 +1.5V_SUS
JDIM3B
12
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4 75 44
M_A_A5 A4 DQ4 M_A_DQ5 VDD1 VSS16
91 A5 DQ5 6 76 VDD2 VSS17 48
M_A_A6 90 16 M_A_DQ6 81 49
A 86 A7 DQ7 18 82 VDD4 VSS19 54 A
M_A_A8 89 21 M_A_DQ8 87 55
A8 DQ8 VDD5 VSS20
SO-DIMMA SPD Address is 0XA0 M_A_A9 85 A9 DQ9 23 M_A_DQ9 88 VDD6 VSS21 60
SO-DIMMA TS Address is 0X30 M_A_A10 107 A10/AP DQ10 33 M_A_DQ10 93 VDD7 VSS22 61
M_A_A11 84 35 M_A_DQ11 94 65
83 A12/BC# DQ12 22 99 VDD9 VSS24 66
M_A_A13 119 24 M_A_DQ13 100 71
80 A14 DQ14 34 105 VDD11 VSS26 72
M_A_A15 78 A15 DQ15 36 M_A_DQ15 The EVENT# pin is reserved for use 106 VDD12 VSS27 127
PC2100 DDR3 SDRAM SO-DIMM

DQ16 39 M_A_DQ16 to flag critical module temperature. 111 VDD13 VSS28 128

109 41 M_A_DQ17 A resistor may be connected from 112 133
4 M_A_BS#0 BA0 DQ17 VDD14 VSS29
108 51 M_A_DQ18 117 134
4 M_A_BS#1 BA1 DQ18 M_A_DQ19 EVENT# bus line to Vddspd on the VDD15 VSS30
4 M_A_BS#2 79 53 118 138
114
BA2 DQ19
40 M_A_DQ20 system planer to act as a pullup. 123
VDD16 VSS31
139
4 M_A_CS#0 S0# DQ20 VDD17 VSS32
4 M_A_CS#1 121 42 M_A_DQ21 (DDR3 DS REV0.5) 124 144
S1# DQ21 M_A_DQ22 VDD18 VSS33
4 M_A_CLKP0 101 CK0 DQ22 50 VSS34 145
103 52 M_A_DQ23 +3.3V_RUN 199 150
4 M_A_CLKN0 CK0# DQ23 VDDSPD VSS35
102 57 M_A_DQ24 151
4 M_A_CLKP1 CK1 DQ24 VSS36
104 59 M_A_DQ25 77 155
4 M_A_CLKN1 CK1# DQ25 NC1 VSS37
4 M_A_CKE0 73 CKE0 DQ26 67 M_A_DQ26 for S3 power reduction 122 NC2 VSS38 156
74 69 M_A_DQ27 125 161
4 M_A_CKE1 CKE1 DQ27 NCTEST VSS39
115 56 M_A_DQ28 162
4 M_A_CAS# CAS# DQ28 VSS40
110 58 M_A_DQ29 PM_EXTTS#0 198 167
4 M_A_RAS# RAS# DQ29 3 PM_EXTTS#0 EVENT# VSS41
113 68 M_A_DQ30 30 168
4 M_A_WE# WE# DQ30 3,13 DDR3_DRAMRST# RESET# VSS42
R149 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 +1.5V_SUS R143 *1K/F_4_NC 172
R152 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 VSS43
201 SA1 DQ32 129 VSS44 173
202 131 M_A_DQ33 +SMDDR_VREF_DQ0 1 178
13,31 WLAN_SMBCLK SCL DQ33 M_A_DQ34 VREF_DQ VSS45
B 13,31 WLAN_SMBDATA 200 SDA DQ34 141 +SMDDR_VREF_DIMM0 126 VREF_CA VSS46 179 B
143 M_A_DQ35 184
4 M_A_ODT0 116 ODT0
DQ35
DQ36 130 M_A_DQ36 17 VSS47
VSS48 185
120 132 M_A_DQ37 C176 2 189
4 M_A_ODT1 ODT1 DQ37 VSS1 VSS49
140 M_A_DQ38 C600 2.2U/ 6.3V/X5R 3 190
4 M_A_DM[0..7] DQ38 VSS2 VSS50
M_A_DM0 11 142 M_A_DQ39 *0.01U/16V/X7R_4_NC 8 195
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS3 VSS51
(204P)
28 DM1 DQ40 147 9 VSS4 VSS52 196
M_A_DM2 46 149 M_A_DQ41 13
M_A_DM3 DM2 DQ41 M_A_DQ42 VSS5
(204P)
63 DM3 DQ42 157 14 VSS6
M_A_DM4 136 159 M_A_DQ43 19
153 DM5 DQ44 146 20 VSS8
M_A_DM6 170 148 M_A_DQ45 25
187 DM7 DQ46 158 26 VSS10 VTT1 203 +0.75V_DDR_VTT
160 M_A_DQ47 31 204
4 M_A_DQSP[0..7] M_A_DQSP0 DQ47 M_A_DQ48 VSS11 VTT2
12 DQS0 DQ48 163 32 VSS12
M_A_DQSP1 29 165 M_A_DQ49 37
M_A_DQSP2 DQS1 DQ49 M_A_DQ50 +1.5V_SUS +VTT_DDR_REF VSS13
47 DQS2 DQ50 175 38 VSS14
M_A_DQSP3 64 177 M_A_DQ51 43
GND
GND
M_A_DQSP4 DQS3 DQ51 M_A_DQ52 VSS15
137 DQS4 DQ52 164
M_A_DQSP5 154 166 M_A_DQ53
M_A_DQSP6 DQS5 DQ53 M_A_DQ54 R140 R142 +SMDDR_VREF_DIMM0 DDR3-DIMM0
171 174
205
206
M_A_DQSP7 DQS6 DQ54 M_A_DQ55 1K/F
4 M_A_DQSN[0..7] 188 DQS7 DQ55 176 *0_NC
M_A_DQSN0 10 181 M_A_DQ56
M_A_DQSN1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60
DQS#4 DQ60 M2 VREF
1
C M_A_DQSN5 152 182 M_A_DQ61 R141 C
M_A_DQSN6 DQS#5 DQ61 M_A_DQ62 1K/F C160
169 DQS#6 DQ62 192
M_A_DQSN7 186 194 M_A_DQ63 0.1U/16V_4/Y5V
2
DQS#7 DQ63
16 Remove M2 VREF Function
DDR3-DIMM0
Intel Design Guide1.5 had remove M2
Place these Caps near So-Dimm0. VREF (I2C programble VREF)
Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%
+1.5V_SUS
+0.75V_DDR_VTT M3 => support for Clarksfield processor
C179 10U/ 6.3V_6/X5R
C178 10U/ 6.3V_6/X5R C172 1U/6.3V/X5R
C167 10U/ 6.3V_6/X5R C184 1U/6.3V/X7R
C170 10U/ 6.3V_6/X5R C174 1U/6.3V/X5R
C180 10U/ 6.3V_6/X5R C346 1U/6.3V/X5R
C177 10U/ 6.3V_6/X5R C345 10U/6.3V_8/X5R
C181 0.1U/ 10V/X7R C185 10U/6.3V_8/X5R
C171 0.1U/ 10V/X7R C175 10U/6.3V_8/X5R +1.5V_SUS +VTT_DDR_REF M1 VREF M3 VREF
C168 0.1U/ 10V/X7R
C182 0.1U/ 10V/X7R
C169 0.1U/ 10V/X7R
R150 R151
C166 *330U_NC 1K/F
+
*0_NC
+SMDDR_VREF_DQ0 +SMDDR_VREF_DQ0 +M_VREF_DQ_DIMM0
D D
7343 2.5
R144 0 R145 *0_NC
+SMDDR_VREF_DIMM0
1
C158 0.1U/ 10V/X7R R147
+3.3V_RUN
C162
C164
2.2U/ 6.3V/X5R
2.2U/ 6.3V/X5R
1K/F C173 Quanta Computer Inc.
0.1U/16V_4/Y5V
2
C159 0.1U/ 10V/X7R

C189 2.2U/ 6.3V/X5R
16 PROJECT : UM8 UMA
C187 0.1U/ 10V/X7R Size Document Number Rev
1A
DDR3 DIMM-0
1 2 3 4 5 6 7 8
www.vinafix.vn
1 2 3 4 5 6 7 8
4 M_B_A[0..15]
M_B_A0
M_B_A1
M_B_A2
98
97
JDIM4A
A0
A1
DQ0
DQ1
5
7
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ[0..63] 4
+1.5V_SUS
75
JDIM4B
VDD1 VSS16 44
13
96 A2 DQ2 15 76 VDD2 VSS17 48
M_B_A3 95 17 M_B_DQ3 81 49
M_B_A4 A3 DQ3 M_B_DQ4 VDD3 VSS18
92 A4 DQ4 4 82 VDD4 VSS19 54
M_B_A5 91 6 M_B_DQ5 87 55
90 A6 DQ6 16 88 VDD6 VSS21 60
A M_B_A7 86 18 M_B_DQ7 93 61 A
89 A8 DQ8 21 94 VDD8 VSS23 65
M_B_A9 85 23 M_B_DQ9 99 66
107 A10/AP DQ10 33 100 VDD10 VSS25 71
M_B_A11 84 35 M_B_DQ11 105 72
83 A12/BC# DQ12 22 106 VDD12 127

M_B_A13 M_B_DQ13 VSS27
119 A13 DQ13 24 111 VDD13 VSS28 128
M_B_A14 80 34 M_B_DQ14 112 133
78 A15 DQ15 36 117 VDD15 VSS30 134
39 M_B_DQ16 118 138
DQ16 VDD16 VSS31

109 41 M_B_DQ17 123 139
4M_B_BS#0 BA0 DQ17 VDD17 VSS32
108 51 M_B_DQ18 124 144
4M_B_BS#1 BA1 DQ18 VDD18 VSS33
79 53 M_B_DQ19 145
4M_B_BS#2 BA2 DQ19 VSS34
114 40 M_B_DQ20 199 150
4M_B_CS#0 S0# DQ20 +3.3V_RUN VDDSPD VSS35
121 42 M_B_DQ21 151
4M_B_CS#1 S1# DQ21 VSS36
101 50 M_B_DQ22 77 155
4M_B_CLKP0 CK0 DQ22 NC1 VSS37
103 52 M_B_DQ23 122 156
4M_B_CLKN0 CK0# DQ23 NC2 VSS38
102 57 M_B_DQ24 125 161
4M_B_CLKP1 CK1 DQ24 NCTEST VSS39
104 59 M_B_DQ25 162
4M_B_CLKN1 CK1# DQ25 VSS40
73 67 M_B_DQ26 198 167
4M_B_CKE0 CKE0 DQ26 3 PM_EXTTS#1 EVENT# VSS41
74 69 M_B_DQ27 30 168
4M_B_CKE1 CKE1 DQ27 3,12 DDR3_DRAMRST# RESET# VSS42
115 56 M_B_DQ28 172
4M_B_CAS# CAS# DQ28 VSS43
110 58 M_B_DQ29 173
4M_B_RAS# RAS# DQ29 VSS44
113 68 M_B_DQ30 +SMDDR_VREF_DQ1 1 178
4M_B_WE# WE# DQ30 VREF_DQ VSS45
R159 10K/F_4 DIMM1_SA0
197 70 M_B_DQ31 +SMDDR_VREF_DIMM1 126 179
R160 10K/F_4 DIMM1_SA1 SA0 DQ31 M_B_DQ32 VREF_CA VSS46
201 129 184
+3.3V_RUN
12,31 WLAN_SMBCLK 202
SA1
SCL
DQ32
DQ33 131 M_B_DQ33 17 VSS47
VSS48 185
200 141 M_B_DQ34 2 189
12,31 WLAN_SMBDATA SDA DQ34 M_B_DQ35 C601 C199 VSS1 VSS49
DQ35 143 3 VSS2 VSS50 190
B 116 130 M_B_DQ36 *0.01U/16V/X7R_4_NC 2.2U/ 6.3V/X5R 8 195 B
4 M_B_ODT0 ODT0 DQ36 VSS3 VSS51
M_B_DQ37
(204P)
4 M_B_ODT1 120 ODT1 DQ37 132 9 VSS4 VSS52 196
140 M_B_DQ38 13
4 M_B_DM[0..7] DQ38 VSS5
M_B_DM0 11 142 M_B_DQ39 14
DM0 DQ39 VSS6
SO-DIMMB SPD Address is 0XA4 M_B_DM1 28 DM1 DQ40 147 M_B_DQ40 19 VSS7
SO-DIMMB TS Address is 0X34 M_B_DM2 46 149 M_B_DQ41 20
M_B_DM3 DM2 DQ41 M_B_DQ42 VSS8
63 157 25
(204P)
M_B_DM4 DM3 DQ42 M_B_DQ43 VSS9
136 DM4 DQ43 159 26 VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM5 153 146 M_B_DQ44 31 204
M_B_DM6 DM5 DQ44 M_B_DQ45 VSS11 VTT2
170 DM6 DQ45 148 32 VSS12
M_B_DM7 187 158 M_B_DQ46 37
DM7 DQ46 M_B_DQ47 VSS13
4 M_B_DQSP[0..7] DQ47 160 38 VSS14
M_B_DQSP0 12 163 M_B_DQ48 +1.5V_SUS +VTT_DDR_REF 43
GND
GND
M_B_DQSP1 29 DQS0 DQ48 M_B_DQ49 VSS15
DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ50
M_B_DQSP3 64 DQS2 DQ50 M_B_DQ51 DDR3-DIMM1
177
205
206
M_B_DQSP4 137 DQS3 DQ51 M_B_DQ52 R148 R146 +SMDDR_VREF_DIMM1
DQS4 DQ52 164
M_B_DQSP5 154 166 M_B_DQ53 1K/F *0_NC
M_B_DQSP6 171 DQS5 DQ53 M_B_DQ54
DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ55
4 M_B_DQSN[0..7] M_B_DQSN0 10 DQS7 DQ55 M_B_DQ56
DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ57
M_B_DQSN2 45 DQS#1 DQ57 M_B_DQ58
DQS#2 DQ58 191
1
M_B_DQSN3 62 193 M_B_DQ59 R158
M_B_DQSN4 135 DQS#3
DQS#4
DQ59
DQ60 180 M_B_DQ60 1K/F C191 Remove M2 VREF Function
M_B_DQSN5 152 182 M_B_DQ61 0.1U/16V_4/Y5V
Intel Design Guide1.5 had remove M2
2
M_B_DQSN6 169 DQS#5 DQ61 M_B_DQ62
DQS#6 DQ62 192 16
M_B_DQSN7 186 194 M_B_DQ63
DQS#7 DQ63
VREF (I2C programble VREF)
C C
DDR3-DIMM1
M3 => support for Clarksfield processor
Place these Caps near So-Dimm1.

Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30%
+1.5V_SUS +0.75V_DDR_VTT Wait Victor check
C211 10U/ 6.3V_6/X5R C205 1U/6.3V/X5R
C210 10U/ 6.3V_6/X5R C188 1U/6.3V/X5R for arrandal nc, for clesfied connect
C196 10U/ 6.3V_6/X5R C213 1U/6.3V/X5R
C194 10U/ 6.3V_6/X5R C203 1U/6.3V/X5R
C197 10U/ 6.3V_6/X5R C200 10U/6.3V_8/X5R
C192 10U/ 6.3V_6/X5R C206 10U/6.3V_8/X5R
C195 0.1U/ 10V/X7R C214 10U/6.3V_8/X5R +1.5V_SUS +VTT_DDR_REF M1 VREF M3 VREF
C207 0.1U/ 10V/X7R
C208 0.1U/ 10V/X7R
C193 0.1U/ 10V/X7R
C209 0.1U/ 10V/X7R R153 R154
1K/F *0_NC
C212 330U +SMDDR_VREF_DQ1 +SMDDR_VREF_DQ1 +M_VREF_DQ_DIMM1
+
D D
7343 2.5 R156 0 R157 *0_NC
+SMDDR_VREF_DIMM1
1
R155
C202 0.1U/ 10V/X7R 1K/F C198
C190 0.1U/ 10V/X7R 0.1U/16V_4/Y5V Quanta Computer Inc.
2
+3.3V_RUN C183 2.2U/ 6.3V/X5R 16

C186 2.2U/ 6.3V/X5R
C201 2.2U/ 6.3V/X5R PROJECT : UM8 UMA
C204 0.1U/ 10V/X7R Size Document Number Rev
www.vinafix.vn
1A
DDR3 DIMM-1
1 2 3 4 5 6 7 8
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
Blank
5 4 3 2 1
5 4 3 2 1
41
D +15V_ALW +3.3V_RUN +LCDVCC J6 D
Q27 +LCDVCC 40 LCD_BACKLIGHT
41
FDC655BN 40 BLT_PWM
39 39
6 38 38
2
5 4 37 37
R312 2 36 DMIC_DATA_L DMIC_CLK_L
1 36
1
330K 1 35
35
1
C311 C312 34
34
1
R302 0.1U/16V_4/Y5V 0.047U/10V_4/X7R 33 C95 C94
2
47 C314 C316 33 *33P_NC/COH *33P_NC/COH
32
2
LCDVCC_ON 0603 10U/25V_1206/X6S 10U/25V_1206/X6S 16 10 32 50 50
31
2
1206 1206 31
30
1
30
1
25 25 29
29
2
28 28
R309 C317 27 LCD_ACLK-
*100K_NC 0.01U/25V_4/X7R 27 LCD_ACLK+
26
1
26
25
2
25 +3.3V_RUN +3.3V_RUN +3.3V_RUN 25 LCD_A2-
24 24 LCD_A2- 7
23 LCD_A2+
23 LCD_A2+ 7
+3.3V_SUS 22
22
3
21 LCD_A1-
21 LCD_A1- 7
2 2 20 LCD_A1+
20 LCD_A1+ 7
1
Q24 19
19
1
Q26 2N7002W-7-F C298 C309 C598 18 LCD_A0-
LCD_A0- 7
1
R303 2N7002W-7-F 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 10U/ 6.3V_6/Y5V 18 LCD_A0+
17 LCD_A0+ 7
2
47K 17 LCD_DDCCLK
16 16 LCD_DDCCLK 7
16 16 10 15 LCD_DDCDAT
15 LCD_DDCDAT 7
Support the new imbeded 14 LCD_TST 25
2
14
13
C diagnostics. 13
12
+LCDVCC C
D25 12
11 11 +3.3V_RUN
3
1 D24 10 L29 *0_NC
7 ENVDD 10
1 9 DMIC_CLK_L 603
25 LCD_BAK 9 DMIC_CLK 31
3 EN_LCDVCC 2 Q25 8 USBP11_D-
8
DDTC124EUA-7-F 3LCD_BACKLIGHT 7 7 USBP11_D+
2 6 L28 *0_NC
25 LCDVCC_TST_EN 6
1
2 5 DMIC_DATA_L 603
7,25 PANEL_BKEN DMIC_DATA 31
1
BAT54C T/R R308 5

4 4
BAT54C T/R 10K 3
3
2 2
1
42
2
1 +GFX_PWR_SRC
50671-04041-001
42
R305 1 2*0_NC 0805
Shunt capacitors on LVDS for improving WWAN. L27
USBP11_D- 1 2
+PWR_SRC +GFX_PWR_SRC USBP11_D+ USBP11- 9
4 3 USBP11+ 9
40mil *PLW3216S900SQ2T1_NC
40mil 4
6
5 1206
2
1 1 2
1
R299 0
2
B Q23 C313 LCD_A0- C300 1 B

2 *3.3P_NC/NPO
50 LCD_A0+
3
R310 C315 FDC658AP 0.1U/Y5V LCD_A1- C302 1 2 *3.3P_NC/NPO

50 LCD_A1+ 1 2
2
100K 0.1U/Y5V 603 LCD_A2- C299 1 2 *3.3P_NC/NPO

50 LCD_A2+ R300 0
1
603 25
2
25
D23
2
7 BIA_PWM 1
R311
100K LCD_ACLK- 3 BLT_PWM
LCD_ACLK- 7
UM9-DIS-0821_2.DSN
2
25 PWM_VADJ 2
3 1
1
R289 C301 BAT54C T/R R307
2 Q28 *0_NC *3.3P_NC/NPO 10K
25,35,36,37,40 RUN_ON
1
2N7002W-7-F
1
LCD_ACLK+
LCD_ACLK+ 7
1
2
50
A A

PROJECT : UM8B DIS
1A
LCD CONN
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
CARD_3V3
D
21 R215 0 D
SD_CD# 1
CON3
RTS5138-QFN24
SD-CD
XD_D7
SD_WP 2 28 XD_CD#
SP14
SP13
SP12
SP11
SD_D1 SD-WP xD-CD XD_RDY
3 SD-DAT1 xD-R/B 29
SD_D0 4 30 XD_RE#
SD-DAT0 xD-RE 8 CLK_48M_CARD
SD_D7 5 31 XD_CE#
MMC-DATA7 xD-CE XD_CLE
24
23
22
21
20
19
7 SD-GND xD-CLE 32
SD_D6 8 33 XD_ALE U10
SD_CLK SD_CLK_R MMC-DATA6 xD-ALE XD_WE#
2 1 10 34
CLK_IN
XD_D7
SP14
SP13
SP12
SP11
R211 0 SD-CLK xD-WE XD_WP
13 SD-VCC xD-WP-IN 35
15 36 R212 RREF
6.2K 1 18 SP10
SD_D4 SD-GND xD-GND XD_D0 +3.3V_RUN USBP12_D- RREF SP10
21 MMC-DATA4 xD-D0 37 2 DM GPIO0 17
SD_D3 23 38 XD_D1 USBP12_D+ 3 16 SP9
SD_D2 SD-DATA3 xD-D1 XD_D2 DP SP9 SP8
25 SD-DAT2 xD-D2 39 4 3V3_IN SP8 15
40 XD_D3 CARD_3V3 CARD_3V3 5 14 SP7
xD-D3 XD_D4 VREG CARD_3V3 SP7 SP6
xD-D4 41 6 V18 SP6 13
XD_CD#
6 42 XD_D5
MS_BS MS-GND xD-D5 XD_D6 C269 C275
9 MS-BS xD-D6 43
SP1
SP2
SP3
SP4
SP5
MS_D1 11 44 XD_D7 4.7U/6.3V/X5R 0.1U/16V_4/Y5V C267
MS_D0 MS-DATA1 xD-D7 6.3 1U/6.3V/X5R
12 MS-DATA0 xD-VCC 45 25 GND
MS_D2 14 46 X5R
7
8
9
10
11
12
MS_INS# MS-DATA2 xD-GND 603 RTS5138
16 MS-INS
SD_D5 17
MS_D3 MMC-DATA5
XD_CD#
18 MS-DATA3
SD_CMD 19 26
MS-CMD SD-WP COM/SDIO GND
SP1
SP2
SP3
SP4
SP5
MS_CLK 2 1MS_CLK_R 20 27 C268
R196 0 MS-CLK SD-CD COM/SDIO GND
C 22 MS-VCC 0.1U/16V_4/Y5V C
C278 *10P/50V_4_NC/COG 24 MS-GND
C259 IC Bottom Ground
C277 CR-8IN1_TTN 0.1U/16V_4/Y5V
C281 16
*27P_NC/NPO
*27P_NC/NPO 50
50 NPO
NPO
C279 C280
0.1U/16V_4/Y5V 0.1U/16V_4/Y5V
16 16 57
SP1 XD_RDY SD_WP MS_CLK L24
new CONN SP2

SP3
SP4
XD_RE#
XD_CE#
XD_CLE
SD_D1
SD_D0
MS_INS#
MS_D7
USBP12_D+
USBP12_D-
1
4
2
3
USBP12+ 9
USBP12- 9
SP5 XD_ALE SD_D7 MS_D3 PLW3216S900SQ2T1
SP6 XD_WE# SD_CD# 1206
SP7 XD_WP SD_D6 MS_D6
SP8 XD_D0 SD_CLK MS_D2 1 2
SP9 XD_D1 SD_D5 MS_D0 R209 0
SP10 XD_D2 SD_CMD
SP11 XD_D3 SD_D4 MS_D4 1 2
SP12 XD_D4 SD_D3 MS_D1 R210 0
SP13 XD_D5 SD_D2 MS_D5
SP14 XD_D6 MS_BS
B B
Share Pin
A A

PROJECT : UM8B DIS
www.vinafix.vn
1A
Card Reader(RST5138)
5 4 3 2 1
5 4 3 2 1
UM3B_UMA_20090721_1400_Ray.pdf
EXC24CG900U L22
HDMI_TX2+_L 4 3 HDMI_TX2+ HDMI_TX0-_L 4 3 HDMI_TX0-
HDMI_TX2-_L 1 2 HDMI_TX2- HDMI_TX0+_L 1 2 HDMI_TX0+
L21 EXC24CG900U HDMI CN3

DFHS19FR015
Female
R204 *0_NC R205 *0_NC
1 2 1 2
TYPE A
R203 *0_NC R206 *0_NC HDMI_TX2+ 1 D2+
D D
1 2 1 2 2 GND
+5V_HDMI HDMI_TX2- 3 D2-
HDMI_TX1+ 4 D1+
UM7 POP O ohm and DE-POP L 5 GND

HDMI_TX1- 6
UM9 POP L and DE-POP 0 ohm HDMI_TX0+ 7 D0+
D1-
0918 check 8 GND
1
HDMI_TX0- 9 D0-
L20 L19 HDMI_CLK+ 10 CK+
HDMI_TX1+_L 4 3 HDMI_TX1+ HDMI_CLK+_L 4 3 HDMI_CLK+ R191 R190 11 GND
HDMI_TX1-_L 1 2 HDMI_TX1- HDMI_CLK-_L 1 2 HDMI_CLK- 2.2K/J_4 2.2K/J_4 HDMI_CLK- 12 CK-
13 CEC
2
EXC24CG900U EXC24CG900U 14 RSVD
HDMI_SCL_S 15
R202 *0_NC R200 *0_NC 18 HDMI_SDA_S 16
SCL
SDA
1 2 1 2 17 GND
+5V_HDMI +5V_HDMI 18
R353 +5V
R201 *0_NC R199 *0_NC HDMI_DET_R 19 HPD
1 2 1 2 +5V_RUN +5V_HDMI_R
C262 GND DFHS19FR015

0 0.1U/10V_4/X7R
10 20
CC3 21
*0.1U_NC/X5R
C C
+3.3V_RUN
SCLZ/SDAZ Low-level input/output Voltage
CFG01:CFG00=0:0 VIL:<0.4V VOL:0.6V (Default)
1
CGF01:CGF00=0:1 VIL:<0.36V VOL:0.55V

L4 9 CGF01:CGF00=1:0 VIL:<0.44V VOL:0.65V
BLM18PG181SN1 CGF01:CGF00=1:1 VIL:<0.36V VOL:0.6V
U13
2
+VCC_HDMI 2 VCC
11 VCC EQUALIZATION SETTING
15 VCC PC1:PC0=0:0 8dB
C14 C17 C20 C19 C15 C16 C13 C18 21
0.1U/X5R 0.1U/X5R 0.1U/X5R 0.1U/X5R 0.1U/X5R 0.1U/X5R 0.1U/X5R 0.1U/X5R VCC PC1:PC0=0:1 4dB Recommanded
26 VCC
33 VCC
PC1:PC0=1:0 12dB
40 VCC POWER PC1:PC0=1:1 0dB
46 VCC
38 23 HDMI_CLK-_L
7 INT_HDMI_TXCN_C IN_D1- OUT_D1-
39 22 HDMI_CLK+_L
7 INT_HDMI_TXCP_C IN_D1+ OUT_D1+
41 20 HDMI_TX1-_L HDMI_PWR_CTRL
7 INT_HDMI_TXDN1_C IN_D2- OUT_D2-
42 19 HDMI_TX1+_L
7 INT_HDMI_TXDP1_C IN_D2+ OUT_D2+ 0 is Enable
44 17 HDMI_TX2-_L
7 INT_HDMI_TXDN2_C IN_D3- OUT_D3- HDMI_TX2+_L
1 is Disable
7 INT_HDMI_TXDP2_C 45 IN_D3+ OUT_D3+ 16
B B
47 14 HDMI_TX0+_L
7 INT_HDMI_TXDP0_C IN_D4- OUT_D4-
48 13 HDMI_TX0-_L
7 INT_HDMI_TXDN0_C IN_D4+ OUT_D4+
9 28 HDMI_SCL_S
7 HDMI_SCL SCL SCL_SINK
8 29 HDMI_SDA_S R220 1 2 *0/J_4_NC DDC_EN
7 HDMI_SDA SDA SDA_SINK R236 *0/J_4_NC PC0
1 2
7 30 HDMI_DET_L R216 1K/J_4 HDMI_DET_R R232 1 2 *0_NC PC1
7 HDMI_DET HPD HPD_SINK R235 1 2 0/J_4 CFG00
R250 1 2 *0/J_4_NC CFG01
+3.3V_RUN R217 4.7K/J_4 DDC_EN 32
+3.3V_RUN DDC_EN
R237 *4.7K/J_4_NC PC0 3 1
R233 4.7K/J_4 PC1 PC0 GND
4 PC1 GND 5
R234 *4.7K/J_4_NC CFG00 34 12
R213 R253 *4.7K/J_4_NC CFG01 DDCBUF_EN GND
35 CFG GND 18
100K/J_4 GND 24
27 R192 300 C263 0.1U/X5R
R214 1 GND HDMI_CLK+ HDMI_CLK_C HDMI_CLK-
2 0 10 RT_EN# GND 31
25 OE# GND 36
R218 4.02K/F 6 37 R195 300 C266 0.1U/X5R
REXT GND HDMI_TX0+ HDMI_TX0_C HDMI_TX0-
GND GND 43
CONTROL EPAD 49
3
R193 300 C264 0.1U/X5R

2HDMI_DET 10 HDMI_TX1+ HDMI_TX1_C HDMI_TX1-
Q6
PI3VDP411LSZDE R194 300 C265 0.1U/X5R
1
2N7002W-7-F HDMI_TX2+ HDMI_TX2_C HDMI_TX2-
A
PIM: PI3VDP411LSZDE QPN: ALP411LS000 Reserve for EMI A
TI: SN75DP139RGZR QPN: AL000139000

PROJECT : UM8 UMA
www.vinafix.vn
1A
HDMI
5 4 3 2 1
5 4 3 2 1
U8 +RTC_CELL
28 KSO[0..16]
UM3 3
R183
1
0
2 +3.3V_ALW
28 KSI[0..7]
ITE8502E VBAT1
VCC 11 +3.3V_RUN
SMBDAT0 4 3 RP9
LQFP-128L
2
T37 PAD 57 26 +3.3V_ALW SMBCLK0 2 1 2.2KX2
KSO17/GPC5 VSTBY1
KSO16 56 KSO16/GPC3 VSTBY2 50 C238 UM7 POP 2.2k
KSO15 55 92 0.1U/16V_4/Y5V SMBDAT1 4 3 RP10
UM9 POP 10k
1
KSO14 KSO15 VSTBY3 SMBCLK1
54 114 2 1 10KX2
+3.3V_ALW KSO13 53
KSO14
KSO13
VSTBY4
VSTBY5 121 16 0918 check
KSO12 52 127
KSO12/SLCT VSTBY6
KSO11 51 KSO11/ERR UM7 DE-POP
KSO10 46
KSO9 45
KSO10/PE USB_LEFT_EN# R167 2 1 *10K_NC
UM9 POP
KSO9/BUSY 0918 check
2
2
D D
KSO8 44 66 HWPG HWPG 32,39
C239 C229 C223 C221 C220 KSO7 KSO8/ACK ADC0/GPI0
43 KSO7/PD7 ADC1/GPI1 67 PAD T29
10U/ 6.3V_6/X5R
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V KSO6 42 68 SUS_PWR_ACK 9
1
1
603 KSO5 KSO6/PD6 ADC2/GPI2 SUS_ON R175 2
41 KSO5/PD5 KEYBOARD ADC3/GPI3 69 PAD T30 Check 1 100K
6.3 16 16 16 16 KSO4 40 70 V_ID1
KSO3 39
KSO4/PD4
KSO3/PD3
ADC4/GPI4
ADC5/GPI5 71 13
PBAT_PRES# 41 IMVP_VR_ON R164 *100K_NC
KSO2 38 72
KSO2/PD2 ADC6/GPI6 IINP 33
Place these caps close to ITE8502. KSO1 37 KSO1/PD1 ADC/DAC ADC7/GPI7 73 SIO_SLP_S5#
SIO_SLP_S5# 9 +3.3V_RUN
KSO0 36 KSO0/PD0
DAC0/GPJ0 76 CRIT_TEMP_REP# 10
KSI7 65 77
KSI7 DAC1/GPJ1 SIO_EXT_WAKE# 10
KSI6 64 78 USB_LEFT_EN# SERIRQ R184 1 2 10K/F_4
KSI6 DAC2/GPJ2 USB_LEFT_EN# 31
KSI5 63 79
KSI5 DAC3/GPJ3 FAN1_DA 30
KSI4 62 80
KSI4 DAC4/GPJ4 RSMRST# 9
KSI3 61 81 1 2 SMBDAT2 4 3 RP11
KSI3/SLIN DAC5/GPJ5 PM_PWRBTN#_R 9
KSI2 60 D12 SDMK0340L-7-F SMBCLK2 2 1 10KX2
KSI1 KSI2/INT
59 KSI1/AFD
KSI0 58 KSI0/STB
PWM0/GPA0 24 BREATH_LED# 29
PWM1/GPA1 25 PAD T31
R324 1 2 0 22 28
3,9,31 PLTRST# LPCRST/WUI4/GPD2 PWM2/GPA2 FAN1_PWM 30
13 29 R327 0
9 CLK_33M_KBC LPCCLK PWM3/GPA3 PWM_VADJ 22
7,31 LFRAME# 6 LFRAME PWM4/GPA4 30 PAD T32
7,31 LAD0 10 LAD0 PWM5/GPA5 31 PAD T33
9 PWM 32 PAD T22 +3.3V_RUN
7,31 LAD1 LAD1 PWM6/GPA6
7,31 LAD2 8 LAD2 PWM7/GPA7 34 EC_BEEP 31
7,31 LAD3 7 LAD3
47 R331 ICH_AZ_CODEC_RST0#
TACH0/GPD6 FAN1_TACH 30
9 CLKRUN# 93 CLKRUN/GPH0/ID0 TACH1/GPD7 48 PANEL_BKEN 7,22 *100K_NC
C SERIRQ 5 LPC C
7 SERIRQ SERIRQ
3
D18 2 SDMK0340L-7-F
1 15 120 Q19
SERIRQ 10 SIO_EXT_SMI# ECSMI/GPD4 TMRI0/WUI2/GPC4 LID_SW# 28
D19 2 SDMK0340L-7-F
1 23 124 2 *2N7002W-7-F_NC
10 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/WUI3/GPC6 SIO_SLP_S3# 9 R326
3
SC(V1.0)P38: D16 2 SDMK0340L-7-F
1 126
10 GATEA20 GA20/GPB5
1
8.2-k pull-up to +V3.3S 17 1 2 2
22 LCD_TST 7,31 ACZ_RST#_AUDIO
1
CRB uses a 10-k pull-up to +V3.3S. LPCPD/WUI6/GPE6 C352
D17 2 SDMK0340L-7-F
1 4 108 PAD T34 *390K_NC *0.1U/10V_NC/X7R
10 RCIN#
2
WRST# KBRST/GPB6 RXD/GPB0 Q20 10
14 WRST TXD/GPB1 109 H_CPUDET# 3
LCD_BAK# 16 119 *MMST3904-7-F_NC
22 LCD_BAK PWUREQ/GPC7 GPC0 IMVP_PWRGD 3,39
IR/UART CTX0/GPB2 123 RUN_ON 22,35,36,37,40
31 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 BAT1_LED 29
ICH_AZ_CODEC_RST0# 20 95 IMVP_VR_ON
L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 IMVP_VR_ON 39
SMBCLK0 110
33,41 SMBCLK0 SMCLK0/GPB3
Charge and BAT 33,41 SMBDAT0
SMBDAT0 111 SMDAT0/GPB4 FLFRAME/GPG2/LF 100 SUS_ON
SUS_ON 34,40
FLRST/GPG0/TM 106 KB_DET# 28
SMBCLK1 115 104 PAD T35
8 SMBCLK1 SMCLK1/GPC1 FLAD3/GPG6 +3.3V_ALW
PCH 8 SMBDAT1
SMBDAT1 116 SMDAT1/GPC2 SMBUS LPC/FWH PAD T20 Madison Discrete
103
LAN, Clock 2,30 SMBCLK2
SMBCLK2 117 SMCLK2/GPF6
FLASH FLAD2/SO
FLAD1/SI 102
EC_FLASH_SPI_DO 26
EC_FLASH_SPI_DIN 26
8 23
SMBDAT2 118 101
Thermal IC 2,30 SMBDAT2 SMDAT2/GPF7 FLAD0/SCE
FLCLK 105
EC_FLASH_SPI_CS# 26
EC_FLASH_SPI_CLK 26
PAD T19
1
PAD T18
11 7 PCH_MELOCK
PCH_MELOCK 85 PS2CLK0/GPF0 PAD T21 R161 R179 R168 R174 R172 R170
86 82 ECPWROK 10K *10K_NC *10K_NC 10K *10K_NC 10K
T15 PAD PS2DAT0/GPF1 EGAD/GPE1 ECPWROK 9,30
EGPC EGCS/GPE2 83 ALW_ON 29
41 PS_ID 87 84
2
PS2CLK1/GPF2 EGCLK/GPE3 USB_RIGHT_EN#
B T17 PAD 88 PS2DAT1/GPF3 PS/2 B
BID1
89 LCD_SIZE_ID
28 CLK_TP_SIO PS2CLK2/GPF4 BID2 BID2
28 DAT_TP_SIO 90 PS2DAT2/GPF5 GPH3/ID3 96 BID2 26
97 USB_RIGHT_EN# LCD_SIZE_ID2
GPH4/ID4 USB_RIGHT_EN# 26,27
GPIO 98 BID1 V_ID1
+3.3V_ALW GPH5/ID5 BID1 26
99 LCD_SIZE_ID
GPH6/ID6 LCD_SIZE_ID 26
ITE8502_XTAL1 128 107 LCD_SIZE_ID2
CK32K GPG1/ID7
2
2
ITE8502_XTAL2 2 R325 *100K_NC +3.3V_ALW

CK32KE R166 R178 R165 R173 R171 R169
R328 ITE8502IX_JX 12 18 PAD T36 *10K_NC 10K 10K *10K_NC 10K *10K_NC
100K VCORE RI1/WUI0/GPD0
1 21 2 1 ACAV_IN 29,33
1
WRST# VSS1 RI2/WUI1/GPD1
27 35 SDMK0340L-7-F D20
BAT2_LED 29
1 1
VSS3 WUI5/GPE5
49 VSS4
C240 91 112
VSS5 RING/PWRFAIL/LPCRST/GPB7 AC_PRESENT 9
1U/ 10V/Y5V 113 Park UMA
603 +3.3V_ALW VSS6
122 125 SYS_PWR_SW# 29
2
10 L17 BLM11A05S VSS7 PWRSW/GPE4

74 AVCC GINT/GPD5 33 LCDVCC_TST_EN 22 VGA_TYPE VGA_IDENTIFY
603 75 AVSS
2
C217
0.1U/16V_4/Y5V ITE8502E
32KHz Clock. L18 lqfp128-16x16-4 BID1 USB_RIGHT_EN# UM9(UMA) UM9C (Dis)
1
16
ITE8502_XTAL2 603
BLM11A05S 0 0 SSI (X00) SSI (X00)
LCD_SIZE_ID (99) LCD_SIZE_ID2 (107) 0 1 PT (X01) PT (X01)
13" 0 0 1 0 ST (X02) ST (X02)
14" 1 0 1 1 QT (A00) QT (A00)
A CLK_33M_KBC ITE8502IX_JX 17" 0 1 0 0 (A01) (A01) A
W3
4 1ITE8502_XTAL1
R323
2
3 2 10 C348
0.1U/16V_4/Y5V
C349 32.768KHZ C351
1
18P/50V_4/COG 18P/50V_4/COG 16
1
50 50
C350
2.2P/NPO PROJECT : UM8 UMA
2
www.vinafix.vn
50 1A
SIO ITE8502
5 4 3 2 1
5 4 3 2 1
UM3
D
For EC 8Mbit (1M Byte) RTC BATTERY D
+3.3V_ALW +3.3V_ALW
2nd source:AKE3GZN0N00 +RTC_CELL +3.3V_ALW
1
R181
1
3.3K
R186
U9 3.3K 1 2
2
1 8 D7
25 EC_FLASH_SPI_CS# CE# VDD
R187 1 2 15 EC_FLASH_SPI_CLK_R 6 SDMK0340L-7-F
25 EC_FLASH_SPI_CLK
2
SCK
1
R182 1 2 15 EC_FLASH_SPI_DIN_R 5 C22
25 EC_FLASH_SPI_DIN SI
R180 33/J_4
EC_FLASH_SPI_DO_R 2 7 2.2U/ 6.3V/X5R
25 EC_FLASH_SPI_DO SO HOLD# 603 Check P/N & Footprint
2
2
C241 3 6.3
*22P/50V_4_NC/NPOWP# VSS 4 C242
MX25L8005M2C-15G 0.1U/16V_4/Y5V 46
1
50 RTCD1 RTCBT1
16 1 2 +RTC_1 1 2 +RTC 1 2
RTCR1 1K/F
SDMK0340L-7-F BATT_CONN
2
C27
1U/ 10V/Y5V
603
1
MACRONIX: MX25L3205DM2I-12G QPN: AKE39FP0Z00 10
WINBOND: W25X32VSSIG QPN: AKE39ZP0N00 需加COIN BATTERY 料號IN BOM

C C
need modify the location of this portions
For PCH
32Mbit (4M Byte)
MACRONIX: MX25L8005M2C-15G QPN: AKE5GFK0Z09
WINBOND: W25X80AVSSIG QPN: AKE39ZP0N00
+3.3V_RUN +3.3V_RUN
R10
3.3K
B R15 B
U4 3.3K
SPI_CS0# R4 15 SPI_CS0#_R 1 8
7 SPI_CS0# CE# VDD
SPI_CLK R16 15 SPI_CLK_R 6
7 SPI_CLK SCK
SPI_SI R18 15 SPI_SI_R 5
7 SPI_SI SI
SPI_SO R7 15 SPI_SO_R 2 7
7 SPI_SO SO HOLD#
C10
close to PCH 3 WP#
*22P/50V_4_NC/NPO VSS 4 C9
MX25L3205DM2I-12G 0.1U/ 10V/X7R
50
20
2
C363 10
*100P/NPO_NC
1
R5 *0_NC
1 2 BID2 25
R17 *0_NC
1 2 USB_RIGHT_EN# 25,27
R19 *0_NC
1 2 LCD_SIZE_ID 25
R6 *0_NC
1 2 BID1 25
Close to U4
For HSPI Function
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
FLASH/RTC
5 4 3 2 1
1 2 3 4 5 6 7 8
eSATA and USB To DB

USB and eSATA Conn.
A External USB PORT hookup reference. Your design may A
need more or less external ports and may be mapped

differently
8/20 Wait Victor check
CN4
40 DLW21HN900SQ2L
USBP2_D+ 0.01U/25V/X7R C271 SATA_RXP4_C
11 GND SHIELD 12
9 USBP2+ 1 2 7 SATA_RXP4 10 B+ SHIELD 13
4 3 USBP2_D- 0.01U/25V/X7R C272 SATA_RXN4_C 9
9 USBP2- 7 SATA_RXN4 B-
8 GND GND1 4
L23 1206 0.01U/25V/X7R C273 SATA_TXN4_C 7 3 USBP2_D+
7 SATA_TXN4 A- D+1
0.01U/25V/X7R C274 SATA_TXP4_C 6 2 USBP2_D-
57 7 SATA_TXP4
5
A+
GND
D-1
VBUS1 1 +USB_LSIDE_PWR
1
1 2
R207 *0_NC C3
0.1U/X7R
2
eSATA+SINGLE USB
1 2
R208 *0_NC 10
+5V_SUS
Platforms should put in PADS for the USB chokes if they
2
have the room. Chokes should be NOPOP. R189
Place one 150uF cap by each
B 0 USB connector. B
Each channel is 1A
1
U11
2 1
42 IN GND
41
3 7 +USB_LSIDE_PWR
25,26 USB_RIGHT_EN# EN1# OUT1
OC1# 8 USB_OC1# 9
Place ESD diodes as close as USB connector.
1
4 6 +USB_LSIDE_PWR
C260 C261 EN2# OUT2
OC2# 5
ESD3 *10U_NC/X5R 0.1U/X7R
2
USBP2_D- 1 6 805
1 6 +USB_LSIDE_PWR 10 10 TPS2062AD + C4
2 2 5 5
USBP2_D+ 3 4 150U/6.3V
3 4
*SRV05-4.TCT_NC 6.3V_3528
C C
+3.3V_RUN
C6 0.1U/16V_4/Y5V Support Dell BT365 (Little Stone) module

2 1
Bluetooth BTB Conn
47 J4 USBP8_D-
L3
1 2
31 COEX1_BT_ACTIVE_MINI
COEX1_BT_ACTIVE_MINI 2 COEX1_BT_ACTIVE BT_DET# 1 BT_DET# 9
47 USBP8_D+ 4 3
USBP8- 9
USBP8+ 9
4 3 COEX2_WLAN_ACTIVE *PLW3216S900SQ2T1_NC
3.3V COEX2_WLAN_ACTIVE COEX2_WLAN_ACTIVE 31
1206
USBP8_D+ 6 5
USB+ NC
1 2
USBP8_D- 8 7 R12 0
USB- HW_RADIO_DIS# BT_RADIO_DIS# 10
10 GND BT_ACTIVE 9 1 2
1
R11 0
C5 12 11
GND NC
2
D D
1
0.1U/16V_4/Y5V 14 13
GND NC
2
C11
R20 C12 100P/NPO
2
YEA-BTB-016-514-K 10K 33P

2

1
PROJECT : UM8 UMA

www.vinafix.vn
1A
eSATA & Right USB
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
SATA Connector.
+5V_RUN
CON4 +3.3V_SUS +3.3V_SUS
24
GND
Check PIn Touch Pad
2
12V 22
1
3
12V 21 Definition RP8
R322
100K
12V 20
GND 19
18 4.7KX2
1
RSVD
A
GND 17 A
16 +5V_RUN
2
4
5V JP4
5V 15 25 LID_SW#
5V 14 1
13 L16 1 2 BLM18AG601SN1D TP_CLK
GND 25 CLK_TP_SIO 603 2
GND 12 3
11 L15 1 2 BLM18AG601SN1D TP_DATA
GND 25 DAT_TP_SIO 603 4
3.3V 10 +3.3V_RUN 5
3.3V 9 +5V_RUN 6
3.3V 8
88513-064N
1
C154 C153
7 10P/50V/COG 10P/50V/COG C155 C156 C163 C165 C343 C344
GND SATA_RXP0_C C235 0.01U/25V_4/X7R 10P/50V/COG
10P/50V/COG 0.1U/16V_4/Y5V
0.047U/10V_4/X7R 0.1U/16V_4/Y5V 0.047U/10V_4/X7R
6 SATA_RXP0 7
2
TXP SATA_RXN0_C C234 0.01U/25V_4/X7R 50 50
TXN 5 SATA_RXN0 7
4 50 50 16 10 16 10
GND SATA_TXN0_C C233 0.01U/25V_4/X7R
RXN 3 SATA_TXN0 7
2 SATA_TXP0_C C232 0.01U/25V_4/X7R
RXP SATA_TXP0 7
GND 1
DG: Place TX cap close to connector
GND 23
SATA HDD
B B
+3.3V_RUN Place caps close to connector. KEYBOARD CONNECTOR
Top side LTS_ABA-FPC-014-030-K
C226 C227 C228
GND1
*10U/10V/0805_NC/X5R
*1U_NC/X5R *1000P_NC/X7R 1
2
25 KSO[0..16] 3
KSO10 4
25 KSI[0..7] 5
Place caps close to connector. KSO11
6
+5V_RUN KSO9
KSO14 7
KSO13 8
KSO15 9
C224 C231 C237 C225 C230 C236 KSO16 10
KSO12 11
10U/6.3V_8/Y5V 1U/ 10V/Y5V 0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
1000P/50V_4/X7R KSO0 12
KSO2 13
KSO1 14
KSO3 15
KSO8 16
KSO6 17
C356 100P/NPOKSI7 KSO7 18
50 KSO4 19
KSO5 20
KSI0 21
ODD Connector KSI3 22
C CN5 KSI1 23 C
+3.3V_ALW 24
DG: Place TX cap close to connector KSI5
25
KSI2
R334 KSI4 26
GND1 1 27
2 SATA_TXP1_C C249 0.01U/25V_4/X7R 10K/F_4 KSI6
RXP SATA_TXP1 7 28
GND2
3 SATA_TXN1_C C248 0.01U/25V_4/X7R KSI7
RXN SATA_TXN1 7 29
4 CP4 100PX4 CP3 100PX4 25 KB_DET# KB_DET#
GND2 SATA_RXN1_C C247 0.01U/25V_4/X7R KSO13 KSO10 30
TXN 5 SATA_RXN1 7 8 7 8 7
6 SATA_RXP1_C C246 0.01U/25V_4/X7R 6 5 KSO15 6 5 KSO11
TXP SATA_RXP1 7
2
7 4 3 KSO16 4 3 KSO9 C364 JKB3
GND3 KSO12 KSO14
2 1 2 1
100P/NPO
1
8 1206 50 1206 50
DP
5V_0 9
10
5V_1
MD 11
+5V_RUN
CP8 100PX4
KSI5
CP7 100PX4
KSO5
56
GND4 12 8 7 8 7
13 6 5 KSI2 6 5 KSI0
GND5 KSI4 KSI3
4 3 4 3
2 1 KSI6 2 1 KSI1
1206 50 1206 50
AOP_C18550-11305-L
CP6 100PX4 CP5 100PX4

Place caps close to connector. 8 7 KSO8 8 7 KSO0
+5V_RUN 6 5 KSO6 6 5 KSO2
4 3 KSO7 4 3 KSO1
D D
2 1 KSO4 2 1 KSO3
C244 C250 C251 C243 C245 1206 50 1206 50
*10U/10V/0805_NC/X5R
1U/ 10V/Y5V 0.1U/16V_4/Y5V
0.1U/16V_4/Y5V
1000P/50V_4/X7R
100P CAPS CLOSE TO JKB1 Quanta Computer Inc.
PROJECT : UM8 UMA
1A
SATA (HDD&ODD) & TP & KB
1 2 3
www.vinafix.vn 4 5 6
Date: Wednesday, November 25, 2009
7
Sheet 28
8
of 46
A B C D E
Power
+3.3V_SUS +5V_SUS +5V_SUS
High output current driver 24mA

R3
100K
5
1 3 2 4 BREATH_PWRLED
25 BREATH_LED#
4 4
Q3 U3
2N7002W-7-F TC7SZ04FU(T5L,F,T)
3
check outpout current for 3 LED
+3.3V_ALW
15
31 BREATH_PWRLED
BREATH_PWRLED R8 330 2
D3
1 3VALW ON POWER LOGIC
HT-S91BP5
2
If= 5mA WHITE +5V_ALW +5V_ALW
R163
Vf= 3.2V 100K
1
2
2
R176 R162 R177
D13
+5V_RUN 100K 100K 100K
SYS_PWR_SW# 25
1
HDD activity LED. BAS316
1
+3.3V_RUN R21
330 C215
0.1U/16V_4/Y5V
15
2
POWER_SW_IN0# 16
31 POWER_SW_IN0# 3.3V_ALW_ON 34
1
2
3 3
R9
100K
D5
HT-S91BP5 WHITE D14
3
2
2 Q18
2N7002W-7-F
3 1
1
BAS316
1
2 Q5 C216
2N7002W-7-F *0.1U/10V_NC/X7R
2
3
10
1
2 Q4
7 SATA_LED#
2N7002W-7-F
1
3
2 Q16
25 ALW_ON
2N7002W-7-F
1
3
2 Q17
25,33 ACAV_IN
2N7002W-7-F
1
+3.3V_ALW
+5V_ALW
Battery
ORANGE(1:3) WHITE(2:4)
2 2
R22 R24
330 220
If= 5mA If= 5mA BREATH_LED# C347 *100P_NC/X7R
50
Vf= 2.4V 14 Vf= 3.2V
3
POWER_SW_IN0# C218 *100P_NC/X7R

50
D6
HT-261UD5/BP5
4
Q9 Q7
3
2N7002W-7-F 2N7002W-7-F
25 BAT2_LED 2 2 BAT1_LED 25
1
1
1
R47 R35
10K 10K
2
UM3_DIS_20090824_1000_SSI_STEPHEN.DSN
1 1

PROJECT : UM8B DIS
www.vinafix.vn
1A
SWITCH, LED
A B C D E
1 2 3 4 5 6 7 8
FAN CONTROL
D21
*SSM34PT_NC
1 2 +5V_RUN +5V_RUN
2
A J3 A
+5V_FAN 1
1 2
1
2 *DA204U_NC
C8
1U/ 10V/X5R
25 FAN1_TACH 3 3 D4
U12
C276 C270 FOX_HS8803F-S
3
10U/25V_1206/X6S 0.1U/16V_4/Y5V 1 8
1206 VEN GND
2 VIN GND 7
25 16 Check Pin definition R13
+5V_FAN 3 VO GND 6
FAN1_PWM 4 5
25 FAN1_PWM SET GND
180K
G990P11U
2
+5V_RUN R197 4.7K/J_4
C7 R14
1000P/50V_4/X7R *0_NC
1
25 FAN1_DA
B B
OTP 85 degree C
Place under CPU 10/20mils ADM1032-1 => Hex 4C (1001 100) AL001032001 +3.3V_RUN R130 2 1 10K THERM_ALERT#
REM_DIODE1_P
+3.3V_RUN
ADM1032-2 => Hex 4D (1001 101) AL001032002
3
U7
1
Q29 2 C334 C143 1 8 SMBCLK2

MMST3904-7-F *100P_NC/NPO 2200P/50V/X7R VDD SCL SMBCLK2 2,25
2 7 SMBDAT2
1
DP SDA SMBDAT2 2,25

50
REM_DIODE1_N 50 3 6 THERM_ALERT#
DN ALERT#
4 SYS_SHDN# GND 5
SYS_SHD#
1.Place C160 close to EMC1422 EMC1422-1-ACZL-TR
C 2.Place C518 to be close to Q51 4.7K 6.8K 10K 15K 22K 33K C
1
Total capacitance between D+/D- is 2200pF(max)

if use 2200pF for C160, then C518 should be dummy
C142 ALERT#
0.1U/ 10V/X7R
2
10
+3.3V_RUN
4.7K 77'C 83'C 89'C 95'C 101'C 107'C
THERM_STP# 34
2
6.8K 78'C 84'C 90'C 96'C 102'C 108'C

R121
Q15
6.8K/F
2N7002W-7-F
10K 79'C 85'C 91'C 97'C 103'C 109'C
1
1 3
15K 80'C 86'C 92'C 98'C 104'C 110'C

2
Follow UM3 to change Q11

1 2 22K 81'C 87'C 93'C 99'C 105'C 111'C
9,25 ECPWROK
R133 0 PIN2 gate control to avoid
abnormal shutdown?
UM7 change this pin to H_VTTPWRGD 33K 82'C 88'C 94'C 100'C 106'C 112'C
D D

PROJECT : UM8 UMA
www.vinafix.vn
1A
FAN & THERMAL
1 2 3 4 5 6 7 8
5 4 3 2 1
+3.3V_RUN +5V_SUS +5V_SUS
AUD_SPK_R+
J8 Check P/N and footprint
1 1 2 2
AUD_SPK_R- 3 4
AUD_SPK_L+ 3 4
5 5 6 6
1
1
AUD_SPK_L- 7 8 DJ-CONN
C252 C257 7 8 + C255 C258
+1.5V_RUN 9 9 10 10 +1.5V_RUN 8 PCIE_RXN6_LAN 30
0.1U/16V_4/Y5V 0.1U/16V_4/Y5V +3.3V_RUN 11 12 +3.3V_RUN *100U/6.3V_7343_NC 0.1U/16V_4/Y5V 8 PCIE_RXP6_LAN
2
2
11 12 29
13 13 14 14 28
16 16 15 16 16 8 PCIE_TXN6_LAN
15 16 27
D +5V_RUN 17 17 18 18 +5V_RUN 8 PCIE_TXP6_LAN 26 D
R332 *0_NC 603 19 20
22 22 DMIC_DATA
R329 *0_NC 603
21
19
21
20
22 22 8 CLK_PCIE_LANN
25
24
22 DMIC_CLK 23 23 24 24 +5V_SUS 8 CLK_PCIE_LANP 23
+1.5V_RUN +5V_RUN 25 26 +5V_RUN
27 COEX2_WLAN_ACTIVE
7,25 LFRAME# R330
R333
0 603
0 603
27
25
27
26
28 28 58 8 PCIE_CLK_REQB#_R
22
21
7,25 LAD3 29 29 30 30 3,9,25 PLTRST# 20
7,25 LAD2 31 31 32 32 9 PCIE_WAKE# 1 2 19
33 34 R340 0 +3.3V_SUS
7,25 LAD1 33 34 18
1
1
7,25 LAD0 35 35 36 36 17
C355 C254 9 CLK_33M_LPC 37 38 CLK_PCIE_WLANN 8 C253
0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 37 38 0.1U/16V_4/Y5V 16
10 WLAN_RADIO_DIS# 39 40 CLK_PCIE_WLANP 8
2
2
39 40 15
41 42
16 16 22 8 PCIE_CLK_REQ1#
10 PCIE_MCARD1_DET# 43
41
43
42
44 44 PCIE_RXN1 8 16 +5V_RUN
14
13
9 USB_MCARD1_DET# 45 45 46 46 PCIE_RXP1 8 +3.3V_RUN 12
27 COEX1_BT_ACTIVE_MINI 47 47 48 48 7 DDCDATA 11
3,9,25 PLTRST# 49 49 50 50 PCIE_TXN1 8 7 DDCCLK 10
WLAN_SMBCLK 51 52 PCIE_TXP1 8
WLAN_SMBDATA 53 51 52 +3.3V_RUN 9
54
10 USB_MCARD2_DET# 55
53
55
54
56 56 USBP4+ 9
36 7 VGAHSYNC
7 VGAVSYNC
8
7
57 58
39 10 WWAN_RADIO_DIS#
25 USB_LEFT_EN# 59
57
59
58
60 60
USBP4- 9
7 VGA_RED L42
402
BLM18BB750SN1D VGA_RED_R 6
5
61 62
38 9 USB_OC0# 61 62 USBP5+ 9 4
1
63 64 7 VGA_GRN L43 BLM18BB750SN1D VGA_GRN_R
25 EC_BEEP 63 64 USBP5- 9 3
65 66 C256 402
65 66 0.1U/16V_4/Y5V L44 BLM18BB750SN1D VGA_BLU_R 2
7 ACZ_SPKR 67 68 7 VGA_BLU
2
67 68 USBP1+ 9 402 1
7,25 ACZ_RST#_AUDIO 69 69 70 70 USBP1- 9 16 JP3
71 72
C
7 ACZ_SYNC_AUDIO
7 ACZ_BITCLK_AUDIO 73
71
73
72
74 74 USBP0+ 9
36
C596 10P/50V_4/COG
C595 10P/50V_4/COG
C
7 ACZ_SDOUT_AUDIO 75 75 76 76 USBP0- 9
7 ACZ_SDIN0 77 77 78 78
25 NB_MUTE# 79 79 80 80
+1.5V_RUN C597 10P/50V_4/COG
HEADER 40X2 +3.3V_SUS +5V_RUN +3.3V_RUN
C354
*10P/16V_4_NC
37
1
1
C310 C82 C303
C353 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V 0.1U/16V_4/Y5V
2
0.1U/16V_4/Y5V
need update the qpn and part description
2
16 16 16
16
footprint is right
To CRT board
B B
J7 +3.3V_RUN
AUD_SPK_R+ R338 0 603 1
AUD_SPK_R- R337 0 603 1
2 2
AUD_SPK_L+ R336 0 603 3 3
4
2
AUD_SPK_L- R335 0 603 4 4
1775295-4 RP12
2
2.2KX2
C360 C359 C358 C357 Q22
2
*100P_NC/NPO*100P_NC/NPO*100P_NC/NPO*100P_NC/NPO 2N7002W-7-F
1
3
1
Int. Stereo Speakers 50 50 50 50
12,13 WLAN_SMBCLK
WLAN_SMBCLK 1 3 ICH_SMBCLK 8
5V / 4 Ohm / 2W
1 2
R188 *0_NC
+3.3V_RUN
J5 Q21
2
+5V_ALW 2N7002W-7-F
POWER_SW_IN0# 1
29 POWER_SW_IN0# BREATH_PWRLED 2 WLAN_SMBDATA
29 BREATH_PWRLED 3 5 12,13 WLAN_SMBDATA 1 3 ICH_SMBDATA 8
1
4 6
CON4_1
*DA204U_NC
A D15 A
1 2
R185 *0_NC
3
POWER_SW_IN0#

PROJECT : UM8B DIS
www.vinafix.vn
1A
BTB CONN & Audio conn
5 4 3 2 1
1 2 3 4 5 6 7 8
+3.3V_SUS
2
R132
10K
1
+3.3V_SUS
A
Check PWRGD Voltage A
D10
35 1.5V_DDR_PWRGD
2
BAS316 R131
R124 0 10K 100K to 10K(By Victor)
38 GFX_CORE_PWRGD
1
R125 0 HWPG
37 1.05V_VTT_PWRGD HWPG 25,39
R126 0
36 1.05VPCH_PWRGD
+3.3V_RUN
C144
*100P_NC
R134
2K/F_4
1 2 H_VTTPWRGD
H_VTTPWRGD 3
D11 SDM10K45-7-F
VTTPWRGOOD
B R128 SC(V1.0)P18: B
1K/F VTT_1.1 VR power good
signal to processor. Signal
voltage level is 1.1 V.
+PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC
+PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC
C602 C603 C604 C624 C618 C623 C633 C632

0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
C611 C609 C610 C644 C642 C643
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
+PWR_SRC +PWR_SRC +PWR_SRC

C605 +PWR_SRC +PWR_SRC
+PWR_SRC +3.3V_RUN C612
C C627 C625 C626 C
0.1U/25V_4 +PWR_SRC +5V_RUN
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 C635 C634
0.1U/25V_4 0.1U/25V_4
C606 0.1U/25V_4
+PWR_SRC +3.3V_RUN C613
0.1U/25V_4 +PWR_SRC +5V_RUN
C607 0.1U/25V_4 +PWR_SRC +PWR_SRC

+CPU_PWR_SRC +CPU_PWR_SRC +1.05V_VTT
+PWR_SRC +3.3V_RUN
0.1U/25V_4 C630 C628

0.1U/25V_4 0.1U/25V_4 C636 C637 C640
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
C614 C616
+1.05V_PCH +3.3V_RUN +5V_RUN +3.3V_RUN

C629 +CPU_PWR_SRC +CPU_PWR_SRC +1.05V_VTT
0.1U/25V_4 0.1U/25V_4
+PWR_SRC +5V_RUN
C615 C617
0.1U/25V_4 C638 C639 C641
+1.05V_PCH +3.3V_RUN +5V_RUN +3.3V_RUN
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
C631
0.1U/25V_4 0.1U/25V_4
+PWR_SRC +3.3V_RUN
D +1.05V_PCH +1.05V_PCH +PWR_SRC +PWR_SRC D
0.1U/25V_4
C622
C619 C608 C621 C620
0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 +5V_RUN +PWR_SRC
0.1U/25V_4
PROJECT : UM8 UMA
www.vinafix.vn
1A
System Reset Circuit
1 2 3 4 5 6 7 8
A B C D E
Continuous current : 11A

+PWR_SRC Rds(on) : 18mohm
PQ17
Continuous current : 11A For EMI issue 11/17 FDS4435BZ
Rds(on) : 18mohm
1 8
2 7
PQ20 3 6
FDS4435BZ PR118 5
0.01_3720 PJP12 PC104 PC159 PC160
POWER_JP
4700P/25V/X7R_4
8 1
*2200P/50V_NC
*0.1U_25V_0603_NC
1 4
+DC_IN_SS +DC_IN_SS 7 2 1 2 1 2 CHGR_IN +DC_IN_SS
1 2
6 3 3 3 4 4
1 1
5
PR156
4
470K
2
CSSP_1
1 2 1 2
PR165 10K PR120 100K
3
2
PR119 PR117
PQ39 10/F 10/F
1
2N7002W-7-F
PC92
+DC_IN_SS 2 1
0.1U 10
CSSN
CSSP
PR114 49.9/F
0603
PC103
1
1U PC107 PC109 PC161
PR155 0805 2200P 0.1U 10U
215K/F 25 PR108 0 0603 0603 1206
28
27
2
2
1
50 50 25
PR98
CSSP
GND
CSSN
2
LDO 49.9K/F 22 PC106 1U
DCIN LDO
2 1 2 1
1
2 0603 10 2
2 1 8731_ACIN 2 25 BST PC98
ACIN BST
5
6
7
8
PR111 PC87 0.01U PR115 0.1U
1
10K/F 25 4.7/F 0603 PQ34
21 0603 50 4 FDMC8884 Change to 4.7uH 10/15
2
LDO PC93 1U PR153

25,29 ACAV_IN 13
2
ACOK PC99 PL10 0.01_3720 PL30 HI1206T161R-10
VCC 26 2 1
1
+3.3V_ALW 11 0603 10 *3300P_NC 4.7UH 20% 5.5A(EPI0603H-4R7M-K01)
1
2
3
VDD DHI CHG_CS2 +VCHGR_P
DHI 24 1 2 2 1 1 +VCHGR
PR109 1 2 4 4 3 3
5
6
7
8
2
15.8K/F PC97 0.1U
LX 23 LX PR110 0
0603 50 0603 PR113 PC75 PC152 PC151 PC74 PL31 HI1206T161R-10
2
10 20 DLO 50 4 2.2 CSIP_1 3300P 1000P 2200P 0.1U

25,41 SMBCLK0 SCL DLO
1
9 0805 50 50 50 0603 50 For EMI issue 11/17
25,41 SMBDAT0 SDA PC76 PC153
14 19
2 1
BATSEL PGND
SMBUS Address 12 GNDA_CHG 10U 10U
1
2
3
2
IINP 8 18 PQ33 PC108 PR154 PR151 1206 1206
25 IINP IINP CSIP
12H
Adress :
FDMC8884 1000P 10/F 10/F 25 25
2
17 For EMI issue 11/17
1
CSIN 50
2
8731CCV 6 PC105
CCV
1
For EMI issue 11/17 2 1 SJ6
PR99 CSIP Max Charging current close to
1
PR116
2
2.21K/F 5 15 2 1 0.1U 10 output Cap

CCI FBSA
100 CSIN setting 4.5A
FBSB 16
8731CCS 4
CCS RDS(ON)=26m
GND
ohm
DAC
1
3 REF
1
PC94 PC89 PC88 ISL88731A

7
12
0.1U 0.01U 0.01U PU8

3 10 25 25 3
2
FBSA_1
SJ14
1 1 2 2
+VCHGR
GNDA_CHG
Control IC: ISL88731A
H/S MOSFET: AON7410AOS), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
L/S MOSFET: AON7410(AOS), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
Inductor: 6.8UH +-30% 5.5A SDSL10D40F-5R8Y(TTA), DCR=21mohm
Output Cap: 2*10U 25V(+-10%,X6S,1206)
4 4

PROJECT : UM8 UMA
www.vinafix.vn
1A
Charger
A B C D E
5 4 3 2 1
PR90
PJP11 ISL6237_ONLOD
POWER_JP PR88 0
1 2 PD4 390K PR91
1 2 150K/F
close CAPs close to MOSFETs 603 close CAPs close to MOSFETs
*UDZSTE-175.6B_NC
1 2 +3V5V_PWR_SRC
+PWR_SRC
PJP14 +5V_ALW PR93
POWER_JP *10/0603_NC
D D
PC163 PC79 PC82 PC111 PC112 PC155
10U PC78 10U
0.1U/25V_0603
0.1U/25V_0603
2200P 2200P
1206 50 4.7U/6.3V_0603 50 1206
25 25
6.3 +3.3V_ALW
+5V_SUS 1206
PC91 Fs=250K
Fs=200K 0.1U TDC : 6.38(UMA) ; 7.6A(DIS)
ISL6237_ONLOD
TDC : 7.8A PC84 PR95
PC80 *1U/6.3V_NC 0 PC85 OCP : 9.11(UMA) ; 10.9A(DIS)
OCP : 11.1A 0.1U 1U/6.3V_4
+3.3V_ALW
50
10
603
5
6
7
8
+5V_SUS 603
2
PR96 PQ36
*0_NC 4 FDMC8884 PJP13
2
POWER_JP
PJP10
42
8
7
6
5
4
3
2
1
POWER_JP
1
2
3
1
8
7
6
5
41 PL11
LDO
PAD
LDOREFIN
VIN
RTC
ONLDO
VCC
TON
REF
PAD 3.3UH+-20% 6A(EPI0603H-3R3M-K01)
PQ14 40
1
+5V_DH PAD +3.3V_LX +3.3V_ALWP

FDMC8884 4 39 PAD 1 2
38 PAD
2
+5V_SUSP 9 32 PR102 226K/F
PL9 BYP REFIN2 PR162
10 31
3
2
1
OUT1 ILIM2
2
3.3UH+-20% 6A(EPI0603H-3R3M-K01) 11 30 2.2
+5V_SUSP +5V_LX FB1 OUT2 PR103 0805
1 2 12 29
2
ILIM1 SKIP#
5
6
7
8
PR85 226K/F +5V_POK 13 PU7 28 POK 0 +
1
PGOOD1 PGOOD2
2
1
+5V_EN1 14 27 +3.3V_EN2 SJ15 PC162
PR150 ON1 RT8206BGQW ON2 +3.3V_DH PC110
close to
0.1U/25V_0603
C 15 26 4 C
2
1
DH1 DH2
2
2.2 16 25 PC164 output Cap 330U/6.3V/ESR25
LX1 LX2
8
7
6
5
1
SJ12 SJ11 0805 37 1000P

+ PAD 50
36
SECFB
1
1
2
3
1
PAD
AGND
PGND
PC149 close to +5V_DL
BST1
BST2
4 PQ35
VDD
PAD
PAD
PAD
DL1
DL2
PC150 PR82 PC77 PC90 FDMC8296
0.1U/25V_0603
output Cap
2
330U/6.3V/ESR25 *0_NC PC154 0.1U 0.1U

1000P PQ32 25 25
3
2
1
35
34
33
17
18
19
20
21
22
23
24
50 FDMC8296
1
603 PR100 603 1 603

PR87 +3.3V_DL
1 603
PR84
0 +5V_ALW SJ13 +3.3V_ALW
1 1 2 2 Control IC: RT8206B
H/S MOSFET: FDMC8884(Fairchild), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
L/S MOSFET: FDMC8296(Fairchild), Qg=12nC, Rds(on)=22mohm, PD:3.1W
+3.3V_ALW PC81 Inductor: 3 3.3UH,30%8A(TPRH10D45F-3R8Y-F02)(TTA), DCR=21mohm
Control IC: RT8206B 1U/6.3V_4
Output Cap: 1*330U,6.3V(20%ESR17,7343)
H/S MOSFET: FDMC8884(Fairchild), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W +5V_ALW
Inductor: 3 3.3UH,30%8A(TPRH10D45F-3R8Y-F02)(TTA), DCR=21mohm PC100 0.1U/25V_0603 BAT54S-7-F
Output Cap: 1*330U,6.3V(20%ESR17,7343) 1
PC96 0.1U/25V_0603
PD9 3 +3.3V_ALW +3.3V_ALW
PC102 0.1U/25V_0603
2
B +15V_ALW B
PC95
PQ19 0.1U/25V_0603 PR104 PR86
1 100K 100K
DDTA114YUA-7-F
PD8 3
3 1 +15V_ALWP 2
47K
POK +5V_POK
+5V_POK 35
10K
BAT54S-7-F
PC101
2
0.1U/25V_0603
3
Ton GND VREF2 or Float 5V

2 PQ18
2N7002W-7-F
1
Channel1 Fs 400 kHz 300 kHz 200 kHz
Channel2 Fs
500 kHz 375 kHz 250 kHz
PR112 200K
A +5V_EN1 +3.3V_EN2 A
25,40 SUS_ON PM_THRMTRIP# 3
PR101 0
THERM_STP# 30
C222 PR105 0
*100P_NC
PR107 0
3.3V_ALW_ON 29
close to PR45
C219
close to PR46
PROJECT : UM8 UMA
*100P_NC Size Document Number Rev
www.vinafix.vn
1A
3V/5V
5 4 3 2 1
5 4 3 2 1
Place these CAPs

close to MOSFETs
PJP5 +PWR_SRC
POWER_JP
+1.5V_PWR_SRC 1 2
PC68 PC67
2200P/50V 0.1U_25V_0603 PC64
10U/25V_1206
D
+1.5V_SUS D
+0.75V_DDR_VTT
+1.5V_SUS TDC : 7.4A
TDC : 0.7A
OCP: 10.6A
5
6
7
8
PR70
0_3720/S
PC60 10U/6.3V_0805
+1.5V_DH
PQ12 Frequency : 280KHz
4 FDMC8884
+0.75V_DDR_VTT_P PR75 0_0603 PC63
+0.75V_DDR_VTT 1 2 PR83
RT8207A_BST
BST1 0.1U_25V_0603 PL8
1
2
3
1UH +-20% 12A(EPI0603H-1R0M-K01)
PC59 +1.5V_LX 1 2 +1.5V_SUS_P 2 1 +1.5V_SUS
PC58 10U/6.3V_0805
close to 10U/6.3V_0805 +1.5V_DL
2
output Cap 0.001_7520/S only for Test
5
6
7
8
PR81
2
2
2.2_0805
25
24
23
22
21
20
19
+
1
SJ3 4
2
PC73 PC72
LL
DRVL
GND
VTT
VLDOIN
VBST
DRVH
1
1
SJ4 SJ5
0.1U/25V_0603
330U/2.5V/ESR9
2
PC70
1
2
3
1
PQ11 1000P close to
FDMC8296 output Cap
1
1 18 50
VTTGND PGND
2 VTTSNS CS_GND 17
PR78 10.5K/F
3 RT8207AGQW 16 CS
GND PU6 CS
4 MODE V5IN 15
PR79 5.1_0603
+VTT_DDR_REF 5 14 DDR V5FILT +5V_ALW
VTTREF V5FILT
DDR V5FILT 6 13
C COMP PGOOD C
VDDQSNS
PC66 PC65
VDDQSET
PC57 1U/6.3V 1U/6.3V

0.047U/25V
NC
NC
S3
S5
7
10
11
12
FOR DDR II 1.5V_DDR_PWRGD 32

PR77
909K
TON
PR71
S5_1.5V PR76 0
+5V_POK 34
S3_1.5V PR74 0
RUN_ON 22,25,36,37,40
0
RT8207A_FB
RT8207A_FB1
FB VDDQSNS VTT&VTTREF
R1 +1.5V_SUS
PC61 PR72 Control IC: RT8207A
*18P/50V_NC *75K/F_NC
VDDP +1.8V VDDQ/2 H/S MOSFET: FDMC7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
Inductor: 1.0UH 20% 28A(EPI1004H-1R0M-K01)(TTA), DCR=2.8mohm
RT8207A_FB2 Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
GND +1.5V VDDQ/2 VOUT = (1+R1/R2)*0.75
R2
B PR73 B
*75K/F_NC
S3_1.5V S5_1.5V
C157 C161
*100P_NC *100P_NC
close to PR56 close to PR55
A A
www.vinafix.vn
PROJECT : UM8 UMA
1A
1.5V_DDR
5 4 3 2 1
5 4 3 2 1
+PWR_SRC
PJP8
POWER_JP
+1.05_PCH_PWR_SRC 1 2
+5V_SUS
D PD3 D
PR41 RTBST
2 1
PC138 PC139 PC141 PC168
RTVDD
10_6
2200P/50V_4
10U/25V_1206
0.1U/25V_0603
*10U/25V_1206_NC
RB501V-40
PC34 PC33
1U/6.3V_4
13 1U/6.3V_4
RTBST_1 PR43 PC37 +1.05V_PCH
Fs=280K
0.1U/25V_4
1_6
5
6
7
8
PR42
909K Change PR43 to 1 ohm 11/23 PQ29 TDC : 4.816A
9
PU4 4 FDMC8884
12 RTDH Reserve for +PWR_SRC 11/24 OCP: 7A
VDD
VDDP
BST
RTTON DH
16 TON PR130
1
2
3
32 1.05VPCH_PWRGD RTPG 4 11 RTLX PL5 0_3720/S
PGOOD LX 1.5UH+-20% 10A(EPI0603H-1R5M-K01)
RT8204C PR40
RTLPPG 5 10 RTILIM 1 2 +1.05V_VCCP 2 1 +1.05V_PCH
LPGOOD ILIM
7.87K/F_4
2
RUN_ON PR48 10_4 RTEN 15 8 RTDL
22,25,35,37,40 RUN_ON EN/DEM DL
2
VOUT
PR137 close to +
LDRI
LEN
5
6
7
8
LFB
17 3 SI modify 2.2 output Cap PC133 PC132
2
PR47 PAD FB 0805
0.1U/25V_0603
330U/2.5V/ESR9
RTFB
1
*1M/F_4 4 SJ8
14
2 1
R1 R2
1
PC137
PR38 1000P
1
2
3
10K/F_4 PQ28
1
PR39 50
C C
PR50 4.02K/F_4 FDMC8884

RUN_ON RTLEN
22,25,35,37,40 RUN_ON
10_4 PC36
PR49 *100P/50V_4 Vo=0.75(R1+R2)/R2

*1M/F_4 Change PR106 to 4.02K for output voltage level 11/17
+1.05V_PCH
Control IC: RT8209A
H/S MOSFET: AON7410(AOS), Qg=6.1nC, Rds(on)=26mohm, PD:3.1W
L/S MOSFET: AON7410(AOS), Qg=14nC, Rds(on)=17.5mohm, PD:3.1W
Inductor: 1.5UH+-20% 9A (10D40F-1R5M)(TTA), DCR=10.5mohm
+3.3V_ALW Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
PQ5
FDMC7692
RTLDRI
PC26 PC25
5
6
7
8
*10U/6.3V_NC
0.1U/10V_4
PR37 4
100/F_4
PC32
B B
33P/50V_4
+1.8V_RUN
1
2
3
PR32
0_3720/S
RoHS issue TDC : 1.2A
PC27 +1.8V_VCCP 2 1 +1.8V_RUN
0.033U/10V_4
R1 +1.8V_RUN for CPU and PCH

PR36
PC31 14K/F_4
*39P/50V_4 PC23 PC24 PC22
*10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
RTLFB
R2
Vo=0.75(R1+R2)/R2 PR35
10K/F_4
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
1.05_PCH
5 4 3 2 1
5 4 3 2 1
Place these CAPs +PWR_SRC

PJP9
close to MOSFETs POWER_JP
+1.05V_VTT_PWR_SRC 1 2
D D
+5V_SUS PC53 PC54 PC144 +1.05V_VTT

2200P/50V 0.1U_25V_0603
10U/25V_1206 Frequency : 300KHz
TDC : 12.64A
TP33 8209A_DH
PR145 8209A_DL
OCP : 18.06A
TP36
10_0603
PC145
8209A_VDD
+1.05V_VTT
1U/6.3V
5
6
7
8
8209A_LX PC147 PR149
2
8209A_BST PQ31
4 FDMC7692 PR134
1U/6.3V 0_0603 0.001_7520/S only for Test
PR148
13
2
9
232K/F PC148
1
2
3
0.1U/50V_0603
VDDP
BST
VDD
1
16 12 8209A_DH
TON UG PL7
1UH +-20% 12A(EPI0603H-1R0M-K01)
4 11 8209A_LX 1 2 +1.05V_VTT_P
32 1.05V_VTT_PWRGD PGOOD PHASE
C C
10/9 PR139 footpin is wrong PR144

5 NC PU9 CS 10
2
close to
5
6
7
8
11.5K/F PR138
RT8209A output Cap
2
15 8 8209A_DL 2.2_0805
22,25,35,36,40 RUN_ON EN/DEM LG +
1
4 SJ9
PR147 PC136 PC134
1
2
PGND
VOUT
15K/F 8209A_VFB PC142
0.1U/25V_0603
330U/2.5V/ESR9
17 3
GND
PR146 PAD FB 1000P

NC
1
2
3
*15K/F_NC PQ30 PR143
1
FDMC7672 50 0
14
1 +1.05V_VTT_P
PR141
R1
8.06K/F
PC146
VFB=0.75 *1500P/50V_NC
8209A_VFB
PR140
20K/F
R2
PR142
B B
Vo=0.75(R1+R2)/R2 *0_NC
VTT_SENSE 5
+1.05V_VTT
Control IC: RT8209A
H/S MOSFET: FDMC7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
A A

PROJECT : UM8 UMA
www.vinafix.vn
1A
1.05_VTT
5 4 3 2 1
1 2 3 4 5
PJP3
POWER_JP
+5V_SUS
3211_VIN 2 1 +PWR_SRC
PR45 2 1
10_0603
2
PC28 PC30 PC29 PJP4
PC38 SJ10 POWER_JP
10U/25V_1206
0.1U/25V_0603
*10U/25V_1206_NC
1 2
1
PU5 1 2
A ADP3211A 1U/10V_0603 A
PR44 0
32 24 3211_VCC +VCC_GFX_CORE
5 GFXVR_EN EN VCC
5
6
7
8
PR52 PC42 0.22U/25V/0603
GFXVR_VID_0 31 23 3211_BST 3211_BST1 2 1 PQ27
Fs=400K
5 GFXVR_VID_0 VID0 BST
GFXVR_VID_1 30 22
0_0603 4 FDMC7692 TDC : 12A
5 GFXVR_VID_1 VID1 DRVH
GFXVR_VID_2 3211_SW
OCP : 26.4A
5 GFXVR_VID_2 29 21
1
2
3
VID2 SW
GFXVR_VID_3 28 20 +5V_SUS
5 GFXVR_VID_3 VID3 PVCC PR136
GFXVR_VID_4 27 19 3211_DRVL PL6 0.001_7520/S only for Test
5 GFXVR_VID_4 VID4 DRVL 0.56UH +-20% 25A(MPO104-R56)
GFXVR_VID_5 26 18 PC46 2 1+GFX_VCORE 1 2 +VCC_GFX_CORE
5 GFXVR_VID_5 VID5 PGND 2.2U/6.3V/0603
GFXVR_VID_6 25 17
5 GFXVR_VID_6
3
VID6 AGND
5
6
7
8
1 16 CSCOMP PR132
32 GFX_CORE_PWRGD PWRGD CSCOMP +
2.2_0805
Change PC40 to 68nF 11/23 2 15 4 PC48 PC140 PC143
5 GFXVR_IMON IMON CSFB
PR46 10K
0.1U/25V_0603
330U/2.5V/ESR9
*10U/6.3V_0805_NC
2
+3.3V_SUS 2 1 3 CLKEN# CSREF 14
2
PR53 PC135
PAD
1
2
3
PC40 T14 4 13 CSCOMP PQ26 1000P
5.9K/F 0.068U/16V FBRTN LLINE
FDMC7672
1
5 12 50
1
FB RAMP
PC43 6 COMP RT 11
B B
3211_VCC +VCC_GFX_CORE_RTN
GNDEP
7 GPU RPM 10
PC41 220P/50V PC44 8 9
1000P/50V 47P/50V ILIM IREF
33
PR55 PC45
PR56
1K/F 20K/F/4 PR57

470P/50V 9.1K/F
CSCOMP
PR51 PR54 +VCC_GFX_CORE

0 0 Control IC: ADP3211A
+VCC_GFX_CORE
H/S MOSFET: FDMC7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
PR131
Output Cap: 1*330U,2.5V(20%,105C,3528),ESR=9mohm
100_0603
VCC_AXG_SENSE 5
C C
VSS_AXG_SENSE 5
PR60 PR59 PR61 PR135 220K/NTC/6
PR133 Place close to GPU socket 80.6K/4 237K/F/4 274K/4
100_0603
VCCSENSE & VSSSENSE pins
PR63 71.5K/F/4
+VCC_GFX_CORE_RTN
PR64
PC49 PC51 178K/F/4
PR58 470P/50V 1000P/50V/4
422K/F/4
PR65
60.4K/F/4
3211_VIN PR66 1K/4 Change to 60.4K 10/22
PC52 PC50
1000P/50V/4 1000P/50V/4
D D

PROJECT : UM8 UMA
www.vinafix.vn
1A
GFX_CORE
1 2 3 4 5
5 4 3 2 1
PJP7
+PWR_SRC POWER_JP
2 1
+CPU_PWR_SRC
PJP6
POWER_JP
PC122 PC131 2 1
+ + PC170 PC171
*100U/25V_NC
*100U/25V_NC
0.1U/25V_0603
0.1U/25V_0603
For EE +PWR_SRC issue 11/25 +CPU_PWR_SRC
Reserve for +PWR_SRC 11/24
D D
1
PC16 PC17 PC19 PC18
PC169
0.1U/25V_0603
+VCC_CORE
2200P/50V
10U/25V/1206
10U/25V/1206
*10U/25V_1206_NC
2
Fs=300K
TDC : 48A
5
6
7
8
9
OCP : 64A
+5V_SUS 3212_DH1 4 PQ3
FDMS7692
PL3 +VCC_CORE
1
2
3
1 2 0.36UH+-20%29.8A FDUE1040D-H-R36M=P3
3212_LX1 2 1+VCC_CORE
PR23 10_0603
3
PC12
PR14 *0_NC 2.2U/6.3V/0603 PR127
2.2_1206 PC20 + PC35 + PC130
5
25,32 HWPG
5
6
7
8
9
5
6
7
8
9
DPRSLPVR
0.1U/25V_0603
330U/2V/ESR6
330U/2V/ESR6
5
25 IMVP_VR_ON
H_PSI#
GND_VHCORE 3212_DL1 4 4
+3.3V_SUS PC123 PR30
PQ22 PQ23 1000P/50V/0805 10_F_0603
GND_VHCORE FDMS0310S FDMS0310S
1
2
3
1
2
3
5
5
VID0
VID1
VID2
VID3
VID4
VID5
VID6
+VCC_CORE_RTN
PR18
PR19
PR5 PR9
1.91K/F 1.91K/F
2 VR_PWRGD_CLKEN#
+CPU_PWR_SRC
2_0603
PR26
C PR6 C
+1.05V_VTT *100K_NC Change to 2ohm for EE issue 11/17
3,25 IMVP_PWRGD
0_4
0_4
CPU_BST1
1
PC125 PC126 PC127 PC128
1
Change PC7 to 68nF 11/23
0.1U/25V_0603
48
47
46
45
44
43
42
41
40
39
38
37
2200P/50V
10U/25V/1206
10U/25V/1206
5 I_MON
2
PSI
DPRSLP
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PH0
PH1
VCC
PC13
PR126 0.22U/25V/0603
2
2
5
6
7
8
9
GND_VHCORE
5.62K/F 1 36 PQ4
PC7 EN BST1
0.068U/16V 2 35 3212_DH1 3212_DH2 4 FDMS7692
PWRGD DRVH1
3 34 3212_LX1
1
IMON SW1 PL4 +VCC_CORE
1
2
3
PC3 PR29 Change PR29 to 100 ohm 11/23 0.36UH+-20%29.8A FDUE1040D-H-R36M=P3
4 CLKEN SWFB1 33
1000P/50V +5V_SUS 3212_LX2 2 1 +VCC_CORE
100/F
5 FBRTN PVCC 32
PU3
3
PC4 150P/50V ADP3212MNR2G 3212_DL1 PC14
6 FB DRVL1 31
1 2 PR128
7 30 2.2_1206
COMP PGND
5
6
7
8
9
5
6
7
8
9
PC5 150P/50V PC8 4.7U/6.3V_0603 PC129 + PC21 + PC39
PR7 PR8
12P/50V_0603 3212_DL2
0.1U/25V_0603
330U/2V/ESR6
8 29
*330U/2V/ESR6_NC
TRDET DRVL2 3212_DL2
1.65K/F 39.2K/F PR28 4 4
PR13 9 28 PC124 PR31
5.1K VARFR SWFB2 Change PR28 to 100 ohm 11/23 1000P/50V/0805 10_F_0603
100/F PQ24 PQ25
10 27 3212_LX2 FDMS0310S FDMS0310S
1
2
3
1
2
3
PR10 VRTT SW2
11 26 3212_DH2
+5V_SUS TTSNS DRVH2
7.32K/F 12 25
CSCOMP
AGND BST2 Del one for cost saving 11/10

CSSUM
SWFB3
CSREF
GND_VHCORE
PWM3
1
RAMP
LLINE
49 PC15
IREF
RPM
OD3
ILIM
GND
RT
0.22U/25V/0603
PR27
2_0603
13
14
15
16
17
18
19
20
21
22
23
24
B B
2
CPU_BST2
PR3 PR4 Change to 2ohm for EE issue 11/17
0 0
PR20 +VCC_CORE
2.05K/F Control IC: ADP3212
H/S MOSFET: FDMS7692(Fairchild), Qg=11nC, Rds(on)=14mohm, PD:2.5W
L/S MOSFET: FDMS0310S(Fairchild), Qg=84nC, Rds(on)=2.7mohm, PD:2.5W
PR11 PR17 Inductor: 0.36UH +-20% 45A(MPO104F-R36H1)(Delta), DCR=0.89mohm
80.6K/F 162K/F PR16 Output Cap: 4*330U 2V(20%,ESR=6,7343,H1.9)
1000P/50V
PR125 649K/F PR22 PR129

*27.4/F_NC PC11 PC10 73.2K/F 220K/NTC/6
820P/50V 1000P/50V/X7R
VCCSENSE
VCCSENSE 5
VSSSENSE
VSSSENSE 5
PC6
GND_VHCORE
GND_VHCORE
GND_VHCORE
PR124 PR21 191K/F Place close to

*27.4/F_NC PR12
Phase1 output
1K/F
PR25 124K/F inductor.
GND_VHCORE
PR15 PR24 124K/F

Change PR53 , PR54 to NC 11/23 47.5K/F
Change to 124K for LOAD-Line 10/22
+CPU_PWR_SRC
+VCC_CORE
PR33 *100_0603_NC
+VCC_CORE_RTN
PR34 *100_0603_NC
NOTE: PC9
De-populate PR164 and PR165 1U/6.3V
A A
when CPU is present SJ7
1 1 2 2
GND_VHCORE
GND_VHCORE

PROJECT : UM8 UMA
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1A
CPU CORE
5 4 3 2 1
1 2 3 4 5
+5V_RUN +3.3V_SUS
+5V_ALW +15V_ALW +3.3V_ALW +3.3V_SUS
+5V_ALW +15V_ALW +5V_SUS PQ9 +5V_RUN TDC : 5A TDC : 0.26A
IRF8707TRPBF PQ6
9 SI2304BDS-T1-E3
8 3
7 2 PR62 PR67 3 1
PR69 6 1 100K 100K
PR68 100K 5
100K PC47
2
PC62 SUS_3.3V_ENABLE 0.1U
4
A A
RUN_ENABLE_5V 0.1U 603
3
603 25
3
25 SUS_ON_3.3V# 5
RUN_ON# 5 PQ7A
Change to RUN_ON
6
2N7002DW-7-F
4
6
25,34 SUS_ON 2
4
2 PQ8A PC56 PQ7B PC55
22,25,35,36,37 RUN_ON
2N7002DW-7-F 4700P 2N7002DW-7-F 4700P
1
1 25 25
PQ8B
2N7002DW-7-F
Change MOS spec 11/13

+1.5V_RUN
TDC : 0.35A
+15V_ALW +1.5V_SUS +1.5V_RUN
PQ15
SI2304BDS-T1-E3
PR94 3 1
100K
PC83
2
B RUN_ENABLE_1.5V 0.1U B
603
3
25
RUN_ON# 2
PQ16
1
2N7002W-7-F PC86
0.047U
25
+5V_RUN
+3.3V_RUN
TDC : 4.9A
2
+15V_ALW +3.3V_ALW PQ13 +3.3V_RUN PR341
IRF8707TRPBF *47_NC
9 0603
8 3
3 1
7 2
6 1
PR80 5 RUN_ON# 2
100K
PC71 PQ40
4
1
C C
0.1U *2N7002W-7-F_NC
RUN_ENABLE_3.3V 603
25
3
RUN_ON# 2
PC69
PQ10 4700P
1
2N7002W-7-F 25
D D

PROJECT : UM8 UMA
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1A
Run Power Switch
1 2 3 4 5
A B C D E
+3.3V_ALW
2
PC156 1 2 2200P 50
1 1
PC157 1 2 1000P 50 +3.3V_ALW
PD7 PD6 PD5
3
PC158 *DA204U_NC *DA204U_NC *DA204U_NC
1 2 0.1U 25 +VCHGR
2
603
2 JBAT3
PR89
10K
BATT1+ 1 SMBUS Address 16
2 PR106 100
Adress : 16H
1
BATT2+
SMB_CLK 3 1 2 SMBCLK0 25,33
SMB_DAT 4 1 2 SMBDAT0 25,33
5 PR97 100 PR92 100
BATT_PRES#
SYSPRES# 6 1 2 PBAT_PRES# 25
BATT_VOLT 7
BATT1- 8
BATT2- 9
C144CU-109A8-L
+5V_ALW +3.3V_ALW
Chaneg the ESD voltage level to

+3.3V_ALW for EE demand 0902
2
PR159 PR158
2 *0_0805_NC 0_0805 2
+3.3V_ALW
1
1
1
PR157
PD10 2.2K
DA204U
PQ38
2
FDV301N_NL
PR160 33
DOCK_PSID 3 1 1 2 PS_ID 25
+5V_ALW
2
PR164
1
100K/F PR161 10K

PC165 1 2
100P/50V
2
1
PD11
3
*BAS316_NC
2
2
1
1
PQ37
PR163 MMST3904-7-F
3 15K/F 3
2
PC121
1 2 0.1U_25V_0603
PC117 1 2 1000P/50V
PC118 1 2 2200P/50V
PQ21
+DC_IN FDS4435BZ +DC_IN_SS Chaneg PR1155 10K +- 1% to 10K + - 5%. 0902
CN6 FL3
BLM41PG600SN1L 1 8
5 +DCIN_JACK 2 7
Adapter1+
3 6
1
4 PC167 5
Adapter2+
1
1
0.1U/25V_0603 PC166 PC119 PR122
3 1U/25V_0805 240K PC115 PR121 PC114 PC113 PC116
2
Adapter1- *0.1U/25V_0603*NC 0.01U/25V 10K_0603 0.1U/25V_0603 10U/25V_1206

2
2
*0.1U/25V_0603_NC
2
2
Adapter2-
2
1 DOCK_PSID
PSID
4 4
BATTCON3_2
2
PC120 PRV3
*100P/50V_NC *VZ0603M260APT_NC PR123
47K

1
PROJECT : UM8 UMA

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1A
Batt & DC-IN
A B C D E
5 4 3 2 1
VER : 1A
D D
Adapter
PWR_SRC
Charger
ISL88731A
Battery
Richtek Richtek Richtek Richtek On On
RT8206B RT8207A LDO RT8209A RT8204B ADP3211A ADP3212MNR2G
+5V_ALW SUS_ON SUS_ON RUN_ON

+1.5V_SUS
+15V_ALW +3.3V_ALW +5V_SUS +1.5V_SUS +VCC_CORE
+0.75V_DDR_VTT
C C
RUN_ON RUN_ON
GFX_ON
+1.05V_PCH +1.1V_VTT
+VCC_GFX_CORE
IR AOS AOS AOS

IR8707TRPBF AO3404 AO4468 AO3404
RUN_ON SUS_ON RUN_ON RUN_ON
+3.3V_RUN +3.3V_SUS +5V_RUN +1.5V_RUN
B B
Richtek
RT8204B
RUN_ON
+1.8V_RUN
A A

PROJECT : UM8 UMA
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1A
Schematic Block Diagram1
5 4 3 2 1
1 2 3 4 5 6 7 8
+3.3V_SUS
+3.3V_RUN
2.2K 2.2K
2.2K 2.2K
+3.3V_RUN
H14 PCH_SMBCLK MEM_SCLK 30
7002 MINICARD-WLAN
C8 PCH_SMBDATA MEM_SDATA 32 /WWAN
7002
+3.3V_RUN
A A
SO-DIMM
+3.3V_SUS
PCH
2.2K 2.2K
G6 SMB_CLK_ME0
G8 SMB_DATA_ME0
+3.3V_SUS
+3.3V_ALW
B 10K 10K B
2.2K 2.2K
+3.3V_SUS
E10 SMB_CLK_ME1 SMBCLK1 115
7002
G12 SMB_DATA_ME1 SMBDAT1 116 EC
7002
+3.3V_ALW
+3.3V_SUS
2.2K 2.2K
110 SMBCLK0 9
111 SMBDAT0 10 CHARGER
100
4
+3.3V_ALW 3 BATTERY
+3.3V_SUS 100
C C
SIO 10K 10K 2.2K 2.2K
ITE8502 +3.3V_SUS
115 SMBCLK1 SMB_CLK_ME1 115
7002
116 SMBDAT1 SMB_DATA_ME1 116 PCH
7002
+3.3V_SUS
+3.3V_RUN
32
31 CLOCK
10K 10K
117 SMBCLK2 8
THERMAL
118 SMBDAT2 7 (EMC1422)
D D

PROJECT : UM8 UMA
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1A
SMBUS BLOCK
1 2 3 4 5 6 7 8
5 4 3 2 1
UM8_ X00 Power On Timing(BATTERY MODE BY SOFTWARE SETUP, W/O ADAPTOR)

D D
+PWR_SRC
+5V_ALW
>150ms
SYS_PWR_SW#
+3.3V_ALW_ON T6=540us
+3.3V_ALW
680ms(TBC)
ALW_ON
>1ms T9=1.024s
SUS_ON
T7=1.256s
+15V_ALW
T11=312us
+3.3V_SUS
T10=668us
+5V_SUS
T12=3.4ms
+1.5V_SUS
T13=1.52ms
1.5V_DDR_PWRGD T14=15.2ms
>10ms 20ms
C RSMRST# DE-BOUNCE 16 ms (PCH) C
X 50ms(TBC)
5ms
PM_PWRBTN#_R
0ms
SIO_EXT_SMI#
0ms
SIO_EXT_SCI#
>100ms T15=98ms
SIO_SLP_S5# T16=100us
>60us
SIO_SLP_S3# T18=6.8ms
GFXVR_EN (UMA) T19=1.24ms
+VCC_GFX_CORE T20=1.8ms
GFX_CORE_PWRGD
T21=-1.5ms
RUN_ON T22=19.2us
+0.75V_DDR_VTT T28=312us
+1.05V_VTT
T24=408us
+3.3V_RUN
B T23=520us B
+5V_RUN
T27=1.44ms
+1.05V_PCH
T26=1.18ms
+1.5V_RUN
T25=1.94ms
+1.8V_RUN
T29=3.28ms
5ms
HWPG
T30=108ms
100ms
IMVP_VR_ON T31=1.152ms
<3ms
+VCC_CORE T33=9.76ms
5ms
IMVP_PWRGD
T32=376us
10us<T<100us
VR_PWRGD_CLKEN# 5ms (IMVP_PWRGO to ECPWROK)
3ms<T<20ms T35=43ms
ECPWROK
USB_RIGHT_EN#
USB_RIGHT_EN#
T36=40.2ms
A >1ms A
PM_DRAM_PWRGD
T34=840us
CLK_CPU_BCLK T37=31ms
1ms>T>100ms
H_PWRGOOD
1ms>
PLTRST#
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PROJECT : UM8 UMA
1A
POWER SEQUENCE
5 4 3 2 1
5 4 3 2 1
(1) AC : DC_IN -> DC_IN_SS -> +PWR_SRC

Power Design Block Diagram (2)
Bat : +VCHGR -> +PWR_SRC,+5V_ALW
POWER_SW_INT#
+PWR_SRC (3) 3.3V_ALW_ON,
(1) (1) (1) (4) +3.3V_ALW, ALW_ON
+DC_IN +DC_IN_SS +PWR_SRC (5) SUS_ON
Power Jack LDO
SYSTEM POWER (6) +5V_SUS, +3.3V_SUS, +1.5V_SUS,
+3.3V_ALW 1.5V_DDR_PWRGD, +15V_ALW
Adapter input +3.3V_ALW_ON(From (4)
AO4435L AO4435L 3VALW ON POWER LOGIC) +5V_ALW +5V_ALW +15V_ALW (7) RSMRST#
(3) (1) (4)
Diode & Cap (6)
RT8206 VR (8) PM_PWRBTN#
D D
SUS_ON +5V_SUS Page 34
Charger (5) (6) (5) SUS_ON (9) SIO_SLP_S5#, SIO_SLP_S4#, SIO_SLP_S3#
Page 34 (10) GFXVR_EN
ISL88731 (11) +VCC_GFX_CORE, GFX_CORE_PWRGD
Page 33
+5V_ALW (12) RUN_ON
(13) +0.75V_DDR_VTT
+VCHGR (1) +1.5V_SUS
(1) VRAM DDR3 POWER (6) (14) +5V_RUN, +3.3V_RUN,
+PWR_SRC (5) SUS_ON VR 1.5V_DDR_PWRGD , +1.5V_RUN, +1.05V_VTT,
Battery (6) +1.05V_PCH and +1.05VPCH_PWRGD,+1.05VTT_PWRGD
RT8207 (15) HWPG
(12) RUN_ON
SI4835 +0.75V_DDR_VTT (15) H_VTTPWRGD
Page 35 LDO (13)
(16) IMVP_VR_ON
(17) +VCC_CORE, IMVP_PWRGD,
(18) VR_PWRGD_CLKEN#
+5V_SUS
(19) ECPWORK
+1.05V_PCH (20) PM_DRAM_PWRGD
PCH CORE POWER
(21) CLK_CPU_BCLK(PCH to CPU)
1.05VPCH_PWRGD (14)
(12) RUN_ON RT8204 VR (22) H_PWRGOOD
+3.3V_ALW +1.8V_RUN (23) PLTRST#(PCI_PLTRST#)
Page 36
C C
(4) +3.3V_ALW AO3404 +3.3V_SUS

(6)
+5V_SUS
Page 40
(11)
+VCC_GFX_CORE
(5) SUS_ON GFX CORE POWER
VR
(10) GFXVR_EN GFX_CORE_PWRGD
(6) +5V_SUS +5V_RUN

ADP3211A
AO4468 (14)
Page 40
Page 38
(12) RUN_ON
(4) +3.3V_ALW FDS8880 +3.3V_RUN (14)

Page 40
(12) RUN_ON
+5V_SUS +5V_SUS (4)
CPU CORE POWER CPU Memory Control +1.05V_VTT (14)

B
+VCC_CORE & I/O Power B
(16) IMVP_VR_ON ADP3212MNR2G VR (12) RUN_ON RT8209 VR 1.05V_VTT_PWRGD

(14)
IMVP_PWRGD
TWO PHASE (17) Page 49
SOLUTION VR_PWRGD_CLKEN#
Reset Circuit
(18) Page 42 (18)
Page 39
+1.5V_RUN (18) VR_PWRGD_CLKEN# CK_PWRGD_R
(6) +1.5V_SUS FDMS7670 (14) Inverter
Page 40
(18)
(12) RUN_ON CK_PWRGD_R
CLK GEN
Page 15
1.05V_VTT_PWRGD
(14)
(2) 1.05VPCH_PWRGD HWPG (15)
(14)
POWER_SW_INT#
(19) SIO_SLP_S4# (9)
ALW_ON To control DIMM VREF (15)
(4) ECPOWRK
SUS_ON (11) GFX_CORE_PWRGD H_VTTPWRGD
EC (5) PM_DRAM_PWRGD (20) Wire AND
PCH
IT8502 PM_PWRBTN# (8) 1.5V_DDR_PWRGD
CLK_CPU_BCLK (21) (6)
RSMRST# (7) CPU
H_PWRGOOD (22)
Page 7~11
A SIO_SLP_S5# (9) A
PLTRST#(PCI_PLTRST#) Page 3~6
(23)
SIO_SLP_S3# (9)
Page 25 (15) H_VTTPWRGD

(15) HWPG
RUN_ON
(12)
IMVP_VR_ON Quanta Computer Inc.
(16)
(17) IMVP_PWRGD PROJECT : UM8 UMA
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1A
POWER SEQUENCE BLOCK
5 4 3 2 1
1 2 3 4 5 6 7 8
H3 H11 H22 H26 H28

*H-C295D110P2_NC *H-C295D110P2_NC *H-C295D110P2_NC *H-C295D110P2_NC *H-C295D110P2_NC H27 H4
H-C295D110P2 H-C295D110P2 H-C295D110P2 H-C295D110P2 H-C295D110P2 *H-C295D110P2_NC *H-C295I110D110P2_NC
1 H-C295D110P2 H-C295I110D110P2
1
A A
H21 H7
*h-um8b-2_NC *H-C315D110P2_NC
h-um8b-2 H-C315D110P2 H18 H14
H17 H15 *H-C165D165N_NC *H-C165D165N_NC
*H-C165D165N_NC *H-C165D165N_NC H-C165D165N H-C165D165N
1 H-C165D165N H-C165D165N
1
1
1
H6
*H-TC315BC126D126P2_NC
H-TC315BC126D126P2
CPU
1
53
B PV1 PV2 PV3 B
H24 H12 *HYH_RHC-CP-27G03_NC *HYH_RHC-CP-27G03_NC *HYH_RHC-CP-27G03_NC
*H-TC236BE315X315D110P2_NC *H-TC236BE315X315D110P2_NC
H-TC236BE315X315D110P2 H-TC236BE315X315D110P2
GND
GND
GND
1
1
H13 H25
*H-TC236BE315X295D110P2_NC *H-TC236BE315X295D110P2_NC
H-TC236BE315X295D110P2 H-TC236BE315X295D110P2
1
C C
H10 H5
H23 *H-C295D181P2_NC *h-tc122i122bc197d122p2_NC
*h-um8b-1_NC H-C295D181P2 h-tc122i122bc197d122p2
h-um8b-1
1
1
1
H16
*H-C295D295N_NC
4 H19 H20 5 H9 H8
H-C295D295N HDD NUTE HDD NUTE PCH NUTE BT NUTE
H-TC236BE315X335D161P2 H-TC295BE315X335D161P2 H-C236D126P2 H-C236D142P2
1
D NUTE need add footprint in this D

PROJECT : UM8B DIS
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1A
PAD&SCREW
1 2 3 4 5 6 7 8

Um8 - Uma 1125 - R1a - New Cardreader

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Um8 - Uma 1125 - R1a - New Cardreader

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1 2 3 4 5 6 7 8

UM8 UMA SYSTEM DIAGRAM

+1.05VTT PG.37 PG.3~6 LVDS LVDS PG.22

Atheros/AR8152 PORT4 PG.22

LANE5 Card Reader BT Stackup

Place each 0.1uF cap close to pin

Check CLK P/N and footprint Place within 0.5"

+3.3V_RUN R113 10K 16 10 CLK_BUF_DREFSSCLKP_R RP7 2 1 0X2

0 1 R8253 => UM7 POP

PCI EXPRESS -- GRAPHICS

TDI AT29 XDP_TDI TP13 B

Quanta Computer Inc.

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

12 M_A_BS#0 AC3 SA_BS[0] 13 M_B_BS#0 AB1 SB_BS[0]

12 M_A_CAS# AE1 SA_CAS# 13 M_B_CAS# AC5 SB_CAS#

Channel A DQ[15,32,48,54], DM[5]

Name different with power

1.1V RAIL POWER

AC34 VCC32 VTT0_32 A11 AJ18 VAXG31 VDDQ7 AB4

AC32 VCC34 AH21 VAXG33 VDDQ9 W7

B AC27 AB10 C134 22U/6.3V_8/X5R P1 B

AA31 VCC45 VTT0_42 J11 Clarksfield VTT=1.1V VTT1_47

PEG & DMI

VCC57 VID[4] VID4 39 VTT1_56 VTT1_68

VCC73 ISENSE I_MON 39

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

VSS76 VSS156 VSS_NCTF3 CFG4 R108 *3.01K/F_4_NC

INTVRMEN - Integrated SUS 1.1V VRM Enable

C287 18P/50V_4/COG U14D

PANEL_BKEN T48 Ibex-M BJ46

RTC_X1 B13 22 LCD_DDCCLK LCD_DDCDAT Y45 L_DDC_CLK

Digital Display Interface

R263 *1K_NC SPI_SI

IBEX PEAK-M (GND)

From CLK BUFFER

C90 C297 Low = A16 swap 0 1 Reserved (NAND) 100K/F_4 *100K/F_4_NC

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) IBEX PEAK-M (GND)

need check to change to 470 ohm

Clock and Miscellaneous

C40 0.1U/ 10V/X7R

Quanta Computer Inc.

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

C158 0.1U/ 10V/X7R R147

C159 0.1U/ 10V/X7R

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

M3 => support for Clarksfield processor

Place these Caps near So-Dimm1.

7343 2.5 R156 0 R157 *0_NC

+3.3V_RUN C183 2.2U/ 6.3V/X5R 16

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

BAT54C T/R R308 5

B Q23 C313 LCD_A0- C300 1 B