E0333 Quanta R63 Rev1A

1 2 3 4 5 6 7 8
+3V/+5V S5
R63 INTEL SYSTEM DIAGRAM
PG.36
AMD
A +1.05V A
PG.37
Dd PCI-E x8 Mars / SUN XT
SODIMM1 DDR3 L INTEL PP;PP
CPU Core Max. 4GB
PG.12
Channel A
Haswell W' 7'3::
PG.40~41
WY
PG.14~20
Dd Wt
DDR3L SODIMM2 /' DDR3 900MHz
DDR3 L WW'
PG.38 Max. 4GB Channel B ^ VRAM
PG.13
Charge 128Mx16x8,128bit PG.21~22
PG.2~5
PG.35
FDI DMI
B
Dis-Charge B
PG.39
eDP Zd^Z
SATA0 >s^/
+VGACORE HDD W>s^
PG.25 LVDS
PG.33 W'
PG.42
+1.5 VGA SATA1

PG.43
ODD PG.33
INTEL PCH DP Port B HDMI
PG.26
+1.0V/+1.8/ +3 VGA CRT
PG.44
Lynx Point PG.25 CRT
3&,([
LANE2 LANE1 Wt
USB 3.0 USB3.0 Ports Webcam
C LAN WLAN USB 2.0 W&'
X2 C
RTL8166EH BT COMBO PORT10 PG.29 PG.25

10/100 PG.30 PG.34 USB 2.0 PORT1,2 PORT4
^
3&,([
PORT0,1
LANE3
USB2.0 Ports Stackup
PG.6~11
Accelerometer Card Reader PG.29
TOP
PG.34 RTS5237
SMBUS PG.27
GND
LPC
IN1
KBC Speaker IN2
EnE KB3940QF A1 PG.28
PG.31 AUDIO VCC
D CODEC HP/MIC BOT D
KB PG.32 TPPG.32 ROM FANPG.32 PG.29

PG.31
ALC 3227
Analog MIC 352-(&75
PG.28 PG.29 4XDQWD&RPSXWHU,QF
Size Document Number Rev
1%
Custom 1A
BLOCK DIAGRAM
Date: Friday, December 21, 2012 Sheet 1 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

Haswell Processor (DMI,PEG,FDI) Haswell Processor (CLK,MISC,JTAG)
U24A U24B Host CLK:
PEG_COMP Trace length < 11000 MILS
D21 E23
Trace spacing = 15 ,20 MILS, Impendence 90 ohm
6 DMI_TXN0 C21 DMI_RX#[0] PEG_RCOMPO E26 CLK_CPU_BCLKP
6 DMI_TXN1 DMI_RX#[1] PEG_RX#[0..7] 14 BCLK CLK_CPU_BCLKP 8
B21 D26 CLK_CPU_BCLKN
CLOCKS
6 DMI_TXN2 DMI_RX#[2] BCLK# CLK_CPU_BCLKN 8
A21 M29 PEG_RX#0 H_PECI (50ohm)
MISC
6 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] K28 PEG_RX#1 Route on microstrip only
D20 PEG_RX#[1] M31 PEG_RX#2 SKTOCC# AP32 E27 CLK_DPLL_SSCLKP
6 DMI_TXP0 C20 DMI_RX[0] PEG_RX#[2] L30
Spacing > 18 mils TP50 SKTOCC# SSC_DPLL_REF_CLK F27 CLK_DPLL_SSCLKP 8
PEG_RX#3 CLK_DPLL_SSCLKN
6 DMI_TXP1 B20 DMI_RX[1] PEG_RX#[3] M33 PEG_RX#4 Trace Length: 15 inch TP_CATERR# SSC_DPLL_REF_CLK# CLK_DPLL_SSCLKN 8
6 DMI_TXP2 DMI_RX[2] PEG_RX#[4] TP46
D A20 L32 PEG_RX#5 H28 CLK_DPLL_NSCCLKP D
6 DMI_TXP3 DMI_RX[3] PEG_RX#[5] M35 DPLL_REF_CLK G28 CLK_DPLL_NSCCLKP 8
PEG_RX#6 HPECI Ra,Ca need placement close to EC. CLK_DPLL_NSCCLKN
DMI
D18 PEG_RX#[6] L34 AN32 DPLL_REF_CLK# CLK_DPLL_NSCCLKN 8
PEG_RX#7 Ra
6 DMI_RXN0 DMI_TX#[0] PEG_RX#[7] CATERR#
C17 E29 R537 43_4 H_PECI
6 DMI_RXN1 DMI_TX#[1] PEG_RX#[8] 9,31 EC_PECI
B17 D28 Ca
6 DMI_RXN2 A17 DMI_TX#[2] PEG_RX#[9] E31
PEG_RX[0..7] 14 C770 *47P/50V_4
6 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] D30 AR27 AN3 CPU_DRAMRST#
D17 PEG_RX#[11] E35 PECI SM_DRAMRST#
6 DMI_RXP0 DMI_TX[0] PEG_RX#[12] 4/30 CRB 1.0 Add
C18 D34 PROCHOT# (50ohm) AK31
6 DMI_RXP1 DMI_TX[1] PEG_RX#[13] +VCCST FC_AK31
THERMAL
B18 E33 Trace Length <11 inches
DDR3
MISC
6 DMI_RXP2 A18 DMI_TX[2] PEG_RX#[14] E32 AM30 AP3
31,40 H_PROCHOT# R263 56.2/F_4 H_PROCHOT#_R SM_RCOMP_0 R250 100/F_4
6 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT# SM_RCOMP[0] AR3 SM_RCOMP_1 R526 75/F_4
P33 L29 PEG_RX0 C38 SM_RCOMP[1] AP2 SM_RCOMP_2 R525 100/F_4
6 FDI_TXN0 FDI_TX#[0] PEG_RX[0] Cb need placment near VR SM_RCOMP[2]
N32 L28 PEG_RX1 Cb
6 FDI_TXN1 R33 FDI_TX#[1] PEG_RX[1] L31 AM35
PEG_RX2 47P/50V_4 SM_RCOMP[0] W:12mils/S:15mils/L: 500mils,
6 FDI_TXP0 P32 FDI_TX[0] PEG_RX[2] THERMTRIP#
FDI
K30 PEG_RX3 THERMTRIP# (50ohm) SM_RCOMP[1] W:12mils/S:15mils/L: 500mils,
6 FDI_TXP1 FDI_TX[1] PEG_RX[3] L33 PEG_RX4 Trace Length: 1.1~12 inches
J29 PEG_RX[4] K32 PEG_RX5 PM_THRMTRIP#_R
SM_RCOMP[2] W:12mils/S:15mils/L: 500mils,
6 FDI_INT FDI_INT PEG_RX[5] 9,31 PM_THRMTRIP#R
L35 PEG_RX6
PEG_RX[6]
PCI EXPRESS* - GRAPHICS

R71 *0_4/S FDI_CSYNC_R H29 K34 PEG_RX7 Rb need placment near PCH +1.05V R354 *100/F_4 AR29 XDP_PRDY#
TP100
6 FDI_CSYNC FDI_CSYNC PEG_RX[7] F29 PRDY# AT29
4/30 CRB 1.0 Add Rb XDP_PREQ# TP57 CPU XDP
DPB_LANE0_N T28 PEG_RX[8] E28 PREQ#
26 IN_D2# T30 DDIB_TX#[0] PEG_RX[9] F31 AM34
DPB_LANE1_N XDP_TCLK
26 IN_D1# DDIB_TX#[1] PEG_RX[10] TCK TP42
DPB_LANE2_N U29 E30 AN33 XDP_TMS
26 IN_D0# DDIB_TX#[2] PEG_RX[11] TMS TP41
DPB_LANE3_N U31 F35 PM_SYNC (50ohm) 6 PM_SYNC R533 *0_4/S PM_SYNC_R AT28 AM33 XDP_TRST#
26 IN_CLK# DDIB_TX#[3] PEG_RX[12] PM_SYNC TRST# TP94
DPB_LANE0_P U28 E34 Trace Length: 1~11.25 inches
26 IN_D2 U30 DDIB_TX[0] PEG_RX[13] F33 AM31
Intel(R) DDI
DPB_LANE1_P C729 *0.1U/10V_4 XDP_TDI_R TP36

26 IN_D1 V29 DDIB_TX[1] PEG_RX[14] D32 TDI AL33
DPB_LANE2_P XDP_TDO
PWR MANAGEMENT
JTAG & BPM

26 IN_D0 DDIB_TX[2] PEG_RX[15] TDO TP39
DPB_LANE3_P V31 R502 *0_4/S H_PWRGOOD_R AL34
26 IN_CLK DDIB_TX[3] 9 H_PWRGOOD UNCOREPW RGOOD
H35 C_PEG_TX#0 H_PWRGOOD (50ohm) R524 *1K_4
PEG_TX#[0] +3V
C T34 H34 C_PEG_TX#1 Trace Length: 1~11.25 inches R503 10K_4 C
U35 DDIC_TX#[0] PEG_TX#[1] J33 C_PEG_TX#2 AP33 XDP_DBRST#
FDI_CSYNC & FDI_INT DDIC_TX#[1] PEG_TX#[2] DBR# XDP_DBRST# 6
Trace length < 10000 Mils U32 H32 C_PEG_TX#3 PM_DRAM_PWRGD_R AC10
U33 DDIC_TX#[2] PEG_TX#[3] J31 C_PEG_TX#4 SM_DRAMPW ROK
Impendance = 50 ohm U34 DDIC_TX#[3] PEG_TX#[4] G30 AR30
C_PEG_TX#5 9,31 CPU_PLTRST#R XDP_BPM0 TP101
V35 DDIC_TX[0] PEG_TX#[5] C33 C_PEG_TX#6 BPM#[0] AN31 XDP_BPM1
T32 DDIC_TX[1] PEG_TX#[6] B32 C_PEG_TX#7 CPU RESET# BPM#[1] AN29 XDP_BPM2
TP53
TP59
V33 DDIC_TX[2] PEG_TX#[7] B31 AT26 BPM#[2] AP31 XDP_BPM3
DDIC_TX[3] PEG_TX#[8] 8,14,27,30,31,34 PLTRST# RESET# BPM#[3] TP99
A30 R531 *1.5K/F_4 AP30 XDP_BPM4
PEG_TX#[9] BPM#[4] TP95
P29 B29 CPU_PLTRST# (50ohm) AN28 XDP_BPM5
DDID_TX#[0] PEG_TX#[10] BPM#[5] TP56
N28 A28 Trace Length: 10~17 inches AP29 XDP_BPM6
P31 B27 R532 AP28 XDP_BPM7
N30 A26 7/26: DB phase modify
R29 DDID_TX#[3] PEG_TX#[13] B25 *750/F_4
P28 DDID_TX[0] PEG_TX#[14] A24
R31 DDID_TX[1] PEG_TX#[15]
P30 DDID_TX[2] J35 C_PEG_TX0 HSW_RPGA_EDS_PGA
eDP_RCOMP DDID_TX[3] PEG_TX[0] G34 C_PEG_TX1
E24 PEG_TX[1] H33 C_PEG_TX2
6,24,25 EDP_DISP_UTIL R59 *0_4
INT_eDP_HPD_Q
R27
P27
eDP_RCOMP
EDP_DISP_UTIL
PEG_TX[2]
PEG_TX[3]
G32
H31
C_PEG_TX3
C_PEG_TX4
DDR3_DRAMRST#_R (50ohm) DDR3 DRAM RESET
eDP_HPD PEG_TX[4] SM_DRAMPWROK Processor Input. To change the resistor values in the DRAMPWROK logic to reduce the Trace Length < 6 inches
H30 C_PEG_TX5 R471 *1K_4 R785 *0_4/S
EDP_AUXP N27 PEG_TX[5] B33 C_PEG_TX6 leakage on VDDPWRGOOD +1.35VSUS
24 EDP_AUXP eDP_AUX PEG_TX[6] +3VS5
EDP_AUXN M27 A32 C_PEG_TX7 PM_DRAM_PWRGD_C (50ohm)
24 EDP_AUXN eDP_AUX# PEG_TX[7] C31 Trace Length: < 1 inches R472 *0_4/S 3 1 CPU_DRAMRST#
eDP
PEG_TX[8] +1.35V_CPU 12,13 DDR3_DRAMRST#

B30
EDP_TXP0 R35 PEG_TX[9] C29
24 EDP_TXP0 eDP_TX[0] PEG_TX[10]
EDP_TXP1 P34 B28 C44 DG 498556 -> 1.8K 10/18: SI modify CPU_DRAMRST#_R Q29
24 EDP_TXP1
2
eDP_TX[1] PEG_TX[11] C27 R75 R66 0.1U/10V_4 R80 *ME2N7002E
PEG_TX[12] 10/22: SI modify
B26 100K_4 100K_4 *0_4 R468
PEG_TX[13] 8 DRAMRST_CNTRL_PCH
5
B C25 U2 1.8K/F_4 R464 B
EDP_TXN0 P35 PEG_TX[14] B24 2 *0_4 R467 C628 *4.99K/F_4
24 EDP_TXN0 eDP_TX#[0] PEG_TX[15] 31 DRAMRST_CNTRL_EC
EDP_TXN1 N34 4PM_DRAM_PWRGD_C R78 0_4 PM_DRAM_PWRGD_R *0.047U/10V_4
24 EDP_TXN1 eDP_TX#[1] R65 *0_4/S 1
38 51216PG 3,12,13 DRAMRST_CNTRL_DDR
HSW_RPGA_EDS_PGA 10/12: SI modify 74AHC1G09GW R79 FOR DS3 0529 remove
3
C930 R825 pull

C929 3.3K_4 *0.047U/10V_4 hi due to
EC is
DG 498556 -> 3.3K output pin
0.047U/10V_4 D15 *MEK500V-40 10/15: SI Del
+VCCIO_OUT 4,40
PM_DRAM_PWRGD (50ohm) PM_DRAM_PWRGD_R (50ohm) +VCCIOA_OUT 4
Trace Length: 2~7 inches Trace Length: 0.5~1 inches +1.05V 4,9,10,11,31,34,37
+1.35V_CPU 3,4,12,13,38
+1.35VSUS 3,4,12,13,38
+3VS5 6,7,9,10,34,36,38,39,42,44
+3V 6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
4/30 CRB V1.0 -> 10K PEG x8 disable (UMA only remove) Processor pull-up (CPU)
+VCCIO_OUT
DP & PEG Compensation H_PROCHOT# R257 62_4 +VCCIO_OUT
CLK_DPLL_SSCLKP R128 *10K_4
CLK_DPLL_SSCLKN R129 *10K_4
+VCCIOA_OUT R138 24.9/F_4 eDP_RCOMP
R218 14 PEG_TX[0..7] 14 PEG_TX#[0..7]
10K_4 XDP_TDO R234 51_4 +1.05V
XDP_TMS R239 *51_4
C_PEG_TX0 C688 0.22U/10V_4 PEG_TX0 C_PEG_TX#0 C697 0.22U/10V_4 PEG_TX#0 eDP_RCOMP XDP_TDI_R R226 *51_4
A INT_eDP_HPD_Q C_PEG_TX1 C705 0.22U/10V_4 PEG_TX1 C_PEG_TX#1 C707 0.22U/10V_4 PEG_TX#1 XDP_PREQ# R269 *51_4 A
Trace length < 100 Mils
C_PEG_TX2 C698 0.22U/10V_4 PEG_TX2 C_PEG_TX#2 C703 0.22U/10V_4 PEG_TX#2 XDP_TCLK R246 51_4
Trace Width 20 Mils Trace Spacing 25 Mils
3
C_PEG_TX3 C708 0.22U/10V_4 PEG_TX3 C_PEG_TX#3 C714 0.22U/10V_4 PEG_TX#3 XDP_TRST# R519 51_4 check
C_PEG_TX4 C699 0.22U/10V_4 PEG_TX4 C_PEG_TX#4 C704 0.22U/10V_4 PEG_TX#4
C_PEG_TX5 C690 0.22U/10V_4 PEG_TX5 C_PEG_TX#5 C700 0.22U/10V_4 PEG_TX#5 R132 24.9/F_4 PEG_COMP
+VCCIOA_OUT
2 C_PEG_TX6 C715 0.22U/10V_4 PEG_TX6 C_PEG_TX#6 C716 0.22U/10V_4 PEG_TX#6
352-(&75
EDP_HPD 24,25
C_PEG_TX7 C730 0.22U/10V_4 PEG_TX7 C_PEG_TX#7 C733 0.22U/10V_4 PEG_TX#7
PEG_RCOMP
Q12 R219
Trace length < 400 MILS 4XDQWD&RPSXWHU,QF
Trace width = 12 MILS
1
100K_4
ME2N7002E
Trace spacing = 15 MILS Size Document Number Rev
0.22uF AC coupling Caps for PCIE GEN1/2/3 0.22uF AC coupling Caps for PCIE GEN1/2/3 1% Custom SNB 1/4 (PCIE&DMI&FDI) 1A

5 4 3 2 1
5 4 3 2 1
Haswell Processor (DDR3)

U24C U24D
D D
V4 AA4
SA_CLK[0] M_A_CLKP0 12 13 M_B_DQ[63:0] SB_CLK[0] M_B_CLKP0 13
U4 Y4
12 M_A_DQ[63:0] SA_CLK#[0] M_A_CLKN0 12 SB_CLK#[0] M_B_CLKN0 13
M_A_DQ0 AR15 AD9 M_B_DQ0 AR18 AF10
SA_DQ[0] SA_CKE[0] M_A_CKE0 12 SB_DQ[0] SB_CKE[0] M_B_CKE0 13
M_A_DQ1 AT14 M_B_DQ1 AT18
M_A_DQ2 AM14 SA_DQ[1] M_B_DQ2 AM17 SB_DQ[1]
M_A_DQ3 AN14 SA_DQ[2] M_B_DQ3 AM18 SB_DQ[2]
M_A_DQ4 AT15 SA_DQ[3] V3 M_B_DQ4 AR17 SB_DQ[3] AA3
SA_DQ[4] SA_CLK[1] M_A_CLKP1 12 SB_DQ[4] SB_CLK[1] M_B_CLKP1 13
M_A_DQ5 AR14 U3 M_B_DQ5 AT17 Y3
SA_DQ[5] SA_CLK#[1] M_A_CLKN1 12 SB_DQ[5] SB_CLK#[1] M_B_CLKN1 13
M_A_DQ6 AN15 AC9 M_B_DQ6 AN17 AG10
SA_DQ[6] SA_CKE[1] M_A_CKE1 12 SB_DQ[6] SB_CKE[1] M_B_CKE1 13
M_A_DQ7 AM15 M_B_DQ7 AN18
M_A_DQ8 AM9 SA_DQ[7] M_B_DQ8 AT12 SB_DQ[7]
M_A_DQ9 AN9 SA_DQ[8] M_B_DQ9 AR12 SB_DQ[8]
M_A_DQ10 AM8 SA_DQ[9] V2 M_B_DQ10 AN12 SB_DQ[9] AA2
M_A_DQ11 AN8 SA_DQ[10] SA_CLK[2] U2 M_B_DQ11 AM11 SB_DQ[10] SB_CLK[2] Y2
M_A_DQ12 AR9 SA_DQ[11] SA_CLK#[2] AD8 M_B_DQ12 AT11 SB_DQ[11] SB_CLK#[2] AG9
M_A_DQ13 AT9 SA_DQ[12] SA_CKE[2] M_B_DQ13 AR11 SB_DQ[12] SB_CKE[2]
M_A_DQ14 AR8 SA_DQ[13] M_B_DQ14 AM12 SB_DQ[13]
M_A_DQ15 AT8 SA_DQ[14] M_B_DQ15 AN11 SB_DQ[14]
M_A_DQ16 AJ9 SA_DQ[15] V1 M_B_DQ16 AR5 SB_DQ[15] AA1
M_A_DQ17 AK9 SA_DQ[16] SA_CLK[3] U1 M_B_DQ17 AR6 SB_DQ[16] SB_CLK[3] Y1
M_A_DQ18 AJ6 SA_DQ[17] SA_CLK#[3] AC8 M_B_DQ18 AM5 SB_DQ[17] SB_CLK#[3] AF9
M_A_DQ19 AK6 SA_DQ[18] SA_CKE[3] M_B_DQ19 AM6 SB_DQ[18] SB_CKE[3]
M_A_DQ20 AJ10 SA_DQ[19] M_B_DQ20 AT5 SB_DQ[19]
M_A_DQ21 AK10 SA_DQ[20] M_B_DQ21 AT6 SB_DQ[20]
M_A_DQ22 AJ7 SA_DQ[21] M7 M_B_DQ22 AN5 SB_DQ[21] P4
SA_DQ[22] SA_CS#[0] M_A_CS#0 12 SB_DQ[22] SB_CS#[0] M_B_CS#0 13
M_A_DQ23 AK7 L9 M_B_DQ23 AN6 R2
SA_DQ[23] SA_CS#[1] M_A_CS#1 12 SB_DQ[23] SB_CS#[1] M_B_CS#1 13
M_A_DQ24 AF4 M9 M_B_DQ24 AJ4 P3
M_A_DQ25 AF5 SA_DQ[24] SA_CS#[2] M10 M_B_DQ25 AK4 SB_DQ[24] SB_CS#[2] P1
M_A_DQ26 AF1 SA_DQ[25] SA_CS#[3] M_B_DQ26 AJ1 SB_DQ[25] SB_CS#[3]
C M_A_DQ27 AF2 SA_DQ[26] M_B_DQ27 AJ2 SB_DQ[26] C
M_A_DQ28 AG4 SA_DQ[27] M_B_DQ28 AM1 SB_DQ[27]
M_A_DQ29 AG5 SA_DQ[28] M8 M_B_DQ29 AN1 SB_DQ[28] R4
SA_DQ[29] SA_ODT[0] M_A_ODT0 12 SB_DQ[29] SB_ODT[0] M_B_ODT0 13
M_A_DQ30 AG1 L7 M_B_DQ30 AK2 R3
SA_DQ[30] SA_ODT[1] M_A_ODT1 12 SB_DQ[30] SB_ODT[1] M_B_ODT1 13
M_A_DQ31 AG2 L8 M_B_DQ31 AK1 R1
M_A_DQ32 J1 SA_DQ[31] SA_ODT[2] L10 M_B_DQ32 L2 SB_DQ[31] SB_ODT[2] P2
M_A_DQ33 J2 SA_DQ[32] SA_ODT[3] M_B_DQ33 M2 SB_DQ[32] SB_ODT[3]
DDR SYSTEM MEMORY B

SA_DQ[33] SB_DQ[33]
DDR SYSTEM MEMORY A
M_A_DQ34 J5 M_B_DQ34 L4
M_A_DQ35 H5 SA_DQ[34] M_B_DQ35 M4 SB_DQ[34]
M_A_DQ36 H2 SA_DQ[35] M_B_DQ36 L1 SB_DQ[35]
H1 SA_DQ[36] AP15 M_A_DQSN[7:0] 12 M1 SB_DQ[36] AP18 M_B_DQSN[7:0] 13
M_A_DQ37 M_A_DQSN0 M_B_DQ37 M_B_DQSN0
M_A_DQ38 J4 SA_DQ[37] SA_DQS#[0] AP8 M_A_DQSN1 M_B_DQ38 L5 SB_DQ[37] SB_DQS#[0] AP11 M_B_DQSN1
M_A_DQ39 H4 SA_DQ[38] SA_DQS#[1] AJ8 M_A_DQSN2 M_B_DQ39 M5 SB_DQ[38] SB_DQS#[1] AP5 M_B_DQSN2
M_A_DQ40 F2 SA_DQ[39] SA_DQS#[2] AF3 M_A_DQSN3 M_B_DQ40 G7 SB_DQ[39] SB_DQS#[2] AJ3 M_B_DQSN3
M_A_DQ41 F1 SA_DQ[40] SA_DQS#[3] J3 M_A_DQSN4 M_B_DQ41 J8 SB_DQ[40] SB_DQS#[3] L3 M_B_DQSN4
M_A_DQ42 D2 SA_DQ[41] SA_DQS#[4] E2 M_A_DQSN5 M_B_DQ42 G8 SB_DQ[41] SB_DQS#[4] H9 M_B_DQSN5
M_A_DQ43 D3 SA_DQ[42] SA_DQS#[5] C5 M_A_DQSN6 M_B_DQ43 G9 SB_DQ[42] SB_DQS#[5] C8 M_B_DQSN6
M_A_DQ44 D1 SA_DQ[43] SA_DQS#[6] C11 M_A_DQSN7 M_B_DQ44 J7 SB_DQ[43] SB_DQS#[6] C14 M_B_DQSN7
M_A_DQ45 F3 SA_DQ[44] SA_DQS#[7] M_B_DQ45 J9 SB_DQ[44] SB_DQS#[7]
M_A_DQ46 C3 SA_DQ[45] M_B_DQ46 G10 SB_DQ[45]
M_A_DQ47 B3 SA_DQ[46] M_B_DQ47 J10 SB_DQ[46]
M_A_DQ48 B5 SA_DQ[47] M_B_DQ48 A8 SB_DQ[47]
E6 SA_DQ[48] AP14 M_A_DQSP[7:0] 12 B8 SB_DQ[48] AP17 M_B_DQSP[7:0] 13
M_A_DQ49 M_A_DQSP0 M_B_DQ49 M_B_DQSP0
M_A_DQ50 A5 SA_DQ[49] SA_DQS[0] AP9 M_A_DQSP1 M_B_DQ50 A9 SB_DQ[49] SB_DQS[0] AP12 M_B_DQSP1
M_A_DQ51 D6 SA_DQ[50] SA_DQS[1] AK8 M_A_DQSP2 M_B_DQ51 B9 SB_DQ[50] SB_DQS[1] AP6 M_B_DQSP2
M_A_DQ52 D5 SA_DQ[51] SA_DQS[2] AG3 M_A_DQSP3 M_B_DQ52 D8 SB_DQ[51] SB_DQS[2] AK3 M_B_DQSP3
M_A_DQ53 E5 SA_DQ[52] SA_DQS[3] H3 M_A_DQSP4 M_B_DQ53 E8 SB_DQ[52] SB_DQS[3] M3 M_B_DQSP4
M_A_DQ54 B6 SA_DQ[53] SA_DQS[4] E3 M_A_DQSP5 M_B_DQ54 D9 SB_DQ[53] SB_DQS[4] H8 M_B_DQSP5
M_A_DQ55 A6 SA_DQ[54] SA_DQS[5] C6 M_A_DQSP6 M_B_DQ55 E9 SB_DQ[54] SB_DQS[5] C9 M_B_DQSP6
M_A_DQ56 E12 SA_DQ[55] SA_DQS[6] C12 M_A_DQSP7 M_B_DQ56 E15 SB_DQ[55] SB_DQS[6] C15 M_B_DQSP7
B M_A_DQ57 D12 SA_DQ[56] SA_DQS[7] M_B_DQ57 D15 SB_DQ[56] SB_DQS[7] B
M_A_DQ58 B11 SA_DQ[57] M_B_DQ58 A15 SB_DQ[57]
M_A_DQ59 A11 SA_DQ[58] M_B_DQ59 B15 SB_DQ[58]
M_A_DQ60 E11 SA_DQ[59] M_B_DQ60 E14 SB_DQ[59]
SA_DQ[60] M_A_A[15:0] 12 SB_DQ[60] M_B_A[15:0] 13
M_A_DQ61 D11 V8 M_A_A0 M_B_DQ61 D14 R8 M_B_A0
M_A_DQ62 B12 SA_DQ[61] SA_MA[0] AC6 M_A_A1 M_B_DQ62 A14 SB_DQ[61] SB_MA[0] Y5 M_B_A1
M_A_DQ63 A12 SA_DQ[62] SA_MA[1] V9 M_A_A2 M_B_DQ63 B14 SB_DQ[62] SB_MA[1] Y10 M_B_A2
SA_DQ[63] SA_MA[2] U9 M_A_A3 SB_DQ[63] SB_MA[2] AA5 M_B_A3
SA_MA[3] AC5 M_A_A4 SB_MA[3] Y7 M_B_A4
SA_MA[4] AC4 M_A_A5 SB_MA[4] AA6 M_B_A5
SA_MA[5] AD6 M_A_A6 SB_MA[5] Y6 M_B_A6
V5 SA_MA[6] AC3 M_A_A7 R7 SB_MA[6] AA7 M_B_A7
12 M_A_BS#0 SA_BS[0] SA_MA[7] 13 M_B_BS#0 SB_BS[0] SB_MA[7]
U5 AD5 M_A_A8 P8 Y8 M_B_A8
AD1 AC2 M_A_A9 AA9 AA10 M_B_A9
V6 M_A_A10 R9 M_B_A10
SA_MA[10] AC1 M_A_A11 SB_MA[10] Y9 M_B_A11
SA_MA[11] AD4 M_A_A12 SB_MA[11] AF7 M_B_A12
U8 SA_MA[12] V7 M_A_A13 P7 SB_MA[12] P9 M_B_A13
12 M_A_CAS# SA_CAS# SA_MA[13] 13 M_B_CAS# SB_CAS# SB_MA[13]
U6 AD3 M_A_A14 R6 AA8 M_B_A14
12 M_A_RAS# SA_RAS# SA_MA[14] 13 M_B_RAS# SB_RAS# SB_MA[14]
U7 AD2 M_A_A15 P6 AG7 M_B_A15
12 M_A_WE# SA_W E# SA_MA[15] 13 M_B_WE# SB_W E# SB_MA[15]
AM3 +SM_VREF
TP16 AC7 SM_VREF F16 SMDDR_VREF_DQ0_M3 TP30 AG8
RSCD_AC7 SA_DIMM_VREFDQ SMDDR_VREF_DQ0_M3 12 RSVD_AG8
V10 F13 SMDDR_VREF_DQ1_M3 R10
RSCD_V10 SB_DIMM_VREFDQ SMDDR_VREF_DQ1_M3 13 RSVD_R10
RSVD_V10 must be grounded *1K_4 R470
HSW_RPGA_EDS_PGA *1K_4 R469 RSVD_R10 must be grounded HSW_RPGA_EDS_PGA
+1.35V_CPU
A
CPU SM_VREF 8/31: Intel suggestion A
R283 *0_6
R285 *0_6/S
R278
*1K/F_4
+SM_VREF R260 *0_6/S 1 3 +SM_VREF R261 *0_6 1 3
+VREF_CA_CPU DDR_VTTREF 12,38
R282
Q16
*ME2N7002E
Q17
*ME2N7002E
352-(&75
4XDQWD&RPSXWHU,QF
2
*1K_4 C400 R279

+1.35V_CPU 2,4,12,13,38
MAIND MAIND 10,39 +VREF_CA_CPU 12
*0.1U/10V_4 *1K/F_4
DRAMRST_CNTRL Size Document Number Rev
DRAMRST_CNTRL_DDR 2,12,13
1% Custom SNB 2/4 (DDR3 I/F) 1A

5 4 3 2 1
5 4 3 2 1
+VCCIN 95A
+VCC_CORE
U24F POWER
Haswell Processor (POWER)
+1.35V_CPU 4.2A
+1.35V_CPU
VDDQ Output Decoupling Recommendations
330uFx2
22uFx11
7343
0805
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
+VCCIOA_OUT 2
+VCCIO_OUT 2,40
+VCCIO_PCH 10
+1.5V 6,7,8,10,28,34,38,44

+1.35V_CPU 2,3,12,13,38
AA26 AB11 +1.05V 2,9,10,11,31,34,37
VCC1 VDDQ1 10uFx10 0805 5 onTOP, 5 on BOT inside socket cavity +VCC_CORE 40,41
AA28 AB2
AA34 VCC2 VDDQ2 AB5 +VCCST 2
AA30 VCC3 VDDQ3 AB8 +1.35VSUS 2,3,12,13,38
C650 C709 C668 AA32 VCC4 VDDQ4 AE11 C648 C161 C647
D 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AB26 VCC5 VDDQ5 AE2 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 D
AB29 VCC6
VCC7
VDDQ6
VDDQ7
AE5
+3VPCU
IO Thrm Protect
AB25 AE8
AB27 VCC8 VDDQ8 AH11
AB28 VCC9 VDDQ9 K11
AB30 VCC10 VDDQ10 N11
AB31 VCC11 VDDQ11 N8
For 65 degree, 1.8v limit, (SW)
C273 C198 C643
C286 C711 C284 AB33 VCC12 VDDQ12 T11 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 R774
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AB34 VCC13 VDDQ13 T2
AB32 VCC14 VDDQ14 T5 16.5K/F_4
AC26 VCC15 VDDQ15 T8
VCC16 VDDQ16 THRM_MOINTOR 31
AB35 W 11
VCC17 VDDQ17
2
AC28 W2
AD25 VCC18 VDDQ18 W5 C642 C160 C692 C62
AC30 VCC19 VDDQ19 W8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 0.1U/10V_4
1
C651 C194 C270 AD28 VCC20 VDDQ20
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AC32 VCC21 R775
AD31 VCC22
AC34 VCC23 3.3K/F_4
PEG AND DDR

AD34 VCC24
AD26 VCC25 For 75 degree, 1.2v limit, (HW)
C693 C221 C274
AD27 VCC26 K27 22U/6.3VS_8 22U/6.3VS_8 10U/6.3V_8
VCC27 RSVD THRM_MOINTOR1 31
AD29 L27
C644 C285 C646 AD30 VCC28 RSVD T27
VCC29 RSVD
2
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AD32 V27 R776
AD33 VCC30 RSVD N26
100K_4 NTC
C54
AD35 VCC31 RSVD AL27 0.1U/10V_4
1
AE26 VCC32 RSVD AK27 C665 C691 C272
AE32 VCC33 RSVD E17 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
AE28 VCC34 RSVD W 32
C AE30 VCC35 RSVD AL16 C
C695 C710 C713 AG28 VCC36 RSVD AL13
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AG34 VCC37 RSVD J27
AE34 VCC38 RSVD
AF25 VCC39 C197 C680 C243
AF26 VCC40 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
AF27 VCC41 4/30: CRB 1.0 add
AF28 VCC42
AF29 VCC43
C667 C158 C269 AF30 VCC44 +1.05V +VCCST
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AF31 VCC45
AF32 VCC46 C679 C664 C162 + C231 R256 *0_8
AF33 VCC47 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *330U/2V_7343
AF34 VCC48
AF35 VCC49 C392 C381
AG26 VCC50 *22U/6.3VS_8 *22U/6.3VS_8
AH26 VCC51 AN35 +VCCIO_OUT_R *0_1206/S R513
VCC52 VCCIO_OUT +VCCIO_OUT 300mA
C271 C196 C683 AH29
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AG30 VCC53 A23 +VCCIO_PCH_R *0/F_1206 R466
VCC54 VCCIO2PCH +VCCIO_PCH 300mA
AG32
AH32 VCC55 F22 +VCCIOA_OUT_R *0_1206/S R87
CORE SUPPLY
VCC56 VCOMP_OUT +VCCIOA_OUT

AH35
AH25 VCC57
VCC58 VSS_AP35
AP35 Power Test Propose
AH27
AH28 VCC59 +1.05V +1.05V +VCCIO_OUT
C666 C195 C645 AH30 VCC60
*22U/6.3VS_8 *22U/6.3VS_8 22U/6.3VS_8 AH31 VCC61 AM28 H_CPU_SVIDALRT# R510 *0_8
AH33 VCC62 VIDALERT# AM29 H_CPU_SVIDCLK
AH34 VCC63 VIDSCLK AL28 H_CPU_SVIDDAT R60
AJ25 VCC64 VIDSOUT 4/30: DG 498550 C753
VCC65 150/F_4
B AJ26 H27 PWR_DEBUG_R 0_4 R61 Haswell PWR_DEBUG requires a 150-Ohm pull-up resistor to PCH 1.05-V VCC 10U/6.3V_6 B
VCC66 PW R_DEBUG TP1 Core when routed to XDP
AJ27
SVID
AJ28 VCC67 AP34 0_4 R518 PWR_DEBUG_R

C682 C159 C681 AJ29 VCC68 VSS AT34
22U/6.3VS_8 22U/6.3VS_8 10U/6.3V_8 AJ30 VCC69 VSS AL22 +1.05V +VCCIO_PCH
AJ31 VCC70 VSS AT33 R62
AJ32 VCC71 VSS AM21 *10K_4 R462 0_6
AJ33 VCC72 VSS AM25
AJ34 VCC73 VSS AM22 CRB 1.0 stuff C631
AJ35 VCC74 VSS AM20 *4.7U/6.3V_6
G25 VCC75 VSS AM24
C649 C694 C712 H25 VCC76 VSS AL19
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 J25 VCC77 VSS AM23
K25 VCC78 VSS AT32
L25
M25
VCC79
VCC80
VSS
AT35
Layout note: It is recommended to shield VIDSOUT signal by SVID CLK CPU VDDQ
VCC81 RSVD_TP routing it in between the VIDSCLK and VIDALERT# signals.
N25 AR35
P25 VCC82 RSVD_TP AR32
R25 VCC83 RSVD_TP AL26 +1.35V_CPU +1.35VSUS
T25 VCC84 RSVD_TP
VCC Output Decoupling Recommendations VCC85
U25 H_CPU_SVIDCLK
VCC86 VR_SVID_CLK 40
470uFx4 7343 TOP socket side U26 R223 100_4 Placement close to CPU.
VCC87 +VCC_CORE
V25 7/26: DB sch modify, Del R23
V26 VCC88 AL35 +VCCIO_OUT
22uFx8 0805 4 on TOP, 4 on BOT near socket edge VCC89 VCC_SENSE VCC_SENSE 40 SVID DATA
W 26 Place PU resistor C235 0.1U/10V_4
W 27 VCC90 AK35
22uFx11 0805 TOP, inside socket cavity VCC91 VSS_SENSE VSS_SENSE 40 close to VR
Place PU resistor C225 *0.1U/10V_4
10uFx11 0805 BOT, inside socket cavity Y25 R222 100_4 close to CPU DG V0.7 -> 110 Ohm
SENSE LINES
Y26 VCC92 R253

Y27 VCC93 SCH V0.7 -> 130 Ohm Note: please keep plane is enough for VDDQ 4.2A
Sense resistor should be placed within 2 130/F_4
A Y28 VCC94 A
VCC95 inches (50.8 mm) of the processor socket
Y29 H_CPU_SVIDDAT
VCC96 VR_SVID_DATA 40
Y30 Trace Impendence 50 ohm
Y31 VCC97 P
VCC98 Place PU resistor close to CPU
Y32 The VIDALERT# signal must have a damping resistor to prevent
Y33 VCC99
overshoot
Y34
Y35
VCC100
VCC101
C337 0.1U/10V_4
SVID ALERT 352-(&75
K26
F25
VCC102
VCC103 +VCCIO_OUT R247 75/F_4 DG V0.7 -> 44 Ohm 4XDQWD&RPSXWHU,QF
VCC104 SCH V0.7 -> 43 Ohm
HSW_RPGA_EDS_PGA H_CPU_SVIDALRT# R248 43_4 Size Document Number Rev
VR_SVID_ALERT# 40
1% Custom SNB 3/4 (POWER) 1A

5 4 3 2 1
5 4 3 2 1
A10
U24G
Haswell Processor (GND)
AK34
U24H
Haswell Processor (RESERVED, CFG)
TP98
CFG0
CFG1
AT20
AR20
U24E
CFG[0]

A13 VSS1 VSS81 AK5 TP96 AP20 CFG[1]
CFG2
A16 VSS2 VSS82 AL1 B34 K10 CFG3 AP22 CFG[2]
A19 VSS3 VSS83 AL10 B4 VSS161 VSS234 K2 TP55 AT22 CFG[3]
CFG4
A22 VSS4 VSS84 AL11 B7 VSS162 VSS235 K29 CFG5 AN22 CFG[4]
A25 VSS5 VSS85 AL12 C1 VSS163 VSS236 K3 CFG6 AT25 CFG[5]
A27 VSS6 VSS86 AL14 C10 VSS164 VSS237 K31 CFG7 AN23 CFG[6] C23
D A29 VSS7 VSS87 AL15 C13 VSS165 VSS238 K33 AR24 CFG[7] RSVD_TP B23 TP87 D
CFG8
A3 VSS8 VSS88 AL17 C16 VSS166 VSS239 K35 AT23 CFG[8] RSVD_TP D24 TP86
R786 *1K_4 CFG9 EC_PWROK 6,31
A31 VSS9 VSS89 AL18 C19 VSS167 VSS240 K4 CFG10 AN20 CFG[9] RSVD_TP D23
A33 VSS10 VSS90 AL2 C2 VSS168 VSS241 K5 CFG11 AP24 CFG[10] RSVD_TP R131
A4 VSS11 VSS91 AL20 C22 VSS169 VSS242 K7 CFG12 AP26 CFG[11]
VSS12 VSS92 VSS170 VSS243 CFG[12] *6.04K_4
A7 AL21 C24 K8 CFG13 AN25
AA11 VSS13 VSS93 AL23 C26 VSS171 VSS244 K9 CFG14 AN26 CFG[13]
AA25 VSS14 VSS94 E22 C28 VSS172 VSS245 L11 CFG15 AP25 CFG[14] G6
VSS15 VSS95 VSS173 VSS246 12/11: Intel suggestion WW39 CPU date code can CFG[15] FC_G6
AA27 AL3 C30 L26 remove CFG16 AR21
AA31 VSS16 VSS96 W9 C32 VSS174 VSS247 L6 CFG17 AP21 CFG[16]
CFG
AA29 VSS17 VSS97 AL4 C34 VSS175 VSS248 M11 CFG18 AR23 CFG[17] AR33 R130
AB1 VSS18 VSS98 AL5 C4 VSS176 VSS249 M26 CFG19 AP23 CFG[18] RSVD
VSS19 VSS99 VSS177 VSS250 CFG[19] *2.67K_4
AB10 AL6 C7 M28 AM27
AA33 VSS20 VSS100 AL7 D10 VSS178 VSS251 M30 RSVD AM26
AA35 VSS21 VSS101 AL8 D13 VSS179 VSS252 M32 49.9/F_4 R280 CFG_RCOMP AT31 RSVD F5
AB3 VSS22 VSS102 AL9 D16 VSS180 VSS253 M34 CFG_RCOMP RSVD AM2
VSS23 VSS103 VSS181 VSS254 RSVD
AC25
VSS24 VSS104
AM10 D19
VSS182 VSS255
M6
RSVD
K6 ^/
AC27 AM13 D22 N1
VSS25 VSS105 VSS183 VSS256
AB4
VSS26 VSS106
AM16 D25
VSS184 VSS257
N10
TP51
AT1
RSVD_TP W
AB6 AM19 D27 N2 AT2 E18
AB7 VSS27 VSS107 E25 D29 VSS185 VSS258 N29 TP54 AD10 RSVD_TP RSVD
VSS28 VSS108 VSS186 VSS259 TP24 RSVD_TP
AB9 AM32 D31 N3
AC11 VSS29 VSS109 AM4 D33 VSS187 VSS260 N31
AD11 VSS30 VSS110 AM7 D35 VSS188 VSS261 N33 U10
AC29 VSS31 VSS111 AN10 D4 VSS189 VSS262 N35 A34 RSVD P10
AC31 VSS32 VSS112 AN13 D7 VSS190 VSS263 N4 TP88 A35 RSVD_TP RSVD
AC33 VSS33 VSS113 AN16 E1 VSS191 VSS264 N5 RSVD_TP
AC35 VSS34 VSS114 AN19 E10 VSS192 VSS265 N6
AD7 VSS35 VSS115 AN2 E13 VSS193 VSS266 N7 W 29 B1
AE1 VSS36 VSS116 AN21 E16 VSS194 VSS267 N9 W 28 RSVD_TP NC A2
VSS37
VSS VSS117 VSS195
VSS VSS268 RSVD_TP RSVD
RESERVED
C AE10 AN24 E4 P11 R124 49.9/F_4 RSVD30 G26 AR1 C
AE25 VSS38 VSS118 AN27 E7 VSS196 VSS269 P26 W 33 TESTLO_G26 RSVD_TP
AE29 VSS39 VSS119 AN30 F10 VSS197 VSS270 P5 AL30 RSVD
AE3 VSS40 VSS120 AN34 F11 VSS198 VSS271 R11 AL29 RSVD
AE27 VSS41 VSS121 AN4 F12 VSS199 VSS272 R26 RSVD
AE35 VSS42 VSS122 AN7 F14 VSS200 VSS273 R28 E21
VSS43 VSS123 VSS201 VSS274 RSVD_TP TP7
AE4 AP1 F15 R30 E20
VSS44 VSS124 VSS202 VSS275 RSVD_TP TP8
AE6 AP10 F17 R32 C35
AE7 VSS45 VSS125 AP13 F18 VSS203 VSS276 R34 B35 RSVD_TP
AE9 VSS46 VSS126 AP16 F20 VSS204 VSS277 R5 RSVD_TP
AF11 VSS47 VSS127 AP19 F21 VSS205 VSS278 T1 AL25
AF6 VSS48 VSS128 AP4 F23 VSS206 VSS279 T10 RSVD_TP
AF8 VSS49 VSS129 AP7 F24 VSS207 VSS280 T29
AG11 VSS50 VSS130 W 25 F26 VSS208 VSS281 T3 AP27
AG25 VSS51 VSS131 Y11 F28 VSS209 VSS282 T31 RSVD AR26
VSS52 VSS132 VSS210 VSS283 For CPU debug. RSVD
AE31 AR13 F30 T33 RSVD38 W 30
VSS53 VSS133 VSS211 VSS284 TP9 RSVD_TP
AG31 AR16 F32 T35 RSVD39 W 31
AE33 VSS54 VSS134 AR19 F34 VSS212 VSS285 TP10 RSVD_TP
AG6 VSS55 VSS135 AR2 F4 VSS213 T4 AL31
AH1 VSS56 VSS136 AR22 F6 VSS214 VSS293 T6 R201 49.9/F_4 TESTLO W 34 RSVD AL32
AH10 VSS57 VSS137 AR25 F7 VSS215 VSS294 T7 TESTLO RSVD
AH2 VSS58 VSS138 AR28 F8 VSS216 VSS295 T9
AG27 VSS59 VSS139 AR31 F9 VSS217 VSS296 U11
AG29 VSS60 VSS140 AR34 G1 VSS218 VSS297 U27
AH3 VSS61 VSS141 AR4 G11 VSS219 VSS298 V11
AG33 VSS62 VSS142 AR7 G2 VSS220 VSS299 V28
AG35 VSS63 VSS143 AT10 G27 VSS221 VSS300 V30
AH4 VSS64 VSS144 AT13 G29 VSS222 VSS301 V32
AH5 VSS65 VSS145 AT16 G3 VSS223 VSS302 V34
AH6 VSS66 VSS146 AT19 G31 VSS224 VSS303 W1
B AH7 VSS67 VSS147 AT21 G33 VSS225 VSS304 W 10 B
AH8 VSS68 VSS148 AT24 G35 VSS226 VSS305 W3
AH9 VSS69 VSS149 AT27 G4 VSS227 VSS306 W 35
AJ11 VSS70 VSS150 AT3 G5 VSS228 VSS307 W4
AJ5 VSS71 VSS151 AT30 H10 VSS229 VSS308 W6
AK11 VSS72 VSS152 AT4 H26 VSS230 VSS309 W7
AK25 VSS73 VSS153 AT7 H6 VSS231 VSS310 AR10 HSW_RPGA_EDS_PGA
AK26 VSS74 VSS154 B10 H7 VSS232 VSS311 J28
AK28 VSS75 VSS155 B13 J11 VSS233 VSS312 H11
AK29 VSS76 VSS156 B16 J26 VSS286 VSS313 AL24
AK30 VSS77 VSS157 B19 J30 VSS287 VSS314 F19
AK32 VSS78 VSS158 B2 J32 VSS288 VSS315 T26
E19 VSS79 VSS159 B22 J34 VSS289 VSS316
VSS80 VSS160 J6 VSS290 CFG[3] (PHYSICAL_DEBUG_ENABLED (DFX PRIVACY))
K1 VSS291 AK33
VSS292 RSVD 0 Enable; SET DFX ENABLED BIT IN DEBUG
1 , Disable;
HSW_RPGA_EDS_PGA HSW_RPGA_EDS_PGA
CFG3 R272 *1K_4
CFG[6:5] (PCIE Port Bifurcation Straps)

The CFG signals have a default value of '1' if not terminated on the board.
Processor Strapping 11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1 0 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
A
CFG2 A
(PEG Static Lane Reversal) Normal Operation Lane Reversed CFG2 R275 *1K_4
CFG4 CFG4 R271 1K_4

(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP CFG7 R273 *1K_4
352-(&75
CFG7 PEG train immediately following PEG wait for BIOS training CFG5 R274 1K_4 4XDQWD&RPSXWHU,QF
(PEG Defer Training) xxRESETB de assertion CFG6 R270 *1K_4
1% Custom SNB 4/4 (GND) 1A

5 4 3 2 1
5 4 3 2 1
2 DMI_RXN0
Lynx Point
U33C
AW 22
AR20 DMI0RXN
(DMI,FDI,PM)
FDI_RXN0
AJ35
AL35 FDI_TXN0 2
Lynx Point
U33D
( DDI)

2 DMI_RXN1 DMI1RXN FDI_RXN1 FDI_TXN1 2
AP17 AJ36
2 DMI_RXN2 DMI2RXN FDI_RXP0 FDI_TXP0 2
AV20 AL36 K36
2 DMI_RXN3 DMI3RXN FDI_RXP1 FDI_TXP1 2 25 LVDS_BLON EDP_BKLTEN
AY22 G36
2 DMI_RXP0 DMI0RXP 25 DISP_ON EDP_VDD_EN
AP20
2 DMI_RXP1 DMI1RXP
D AR17 AL39 N36 D
2 DMI_RXP2 DMI2RXP FDI_CSYNC FDI_CSYNC 2 2,24,25 DPST_PWM EDP_BKLTCTL
AW 20
2 DMI_RXP3 DMI3RXP AL40
FDI_INT FDI_INT 2
BD21 R40
2 DMI_TXN0 DMI0TXN DDPB_CTRLCLK SDVO_CLK 26
BE20 AT45 R714 *0_4/S R39
2 DMI_TXN1 DMI1TXN FDI_IREF +1.5V DDPB_CTRLDATA SDVO_DATA 26
BD17
2 DMI_TXN2 DMI2TXN
BE18
2 DMI_TXN3 DMI3TXN
INT. HDMI
AR44 R713 7.5K/F_4 H45
BB21 FDI_RCOMP DDPB_AUXN H43
2 DMI_TXP0 DMI0TXP DDPB_AUXP
LVDS
BC20 K40 DPB_HPD_Q
2 DMI_TXP1 DMI1TXP DDPB_HPD
BB17
2 DMI_TXP2 DMI2TXP
BC18
2 DMI_TXP3 DMI3TXP
DMI
FDI
AV43
TP16 AY45
R672 *0_4/S DMI_IREF BE16 TP5 AV45
+1.5V DMI_IREF TP15
R671 7.5K/F_4 DMI_COMP AY17 AW 44 PD Res place close to PCH
DMI_IRCOMP TP10 AU42
TP17 AU44
TP13 PCH to Res routeing 37.5 ohm Impedance.
Digital Display Interface

AW 17 Res to connector filter routeing 50ohm Impedance.
AV17 TP12 R35
TP7 DDPC_CTRLCLK R36
DDPC_CTRLDATA
5/16 for DS3 for DS3
C8 DSWVREN
DSW VRMEN 23 CRT_B
SUSWARN# *0_4 R387 R627 0_4 R430 150/F_4 T45 K43
DPWROK_EC 31 CRT_BLUE DDPC_AUXN
U44 K45
0_4 R606 SUSACK# R6 System Power Management L13 DPWROK R661 *0_4 RSMRST#
23 CRT_G
R431 150/F_4 V45 CRT_GREEN DDPC_AUXP K38
31 SUSACK#EC SUSACK# DPW ROK CRT_RED DDPC_HPD
23 CRT_R
R432 150/F_4
C 0_4 R651 XDP_DBRST#1 AM1 K3 PCIE_WAKE# M43 C
2 XDP_DBRST# SYS_RESET# W AKE# PCIE_WAKE# 27,30,31,34 23 DDCCLK CRT_DDC_CLK
M45
23 DDCDATA CRT_DDC_DATA
(+3V)
SYS_PWROK R573 0_4 SYS_PWROK_R AD7 AN7 CLKRUN#
SYS_PW ROK CLKRUN# CLKRUN# 31
DG V0.7 -> 33 ohm 23 HSYNC_COM R719 33_4 PCH_HSYNC_R N42
R612 *0_4 R717 33_4 PCH_VSYNC_R N44 CRT_HSYNC
6,40 IMVP_PWRGD (+3VS5) SCH V0.7 -> 0 ohm 23 VSYNC_COM CRT_VSYNC
R634 0_4 EC_PWROK_R F10 U7 SUS_STAT#
5,31 EC_PWROK PW ROK SUS_STAT# / GPIO61 (SUS) TP66
(+3VS5) R716 649/F_4 DAC_IREF U40

EC_PWROK_R R640 0_4 APWROK_R AB7 Y6 PCH_SUSCLK_L R599 0_4 U39 DAC_IREF N40
APW ROK SUSCLK / GPIO62 (SUS) PCH_SUSCLK 7,31 CRT_IRTN DDPD_CTRLCLK N38
DDPD_CTRLDATA
12/17 PV modify (+3VS5) TP107 DAC_IREF (50ohm)
PM_DRAM_PWRGD H3 Y7 Trace length < 500 MILS
DRAMPW ROK SLP_S5# / GPIO63 ( SUS) TP72
J42
Trace spacing = 30 MILS DDPD_AUXN J44
RSMRST# J2 C6 R662 0_4 DDPD_AUXP H39
31 RSMRST# RSMRST# SLP_S4# SUSC# 31 DDPD_HPD
5/16 for DS3
R604 0_4 SUSWARN# J4 H1 R607 0_4
31 SUSWARN#EC SUSW ARN#/SUSPW RDNACK/GPIO30 (SUS) SLP_S3# SUSB# 31
CRT
Reserve from EMI request
(+3VS5)
R603 0_4 DNBSWON#_R K1 F3 CRT_B
31 DNBSWON# PW RBTN# SLP_A# TP71
CRT_G
5/16 for DS3 5/16 for DS3 CRT_R
R565 0_4 AC_PRESENT_R E6 F1 R663 0_4
31 AC_PRESENT ACPRESENT / GPIO31(DSW ) SLP_SUS# SLP_SUS#EC 31
(DSW) LPT_PCH_M_EDS/BGA
PM_BATLOW# K7 AY3 C577 C578 C579
BATLOW # / GPIO72 (SUS) PMSYNCH PM_SYNC 2
PM_RI# N4 G5 SLP_LAN# *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4
B SYS_PWROK_R RI# DSW (+3VS5) SLP_LAN#
B
AB10 D2
TP75 TP21 SLP_W LAN#/ GPIO29 ( DSW ) +3V_DEEP_SUS 7,8,9,10,39
C827
+3V_RTC 7,10,11
*0.1U/10V_4 LPT_PCH_M_EDS/BGA
+1.05V 2,4,9,10,11,31,34,37
+3VPCU 4,7,9,11,25,31,32,34,35,36
+3VS5 2,7,9,10,34,36,38,39,42,44
+3V 2,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
+5V 7,23,26,28,29,32,33,34,39
Reserve for power on sequence
PCH Pull-high/low(CLG)
+3V_DEEP_SUS System PWR_OK(CLG)
for DS3
PM_DRAM_PWRGD R806 *200/F_4
PM_RI# R624 10K_4
^/ 7/26 DB Modify
SUS_STAT# R803 *10K_4
PCIE_WAKE# R625 *1K_4 R608 *0_4/S IMVP_PWRGD

SLP_LAN# IMVP_PWRGD 6,40
R579 *10K_4
SUSACK# R605 *10K_4
SUSWARN# R626 *10K_4
PCIE_WAKE# R798 1K_4 SYS_PWROK R585 *0_4 EC_PWROK

+3VS5
PM_BATLOW# R586 8.2K_4
DNBSWON#_R R660 *10K_4
AC_PRESENT_R R580 10K_4 R635
10K_4
R566 *100K_4 ^/
A A
DPWROK R794 100K/F_4
+3V
10/17: SI Modify change to 10 Kohm
7/26 DB Modify
CLKRUN# R633 10K_4
XDP_DBRST# R590 1K_4

+3V_RTC R665 330K_4 DSWVREN
352-(&75
R614 *1K_4 INT HDMI Detect Function On Die DSW VR Enable
4XDQWD&RPSXWHU,QF
RSMRST# R643 10K_4 DPB_HPD_Q R721 *0_4/S High = Enable (Default) Size Document Number Rev
HDMI_HPD_CON 26
Low = Disable
1% Custom PCH 1/6 (DMI/FDI/VIDEO) 1A
Date: Monday, December 24, 2012 Sheet 6 of 44

5 4 3 2 1
5 4 3 2 1
Lynx Point (HDA,JTAG,SATA)

+1.05V 2,4,9,10,11,31,34,37
TP65 +3V_RTC 6,10,11 ^/D
U33A +3VPCU 4,9,11,25,31,32,34,35,36
R760
TP69
0_4 RTC_X1 B5 A20
+3V 2,6,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
+3V_DEEP_SUS 6,8,9,10,39 RTC Clock 32.768KHz
11 CLKGEN_RTC_X1 RTCX1 LAD0 LAD0 31,34 +3VS5 2,6,9,10,34,36,38,39,42,44
C20
LAD1 LAD1 31,34 +5V 23,26,28,29,32,33,34,39
RTC_X2 B4 A18
RTCX2 LAD2 LAD2 31,34 +3V_RTC_0 11
C18 C530 *18P/50V_4 RTC_X1_1 R778 *0_4 RTC_X1
LAD3 LAD3 31,34
RTC_RST# D9
RTCRST#
2
1
TP114 B21
LFRAME# LFRAME# 31,34
LPC
B9
RTC
SRTC_RST#
SRTCRST# D21 PCH_DRQ#0 Y3 R382
LDRQ0# TP115
R668 1M_4 SM_INTRUDER# A8 G20 PCH_DRQ#1 TP78 *32.768KHZ *10M_4
D
+3V_RTC INTRUDER# LDRQ1# / GPIO23 D
(+3V)
3
4
PCH_INVRMEN G10 AL11 SERIRQ R581 8.2K_4 C536 *18P/50V_4 RTC_X2_1 R779 *0_4 RTC_X2
INTVRMEN SERIRQ +3V
Reserve for EMI TP74 SERIRQ 31
BC8
ACZ_BCLK B25 SATA0RXN BE8 SATA_RXN4 33
HDA_BCLK SATA0RXP AW 8 SATA_RXP4 33 ODD (SATA2 3Gb/s)
A22 SATA0TXN AY8 SATA_TXN4 33
ACZ_SYNC
HDA_SYNC SATA0TXP SATA_TXP4 33
C849
*10P/50V_4 ACZ_SPKR AL10 BC10 WWs
28 ACZ_SPKR
ACZ_RST# C24
SPKR SATA1RXN
SATA1RXP
BE10
AV10
RTC Circuitry(RTC) 30mils
HDA_RST# SATA1TXN AW 10 +3V_RTC
SATA1TXP
L22 BB9 R739 20K/F_4 RTC_RST#
28 ACZ_SDIN0 HDA_SDIN0 SATA2RXN
6G
BD9
SATA2RXP
1
TP79 K22 AY13
HDA_SDIN1 SATA2TXN AW 13
SATA2TXP
G22
HDA_SDIN2 BC12
DG recommended that AC coupling capacitors should be
close to the connector (<100 mils) for optimal signal quality.
^/ C905
1U/6.3V_4
J2
*SOLDERJUMPER-2
2
SATA3RXN
SATA
F22 BE12
IHDA
HDA_SDIN3 SATA3RXP AR13 +3V_RTC_2
SATA3TXN +3VPCU
for DS3 AT13 R736 20K/F_4 SRTC_RST#
ACZ_SDOUT A24 SATA3TXP +3V_RTC_0 R735 *1K_4 +3V_RTC_1
HDA_SDO +3V_RTC_0
1
BD13
SATA4RXN / PERN1 SATA_RXN0 33
1
R686 10K_4 (+3V) BB13
+3V_DEEP_SUS SATA4RXP / PERP1 SATA_RXP0 33
GPIO33 B17 AV15 CN20 D13 C904 C903 J1
HDA_DOCK_EN# / GPIO33 SATA4TXN / PETN1 AW 15 SATA_TXN0 33 HDD0 (SATA3 6.0Gb/s) BAT_CONN *BAT54C 1U/6.3V_4 1U/6.3V_4 *SOLDERJUMPER-2
(+3VS5) SATA_TXP0 33
2
SIO_EXT_SCI# C22 SATA4TXP / PETP1
31 SIO_EXT_SCI# DFHD02MS119
2
HDA_DOCK_RST# / GPIO13
SATA5RXN / PERN2
BC14 WWs 85204-0200-2p-l
C BE14 C
SATA5RXP / PERP2 AP15
PCH_JTAG_TCK_R AB3 SATA5TXN / PETN2 AR15
RTC Power trace width 20mils.
TP112 JTAG_TCK SATA5TXP / PETP2
PCH_JTAG_TMS AD1 AY5 SATA_RCOMP R368 7.5K/F_4
TP113 JTAG_TMS SATA_RCOMP +1.5V
SATA_RCOMP
PCH_JTAG_TDI_R AE2
TP111 JTAG_TDI Impedance = 50 ohm PCH JTAG Debug(CLG)
Trace length < 500 mils HDA Bus(CLG)
JTAG
TP108 PCH_JTAG_TDO_R AD3

R391 0_4 F8 JTAG_TDO Trace spacing = 15 mils
C26 TP25 BIT_CLK_AUDIO R697 33_4 ACZ_BCLK +3VS5
TP22 28 BIT_CLK_AUDIO
TP68 AB6 DG V0.7 -> 750 ohm
TP20
SCH V0.7 -> 0 ohm EMI
PCH_SPI_CLK AJ11 BD4 SATA_IREF R372 *0_4/S R688 33_4 ACZ_RST#
SPI_CLK SATA_IREF +1.5V 28 ACZ_RST#_AUDIO
C855
PCH_SPI_CS0# AJ7 *33P/50V_4 R691 33_4 ACZ_SDOUT
SPI_CS0# 28 ACZ_SDOUT_AUDIO
SATA_LED# 32 R596 R654 R656
PCH_SPI_CS1# AL7 *210/F_4 *210/F_4 *210/F_4
AJ10 SPI_CS1# AP3 R584 10K_4 R407 *10K_4
SPI_CS2# SATALED# +3V +5V
2
PCH_JTAG_TMS
PCH_SPI_SI AH1 (+3V) AT1 DGT_STOP# R611 0_4 PCH_JTAG_TDI_R
SPI_MOSI SATA0GP / GPIO21 DGPU_HOLD_RST# 9,14
28 ACZ_SYNC_AUDIO R398 33_4 1 3 ACZ_SYNC PCH_JTAG_TDO_R
PCH_SPI_SO AH3 (+3V) AU2 BBS_BIT0 R629 *10K_4 PCH_JTAG_TCK_R
SPI_MISO SATA1GP / GPIO19 +3V
check Q23
PCH_SPI_IO2 AJ4 BA2 *2N7002K
12/13: PV modify
SPI
PCH_SPI_IO3 AJ2 SPI_IO2 TP9 BB2 DGT_STOP# R587 10K_4 R401 R811 0_4 R595 R617 R619 R657
SPI_IO3 TP8 +3V 9/21 Install for Intel DG
*1M_4 *100/F_4 *100/F_4 *100/F_4 *51_4
B
PCH Strap Table LPT_PCH_M_EDS/BGA
B
Pin Name Strap description Sampled Configuration Circuit

If EC support embedded flash , SPI
+SPI_PWR
0 = Default (weak pull-down 20K) power must be used S5_0N power rail
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode ACZ_SPKR R569 *1K_4 +3V PCH SPI ROM(CLG) for EC load code. R552 *0_4 +3VS5
0 = "top-block swap" mode R563 *1K_4 TP106 TP103 C792 C788 R556 *0_4/S +3V
PCI_GNT3# 8
GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (Int PU) TP104 TP102 *22P/50V_4 *22P/50V_4
0 = Disable PCH_SPI_CS1# R562 *0_4 U31

INTVRMEN Integrated 1.05V VRM enable ALWAYS 1 = Enable PCH_INVRMEN R389 330K_4 PCH_SPI_CS0# R561 0_4 PCH_SPI_CS0#R 1 8
+3V_RTC CE# VDD
PCH_SPI_CLK R544 33_4 6
R680 *0_4 PCH_SPI_SI R542 0_4 5 SCK
Flash Descriptor Security 0 = Override GPIO33 1 2 PCH_SPI_SO 2 SI 7
HDA_DOCK_EN#/GPIO33 Only for Interposer PWROK 1 = Default (weak pull-up 20K) +3V 10/18: SI Modify R554 0_4 R550 3.3K_4
SO HOLD#
[Need external pull-down for LPC BIOS] 3 4
GNT1# GNT0# W P# VSS C793
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK Boot Location Default weak pull-up on GNT0/1# +SPI_PWR
1 1 SPI BBS_BIT0 EN25QH32-104HIP 0.1U/10V_4
0 0 LPC R613 *1K_4
GPIO19 Boot BIOS Selection 0 [bit-0] PWROK R390 *1K_4 BBS_BIT1 8
R548 3.3K_4 BIOS_WP#
HDA_SYNC On-Die PLL VR Voltage Select RSMRST 0 = Support by 1.8V (weak pull-down)
+VCC_HDA_IO R684 *1K_4 ACZ_SYNC 12/13: PV modify
1 = Support by 1.5V PCH_SPI_IO2 R592 0_4
0 = Security Effect (Int PD) ACZ_SDOUT PCH_SPI_IO3
TP105
HDA_SDO Flash Descriptor Security PWROK 1 = Can be Overridden R693 *1K_4 +VCC_HDA_IO R591 0_4
31 GPIO33_E
Vender Size P/N

GPIO8 RSVD RSMRST# Internel PU R621 *1K_4
BT_OFF# 9,34
A
EON 4MB AKE39ZN0Q03 EON EN25QH32-104HIP A
GPIO28 On-die PLL Voltage Regulator RSMRST# 0 = Disable
1 = Enable (Int PU) R571 *1K_4 AMIC 4MB AKE39ZN0800 AMIC A25QE32M-F (QE)
PLL_ODVR_EN 9
SPI_MOSI iTPM function Disable APWROK 0 = Default (weak pull-down 20K) 10/18: Del R350 , R344 Socket DFHS08FS023
1 = Enable PCH_SPI_SI R374 *1K_4 +3V
GPIO62 / SUSCLK PLL On-Die Voltage

Regulator Enable RSMRST#
0 = Disable
1 = Enable (Int PU)
R564 *1K_4
PCH_SUSCLK 6,31 352-(&75
4XDQWD&RPSXWHU,QF
1% Custom PCH 2/6 (SATA/HDA/SPI) 1A

5 4 3 2 1
5 4 3 2 1

PCI/USBOC# Pull-up(CLG) Lynx Point (PCI,USB,NVRAM) Lynx Point (PCI-E,SMBUS,CLK)
+3V U33B
U33E
PCI_PIRQA# R695 8.2K_4 34 PCIE_RXN1 AW31
PCI_PIRQB# R698 8.2K_4 AY31 PERN1 / USB3RN3
34 PCIE_RXP1 PERP1 / USB3RP3 (+3VS5)
PCI_PIRQC# R689 8.2K_4 WLAN 34 PCIE_TXN1 C850 0.1U/10V_4 PCIE_TXN1_C BE32 N7 SMBALERT#
PCI_PIRQD# R699 8.2K_4 BA45 C846 0.1U/10V_4 PCIE_TXP1_C BC32 PETN1 / USB3TN3 SMBALERT# / GPIO11
TP1 34 PCIE_TXP1 PETP1 / USB3TP3 R10 SMB_PCH_CLK SMB_PCH_CLK 32
BC45 AT31 SMBCLK
+3V TP2 30 PCIE_RXN2_LAN PERN2/ USB3RN4
AR31 U11 SMB_PCH_DAT
30 PCIE_RXP2_LAN PERP2/ USB3RP4 SMBDATA SMB_PCH_DAT 32
RP5 BE44 LAN 30 PCIE_TXN2_LAN C851 0.1U/10V_4 PCIE_TXN2_LAN_C BD33
10 1 ACC_LED# TP3 C857 0.1U/10V_4 PCIE_TXP2_LAN_C BB33 PETN2/ USB3TN4
30 PCIE_TXP2_LAN PETP2/ USB3TP4 (+3VS5)
MPC_PWR_CTRL# 9 2 ACCEL_INTH# BE43 N8 DRAMRST_CNTRL_PCH
C- Link
TP4 SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH 2
D 8 3 BT_COMBO_EN# 27 PCIE_RXN3_CARD AW33 D
EDID_SELECT# 7 4 DGPU_SELECT# AY33 PERN3 U8 SMB_ME0_CLK
Thermal
LCD_BK 6 5
Cardreader 27 PCIE_RXP3_CARD
C864 0.1U/10V_4 PCIE_TXN3_CARD_C BE34 PERP3 SML0CLK
27 PCIE_TXN3_CARD PETN3
27 PCIE_TXP3_CARD C865 0.1U/10V_4 PCIE_TXP3_CARD_C BC34 R7 SMB_ME0_DAT
10K_10P8R_6 8.2K_4 R710 PCH_TP26 AY43 PETP3 SML0DATA
TD_IREF AT33
for DS3 PERN4 (+3VS5)
AF11 AR33 H6
SMBUS
SML1ALERT#_R TP67
CL_CLK1 BE36 PERP4 SML1ALERT# / PCHHOT# / GPIO74
PETN4 (+3VS5)
+3V_DEEP_SUS ZW,dW AF10 BC36 K6 SMB_ME1_CLK CLK_PCH_14M
CL_DATA1 PETP4 SML1CLK / GPIO58
(+3VS5)
RP3
CL_RST1#
AF7 AW36
PERN5 SML1DATA / GPIO75
N11 SMB_ME1_DAT RF
10 1 USB_OC6# AV36
USB_OC4# 9 2 USB_OC0# BD37 PERP5
USB_OC1# 8 3 PCH_AOCS# BB37 PETN5 C878
USB_OC2# 7 4 USB_OC5# PETP5
*22P/50V_4
USB_OC3# 6 5 AY38
AW38 PERN6 Y39
PERP6 CLKOUT_PEG_B_N TP85
10K_10P8R_6 BC38 Y38 TP84
BE38 PETN6 CLKOUT_PEG_B_P U4 CLK_PEGB_REQ# TP64
PCI-E*
AT40 PETP6 PEG_B_CLKRQ# / GPIO56
AT39 PERN7 CLK_33M_DEBUG
PERP7 (+3VS5)
BE40
AR26 B37 BC40 PETN7 AH43 CLK_PCH_ITPN CLK_33M_KBC
29 USB30_RX1- USB3RXN1 USBP0N USBP0- 29 PETP7 CLKOUT_ITPXDP_N TP118
29 USB30_RX2-
AW26
USB3RXN2 USBP0P
D37
USBP0+ 29
USB2.0 USB2.0/USB3.0 COMBO 1st AN38
PERN8 CLKOUT_ITPXDP_P
AH45 CLK_PCH_ITPP
AW29 A38 AN39
USB3RXN5 USBP1N USBP1- 29 USB2.0 USB2.0/USB3.0 COMBO 2nd PERP8
AR29 C38 BD42 AF35 CLK_DPLL_NSCCLKN 2 C880 C861
USB3RXN6 USBP1P USBP1+ 29 PETN8 CLKOUT_DPNS_N
AP26 A36 BD41 AF36 *22P/50V_4 *22P/50V_4
29 USB30_RX1+ USB3RXP1 USBP2N PETP8 CLKOUT_DPNS_P CLK_DPLL_NSCCLKP 2
AV26 C36 +1.5V R692 *0_4/S PCIE_IREF BE30
29 USB30_RX2+ USB3RXP2 USBP2P PCIE_IREF
AV29 A34 AJ40 CLK_DPLL_SSCLKN 2
AP29 USB3RXP5 USBP3N C34 CLKOUT_DP_N AJ39
USB3RXP6 USBP3P CLKOUT_DP_P CLK_DPLL_SSCLKP 2
29 USB30_TX1-
BE24
USB3TXN1 USBP4N
B33
USBP4- 25
R687 7.5K/F_4 PCIE_RCOMP BD29
PCIE_RCOMP ^/
h^ 29 USB30_TX2-
BD25
BE26 USB3TXN2 USBP4P
D33
F31
USBP4+ 25 Webcam BC30 CLKOUT_DMI_N
AF39
AF40
CLK_CPU_BCLKN
CLK_CPU_BCLKP
2
2
C USB3TXN5 USBP5N USBP5- 29 TP11 CLKOUT_DMI_P C
BD27 G31 Touch screen BB29
USB3TXN6 USBP5P USBP5+ 29 TP6
BD23 K31 AY24 CLK_BUF_PCIE_3GPLL#
29 USB30_TX1+ USB3TXP1 USBP6N CLKIN_DMI_N
BC24 L31 AW24 CLK_BUF_PCIE_3GPLL
29 USB30_TX2+ USB3TXP2 USBP6P CLKIN_DMI_P
BC26 G29
USB3TXP5 USBP7N
BE28
USB3TXP6 USBP7P
H29
A32 Ws CLK_PCH_SRC0N
CLK_PCH_SRC0P
Y43
Y45 CLKOUT_PCIE0N CLKIN_GND1_N
AR24
AT24
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
USBP8N C32 CLKOUT_PCIE0P CLKIN_GND1_P
USBP8P A30 CLK_PCIE_REQ0# AB1
USBP9N USBP9- 30 PCIECLKRQ0# / GPIO73 (+3VS5)
C30
USBP9P B29
USBP9+ 30 Right_USB CLK_PCH_SRC2N AA44 H33 CLK_BUF_DREFCLK#
USBP10N USBP10- 34 CLKOUT_PCIE1N CLKIN_DOT_96N
PCI_PIRQA# H20 D29 WLAN CLK_PCH_SRC2P AA42 G33 CLK_BUF_DREFCLK XTAL25_IN R761 0_4
PIRQA# USBP10P USBP10+ 34 CLKOUT_PCIE1P CLKIN_DOT_96P PCH_XTAL25_IN 11
PCI_PIRQB# L20 A28
PCI_PIRQC# K17 PIRQB# USBP11N C28 CLK_PCIE_REQ1# AF1 BE6 CLK_BUF_DREFSSCLK#
PIRQC# USBP11P PCIECLKRQ1# / GPIO18 (+3V) CLKIN_SATA_N
PCI_PIRQD# M20 G26 BC6 CLK_BUF_DREFSSCLK
PIRQD# USBP12N F26 CLK_PCH_CARD2N AB43 CLKIN_SATA_P R780 *0_4 XTAL25_IN_1 C890 *33P/50V_4
USBP12P 27 CLK_PCIE_CARDN CLKOUT_PCIE2N
34 BT_COMBO_EN# BT_COMBO_EN# A12 (+3V) F24 27 CLK_PCIE_CARDP CLK_PCH_CARD2P AB45
DGPU_SELECT# B13 GPIO50 USBP13N G24 CLKOUT_PCIE2P F45 CLK_PCH_14M
GPIO52 (+3V) USBP13P (+3V) REFCLK14IN
EDID_SELECT# C12 (+3V) 27 CLK_PCIE_REQ2# CLK_PCIE_REQ2# AF3 D17 CLK_PCI_FB R718 Y4 ^/
PCI
GPIO54 PCIECLKRQ2# / GPIO20/ SMI# CLKIN_PCILOOPBACK *1M_4
CLOCKS
*25MHZ
7 BBS_BIT1 BBS_BIT1 C10 (+3V) AD43 AM43 XTAL25_IN
ACC_LED# A10 GPIO51 AD45 CLKOUT_PCIE3N XTAL25_IN AL44 XTAL25_OUT R781 *0_4 XTAL25_OUT_1 C891 *33P/50V_4
32 ACC_LED# GPIO53 (+3V) CLKOUT_PCIE3P XTAL25_OUT
7 PCI_GNT3# PCI_GNT3# AL6 (+3V)
USB
GPIO55 CLK_PCIE_REQ3# T3
PCIECLKRQ3# / GPIO25 (+3VS5)
AM45 ICLK_IREF
R810 *0_4 MPC_PWR_CTRL# G17 AF43 ICLK_IREF AN44 ICLK_BIAS
change 25M to small size
25 LCD_BK R809 0_4 F17 PIRQE# / GPIO2 (+3V) AF45 CLKOUT_PCIE4N DIFFCLK_BIASREF R715 *0_4/S
34 ACCEL_INTH# L15 PIRQF# / GPIO3 (+3V) K24 USB_BIAS CLKOUT_PCIE4P R711 *7.5K/F_4
+1.5V
12,13 PM_EXTTS#0
M15 PIRQG# / GPIO4 (+3V) USBRBIAS# K26 CLK_PCIE_REQ4# V3 D44 CLK_PCI_TPM_R TP83 R712 7.5K/F_4
13 EXTTS#1 PIRQH# / GPIO5 (+3V) USBRBIAS PCIECLKRQ4# / GPIO26 (+3VS5) CLKOUT_33MHZ0 +VCCAXCK_VRM
R400
M33 22.6/F_4 AE44
PCI_PME# AD10 TP24 L33 AE42 CLKOUT_PCIE5N E44 CLK_PCI_CARD_R TP116
TP76 PME# TP23 CLKOUT_PCIE5P CLKOUT_33MHZ1
B PLTRST# Y11 P3 USB_OC0# 9 BOARD_ID0 AA2 (+3VS5) B42 CLK_PCH_PCI2 22_4 R681 CLK_PCI_FB B
PLTRST# (+3VS5) OC0# / GPIO59 V1 USB_OC1# PCIECLKRQ5# / GPIO44 CLKOUT_33MHZ2
(+3VS5) OC1# / GPIO40 U2 USB_OC2# AB40
(+3VS5) OC2# / GPIO41 P1 USB_OC3# AB39 CLKOUT_PCIE6N F41 CLK_PCH_PCI3 22_4 R709
check (+3VS5) OC3# / GPIO42 M3 USB_OC4# CLKOUT_PCIE6P CLKOUT_33MHZ3 CLK_33M_DEBUG 34
(+3VS5) OC4# / GPIO43 T1 USB_OC5# AE4 (+3VS5)
(+3VS5) OC5# / GPIO9 9 BOARD_ID1 PCIECLKRQ6# / GPIO45
MPC Switch Control N2 USB_OC6# A40 CLK_PCH_PCI4 22_4 R700
(+3VS5) OC6# / GPIO10 CLKOUT_33MHZ4 CLK_33M_KBC 31
M1 PCH_AOCS# AJ44
(+3VS5) OC7# / GPIO14 PCH_AOCS# 34 CLKOUT_PCIE7N
Low = MPC ON AJ42
CLKOUT_PCIE7P CLK_PCI_FB_R
MPC_PWR_CTRL# High = MPC OFF (Default)
LPT_PCH_M_EDS/BGA 9 BOARD_ID2 Y3 (+3VS5) (+3V) CLK_PCI_LPC_R
PCIECLKRQ7# / GPIO46 C40 CLK_FLEX0 TP81 CLK_PCI_EC_R
MPC_PWR_CTRL# R396 *1K_4 CLKOUTFLEX0 / GPIO64
CLK_PCH_PEGAN AB35 F38 CLK_FLEX1
CLK_PCH_PEGAP AB36 CLKOUT_PEG_A_N CLKOUTFLEX1 /(+3V)
GPIO65 CLK_FLEX1_48M 30
CLKOUT_PEG_A_P
FLEX CLOCKS
(+3VS5) F36 CLK_FLEX2 TP80
CLK_PEGA_REQ# AF6 CLKOUTFLEX2 / GPIO66
15 CLK_PEGA_REQ# PEG_A_CLKRQ# / GPIO47 (+3V)
F39 CLK_FLEX3
PLTRST#(CLG) SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG) +3V CLKOUTFLEX3 / GPIO67 TP82
+3V AD39 (+3V)

Q20 TP19
7/26 DB modify 12/18 PV modify CLK_PCIE_REQ1# R370 10K_4 AD38
PLTRST# 5 R352 2.2K_4 CLK_PCIE_REQ2# R378 10K_4 TP18
for DS3 +1.05V 2,4,9,10,11,31,34,37
+3V_DEEP_SUS +1.5V 6,7,10,28,34,38,44
13,24,31 MBCLK2 4 3 SMB_ME1_CLK
+3VS5 2,6,7,9,10,34,36,38,39,42,44
LPT_PCH_M_EDS/BGA
+3V 2,6,7,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
R349 +3V_DEEP_SUS CLK_PCIE_REQ0# R658 10K_4
+3V_DEEP_SUS 6,7,9,10,39
100K_4 2 CLK_PCIE_REQ3# R623 10K_4
CLK_PCIE_REQ4# R659 10K_4
1 6 SMB_ME1_DAT for DS3 SMBus/Pull-up(CLG)
13,24,31 MBDATA2
for DS3 CLK_PEGB_REQ# R602 10K_4 PCIE Clock +3V_DEEP_SUS
R346 2.2K_4 CLK_PEGA_REQ# Ra R598 *10K_4 34 CLK_PCIE_WLAN# CLK_PCH_SRC0N
PLTRST# PLTRST# 2,14,27,30,31,34 +3V CLK_PEGA_REQ# Rb R597 10K_4 WLAN 34 CLK_PCIE_WLAN CLK_PCH_SRC0P R351 1K_4 DRAMRST_CNTRL_PCH
2N7002DW R628 10K_4 SMBALERT#
A Q22 A
7/26 DB modify 34 PCIE_CLKREQ_WLAN# R620 *0_4/S CLK_PCIE_REQ0# R381 2.2K_4 SMB_PCH_CLK
5 SMB_RUN_DAT 12,13,24 SG : Rb ; UMA : Ra R380 2.2K_4 SMB_PCH_DAT
CLK_BUF_BCLK_N R406 10K_4 R384 2.2K_4 SMB_ME0_CLK
SMB_PCH_DAT 3 4 CLK_BUF_BCLK_P R405 10K_4 CLK_PCH_SRC2P R383 2.2K_4 SMB_ME0_DAT
30 CLK_PCIE_LANP
LAN CLK_PCH_SRC2N R386 10K_4 SML1ALERT#_R
PEG Clock detect (SG only) R356 4.7K_4 CLK_BUF_PCIE_3GPLL# R399 10K_4
30 CLK_PCIE_LANN
2 CLK_BUF_PCIE_3GPLL R402 10K_4 R361 *0_4/S CLK_PCIE_REQ1#
352-(&75
+3V 30 PCIE_CLKREQ_LAN#
R355 4.7K_4 CLK_BUF_DREFCLK# R409 10K_4
SMB_PCH_CLK 6 1 CLK_BUF_DREFCLK R408 10K_4
7/26 DB modify CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK
R669
R670
10K_4
10K_4
14 CLK_PCIE_VGA# RP4 2
0_4P2R_4 4
1
3
CLK_PCH_PEGAN
CLK_PCH_PEGAP
4XDQWD&RPSXWHU,QF
CLK_PCH_14M R708 10K_4
GPU 14 CLK_PCIE_VGA
2N7002DW SMB_RUN_CLK 12,13,24
Remove for UMA only. Size Document Number Rev
CLOCK TERMINATION for FCIM
1% Custom PCH 3/6 (PCIE/USB/CLK) 1A

5 4 3 2 1
5 4 3 2 1

Clock Gen Power OK (CLG)

+3V_DEEP_SUS 6,7,8,10,39
U33F
+3VS5 2,6,7,10,34,36,38,39,42,44
AT8 C16 +3V 2,6,7,8,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
R644 100_4 S_GPIO GPIO68 R679 10K_4
31 PCI_SERR# BMBUSY# / GPIO0 TACH4 / GPIO68 +3V +5VS5 23,29,30,34,36,37,38,39,40,41,42,43,44
SIO_EXT_SMI# F13 (+3V) (+3V) D13 GPIO69 R673 *1.5K/F_4
31 SIO_EXT_SMI# TACH1 / GPIO1 TACH5 / GPIO69 R674 10K_4 +3V
(+3V) (+3V)
BOARD_ID4 A14
TACH2 / GPIO6 TACH6 / GPIO70
G13 GPIO70 ^/
BOARD_ID5 G15 (+3V) (+3V) H15 GPIO71 PCH MISC PU /PD
TACH3 / GPIO7 TACH7 / GPIO71
D BT_OFF# Y1 (+3V) +3V D
7,34 BT_OFF# GPIO8 (+3V)
EC_A20GATE R638 10K_4
LAN_DISABLE#_R K13 (+3VS5) EC_RCIN# R609 10K_4
LAN_PHY_PW R_CTRL / GPIO12
RF_OFF# AB11 DSW AN10 +1.05V
34 RF_OFF# GPIO15 TP14 EC_A20GATE 31
PCH_THRMTRIP# R636 *1K_4
(+3VS5) AY1 R639 *0_4
PECI EC_PECI 2,31
Reserve R631 *0_4 ODD_PRSNT#_R AN2
33 ODD_PRSNT# SATA4GP / GPIO16 AT6 EC_RCIN#
RCIN# EC_RCIN# 31
(+3V)
DGPU_PWROK C14 AV3 for DS3
31,42,43,44 DGPU_PWROK TACH0 / GPIO17 PROCPW RGD H_PWRGOOD 2 GPIO Pull-up/Pull-down(CLG)
BIOS_REC BB4 (+3V) AV1 PCH_THRMTRIP# R637 390_4 MFG-TEST
GPIO
SCLOCK / GPIO22 THRMTRIP# PM_THRMTRIP#R 2,31
+3V_DEEP_SUS
CPU/MISC
DGPU_HOLD_RST# R388 *0_4 Y10 (+3V)
7,14 DGPU_HOLD_RST# GPIO24 +3V DGPU_HOLD_RST# R610 *10K_4
R345 0_4 GPIO27 R11 (+3VS5)
30,31 DSW_WAKE# GPIO27 MFG_MODE R567 10K_4 BT_OFF# R622 10K_4
R570 *0_4/S PLL_ODVR_EN_R AD11 (DSW) AU4 R630 *0_4/S
7 PLL_ODVR_EN GPIO28 PLTRST_PROC# CPU_PLTRST#R 2,31 +3V
AN6 (+3VS5)
R568 *0_4 ^/
+3V R588 10K_4 GPIO34
GPIO34 GPIO35 R649 10K_4
GPIO35 AP1 (+3V) SIO_EXT_SMI# R694 10K_4
TP110 GPIO35 / NMI#
R583 0_4 DGPU_PWR_EN_R AT3 (+3V)
9,42,43,44 DGPU_PR_EN SATA2GP / GPIO36 GPIO70 R364 10K_4
FDI_OVRVLTG AK1 (+3V) GPIO71 R371 10K_4
10/11: SI modify net name SATA3GP / GPIO37 ODD_PRSNT#_R R589 10K_4
MFG_MODE AT7 (+3V) DGPU_PWROK R677 *10K_4
SLOAD / GPIO38 Swap GPIO 0 = SGPIO
Power already stuffed. R616 10K_4
(+3V) 1 = Default +3V
C DGPU_PRSNT# AM3 GPIO49 R653 *10K_4 C
SDATAOUT0 / GPIO39 DGPU_PWROK R678 *10K_4
TEST_SET_UP AN4 (+3V) S_GPIO R646 1K_4
SDATAOUT1 / GPIO48 A2 R645 *0_4
GPIO27 (+3V) VSS_NCTF_5
TP109 GPIO49 AK3
SATA5GP / GPIO49 VSS_NCTF_6
A41
A43
^/
With Intel LAN: (+3V) VSS_NCTF_7
Connect to LANWAKE# pin on the LAN SV_DET U12 B1 LAN_DISABLE#_R R362 *10K_4
GPIO57 VSS_NCTF_9 +3VS5
B2 R578 10K_4
Without Intel LAN: (+3VS5) VSS_NCTF_10 B44 GPIO27
Used to wake event from DSx VSS_NCTF_11
BE41 VSS_NCTF_13
BA1
BC1
^/Z
VSS_NCTF_1 VSS_NCTF_14
for DS3
BD2
BE5 VSS_NCTF_16 BD44
+3VPCU VSS_NCTF_2 VSS_NCTF_17 BD45
C45 VSS_NCTF_18 BE2 +3V_DEEP_SUS
VSS_NCTF_3 VSS_NCTF_19 BE3
VSS_NCTF_20
2
A5 D1 RF_OFF# R572 1K_4

VSS_NCTF_4 VSS_NCTF_21 E1 R666 *0_4 BIOS_REC R667 10K_4
VSS_NCTF_22 +3V
DSW_WAKE# 1 3 GPIO27 E45
NCTF
VSS_NCTF_23 A4 Intel ME Crypto Transport Layer

Q39 VSS_NCTF_24 N10
VSS_NTCF_25 Security (TLS) cipher suite
*2N7002K A44 BIOS RECOVERY High = Disable (Default)
VSS_NCTF_8 B45 Low = Disable (Default) Low = Enable
VSS_NCTF_12 BD1 High = Enable
VSS_NCTF_15
10/16: SI modify
+3V
BIOS_RESP SV Detect 0 = SV Detect ^/
+3V
1 = Default
B U37 B
5
2 R632 *0_4 TEST_SET_UP R650 10K_4 R574 *100K_4

4
9,42,43,44 DGPU_PR_EN
1 DGPU_PWR_EN_R
SV_SET_UP SV_DET R575 10K_4 +3V_DEEP_SUS
3
WsD *U74AHC1G08G-AL5-R High = Strong (Default)

for DS3
WWsD LPT_PCH_M_EDS/BGA
GPIO36 Internal PD SATA3GP/GPIO37 TLS Confidentiality

BOARD ID SETTING
BOARD_ID0 0 = TLS no confidentiality (Int PD)
8 BOARD_ID0 +3V +3V
8 BOARD_ID1 BOARD_ID1 1 = TLS with confidentiality
8 BOARD_ID2 BOARD_ID2
BOARD_ID3 DGPU_PWR_EN_R R582 *1K_4 FDI_OVRVLTG R594 *1K_4
BOARD_ID3
BOARD_ID5 BOARD_ID4 BOARD_ID2 BOARD_ID1 BOARD_ID0
Model
for DS3
DB R63 UMA 0 0 0
RD0 BOARD_ID0
RU0
R359 *10K_4 R365 10K_4 +3V_DEEP_SUS
DB R63 DIS 0 0 1
RD1 BOARD_ID1
RU1
R618 10K_4 R655 *10K_4
A SI R63 UMA 0 0 0 A
RD2 RU2
R600 *10K_4 BOARD_ID2 R647 10K_4 GFX Present +3V
SI R63 DIS 0 0 1
WWsD Rb Ra
+3V R652 *100K_4 DGPU_PRSNT# R615 10K_4
PV R63 UMA 1 0 0
R676
RD4
10K_4 BOARD_ID4 R675
RU4
*10K_4 SG UMA
352-(&75
PV R63 DIS 1 0 1
Stuff Ra Rb
4XDQWD&RPSXWHU,QF
RD5 BOARD_ID5
RU5
R379 10K_4 R375 *10K_4
NC Rb Ra Size Document Number Rev
1% Custom PCH 4/6 (GPIO/MISC) 1A

5 4 3 2 1
5 4 3 2 1

+3V 2,6,7,8,9,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +VCCIO_PCH 4
0.15A (20mils)
Lynx Point (POWER) +3V_DEEP_SUS 6,7,8,9,39
+5VS5 23,29,30,34,36,37,38,39,40,41,42,43,44
+1.05V 2,4,9,11,31,34,37
+1.5V 6,7,8,28,34,38,44
+5V 7,23,26,28,29,32,33,34,39 +3VS5 2,6,7,9,34,36,38,39,42,44
+1.05V +VCCAXCK_VRM_R +VCCAXCK_VRM U33J POWER 0.26A (40mils)
R439 *1/F_4 L45 *10uH/100MA_8
R444 *0_8/S AF34 VCCSUS3_3[3]

R24 +V3.3A_VCCPUSB R418 *0_8/S +3V_DEEP_SUS
+1.05V
1.29A (60mils)
Lynx Point (POWER) +VCCA_DAC_1_2 +1.5V
+1.5V VCCVRM[5]
C603 R26 0.1U/10V_4 C557 70mA (15 mils)
10U/6.3V_8 VCCSUS3_3[4] +V1.05S_PCH_VCC U33G POWER L58
R28 for DS3 AA24
VCCSUS3_3[5] 1U/6.3V_4 C551 AA26 VCCCORE[1] HCB1608KF-181T15/1.5A_6
+VCC_AXCK_DCB +V1.05S_VCC_AXCK_DCB U26 AD20 VCCCORE[2] P45
VCCSUS3_3[6] 1U/6.3V_4 C556 AD22 VCCCORE[3] VCCADAC1_5 C892 10U/6.3V_8
R436 *0_8/S L44 *0_6/S AP45 AD24 VCCCORE[4] C889 0.1U/10V_4
+1.05V VCC[3] VCCCORE[5]
AD26 C883 0.01U/25V_4
1U/6.3V_4 C550 AD28 VCCCORE[6] P43 R723 *0_6
1.09A (40mils) VCCCORE[7] VSS
D C583 C594 +1.05V AE18 D
*10U/6.3V_8 1U/6.3V_4 U35 +V1.05S_VCCAUSB R426 *0_8/S 10U/6.3VS_6 C547 AE20 VCCCORE[8] R729 *0_8
VCCUSBPLL VCCCORE[9] +1.5V_LDO
0.1U/10V_4 C575 AE22
VCCCORE[10]
VCC CORE
AE24 13mA (10mils)
AE26 VCCCORE[11]
VCCCORE[12]
CRT
50mA (10mils) L24 +V3.3S_VCCAUBG R410 *0_8/S AG18 M31 +V3.3S_ADACBG R704 *0_6/S
VCC3_3[3] +3V VCCCORE[13] VCCADACBG3_3 +3V
0.1U/10V_4 C552 AG20
R425 *0_6/S +V3.3S_VCC_FLEX0 M29 AG22 VCCCORE[14] R702 *0_6
+3V VCCCLK3_3[1] VCCCORE[15] +3V_BG
1U/6.3V_4 C582 AG24
U30 +V1.05S_VCCUSBCORE R414 *0_8/S Y26 VCCCORE[16]
0.67A (40mils)
USB
VCCIO[11] +1.05V VCCCORE[17]
R412 *0_6/S +V3.3S_VCC_FLEX1 L29 V28 1U/6.3V_4 C558
+3V VCCCLK3_3[2] VCCIO[12]
1U/6.3V_4 C564 V30 +V1.05M_VCCASW AA18
VCCIO[13] +1.05V VCCASW[1]
Y30 3.629A (160mils) U18
R411 *0_6/S +V3.3S_VCC_FLEX23 L26 VCCIO[14] C548 1U/6.3V_4 U20 VCCASW[2]
+3V VCCCLK3_3[3] VCCASW[3]
1U/6.3V_4 C553 U22
M26 M24 C549 1U/6.3V_4 U24 VCCASW[4]
VCCCLK3_3[4] VSS V18 VCCASW[5]
VCCASW[6] 133mA (20mils)
HVCMOS
R417 *0_6/S +V3.3S_VCC_ASEPCI U32 C544 22U/6.3V_8 V20 R30
+3V VCCCLK3_3[5] VCCASW[7] VCC3_3[1]
1U/6.3V_4 C567 Y35 +V1.05M_VCCDUSBSUS *1U/6.3V_4 C562 V24 R32 +V3.3S_VCC_GIO R413 *0_6/S +3V
V32 DCPSUS2 Y18 VCCASW[8] VCC3_3[2]
VCCCLK3_3[6] 28mA (10mils) VCCASW[9]
Y20 0.1U/10V_4 C560
VCCASW[10]
Clock and Miscellaneous
Y22
V22 VCCASW[11]
0.26A (40mils) VCCASW[12]
+V1.05S_VCC_SSCFF R20
VCCSUS3_3[7] +V3.3A_VCCPSUS
0.3A (20mils) 1U/6.3V_4 C523 R348 5.11/F_4 +PCH_VCCDSW U14
R419 *0_8/S Y32 R22 DCPSUSBYP PCH VRM Power
+1.05V VCCCLK[1] VCCSUS3_3[8] +V1.05S_VCCAPLL_EXP +1.05V
1U/6.3V_4 C566 3.629A (160mils) +V1.05S_VCC_EXP AM18
AM20 VCCIO[1] BE22 L42 *1uH/25mA_6
15mA (10mils) for DS3
VCCMPHY
+VCCCLKF135 VCCIO[2] VCCVRM[4]
DMI / PCIE
AM22
A16 +VCCPDSW R392 *0_6/S AP22 VCCIO[3] R403 *0_8/S
VCCDSW3_3 +3VS5 VCCIO[4] +1.5V
R416 *0_6/S AD34 AR22
GPIO/LPC
+1.05V VCCCLK[2] VCCIO[5]

1U/6.3V_4 C561 C540 0.1U/10V_4 0.261A (40mils) AT22 *10U/6.3V_8 C555
VCCIO[6]
+V3.3A_VCCPSUS +V3.3A_VCCPSUS
AA30 AE14 +V3.3S_VCCPCORE R363 *0_8/S AK18
+V1.05S_VCC_SSCFF VCCCLK[3] VCC3_3[4] +3V VCCIO[10] +V1.05S_VCC_EXP
AA32 AF12
+V1.05S_VCCCLKF100 VCCCLK[4] VCC3_3[5] AG14 0.01U/25V_4 C534 AJ30
VCC3_3[6] VCCSUS3_3[1] 3.629A (160mils)
0.476A (30mils) AJ32
R421 *0_8/S AD35 VCCSUS3_3[2]
+1.05V VCCCLK[5]
1U/6.3V_4 C580 *1U/6.3V_4 C554 +VCCA_USBSUS AJ26
C +V1.05S_VCCSSCF100 U36 +V1.05S_VCCAUX R415 *0_6/S +1.05V *10U/6.3V_6 C559 AJ28 DCPSUS3_3[1] C
VCCIO[15] DCPSUS3_3[2] +V3.3M_VCCPSPI
R422 *0_8/S AG30 AA14 +VCCSST 0.1U/10V_4 C543
PCH VRM Power
+1.05V VCCCLK[6] DCPSST
1U/6.3V_4 C570 AG32 L41 *10uH/100mA_8 +VCCAPLL_USB3 AK26
VCCCLK[7] +1.05V VCCVRM[1]
R404 *0_8/S AK28 R373 *0_6
+1.5V VCCVRM[2] +3VS5
AD36 *10U/6.3V_8 C546
USB3
+V1.05S_VCCCLKF100 VCCCLK[8]
AE30 AK20
VCCCLK[9] +V1.05S_VCC_EXP VCCIO[7]
SPI
AE32 P18 +V3.3S_VCCPFUSE R397 *0_6/S +3V AD12 R367 *0_6/S
+V1.05S_VCCSSCF100 VCCCLK[10] VCC[1] VCCSPI +3V
P20 R395 *0_6 +1.05V *1U/6.3V_4 C542 +V1.05M_VCCSUS Y12
VCC[2] 1U/6.3V_4 C545 DCPSUS1 1U/6.3V_4 C533
PCH VRM Power 98mA (15mils)
L43 *1uH/25mA_6 +V1.05S_VCCAPLL_FDI 22mA (10mils)
+1.05V
0.15A (20mils) L17 PCH_VCC_1_1_20 R394 *0_6/S +1.05V R433 *0_8/S *10U/6.3V_8 C584 BB44
VCCASW[12] +1.5V VCCVRM[3]
FUSE
R18 PCH_VCC_1_1_21 R393 *0_6/S +1.05V

THERMAL
VCCASW[13]
FDI
R427 *0_6/S +V1.5S_VCCATS AW40 0.179A (20mils) If EC support embedded flash , SPI
+1.5V VCCVRM[6]
power must be used S5_0N power rail
0.13A (20mils) PCH VRM Power for EC load code.
R423 *0_6/S +V3.3S_VCCPTS AK30 +V1.05S_VCCAPLL_SATA3 AN34
+3V VCC3_3[7] +V1.05S_VCC_EXP VCCIO[8]
AK32 AN35
0.1U/10V_4 C581 VCC3_3[8] AN11 *10uH/100MA_8 L40 VCCIO[9]
VCCVRM[7] +1.05V 3.629A (160mils)
*0_8/S R377 +1.5V
*10U/6.3V_8 C539
4mA (10mils)
*0_6/S R376 +V1.05S_VCCPCPU LPT_PCH_M_EDS/BGA
+VCCIO_PCH
AK22
VCCIO[16] +V1.05S_VCC_EXP
C537 0.1U/10V_4 AJ12
CPU
V_PROC_IO[1]
SATA
AJ14 3.629A (160mils)

C538 0.1U/10V_4 V_PROC_IO[2] If have power noise issue then stuff it.
C532 1U/6.3V_4 +3V +1.5V_LDO
for DS3 0.261A (40mils) U21

1 5
VINVOUT
10mA (10mils)
R358 *0_6/S +VCCPRTCSUS_3P3 K8 C517 3
+3V_DEEP_SUS VCCSUS3_3[9] +VCC_HDA_IO EN
*1U/6.3V_4
1U/6.3V_4 C531 2 4
A6 GND NC
RTC
HDA
B +3V_RTC VCCRTC B
* G9090-150T11U
0.1U/10V_4 C834 A26 *0_6/S R683
VCCSUSHDA +3V_DEEP_SUS
0.1U/10V_4 C831 P14 0.1U/10V_4 C847
P16 DCPRTC[1]
1U/6.3V_4 C832 DCPRTC[2] for DS3
PCH band gap Power
0.1U/10V_4 C541 +VCCRTCEXT LPT_PCH_M_EDS/BGA
Q36
+3VS5 *ME2N7002E +3V_BG
3 1 +3VS5 +3V_DEEP_SUS
PCH VCCIO Power PCH DS3 PWR

R347 *0_8
2
+1.05V +V1.05S_VCC_EXP
3.629A (160mils) Near Pin 3,39 MAIND
U19
AN34,AN35 C521 C936
4.7U/6.3V_6 5 1 4.7U/6.3V_6
IN OUT
4 2
C569 C571 C572 C563 C565 C568 IN GND
10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 R819 *0_4 SLP_SUS_ON_1 3
PCH VCCSUS 10,31 SLP_SUS_ON ON/OFF
+V3.3A_VCCPSUS
G5243AT11U
+3V_DEEP_SUS R353 *0_8/S R357
100K/F_4 39FKDQJHSQ
for DS3 C526

6,FKDQJHIRU'((36
0.1U/10V_4
SUH39PRGLI\
for DS3 function +3V_DEEP_SUS
+3VS5 +3VS5 R823 0_8

A A
Q66 AO3413
R821 C932 C933
1 3
100K/F_4 1U/6.3V_4 .1U/10V_4
1
R822
2
Q67A 22_8
3
2N7002KDW C934
6 2
352-(&75
R820 0_4 5
10,31 SLP_SUS_ON
*1U/6.3V_4
2 Q67B
4XDQWD&RPSXWHU,QF
4
2N7002KDW
1
1% Custom PCH 5/6 (POWER) 1A

5 4 3 2 1
5 4 3 2 1

D
Lynx Point (GND) Lynx Point (GND) D
U33H U33I
AL34
AL38 VSS[0] K39
AL8 VSS[1] VSS[47] L2
AM14 VSS[2] VSS[48] L44
AM24 VSS[3] VSS[49] M17 AA16 B19
AM26 VSS[4] VSS[50] M22 AA20 VSS[92] VSS[137] B23
AM28 VSS[5] VSS[51] N12 AA22 VSS[93] VSS[138] B27
AM16 VSS[8] VSS[54] N6 AB12 VSS[96] VSS[141] B39
AN36 VSS[9] VSS[55] P22 AB34 VSS[97] VSS[142] B7
AN40 VSS[10] VSS[56] P24 AB38 VSS[98] VSS[143] BA40
AN42 VSS[11] VSS[57] P26 AB8 VSS[99] VSS[144] BD11
AN8 VSS[12] VSS[58] P28 AC2 VSS[100] VSS[145] BD15
AP13 VSS[13] VSS[59] P30 AC44 VSS[101] VSS[146] BD19
AP24 VSS[14] VSS[60] P32 AD14 VSS[102] VSS[147] AY36
AP31 VSS[15] VSS[61] R12 AD16 VSS[103] VSS[148] AT43
AP43 VSS[16] VSS[62] R14 AD18 VSS[104] VSS[149] BD31
AR2 VSS[17] VSS[63] R16 AD30 VSS[105] VSS[150] BD35
AK16 VSS[18] VSS[64] R2 AD32 VSS[106] VSS[151] BD39
AT10 VSS[19] VSS[65] R34 AD40 VSS[107] VSS[152] BD7
AT15 VSS[20] VSS[66] R38 AD6 VSS[108] VSS[153] D25
C AT17 VSS[21] VSS[67] R44 AD8 VSS[109] VSS[154] AV7 C
AT20 VSS[22] VSS[68] R8 AE16 VSS[110] VSS[155] F15
AT26 VSS[23] VSS[69] T43 AE28 VSS[111] VSS[156] F20
AT29 VSS[24] VSS[70] U10 AF38 VSS[112] VSS[157] F29
AT36 VSS[25] VSS[71] U16 AF8 VSS[113] VSS[158] F33
AT38 VSS[26] VSS[72] U28 AG16 VSS[114] VSS[159] BC16
D42 VSS[27] VSS[73] U34 AG2 VSS[115] VSS[160] D4
AV13 VSS[28] VSS[74] U38 AG26 VSS[116] VSS[161] G2
AV31 VSS[31] VSS[77] V14 AJ16 VSS[119] VSS[164] G8
AV33 VSS[32] VSS[78] V16 AJ18 VSS[120] VSS[165] H10
BB25 VSS[33] VSS[79] V26 AJ20 VSS[121] VSS[166] H13
AV40 VSS[34] VSS[80] V43 AJ22 VSS[122] VSS[167] H17
AV6 VSS[35] VSS[81] W2 AJ24 VSS[123] VSS[168] H22
AW 2 VSS[36] VSS[82] W 44 AJ34 VSS[124] VSS[169] H24
F43 VSS[37] VSS[83] Y14 AJ38 VSS[125] VSS[170] H26
AY10 VSS[38] VSS[84] Y16 AJ6 VSS[126] VSS[171] H31
AY15 VSS[39] VSS[85] Y24 AJ8 VSS[127] VSS[172] H36
AY20 VSS[40] VSS[86] Y28 AK14 VSS[128] VSS[173] H40
AY26 VSS[41] VSS[87] Y34 AK24 VSS[129] VSS[174] H7
AY29 VSS[42] VSS[88] Y36 AK43 VSS[130] VSS[175] K10
AY7 VSS[43] VSS[89] Y40 AK45 VSS[131] VSS[176] K15
B11 VSS[44] VSS[90] Y8 AL12 VSS[132] VSS[177] K20
B15 VSS[45] VSS[91] AL2 VSS[133] VSS[178] K29
VSS[46] BC22 VSS[134] VSS[179] K33
BB42 VSS[135] VSS[180] BC28
VSS[136] VSS[181]
B LPT_PCH_M_EDS/BGA B
LPT_PCH_M_EDS/BGA

'>< +3VPCU sZdsZdZsZd
+3VLANVCC +3V_RTC_0
U36
R757 33_4 6 15 C912 0.1U/10V_4
30 LAN_XTAL25_IN 5 25M_A +V3.3A 2
R756 0_4
8 PCH_XTAL25_IN 9 25M_B VDD 10
R762 0_4 +3V_RTC_R R755 360_4
7 CLKGEN_RTC_X1 32Khz VBAT
R758 10/F_4 12
16 CLKGEN_27M 27Mhz/NC C913 22U/6.3VS_8 MV modify on 0730
C916 0.1U/10V_4 14
VDD_RTC_OUT +3V_RTC
8
+3VLANVCC VDDIO_25M_A
3 7
+1.05V VDDIO_25M_B GND
C915 0.1U/10V_4 R807 0_4 11 13
U36 P/N VDDIO_27/NC GND
GND
4 C914
^/ +1.8V_VGA
C921 0.1U/10V_4
GEN_XTAL25_IN 16
GEN_XTAL25_OUT 1 XTAL_IN GND
17 2.2U/6.3V_6
XTAL_OUT
UMA AL3NB244000 SLG3NB314VTR
C920 12P/50V_4
A
DIS AL000314000 GEN_XTAL25_OUT
C918 *10P/50V_4 LAN_XTAL25_IN
14,18,44
30,39
+3V_VGA
+3VLANVCC
A
7 +3V_RTC_0
2
1
4,7,9,25,31,32,34,35,36 +3VPCU
Y5
2,4,9,10,31,34,37 +1.05V
C917 *10P/50V_4 PCH_XTAL25_IN
25MHZ +-10PPM
352-(&75
4
3
GEN_XTAL25_IN
C919 15P/50V_4
C931 *10P/50V_4 CLKGEN_27M 4XDQWD&RPSXWHU,QF
1% Custom PCH 6/6 (GND) 1A
Date:Monday, December 24, 2012 Sheet 11 of 44

5 4 3 2 1
5 4 3 2 1
3 M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM1A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ[63:0] 3
2.48A +1.35VSUS
75
76
81
JDIM1B
VDD1
VDD2
VSS16
VSS17
44
48
49

M_A_A4 92 A3 DQ3 4 M_A_DQ1 82 VDD3 VSS18 54
D M_A_A10 107 A9 DQ9 33 M_A_DQ15 100 VDD9 VSS24 71 D
M_A_A11 84 A10/AP DQ10 35 M_A_DQ10 105 VDD10 VSS25 72
PC2100 DDR3 SDRAM SO-DIMM

M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 111 VDD12 VSS27 128
A15 DQ15 39 M_A_DQ21 118 VDD15 VSS30 138

109 DQ16 41 M_A_DQ16 123 VDD16 VSS31 139
3 M_A_BS#0 108 BA0 DQ17 51 124 VDD17 VSS32 144
M_A_DQ19
3 M_A_BS#1 BA1 DQ18 VDD18 VSS33
79 53 M_A_DQ18 145
3 M_A_BS#2 114 BA2 DQ19 40 199 VSS34 150
M_A_DQ20
3 M_A_CS#0 121 S0# DQ20 42 +3V VDDSPD VSS35 151
M_A_DQ17
3 M_A_CS#1 101 S1# DQ21 50 M_A_DQ23 77 VSS36 155
3 M_A_CLKP0 103 CK0 DQ22 52 122 NC1 VSS37 156
M_A_DQ22
3 M_A_CLKN0 102 CK0# DQ23 57 125 NC2 VSS38 161
M_A_DQ25 R36 10K_4
3 M_A_CLKP1 104 CK1 DQ24 59 +3V NCTEST VSS39 162
M_A_DQ24
3 M_A_CLKN1 CK1# DQ25 VSS40
73 67 M_A_DQ30 PM_EXTTS#0 198 167
3 M_A_CKE0 CKE0 DQ26 8,13 PM_EXTTS#0 EVENT# VSS41
74 69 M_A_DQ26 30 168
3 M_A_CKE1 CKE1 DQ27 2,13 DDR3_DRAMRST# RESET# VSS42
115 56 M_A_DQ28 172
3 M_A_CAS# 110 CAS# DQ28 58 VSS43 173
M_A_DQ29
3 M_A_RAS# 113 RAS# DQ29 68 1 VSS44 178
M_A_DQ31 SMDDR_VREF_DQ0_M1 R459 *0_6/S +SMDDR_VREF_DQ0
3 M_A_WE# W E# DQ30 VREF_DQ VSS45
R44 10K_4 DIMM0_SA0 197 70 M_A_DQ27 +SMDDR_VREF_DIMM 126 179
R45 10K_4 DIMM0_SA1 201 SA0 DQ31 129 M_A_DQ36 VREF_CA VSS46 184
SMB_RUN_CLK 202 SA1 DQ32 131 M_A_DQ37 VSS47 185
8,13,24 SMB_RUN_CLK SCL DQ33 VSS48
SMB_RUN_DAT 200 141 M_A_DQ34 2 189
8,13,24 SMB_RUN_DAT SDA DQ34 VSS1 VSS49
143 M_A_DQ38 3 190
116 DQ35 130 M_A_DQ32 8 VSS2 VSS50 195
(204P)
3 M_A_ODT0 120 ODT0 DQ36 132 9 VSS3 VSS51 196
M_A_DQ33
3 M_A_ODT1 ODT1 DQ37 VSS4 VSS52
140 M_A_DQ35 13
M_A_DM1 11 DQ38 142 M_A_DQ39 14 VSS5
DM0 DQ39 Reseve for RF VSS6
C 28 147 M_A_DQ41 19 C
46 DM1 DQ40 149 M_A_DQ45 C686 *2.2U/6.3V_6 20 VSS7
(204P)
DM2 DQ41 +1.35VSUS VSS8
63 157 M_A_DQ47 25
M_A_DM2 136 DM3 DQ42 159 M_A_DQ46 C657 *2.2U/6.3V_6 26 VSS9 203
DM4 DQ43 VSS10 VTT1 +0.75V_DDR_VTT
153 146 M_A_DQ40 31 204
170 DM5 DQ44 148 M_A_DQ44 32 VSS11 VTT2
187 DM6 DQ45 158 M_A_DQ42 37 VSS12 205
DM7 DQ46 160 M_A_DQ43 38 VSS13 GND 206
3 M_A_DQSP[7:0] 12 DQ47 163 43 VSS14 GND
M_A_DQSP0 M_A_DQ49
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ48 VSS15
M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ54
M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ55 DDR3-DIMM0_H=5.2_STD
3 M_A_DQSN[7:0] DQS7 DQ55
M_A_DQSN0 10 181 M_A_DQ61
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ60
DQS#7 DQ63
DDR3-DIMM0_H=5.2_STD
+SMDDR_VREF_DIMM 13
+VREF_CA_CPU 3
+0.75V_DDR_VTT 13,38,39
B +1.35VSUS 2,3,4,13,38 B
+3V 2,6,7,8,9,10,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
Place these Caps near So-Dimm0. VREF DQ0 M1 Solution

8/31: Intel suggestion
+1.35VSUS +0.75V_DDR_VTT
+1.35VSUS
C215 1U/6.3V_4 C30 1U/6.3V_4
C236 1U/6.3V_4 C25 1U/6.3V_4

+1.35VSUS +VREF_CA_CPU R22 *0_6/S
+SMDDR_VREF_DIMM C226 1U/6.3V_4 C24 1U/6.3V_4 R24
1K/F_4
C204 1U/6.3V_4 C31 1U/6.3V_4
R478 SMDDR_VREF_DQ0_M3 1 3 SMDDR_VREF_DQ0_M1
3 SMDDR_VREF_DQ0_M3
R477 *0_6/S C258 10U/6.3VS_6 C36 10U/6.3V_6
1K/F_4
C678 10U/6.3VS_6 C26 *10U/6.3V_6 Q2
2
*ME2320D-G R25
3,38 DDR_VTTREF R479 *0_6 +SMDDR_VREF_DIMM C653 10U/6.3VS_6 1K/F_4
+SMDDR_VREF_DIMM
C671 10U/6.3VS_6 2,3,13 DRAMRST_CNTRL_DDR
C635 C634 0.1U/10V_4
R476 0.022U/16V_4 12/18: PV modify C677 10U/6.3VS_6
1K/F_4 C633 2.2U/6.3V_6
C685 10U/6.3VS_6
R475 +SMDDR_VREF_DQ0
A
10/17: SI modify A
24.9/F_4 C172 *10U/6.3V_6
C147 10U/6.3V_8 +SMDDR_VREF_DQ0 C413 0.022U/16V_4 R299 24.9/F_4

C412 0.1U/10V_4
C266 10U/6.3V_8
C411 2.2U/6.3V_6
+3V 352-(&75
C52 0.1U/10V_4
4XDQWD&RPSXWHU,QF
4/27: layout modify C46 2.2U/6.3V_6 Size Document Number Rev
1% Custom DDR3 DIMM0-RVS (5.2H) 1A

5 4 3 2 1
5 4 3 2 1
3 M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
98
97
96
JDIM2A
A0
A1
DQ0
DQ1
5
7
15
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ[63:0] 3
+1.35VSUS
75
76
81
JDIM2B
VDD1
VDD2
VSS16
VSS17
44
48
49

M_B_A3 95 A2 DQ2 17 M_B_DQ2 82 VDD3 VSS18 54
D M_B_A9 85 A8 DQ8 23 M_B_DQ13
2.48A 100 VDD9 VSS24 71 D
M_B_A11 84 A10/AP DQ10 35 M_B_DQ10 106 VDD11 VSS26 127

M_B_A13 119 A12/BC# DQ12 24 M_B_DQ9 112 VDD13 VSS28 133
A15 DQ15 39 M_B_DQ20 123 VDD16 VSS31 139

109 DQ16 41 M_B_DQ21 124 VDD17 VSS32 144
3 M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ18 145
3 M_B_BS#1 79 BA1 DQ18 53 199 VSS34 150
M_B_DQ22
3 M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ17 151
3 M_B_CS#0 121 S0# DQ20 42 M_B_DQ16 77 VSS36 155
3 M_B_CS#1 101 S1# DQ21 50 122 NC1 VSS37 156
M_B_DQ19
3 M_B_CLKP0 103 CK0 DQ22 52 125 NC2 VSS38 161
M_B_DQ23
3 M_B_CLKN0 102 CK0# DQ23 57 NCTEST VSS39 162
M_B_DQ25
3 M_B_CLKP1 CK1 DQ24 VSS40
104 59 M_B_DQ29 PM_EXTTS#0 198 167
3 M_B_CLKN1 73 CK1# DQ25 67 M_B_DQ27 30 EVENT# VSS41 168
3 M_B_CKE0 CKE0 DQ26 2,12 DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ26 172
3 M_B_CKE1 115 CKE1 DQ27 56 VSS43 173
M_B_DQ28
3 M_B_CAS# 110 CAS# DQ28 58 1 VSS44 178
M_B_DQ24 SMDDR_VREF_DQ1_M1 R298 *0_6/S +SMDDR_VREF_DQ1
3 M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ31 126 179
3 M_B_WE# W E# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R54 10K_4 DIMM1_SA0 197 70 M_B_DQ30 184
R33 10K_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ36 VSS47 185
+3V 202 SA1 DQ32 131 2 VSS48 189
M_B_DQ37
8,12,24 SMB_RUN_CLK SCL DQ33 VSS1 VSS49
200 141 M_B_DQ35 3 190
8,12,24 SMB_RUN_DAT SDA DQ34 VSS2 VSS50
143 M_B_DQ34 8 195
(204P)
116 DQ35 130 M_B_DQ33 9 VSS3 VSS51 196
3 M_B_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ32 13
3 M_B_ODT1 ODT1 DQ37 VSS5
140 M_B_DQ39 14
C M_B_DM1 11 DQ38 142 M_B_DQ38 19 VSS6 C
28 DM0 DQ39 147 M_B_DQ44 20 VSS7
46 DM1 DQ40 149 M_B_DQ40 25 VSS8
(204P)
63 DM2 DQ41 157 M_B_DQ42 26 VSS9 203
DM3 DQ42 VSS10 VTT1 +0.75V_DDR_VTT
M_B_DM2 136 159 M_B_DQ43 31 204
153 DM4 DQ43 146 M_B_DQ45 32 VSS11 VTT2
170 DM5 DQ44 148 M_B_DQ41 37 VSS12 205
187 DM6 DQ45 158 M_B_DQ46 38 VSS13 GND 206
DM7 DQ46 160 M_B_DQ47 43 VSS14 GND
3 M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ49
M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ48
M_B_DQSP2 47 DQS1 DQ49 175 M_B_DQ54 DDR3-DIMM1_H=9.2_STD
M_B_DQSP7 188 DQS6 DQ54 176 M_B_DQ51 Local Thermal Sensor
3 M_B_DQSN[7:0] 10 DQS7 DQ55 181
M_B_DQSN0 M_B_DQ61
M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ56
M_B_DQSN2 45 DQS#1 DQ57 191 M_B_DQ62 12/18 PV Modify C53 *0.01U/25V_4
DQS#4 DQ60 +3V
M_B_DQSN5 152 182 M_B_DQ60 U1
M_B_DQSN7 186 DQS#6 DQ62 194 M_B_DQ58 MBCLK2 R814 *0_4 8 1 IO_THERMDA_IO
DQS#7 DQ63 8,13,24,31 MBCLK2 SCLK VCC
3
MBDATA2 R815 *0_4 7 2 IO_THERMDA_L
8,13,24,31 MBDATA2 SDA DXP
DDR3-DIMM1_H=9.2_STD 2 Q38
+0.75V_DDR_VTT 12,38,39 6 3 IO_THERMDC_L C41
+1.35VSUS 2,3,4,12,38 ALERT# DXN *2200P/50V_4
+3V 2,6,7,8,9,10,12,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44
1
B 4 5 IO_THERMDC_IO B
+SMDDR_VREF_DIMM 12 OVERT# GND *METR3904-G
R808 *10K_4 *G781-1P8

'W
+3V
DDR Thermal Sensor Place these Caps near So-Dimm1. VREF DQ1 M1 Solution
+1.35VSUS
+1.35VSUS 8/31: INTEL suggestion

R481
C189 1U/6.3V_4 +0.75V_DDR_VTT +SMDDR_VREF_DIMM 1K/F_4
C148 1U/6.3V_4 C27 1U/6.3V_4 C144 0.1U/10V_4

C345 0.01U/16V_4 R480 *0_6/S SMDDR_VREF_DQ1_M1
C202 1U/6.3V_4 C32 1U/6.3V_4 C143 2.2U/6.3V_6
+3V
U12 C213 1U/6.3V_4 C33 1U/6.3V_4 R482
1K/F_4
R816 0_4 8 1 C230 10U/6.3VS_6 C28 1U/6.3V_4
8,13,24,31 MBCLK2 SCLK VCC SMDDR_VREF_DQ1_M3 1 3
3 SMDDR_VREF_DQ1_M3
R817 0_4 7 2 C228 10U/6.3VS_6 C29 10U/6.3V_6
8,13,24,31 MBDATA2 SDA DXP +SMDDR_VREF_DQ1
PM_EXTTS#0 6 3 C171 10U/6.3VS_6 C37 *10U/6.3V_6 Q1
8,12 PM_EXTTS#0
2
ALERT# DXN *ME2320D-G
2,3,12 DRAMRST_CNTRL_DDR
EXTTS#1 4 5 C237 10U/6.3VS_6
8 EXTTS#1 OVERT# GND DDR_THERMDA
A C151 10U/6.3VS_6 +3V C417 0.1U/10V_4 A
3
+3V R277 10K_4 G781P8

C394 2 Q15 C153 10U/6.3VS_6 C50 0.1U/10V_4 C409 2.2U/6.3V_6 C410 0.022U/16V_4 R293 24.9/F_4
+SMDDR_VREF_DQ1
2200P/50V_4 METR3904-G
C238 *10U/6.3V_6 C51 2.2U/6.3V_6
1
DDR_THERMDC
'W
C260 10U/6.3V_8
352-(&75
C257 10U/6.3V_8 4XDQWD&RPSXWHU,QF
1% Custom DDR3 DIMM1-RVS (9.2H) 1A

5 4 3 2 1
5 4 3 2 1
PART 1 0F 9
U26A
14
AA38 PCIE_RX0P PCIE_TX0P Y33 C_PEG_RXP0 C748 0.22U/10V_4
2 PEG_TX0 Y37 Y32 PEG_RX0 2
PCIE_RX0N PCIE_TX0N C_PEG_RXN0 C745 0.22U/10V_4
2 PEG_TX#0 PEG_RX#0 2
D D
Y35 PCIE_RX1P PCIE_TX1P W 33 C_PEG_RXP1 C755 0.22U/10V_4
2 PEG_TX1 PEG_RX1 2
W 36 PCIE_RX1N PCIE_TX1N W 32 C_PEG_RXN1 C750 0.22U/10V_4
W 38 PCIE_RX2P PCIE_TX2P U33 C_PEG_RXP2 C738 0.22U/10V_4

2 PEG_TX2 V37 U32 C_PEG_RXN2 PEG_RX2 2
PCIE_RX2N PCIE_TX2N C734 0.22U/10V_4
V35 PCIE_RX3P PCIE_TX3P U30 C_PEG_RXP3 C728 0.22U/10V_4

2 PEG_TX3 PEG_RX3 2
U36 PCIE_RX3N PCIE_TX3N U29 C_PEG_RXN3 C726 0.22U/10V_4
U38 PCIE_RX4P PCIE_TX4P T33 C_PEG_RXP4 C757 0.22U/10V_4

2 PEG_TX4 PEG_RX4 2
T37 PCIE_RX4N PCIE_TX4N T32 C_PEG_RXN4 C751 0.22U/10V_4
T35 PCIE_RX5P PCIE_TX5P T30 C_PEG_RXP5 C740 0.22U/10V_4

2 PEG_TX5 R36 T29 C_PEG_RXN5 PEG_RX5 2
R38 PCIE_RX6P PCIE_TX6P P33 C_PEG_RXP6 C742 0.22U/10V_4

2 PEG_TX6 PEG_RX6 2
P37 PCIE_RX6N PCIE_TX6N P32 C_PEG_RXN6 C744 0.22U/10V_4
P35 PCIE_RX7P PCIE_TX7P P30 C_PEG_RXP7 C754 0.22U/10V_4

2 PEG_TX7 N36 P29 C_PEG_RXN7 PEG_RX7 2
N38 PCIE_RX8P PCIE_TX8P N33

C M37 PCIE_RX8N PCIE_TX8N N32 C
PCI EXPRESS INTERFACE

For Mars /Sun NC pin : M35 PCIE_RX9P PCIE_TX9P N30 FOR Mars / Sun NC pin :
L36 PCIE_RX9N PCIE_TX9N N29
N38,M37,M35,L36,L38,K37,K35,J36,J38 N33,N32,N30,N29,L33,L32,L30,L29,K33,K32
H37,H35,G36,G38,F37,F35,E37 L38 PCIE_RX10P PCIE_TX10P L33 J33,J32,K30,K29,H33,H32
K37 PCIE_RX10N PCIE_TX10N L32
K35 PCIE_RX11P PCIE_TX11P L30

J36 PCIE_RX11N PCIE_TX11N L29
J38 PCIE_RX12P PCIE_TX12P K33

H37 PCIE_RX12N PCIE_TX12N K32
H35 PCIE_RX13P PCIE_TX13P J33

G36 PCIE_RX13N PCIE_TX13N J32
G38 PCIE_RX14P PCIE_TX14P K30

F37 PCIE_RX14N PCIE_TX14N K29 Mars/ Sun Only : Stuff Ra
F35 PCIE_RX15P PCIE_TX15P H33

E37 PCIE_RX15N PCIE_TX15N H32
B Ra B
R262 1.69K/F_4 +1.0V_VGA
CLOCK
CLK_PCIE_VGA AB35 PCIE_REFCLKP
8 CLK_PCIE_VGA
CLK_PCIE_VGA# AA36 PCIE_REFCLKN
8 CLK_PCIE_VGA#
CALIBRATION
PCIE_CALR_TX Y30 PCIE_CALRP
R205 1K/F_4 AH16 TEST_PG PCIE_CALR_RX Y29 PCIE_CALRN R255 1K/F_4 +1.0V_VGA
Rc
PEGX_RST# AA30 PERSTB Install 1k for Mars / Sun
SUN_M2_XT
SUN_M2_XT
+3V R804 *0_4
+3V_VGA R805 0_4
^/
C330
U11 0.1U/10V_4
5
A 2 A
2,8,27,30,31,34 PLTRST#
4 PEGX_RST# +3V
1 2,6,7,8,9,10,12,13,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V
R235 330_4 DGPU_HIN_RST# +1.0V_VGA
7,9 DGPU_HOLD_RST# 16,18,19,44 +1.0V_VGA
R237
3
U74AHC1G08G-AL5-R
100K_4
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom 1A
THAMES_PCIE_Interface
5 4 3 2 1
5 4 3 2 1
15
For Mars / Sun : AR1/AW8/AR3/AR8/AU8: NC pin For Mars / Sun : DP A to D Port: all NC pin
U26B
For Sun only : AD29 /AC29 /AJ21 /AK21: NC pin PART 2 0F 9
MUTI GFX
GENLK_CLK AD29 GENLK_CLK TXCAP_DPA3P AU24
TP38
GENLK_VSYNC AC29 GENLK_VSYNC TXCAM_DPA3N AV23
TP43
TX0P_DPA2P AT25
AJ21 SWAPLOCKA TX0M_DPA2N AR24
AK21 DPA
SWAPLOCKB
TX1P_DPA1P AU26
TX1M_DPA1N AV25
AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27

AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26
D AP8 DVPCNTL_0 D
AW8 DVPCNTL_1 TXCBP_DPB3P AR30
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
AR1 DVPCLK
AU1 DVPDATA_0 TX3P_DPB2P AV31
AU3 DVPDATA_1 TX3M_DPB2N AU30
AW3 DPB
DVPDATA_2
AP6 DVPDATA_3 TX4P_DPB1P AR32
AW5 DVPDATA_4 TX4M_DPB1N AT31
AU5 DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33
AW6 DVPDATA_7 TX5M_DPB0N AU32
AU6 DVPDATA_8
AT7 DVPDATA_9 TXCCP_DPC3P AU14
For Sun only : AV7 DVPDATA_10 TXCCM_DPC3N AV13
AN7 DVPDATA_11
AP10 /AV11 /AT11 /AR12 /AW12 / AU12 /AP12 : NC pin AV9 DVPDATA_12 TX0P_DPC2P AT15
AT9 DVPDATA_13 TX0M_DPC2N AR14
AR10 DVPDATA_14
AW10 DPC AU16
DVPDATA_15 TX1P_DPC1P
AU10 DVPDATA_16 TX1M_DPC1N AV15
10/17: SI modify AP10 DVPDATA_17
+3V_DELAY AV11 DVPDATA_18 TX2P_DPC0P AT17
AT11 DVPDATA_19 TX2M_DPC0N AR16
R194 4.7K_4 12/13: PV modify AR12 DVPDATA_20
AW12 DVPDATA_21 TXCDP_DPD3P AU20
R180 4.7K_4 AU12 DVPDATA_22 TXCDM_DPD3N AT19
AP12 DVPDATA_23
15,31 DGPUT_CLK R190 0_4 TX3P_DPD2P AT21

15,31 DGPUT_DATA R184 0_4 TX3M_DPD2N AR20
AJ23 DPD AU22

Access to SMBBus ans SDA/SCL is mandatory on all designs DGPUT_CLK_1 SMBCLK TX4P_DPD1P
AH23 SMBus AV21
Add test points on SMBBus and SDA/SCL for debug DGPUT_DATA_1 SMBDATA TX4M_DPD1N
R486 *4.7K_4
+3V_DELAY R485 *4.7K_4 TX5P_DPD0P AT23
+3V_DELAY
TX5M_DPD0N AR22 FOR MARS: AD37/ AE38 / AD35 AVSSN to GND
8/24: DB Modify TP23 AK26 SCL FOR SUN : AD37/ AE38 / AD35 NC pin
R146 *10K/F_4 GPIO_23_CLKREQb AJ26 SDA
I2C
TP29
R236 *10K/F_4 DGPU_PROCHOT# R AD39 8/15 DB Modify
GENERAL PURPOSE I/O AVSSN#1 AD37
R186 100K_4 GPIO5 R175 *511/F_4 GPIO0 AH20 GPIO_0
17 GPIO0
8/24: DB Modify GPIO1 AH18 GPIO_1 G AE36 10/14 SI Modify
TP122
C GPIO2 AN16 GPIO_2 AVSSN#2 AD35 C
TP123
R204 10K/F_4 DGPU_TRSTB DEL R747 R748 R749
8/24: DB Modify B AF37
R197 10K/F_4 DGPU_TDI R182 0_4 GPIO5 AH17 GPIO_5_AC_BATT AVSSN#3 AE38
31 GPU_AC_BATT
GFX_CORE_CNTRL4 AJ17 GPIO_6
42 GFX_CORE_CNTRL4 DAC1
R203 10K/F_4 DGPU_TMS AK17 GPIO_7_BLON HSYNC AC36
TP124
GPIO8 AJ13 GPIO_8_ROMSO VSYNC AC38 10/14: SI modify , DEL R751, R753
TP31
R206 10K/F_4 DGPU_TCK GPIO9 AH15 GPIO_9_ROMSI
TP35
42 GFX_CORE_CNTRL5 GPIO10 AJ16 GPIO_10_ROMSCK
GPIO11 AK16 GPIO_11 RSET AB34 R233 *499/F_4
TP125
GPIO12 AL16 GPIO_12
TP128
GPIO13 AM16 GPIO_13 AVDD AD34 *0_4 R750 +1.8V_AVDD_Q +1.8V_AVDD_Q
TP126
TP18 HDMI_HP2 AM14 GPIO_14_HPD2 AVSSQ AE34
+3V_DELAY GFX_CORE_CNTRL1 AM13 GPIO_15_PWRCNTL_0
42 GFX_CORE_CNTRL1
42 GFX_CORE_CNTRL3 GFX_CORE_CNTRL3 AK14 GPIO_16 VDD1DI AC33 *0_4 R752 +VDDD1 +VDDD1
VGA_ALERT_1 AG30 GPIO_17_THERMAL_INT VSS1DI AC34
R155 *3.01K/F_4 TP28
GPIO22 HPD3 AN14 GPIO_18_HPD3
TP26
TEMP_FAIL AM17 GPIO_19_CTF
A 3-k external pull up (3.3 V) is required if an external BIOS ROM chip is used. 42 GFX_CORE_CNTRL2 GFX_CORE_CNTRL2 AL13 GPIO_20_PWRCNTL_1 NC#1 V13 FOR SUN NC PIN : AD34/ AE34 / AC33 / AC34 / AD39 / AE36
GPIO21 AJ14 GPIO_21 NC#2 U13
TP13
GPIO22 AK13 GPIO_22_ROMCSB NC#3 AC31 AF37/ AC36 / AC38 / AB34 /
TP11
R763 *0_4 GPIO_23_CLKREQb AN13 CLKREQB NC#4 AD30
8 CLK_PEGA_REQ#
NC#5 AC32
NC#6 AD32
R158 *10K/F_4 TEMP_FAIL R230 *0_4 AG32 GPIO_29 NC#7 AF32
42 DGPU_PROCHOT#
AG33 GPIO_30 NC#8 AA29
TP34
8/24: DB Modify NC#9 AG21
AJ19 GENERICA
AK19 GENERICB
GENERICC AJ20 GENERICC
TP21
+3V_DELAY R178 10K/F_4 VGA_ALERT_1 AK20 GENERICD
AJ24 GENERICE_HPD4 NC_TSVSSQ AF33 8/15 Modify
FOR SUN GPIO NC PIN : AJ19/ AK19 / AK24 / AM14 / AN14 / AJ24/ AH26 / AH24 / AJ20 AH26 GENERICF_HPD5
AH24 GENERICG_HPD6
AK20/ AH18 / AN16 / AK17 / AK16 / AL16/ AM16
PS_0 AM34 PS_0 TP89
AC30 CEC_1
+1.8V_VGA AK24 AD31 PS_1

HPD1
MLPS
PS_1 TP40
Mars: stuff BIT5 => BIT1
R167 *499/F_4
B For Sun Nc: R167, R141, C155 R141 *249/F_4 +0.6V_VREFG AH13 AG31 PS_2 B
VREFG PS_2 TP27 PS0 => 11001
+1.8V_VGA +1.8V_VGA
^/
C155 *0.1U/10V_4 AL21
BACO
AD33 PS_3
PS1 => 00001
Thermal Solution(Close to GPU) TP19 PX_EN PS_3 TP37
C306 *0.1U/10V_4 PS2 => 00000
12/13: PV modify
U8 R488 R241
DEBUG DDC/AUX
+3V_DELAY R242 *5.1K/F_4 DDC1CLK AM26 PS3 => 11000 8.45K_4 8.45K_4
15,31 DGPUT_CLK R812 *0_4 8 1 +3V_DELAY DDC1DATA AN26 PS_0 PS_1
SCLK VCC TESTEN AD28 TESTEN
TP44
15,31 DGPUT_DATA R813 *0_4 7 2 GPU_THERMDA AUX1P AM27
SDA DXP R238 1K/F_4 AL27 DAC1 Analog Power R489 C684 R240 C321
AUX1N
VGA_ALERT_1 *0_4 R177 VGA_ALERT_2 6 3 PV, change to 0ohm AVDD : 1.8V @ 18mA +1.8V_AVDD_Q 2K_4 *0.01U/50V_4 2K_4 0.68U/6.3V_4
ALERT# DXN C248 DGPU_TRSTB AM23 AM19
R202 *10K/F_4 4 5 *2200P/50V_4
TP20
DGPU_TDI AN23
JTAG_TRSTB DDC2CLK
AL19
+1.8V_VGA
L24 *0_6/S
VENDOR R231 R232
+3V_DELAY JTAG_TDI DDC2DATA
OVERT# GND TP12
DGPU_TCK AK23 JTAG_TCK
TP15
GPU_THERMDC DGPU_TMS AL24 JTAG_TMS AUX2P AN20 HYNIX 2G NA 4.75K
31 DGPU_OVT# TP14
*G781P8 DGPU_TDO AM24 JTAG_TDO AUX2N AM20 C292 C295 C294
TP17 +1.8V_VGA +1.8V_VGA
*10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4
DDCCLK_AUX3P AL30 MICRON 2G 8.45K 2K
'W DDCDATA_AUX3N AM30
DAC1 Digital Power.
THERMAL
AL29 VDD1DI : 1.8V @ 117mA +VDDD1
GPU_THERMDA AF29
DDCCLK_AUX4P
AM29
SAM 2G 4.53K 2K R215
Reserve for Power Play DPLUS DDCDATA_AUX4N
+1.8V_TSVDD GPU_THERMDC AG29 DMINUS L22 *0_6/S *0_4 R231
GFX_CORE_CNTRL1 R151 3.01K/F_4 AN21 *8.45K_4
HCB1608KF121T30
DDCCLK_AUX5P
AM21
HYNIX 1G 6.98K 4.99K PS_2 PS_3
1.8V(8mA TSVDD) DDCDATA_AUX5N PV, change to 0ohm
GFX_CORE_CNTRL2 R150 3.01K/F_4 GPIO28 AK32 GPIO_28_FDO C251 C255 C256
+1.8V_VGA 17 GPIO28
Rc L27 DDCCLK_AUX6P AK30 *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 MICRON 1G 4.53K 4.99K
GFX_CORE_CNTRL3 R152 3.01K/F_4 AL31 TS_A DDCDATA_AUX6N AK29 R214 C280 R232 C307
TP25
C283 C296 C287 4.75K/F_4 0.68U/6.3V_4 4.75K/F_4 *0.01U/50V_4
GFX_CORE_CNTRL4 R153 3.01K/F_4 AJ30
10U/6.3V_8 1U/10V_4 0.1U/10V_4 +1.8V_TSVDD AJ32
DDCVGACLK
AJ31
PV, change to DNI SAM 1G 3.24K 5.62K
TSVDD DDCVGADATA
GFX_CORE_CNTRL5 R166 *3.01K/F_4 AJ33 TSVSS
Ra
GFX_CORE_CNTRL5 R161 10K_4 +3V_DELAY
SUN_M2_XT
For Mars: Stuff Ra, Rc=> VDDC 1.1V

For Mars / Sun:NC pin
AL30, AM30, AL29, AM29, AN21, AM21, AK30, AK29
A A
For Sun Only :NC pin

AL27, AM27, AM20, AN20, AN26, AM26, AL19, ,
AM19, AJ30, AJ31
352-(&75
14,16,18,19,44 +1.0V_VGA
+1.0V_VGA
4XDQWD&RPSXWHU,QF
+1.8V_VGA
11,16,18,19,44 +1.8V_VGA
+3V_DELAY
1%
Custom 1A
17,18 +3V_DELAY THAMES_Main & GND
5 4 3 2 1
5 4 3 2 1
U26F
AB39
E39
F34
F39
PCIE_VSS
PCIE_VSS
PCIE_VSS
PART 6 0F 9
GND
GND
GND
A3
A37
AA16
AA18
16
PCIE_VSS GND
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
H31 PCIE_VSS GND AA23
Fo Mars/ Sun H34 PCIE_VSS GND AA26
Memory Type H39 PCIE_VSS GND AA28
Change La, Lb J31 PCIE_VSS GND AA6
Bead to 0 ohm J34 PCIE_VSS GND AB12
27-MHz ( 30 ppm) crystal connected to XTALIN/XTALOUT, or K31 PCIE_VSS GND AB15
DDR3 K34 AB17
D 27-MHz (1.8 V) oscillator connected to XTALIN. K39
PCIE_VSS GND
AB20
D
PCIE_VSS GND
La +1.8V_DPLL_PVDD Display Phase Lock Loop Power L31 PCIE_VSS GND AB22
DPLL_PVDD : 1.8V @ 75mA 27-MHz (3.3 V) oscillator connected to XO_IN, and L34 PCIE_VSS GND AB24
GDDR5 100-MHz (3.3 V) oscillator connected to XO_IN2. (By default, this clock should not be M34 PCIE_VSS GND AB27
+1.8V_VGA L23 *0_6/S +1.8V_DPLL_PVDD spread since internal spreading is used.) M39 PCIE_VSS GND AC11
N31 PCIE_VSS GND AC13
C264 N34 PCIE_VSS GND AC16
C259 C265 P31 PCIE_VSS GND AC18
U26I
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 P34 PCIE_VSS GND AC2
P39 PCIE_VSS GND AC21
R34 PCIE_VSS GND AC23
PART 9 0F 9 T31 AC26
PCIE_VSS GND
T34 PCIE_VSS GND AC28
0_4 R759 T39 PCIE_VSS GND AC6
CLKGEN_27M 11
U31 PCIE_VSS GND AD15
+1.0V_DPLL_VDDC U34 PCIE_VSS GND AD17
Lb DPLL_VDDC : 0.935V @ 140mA AM32 DPLL_PVDD XTALIN AV33 *0_4 R792 EVGA-XTALI *22P/50V_4 C244 V34 PCIE_VSS GND AD20
V39 PCIE_VSS GND AD22
1
L21 *0_6/S +1.0V_DPLL_VDDC AN31 DPLL_VDDC W31 PCIE_VSS GND AD24
+1.0V_VGA
R207 Y2 W34 PCIE_VSS GND AD27
1.0V(125mA DPLL_VDDC) C253 C268 C267 *10M_6 *7A27000010 Y34 PCIE_VSS GND AD9
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 AN32 DPLL_PVSS Y39 PCIE_VSS GND AE2
2
DPLL_PVSS GND AE6
XTALOUT AU34 *0_4 R793 EVGA-XTALO C245 GND AF10
+1.8V_MPLL_PVDD *22P/50V_4 GND AF16
MPLL_PVDD : 1.8V @ 150mA GND AF18
HCB1608KF-471T10
+1.8V_MPLL_PVDD H7
WWs GND GND AF21
AG17
+1.8V_VGA MPLL_PVDD GND
L35 H8 MPLL_PVDD F15 GND GND AG2
C437 F17 GND GND AG20
C441
10U/6.3V_8 1U/6.3V_4
C438
0.1U/10V_4
XO_IN AW34
TP129 Ws F19
F21
GND GND AG22
AG6
AG22 is nc pin
GND GND
AM10 SPLL_PVDD F23 GND GND AG9
PLLS/XTAL
F25 GND GND AH21
C F27 GND GND AJ10 C
+1.8V_SPLL_PVDD F29 GND GND AJ11
SPLL_PVDD : 1.8V @ 75mA AN9 SPLL_VDDC XO_IN2 AW35 R487 *0_4 F31 GND GND AJ2
F33 GND GND AJ28
L16 FCM1005KF-121T03 +1.8V_SPLL_PVDD F7 GND GND AJ6
+1.8V_VGA
F9 GND GND AK11
C176 AN10 SPLL_PVSS G2 GND GND AK31
C167 C191 G6 GND GND AK7
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 H9 GND GND AL11
J2 GND GND AL14
CLKTESTA AK10 CLKTESTA J27 GND GND AL17
AF30 NC_XTAL_PVDD CLKTESTB AL10 CLKTESTB J6 GND GND AL2
AF31 NC_XTAL_PVSS J8 GND GND AL20
K14 GND
+1.0V_SPLL_VDDC K7 GND GND AL23
SPLL_VDDC : 0.935V @ 150mA L11 GND GND AL26
C193 C227 L17 GND GND AL32
+1.0V_VGA L19 HCB1608KF-471T10 +1.0V_SPLL_VDDC *0.1U/10V_4 *0.1U/10V_4 L2 GND GND AL6
Debug only, L22 GND GND AL8
1.0V(125mA DPLL_VDDC) C181 C222 C216 L24 AM11
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4
SUN_M2_XT
for clock observation, L6
GND GND
AM31
GND GND
SPLL_PVSS if not needed, DNI R171 R181 M17 GND GND AM9
*51.1/F_4 *51.1/F_4 M22 GND GND AN11
M24 GND GND AN2
Ra N16 GND GND AN30
DPEF_VDD18 R212 *0_4 N18 GND GND AN6
Rb route 50ohms N2 GND GND AN8
R249 *0_4 N21 AP11
single-ended/ GND GND
^/ 100ohms diff and keep short

N23
N26
GND GND AP7
AP9
reserve Ra, Rb for future ASIC GND GND
N6 GND GND AR5
R15 GND GND B11
R17 GND GND B13
R2 GND GND B15
R20 GND GND B17
B R22 GND GND B19 B
R24 GND GND B21
R27 GND GND B23
R6 GND GND B25
T11 GND GND B27
T13 GND GND B29
T16 GND GND B31
T18 GND GND B33
T21 GND GND B7
T23 GND GND B9
T26 GND GND C1
U15 GND GND C39
U17 GND GND E35
U2 GND GND E5
U20 GND GND F11
U22 GND GND F13
U24 GND
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND VSS_MECH A39
Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
A A
SUN_M2_XT
352-(&75
+1.0V_VGA
4XDQWD&RPSXWHU,QF
14,18,19,44 +1.0V_VGA
1%
+1.8V_VGA Custom 1A
11,15,18,19,44 +1.8V_VGA THAMES_XTAL
5 4 3 2 1
5 4 3 2 1
U26G
PART 7 0F 9
AK27
Fo Mars : AF35, AG36: NC pin
AN36, AP37: NC pin
17
VARY_BL
LVDS CONTROL DIGON AJ27
CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
AK35
TXCLK_UP_DPF3P
AL36
THEY MUST NOT CONFLICT DURING RESET
TXCLK_UN_DPF3N
D TXOUT_U0P_DPF2P AJ38
STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS Default Setting D
TXOUT_U0N_DPF2N AK37
TXOUT_U1P_DPF1P AH35
AJ36 MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour X
TXOUT_U1N_DPF1N
0: Enable MLPS, disable GPIO PINSTRAP
AG38 1: Disable MLPS, enable GPIO PINSTRAP
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N AH37
AF35 TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable

TXOUT_U3P
AG36 0: 50% Tx output swing X
TXOUT_U3N 1: Full Tx output swing
LVTMDP
TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable X

0: Tx de-emphasis disabled
1: Tx de-emphasis enabled
TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 1
AW37 0: GEN3 not supported at power-on
TXOUT_L0P_DPE2P 1: GEN3 supported at power-on
TXOUT_L0N_DPE2N AU35
AR37 BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0

TXOUT_L1P_DPE1P
AU39 0: VGA controller capacity enabled
TXOUT_L1N_DPE1N 1: VGA controller capacity disabled (for multi-GPU)
TXOUT_L2P_DPE0P AP35
TXOUT_L2N_DPE0N AR35
ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
TXOUT_L3P AN36
AP37 If GPIO22 = 0, defines memory aperture size XXX
TXOUT_L3N Fo Sun Only : All NC pin If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
101 - 1Mbit M25P10A (ST)
101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)
SUN_M2_XT
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
C 101 - 1Mbit Pm25LV010 (Chingis) C
+3V_DELAY BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device X

0: Disabled
1: Enabled
GPIO0 R133 *10K_4 AUD[1] NA HSYNC 00 - No audio function XX

15 GPIO0 AUD[0] NA VSYNC 01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.
CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour X

0: Disabled
1: Enabled
NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
RESERVED PS_1[3] GENLK_CLK Reserved 0
RESERVED PS_1[2] GPIO8 Reserved 0
RESERVED NA GPIO21 Reserved 0
RESERVED NA GENERICC Reserved (for Thames/Whistler/Seymour only) 0
AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
AUD_PORT_CONN_PINSTRAP[0] PS_0[5] NA 110 = 1 usable endpoints
101 = 2 usable endpoints
B
100 = 3 usable endpoints B
GPIO28 011 = 4 usable endpoints
15 GPIO28 Ra R216 *10K_4
010 = 5 usable endpoints
R217 10K_4 001 = 6 usable endpoints
Rb 000 = all endpoints are usable
Thems : stuff Ra=> disable MLPS , support GPIO only
Mars : stuff Rb=> enable MLPS, support MLPS only
Memory Aperture size Power Up/Down Sequence

GPIO9 GPIO13 GPIO12 GPIO11
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
+VGA_CORE
0 128M 0 0 0
VDDC
0 256M 0 0 1 +VGA_CORE
0 64M 0 1 0 VDDCI
+1.5V_VGA
0 32M 0 1 1
VDDR1
0 512M 1 0 0
A +3.3V_Delay A
0 1G 1 0 1
VDDR3
+1.8V_VGA
0 2G 1 1 0
+1.8V_VGA
VDDR4
0 4G 1 1 1
VDD_CT 352-(&75
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
20ms 20ms
4XDQWD&RPSXWHU,QF
1%
Custom 1A
THAMES_LVDS / STRAP
5 4 3 2 1
5 4 3 2 1
U26E
18
+1.5V_VGA VDDR1 , 1.5V @ 2A, GDDR5 900MHz
PART 5 0F 9 8/15 DB modify
MEM I/O
I/O power for the AC7 VDDR1 NC_PCIE_VDDR AA31
+1.8V_VGA
memory interface. C396 C489 C719 C468 C500 C764 C335 C499 C725 C470 AD11 VDDR1 NC_PCIE_VDDR AA32
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF7 VDDR1 NC_PCIE_VDDR AA33 C926 C925 C924
AG10 VDDR1 NC_PCIE_VDDR AA34 0.1U/10V_4 1U/6.3V_4 10U/6.3VS_6
AJ7 VDDR1 NC_PCIE_VDDR W30
AK8 VDDR1 NC_PCIE_VDDR Y31
AL9 VDDR1 NC_BIF_VDDC V28
G11 VDDR1 NC_BIF_VDDC W29 PCIe Digital Power Supply
G14 VDDR1 PCIE_PVDD AB37 PCIE_VDDC : 0.935V @ 1.88A (GEN2.0) +1.0V_VGA
PCIE
G17
G20
VDDR1
G30
PCIE_VDDC : 0.935V @ 2.5A (GEN3.0)
VDDR1 PCIE_VDDC
G23 VDDR1 PCIE_VDDC G31
C401 C479 C796 C783 C689 C514 G26 VDDR1 PCIE_VDDC H29
10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 G29 VDDR1 PCIE_VDDC H30 C385 C373 C399 C366 C393 C379 C388 C374 C363
D H10 J29 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 D
VDDR1 PCIE_VDDC
J7 VDDR1 PCIE_VDDC J30 +1.0V_VGA
J9 VDDR1 PCIE_VDDC L28
K11 VDDR1 PCIE_VDDC M28
K13 VDDR1 PCIE_VDDC N28
K8 VDDR1 PCIE_VDDC R28 C378 C389 C364 C380 C361 C360
L12 VDDR1 PCIE_VDDC T28 BIF_VDDC 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 10U/6.3VS_6
L16 VDDR1 PCIE_VDDC U28 Ra
Reserve for Drop L21 VDDR1 R267 0_8
L23 VDDR1 Rb
L26 VDDR1 BIF_VDDC N27 R290 *0_8
BACO +VGA_CORE
C826 C254 C453 C178 C449 L7 VDDR1 BIF_VDDC T27
*22U/6.3VS_8 22U/6.3V_8 *22U/6.3VS_8 22U/6.3V_8 *22U/6.3VS_8 M11 VDDR1
N11 VDDR1
P7 VDDR1 VDDC AA15
R11 CORE AA17
VDDR1 VDDC
2
*330u_2.5V_3528
*330u_2.5V_3528
U11 VDDR1 VDDC AA20
C457 C205 C785 C922 C923 U7 VDDR1 VDDC AA22
+ +
*22U/6.3VS_8 22U/6.3V_8 *22U/6.3VS_8 Y11 VDDR1 VDDC AA24 +VGA_CORE
Y7 VDDR1 VDDC AA27
1
VDDC AB16
VDDC AB18
VDDC AB21
VDDC AB23
VDDC_CT: 1.8V @250mA +1.8V_VDD_CT LEVEL VDDC AB26
TRANSLATION VDDC AB28 C211 C372 C356 C371 C354 C210 C353 C219 C384 C370
+1.8V_VGA
L49 *0_6/S AF26 VDD_CT VDDC AC17 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AF27 VDD_CT VDDC AC20
AG26 VDD_CT VDDC AC22
AG27 VDD_CT VDDC AC24
C672 C660 C661 C655 C654 VDDC AC27
*10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 VDDC AD18
I/O VDDC AD21
AF23 VDDR3 VDDC AD23
+3V_DELAY AF24 VDDR3 VDDC AD26 C313 C656 C652 C355 C369 C341 C314 C315 C180 C352
VDDR3 : 3.3V @ 60mA AG23 VDDR3 VDDC AF17 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
+3V_VGA
L17 *0_6/S AG24 VDDR3 VDDC AF20
VDDC AF22
DVP VDDC AG16
AD12 VDDR4 VDDC AG18
C AF11 C
C676 C673 C240 C674 VDDR4
*10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AF12 VDDR4 VDDC AH22
AF13 VDDR4 VDDC AH27
VDDC AH28 C209 C317 C350 C318 C316 C208 C340 C239 C342 C233
+VDDR4 VDDC M26 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
For Mars: stuff VDDR4 : 1.8V @ 300mA AF15 VDDR4 VDDC N24
L18 *0_6 AG11 VDDR4 VDDC R18
AG13 VDDR4 VDDC R21
AG15 VDDR4 VDDC R23
For Sun: NC L18, C214, C223,C241, C232, C311, C310 VDDC R26
C214 C223 C241 C232 C311 C310 VDDC T17
*10U/6.3VS_6 *10U/6.3VS_6 *1U/6.3V_4 *1U/6.3V_4*0.1U/10V_4 *0.1U/10V_4 VDDC T20
^/ VDDC T22 C217 C320 C224 C203 C207
VDDC T24 22U/10V_6 22U/10V_6 22U/10V_6 22U/10V_6 22U/10V_6
VDDC U16
VDDC U18 Reserve for Drop
VDDC U21
VDDC U23
VDDC U26
330u_2.5V_3528
VDDC V17
1
VDDC V20
VDDC V22 C242 C309 C234 C338 +
VDDC V24 22U/10V_6 22U/10V_6 22U/10V_6 22U/10V_6 C351
VDDC V27
2
VDDC Y16
VDDC Y18
VDDC
VDDC
Y21
Y23 Ws
VDDC Y26
VDDC Y28 +VGA_CORE
VDDCI AA13
VDDCI AB13 BIF_VDDC
VDDCI AC12
VDDCI AC15
VDDCI AD13
VDDCI AD16 C312 C375 C343 C331 C339 C382 C367 C387
VDDCI M15 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VDDCI M16
B Zs^EZdEsZ VOLTAGE
VDDCI M18 C403 C390 C404 C391 B
SENESE
VDDCI M23 22U/6.3VS_8 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6
N13
CORE I/O
ISOLATED
VDDCI
AF28 FB_VDDC VDDCI N15
42 VGPU_CORE_SENSE VDDCI N17
VDDCI N20 C383 C386 C395 C365 C348
TP33 AG28 FB_VDDCI VDDCI N22 22U/10V_6 22U/10V_6 22U/10V_61U/6.3V_4 1U/6.3V_4
VDDCI R12
VDDCI R13
AH29 FB_GND VDDCI R16
42 VSS_GPU_SENSE T12
VDDCI
VDDCI T15
VDDCI V15
VDDCI Y13
+1.5V_VGA
20,21,22,34,43 +1.5V_VGA +1.0V_VGA
14,16,19,44 +1.0V_VGA +1.8V_VGA
SUN_M2_XT
11,15,16,19,44 +1.8V_VGA +3V_VGA
14,44 +3V_VGA +VGA_CORE
34,42,44 +VGA_CORE
^KD Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra)
2. BACO Support: Refer to the BACO reference

schematics/Application note for detail about BIF_VDDC Rail
PX_EN = 0, for Normal Operation if BACO is Supported (Uninstall Ra)
PX_EN = 1, for BACO MODE
A A
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom THAMES_Power & BACO 1A

5 4 3 2 1
5 4 3 2 1
For Mars : L20 sutff

For Sun: L20 , C247 , C246 , C252 NC
+1.0V_VGA
19
U26H DPAB_VDD10
PART 8 0F 9
L20 *0_6
D D
DP_VDDR DP_VDDC
DP_VDDC AP31 C247 C246 C252 ^/

DP_VDDC AP32 *0.1U/10V_4 *1U/6.3V_4 *10U/6.3VS_6
DP_VDDC AN33
DP_VDDC AP33
AN24 DP_VDDR
AP24 DP_VDDR DP_VDDC AP13
AP25 DP_VDDR DP_VDDC AT13
AP26 DP_VDDR DP_VDDC AP14
AU28 DP_VDDR DP_VDDC AP15
AV29 DP_VDDR
DP_VDDC AL33
^/ DP_VDDC AM33
AP20 DP_VDDR DP_VDDC AK33 ^/
AP21 DP_VDDR DP_VDDC AK34 +1.0V_VGA
For Mars : L26 sutff AP22 DP_VDDR
For Sun: L26 , C279 , C281 , C282 NC AP23 DP_VDDR
DPEF_VDD10
AU18 DP_VDDR L25 *0_6
+1.8V_VGA AV19 DP_VDDR
DP GND
For Mars : L25 sutff
C DPEF_VDD18 DP_VSSR AN27 C291 C290 C293 For Sun : L25/ C293/C290/C291 NC C
L26 *0_6 AH34 DP_VDDR DP_VSSR AP27 *0.1U/10V_4 *1U/6.3V_4 *10U/6.3VS_6
AJ34 DP_VDDR DP_VSSR AP28
AF34 DP_VDDR DP_VSSR AW24
C279 C281 C282 AG34 DP_VDDR DP_VSSR AW26
*10U/6.3VS_6 *1U/6.3V_4 *0.1U/10V_4 AM37 DP_VDDR DP_VSSR AN29
AL38 DP_VDDR DP_VSSR AP29
DP_VSSR AP30
DP_VSSR AW30
DP_VSSR AW32
DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
DP_VSSR AW20
CALIBRATION
DP_VSSR AW22
DP_VSSR AN34
B AP39 B
DP_VSSR
AW28 DPAB_CALR DP_VSSR AR39
DP_VSSR AU37
DP_VSSR AF39
DP_VSSR AH39
AW18 DPCD_CALR DP_VSSR AK39
^/ DP_VSSR AL34
DP_VSSR AV27
DP_VSSR AR28
R495 *150/F_4 AM39 DPEF_CALR DP_VSSR AV17 ^/>Z
DP_VSSR AR18
DP_VSSR AN38
DP_VSSR AM35
For Mars : R495 sutff For Mars : R754 sutff
For Sun : R495 NC
For Sun : R754 NC
+1.0V_VGA
14,16,18,44 +1.0V_VGA
+1.8V_VGA
11,15,16,18,44 +1.8V_VGA
A SUN_M2_XT A
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom 1A
THAMES_DP Powers
5 4 3 2 1
5 4 3 2 1
VMA_ODT0
20
21 VMA_ODT0
21 VMA_ODT1 VMA_ODT1 For Sun : ALL NC PIN For Sun : ALL NC PIN 22 VMB_ODT0 VMB_ODT0
U26D
22 VMB_ODT1 VMB_ODT1
U26C
21 VMA_RAS0# VMA_RAS0#
VMA_RAS1# VMB_RAS0# PART 4 0F 9
21 VMA_RAS1# PART 3 0F 9 22 VMB_RAS0#
22 VMB_RAS1# VMB_RAS1#
C5 GDDR5/DDR3 P8
21 VMA_CAS0# VMA_CAS0# GDDR5/DDR3 VMB_DQ0 DQB0_0 MAB0_0/MAB_0 VMB_MA0
21 VMA_CAS1# VMA_CAS1# VMA_DQ0 C37 DQA0_0 MAA0_0/MAA_0 G24 VMA_MA0 22 VMB_CAS0# VMB_CAS0# VMB_DQ1 C3 DQB0_1 MAB0_1/MAB_1 T9 VMB_MA1
VMA_DQ1 C35 DQA0_1 MAA0_1/MAA_1 J23 VMA_MA1 VMB_CAS1# VMB_DQ2 E3 DQB0_2 MAB0_2/MAB_2 P9 VMB_MA2
22 VMB_CAS1#
VMA_WE0# VMA_DQ2 A35 DQA0_2 MAA0_2/MAA_2 H24 VMA_MA2 VMB_DQ3 E1 DQB0_3 MAB0_3/MAB_3 N7 VMB_MA3
21 VMA_WE0#
VMA_WE1# VMA_DQ3 E34 DQA0_3 MAA0_3/MAA_3 J24 VMA_MA3 VMB_WE0# VMB_DQ4 F1 DQB0_4 MAB0_4/MAB_4 N8 VMB_MA4
21 VMA_WE1# 22 VMB_WE0#
VMA_DQ4 G32 DQA0_4 MAA0_4/MAA_4 H26 VMA_MA4 22 VMB_WE1# VMB_WE1# VMB_DQ5 F3 DQB0_5 MAB0_5/MAB_5 N9 VMB_MA5
21 VMA_CS0# VMA_CS0# VMA_DQ5 D33 DQA0_5 MAA0_5/MAA_5 J26 VMA_MA5 VMB_DQ6 F5 DQB0_6 MAB0_6/MAB_6 U9 VMB_MA6
VMA_DQ6 F32 DQA0_6 MAA0_6/MAA_6 H21 VMA_MA6 VMB_CS0# VMB_DQ7 G4 DQB0_7 MAB0_7/MAB_7 U8 VMB_MA7
22 VMB_CS0#
VMA_CS1# VMA_DQ7 E32 DQA0_7 MAA0_7/MAA_7 G21 VMA_MA7 VMB_DQ8 H5 DQB0_8 MAB1_0/MAB_8 Y9 VMB_MA8
D
21 VMA_CS1# D
VMA_DQ8 D31 H19 VMA_MA8 VMB_CS1# VMB_DQ9 H6 W9 VMB_MA9
MEMORY INTERFACE A
DQA0_8 MAA1_0/MAA_8 22 VMB_CS1# DQB0_9 MAB1_1/MAB_9
21 VMA_CKE0 VMA_CKE0 VMA_DQ9 F30 DQA0_9 MAA1_1/MAA_9 H20 VMA_MA9 VMB_DQ10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VMB_MA10
21 VMA_CKE1 VMA_CKE1 VMA_DQ10 C30 DQA0_10 MAA1_2/MAA_10 L13 VMA_MA10 22 VMB_CKE0 VMB_CKE0 VMB_DQ11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VMB_MA11
VMA_DQ11 A30 DQA0_11 MAA1_3/MAA_11 G16 VMA_MA11 VMB_CKE1 VMB_DQ12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VMB_MA12
22 VMB_CKE1
VMA_CLK0 VMA_DQ12 F28 DQA0_12 MAA1_4/MAA_12 J16 VMA_MA12 VMB_DQ13 L4 DQB0_13 MAB1_5/BA2 AA8 VMB_BA2
21 VMA_CLK0
VMA_CLK0# VMA_DQ13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 VMA_BA2 VMB_CLK0 VMB_DQ14 M6 DQB0_14 MAB1_6/BA0 Y8 VMB_BA0
21 VMA_CLK0# 22 VMB_CLK0
VMA_DQ14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VMA_BA0 22 VMB_CLK0# VMB_CLK0# VMB_DQ15 M1 DQB0_15 MAB1_7/BA1 AA9 VMB_BA1
21 VMA_CLK1 VMA_CLK1 VMA_DQ15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3 DQB0_16
MEMORY INTERFACE B
VMA_CLK1# VMA_DQ16 D27 DQA0_16 VMB_CLK1 VMB_DQ17 M5 DQB0_17 WCKB0_0/DQMB_0 H3 VMB_DM0
21 VMA_CLK1# 22 VMB_CLK1
VMA_DQ17 F26 DQA0_17 WCKA0_0/DQMA_0 A32 VMA_DM0 VMB_CLK1# VMB_DQ18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1 VMB_DM1
22 VMB_CLK1#
VMA_WDQS[7..0] VMA_DQ18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 DQB0_19 WCKB0_1/DQMB_2 T3 VMB_DM2
21 VMA_WDQS[7..0] VMB_WDQS[7..0]
VMA_DQ19 A26 DQA0_19 WCKA0_1/DQMA_2 D23 VMA_DM2 VMB_DQ20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5 VMB_DM3
VMA_RDQS[7..0] 22 VMB_WDQS[7..0]
VMA_DQ20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4 VMB_DM4
21 VMA_RDQS[7..0] VMB_RDQS[7..0]
VMA_DQ21 C24 DQA0_21 WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 VMB_DM5
VMA_DM[7..0] 22 VMB_RDQS[7..0]
VMA_DQ22 A24 DQA0_22 WCKA1B_0/DQMA_5 A14 VMA_DM5 VMB_DQ23 T1 DQB0_23 WCKB1_1/DQMB_6 AK6 VMB_DM6
21 VMA_DM[7..0] E24 E10 VMB_DM[7..0] U4 AK5
VMA_DQ23 DQA0_23 WCKA1_1/DQMA_6 VMA_DM6 VMB_DQ24 DQB0_24 WCKB1B_1/DQMB_7 VMB_DM7
VMA_DQ[63..0] 22 VMB_DM[7..0]
VMA_DQ24 C22 DQA0_24 WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_25
21 VMA_DQ[63..0] VMB_DQ[63..0]
VMA_DQ25 A22 DQA0_25 VMB_DQ26 V1 DQB0_26 EDCB0_0/QSB_0 F6 VMB_RDQS0
VMA_MA[14..0] 22 VMB_DQ[63..0]
VMA_DQ26 F22 DQA0_26 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 DQB0_27 EDCB0_1/QSB_1 K3 VMB_RDQS1
21 VMA_MA[14..0]
VMA_DQ27 D21 DQA0_27 EDCA0_1/QSA_1 D29 VMA_RDQS1 VMB_MA[14..0] VMB_DQ28 Y6 DQB0_28 EDCB0_2/QSB_2 P3 VMB_RDQS2
22 VMB_MA[14..0]
VMA_DQ28 A20 DQA0_28 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 DQB0_29 EDCB0_3/QSB_3 V5 VMB_RDQS3
21 VMA_BA0 VMA_BA0 VMA_DQ29 F20 DQA0_29 EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 VMB_RDQS4
21 VMA_BA1 VMA_BA1 VMA_DQ30 D19 DQA0_30 EDCA1_0/QSA_4 E16 VMA_RDQS4 22 VMB_BA0 VMB_BA0 VMB_DQ31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1 VMB_RDQS5
VMA_BA2 VMA_DQ31 E18 DQA0_31 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_BA1 VMB_DQ32 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
21 VMA_BA2 22 VMB_BA1
VMA_DQ32 C18 DQA1_0 EDCA1_2/QSA_6 J10 VMA_RDQS6 VMB_BA2 VMB_DQ33 AB6 DQB1_1 EDCB1_3/QSB_7 AM5 VMB_RDQS7
A18 D7 22 VMB_BA2 AB1
VMA_DQ33 DQA1_1 EDCA1_3/QSA_7 VMA_RDQS7 VMB_DQ34 DQB1_2
VMA_DQ34 F18 DQA1_2 VMB_DQ35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 VMB_WDQS0
VMA_DQ35 D17 DQA1_3 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DQB1_4 DDBIB0_1/QSB_1B K1 VMB_WDQS1
VMA_DQ36 A16 DQA1_4 DDBIA0_1/QSA_1B E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_5 DDBIB0_2/QSB_2B P1 VMB_WDQS2
+1.5V_VGA VMA_DQ37 F16 DQA1_5 DDBIA0_2/QSA_2B E26 VMA_WDQS2 +1.5V_VGA VMB_DQ38 AD3 DQB1_6 DDBIB0_3/QSB_3B W4 VMB_WDQS3
VMA_DQ38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
VMA_DQ39 E14 DQA1_7 DDBIA1_0/QSA_4B C16 VMA_WDQS4 VMB_DQ40 AF1 DQB1_8 DDBIB1_1/QSB_5B AH3 VMB_WDQS5
C VMA_DQ40 F14 DQA1_8 DDBIA1_1/QSA_5B C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8 VMB_WDQS6 C
R331 VMA_DQ41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 VMA_WDQS6 R317 VMB_DQ42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 DQA1_10 DDBIA1_3/QSA_7B F8 VMA_WDQS7 VMB_DQ43 AG4 DQB1_11
*40.2/F_4 VMA_DQ43 A12 DQA1_11 40.2/F_4 VMB_DQ44 AH5 DQB1_12 ADBIB0/ODTB0 T7 VMB_ODT0
VMA_DQ44 D11 DQA1_12 ADBIA0/ODTA0 J21 VMA_ODT0 VMB_DQ45 AH6 DQB1_13 ADBIB1/ODTB1 W7 VMB_ODT1
VMA_DQ45 F10 DQA1_13 ADBIA1/ODTA1 G19 VMA_ODT1 VMB_DQ46 AJ4 DQB1_14
VMA_DQ46 A10 DQA1_14 VMB_DQ47 AK3 DQB1_15 CLKB0 L9 VMB_CLK0
VMA_DQ47 C10 DQA1_15 CLKA0 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_16 CLKB0B L8 VMB_CLK0#
VMA_DQ48 G13 DQA1_16 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9 DQB1_17
R330 VMA_DQ49 H13 DQA1_17 R321 VMB_DQ50 AG8 DQB1_18 CLKB1 AD8 VMB_CLK1
C466 VMA_DQ50 J13 DQA1_18 CLKA1 J14 VMA_CLK1 C440 VMB_DQ51 AG7 DQB1_19 CLKB1B AD7 VMB_CLK1#
*1U/6.3V_4 *100/F_4 VMA_DQ51 H11 DQA1_19 CLKA1B H14 VMA_CLK1# 1U/6.3V_4 100/F_4 VMB_DQ52 AK9 DQB1_20
VMA_DQ52 G10 DQA1_20 VMB_DQ53 AL7 DQB1_21 RASB0B T10 VMB_RAS0#
VMA_DQ53 G8 DQA1_21 RASA0B K23 VMA_RAS0# VMB_DQ54 AM8 DQB1_22 RASB1B Y10 VMB_RAS1#
VMA_DQ54 K9 DQA1_22 RASA1B K19 VMA_RAS1# VMB_DQ55 AM7 DQB1_23
PLACE MVREFD DIVIDERS VMA_DQ55 K10 DQA1_23 PLACE MVREFD DIVIDERS VMB_DQ56 AK1 DQB1_24 CASB0B W10 VMB_CAS0#
AND CAPS CLOSE TO ASIC VMA_DQ56 G9 DQA1_24 CASA0B K20 VMA_CAS0# AND CAPS CLOSE TO ASIC VMB_DQ57 AL4 DQB1_25 CASB1B AA10 VMB_CAS1#
VMA_DQ57 A8 DQA1_25 CASA1B K17 VMA_CAS1# VMB_DQ58 AM6 DQB1_26
+1.5V_VGA VMA_DQ58 C8 DQA1_26 +1.5V_VGA VMB_DQ59 AM1 DQB1_27 CSB0B_0 P10 VMB_CS0#
VMA_DQ59 E8 DQA1_27 CSA0B_0 K24 VMA_CS0# VMB_DQ60 AN4 DQB1_28 CSB0B_1 L10
VMA_DQ60 A6 DQA1_28 CSA0B_1 K27 VMB_DQ61 AP3 DQB1_29
VMA_DQ61 C6 DQA1_29 VMB_DQ62 AP1 DQB1_30 CSB1B_0 AD10 VMB_CS1#
R327 VMA_DQ62 E6 DQA1_30 CSA1B_0 M13 VMA_CS1# R159 VMB_DQ63 AP5 DQB1_31 CSB1B_1 AC10
VMA_DQ63 A5 DQA1_31 CSA1B_1 K16
*40.2/F_4 40.2/F_4 CKEB0 U10 VMB_CKE0
MVREFDA L18 MVREFDA CKEA0 K21 VMA_CKE0 MVREFDB Y12 MVREFDB CKEB1 AA11 VMB_CKE1
MVREFSA L20 MVREFSA CKEA1 J20 VMA_CKE1 MVREFSB AA12 MVREFSB
WEB0B N10 VMB_WE0#
L27 NC_MEM_CALRN0 WEA0B K26 VMA_WE0# WEB1B AB11 VMB_WE1#
N12 NC_MEM_CALRN1 WEA1B L15 VMA_WE1#
R328 AG12 NC_MEM_CALRN2 R145 need check
C462 C157 MAB0_8/MAB_13 T8 VMB_MA13
B *1U/6.3V_4 *100/F_4 M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 VMA_MA13 1U/6.3V_4 100/F_4 MAB1_8/MAB_14 W8 VMB_MA14 B
R295 120/F_4 M27 MEM_CALRP0 MAA1_8/MAA_14 J19 VMA_MA14 MAB0_9/MAB_15 U12
TP52
AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 MAB1_9/RSVD V12
TP61 TP49
MAA1_9/RSVD M20
TP60
DRAM_RST AH11 DRAM_RST
For MARS / SUN J19
Re stuff 120 ohm 1% For Mars : MAA_14
For Sun : NC 8/15 Modify
8/15: DB MODIFY SUN_M2_XT
SUN_M2_XT M21
For Mars : MAA_15
For Sun : NC
M20
For Mars : RSVD
For Sun : NC DRAM_RST R162 10/F_4 DRAM_RST_M
DRAM_RST_M 21,22
R170 51_4
8/15: DB MODIFY
R163 C177
4.99K/F_4
120P/50V_4
A A
352-(&75
18,21,22,34,43 +1.5V_VGA
+1.5V_VGA
4XDQWD&RPSXWHU,QF
1%
Custom 1A
THAMES_MEM_Interface
5 4 3 2 1
5 4 3 2 1
21
CHANNEL A: 256MB/512MB DDR3
VMA_MA[14..0]
20 VMA_MA[14..0] 20 VMA_DQ[63..0]
U16
D 20 VMA_DM[7..0] 20 VMA_WDQS[7..0] D
20 VMA_RDQS[7..0]
U17 VREFC_VMA3 M9 E4 VMA_DQ47 U29
U30 VREFD_VMA3 H2 VREFCA DQL0 F8 VMA_DQ44
VREFC_VMA2 M9 E4 VMA_DQ11 VREFDQ DQL1 F3 VMA_DQ45 VREFC_VMA4 M9 E4 VMA_DQ49
VREFC_VMA1 M9 E4 VMA_DQ0 VREFD_VMA2 H2 VREFCA DQL0 F8 VMA_DQ12 VMA_MA0 N4 DQL2 F9 VMA_DQ43 VREFD_VMA4 H2 VREFCA DQL0 F8 VMA_DQ52
VREFD_VMA1 H2 VREFCA DQL0 F8 VMA_DQ6 VREFDQ DQL1 F3 VMA_DQ15 VMA_MA1 P8 A0 DQL3 H4 VMA_DQ46 VREFDQ DQL1 F3 VMA_DQ50
VREFDQ DQL1 F3 VMA_DQ2 VMA_MA0 N4 DQL2 F9 VMA_DQ10 VMA_MA2 P4 A1 DQL4 H9 VMA_DQ41 VMA_MA0 N4 DQL2 F9 VMA_DQ54
VMA_MA0 N4 DQL2 F9 VMA_DQ7 VMA_MA1 P8 A0 DQL3 H4 VMA_DQ14 VMA_MA3 N3 A2 DQL5 G3 VMA_DQ40 VMA_MA1 P8 A0 DQL3 H4 VMA_DQ51
VMA_MA1 P8 A0 DQL3 H4 VMA_DQ3 VMA_MA2 P4 A1 DQL4 H9 VMA_DQ8 VMA_MA4 P9 A3 DQL6 H8 VMA_DQ42 VMA_MA2 P4 A1 DQL4 H9 VMA_DQ53
VMA_MA2 P4 A1 DQL4 H9 VMA_DQ4 VMA_MA3 N3 A2 DQL5 G3 VMA_DQ13 VMA_MA5 P3 A4 DQL7 VMA_MA3 N3 A2 DQL5 G3 VMA_DQ48
VMA_MA3 N3 A2 DQL5 G3 VMA_DQ1 VMA_MA4 P9 A3 DQL6 H8 VMA_DQ9 VMA_MA6 R9 A5 VMA_MA4 P9 A3 DQL6 H8 VMA_DQ55
VMA_MA4 P9 A3 DQL6 H8 VMA_DQ5 VMA_MA5 P3 A4 DQL7 VMA_MA7 R3 A6 D8 VMA_DQ32 VMA_MA5 P3 A4 DQL7
VMA_MA5 P3 A4 DQL7 VMA_MA6 R9 A5 VMA_MA8 T9 A7 DQU0 C4 VMA_DQ36 VMA_MA6 R9 A5
VMA_MA6 R9 A5 VMA_MA7 R3 A6 D8 VMA_DQ27 VMA_MA9 R4 A8 DQU1 C9 VMA_DQ33 VMA_MA7 R3 A6 D8 VMA_DQ60
VMA_MA7 R3 A6 D8 VMA_DQ20 VMA_MA8 T9 A7 DQU0 C4 VMA_DQ29 VMA_MA10 L8 A9 DQU2 C3 VMA_DQ38 VMA_MA8 T9 A7 DQU0 C4 VMA_DQ59
VMA_MA8 T9 A7 DQU0 C4 VMA_DQ19 VMA_MA9 R4 A8 DQU1 C9 VMA_DQ26 VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ34 VMA_MA9 R4 A8 DQU1 C9 VMA_DQ63
VMA_MA9 R4 A8 DQU1 C9 VMA_DQ23 VMA_MA10 L8 A9 DQU2 C3 VMA_DQ28 VMA_MA12 N8 A11 DQU4 A3 VMA_DQ39 VMA_MA10 L8 A9 DQU2 C3 VMA_DQ58
VMA_MA10 L8 A9 DQU2 C3 VMA_DQ17 VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ25 VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ35 VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ61
VMA_MA11 R8 A10/AP DQU3 A8 VMA_DQ22 VMA_MA12 N8 A11 DQU4 A3 VMA_DQ30 VMA_MA14 T8 A13 DQU6 A4 VMA_DQ37 VMA_MA12 N8 A11 DQU4 A3 VMA_DQ56
VMA_MA12 N8 A11 DQU4 A3 VMA_DQ16 VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ24 M8 A14 DQU7 VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ62
VMA_MA13 T4 A12/BC DQU5 B9 VMA_DQ21 VMA_MA14 T8 A13 DQU6 A4 VMA_DQ31 A15/BA3 +1.5V_VGA VMA_MA14 T8 A13 DQU6 A4 VMA_DQ57
VMA_MA14 T8 A13 DQU6 A4 VMA_DQ18 M8 A14 DQU7 VMA_CLK0 M8 A14 DQU7
M8 A14 DQU7 A15/BA3 +1.5V_VGA VMA_BA0 M3 B3 A15/BA3 +1.5V_VGA
A15/BA3 +1.5V_VGA VMA_BA1 N9 BA0 VDD#B3 D10
VMA_BA0 M3 B3 R338 VMA_BA2 M4 BA1 VDD#D10 G8 VMA_BA0 M3 B3
M3 B3 VMA_BA1 N9 BA0 VDD#B3 D10 BA2 VDD#G8 K3 VMA_BA1 N9 BA0 VDD#B3 D10
20 VMA_BA0 BA0 VDD#B3 BA1 VDD#D10 VDD#K3 BA1 VDD#D10
N9 D10 VMA_BA2 M4 G8 *40.2/F_4 K9 VMA_BA2 M4 G8
20 VMA_BA1 BA1 VDD#D10 BA2 VDD#G8 C512 VDD#K9 BA2 VDD#G8
M4 G8 K3 N2 K3
20 VMA_BA2 BA2 VDD#G8 VDD#K3 VDD#N2 VDD#K3
K3 K9 VMA_CLK0_COMM J8 N10 K9
VDD#K3 VDD#K9 20 VMA_CLK1 CK VDD#N10 VDD#K9
K9 N2 K8 R2 N2
VDD#K9 VDD#N2 20 VMA_CLK1# CK VDD#R2 VDD#N2
N2 VMA_CLK0 J8 N10 K10 R10 VMA_CLK1 J8 N10
VDD#N2 CK VDD#N10 *0.01U/16V_4 20 VMA_CKE1 CKE/CKE0 VDD#R10 +1.5V_VGA CK VDD#N10
J8 N10 VMA_CLK0# K8 R2 R337 VMA_CLK1# K8 R2
20 VMA_CLK0 CK VDD#N10 CK VDD#R2 CK VDD#R2
K8 R2 VMA_CKE0 K10 R10 VMA_CKE1 K10 R10
20 VMA_CLK0# CK VDD#R2 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
K10 R10 *40.2/F_4 K2 A2
20 VMA_CKE0 CKE/CKE0 VDD#R10 +1.5V_VGA 20 VMA_ODT1 ODT/ODT0 VDDQ#A2
L3 A9
20 VMA_CS1# CS /CS0 VDDQ#A9
VMA_ODT0 K2 A2 VMA_CLK0# J4 C2 VMA_ODT1 K2 A2
ODT/ODT0 VDDQ#A2 20 VMA_RAS1# RAS VDDQ#C2 ODT/ODT0 VDDQ#A2
K2 A2 VMA_CS0# L3 A9 VMA_CLK1 K4 C10 VMA_CS1# L3 A9
20 VMA_ODT0 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 20 VMA_CAS1# CAS VDDQ#C10 CS /CS0 VDDQ#A9
L3 A9 VMA_RAS0# J4 C2 L4 D3 VMA_RAS1# J4 C2
20 VMA_CS0# CS /CS0 VDDQ#A9 RAS VDDQ#C2 20 VMA_WE1# WE VDDQ#D3 RAS VDDQ#C2
J4 C2 VMA_CAS0# K4 C10 E10 VMA_CAS1# K4 C10
20 VMA_RAS0# RAS VDDQ#C2 CAS VDDQ#C10 VDDQ#E10 CAS VDDQ#C10
K4 C10 VMA_WE0# L4 D3 R540 F2 VMA_WE1# L4 D3
20 VMA_CAS0# CAS VDDQ#C10 WE VDDQ#D3 VDDQ#F2 WE VDDQ#D3
L4 D3 E10 VMA_RDQS5 F4 H3 E10
20 VMA_WE0# WE VDDQ#D3 VDDQ#E10 DQSL VDDQ#H3 VDDQ#E10
E10 F2 *40.2/F_4 VMA_RDQS4 C8 H10 F2
C VDDQ#E10 VDDQ#F2 C787 DQSU VDDQ#H10 VDDQ#F2 C
F2 VMA_RDQS1 F4 H3 VMA_RDQS6 F4 H3
VMA_RDQS0 F4 VDDQ#F2 H3 VMA_RDQS3 C8 DQSL VDDQ#H3 H10 VMA_CLK1_COMM VMA_RDQS7 C8 DQSL VDDQ#H3 H10
VMA_RDQS2 C8 DQSL VDDQ#H3 H10 DQSU VDDQ#H10 VMA_DM5 E8 A10 DQSU VDDQ#H10
DQSU VDDQ#H10 VMA_DM4 D4 DML VSS#A10 B4
VMA_DM1 E8 A10 R541 *0.01U/16V_4 DMU VSS#B4 E2 VMA_DM6 E8 A10
VMA_DM0 E8 A10 VMA_DM3 D4 DML VSS#A10 B4 VSS#E2 G9 VMA_DM7 D4 DML VSS#A10 B4
VMA_DM2 D4 DML VSS#A10 B4 DMU VSS#B4 E2 *40.2/F_4 VMA_WDQS5 G4 VSS#G9 J3 DMU VSS#B4 E2
DMU VSS#B4 E2 VSS#E2 G9 VMA_WDQS4 B8 DQSL VSS#J3 J9 VSS#E2 G9
VSS#E2 G9 VMA_WDQS1 G4 VSS#G9 J3 VMA_CLK1# DQSU VSS#J9 M2 VMA_WDQS6 G4 VSS#G9 J3
VMA_WDQS0 G4 VSS#G9 J3 VMA_WDQS3 B8 DQSL VSS#J3 J9 VSS#M2 M10 VMA_WDQS7 B8 DQSL VSS#J3 J9
VMA_WDQS2 B8 DQSL VSS#J3 J9 DQSU VSS#J9 M2 VSS#M10 P2 DQSU VSS#J9 M2
DQSU VSS#J9 M2 VSS#M2 M10 DRAM_RST_M T3 VSS#P2 P10 VSS#M2 M10
VSS#M2 M10 VSS#M10 P2 RESET VSS#P10 T2 VSS#M10 P2
VSS#M10 P2 DRAM_RST_M T3 VSS#P2 P10 VMA_ZQ3 L9 VSS#T2 T10 DRAM_RST_M T3 VSS#P2 P10
T3 VSS#P2 P10 RESET VSS#P10 T2 ZQ/ZQ0 VSS#T10 RESET VSS#P10 T2
20,22 DRAM_RST_M RESET VSS#P10 VSS#T2 VSS#T2
T2 VMA_ZQ2 L9 T10 VMA_ZQ4 L9 T10
VMA_ZQ1 L9 VSS#T2 T10 ZQ/ZQ0 VSS#T10 A1 B2 ZQ/ZQ0 VSS#T10
ZQ/ZQ0 VSS#T10 T1 NC VSSQ#B2 B10
A1 B2 R333 A11 NC VSSQ#B10 D2 A1 B2
NC VSSQ#B2 Should be 240 NC VSSQ#D2 NC VSSQ#B2
A1 B2 T1 B10 Ohms +-1% *243/F_4 T11 D9 T1 B10
T1 NC VSSQ#B2 B10 R341 A11 NC VSSQ#B10 D2 NC VSSQ#D9 E3 R546 A11 NC VSSQ#B10 D2
NC VSSQ#B10
Should be 240 NC VSSQ#D2 VSSQ#E3 Should be 240 NC VSSQ#D2
Should be 240 R549 A11 D2 Ohms +-1% *243/F_4 T11 D9 J2 E9 Ohms +-1% *243/F_4 T11 D9
T11 NC VSSQ#D2 D9 NC VSSQ#D9 E3 L2 NC/ODT1 VSSQ#E9 F10 NC VSSQ#D9 E3
Ohms +-1% *243/F_4
NC VSSQ#D9 VSSQ#E3 NC/CS1 VSSQ#F10 VSSQ#E3
E3 J2 E9 J10 G2 J2 E9
J2 VSSQ#E3 E9 L2 NC/ODT1 VSSQ#E9 F10 L10 NC/CE1 VSSQ#G2 G10 L2 NC/ODT1 VSSQ#E9 F10
L2 NC/ODT1 VSSQ#E9 F10 J10 NC/CS1 VSSQ#F10 G2 NC/ZQ1 VSSQ#G10 J10 NC/CS1 VSSQ#F10 G2
J10 NC/CS1 VSSQ#F10 G2 L10 NC/CE1 VSSQ#G2 G10 100-BALL L10 NC/CE1 VSSQ#G2 G10
L10 NC/CE1 VSSQ#G2 G10 NC/ZQ1 VSSQ#G10 SDRAM DDR3 NC/ZQ1 VSSQ#G10
NC/ZQ1 VSSQ#G10 100-BALL *H5TC4G63AFR-11C 100-BALL
100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 *H5TC4G63AFR-11C *H5TC4G63AFR-11C
*H5TC4G63AFR-11C
B B
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA
R339 R332 R560 R326 R545 R547

R551 R559 *4.99K/F_4 *4.99K/F_4 *4.99K/F_4 *4.99K/F_4 *4.99K/F_4 *4.99K/F_4
*4.99K/F_4 *4.99K/F_4
VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4

VREFC_VMA1 VREFD_VMA1
R340 R336 R557 R329 R543 R553

R555 R558 *4.99K/F_4 C513 *4.99K/F_4 C477 *4.99K/F_4 C801 *4.99K/F_4 C465 *4.99K/F_4 C791 *4.99K/F_4 C795
*4.99K/F_4 C797 *4.99K/F_4 C816 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4
*0.1U/10V_4 *0.1U/10V_4
+1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA
C794 C822 C824 C823 C803 C807 C817 C819 C818 C516 C505 C463 C503 C504 C507 C464 C506 C515
*10U/6.3VS_6 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *10U/6.3VS_6 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 C484 C454 C450 C486 C487 C502 C469 C471 C492 C798 C813 C808 C497 C815 C810 C811 C812 C806
*10U/6.3VS_6 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *10U/6.3VS_6 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4
+1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA
C799 C802 C820 C821 C805 C800 C825 C804 C508 C510 C473 C501 C494 C509 C490 C511
*0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 C488 C483 C491 C456 C452 C493 C498 C474 C814 C790 C496 C809 C495 C478 C786 C789
*0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4
A A
+1.5V_VGA 352-(&75
4XDQWD&RPSXWHU,QF
18,20,22,34,43 +1.5V_VGA
1%
Custom 3A
VRAM-A (DDR3 BGA96)
5 4 3 2 1
5 4 3 2 1
22
VMB_MA[14..0]
20,22 VMB_MA[14..0] 20 VMB_DQ[63..0]
20 VMB_DM[7..0] 20 VMB_WDQS[7..0]
20 VMB_RDQS[7..0] CHANNEL B: 256MB/512MB DDR3
D D
U9 U25
U14
VREFC_VMB3 M9 E4 VMB_DQ63 VREFC_VMB4 M9 E4 VMB_DQ50
VREFC_VMB1 M9 E4 VMB_DQ4 U27 VREFD_VMB3 H2 VREFCA DQL0 F8 VMB_DQ57 VREFD_VMB4 H2 VREFCA DQL0 F8 VMB_DQ53
VREFD_VMB1 H2 VREFCA DQL0 F8 VMB_DQ0 VREFDQ DQL1 F3 VMB_DQ61 VREFDQ DQL1 F3 VMB_DQ49
VREFDQ DQL1 F3 VMB_DQ6 VREFC_VMB2 M9 E4 VMB_DQ11 VMB_MA0 N4 DQL2 F9 VMB_DQ58 VMB_MA0 N4 DQL2 F9 VMB_DQ52
N4 DQL2 F9 VMB_DQ1 VREFD_VMB2 H2 VREFCA DQL0 F8 VMB_DQ14 VMB_MA1 P8 A0 DQL3 H4 VMB_DQ62 VMB_MA1 P8 A0 DQL3 H4 VMB_DQ51
20,22 VMB_MA0 A0 DQL3 VREFDQ DQL1 A1 DQL4 A1 DQL4
20,22 VMB_MA1
P8 H4 VMB_DQ5 F3 VMB_DQ9 VMB_MA2 P4 H9 VMB_DQ56 VMB_MA2 P4 H9 VMB_DQ55
P4 A1 DQL4 H9 VMB_DQ3 VMB_MA0 N4 DQL2 F9 VMB_DQ12 VMB_MA3 N3 A2 DQL5 G3 VMB_DQ60 VMB_MA3 N3 A2 DQL5 G3 VMB_DQ48
20,22 VMB_MA2 A2 DQL5 A0 DQL3 A3 DQL6 A3 DQL6
20,22 VMB_MA3 N3 G3 VMB_DQ7 VMB_MA1 P8 H4 VMB_DQ10 VMB_MA4 P9 H8 VMB_DQ59 VMB_MA4 P9 H8 VMB_DQ54
P9 A3 DQL6 H8 VMB_DQ2 VMB_MA2 P4 A1 DQL4 H9 VMB_DQ15 VMB_MA5 P3 A4 DQL7 VMB_MA5 P3 A4 DQL7
20,22 VMB_MA4 A4 DQL7 A2 DQL5 A5 A5
20,22 VMB_MA5
P3 VMB_MA3 N3 G3 VMB_DQ8 VMB_MA6 R9 VMB_MA6 R9
R9 A5 VMB_MA4 P9 A3 DQL6 H8 VMB_DQ13 VMB_MA7 R3 A6 D8 VMB_DQ40 VMB_MA7 R3 A6 D8 VMB_DQ36
20,22 VMB_MA6 A6 A4 DQL7 A7 DQU0 A7 DQU0
20,22 VMB_MA7
R3 D8 VMB_DQ21 VMB_MA5 P3 VMB_MA8 T9 C4 VMB_DQ46 VMB_MA8 T9 C4 VMB_DQ33
T9 A7 DQU0 C4 VMB_DQ23 VMB_MA6 R9 A5 VMB_MA9 R4 A8 DQU1 C9 VMB_DQ41 VMB_MA9 R4 A8 DQU1 C9 VMB_DQ38
20,22 VMB_MA8 A8 DQU1 A6 A9 DQU2 A9 DQU2
20,22 VMB_MA9
R4 C9 VMB_DQ17 VMB_MA7 R3 D8 VMB_DQ31 VMB_MA10 L8 C3 VMB_DQ47 VMB_MA10 L8 C3 VMB_DQ32
L8 A9 DQU2 C3 VMB_DQ22 VMB_MA8 T9 A7 DQU0 C4 VMB_DQ26 VMB_MA11 R8 A10/AP DQU3 A8 VMB_DQ44 VMB_MA11 R8 A10/AP DQU3 A8 VMB_DQ39
20,22 VMB_MA10 A10/AP DQU3 A8 DQU1 A11 DQU4 A11 DQU4
20,22 VMB_MA11
R8 A8 VMB_DQ16 VMB_MA9 R4 C9 VMB_DQ30 VMB_MA12 N8 A3 VMB_DQ45 VMB_MA12 N8 A3 VMB_DQ35
N8 A11 DQU4 A3 VMB_DQ19 VMB_MA10 L8 A9 DQU2 C3 VMB_DQ27 VMB_MA13 T4 A12/BC DQU5 B9 VMB_DQ43 VMB_MA13 T4 A12/BC DQU5 B9 VMB_DQ37
20,22 VMB_MA12 A12/BC DQU5 A10/AP DQU3 A13 DQU6 A13 DQU6
20,22 VMB_MA13 T4 B9 VMB_DQ18 VMB_MA11 R8 A8 VMB_DQ28 VMB_MA14 T8 A4 VMB_DQ42 VMB_MA14 T8 A4 VMB_DQ34
T8 A13 DQU6 A4 VMB_DQ20 VMB_MA12 N8 A11 DQU4 A3 VMB_DQ24 M8 A14 DQU7 M8 A14 DQU7
20,22 VMB_MA14 A14 DQU7 A12/BC DQU5 A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA
M8 VMB_MA13 T4 B9 VMB_DQ29
A15/BA3 +1.5V_VGA VMB_MA14 T8 A13 DQU6 A4 VMB_DQ25
M8 A14 DQU7 VMB_BA0 M3 B3 VMB_BA0 M3 B3
M3 B3 A15/BA3 +1.5V_VGA VMB_BA1 N9 BA0 VDD#B3 D10 VMB_BA1 N9 BA0 VDD#B3 D10
20 VMB_BA0 BA0 VDD#B3 BA1 VDD#D10 BA1 VDD#D10
20 VMB_BA1
N9 D10 VMB_BA2 M4 G8 VMB_BA2 M4 G8
M4 BA1 VDD#D10 G8 VMB_BA0 M3 B3 BA2 VDD#G8 K3 BA2 VDD#G8 K3
20 VMB_BA2 BA2 VDD#G8 BA0 VDD#B3 VDD#K3 VDD#K3
K3 VMB_BA1 N9 D10 K9 K9
VDD#K3 K9 VMB_BA2 M4 BA1 VDD#D10 G8 VDD#K9 N2 VDD#K9 N2
VDD#K9 N2 BA2 VDD#G8 K3 J8 VDD#N2 N10 VMB_CLK1 J8 VDD#N2 N10
VDD#N2 VDD#K3 20 VMB_CLK1 CK VDD#N10 CK VDD#N10
20 VMB_CLK0
J8 N10 K9 20 VMB_CLK1#
K8 R2 VMB_CLK1# K8 R2
K8 CK VDD#N10 R2 VDD#K9 N2 K10 CK VDD#R2 R10 VMB_CKE1 K10 CK VDD#R2 R10
20 VMB_CLK0# CK VDD#R2 VDD#N2 20 VMB_CKE1 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
20 VMB_CKE0
K10 R10 VMB_CLK0 J8 N10 VMB_CLK0
CKE/CKE0 VDD#R10 +1.5V_VGA VMB_CLK0# K8 CK VDD#N10 R2
VMB_CKE0 K10 CK VDD#R2 R10 VMB_ODT1 K2 A2 VMB_ODT1 K2 A2
CKE/CKE0 VDD#R10 +1.5V_VGA 20 VMB_ODT1 ODT/ODT0 VDDQ#A2 ODT/ODT0 VDDQ#A2
VMB_ODT0 K2 A2 R308 20 VMB_CS1#
L3 A9 VMB_CS1# L3 A9
20 VMB_ODT0 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 CS /CS0 VDDQ#A9
20 VMB_CS0#
L3 A9 20 VMB_RAS1#
J4 C2 VMB_RAS1# J4 C2
J4 CS /CS0 VDDQ#A9 C2 VMB_ODT0 K2 A2 40.2/F_4 K4 RAS VDDQ#C2 C10 VMB_CAS1# K4 RAS VDDQ#C2 C10
20 VMB_RAS0# RAS VDDQ#C2 ODT/ODT0 VDDQ#A2 C433 20 VMB_CAS1# CAS VDDQ#C10 CAS VDDQ#C10
20 VMB_CAS0#
K4 C10 VMB_CS0# L3 A9 20 VMB_WE1#
L4 D3 VMB_WE1# L4 D3
L4 CAS VDDQ#C10 D3 VMB_RAS0# J4 CS /CS0 VDDQ#A9 C2 VMB_CLK0_COMM WE VDDQ#D3 E10 WE VDDQ#D3 E10
20 VMB_WE0# WE VDDQ#D3 RAS VDDQ#C2 VDDQ#E10 VDDQ#E10
E10 VMB_CAS0# K4 C10 F2 F2
C VDDQ#E10 F2 VMB_WE0# L4 CAS VDDQ#C10 D3 VMB_RDQS7 F4 VDDQ#F2 H3 VMB_RDQS6 F4 VDDQ#F2 H3 C
VMB_RDQS0 F4 VDDQ#F2 H3 WE VDDQ#D3 E10 R307 0.01U/16V_4 VMB_RDQS5 C8 DQSL VDDQ#H3 H10 VMB_RDQS4 C8 DQSL VDDQ#H3 H10
VMB_RDQS2 C8 DQSL VDDQ#H3 H10 VDDQ#E10 F2 DQSU VDDQ#H10 DQSU VDDQ#H10
DQSU VDDQ#H10 VMB_RDQS1 F4 VDDQ#F2 H3 40.2/F_4
VMB_RDQS3 C8 DQSL VDDQ#H3 H10 VMB_DM7 E8 A10 VMB_DM6 E8 A10
VMB_DM0 E8 A10 DQSU VDDQ#H10 VMB_CLK0# VMB_DM5 D4 DML VSS#A10 B4 VMB_DM4 D4 DML VSS#A10 B4
VMB_DM2 D4 DML VSS#A10 B4 VMB_CLK1 DMU VSS#B4 E2 DMU VSS#B4 E2
DMU VSS#B4 E2 VMB_DM1 E8 A10 VSS#E2 G9 VSS#E2 G9
VSS#E2 G9 VMB_DM3 D4 DML VSS#A10 B4 VMB_WDQS7 G4 VSS#G9 J3 VMB_WDQS6 G4 VSS#G9 J3
VMB_WDQS0 G4 VSS#G9 J3 DMU VSS#B4 E2 R165 VMB_WDQS5 B8 DQSL VSS#J3 J9 VMB_WDQS4 B8 DQSL VSS#J3 J9
VMB_WDQS2 B8 DQSL VSS#J3 J9 VSS#E2 G9 DQSU VSS#J9 M2 DQSU VSS#J9 M2
DQSU VSS#J9 M2 VMB_WDQS1 G4 VSS#G9 J3 40.2/F_4 VSS#M2 M10 VSS#M2 M10
VSS#M2 DQSL VSS#J3 C168 VSS#M10 VSS#M10
M10 VMB_WDQS3 B8 J9 P2 P2
VSS#M10 P2 DQSU VSS#J9 M2 VMB_CLK1_COMM T3 VSS#P2 P10 T3 VSS#P2 P10
VSS#P2 VSS#M2 20,21,22 DRAM_RST_M RESET VSS#P10 20,21,22 DRAM_RST_M RESET VSS#P10
T3 P10 M10 T2 T2
20,21,22 DRAM_RST_M RESET VSS#P10 VSS#M10 VSS#T2 VSS#T2
T2 P2 VMB_ZQ3 L9 T10 VMB_ZQ4 L9 T10
VMB_ZQ1 L9 VSS#T2 T10 T3 VSS#P2 P10 R164 0.01U/16V_4 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
ZQ/ZQ0 VSS#T10 20,21,22 DRAM_RST_M RESET VSS#P10 T2 Should be 240 Should be 240
VMB_ZQ2 L9 VSS#T2 T10 40.2/F_4 A1 B2 A1 B2
Should be 240 ZQ/ZQ0 VSS#T10 Ohms +-1% NC VSSQ#B2 Ohms +-1% NC VSSQ#B2
Ohms +-1% A1 B2 T1 B10 T1 B10
T1 NC VSSQ#B2 B10 VMB_CLK1# R229 A11 NC VSSQ#B10 D2 R140 A11 NC VSSQ#B10 D2
NC VSSQ#B10
Should be 240 NC VSSQ#D2 NC VSSQ#D2
R311 A11 D2 Ohms +-1% A1 B2 243/F_4 T11 D9 243/F_4 T11 D9
T11 NC VSSQ#D2 D9 T1 NC VSSQ#B2 B10 NC VSSQ#D9 E3 NC VSSQ#D9 E3
243/F_4
NC VSSQ#D9 E3 R506 A11 NC VSSQ#B10 D2 J2 VSSQ#E3 E9 J2 VSSQ#E3 E9
J2 VSSQ#E3 E9 T11 NC VSSQ#D2 D9 L2 NC/ODT1 VSSQ#E9 F10 L2 NC/ODT1 VSSQ#E9 F10
243/F_4
L2 NC/ODT1 VSSQ#E9 F10 NC VSSQ#D9 E3 J10 NC/CS1 VSSQ#F10 G2 J10 NC/CS1 VSSQ#F10 G2
J10 NC/CS1 VSSQ#F10 G2 J2 VSSQ#E3 E9 L10 NC/CE1 VSSQ#G2 G10 L10 NC/CE1 VSSQ#G2 G10
L10 NC/CE1 VSSQ#G2 G10 L2 NC/ODT1 VSSQ#E9 F10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
NC/ZQ1 VSSQ#G10 J10 NC/CS1 VSSQ#F10 G2 100-BALL 100-BALL
100-BALL L10 NC/CE1 VSSQ#G2 G10 SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 NC/ZQ1 VSSQ#G10 H5TC4G63AFR-11C H5TC4G63AFR-11C
H5TC4G63AFR-11C 100-BALL
SDRAM DDR3
H5TC4G63AFR-11C
B B
+1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA
R227 R143
R508 R539 4.99K/F_4 4.99K/F_4
R309 R244 4.99K/F_4 4.99K/F_4 R144 R498
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMB3 VREFD_VMB3
VREFC_VMB2 VREFD_VMB2
VREFC_VMB1 VREFD_VMB1 VREFC_VMB4 VREFD_VMB4
R228 R149
R507 R538 4.99K/F_4 C302 4.99K/F_4 C163
R310 R243 4.99K/F_4 C735 4.99K/F_4 C773 0.1U/10V_4 0.1U/10V_4 R139 R500
4.99K/F_4 C427 4.99K/F_4 C324 0.1U/10V_4 0.1U/10V_4 4.99K/F_4 C154 4.99K/F_4 C718
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
C436 C329 C328 C326 C426 C325 C334 C336 C277 C768 C736 C775 C781 C414 C782 C780 C778 C776 C179 C175 C305 C299 C185 C192 C304 C398 C298 C706 C724 C720 C722 C723 C188 C702 C746 C165
10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
C424 C332 C327 C423 C425 C333 C301 C432 C737 C721 C749 C779 C777 C418 C765 C774 C218 C166 C303 C297 C300 C182 C184 C183 C762 C760 C696 C756 C164 C187 C186 C687
A 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 A
18,20,21,22,34,43 +1.5V_VGA
+1.5V_VGA
352-(&75
18,20,21,22,34,43 +1.5V_VGA
+1.5V_VGA 4XDQWD&RPSXWHU,QF
1%
Custom 1A
VRAM-B (DDR3 BGA96)
5 4 3 2 1
1 2 3 4 5 6 7 8
23
7,26,28,29,32,33,34,39 +5V
2,6,7,8,9,10,12,13,14,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V
29,30,34,36,37,38,39,40,41,42,43,44 +5VS5
26 +5V_HDMIC
^/
CRT PORT
Ws
16
6
CRT_R L15 BLM18BB470 CRT_R1 1 11
A 6 CRT_R A
7
CRT_G L14 BLM18BB470 CRT_G1 2 12 CRTDDCDAT2 C170 *470P/50V_4
6 CRT_G
8
CRT_B L13 BLM18BB470 CRT_B1 3 13 CRTHSYNC C199 10P/50V_4
6 CRT_B +5V_HDMIC 9
4 14 CRTVSYNC C200 10P/50V_4
R112R104R100 10
C125 5 15 CRTDDCCLK2 C174 *470P/50V_4
C131 C115 22P/50V_4 C101 C102 C138
150/F_4 22P/50V_4 22P/50V_4 22P/50V_4 22P/50V_4 22P/50V_4
150/F_4
17
150/F_4
CRT CONN
EMI CN9
DFDS15FR362
HSYNC_COM dsub-dsd-15atxb-15p
6 HSYNC_COM
VSYNC_COM
6 VSYNC_COM
DDCCLK
6 DDCCLK
DDCDATA
6 DDCDATA
+5V
U7
+5V_CRT2 1 16 CRT_VSYNC1 R157 22_4 CRTVSYNC
VCC_SYNC SYNC_OUT2 14 CRT_HSYNC1 R156 22_4 CRTHSYNC
7 SYNC_OUT1
C134 0.22U/25V_6 CRT_BYP 8 VCC_DDC
BYP 15 VSYNC_COM +5V_CRT2
B 2 SYNC_IN2 13 HSYNC_COM B
+3V VCC_VIDEO SYNC_IN1
R148 R160
CRT_R1 3 10 DDCCLK 2.2K_4 2.2K_4
CRT_G1 4 VIDEO_1 DDC_IN1 11 DDCDATA
CRT_B1 5 VIDEO_2 DDC_IN2
VIDEO_3 9 VGA_DDC_CLK_RT CRTDDCCLK2
6 DDC_OUT1 12 VGA_DDC_DAT_RT CRTDDCDAT2
GND DDC_OUT2
TPD7S019
9/29 EMI request

+5VS5
+3V
DDCCLK R168 2.7K_4

DDCDATA R169 2.7K_4
+5V_HDMIC 2 1 +5V_CRT2
C609 C64 C71 +5V_HDMIC
MEK500V-40 D3
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 C146
0.1U/10V_4
9/27 EMI request
C C
&E W,<d CPU BKT VGA BKT

HOLE H2
*O-LX9-1
H19
h-tc177bc276ic162d122p2
H18
h-tc177bc276ic162d122p2
H11
*intel-cpu-bkt2 H15
*H-TC248BC197D150P2
H14
*H-TC248BC197D150P2
H10
*H-TC248BC197D150P2
4
3
H27 H16 H5 H6 H4
1
2
*spad-r63-8np *h-tc354bc315ic150d110p2 *h-c354ic150d110p2 *h-c354ic150d110p2 *h-c354ic150d110p2
1
1
EWEDh>
1
<
d,ZD><d
H9 H1 H13 H8
Ws H20 H22 H21 H3 H17 H26
h-tc177bc276ic162d122p2 *h-tc256bc276d168x155p2 *H-TC354BC315IC150D110P2 *H-TC354BC315IC150D110P2
*H-C315IC150D110P2 *h-c197d110p2 *h-c315ic150d110p2 *H-C197D110P2 *h-tc276bc315d236p2 *H-C87D87N

1
1
D D
1
H24
*h-e315x278d110p2
H25
*spad-re197x79np
WWs, 352-(&75
^/, 4XDQWD&RPSXWHU,QF
1
Ws,
1

1%
Custom CRT,Hole 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
+3.3V_2136_A
RTD2136S Power Up Sequence 24
ZWKEW +1.2V_2136
WDd
RTD2136 Dual Channel only
+3.3V_2136_D
R106 *0_4 EDP_AUXN_R

EDP_AUXN_R 25
D R105 *0_4 EDP_AUXP_R EDP_AUXP_R 25 EDDID EEPROM D
R107 *0_4 EDP_TXP0_R
R108 *0_4 EDP_TXN0_R
EDP_TXP0_R 25 +SWR_LX VCC
EDP_TXN0_R 25
R109 *0_4 EDP_TXP1_R EDP_TXP1_R 25
R110 *0_4 EDP_TXN1_R DP2LVDS VCC
EDP_TXN1_R 25
R113 100k/F_4
17
11
15
43
18
22
U4
5
HPD
DP_V12
DP_V33
SWR_LX
SWR_VCCK
VCCK
SWR_VDD
PVCC
EDP_HPD_2136 42
TXO0- 41 TXLOUT0-_2136 25
TXO0+ TXLOUT0+_2136 25 <=100ms
TP5 1 40
2 DP_HPD TXO1- 39 TXLOUT1-_2136 25
3 TESTMODE TXO1+ 38 TXLOUT1+_2136 25
EDP_AUXN C119 0.1U/10V_4 EDP_AUXN_2136
2 EDP_AUXN AUX-CH_N TXO2- TXLOUT2- 25
EDP_AUXP C118 0.1U/10V_4 EDP_AUXP_2136 4 37
2 EDP_AUXP AUX-CH_P TXO2+ TXLOUT2+ 25
TP6 36
EDP_TXP0 EDP_TXP0_2136 7 TXOC- 35 TXLCLKOUT- 25
2 EDP_TXP0 C120 0.1U/10V_4
8 LANE0P TXOC+ 34 TXLCLKOUT+ 25
EDP_TXN0 C121 0.1U/10V_4 EDP_TXN0_2136
2 EDP_TXN0 LANE0N TXO3-
EDP_TXP1 C122 0.1U/10V_4 EDP_TXP1_2136 9 33
2 EDP_TXP1 LANE1P TXO3+
EDP_TXN1 C123 0.1U/10V_4 EDP_TXN1_2136 10 32
2 EDP_TXN1 LANE1N TXE0- TXUOUT0- 25
31
TXE0+ 30 TXUOUT0+ 25
RTD2136R TXE1- TXUOUT1- 25 Reserve
SCL1_2136 13 29
14 CIICSCL1 TXE1+ 28 TXUOUT1+ 25
SDA1_2136
CIICSDA1 TXE2- 27 TXUOUT2- 25 +3V
U6
45 TXE2+ 26 TXUOUT2+ 25 4
25 EDIDDATA_2136 MIICSDA1 TXEC- TXUCLKOUT- 25 GND
25 EDIDCLK_2136
46
MIICSCL1 TXEC+
25
TXUCLKOUT+ 25 Ws 7
WP VCC
8
SDAT_2136 47 24
PANEL_VCC
8,12,13 SMB_RUN_CLK R95 *0_4
SCLK_2136 48 MIICSDA0 TXE3- 23 3
DP_REXT
PWMOUT
8,12,13 SMB_RUN_DAT MIICSCL0 TXE3+ A2
DP_GND
R94 *0_4 SDAT_2136 R125 *0_4 5 2
PWMIN
C 49 44 LVDS_BLON_2136 SCLK_2136 R126 *0_4 6 SDA A1 1 C
GND
NC BL_EN LVDS_BLON_2136 25 SCL A0
Z *M24C64 C150
0.1U/10V_4
16
12
19
20
21
GND
IC EDIDDATA_2136 R123 *0_4
EDIDCLK_2136 R127 *0_4
DISP_ON_2136
DISP_ON_2136 25
R88 R103 DPST_PWM_2136
DPST_PWM_2136 25
Use 1% Res on R2178
0_4 12K_4
R73 *0_4/S DPST_PWM 2,6,25
R115 0_4 SCL1_2136
8,13,31 MBCLK2
R76 100K/F_4
R114 0_4 SDA1_2136
8,13,31 MBDATA2
R118 4.7K_4 SCLK_2136

+3V
B R119 *4.7K_4 SDAT_2136 B
R122 R121
*4.7K_4 4.7K_4
Reserve
EDP_HPD R101 1K/F_4 EDP_HPD_2136

2,25 EDP_HPD 2,6,7,8,9,10,12,13,14,23,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V
L8: need use CV-4709MN00 for Vendor suggestion
+SWR_LX +1.2V_2136
L8
Close to Pin11
Dd 4.7UH_1A
C85 C95 C79 C100
+3V +3.3V_2136_D +3V +3.3V_2136_A R86 *0_8
L5 +3.3V_2136_D L12 0.1U/10V/X7R_4 0.1U/10V/X7R_4
22U/6.3VS_8 0.1U/10V/X7R_4
PBY160808T-600Y-N(60,3A) PBY160808T-600Y-N(60,3A)
USING 60R 2A C40 C55 C47 USING 60R 1A C105 C124 Close to Pin43
A C75 C68 C137 Close to Pin17 A
10U/6.3V_8 0.1U/10V/X7R_4 10U/6.3V_8 0.1U/10V/X7R_4 0.1U/10V/X7R_4
0.1U/10V/X7R_4 0.1U/10V/X7R_4 22U/6.3VS_8
CLOSE TO Pin22 Close to Pin18

C2142 close to IC side Close to Pin5
^tZDK >KDK 352-(&75
4XDQWD&RPSXWHU,QF
^> ^Z Size Document Number Rev
1%
Custom RTD2136 1A
5 4 3 2 1
1 2 3 4 5 6 7 8
+3V
24 TXUCLKOUT- TXUCLKOUT-
&>s^K
LID Switch
TXUCLKOUT+
25
24 TXUCLKOUT+
24 TXUOUT0+ TXUOUT0+ R19 4.7K_4 EDIDCLK
24 TXUOUT0- TXUOUT0- R15 4.7K_4 EDIDDATA
24 TXUOUT1+ TXUOUT1+
TXUOUT1-
24 TXUOUT1-
24 TXUOUT2+ TXUOUT2+ RF C22 C19
C8 22P/50V_4 24 TXUOUT2- TXUOUT2- *10P/50V_4 *10P/50V_4
31 EMU_LID R67 0_4 PN_BLON BLON_CON
D1 MEK500V-40 R1 100K/F_4 24 TXLCLKOUT+ TXLCLKOUT+
24 TXLCLKOUT- TXLCLKOUT-
24 TXLOUT2+ TXLOUT2+ +3VLCD_CON

24 TXLOUT2- TXLOUT2-
A A
R64 47K_4 R20
Z *0_6
G_0
+3VPCU +VIN_BLIGHT
1
LVDS_BLON1 R26 1K/F_4 Z
C34*0.047U/10V_4
C35*0.047U/10V_4
LID_EC# 31,32 2
D2 *MEK500V-40 +3V R21 0_6
Q3 EDIDCLK 3
4
3
2
*DRC5144E0L Close to EC C23 EDIDDATA
TXLOUT0- 5
2 1000P/50V_4 TXLOUT0+ 6
8 LCD_BK
1
7
EMI request 8
C58 TXLOUT1-
9
100P/50V_4 &>s^K^Z TXLOUT1+
1
10 G_1
TXLOUT2- 11
12
&WK^Z TXLOUT2+
13
TXLCLKOUT- 14
LVDS_BLON1 R37 100K/F_4 TXLCLKOUT+ 15
16
TXUOUT0- 17
18 G_2
&>s^K^Z TXUOUT0+
19
20
&WK^Z TXUOUT1-
21
ZR8 0_4
TXUOUT1+
22
23
R9
Z *0_4 EDP_HPD_R
TXUOUT2-
TXUOUT2+ 24 G_3
+VIN_BLIGHT 2,24 EDP_HPD 25
100mA TXUCLKOUT- 26
TXUCLKOUT+ 27
B B
28
L2 *0_8/S +VIN_BLIGHT 29
+VIN 28 DIGITAL_D1 30
28 DIGITAL_CLK L4 DIGITAL_CLK_L
TB160808U301N000 +3V_CAM 31 G_4
L1 *0_8/S 1 2 USBP4-_R 32
8 USBP4- 4 3 33
C3 0.1U/25V_4 C14 C13 USBP4+_R
8 USBP4+ L3 34
C4 0.01U/25V_4 *10P/50V_4 *10P/50V_4
MCM2012B900GBE VADJ1 35
+VIN BLON_CON 36
+VIN_BLIGHT 37
38
39
40
G_5
C10 C1 C6 C620 C7
4.7U/25V_8 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
CN1
GS12401-1011-9H
24 EDP_TXP0_R C17 *0.1U/10V_4 DFHS40FS050
24 TXLOUT0+_2136 R12 0_4 TXLOUT0+ GS12407-11141-9H-40P-R
+VIN R13 0_4 TXLOUT0-
24 TXLOUT0-_2136
24 EDP_TXN0_R C18 *0.1U/10V_4
C5 C2 24 EDP_TXP1_R C15 *0.1U/10V_4

4.7U/25V_8 0.1U/25V_4 24 TXLOUT1+_2136 R10 0_4 TXLOUT1+
24 TXLOUT1-_2136 R11 0_4 TXLOUT1-
24 EDP_TXN1_R C16 *0.1U/10V_4
+3V R7 *0_4/S +3V_CAM
C C
Ws 24 EDP_AUXN_R
R16 0_4
C20 *0.1U/10V_4
EDIDDATA
24 EDIDDATA_2136
24 EDIDCLK_2136 R17 0_4 EDIDCLK C11 C12
24 EDP_AUXP_R C21 *0.1U/10V_4 *0.01U/16V_4 *4.7U/6.3V_6
BRIGHT R5 1K/F_4 VADJ1

&WK
&>s^Z
C9 33P/50V_4
&>s^KZZZ
R2 100K/F_4
Z
W^Z +3VLCD_CON 24 DPST_PWM_2136 R3 0_4 BRIGHT
24 LVDS_BLON_2136 R69
Z 0_4 LVDS_BLON1
R83 0_8 Z
24 DISP_ON_2136 R74 0_8 DISP_ON_L
&WK
C59
4.7U/6.3V_6 +3V
R85
100K/F_4
^/ DK/&z +3V
+3VLCD_CON
2,6,24
&WKZZZ
EDP_DISP_UTIL
R14
R18
*100K_4
*100K_4
EDIDDATA
EDIDCLK
C42 U3 L10 R4
Z *10_4 BRIGHT
2,6,24 DPST_PWM
1U/6.3V_4 5 1 R63
Z *0_4 LVDS_BLON1 +3V
IN OUT 6 LVDS_BLON
*TI160808U600 Z
1
D 4 2 6 DISP_ON R82 *0_4 DISP_ON_L R6 *1K_4 BRIGHT D

IN GND C93 C94 C91 R48 *1K_4 LVDS_BLON1
DISP_ON_L 3 *0.01U/16V_4 *0.1U/10V_4 *10U/6.3V_8
2
ON/OFF
*AP2821KTR-G1
352-(&75
4XDQWD&RPSXWHU,QF
2,6,7,8,9,10,12,13,14,23,24,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V
4,7,9,11,31,32,34,35,36 +3VPCU
7,23,26,28,29,32,33,34,39 +5V Size Document Number Rev
1%
Custom 1A
34,35,36,37,38,39,40,42,43,44 +VIN LCD CONN/LID/CAM
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
EMI request
7,23,28,29,32,33,34,39 +5V
23 +5V_HDMIC
2,6,7,8,9,10,12,13,14,23,24,25,27,28,29,30,31,32,33,34,39,40,42,44 +3V
+5V_HDMIC +5V_HDMIC
+3V
C276 C261 C229

0.1U/10V_4 220P/50V_4 0.1U/10V_4
A A
^/D/
B B
C_TX2_HDMI+ R292 120/F_4 C_TX2_HDMI-
C_TXC_HDMI+ R266 120/F_4 C_TXC_HDMI-
close to HDMI conn Close to HDMI Connector

IN_CLK# C346 0.1U/10V_4 C_TXC_HDMI- +3V
2 IN_CLK#
2 IN_CLK IN_CLK C347 0.1U/10V_4 C_TXC_HDMI+ C_TX2_HDMI+ CN14
IN_D0# C397 0.1U/10V_4 C_TX0_HDMI- C_TX2_HDMI- 20
2 IN_D0# SHELL1
IN_D0 C402 0.1U/10V_4 C_TX0_HDMI+ C_TX2_HDMI+ 1 21
2 IN_D0 D2+ SHELL2
2 IN_D1# IN_D1# C357 0.1U/10V_4 C_TX1_HDMI- C_TX2_HDMI- 3 22
Q7 4 D2- SHELL2 23
2 IN_D1 IN_D1 C358 0.1U/10V_4 C_TX1_HDMI+ +3V R198 2.2K_4 C_TX1_HDMI+ C_TX1_HDMI+
IN_D2# C405 0.1U/10V_4 C_TX2_HDMI- 5 C_TX1_HDMI- C_TX1_HDMI- 6 D1+ SHELL2
2 IN_D2# D1-
IN_D2 C408 0.1U/10V_4 C_TX2_HDMI+ 7
2 IN_D2 D0+
SDVO_CLK 4 3 HDMI_SCLK 9
C_TX0_HDMI+ C_TX0_HDMI+ D0- 2
C_TX0_HDMI- C_TX0_HDMI- D2 Shield 5
2 D1 Shield 8
SDVO_CLK C_TXC_HDMI+ C_TXC_HDMI+ 10 D0 Shield 11
6 SDVO_CLK CK+ CK Shield
SDVO_DATA SDVO_DATA 1 6 HDMI_SDATA C_TXC_HDMI- C_TXC_HDMI- 12 17
6 SDVO_DATA CK- GND
HDMI_HPD_CON R183 2.2K_4

6 HDMI_HPD_CON +3V 2N7002DW HDMI_SCLK 15 13
C
HDMI_SDATA 16 DDC CLK CE Remote 14
C
DDC DATA NC
1A +5V_HDMIC
KMC3S110RY
2 1 18
+5V +5V
F1
L52 0_6
HDMI_HPD HDMI_HPD_L 19
VC1 HP DET
TVM0G5R5M220R
HDMI CONN
C701 VC5
220P/50V_4 *TVM0G5R5M220R
DFHD19MR203
hdmi-2he1624-000111f-19p
+5V +5V_HDMIC +5V_HDMIC

+3V
2
VC2 *TVM0G5R5M220R 8/31: Intel suggestion
D5 D4
R188 MEK500V-40 MEK500V-40
R294 680_4/F C_TX2_HDMI+ 1M_4
1
R315 R291 680_4/F C_TX2_HDMI-
2
3
*0_4/S R265 680_4/F C_TX1_HDMI+ R213 R209

Q18 HDMI_HPD_CON 1 3 HDMI_HPD 2.2K_4 2.2K_4
2N7002K R264 680_4/F C_TX1_HDMI-
D 2 Q8 R200 D
R287 680_4/F C_TX0_HDMI+ ME2N7002E 20K/F_4
HDMI_SCLK HDMI_SDATA
R281 680_4/F C_TX0_HDMI-
1
R312 R259 680_4/F C_TXC_HDMI+

1 2
R258 680_4/F C_TXC_HDMI-
100K_4
C422 352-(&75
0.1U/10V_4 4XDQWD&RPSXWHU,QF
1%
Custom HDMI CONN 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
8 CLK_PCIE_REQ2#
CLK_PCIE_REQ2# R446 *0_4/S CLK_PCIE_REQ2#_R
R449 10K_4 +3V

SP1
SP2
SP3
SP4
SD_D1
SD_D0
SD_CLK
SD_CMD
MS_D1
MS_D0
MS_D2
27
SP5 SD_D3 MS_D3
RTS5227_3Vaux
R448 *0_6/S +3V SP6 SD_D2 MS_CLK
RTS5227_GPIO
SD_CD#
SD_WP
0.1U/10V_4 C612
D
SP7 SD_WP MS_BS D
6,30,31,34 PCIE_WAKE# R450 0_4 4.7U/6.3V_6 C611
Share Pin
32
31
30
29
28
27
26
25
U22
GPIO
WAKE#
MS_INS#
SD_CD#
SP7
3V3aux
NC
NC
R447 0_4 1 24
2,8,14,30,31,34 PLTRST#
CLK_PCIE_REQ2#_R 2
3
PERST#
CLKREQ#
NC
NC
23
22
Close to chip pin
8 PCIE_TXP3_CARD HSIP NC
Zdiff = 100 ohm 4 21 SD_D2_R R445 22_4 SD_D2 12/13: PV modify
8 PCIE_TXN3_CARD HSIN SP6
5 RTS5237 20 SD_D3_R R443 22_4 SD_D3
8 CLK_PCIE_CARDP REFCLKP SP5
6 19 SD_CMD_R R442 0_4 SD_CMD
8 CLK_PCIE_CARDN REFCLKN SP4
C598 0.1U/10V_4 PCIE_RXP3_CARD_C 7 18 DV33_18 1U/10V_4 C602
8 PCIE_RXP3_CARD HSOP DV33_18
C597 0.1U/10V_4 PCIE_RXN3_CARD_C 8 17 SD_CLK_R
8 PCIE_RXN3_CARD HSON SP3
CARD_3V3
3V3_IN
DV12S
W'Es/
RREF
R441 22_4 SD_CLK C600 5.6P/16V_4
AV12
SP1
SP2
W 33
NC
GND
RTS5237
9
10
11
12
13
14
15
16
Z SD_D0_R R438 22_4 SD_D0
RTS5227_DV12S
RTS5227_AV12
C C
R435 6.2K/F_4 RTS5227_RREF 12/13: PV modify

1 2
C589 *100P/50V_4 SD_D1_R R437 22_4 SD_D1
0.1U/10V_4 C590
+3V
C591 C588 Close to chip pin

12/13: PV modify
C587 C593 0.1U/10V_4 4.7U/6.3V_6
10U/6.3V_8 0.1U/10V_4 +3VCARD SD_D0 C596 5.6P/16V_4

SD_D1 C586 5.6P/16V_4
SD_D2 C610 5.6P/16V_4
SD_D3 C605 5.6P/16V_4
D
RTS5227_AV12 R764 *0_4/S RTS5227_DV12S
B B
SD / MMC
CARD READER
CN8
+3VCARD
SD_D3 1
DAT3
CLOSE CONN
SD_CMD 2
3 CMD
VSS1
C854
C866
+3VCARD 4
SD_CLK 5 VDD
6 CLK C844
SD_D0 7 VSS2
SD_D1 8 DAT0
0.1U/10V_4
*0.1U/10V_4
SD_D2 9 DAT1 10U/6.3V_8

SD_WP 10 DAT2
SD_CD# 11 W /P
12 C/D
13 GND
14 GND
15 GND
GND
CARDREADER CONN
Change footprint to 2,6,7,9,10,34,36,38,39,42,44 +3VS5

A sdcard-psdbtc-09glbs1nn4h3-11p 2,6,7,8,9,10,12,13,14,23,24,25,26,28,29,30,31,32,33,34,39,40,42,44 +3V A
+3VCARD
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom 1A
RTS5229 & CR SOCKET
5 4 3 2 1
A B C D E
28
+5V
+5V_AVDD L59
7,23,26,29,32,33,34,39 +5V
Close to PIN1 >40mils trace 2,6,7,8,9,10,12,13,14,23,24,25,26,27,29,30,31,32,33,34,39,40,42,44 +3V
HCB1608KF-181T15_6
1
6,7,8,10,34,38,44 +1.5V
C886 C887
L57 +3V_DVDD 10U/6.3VS_6 0.1U/10V_4 AZ5125-01H
+3V D14
2
HCB1608KF-181T15_6
Close to PIN26
C848
1U/6.3V_4
C860
10U/6.3VS_6
C862
0.1U/10V_4 AGND
^/
+1.5V_AVDD L56
WE,W +5V
+1.5V +5V_AVDD
C856 HCB1608KF-181T15_6 U35
U34 10U/6.3VS_6 5 1
Vout Vin
72'LJLWDO0,& C867 10P/50V_4 1

DVDD AVDD1
26
40
AGND
Close to PIN40 C908
4
BYP
R701 *0_4/S DMIC0 2 AVDD2 *2.2U/6.3V_6 2 3 C909
25 DIGITAL_D1 GPIO0/ DMIC-DATA GND EN
C911 *0.1U/10V_4
R703 100_4 DMIC_CLK_R 3 25 *1U/6.3V_4 * TLV702475DBVR
25 DIGITAL_CLK GPIO1 / DMIC-CLK AVSS1 AGND
38
Analog
C869 10P/50V_4 AVSS2 AGND AGND
4 27 C875 10U/6.3VS_6 AGND AGND R746 *10K_4
DVSS LDO1-CAP AGND +5V
39 C863 10U/6.3VS_6
HD_SDOUT 5 LDO2-CAP
7 ACZ_SDOUT_AUDIO SDATA-OUT Vset=1.242V
C873 *10P/50V_4
R705 0_4 HD_BCLK 6 28 C870 0.1U/10V_4
7 BIT_CLK_AUDIO BCLK VREF
10U/6.3VS_6 C876 7 C874 2.2U/6.3V_6
Close to PIN28
LDO3-CAP AGND
R706 2.2K_4 EXT_MIC_R
VREFOUT_C
7 ACZ_SDIN0
R707 33_4 HD_SDIN0 8
SDATA-IN HPOUT-L (PORT I)
32 HPOUT_L
HPOUT_L 29 AGND SHIELD 72+HDGSKRQHMDFN
C877
Close to Pin 9 33 HPOUT_R AGND SHIELD *1U/6.3V_4
HPOUT-R (PORT I) HPOUT_R 29
9
+3V_DVDD DVDD-IO
0.1U/10V_4 C882 24
^/ AGND SHIELD
AGND
HD_SYNC 10 LINE2-L 23
SYNC LINE2-R
Digital
R720 *0_4/S 11
7 ACZ_SYNC_AUDIO RESETB
Ws C888 *10P/50V_4
LINE1-L (PORTC)
22
12 21
PCBEEP LINE1-R (PORTC)
7 ACZ_RST#_AUDIO
C939 *0.1U/10V_4 34
CPVEE 20
AMP_BEEP MIC1-R (PORTB) 19
C842 1U/6.3V_4 35 MIC1-L (PORTB)
CBN 31
CAP- 37 MIC1-VREFO-L 30 R726 *0_4/S
CBP MIC1-VREFO-R MUTE_LED_CNTL 32
C845
36
CPVDD
1U/6.3V_4 CAP+
MIC2-R (PORTF)
18
17
MIC_R1
MIC_L1
C928 *2.2U/6.3V_6 72$XGLR-DFN0,&
C893 2.2U/6.3V_6 R722 1K/F_4
MIC2-L (PORTF) EXT_MIC_R 29 +5V_AVDD
+3V_DVDD
+3V_DVDD
42
SPK-L+ 72,QWHUQDO6SHDNHUV
4.7U/6.3V_6 C885
L_SPK+ 43 SPDIF-OUT/GPIO2 MIC2-VREFO
29 VREFOUT_C ^/
SPK-L- 16 R732
L_SPK- 44 MONO-OUT 10K_4
Close to Pin 34,35,36 SPK-R-
R_SPK- 45 C895 check value C897
SenseA
SenseB
PVDD1
PVDD2
JDREF
1 SPK-R+ 0.1U/10V_4 0.1U/10V_4 1
PDB
R_SPK+ AMP_BEEP AMP_BEEP_L AMP_BEEP_R2

NC
R728 100K/F_4
3
ALC3227 x QFN48
49
41
46
47
48
13
14
15
+5V_DVDD
R727
L55 +5V_DVDD C896 10K_4 2
+5V ACZ_SPKR 7
0.01U/25V_4
HCB1608KF-181T15_6 0.1U/10V_4 C858 ME2N7002E
Close to Pin 41 R725 20K/F_4 Q37
AGND
10U/6.3VS_6 C853
1
SENSE_A_1 R724 39.2K/F_4
SENSE_A 29
+5V_DVDD
Close to Pin 46 Close to Pin 13 AGND
0.1U/10V_4 C859 AGND
Check layout
10U/6.3VS_6 C852 mount location
COMBO_GPI 29
PD#
C830 0.1U/25V_4
C599 0.1U/25V_4
+3V_DVDD
C839 *0.1U/25V_4
C894 0.1U/25V_4
R696 Close to CODEC C841 0.1U/25V_4
D12 *MEK500V-40
1K/F_4 <>^W<Z^W< ^
ACZ_RST#_AUDIO 1 2 INT SPEAKER CONN
L_SPK+ L11 TI160808U600 L_SPK+_R
PD# L_SPK- L9 TI160808U600 L_SPK-_R 1 AGND
R_SPK- L7 TI160808U600 R_SPK-_R 2
31 VOLMUTE#
1 2 R690 R_SPK+ L6 TI160808U600 R_SPK+_R 3
4
Close to CODEC
10K_4
CN3
hh
D11 MEK500V-40
DFHD04MR236 R420 *0_8/S
3800-X04N-00X-4P-L
C98 C88 C70 C56
1000P/50V_4 1000P/50V_4
1000P/50V_4 1000P/50V_4
BIT_CLK_AUDIO ACZ_SDIN0 AGND
C872 C881
*33P/50V_4 *33P/50V_4
FOR EMI
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom Azalia ALC3227 1A

A B C D E
1 2 3 4 5 6 7 8
USB30_TX1-_C C482 *Clamp-Diode

USBP0-_C C485
1 2
*Clamp-Diode ^/
R741
L37
*0_4
1A
+5V_USBP0
C458
1000P/50V_4
USB 3.0
1
CN16
USB3.0 CONN
29
1 2 4 3 2 1 VBUS
USBP0-_C
8 USBP0- 1 2 3 2 D-
USBP0+_C C518 *Clamp-Diode USBP0+_C
1 2 8 USBP0+ 4 3 D+
MCM2012B900GBE USB30_RX1-_C 5 4 GND
R742 *0_4 USB30_RX1+_C 6 5 SSRX-
USB30_TX1+_C C472
1 2
*Clamp-Diode
R342 *0_4/S
7
8
9
6
7
8
SSRX+
GND
SSTX-
USB3.0 X 2/USB2.0 COMBO
USB30_RX1-_C C520 *Clamp-Diode
1 2 *MCM2012B900GBE 9 SSTX+
13
12
11
10
1 2
8 USB30_RX1- 4 3
13
12
11
10
A 8 USB30_RX1+ A
L60
USB30_RX1+_C C519 *Clamp-Diode R343 *0_4/S 160 mils (Iout=3.7A)
1 2 +5VS5 +5V_USBP0
R335 *0_4/S U18
2 8 +5V_USBP0 C461 470P/50V_4
*MCM2012B900GBE 3 VIN1 OUT3 7 C460 0.1U/10V_4
VIN2 OUT2
^/
C481 0.1U/10V_4 USB30_TX1-_R 1 2 USB30_TX1-_C 30,31 USBPW_ON#
4 6 C459 470P/50V_4
8 USB30_TX1- USB30_TX1+_R 4 3 USB30_TX1+_C 1 EN OUT1 5
C476 0.1U/10V_4
8 USB30_TX1+ GND OC C784 330U/6.3V
+
L62 VC4 C467 AP2820GMMTR-G1
1U/6.3V_4
R334 *0_4/S TVM0G5R5M220R VC3 TVM0G5R5M220R
USBP1-_C C447 *Clamp-Diode ^/ USB 3.0

1 2 C431
R743 *0_4 1A 1000P/50V_4 CN15
USB3.0 CONN
USB30_TX2-_C C442 *Clamp-Diode L36 +5V_USBP0 1
1 2 4 3 2 1 VBUS
USBP1-_C
8 USBP1- 1 2 3 2 D-
USBP1+_C C448 *Clamp-Diode USBP1+_C
1 2 8 USBP1+ 4 3 D+
MCM2012B900GBE USB30_RX2-_C 5 4 GND
R744 *0_4 USB30_RX2+_C 6 5 SSRX-
USB30_TX2+_C C439 *Clamp-Diode 7 6 SSRX+
1 2 R325 *0_4/S USB30_TX2-_C 8 7 GND
USB30_RX2-_C C455 *Clamp-Diode USB30_TX2+_C 9 8 SSTX-
1 2 *MCM2012B900GBE 9 SSTX+
13
12
11
10
1 2
8 USB30_RX2- 4 3
13
12
11
10
8 USB30_RX2+
L61
USB30_RX2+_C C451 *Clamp-Diode R324 *0_4/S
1 2
R322 *0_4/S
*MCM2012B900GBE
C444 0.1U/10V_4 USB30_TX2-_R 1 2
8 USB30_TX2- 4 3
B C445 0.1U/10V_4 USB30_TX2+_R B
8 USB30_TX2+
L63
R319 *0_4/S
COMBO JACK
L54 12/13: PV add

28 EXT_MIC_R EXT_MIC_R EXT_MIC_1
HCB1608KF-601T10
VC10
R664 22K/F_4 R641 C829 AVLC5S_4
28 COMBO_GPI
22K/F_4 100P/50V_4
AGND
AGND AVLC5S_4 VC13
C835 4.7U/6.3V_6 AGND
AGND AGND AGND C525 100P/50V_4 AGND
3
AGND SHIELD 6 CN17
HPOUT_L R369 30/F_4 HPOUT_L1 L38 TB160808U301N000 EARP_L1 1
28 HPOUT_L
AGND SHIELD
28 HPOUT_R HPOUT_R R385 30/F_4 HPOUT_R1 L39 TB160808U301N000 EARP_R1 2 AJAK0017-P001A
C C
AGND SHIELD 4
5 wait PN
AGND C529 100P/50V_4
VC12
C833 *1000P/50V_4
AGND C535 *1000P/50V_4

AGND 12/13: PV add
AVLC5S_4 SENSE_A 28
VC11
12/18: PV add AVLC5S_4
AGND AGND
12/11: PV add
Touch Screen Connector
+3V +5V R824 *0_4
close to 14" TS connector(CN21). EC30 *0.1U/10V_4 CN21
R830 R831 *DLP11SN900HL2L

+TS 1
*0_6 *0_6 USBP5- 4 3 USBN5-_R
+TS 8 USBP5- 1 2 2
USBP5+ USBP5+_R
8 USBP5+ 3
TS_ON_R
TS_ON_R
4
RP6
5
R825 *0_6 R826 *0_4 6
EC31
U41 *100P/50V_4 *Touch screen 15
R827 C937 C938
D *0_4 *1U/10V_4 5 1 *1U/10V_4 D
IN OUT
4 2
IN GND
31 TS_ON
3
ON/OFF
R828 *IC(5P) G5243AT11U

*100K/F_4
23,30,34,36,37,38,39,40,41,42,43,44 +5VS5
352-(&75
2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,30,31,32,33,34,39,40,42,44 +3V
11,30,39 +3VLANVCC
4XDQWD&RPSXWHU,QF
1%
Custom USB/BT/Audio JacK 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
For EMI 0 ~ 22 ohm
LAN_XTAL1
R92
*10_4 XTAL1
R53 0_4
'
R70 2.49K/F_4 LANRSET
+1.05V_LAN
LAN_YLED#
TP3 +3V if ISOLATEB pin
pull-low,the LAN
30
Y1 LAN_XTAL25_IN 11 chip will not drive
R790 *0_4 LAN_GLED# it's PCI-E outputs
1 2LAN_XTAL2 R784 *0_4 R89 *22_4 R98
CLK_FLEX1_48M 8 +3V_LAN ( excluding
> 1K_4
PCIE_WAKE# pin )
XTAL2
*25MHz
&KZ^ZEZ ISOLATEB
VDD10
&KZ^ZEZ
XTAL2
XTAL1
RSET
LED0
LED1
2
D D
C92 C80 R791 0_4 LAN_GLED# R99
*27P/50V_4 *27P/50V_4
For GbE 15K/F_4
U5
32
31
30
29
28
27
26
25
1
* Place Cc,Cd,Ce,Cf
10/18: SI modify
LED1/GPO
LED2(LED1)
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
RSET
close to each VDD10 pin-- 3, 22, 8 , 30 33
GND
W'Es/
Power trace Layout > 60mil For 10/100 NA Ce,Cf W
R765
Z 0_8
* Place Ce , Cf MDI0+
MDI0-
1
2 MDIP0 REGOUT(NC)
24
23
+1.05V_LAN_REGOUT
DVDDL
+1.05V_LAN_REGOUT
+1.05V_LAN MDIN0 VDDREG(VDD33) +3V_LAN
close to each VDD10 pin-- 8, 30 only, VDD10 3 22 VDD10
>60mil +1.05V_LAN
MDI1+ 4 AVDD10(NC) DVDD10(NC) 21 PCIE_WAKE# R789 0_4
+1.05V_LAN
+1.05V_LAN_REGOUT L46 *4.7UH,+-20%,650MA_1210
>60mil MDI1- 5 MDIP1
RTL 8161GSH LANW AKEB 20 ISOLATEB R787 *0_4
PCIE_WAKE# 6,27,31,34
MDIN1 ISOLATEB DSW_WAKE# 9,31
MDI2+ 6 19 3 PLTRST# 2,8,14,27,31,34
MDIP2(NC) PERSTB
> MDI2-
VDD10
7
8 MDIN2(NC) HSON
18
17
/PCIE_RXN2_LAN_L
PCIE_RXP2_LAN_L
C106
C103
0.1U/10V_4
0.1U/10V_4
PCIE_RXN2_LAN 8
+1.05V_LAN AVDD10 HSOP 7 PCIE_RXP2_LAN 8
Trace<30 mil
5
AVDD33(NC)
Width > 60 mil
REFCLK_N
MDIN3(NC)
REFCLK_P
MDIP3(NC)
6
CLKREQB
C927 C622 C624 C621 C117 C63 C74 C623 C130
7 &KZ'/''^,>
HSIN
HSIP

0.1U/10V_4 *0.1U/10V_4 *4.7U/6.3V_6 *0.1U/10V_4 *0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 *1U/6.3V_4 *1U/6.3V_4 &KZ,>
RTL8161GSH
9
10
11
12
13
14
15
16

For GbE
LAN_CLKRQ
C C
MDI3+
Stuff La, Ca ,Cb MDI3- CLK_PCIE_LANN
CLK_PCIE_LANN 8
For GbE +3V_LAN CLK_PCIE_LANP
CLK_PCIE_LANP 8
PCIE_TXN2_LAN
PCIE_TXN2_LAN 8
* Place Cf close to each VDD10 pin-- 22 (reserve) PCIE_CLKREQ_LAN# R90 *0_4/S PCIE_TXP2_LAN
8 PCIE_CLKREQ_LAN# PCIE_TXP2_LAN 8
For 10/100
NA: La, Ca ,Cb
For 10/100
STUFF : Ra, Ce
* Place Cg close to each VDD10 pin-- 30 (reserve)
For 10/100 only
R766 0_4 LAN CONN
For 10/100 MDI0+ 4

L64
3 MDI0+_1
LAN conn Right SIDE USBX1 MDI3-_1
CN2
MDI0- 1 2 MDI0-_1 MDI3+_1 20

* Stuff Cb and Ce only, close to each VDD33 pin-- 23, 32 MDI2-_1 19
*MCM2012B900GBE MDI2+_1 18
R767 0_4 17
For GIGA MDI1-_1 16
R768 0_4 MDI1+_1 15
* Stuff Ca and Cb only, close to each VDD33 pin-- 11, 32 MDI0-_1 14
MDI0+_1 13
L65 12
+3V_LAN MDI1+ 4 3 MDI1+_1 LAN_YLED# 11
B
MDI1- 1 2 MDI1-_1 10 B
+3VLANVCC 9
LAN_GLED#
*MCM2012B900GBE 8
+3VLANVCC +5VS5 7
R769 0_4 29,31 USBPW_ON# USBPW_ON#
6
C66 C127 C77 C57 0.1U/10V_4 5
R770 *0_4 3 4 USBP9-_R 4
8 USBP9- 2 1 3
*0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 USBP9+_R
8 USBP9+ 2
MCM2012B900GBE 1
L66 L47
MDI2+ 4 3 MDI2+_1
MDI2- 1 2 MDI2-_1 C107 220P/50V_4 USBPW_ON#
*MCM2012B900GBE
LAN_YLED#
* Place Cc and Cd close to each VDD33 pin-- 23 R772 *0_4 C43 1000P/50V_4
LAN_GLED#
C108 C69 For GIGA C39 1000P/50V_4
R771 *0_4 EMI request
*4.7U/6.3V_6 *0.1U/10V_4 Stuff Cc ,Cd
L67
MDI3+
MDI3-
4
1
3
2
MDI3+_1
MDI3-_1
C45 0.1U/10V_4 +3V
For 10/100
9/27 EMI request
*MCM2012B900GBE
NA: Cc, Cd
Remove For Not Using SWR mode R773 *0_4
&''
A
Kd'^d>&>E A
&E^>>>E
& 352-(&75
Kdd^dZ>&>>E 4XDQWD&RPSXWHU,QF
&E^&>E 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,31,32,33,34,39,40,42,44
11,39
+3V
+3VLANVCC
1% Custom RTL 8105E/RJ45 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
31
3920_RST#
+3VPCU
adapter Type check Q35 R211 4.7K_4 +3V
3
C747 0.1U/10V_4 *METR3904-G
C766 0.1U/10V_4 500mA +3VPCU_EC +3VPCU 2 OVT_DETC 2 1 EC_PWROK
C761 0.1U/10V_4 D8 MEK500V-40
U13 C419 0.1U/10V_4
1
SERIRQ 3 9 C407 0.1U/10V_4 +3VPCU R527 10K/F_4
7 SERIRQ SERIRQ VCC1 +3VPCU
LFRAME# 4 22 C767 0.1U/10V_4
7,34 LFRAME# LFRAME VCC2
LAD0 10 33 C289 0.1U/10V_4 L53 Change to 1SS355 as Current loss
7,34 LAD0
1
LAD1 8 LAD0 VCC3 96 C772 0.1U/10V_4 TB160808B470N001
7,34 LAD1 LAD1 VCC4
LAD2 7 111 C741 0.1U/10V_4 D7
7,34 LAD2 LAD2 VCC5
LAD3 5 125 1SS355
7,34 LAD3 LAD3 VCC6
8 CLK_33M_KBC 12 67 +3VPCU_EC
A 13 PCICLK AVCC R301 0_4 THRM_ALERT_HW#1 A
2,8,14,27,30,34 PLTRST#
2
CLKRUN# 38 PCIRST/GPIO5 C732 0.1U/10V_4 C727 AD_TYPE R501 10K_4 R499 100/F_4
6 CLKRUN# CLKRUN AD_ID 35 Open Drain need pu high
SCI1# 20 4.7U/6.3V_6
GATEA20 1 SCI/GPIOE 63 TEMP_MBAT
9 EC_A20GATE GA20/GPIO0 AD0/GPI38 TEMP_MBAT 35
9 EC_RCIN# RCIN# 2 64 AD_TYPE C731 R509 3 1
KBRST/GPIO1 AD1/GPI39 DGPU_OVT# 15
3920_RST# 37 65 AD_AIR 12.1K/F_4 C717
ECRST AD2/GPI3A AD_AIR 35
66 SYS_I 0.1U/10V_4 100P/50V_4 Q34
AD3/GPI3B SYS_I 31,35
MX0 55 *2N7002
32 MX0 DGPU_PWROK 9,31,42,43,44
2
MX1 56 KSI0/GPIO30 68
32 MX1 KSI1/GPIO31 DA0/GPO3C LAN_POWER 39
MX2 57 70 GPU_AC_BATT R818 *0_4
32 MX2 KSI2/GPIO32 DA1/GPO3D GPU_AC_BATT 15 CPU_PLTRST#R 2,9
MX3 58 71 BATSHIP R740 4.7K_4 +1.05V
32 MX3 KSI3/GPIO33 DA2/GPO3E BATSHIP 35
MX4 59 72 PCH_PCIE_WAKE# PCIE_WAKE# 6,27,30,34
32 MX4 KSI4/GPIO34 DA3/GPO3F
MX5 60 C262 220P/50V_4
32 MX5
2
MX6 61 KSI5/GPIO35 21 Q13
32 MX6 KSI6/GPIO36 PWM1/GPIOE DRAMRST_CNTRL_EC 2
MX7 62 23 R788 0_4 DSW_WAKE# 9,30
32 MX7 KSI7/GPIO37 PWM2/GPIO10 3 1
PM_THRMTRIP#R 2,9
MY0 39 26 FAN_PWM FAN_PWM 33
32 MY0 KSO0/GPIO20 FANPWM1/GPIO12
MY1 40 27 FB_CLAMP_TGL_REQ# TP45 *METR3904-G
32 MY1 KSO1/GPIO21 FANPWM2/GPIO13
MY2 41 28 FAN1SIG
32 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 33
MY3 42 29
32 MY3 KSO3/GPIO23 FANFB2/GPIO15 ODD_PD 33
MY4 43 Socket: DFHS08FS023
32
32
MY4
MY5
MY5 44 KSO4/GPIO24
KSO5/GPIO25 SCL1/GPIO44
77 MBCLK
MBCLK 35
adapter select for EC 2M byte SPI EC ROM
MY6 45 78 MBDATA for Battery charge/charge and cap board
32 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 35
MY7 46 79 MBCLK2 +3VPCU GPIO42 EON AKE38ZN0802 EN25QH16-104HIP
32 MY7 KSO7/GPIO27 SCL2/GPIO46 MBCLK2 8,13,24
MY8 47 80 MBDATA2 for CPU thermal R512 10K/F_4 R511 *10K/F_4
32 MY8 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 8,13,24
MY9 48 Hi ==> DIS/SG AMIC AKE38ZN0Q00 A25LQ16M-F/Q
32 MY9 KSO9/GPIO29 +3VPCU
32 MY10 MY10 49
MY11 50 KSO10/GPIO2A
32 MY11 KSO11/GPIO2B Low ==>UMA
32 MY12 MY12 51
KSO12/GPIO2C SUSB# 6
32 MY13 MY13 52 C443 0.1U/10V_4
MY14 53 KSO13/GPIO2D 6 SUSB# U15
B
32 MY14 KSO14/GPIO2E GPIO4 HWPG 36,37,38 B
32 MY15 MY15 54 BIOS_CS# 1 8
MY16 81 KSO15/GPIO2F 14 HWPG BIOS_SPI_CLK_I 6 CE# VDD
32 MY16 KSO16/GPIO48 GPIO7 SCK
32 MY17 MY17 82 15 H_PROCHOT#_EC BIOS_WR# 5
KSO17/GPIO49 GPIO8 R516 10K/F_4 NBSWON1# BIOS_RD# 2 SI 7 SPI_7P
+3VPCU SO HOLD#
15 DGPUT_CLK DGPUT_CLK 83 16 SUSC# R320 10K/F_4
PSCLK1/GPIO4A GPIOA SUSC# 6
For GPU thermal
15 DGPUT_DATA DGPUT_DATA 84 17 SUSACK#EC 6 R515 4.7K_4 MBCLK +3VPCU SPI_3P3 4
85 PSDAT1/GPIO4B GPIOB 18 R517 4.7K_4 MBDATA R313 10K/F_4 WP# VSS
34 MBCLK3 PSCLK2/GPIO4C GPIOC EC_AOCS# 34
For Gsensor 86 19 NBSWON1# AKE38ZN0802
34 MBDATA3 PSDAT2/GPIO4D GPIOD NBSWON1# 32
32 TPCLK TPCLK 87 25 SOIC8-8-1_27
PSCLK3/GPIO4E GPIO11 EMU_LID 25
32 TPDATA TPDATA 88 30 R505 *0_4/S
PSDAT3/GPIO4F GPIO16 EC_DEBUG1 34
31 Reserve for ENE timing issue H_PROCHOT# 2,40
GPIO17 EJECT# 33
12/12: PV Modify BIOS_RD# 119 32 KBSMI#1
BIOS_WR# 120 RD GPIO18
BIOS_CS# 128 WR 34 VRON MBCLK2
10/17: SI Modify
9 PCI_SERR# 89 SELMEM/SPICS GPIO19 36 TPLED#
VRON
TP127
40
MBDATA2 PROCHOT control
3
ACIN 76 SELIO/GPIO50 GPIO1A
35,39 ACIN SELIO2/GPIO43
TP63 THRM_ALERT_HW# 109
R829 *0_4 110 D0/GPXD0
29 TS_ON EC_GPXD1
D1/GPXD1
10/17: SI Modify
112 C743 C752 H_PROCHOT#_EC 2
6 SUSWARN#EC
2
114 D2/GPXD2 73 EC_PCIE_WAKE# Q33
34 RF_LINK# D3/GPXD3 CIR_RX/GPIO40 EC_PCIE_WAKE# 34 *10P/50V_4 *10P/50V_4
6 SLP_SUS#EC 115 74 THRM_MOINTOR R520 2N7002K
D4/GPXD4 GPIO41 THRM_MOINTOR 4
D9 MEK500V-40 116 75 GPIO42 100K_4
7 GPIO33_E D5/GPXD5 GPIO42
6 DPWROK_EC 117 90 DNBSWON#1
1
118 D6/GPXD6 GPIO52 91 CAPSLED#
2,9 EC_PECI CAPSLED# 32
1
D7/GPXD7 GPIO53 92 PWR_LED#
GPIO54 PWR_LED# 32
29,30 USBPW_ON# USBPW_ON# 97 93 EC_PWROK
A0/GPXA0 GPIO55 EC_PWROK 5,6
38,39 SUSON SUSON 98 95 RSMRST#
A1/GPXA1 GPIO56 RSMRST# 6
34,37,38,39 MAINON MAINON 99 121 VOLMUTE#
A2/GPXA2 GPIO57 VOLMUTE# 28
10 SLP_SUS_ON 100 126 BIOS_SPI_CLK L32 BLM15AG700SS1D(70,0.5A) BIOS_SPI_CLK_I
101 A3/GPXA3 GPIO58 127 LID_EC#
36 S5_ON A4/GPXA4 GPIO59 LID_EC# 25,32
0_4 R300 102
4 THRM_MOINTOR1 A5/GPXA5
*0_4 R305 103 R316
C 31,35 SYS_I A6/GPXA6 C
104 123 CRY2 C771 22P/50V_4 33_4
THRM_ALERT_HW#1 105 A7/GPXA7 XCLKO
10/17: SI ModifyTP48 FB_CLAMP 106 A8/GPXA8 C759 0.1U/10V_4
A9/GPXA9
If use PCH
107 122 CRY1 R306 0_4 AC_PRESENT 6 SUSCLK should HWPG SCI1# R521 *0_4/S SIO_EXT_SCI# 7
108 A10/GPXA10 XCLKI
35 MBATLED0# A11/GPXA11 change to 20P.
35 AC_LED_ON# C435
11 22P/50V_4 DNBSWON#1 R286 *0_4/S
32 WIRELESS_ON GND1 DNBSWON# 6
24
32 WIRELESS_OFF GND2 35
124 GND3 94 KBSMI#1 R504 *0_4/S
V18R GND4 SIO_EXT_SMI# 9
113
2
GND5 69 L68 0_6

C421 C420 AGND
0.1U/10V_4 4.7U/6.3V_6
1
KB3940QF A1
12/19: PV add For +VIN noise
3920_RST#
CRY2 R534 *0_4/S
PCH_SUSCLK 6,7
+3VPCU
R210 47K_4 C263 0.1U/10V_4
2
FOR SG/DIS
R536
+3V R514 4.7K_4 MBCLK2
^/
9,31,42,43,44 DGPU_PWROK R302 *0_4/S EC_GPXD1 100K_4 R522 4.7K_4 MBDATA2
D R535 *10K_4 GPIO33_E C763 *15P/50V_4 R523 *33_4 CLK_33M_KBC D

1
THRM_MOINTOR
2
THRM_MOINTOR1 C415 10/14: SI add BOM ID

352-(&75
2
0.1U/10V_4
1
C416
0.1U/10V_4 R799 *0_4 2,4,9,10,11,34,37 +1.05V 4XDQWD&RPSXWHU,QF
1
2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,32,33,34,39,40,42,44 +3V
4,7,9,11,25,32,34,35,36 +3VPCU
R800 *0_4 35,36 +5VPCU Size Document Number Rev
1%
Custom 1A
EC (KB3940 A1)/ROM
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
KEYBOARD Con. KB CONN 50698-03201-001-32p-l
31
31
MY[0..17]
MX[0..7]
MY[0..17]
MX[0..7]
MX1
MX7
MX6
MY9
MX4
MX5
32
31
30
29
28
27
32
31
30
29
28
DFFC32FR035
MY5
MY6
MY3
MY7
MY8
C109
C142
C145
C140
C141
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
32
MY0 26 27 MY9 C76 *220P/50V_4
MX2 25 26 MY10 C173 *220P/50V_4
MX3 24 25 MY11 C169 *220P/50V_4
24
.(<%2$5'38//83
MY5 23
MY1 22 23
SATA_LED MX0 21
20
22
21
C902 *AVLC 5S MY2 MY1 C128 *220P/50V_4
A
MY4 19 20 MY2 C136 *220P/50V_4
A
MY7 18 19 MY4 C139 *220P/50V_4
SATA_LED# R734 39_6 MY8 17 18 MY0 C96 *220P/50V_4
7 SATA_LED# RP2
2 SATA_R_LED1 1 2 MY6 16 17 10 1 MY15
3 +3V 16 +3VPCU
LED2 MY3 15 MY6 9 2 MY10 MX4 C82 *220P/50V_4
8 ACC_LED# 1 14 15
LED 3P WHITE/AMBER MY12 MY3 8 3 MY11 MX6 C73 *220P/50V_4
R733 200/F_6 MY13 13 14 MY12 7 4 MY14 MX3 C104 *220P/50V_4
MY14 12 13 MY13 6 5 MX2 C97 *220P/50V_4
(Amber) 12
MY11 11
C899 *AVLC 5S MY10 10 11
+3VPCU *10P8R-8.2K
MY15 9 10 MX7 C67 *220P/50V_4
MY16 8 9 MX0 C133 *220P/50V_4
RP1
MY17 7 8 10 1 MY8 MX5 C90 *220P/50V_4
6 7 MY9 9 2 MY7 MX1 C61 *220P/50V_4
+3V 6
31 CAPSLED# R185 2 1 200/F_6 CAPSLED#_R 5 MY0 8 3 MY4
R191 2 1 200/F_6 MUTE_LED_CNTL_R 4 5 MY5 7 4 MY2 MY12 C149 *220P/50V_4
WIRELESS_ON_R 3 4 MY1 6 5 MY13 C152 *220P/50V_4
WIRELESS_OFF_R 2 3 MY14 C156 *220P/50V_4
2
3
1 *10P8R-8.2K MY15 C190 *220P/50V_4

1 +3VPCU
MY16 C201 *220P/50V_4
+3V R173 *8.2K_4 MY16 MY17 C206 *220P/50V_4
2 CN6 R176 *8.2K_4 MY17
28 MUTE_LED_CNTL
Q6
2N7002K
R147
1
10K/F_4 EC KB3930 has included K/B pull-up resistor and function

+5V +3V
+5V
1
B SI, add Mute LED feature 9/15 SI for H/W. B
R196 R777 R199
1K/F_4 *200/F_6 1K/F_4
2
LED1
R440 39_6
1 2 2 1 R195 2 1 *200/F_6 R208 2 1 *200/F_6
+3VPCU
WIRELESS_ON_R WIRELESS_OFF_R
3P WHITE LED Q10 Q9
12/20 PV modify
3
DRC5144E0L DRC5144E0L
C601 *AVLC 5S DEEP_PWRLED#
PWR_LED 31 WIRELESS_ON
2
31 WIRELESS_OFF
2
SATA_LED#
1
C607 1000P/50V_4
DEEP_PWRLED#
C604 1000P/50V_4
POWER BOTTON CONNECT TOUCH PAD Con. +3VSUS

R318 4.7K_4 TP_SMB_CLK
+3VSUS
R323 4.7K_4 TP_SMB_DATA
C116 *4.7U/6.3V_6
Q19
C
100mA 1. +3VPCU(LIDSWITCH PWR) 5
C
C114 1U/10V_4
CN4 2. +3VPCU(LIDSWITCH PWR)
change to +3VSUS TP_SMB_CLK 4 3
SMB_PCH_CLK 8
C113 0.1U/10V_4 close conn
+3VPCU 1 3. LIDSWITCH TPCLK 2
+3VSUS R304 4.7K_4
2 R303 4.7K_4 TPDATA
25,31 LID_EC# 3 4.POWERON# TP_SMB_DATA 1 6
31 NBSWON1# 4 88513-0601-6P-L-SMT SMB_PCH_DAT 8
5 5. PWRLED# DFFC06MR001
R116 *0_4
31,32 PWR_LED# 6
DEEP_PWRLED# R117
6. GND PWR BTN CONN *2N7002DW
*0_4/S PWR BTN CONN C429 10P/50V_4
DFFC06MR001 L34 TB160808B470N001 TPCLK-1 6

31 TPCLK 5
PV , HP request Image sensor
88513-0601-6P-L-SMT 31 TPDATA L33 TB160808B470N001 TPDATA-1 SMBUS reserve to PCH
C428 10P/50V_4 4
TP_SMB_DATA 3
TP_SMB_CLK 2
1
+3VPCU
25 mils CN7
R120
10K/F_4
+3VSUS C430 0.1U/10V_4
PWR_LED# DEEP_PWRLED#
C110 *0.1U/10V_4 Q5
3
LID_EC# DRC5144E0L
C112 0.1U/10V_4 for EC into Deep
2 Sleep in S3 Mode
31,32 PWR_LED#
D NBSWON1# D
C111 0.1U/10V_4 C135
1
0.1U/10V_4
352-(&75
4,7,9,11,25,31,34,35,36 +3VPCU 4XDQWD&RPSXWHU,QF
7,23,26,28,29,33,34,39 +5V
39 +3VSUS Size Document Number Rev
2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,33,34,39,40,42,44 +3V
1%
Custom LED/KB/SW/TP 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
CPU FAN C617

*2.2U/6.3V_6
+5V
C613
0.1U/10V_4
C615
0.1U/10V_4
9/27 EMI request
C616
0.1U/10V_4
SATA HDD CONNECTOR
33
CN18 Bypass CAP close conn
1
A +5V A
2
1
CN10 SATA_TXP0_C C884 0.01U/25V_4
3 SATA_TXN0_C C879 0.01U/25V_4 SATA_TXP0 7
5 4 SATA_TXN0 7
FAN_PWM 15 5 SATA_RXN0_C C871 0.01U/25V_4
31 FAN_PWM 2 6 SATA_RXP0_C SATA_RXN0 7
C868 0.01U/25V_4
3 6 7 SATA_RXP0 7
46 8
FAN Connect 9
+3V
Main HDD
+3V 10
11
12
R451
DFHD04MR155 13
+5V
4.7K_4 14
15
16
FAN1SIG 17
31 FAN1SIG 18
19
C614
19 +5V
*0.1U/10V_4
SATA HDD(1ST)
DFHS13FS019
sata-ah534-00-13p-r
C840 C837 C836 C838

10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8
B B
SATA ODD CONNECTOR

CN19 Bypass CAP close conn
1
2
1
SATA_TXP4_C C608 0.01U/25V_4
3 SATA_TXN4_C C606 0.01U/25V_4 SATA_TXP4 7
4 SATA_TXN4 7
5 SATA_RXN4_C C595 0.01U/25V_4
6 SATA_RXP4_C C592 0.01U/25V_4 SATA_RXN4 7
SATA_RXP4 7
follow INTEL DG change eject PU to +3V.
7 R429 1K/F_4
8 2 1 ODD_PRSNT# 9
9 +3V
10
+5V_ODD
11 ODD_EJECT#
12 +12VALW +5V
13 R730 C574
14 AO3404 ID
2
15 +5V_ODD +5V 10K/F_4 current 0.1U/10V_4
16 R434 5.8A
17
18 R424 *0_8 ODD_EJECT# *0_4/S R731 330K_6
C EJECT# 31 C
3
19 Q25 +5V_ODD
1
19
AO3404
2
SATA ODD High : ODD power down
1
3
Low : ODD power on R428
DFHS13FS019
1
sata-ah534-00-13p-r 22_8
2
31 ODD_PD
2
1
C585
Q26 0.022U/25V_4
3
ME2N7002E
1
2
120 mils
Q24
+5V_ODD
ME2N7002E
1
C898 C576 C573 C900 C901
10U/6.3V_8
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
D D
352-(&75
2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,34,39,40,42,44
4,7,9,11,25,31,32,34,35,36
+3V
+3VPCU 4XDQWD&RPSXWHU,QF
7,23,26,28,29,32,34,39 +5V
35,39,44 +12VALW Size Document Number Rev
1%
Custom HDD/ODD/FAN 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Mini PCI-E Card 1

WLAN
D6 MEK500V-40
+1.5V R473 0_8 +3V
+3V_AOAC
34
7,9 BT_OFF#
+3V_AOAC
C126 C129 C132 C86 C632 C639 C638
7/26 DB modify R465 4.7K_4 0.01U/16V_4 0.1U/10V_4 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3VS_6
+3V_AOAC
FOR KBC DEBUG +1.5V 7/26 DB modify
CN13 R96 *4.7K_4
+3V_AOAC
R463 *0_6 +MINIEC_5V 51 52
+5V Reserved +3.3V
A 49 50 R111 0_4 RF_LINK# A
EC debug pin 47 Reserved GND 48
45 Reserved +1.5V 46 MINI_BLED +3V_AOAC
31 EC_DEBUG1 Reserved LED_WPAN# 10/12: SI reserve
43 44 RF_LINK# R801 0_4
Reserved LED_WLAN# RF_LINK# 31
41 42
39 Reserved LED_WWAN# 40 R97 4.7K_4
Reserved GND +3V_AOAC 7/26 DB modify
37 38
Reserved USB_D+ USBP10+ 8
35 36
GND USB_D- USBP10- 8
8 PCIE_TXP1 PCIE_TXP1 33 34
2
PCIE_TXN1 31 PETp0 GND 32
8 PCIE_TXN1 PETn0 SMB_DATA
29 30 INTEL WLAN
27 GND SMB_CLK 28
GND +1.5V
CARD PIN 20
8 PCIE_RXP1 PCIE_RXP1 25 26 W_DISABLE#
PCIE_RXN1 23 PERp0 GND 24 3 1 MINICAR_PME#
8 PCIE_RXN1 PERn0 +3.3Vaux 10/12: SI reserve have 6,27,30,31 PCIE_WAKE#
21 22 PLTRST# 2,8,14,27,30,31 internal
19 GND PERST# 20 R802 0_4 *DRC5144E0L
8 CLK_33M_DEBUG Reserved W_DISABLE# RF_OFF# 9 pull-up 110k
PLTRST# 17 18 Q31
Reserved GND ohm
15 16 LAD0 LAD0 7,31 +3V_AOAC
CLK_PCIE_WLAN 13 GND Reserved 14 LAD1 R474 *10K/F_4
8 CLK_PCIE_WLAN REFCLK+ Reserved LAD1 7,31
8 CLK_PCIE_WLAN# CLK_PCIE_WLAN# 11 12 LAD2 LAD2 7,31
9 REFCLK- Reserved 10 LAD3
GND Reserved LAD3 7,31
7 8 LFRAME# LFRAME# 7,31
8 PCIE_CLKREQ_WLAN#
2
R461 *0_4 BT_COMBO_EN_R# 5 CLKREQ# Reserved 6
8 BT_COMBO_EN# BT_CHCLK +1.5V
3 4
MINICAR_PME# 1 BT_DATA GND 2
WAKE# +3.3V
BT_DATA,BT_CHCLK,CLKREQ# MINI PCIE H=11 31 EC_PCIE_WAKE# 3 1
internal pull-DOWN 100k DFHS52FR097 +3VPCU +3VS5 +3V_AOAC
ohm MIPCI-C-1759513-52P-LDV-SMT Reserve for AOAC function *DRC5144E0L
Q30
1
R68 C935 12/21: PV modify
B B
*10K/F_4 *0.022U/25V_4
1
Q28
*ME2303T1
CLK_33M_DEBUG R84 *51_4 C78 *15P/50V_4 R456 *100K/F_4 2
^/D/ 24mil
3
3
+3V_AOAC
Q27 *ME2N7002E
C81 C87
R457 *0_4 2
8 PCH_AOCS#
*10U/6.3V_8 *.1U/10V_4
3
Q68
R458 *0_4
31 EC_AOCS#
1
2 6,7,8,10,28,34,38,44 +1.5V
2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V
4,7,9,11,25,31,32,35,36 +3VPCU
31,37,38,39 MAINON *2N7002E 7,23,26,28,29,32,33,39 +5V
2,6,7,9,10,36,38,39,42,44 +3VS5
1
9/27 EMI request +3V
+3VS5
Accelerometer Sensor C625 C83 C84 C630 C626 C527 C636 C637 C627 C629
C 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 C
R245 *0_6/S +3V C524 C640 C522 C641

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
R225 *0_6 +3V_AOAC
+G_SEN_PW U10
HP3DC2TR
C319 C308 1 2
0.1U/10V_4 0.1U/10V_4 14 Vdd_IO NC 3
VDD NC
EC23
^/ +5V
+5VS5
10 SI for +VIN noise issue +VIN EC27 220P/50V_4
2 1 ACCEL_INTH#1 11 RESERVED 13
8 ACCEL_INTH# D10 MEK500V-40TP22 9 INT1 RESERVED 15 *0.01U/25V_4 EC7 0.01U/50V_4
INT2 RESERVED +3VPCU EC24 +5V +3V
16
R224 *0_4/S 7 RESERVED EC4 0.01U/50V_4 EC28
SDO +5VS5 +VIN
6 C49 C48 +3V EC22 0.01U/50V_4 +1.5V_VGA
31 MBDATA3 SDA
4 5 EC2 0.01U/50V_4 0.1U/10V_4 0.1U/10V_4
31 MBCLK3 SCL GND *0.01U/25V_4
12 C446 *0.1U/25V_4
GND EC25
+G_SEN_PW R221 *0_4/S 8 EC3 0.01U/50V_4 *0.1U/10V_4 EC29 +5V EC6 0.01U/50V_4 +5VS5
CS
EC5 0.01U/50V_4
*0.1U/25V_4
AL003DC2A00 *0.01U/25V_4 EC9 0.01U/50V_4
EC26 +1.05V +5VS5
+G_SEN_PW R496 4.7K_4 +3V EC18 0.01U/50V_4 +VIN

R497 4.7K_4 +3V EC8 0.01U/50V_4 +1.05V
D D
EC1 0.01U/50V_4 *0.01U/25V_4

+VIN +5VS5 +VGA_CORE
ACCEL_INTH#1 MBDATA3 C323 33P/50V_4
EC13 0.01U/50V_4
MBCLK3 C322 *33P/50V_4
C288
22P/50V_4 C475
0.1U/10V_4
C480
0.1U/10V_4
C406
0.1U/10V_4
352-(&75
4XDQWD&RPSXWHU,QF
2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V
32,39 +3VSUS
6,7,8,10,28,34,38,44 +1.5V Size Document Number Rev
1%
Custom 1A
23,29,30,36,37,38,39,40,41,42,43,44 +5VS5 MINI PCIE CONN & G-sensor
1 2 3 4 5 6 7 8
5 4 3 2 1
DC_JACK
90W
5
EC19
1000P/50V_4
AD_ID 31
Do Not add test pad on BATDIS_G signal
+PRWSRC 35
CN12 +BATCHG
Place this ZVS close to PQ35
1 EC14 EC16 EC12 EC15 PL10
AD_ID
VDD 2 +VA_AC +VA Diode away +VIN TPCA8064-H
*10U/25V_8
*10U/25V_8
*10U/25V_8
*10U/25V_8
VDD PQ27 80/5A
PL16 PD8
EMB20P03V 3 CN11
S
PL9
D 6 80/5A 5 1 1 2 +VAD PQ30 5 2 BATT+ 2 1 D
GND 6 2 P0603BDG 1 80/5A 2 1
PL15
PC206 7 3 P4SMAJ20A 4 3 SMD 3 10
3 10
G
8 3 8 PC193 PC39
0.1U/25V_4
80/5A
LED2 GND 4 SMC 4 9
0.1U/25V_4
0.1U/25V_4
4
7 GND 4 9
1
LED1 PC173 PC174 PC180 PC196 PC194 BQBATDRVPR192 2K/F4 BATDIS_ID_DOD 5 7
*2200P/50V_4 PC189 +3VPCU 5 7
0.1U/25V_4
0.1U/25V_4
0.1U/25V_4
0.022U/50V_6
IDEA_G
DC-IN CONN 2200P/50V_4 B_TEMP_MBAT6 8
AC_LED_ON# PR198 +VIN 6 8
BATDIS_G RC1206-R010 PR27 PR28 PMPCR2-08MNBS2ZZ4H0
2
To PWR LED 1 2 330_4 330_4 DFHD08MR155

PQ25 Place this ZVS close to
LTC044 bat-bp02081-b82d5-7h-8p-l-v
Far-Far away +VIN PR21
PR174 31 MBDATA
3 1 PC187 200K_4
+12VALW
1
PQ22
0.1U/25V_4
1M_4 31 MBCLK
2
2N7002K PD7
PR20
PR172 P4SMAJ20A TEMP_MBAT 31
1 3 PD1 PD2 1K/F_4
+5VPCU
1
PDZ5.6B
PDZ5.6B
2.43K/F_6 PR197 PR199
2
3
+VAD PR91 PR196 PR49 *0_2/S *0_2/S PC23 PC129

PQ10 1M_4 2K/F4 4.02K/F4
0.01U/25V_4
0.01U/25V_4
PR84
Q2
PC181 2 4 3
CSIP
CSIN
AC_LED_ON# 31
*0.1U/25V_4
PR83 1M_4
2
MBATLED0# 5 6
PQ26
1
220K_4 PR89
2
LTC044 2 1 PC19 PC20

+VA
Q1
*100P/50V_4
*100P/50V_4
PQ9 PR90 1K_6 PC186 PC60 PC61 PC59 Place this cap
REGN6V
2200P/50V_4
1000P/50V_4
LTC044 MMDT2907A
4.7U/25V_8
0.1U/25V_4
220K_4 close to EC
C C
PR65
BQACN
BQACP
3 1 PC49 PC52
+12VALW
PC42 PC44
0.1U/25V_4
1M_4
2
8
7
6
5
PQ8
2N7002K 1U/10V_4 PQ32
16
PR72
1
1 3 0.1U/25V_4 0.1U/25V_4 EMB20N03V
+5VPCU
ACP
ACN
REGN
2.43K/F_6
3
18 BQHIDRV 4 EC21 EC17 EC11 EC10 EC20

3 HIDRV
10U/25V_8
10U/25V_8
10U/25V_8
10U/25V_8
BQCMSRC
*10U/25V_8
PC62 2 CMSRC 1 2
MBATLED0# 31 REGN6V
*0.1U/25V_4
3
2
1
PD3 RB501V-40 PR181 +BATCHG
PR67
PQ11 BQACDRV 4 17
BQB_2 BQB_1 RC1206-R020
1
LTC044 ACDRV BTST F3_2X1_65-2_8

0_6
PC54 PL11
PR48 19 1 2
REGN6V BQPHASE 0.047U/25V_4 8681LR
PHASE 4.7uH/5.5A(EM-47AM05V08)
100K/F_4
ACIN 5 PU5
31,39 ACIN ACPRES
8
7
6
5
15 BQLODRV
PR39 LODRV
BQ24738 PR178 PC192 PC184 PC178 PC179
10U/25V_8
10U/25V_8
+VAD 4.7_6
0.1U/25V_4
0.1U/25V_4
+VA_AIR +VA 100K/F_4
14 PR180 PR179
PD9 GND 21 4 *0_2/S *0_2/S
PR80 GND
1 2 BQVCC 20 22
VCC GND 23 PC24 PC182
22_8 GND
BAS316/DG 24 1000P/50V_4
3
2
1
PC51 GND 25 PD6
PR201 0.47U/25V_6 GND 0.1U/25V_4 PQ29 SX34
75K/F_4 PR26 8 13 BQSRP
MBDATA BQDATA PR44 0_4 EMB20N03V
SDA SRP CSOP
*0_4/S
B 12 BQSRN PR45 0_4 PC32 CSON B
31 AD_AIR PR25 9 SRN
MBCLK BQCLK
0.1U/25V_4
ACDET
SCL 11 BQBATDRV
IOUT
*0_4/S BATDRV
ILIM
PC130 PC25
0.1U/10V_4
PR202 6
10
7
12.4K/F_4 0.1U/25V_4
BQIOUT
Place this cap PR23
close to EC +VAD
PR24 PR35 PR22
430K/F_4 SYS_I 31 +BATCHG
100K/F_4
*100K/F_4
10/F_4
ACDET=13V PR34 PR19 PC34
69.8K/F_4 88.7K/F_4 PC26 PC131
*0.1U/50V_6
100P/50V_4
0.01U/50V_4
PR193
+3VPCU 470_8
3
MIN. BATV=7.2V
3
PR50 Place this cap
2
+VA +PRWSRC close to EC
+VH28 39 1M_4
2
+VAD 39 31 BATSHIP
PR51 PQ3
+3VPCU 4,7,9,11,25,31,32,34,36
1M_4 2N7002K
1
+5VPCU 36
PQ34
+BATCHG
2N7002K
1
A A
3
PQ4
AD_AIR PR57 2 METR3904-G
1M_4
352-(&75
1
4XDQWD&RPSXWHU,QF
1%
Custom Charger (OZ8681) 1A
Date:Friday, December 21, 2012 Sheet 35 of 44

5 4 3 2 1
5 4 3 2 1
DC/DC +3VS5/+5VS5
36
+3.3 Volt +/- 5%
+3VS5 2,6,7,9,10,34,38,39,42,44
+3VPCU +VIN_3VS5 +VIN Countinue current:4A +5VS5 23,29,30,34,37,38,39,40,41,42,43,44
PU9
6 1
PL19 Peak current:6A
D LDO VIN *0_8/S D
OCP minimum:7.5A
PC219 14 PC207 PC209 PC214 PC213 PC208
AGND +3VS5
2200P/50V_4
10U/6.3V_6
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
3 2
NC PGND
5
CLK
2
PJP3
PR207 PC223 +3.3VS5_S *POWER_JP/S
+3VS5 PR209
10K/F_4 10 NB670BST NB670BST_S
PR208
1
HWPG NB670PG 4 BST
PGOOD 0_6
31,37,38 HWPG *0_4/S 0.1U/25V_4 PL22
8 NB670SW
SW 9 1.5uH/9A(EM-15AM05V03)
SW 15
SW
1
16 PR215
PR142 SW +5VALW *2.2_6 +
+VIN PD10
*665K/F_4 PR221 PC230 PC235 PC233 PC236 PC241 PC239 PC238 PC240
11
330U/6.3V_6X5.8
*0_2/S
0.1U/10V_4
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
2
PR139 NB670ENLDO 12 VCC
ENLDO +5VPCU
*330K/F_4 +5VS5
PC222
*2200P/50V_4
PC215
1U/6.3V_4 *BAT54C
S5_ON PR132 NB670EN 13 7 NB670VOUT

C 31,36 S5_ON EN VOUT C
0_4/P
PC99 PC224
*0.1U/10V_4
*0.1U/10V_4
NB670
+5VPCU +5 Volt +/- 5%

+VIN_5VS5 +VIN
PU10 PL21
Countinue current:4A
PR219 6 1
0_4/P
NC VIN *0_8/S Peak current:6A
PC229 14 PC102 PC226 PC221 PC109 PC216 OCP minimum:7.5A
AGND
2200P/50V_4
10U/6.3V_6
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
3 2
B NC PGND +5VS5 B
Reserve for NB670 5V version. 5
NC
2
PR220 PC234 PJP4
10 NB671BST NB671BST_S +5VS5_S *POWER_JP/S
PR217 4 BST
HWPG NB671PG 0_6 Reserve
1
PGOOD 0.1U/25V_4 PL24
*0_4/S
8 NB671SW
SW 9 1.5uH/9A(EM-15AM05V03) +VIN
SW 15
SW
1
16 PR222
SW *2.2_6 +
PR226 PC237 PC242
11
330U/6.3V_6X5.8
*0_2/S
0.1U/10V_4
2
VCC PC1 PC2 PC3 PC4
220P/50V_4
0.1U/25V_4
*0.1U/25V_4
*0.1U/25V_4
PC228 PC232
*2200P/50V_4
1U/6.3V_4
7 NB671VOUT
VOUT
S5_ON PR149 NB671EN 13

31,36 S5_ON EN 12 NB671FB PR218
0_4/P
FB
*82K/F_4
PC117
*0.1U/10V_4 PR216
NB669 *330K/F_4
A A
PR213
+VIN
*665K/F_4
Reserve for NB670 5V version. 352-(&75

4XDQWD&RPSXWHU,QF
1% Custom
3/5VPCU(RT8243A) 1A

5 4 3 2 1
5 4 3 2 1
37
D D
PR256
100K/F_4
+VIN_1.05V +VIN +1.05V Volt +/- 5%
6
PU14
7 8
PL7 Countinue current:4A
TON
+5VS5 AIN IN 9 *0_8/S
IN 22 Peak current:7.7A
21 IN PC290 PC156 PC289 PC158 PC157
VCC OCP minimum:9A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
PC288 +1.05V
1U/6.3V_4
2
PC287 +1.05V_S2 PJP7
PR254
20 1237BSTPCH 1237BSTPCH_S *POWER_JP/S
BST
0_6
1
0.1U/25V_4 PL30
10 1237LX
PR255 1 LX 11
HWPG 1237PGPCH 1uH/11A(EM-10AM05V06)
31,36,38 HWPG PGOOD LX
*0_4/S 16
LX 17 PR168
LX
1
18 *2.2_6
PR258 3
*0_2/S 1237PFMPCH LX +
PFM PR253 PC286 PC155 PC150 PC152 PC148 PC149 PC154 PC151
12 *0_2/S
0.1U/10V_4
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*390U/2.5V_5X5.8ESR10
2
MAINON PR257 0_4/P 2
1237ENPCH PGND 13
31,34,38,39 MAINON EN PGND 14 PC153
PGND 15 *2200P/50V_4
C PC292 PGND 19 C
*0.1U/10V_4 PGND 4
AGND
23
1237SSPCH 5 1237FBPCH PR259 1237FBPCH_S
SS FB
2.4K/F_4
PC291
AOZ1237QI-02 PR260
0.1U/10V_4
7.68K/F_4
B B
A A
352-(&75
+1.05V 2,4,9,10,11,31,34 4XDQWD&RPSXWHU,QF
1% Custom
1.05V(RT8228BZ) 1A

5 4 3 2 1
1 2 3 4 5
+1.35VSUS 2,3,4,12,13
+1.5V 6,7,8,10,28,34,44 38
+VIN_DDR +VIN +1.35V +/- 5%
( VTT/2A ) +1.35VSUS
PL18 Countinue current:6A/8A
+0.675V_DDR_VTT +0.75V_DDR_VTT *0_8/S
PU7 PC78 Peak current:10A/12A
A 3 2 PC75 PC205 PC204 PC74 PC210 A
VTT VLDOIN OCP minimum:12A/15A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
8
7
6
5
1 *10U/6.3V_6
PC80 VTTSNS
10U/6.3V_6
4 +1.35VSUS
VTTGND 14 51216DRVH 4
DRVH
2
7 PC79
GND 15 51216VBST PR101 51216VBST_S PQ37 PJP2
3
2
1
21 VBST EMB20N03V PL17 +1.35VSUS_S
( 3mA ) GND 2.2_6 *POWER_JP/S
0.1U/25V_4 0.82uH/13A(EM-82BM05V04)
1
PR261 5 13 51216SW
3,12 DDR_VTTREF VTTREF SW
*100/F_4
8
7
6
5
1
PC294 PC71 11 51216DRVL PR195
*0.1U/10V_4 0.22U/10V_4 DRVL *2.2_6 +
DQ
PR203 PC211 PC212
PD5 10 4 *0_2/S
0.1U/10V_4
390U/2.5V_5X5.8ESR10
2
MAINON 1 2 51216S3 17 PGND
31,34,37,38,39 MAINON S3 PQ36
*BAS316 9 51216VDDQSNS AON7702A PC195
3
2
1
SUSON PR111 *0_4/S 51216S5 16 VDDQSNS *2200P/50V_4
PR122 31,39 SUSON S5 +1.8VREF
0_4 31,36,37 HWPG HWPG PR110 *0_4 51216PG 20
PGOOD 6
VREF
PC83 DR PR112 Rds(on) 14m ohm
*0.1U/10V_4 51216TRIP 18
TRIP PC67
120K/F_4
0.1U/10V_4 PR94
B PR109 51216MODE19 10K/F_4 B
MODE
47K/F_4
8 51216REFIN
12 REFIN
+5VS5 V5IN
G5316RZ1D PC66 PR92
PC76 31.6K/F_4
0.01U/16V_4
1U/6.3V_4
Location Value P/N OCP
PD11
HWPG 2 1 51216PG
51216PG 2
AON7702A BAM77020001 12A
BAS316 DQ
AON7202 BAM72020001 15A
Location Value P/N OCP
120K CS41202FB17 12A

DR
76.8K CS37682FB00 15A
C C
PR33 +1.5V +/- 5%

*0_6/S
+3VS5
Countinue current:0.3A
PC30 Peak current:0.75A
4.7U/6.3V_6
OCP current:1.2A
+1.5V
4
PU1
VIN
PL3
HWPG PR30 *0_4/S 5 3 8008LX1.5V
PG LX 2.2uH/1.3A_2520
PR29
PR9
1 2
31,34,37,38,39 MAINON EN GND *0_2/S
0_4/P
PC28 PC170
FB
PC7
10U/6.3V_6
0.1U/10V_4
SY8002BABC
*0.1U/10V_4
R1
8008VFB1.5V PR31
15K/F_4
D D
PR32
R2 10K/F_4
VO=(0.6(R1+R2)/R2)
352-(&75
4XDQWD&RPSXWHU,QF
1% Custom
DDR3L(APW8819) 1A

1 2 3 4 5
5 4 3 2 1

+VH28
+5V 7,23,26,28,29,32,33,34
+VAD +VIN 25,34,35,36,37,38,40,42,43,44
+1.5V 6,7,8,10,28,34,38,44
PR66
+3VS5 2,6,7,9,10,34,36,38,42,44
*0_4 +5VS5 23,29,30,34,36,37,38,40,41,42,43,44
PR68
+VH28
22_6
+VAD 35
+3VSUS 32
+12VALW 33,35,44
PC55
0.1U/25V_4 PC53
D PC57 1U/35V_6 D
ACIN 31,35 +3VLANVCC 11,30
G5934CN
PC56
G5934CP
0.1U/25V_4
+0.75V_DDR_VTT 12,13,38
0.47U/25V_6 PR81
20
19
18
17
16
*0_4
+VAD
VOUT
CP
D_CAP
VIN
CN
1 15 G5934PG
31 LAN_POWER ON1 PG
PR85
*750K/F_4
MAINON 2 14 G5934VSENSE
31,34,37,38 MAINON ON2 VSENSE
+12VALW PR88
*100K/F_4
3 13
31,38 SUSON ON3 REG
PC65
1U/16V_4
MAINON 4
ON4
7 G5934DISC3 PR98 *0_4/S +3VSUS
DISC3
PR93 *0_4/S G5934DISC1 5 6 G5934DISC2 PR97 *0_4/S +5V

C
+3VLANVCC DISC1 DISC2 C
DRIVER4
DRIVER3
DRIVER1
DRIVER2
DISC4
PU6 +5VS5
GND
SLG55448VTR
12
11
G5934DISC4 8
10
21
8
7
6
5
PQ21 PC147 +VIN +0.75V_DDR_VTT
EMB20N03V 0.1U/10V_4
MAIND 4
+3VS5
$ PR54
PC72 *22_8
3
2
1
2200P/50V_4 PR56
5
6
7
8
PR99 +5V *1M_4
3
PC227 PQ38 *0_4/S PQ5
EMB20N03V +3VS5 *2N7002K
0.1U/10V_4
4 MAIND3.3V 2
$ PC63 PC64
3
0.1U/10V_4 *10U/6.3V_6
PC217 +3VS5 +3V PC185
1
2
3
+3V
1
2
5
6
2200P/50V_4 0.1U/10V_4
1
2
$
LAN_ON 3 PR55
PR185 PQ6 *1M_4
0_4 PQ31 +3VLANVCC *2N7002K
MAIND 3,10 MAIN_ONG
PC225 PC220 PC198 EMB32N03K
1
0.1U/10V_4 2200P/50V_4
*10U/6.3V_6
B B
PC199 PC200
0.1U/10V_4
*10U/6.3V_6
PC188
6
5
2
1
$
0.1U/10V_4
IRUWRXFKSDGUHVHUYH 3 SUSD
+3V_DEEP_SUS +3VSUS
PQ33
EMB32N03K PC70
R314
4
2200P/50V_4
*0_4
PC197 PC201
0.1U/10V_4
*10U/6.3V_6
A A
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom Dis-charge IC (G5934) 1A

5 4 3 2 1
5 4 3 2 1

CSREF
Dummy Rc Dummy Ra and Ca +VCC_CORE 4,41
For 2 phase PC6 For 2 phase
Ca *0.047U/25V_4 PR7 +5VS5
Rc *20K/F_4
PR8 PR10 Ra
SWN2 CSP2
SWN2 40,41 SWN2 40,41
*147K/F_6 *5.11K/F_4
Rb PR4
PR3
SWN3 SWN3 40 CSREF 0_4
CPU 5H 35 147K/F_6
CSP2
D PUT COLSE PR12 D
SWN1 PC5
TO VCORE PR191 SWN1 40
0.047U/25V_4 PR2
37W 9.09K CS29092FB27 Phase 1 147K/F_6
1 2 *20K/F_4 POP Rb for 2 phase
Inductor PR1
47W 14.7K CS31472FB14 220K_6 NTC CPU 5G 35 CSP3
SWN3 40
5.11K/F_4
37W 43.2K CS34322FB00 CSREF

PR5 PR6 81103GND
75K/F_4 165K/F_4
47W 66.5K CS36652FB16 PC13
0.047U/25V_4 PR11
PC10 1200P/50V_4 PC17 *20K/F_4
1000P/50V_4
PR13
CSREF CSP1
CSREF 40,41 SWN1 40
PC14 5.11K/F_4
+VCCIO_OUT CSP3
*330P/50V_4 CSP2
CSSUM
+VIN_VCC_CORE PL1
CSP1
+VIN_VCC_CORE *0_8/S +VIN
DRON 41 PL2
PR76 PR77 PR78 PC58
130/F_4 *75/F_4 54.9/F_4 0.1U/10V_4 CSCOMP *0_8/S
81103_PWM 41
1
Rd 81103HG3_G
PR14
PR36 PC165 PC15 PC166 PC160 PC161 + PC202
2200P/50V_4
SDIO 1K/F_4 PC9
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
470U/25V_EC_10H
43.2K/F_4
ALERT#
0.1U/25V_4
PR173
2
1
2
C SCLK Re 81103HG3 81103HG3_G C
G1
D1
D1
D1
G1
D1
D1
D1
1_6
PR18
PC29 9.09K/F_4
PC40 PC38 0.01U/50V_4 PU4 PL12
27
26
25
24
23
22
21
20
18
S1/D2
S1/D2
PR52 NCP81103 PC18 81103SW3
PR17 19 9 81103SW3 9 0.24uH/24A_7X7X4
CSSUM
CSP3
CSP2
CSP1
HG3
CSCOMP
CSREF
PWM2/IMAX
DRON
49.9/F_4 BST3
330P/50V_4 10P/50V_4 81103GND 22.1K/F_4
17 0.22U/25V_6 81103SW3
PR43
G2
G2
SW 3
S2
S2
S2
S2
S2
S2
PR47 1K/F_4 PC22 81103ILIM 28 PR177
81103IOUT 29 ILIM 16 81103LG3 4.7_6
5.9K/F_4 81103GND
5
81103VRAMP 30 IOUT LG3 14 PQ23 PQ1
470P/50V_4 81103COMP 31 VRMP PGND 11 81103HG1 RJK03P3 *RJK03S3
81103FB 32 COMP HG1 PC41 PR186 *0_2/S PR86 10/F_4 CSREF
81103DIFFOUT33 FB 10 PC175
34 DIFFOUT BST1 12
1000P/50V_4
PR70 0_4 PR53 1K/F_4 81103VSN 81103SW1
81103VSP 35 VSN SW 1 0.22U/25V_6 81103LG3 PR182 *0_2/S
VSP SWN3 40
PC43 2200P/50V_4 81103VCC 36 13 81103LG1
4 VSS_SENSE VCC LG1
VR_RDY
VRHOT#
TSENSE
ALERT#
PC48
81103GND
VBOOT
4 VCC_SENSE
ROSC
37 15
SCLK
1000P/50V_4
SDIO
GND PVCC +5VS5

PR71 0_4
EN
SV 37W CPU
PR74 2.2_6 PC35
+5VS5 VID1=1.8V
1
2
3
4
5
6
7
8
PR170 9 2.2U/6.3V_6 +VIN_VCC_CORE
81103ROSC
*0_4/S PR82 IccMax=55A

81103HG1_G
VBOOT
TSENSE
PC47 Icc_Dyn=35A
VR_HOT#
81103EN
ALERT#
VR_RDY
2.2U/6.3V_6
SCLK
1_6 Icc_TDC=26A
SDIO
81103GND
PR73
81103HG1_G PC46 PC183 PC45 PC176 PC177 R_LL=1.5m ohm
2200P/50V_4
81103GND
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
B 45.3K/F_4 OCP~60A B
PR59 *0_4/S PC50

31 VRON
2
0.1U/10V_4
G1
D1
D1
D1
G1
D1
D1
D1
+VCCIO_OUT PR75 *75/F_4
+VCC_CORE
2,31 H_PROCHOT# H_PROCHOT# PR60 *0_4/S PL14
4 VR_SVID_DATA PR61 *0_4/S 81103GND 81103SW1
S1/D2
S1/D2
4 VR_SVID_ALERT# PR62 *0_4/S 0.24uH/24A_7X7X4
1
PR63 *0_4/S 9 81103SW1 9
4 VR_SVID_CLK
IMVP_PWRGD PR58 *0_4/S PR64 + + + + +
6 IMVP_PWRGD
25.5K/F_4 PR176 PC203 PC190 PC191 PC68 PC128
G2
G2
S2
S2
S2
S2
S2
S2
3300u_2V_7343
*330u_2.5V_7343
PR79 10K/F_4 4.7_6
*390U/2.5V_5X5.8ESR10
*330U/2.5V_6X4.5ESR12
*330U/2.5V_6X4.5ESR12
+3V
2
8
5
PQ28 PQ7
81103GND RJK03P3 *RJK03S3
PC172
1000P/50V_4
TSENSE
81103LG1
PR189
0_4/P
PR188 *0_2/S PR87 10/F_4 CSREF

CSREF 40,41
1
PR194 PR190
PR184 *0_2/S
8.25K/F_4
TH05-3L104FR
SWN1 40
A For 37W CPU ; PC128 Placed 330uF_9 mohm A
CPU Ra Ca Rb Rc Rd Re For 47W CPU ; PC128 Placed 560uF_4.5 mohm
2
37W Dummy Dummy POP Dummy CS34322FB00 CS29092FB27 CH733RY8802 Dummy Page 41
47W POP POP Dummy POP CS36652FB16 CS31472FB14 CH756RM8802 POP Page 41
CPU 3& 352-(&75
R63
PUT COLSE
37W CH733RY8802
4XDQWD&RPSXWHU,QF
TO VCORE
Location PR10 PC6 PR4 PR8 PR14 PR18 PC128 HOT SPOT Size Document Number Rev
1%
47W CH756RM8802 Custom CPUCORE (NCP81103) 1A

5 4 3 2 1
5 4 3 2 1

D D
+VIN_VCC_CORE
HG2
PR38
HG2_G
XE 47W CPU
VID1=1.8V
*1_6
IccMax=85A
C PC163 PC8 PC164 PC159 PC162 Icc_Dyn=60A C
HG2_G
*2200P/50V_4
*4.7U/25V_8
*4.7U/25V_8
*4.7U/25V_8
*0.1U/25V_4
Icc_TDC=33A
R_LL=1.5m ohm
OCP~95A
2
G1
D1
D1
D1
G1
D1
D1
D1
PU3 8 *NCP81151
HG PC33
1 +VCC_CORE
S1/D2
S1/D2
BST
PL13
2 7 SW2 *0.22U/25V_6 9 SW2 9 SW2
40 81103_PWM PWM SW
PR37 *0.24uH/24A_7X7X4
1
3
40 DRON GND 6
G2
G2
S2
S2
S2
S2
S2
S2
EN
*2K/F_4 +
+5VS5
4 5 LG2 PR171 PC69
5
VCC LG
*330u_2.5V_7343
PQ24 PQ2 *4.7_6
2
PAD *RJK03S3 *RJK03S3
9
PC21
PC167
*2.2U/6.3V_6
*1000P/50V_4
LG2
B B
PR187 *0_2/S PR69 *10/F_4
CSREF 40
PR183 *0_2/S
SWN2 40
For 37W CPU

Dummy these components
A A
352-(&75
+VCC_CORE 4,40 4XDQWD&RPSXWHU,QF
1%
Custom 1A
NCP81151
Date:
Friday, December 21, 2012 Sheet 41 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8
GPIO12 GPIO16 GPIO15 Thames XT

VGA Core
GPIO10 GPIO12 GPIO16 GPIO20 GPIO15 Mars XT
PWRCNTL4 PWRCNTL3 PWRCNTL1
0 1 0
V-CORE
1.0V Default
+VGA_CORE 18,34,44
42
1 0 0 0.9V
PWRCNTL5 PWRCNTL4 PWRCNTL3 PWRCNTL2 PWRCNTL1 V-CORE
1 0 1 0.875V
0 1 1 1 1 1.125V
A 1 0 0 0 0 1.100V Default A
1 0 0 0 1 1.075V
1 0 0 1 0 1.050V
+VIN_GPU PL4 +VIN 0DUV:
1 0 0 1 1 1.025V *0_8/S
9*$B&25(
1 0 1 0 0 1.000V
PC86 PC85 PC89 PC88 PC82 PC81
&RXQWLQXHFXUUHQW$
3HDNFXUUHQW$
220P/50V_4
2200P/50V_4
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
+VIN_GPU
1 0 1 0 1 0.975V +5VS5 PR135
3212_DRVH1S1
2&3PLQLPXP$
1_6
1 0 1 1 0 0.950V // P9$
2
PR155
G1
D1
D1
D1
1 0 1 1 1 0.925V 1K/F_4 PR107
+5VS5 *0_4
DCR_1.4m ohm +VGA_CORE
PC120 +3V PL23
1 1 0 0 0 0.900V 1000P/50V_4 PR106 3212_SW1
S1/D2
*0_4/S 0.36uH/24A_7X7X3
1
PR102 9
1 1 0 0 1 0.875V 10_6 + +
PR124 PR137 PR214 PR224 PC121 PC108 PC218
39 3212_PH0
G2
S2
S2
S2
38 3212_PH1
PR146 10K/F_4 *2.2_6 *0_2/S *0_2/S
0.1U/10V_4
*330u_2.5V_7343
*330u_2.5V_7343
2
2
1 1 0 1 0 0.850V 649K/F_4
5
3212_VCC PQ16
DGPU_PWROK 9,31,43,44
RJK03P3
1 1 0 1 1 0.825V PC103
37
16
2
*2200P/50V_4
PC84
RAMP
VCC
PWRGD
PH0
PH1
B B
1 1 1 0 0 0.800V 2.2U/6.3V_6 PR212 PR225
*0_4/S 10/F_4
PR211 12 35 3212_DRVH1
*0_4/S AGND DRVH1
49 36 3212_BS1
15 DGPU_PROCHOT# AGND BST1
3
PC91
PR105
41 0.22U/25V_6
+3V PSI#
2 10K/F_4 38 SW1
34 3212_SW1
+VIN_GPU
PQ18 3212_VRTT 10
1&3*
2N7002K VR_TT
1
PR138 31 3212_DRVL1 PC104 PC98 PC111 PC119

3212_TTSNS 11 DRVL1
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
+5VS5 TTSNS
PR200
2
7.32K/F_4 PR134 8 3212_DRVH2S1

+5VS5 TRDET# +5VS5
5.1K/F_4 1_6
PR114 PC105 9 PC94
220K_6 NTC 0.01U/25V_4 VARFR 4.7U/6.3V_6
2
32
DCR_1.4m ohm
1
PVCC
G1
D1
D1
D1
+VGA_CORE
PR103 *0_4/S 48 PL20
47 VID0 26 3212_DRVH2 3212_SW2
15 GFX_CORE_CNTRL1 VID1 DRVH2
7KLV17&&ORVH 15 GFX_CORE_CNTRL2
46 0.36uH/24A_7X7X3
S1/D2
VID2
1
WR3KDVH026)(7 15 GFX_CORE_CNTRL3
45
VID3 BOOT2
25 3212_BS2
44 9 PR204 PR206 + +
15 GFX_CORE_CNTRL4 VID4
43 PR108 *0_2/S *0_2/S PC126 PC107 PC231
15 GFX_CORE_CNTRL5 VID5
PR104 *0_4/S GPU_VID6 42 PC101 *2.2_6
0.1U/10V_4
330u_2.5V_7343
2
2
G2
VID6
S2
S2
S2
390U/2.5V_5X5.8ESR10
+3VS5 0.22U/25V_6
PD4 27 3212_SW2
5
1 2 PR116 PR297 SW2 PQ15
C +3V C
*10K/F_4 PR296 100K/F_4 +3V RJK03P3 PC87
*BAS316/DG 100K/F_4 *2200P/50V_4
3
PR115
5 PQ39A 1 29 3212_DRVL2 PR205 PR210
44 DGPU_PR_EN 2N7002KDW EN DRVL2 *0_4/S 10/F_4
20K/F_4 PR113
6
40
DPRSLPVR_R
4
2 PQ39B DPRSLPVR 30
*0_2/S PGND
2N7002KDW 4
CLK_EN#
1
PC90
0.33U/6.3V_4
28 3218_SWFB2 PR133 3212_CS_PH2
PR298 *0_4 22 SWFB2 100/F_4
OD3#
23 33 3218_SWFB1 PR125 3212_CS_PH1
PWM3 SWFB1 100/F_4 6KRUWHVWWKH
24 QHWWUDFH
SWFB3 19 3218_CCSUM PR150
CSSUM 226K/F_4
&ORVHWR
3212_FB 6 3KDVH,QGXFWRU PR156
FB 226K/F_4
PR153
PC92 PC115
150P/50V_4 470P/50V_4 PC110
165K/F_4
2
PC97
1000P/50V_4
PR128 PC96 PR136 39P/50V_4 PR154

100K/F_4 220P/50V_4 26.1K/F_4 73.2K/F_4 PR223
PR126 7 20 3212_CSCOMP 220K_6 NTC
COMP CSCOMP
1.65K/F_4
1
17
3212_IMON 5 LLINE
FBRTN PR151
21 20K/F_4
PR127 PC93 3 ILIM
CSREF
*4.7K/F_4 1000P/50V_4 IMON PR148

IREF
RPM
D D
PR119 PR120 1K/F_4
RT
0_4 0_4 PR147

20K/F_4
3218_IREF
3218_RPM
13
14
3218_RT15
18
PR152
3218_CSREF
*0_4/S
PR118 PR121
100/F_4 100/F_4
+VGA_CORE
PR143
PR144 PR145
PC112
352-(&75
4XDQWD&RPSXWHU,QF
162K/F_4
47.5K/F_4
80.6K/F_4 1U/6.3V_4
VSS_GPU_SENSE 18 Size Document Number Rev

1%
Custom +VGACORE NCP3218G) 1A
VGPU_CORE_SENSE 18
1 2 3 4 5 6 7 8
5 4 3 2 1
43
+VDDCI
+1.5V_VGA 18,20,21,22,34
D D
PR163
120K/F_4
+1.5V Volt +/- 5%
+VIN_1.5VGA +VIN
Countinue current:6A
6
PU12 PL28
7 8
Peak current:8A
TON
+5VS5 AIN IN 9 *0_8/S
IN 22
21 IN PC266 PC270 PC139 PC265 PC140 OCP minimum:12A
VCC
2200P/50V_4
220P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
+1.5V_VGA
PC251
1U/6.3V_4
1
PC252 PJP5 +
PR229
20 1237BST1.5V 1237BST1.5V_S *POWER_JP/S PC255
BST +1.5VVGA_S2
*390U/2.5V_5X5.8ESR10
0_6
2
0.1U/25V_4 PL26
10 1237LX1.5V
C PR232 *0_4/S 1
1237PG1.5V LX 11 1uH/11A(EM-10AM05V06) C
9,31,42,44 DGPU_PWROK PGOOD LX 16
LX 17 PR235
LX 18 *2.2_6
PR241 *0_2/S 1237PFM1.5V 3 LX
PFM PR164 PC254 PC269 PC264 PC261 PC138 PC137 PC257
12 *0_2/S
0.1U/10V_4
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
PR231 2 PGND 13
9,42,44 DGPU_PR_EN DGPU_PR_EN
EN PGND 14 PC253
30K/F_4 PGND 15 *2200P/50V_4
PC249 PGND 19
PGND 4
0.47U/6.3V_4
AGND
23
1237SS1.5V 5 1237FB1.5V PR239 1237FB1.5V_S
SS FB
6.98K/F_4
PC250
AOZ1237QI-02 PR240
0.01U/25V_4
8.06K/F_4
B B
A A
352-(&75
4XDQWD&RPSXWHU,QF
1%
Custom
s'WKtZ A

5 4 3 2 1
1 2 3 4 5 6 7 8
VGA TYPE R2 Value P/N 1.0V_VGA

+0.95V +/- 3%
Thems 10K CS31002FB26 1.0V Countinue current:2A
MARS 11.3K CS31132FB07 0.95V Peak current:3A
OCP minimum:4A
+1.0V_VGA +0.95V_VGA +5VS5
For reserve
PC271 PR248
2
A A
*2200P/50V_4 *2.2_6 +1.0V_VGA_S2 PR249
PU13 *POWER_JP/S
PL29
1
PR167 554PG_1.0V 4 1 554LX_1.0V
9,31,42,43 DGPU_PWROK PG NC
*0_4/S 1uH/11A(EM-10AM05V06) 554FB_1.0V_S PR250 PC143 PC141 PC144 PC142
2 1 554PVIN_1.0V 9 2 *0_2/S
*1000P/50V_4
+5VS5 PVIN LX PC146
*0.1U/10V_4
*1U/6.3V_4
*0.01U/25V_4
PJP6 10 3 *22P/50V_4 PR165 PC295 PC275 PC274
*POWER_JP/S PVIN LX 6.65K/F_4
0.1U/10V_4
10U/6.3V_6
R1
*22U/6.3V_8
RT8068A 7 554NC_1.0V PC145
NC *68P/50V_4
PR252 554SVIN_1.0V 8 6 554FB_1.0V
SVIN FB
10_6
11 5
GND EN
R2 V0=0.6*(R1+R2)/R2 +3VS5
PC272 PC273 PC277 PR166
11.3K/F_4
0.01U/50V_4
10U/6.3V_6
1U/6.3V_4
PR251 10K_4
9,42,43 DGPU_PR_EN
1.8V +/- 3%
PC278
0.47U/6.3V_4 Countinue current:2A PC77 PC73 PC285 PC284
Peak current:3A
*1000P/50V_4
*0.1U/10V_4
*1U/6.3V_4
*0.01U/25V_4
OCP minimum:4A
B +1.8V_VGA B
PC12 PR15
2
*2200P/50V_4 *2.2_6 +1.8V_L PR175
PU2 *POWER_JP/S +1.8V_VGA
PL8
1
DGPU_PWROK PR42 554PG_1.8V 4 1 554LX_1.8V
*0_4/S PG NC 1uH/11A(EM-10AM05V06) 554FB_1.8V_S PR169
2 1 554PVIN_1.8V 9 2 *0_2/S
+5VS5 PVIN LX PC37
PJP1 10 3 *22P/50V_4 PR41 PC171 PC169 PC168
*POWER_JP/S PVIN LX 20K/F_4
0.1U/10V_4
10U/6.3V_6
R1
*22U/6.3V_8
RT8068A 7 554NC_1.8V PC31
NC *68P/50V_4 PC123 PC124 PC127 PC125
PR16
554SVIN_1.8V 8 6 554FB_1.8V
*1000P/50V_4
SVIN FB
*0.01U/25V_4
*0.1U/10V_4
*1U/6.3V_4
10_6 PR46
11 5 554EN_1.8V
GND EN PR40
69.8K/F_4 R2
PC16 PC11 PC27 10K/F_4
PC36
0.01U/50V_4
10U/6.3V_6
1U/6.3V_4
0.47U/6.3V_4 V0=0.6*(R1+R2)/R2 +3V
DGPU_PR_EN
C C
PC279 PC100 PC106 PC276
*1000P/50V_4
*0.01U/25V_4
*0.1U/10V_4
*1U/6.3V_4
+12VALW
+3V_VGA +VGA_CORE
+3VS5 +1.5V
+VIN
PR130
1
2
5
6
PR141 PR157 1M_4

*22_8 *22_8 PC114
PR129 3VGFX_OND 3 0.1U/10V_4
1M_4
3
PQ12
*2N7002K
PQ19
*2N7002K
PQ13
2N7002K
PQ17
EMB32N03K $ PC281 PC282 PC280 PC283
4
+3V_VGA
*1000P/50V_4
2 2 2
*0.01U/25V_4
*0.1U/10V_4
*1U/6.3V_4
PC95
3
PQ14 2200P/50V_4
2N7002K
PR123 PR131 PC113 PC116
1
DGPU_PR_EN 2 1M_4 0.1U/10V_4

*10U/6.3V_6
0_4/P
D D
PC293 3VGFX_ONG
1
*0.47U/6.3V_4
+1.8V_VGA 11,15,16,18,19
352-(&75
+1.0V_VGA 14,16,18,19
4XDQWD&RPSXWHU,QF
+3V_VGA 14,18
1%
Custom +VGACORE (RT8208/1.8V)
1A
1 2 3 4 5 6 7 8

E0333 Quanta R63 Rev1A

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

E0333 Quanta R63 Rev1A

Uploaded by

Copyright:

Available Formats

1 2 3 4 5 6 7 8

+1.5 VGA SATA1

RTL8166EH BT COMBO PORT10 PG.29 PG.25

KB PG.32 TPPG.32 ROM FANPG.32 PG.29

PCI EXPRESS* - GRAPHICS

DPB_LANE1_P C729 *0.1U/10V_4 XDP_TDI_R TP36

JTAG & BPM

PEG_TX[8] +1.35V_CPU 12,13 DDR3_DRAMRST#

C930 R825 pull

Date: Friday, December 21, 2012 Sheet 2 of 44

Haswell Processor (DDR3) 

DDR SYSTEM MEMORY B

*1K_4 C400 R279

Date: Friday, December 21, 2012 Sheet 3 of 44

PEG AND DDR

VCC56 VCOMP_OUT +VCCIOA_OUT

AJ28 VCC67 AP34 0_4 R518 PWR_DEBUG_R

Y26 VCC92 R253

Date: Friday, December 21, 2012 Sheet 4 of 44

CFG[6:5] (PCIE Port Bifurcation Straps)

CFG4 CFG4 R271 1K_4

Date: Friday, December 21, 2012 Sheet 5 of 44

Digital Display Interface

(+3VS5) R716 649/F_4 DAC_IREF U40

PCIE_WAKE# R625 *1K_4 R608 *0_4/S IMVP_PWRGD

PCIE_WAKE# R798 1K_4 SYS_PWROK R585 *0_4 EC_PWROK

XDP_DBRST# R590 1K_4

Date: Monday, December 24, 2012 Sheet 6 of 44

Lynx Point (HDA,JTAG,SATA)

TP108 PCH_JTAG_TDO_R AD3

Pin Name Strap description Sampled Configuration Circuit

0 = Disable PCH_SPI_CS1# R562 *0_4 U31

Vender Size P/N

GPIO62 / SUSCLK PLL On-Die Voltage

Date: Monday, December 24, 2012 Sheet 7 of 44

GPIO54 PCIECLKRQ2# / GPIO20/ SMI# CLKIN_PCILOOPBACK *1M_4

+3V AD39 (+3V)

Date: Monday, December 24, 2012 Sheet 8 of 44

A5 D1 RF_OFF# R572 1K_4

VSS_NCTF_23 A4 Intel ME Crypto Transport Layer

2 R632 *0_4 TEST_SET_UP R650 10K_4 R574 *100K_4

WsD *U74AHC1G08G-AL5-R High = Strong (Default)

GPIO36 Internal PD SATA3GP/GPIO37 TLS Confidentiality

Date: Monday, December 24, 2012 Sheet 9 of 44

R444 *0_8/S AF34 VCCSUS3_3[3]

+1.05V VCCCLK[2] VCCIO[5]

R18 PCH_VCC_1_1_21 R393 *0_6/S +1.05V

AJ14 3.629A (160mils)

for DS3 0.261A (40mils) U21

PCH VCCIO Power PCH DS3 PWR

for DS3 C526

+3VS5 +3VS5 R823 0_8

Date: Monday, December 24, 2012 Sheet 10 of 44

Date:Monday, December 24, 2012 Sheet 11 of 44

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

Place these Caps near So-Dimm0. VREF DQ0 M1 Solution

C236 1U/6.3V_4 C25 1U/6.3V_4

C147 10U/6.3V_8 +SMDDR_VREF_DQ0 C413 0.022U/16V_4 R299 24.9/F_4

Date: Friday, December 21, 2012 Sheet 12 of 44

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

R808 *10K_4 *G781-1P8

Haswell Processor (DDR3)

PCIE_WAKE# R625 1K_4 R608 0_4/S IMVP_PWRGD

2 R632 0_4 TEST_SET_UP R650 10K_4 R574 100K_4

R808 10K_4 G781-1P8

&E W,<d CPU BKT VGA BKT

H-C315IC150D110P2 h-c197d110p2 h-c315ic150d110p2 H-C197D110P2 h-tc276bc315d236p2 H-C87D87N

D 4 2 6 DISP_ON R82 0_4 DISP_ON_L R6 1K_4 BRIGHT D