Lenovo G400 (Compal LA-3781P) Free Laptop Schematics

A
ZZZ
ZZZ1
ZZZ2
ZZZ3
ZZZ4
PCB
PCB
PCB
PCB
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DAZ@
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Compal Confidential
2
Everest Schematics Document

Intel Merom Processor with Calistoga + DDRII + ICH7M
2007-05-15
REV: 1.0
Date:
tm
ho
f@
Cover Page
Size
B
Document Number
Rev
0.1
in
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
LA-3781P
xa
2007/8/18
Deciphered Date
he
2006/08/18
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
ai
l.c
om
Friday, May 18, 2007
Sheet
E
of
46
Compal Confidential
Intel Merom Processor
Model Name : Everest

File Name : LA-3781P
uPGA-478 Package
page 4,5,6
FSB
667/800MHz
H_A#(3..35)
CRT
CRT
NB8M
128M
VGA/B
H_D#(0..63)
CRT
page 19
LVDS
Intel Calistoga GMCH Memory BUS(DDRII)

Dual Channel
LVDS
LCD Conn.
page 18
page 7,8,9,10,11,12,13
DMI
X4 mode
USB conn x2
TO M/B
USB conn x2
TO I/O/B
page 33
2
PCI-Express
3.3V ATA-100
page 29
page 28
S-ATA
HD Audio
IDE
port 0
MDC 1.5
Conn
page 42
LAN(10/100M)
BCM5906
32
RTS 5158
33
USB
3.3V 48MHz
page 20,21,22,23
3G/TV-Tuner
Robson page
3 in 1
socket
Card Reader
Intel ICH7-M
mBGA-652
page 33
Bluetooth
Conn page
page 37
3.3V 24.576MHz/48Mhz
New Card MINI Card

WLAN,
Socket
page 14,15
BANK 0, 1, 2, 3
1.8V DDRII 533/667
PCBGA 1466
PCI-Express
200pin DDRII-SO-DIMM X2
page 30
ALC861VD
page 38
CDROM
Conn.
page 24
S-ATA HDD
Conn.page 24
LPC BUS
HDA Codec
Audio AMP
RJ45
page 39
page 31
SPI ROM
ENE KB926
Audio BD
USB BD
Fan Control
page 4
Int SPK
Mic/Int
Int.KBD
Touch Pad
K_SW
BIOS
page 36
page 34
page 36
Line-out
page 35
Clock Generator
Mic/Ext
Sub BD
SLG8LP465VTR
page 16
USBx2
Thermal Sensor
G781F
4
page 4
SW Board
HDD/ODD
Power circuit
NUM
CAP
Scroll
NOVO
Mute
User
Power
page X
MB
A
Battery
W/L
2006/08/18
Issued Date
Compal Secret Data
Power
2007/8/18
Deciphered Date
B
Title
Block Diagrams
Size
B
Date:
Document Number
Rev
0.1
LA-3781P
Sheet

E
of
46
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Voltage Rails
Power Plane
Description
S1
S3
S5
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
OFF
+0.9VS
0.9V switched power rail for DDR terminator
ON
OFF
+VCCP
VCCP switched power rail
ON
OFF
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
External PCI Devices

DEVICE
+1.8V
1.8V power rail for DDR
ON
ON
OFF
ON
OFF
OFF
+2.5VS
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3VS
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
5V switched power rail
ON
OFF
OFF
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
Full ON
PIRQ
+5VS
+VSB
SIGNAL
REQ/GNT #
No PCI Device
+1.8VS
STATE
IDSEL #
EC SM Bus1 address
+VALW
+V
+VS
ON
ON
ON
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
GMT-781
1001 100X b
EEPROM(24C16/02)
1010 000X b
NVIDIA NB8X
Clock
HIGH
HIGH
HIGH
HIGH
ON
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
ICH7M SM Bus address
BOARD ID Table
ID
BRD ID
I
H
L
0
0
I
H
L
V
2
/
3
I
G
T
3
0
0
1
2
3
4
5
6
7
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
R54/42(Rb) Vab
0
8.2K
18K
33K
56K
100K
200K
NC
0V
0.25V
0.50V
0.82V
1.19V
1.65V
2.20V
3.30V
Device
Address
Clock Generator
(SLG8LP465VTR)
1101 001Xb
DDR DIMM0
1010 000Xb
DDR DIMM1
1010 010Xb
Wireless
NewCard
LAN
PANEL ID Table
UMA_DES
ID
Vab
IHL00/IGT30 UMA 3.30V
2.20V
IHLV3 UMA
Date:
tm
ho
Notes List
Size
B
f@
Title
Document Number
Rev
0.1
in
0.25V
IHLV2 VGA
IHL00/IGT30 VGA 0V
2007/8/18
Deciphered Date
LA-3781P
xa
2006/08/18
Issued Date
Compal Secret Data
ai
l.c
om
he
0
1
2
3
4
5
6
7
Sheet
E
of
46
+VCCP
H_D#[0..63] <7>
This shall place near CPU

R509 1
56_0402_5%
2
ITP_TDI
<7> H_ADSTB#0
<7> H_ADSTB#1
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
K3
H2
K2
J3
L5
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
H_ADSTB#0
H_ADSTB#1
L2
V4
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DINV0#
DINV1#
DINV2#
DINV3#
J26
M26
V23
AC20
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
H23
M24
W24
AD23
G22
N25
Y25
AE24
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
A6
A5
C4
B3
C6
B4
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
STPCLK#
SMI#
D5
A3
H_STPCLK#
H_SMI#
YONAH
ADDR GROUP
DATA GROUP
ADSTB0#
ADSTB1#
CLK_CPU_BCLK A22
CLK_CPU_BCLK# A21
<7>
<7>
<7>
<7>
<7>
<7>
R73
<7>
56_0402_5%
<7>
1
2
<7>
<7>
+VCCP
<7>
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_RESET#
H_RS#[0..2]
<7>
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_TRDY#
H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1
F3
F4
G3
G2
AD4
AD3
AD1
AC4
<21> ITP_DBRESET#
<7>
H_DBSY#
<20> H_DPSLP#
<20,44> H_DPRSTP#
<7>
H_DPWR#
<44> H_PROCHOT#
+VCCP
T48
PAD
1 R70
2
68_0402_5%
CONTROL
RS0#
RS1#
RS2#
TRDY#
BPM0#
BPM1#
BPM2#
BPM3#
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PW RGOOD D6
H_CPUSLP#
D7
ITP_TCK
AC5
ITP_TDI
AA6
ITP_TDO
AB3
TEST1
C26
TEST2
D25
ITP_TMS
AB5
ITP_TRST#
AB6
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
2 @ 1K_0402_5%
2 51_0402_5%
<7,20> H_THERMTRIP#
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
HOST CLK
ITP_DBRESET# C20
H_DBSY#
E1
H_DPSLP#
B5
H_DPRSTP#
E5
H_DPWR#
D24
AC2
AC1
H_PROCHOT# D21
<20> H_PWRGOOD
<7,20> H_CPUSLP#
R499 1
R307 1
BCLK0
BCLK1
H_THERMDA
A24
H_THERMDC
A25
H_THERMTRIP# C7
H_THERMDA, H_THERMDC routing together.

Trace width / Spacing = 10 / 10 mil
MISC
R510 1
56_0402_1%
ITP_TDO
R512 1
56_0402_5%
56_0402_5%
R515 1
ITP_DBRESET#
R511 1
ITP_TRST#
R513 1
56_0402_5%
ITP_TCK
R514 1
56_0402_5%
2 @ 200_0402_5%
PAD T35
+3VS
C327
1
@ R268
10K_0402_5%
0.1U_0402_16V4Z
U19
H_THERMDA
C328
1
2
<31> EC_SMB_CK2
H_THERMDC
2200P_0402_50V7K
EC_SMB_CK2
EC_SMB_DA2
<31> EC_SMB_DA2
D+
D-
SCLK
VDD1
ALERT#
THERM#
GND
SDATA
THERM_SCI#
2
1
EC_THERM# <21,31>
R267
@ 0_0402_5%
THERM#
2
1
+3VS
10K_0402_5%
@R269
Check : to sb
C
G781F_SOP8
Address:100_1100
FAN1 Conn
+5VS
C100
1
+5VS
2.2U_0603_16V6K
2
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
<7>
<7>
<7>
<7>
U6
H_DSTBN#[0..3] <7>
<31> EN_FAN1
+VCC_FAN1
EN_FAN1
1
2
3
4
D8
VEN
VIN
VO
VSET
GND
GND
GND
GND
8
7
6
5
G993P1UF_SOP8
DIODE
Closed to
Connector
1SS355_SOD323
D7
@
@ 1N4148_SOT23
1
2
B
C94
2.2U_0603_16V6K
1
2
H_DSTBP#[0..3] <7>
+3VS
C358
1000P_0402_50V7K
1
2
<15> CLK_CPU_BCLK
<15> CLK_CPU_BCLK#
ITP_TMS
<7> H_REQ#[0..4]
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
R276
1K_0402_5%
THERMAL
LEGACY CPU
THERMDA DIODE
THERMDC
THERMTRIP#
40mil
H_A20M# <20>
H_FERR# <20>
H_IGNNE# <20>
H_INIT# <20>
H_INTR
<20>
H_NMI
<20>
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
JP15A
H_A#[3..31]
<7>
JP17
+VCC_FAN1
<31> FAN_SPEED1
1
2
3
1
2
3
4
5
GND
GND
H_STPCLK# <20>
H_SMI#
<20>
C341
100P_0402_50V8J
ACES_85205-03001
ME@
TYCO_1-1674770-2_Yonah~D
ME@
+VCCP
A
+VCCP
R68
R487
H_DPSLP# 1
2 2
@ 56_0402_5%
B
E
H_PROCHOT#
3
1 OCP#
@ Q4
MMBT3904_SOT23
@ 56_0402_5%
R486
H_DPRSTP# 1
2
OCP#
<21>
@ 56_0402_5%
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
3
Title
Merom (1/3)
Size Document Number
Custom
Rev
0.1
LA-3781P
Date:
Sheet

1
of
46
R266
100_0402_1%
1
2
R516
100_0402_1%
1
2
VCCSENSE
+1.5VS
C283
0.01U_0402_16V7K
R263
1K_0402_1%
VSSSENSE
R67
2K_0402_1%
Close to CPU pin AD26

within 500mils.
C284
10U_0805_10V4Z
+CPU_CORE
+CPU_GTLREF
+CPU_CORE
Length match within 25 mils

The trace width 18 mils space
<44> VCCSENSE
7 mils
<44> VSSSENSE
JP15B
VCCSENSE
VSSSENSE
VCCSENSE
VSSSENSE
B26
VCCA
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
H_PSI#
AE6
PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD6
AF5
AE5
AF4
AE3
AF2
AE2
VID0
VID1
VID2
VID3
VID4
VID5
VID6
+VCCP
1
Close to CPU pin

within 500mils.
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
133
<44>
H_PSI#
<44>
<44>
<44>
<44>
<44>
<44>
<44>
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
AD26
+CPU_GTLREF
166
<15> CPU_BSEL0
<15> CPU_BSEL1
<15> CPU_BSEL2
R517
54.9_0402_1%
2
1
R264
27.4_0402_1%
2
1
R76
54.9_0402_1%
2
1
R261
27.4_0402_1%
2
1
GTLREF
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
B22
B23
C21
BSEL0
BSEL1
BSEL2
COMP0
COMP1
COMP2
COMP3
R26
U26
U1
V1
COMP0
COMP1
COMP2
COMP3
E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17
+CPU_CORE
JP15C
AF7
AE7
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any
other toggling signal.
D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
YONAH
POWER, GROUNG, RESERVED SIGNALS AND NC
+VCCP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1
AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7
ME@
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
YONAH
POWER, GROUND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21
ME@
A
LA-3781P
Date:
tm
ho
f@
Merom (2/3)
Custom
Rev
0.1
in
Title
xa
2007/8/18
Deciphered Date
he
2006/08/18
Issued Date
Compal Secret Data
ai
l.c
om
Sheet

1
of
46
+CPU_CORE
+CPU_CORE
3 x 330uF(9mOhm/2)
1
3 x 330uF(9mOhm/2)
+ C298
+ C297
+ C332
+ C331
330U_D2E_2.5VM_R9
2 330U_D2E_2.5VM_R9
2
330U_D2E_2.5VM_R9
2 330U_D2E_2.5VM_R9
2
South Side Secondary
North Side Secondary
+CPU_CORE
C26
C27
C28
C29
C30
C31 @
C32
C33
@ 10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Secondary Layer)

+CPU_CORE
C56
C55
C54
C53
C52
C51
C50
C49
9/25 10U checked. OK for use!
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C
(Place these capacitors on North side,Secondary Layer)

+CPU_CORE
C315
C316
C305
C306
C307
C308
C309
C310
@ 10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
(Place these capacitors on South side,Primary Layer)

+CPU_CORE
1
1
1
1
1
1
1
C314
C323
C322
C321
C320
C319
C318
@
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C313
(Place these capacitors on North side,Primary Layer)
+CPU-CORE
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
C,uF
ESR, mohm
ESL,nH
6X330uF
9m ohm/6
1.8nH/6
32X22uF
3m ohm/32
0.6nH/32
32X10uF
3m ohm/32
0.6nH/32
+VCCP
1
C324
220U_B2_2.5VM_R35
C38
C43
C58
C24
C39
C45
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Merom (3/3)
Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet
1
of
46
J13
+H_VREF
K13
H_XRCOMP E1
H_XSCOMP E2
H_YRCOMP Y1
H_YSCOMP U1
+H_SWNG0 E4
+H_SWNG1 W1
R24
24.9_0402_1%
2
1
R39
24.9_0402_1%
2
1
HVREF0
HVREF1
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
HADSTB#0
HADSTB#1
B9
C13
H_ADSTB#0
H_ADSTB#1
HCLKN
HCLKP
AG1
AG2
CLK_MCH_BCLK#
CLK_MCH_BCLK
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
K4
T7
Y5
AC4
K3
T6
AA5
AC5
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
J7
W8
U3
AB10
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3
H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#
HRS0#
HRS1#
HRS2#
B4
E6
D6
H_RS#0
H_RS#1
H_RS#2
HDINV#0
HDINV#1
HDINV#2
HDINV#3
H_DSTBP#[0..3] <4>
<4>
<4>
<4>
<4>
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AE37
AF41
AG37
AH41
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
AC37
AE41
AF37
AG41
DMITXP0
DMITXP1
DMITXP2
DMITXP3
DDRA_CLK0
DDRA_CLK1
DDRB_CLK0
DDRB_CLK1
AY35
AR1
AW7
AW40
SM_CK0
SM_CK1
SM_CK2
SM_CK3
DDRA_CLK0#
DDRA_CLK1#
DDRB_CLK0#
DDRB_CLK1#
AW35
AT1
AY7
AY40
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
AU20
AT20
BA29
AY29
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
DDRA_SCS0#
DDRA_SCS1#
DDRB_SCS0#
DDRB_SCS1#
AW13
AW12
AY21
AW21
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
<21>
<21>
<21>
<21>
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
<21>
<21>
<21>
<21>
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
<13>
<13>
<14>
<14>
+1.8V
R518
1
1
DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1
2 80.6_0402_1%
2
80.6_0402_1%
SMRCOMPN
SMRCOMPP
AL20
AF10
SM_OCDCOMP0
SM_OCDCOMP1
BA13
BA12
AY20
AU21
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
AV9
AT9
AK1
AK41
+DDR_MCH_REF
CFG
AC35
AE39
AF35
AG39
M_OCDOCMP0
M_OCDOCMP1
R33
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
<13>
<13>
<14>
<14>
CLK_MCH_BCLK# <15>
CLK_MCH_BCLK <15>
H_DSTBN#[0..3] <4>
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
<21>
<21>
<21>
<21>
<13>
<13>
<14>
<14>
H_ADSTB#0 <4>
H_ADSTB#1 <4>
AE35
AF39
AG35
AH39
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
<13>
<13>
<14>
<14>
H_REQ#[0..4] <4>
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
<21>
<21>
<21>
<21>
<13>
<13>
<14>
<14>
D8
G8
B8
F8
A8
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
Description at page15.
U20B
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
G_CLKP
G_CLKN
D_REF_CLKN
D_REF_CLKP
D_REF_SSCLKN
D_REF_SSCLKP
CLK_REQ#
SM_RCOMPN
SM_RCOMPP
PM_BMBUSY#
G28 PM_BMBUSY#
<21> PM_BMBUSY#
R164 <13,14> PM_EXTTS#0
PM_EXTTS#0
F25 PM_EXTTS0#
H_RESET# <4>
PM_EXTTS#1
H26 PM_EXTTS1#
2
1
<21,44> PM_DPRSLPVR
H_ADS# <4>
H_THERMTRIP#
G6 PM_THERMTRIP#
<4,20> H_THERMTRIP#
H_TRDY# <4>
ICH_POK
0_0402_5%
AH33
H_DPWR# <4>
<21,31> ICH_POK
PWROK
PLTRST_R#
AH34 RSTIN#
2
1
H_DRDY#
<16,19,21,23,24,27,29>
<4>
PLT_RST_BUF#
R117
100_0402_1%
H_DEFER# <4>
K28 ICH_SYNC#
<19> MCH_ICH_SYNC#
H_HITM# <4>
H_HIT#
<4>
H_LOCK# <4>
H_BR0# <4>
H_BNR# <4>
CALISTOGA_FCBGA1466~D
H_BPRI# <4>
GM@
H_DBSY# <4>
Layout Note:
H_CPUSLP# <4,20>
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
CFG3
PAD
CFG4
PAD
CFG5
CFG6
PAD
CFG7
CFG8
PAD
CFG9
CFG10
PAD
CFG11
CFG12
CFG13
CFG14
PAD
CFG15
PAD
CFG16
CFG17
PAD
CFG18
CFG19
CFG20
MCH_CLKSEL0 <15>
MCH_CLKSEL1 <15>
MCH_CLKSEL2 <15>
T9
T3
CFG5
<11>
T10
CFG7
<11>
T7
CFG9
<11>
T5
CFG11
<11>
CFG12
<11>
CFG13
<11>
T2
T8
CFG16
<11>
T1
CFG18
<11>
CFG19
<11>
CFG20
<11>
AG33 CLK_MCH_3GPLL
AF33 CLK_MCH_3GPLL#
A27
A26
H32
A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13
T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35
MCH_CLKREQ#
MCH_CLKREQ# <15>
+3VS
H_RS#[0..2] <4>
+1.8V
R519
10K_0402_5%
2
1
PM_EXTTS#1
R279
@ 10K_0402_5%
2
1
M_OCDOCMP0
R112
@ 40.2_0402_1%
2
1
M_OCDOCMP1
R32
@ 40.2_0402_1%
2
1
PM_EXTTS#0
+VCCP
1
R521
221_0603_1%
221_0603_1%
R520
100_0402_1%
1
100_0402_1%
2
+H_SWNG1
A
om
3
ai
l.c
2
Crestline (1/7)-GTL
Custom
LA-3691P
Date:
tm
ho
Title
f@
2007/8/18
Deciphered Date
Rev
0.1
in
2006/08/18
Issued Date
Compal Secret Data
xa
he
0.1U_0402_16V4Z
C286
1
R28
2
100_0402_1%
0.1U_0402_16V4Z
C303
1
R168
100_0402_1%
0.1U_0402_16V4Z
C91
+H_SWNG0
R27
+H_VREF
200_0402_1%
R31
+VCCP
+VCCP
C287
0.1U_0402_16V4Z
+DDR_MCH_REF
100_0402_1%
Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 10/20.
R37
CLK_MCH_SSCDREFCLK# <15>
CLK_MCH_SSCDREFCLK <15>
R282
CLK_MCH_DREFCLK# <15>
CLK_MCH_DREFCLK <15>
+DDR_MCH_REF
trace width and
spacing is 20/20.
GM@
CLK_MCH_3GPLL <15>
CLK_MCH_3GPLL# <15>
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
C40 CLK_MCH_SSCDREFCLK#
D41 CLK_MCH_SSCDREFCLK
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
SM_VREF0
SM_VREF1
PM
R283
54.9_0402_1%
2
1
+VCCP
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
DDR MUXING
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
DMI
965GM
PM@
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
CLK
U20
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
H_A#[3..31] <4>
U20A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
R35
54.9_0402_1%
2
1
NC
H_D#[0..63]
HOST
<4>
RESERVED
Sheet
1
of
46
<13> DDRA_SDQ[0..63]
<13> DDRA_SDM[0..7]
<13> DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRB_SDQ[0..63]
<14> DDRB_SDQ[0..63]
DDRA_SDM[0..7]
DDRB_SDM[0..7]
<14> DDRB_SDM[0..7]
DDRA_SMA[0..13]
DDRB_SMA[0..13]
<14> DDRB_SMA[0..13]
SA_BS0
SA_BS1
SA_BS2
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
<13>
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
<13> DDRA_SCAS#
<13> DDRA_SRAS#
<13> DDRA_SWE#
T6 PAD
T12 PAD
SA_RCVENIN#
SA_RCVENOUT#
AY13
AW14
AY14
AK23
AK24
SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
DDR SYS MEMORY A
AU12
AV14
BA20
<13> DDRA_SBS0
<13> DDRA_SBS1
<13> DDRA_SBS2
U20E
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
AT24
AV23
AY28
SB_BS0
SB_BS1
SB_BS2
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
<14> DDRB_SBS0
<14> DDRB_SBS1
<14> DDRB_SBS2
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
<14>
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
<14> DDRB_SCAS#
<14> DDRB_SRAS#
<14> DDRB_SWE#
T4 PAD
T11 PAD
AR24
AU23
AR27
SB_RCVENIN#
AK16
SB_RCVENOUT# AK18
GM@
DDR SYS MEMORY B
U20D
SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
GM@
Compal Secret Data
2006/08/18
Issued Date
Deciphered Date
2007/8/18
5
Title
Crestline (2/7)-DMI/DDR
Custom
R ev
0.1
LA-3691P
Date:
Sheet
1
of
46
U20C
SDVOCTRL_DATA
SDVOCTRL_CLK
LVDS_A0
LVDS_A1
LVDS_A2
B37
B34
A36
LA_DATA0
LA_DATA1
LA_DATA2
<17> LVDS_A0#
<17> LVDS_A1#
<17> LVDS_A2#
LVDS_A0#
LVDS_A1#
LVDS_A2#
C37
B35
A37
LA_DATA#0
LA_DATA#1
LA_DATA#2
<17> LVDS_B0
<17> LVDS_B1
<17> LVDS_B2
LVDS_B0
LVDS_B1
LVDS_B2
F30
D29
F28
LB_DATA0
LB_DATA1
LB_DATA2
<17> LVDS_B0#
<17> LVDS_B1#
<17> LVDS_B2#
LVDS_B0#
LVDS_B1#
LVDS_B2#
G30
D30
F29
LB_DATA#0
LB_DATA#1
LB_DATA#2
A32
A33
E26
E27
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
D32
J30
H30
H29
G26
G25
F32
B38
C35
C33
C32
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
A16
C18
A19
TVDAC_A
TVDAC_B
TVDAC_C
J20
TV_IREF
B16
B18
B19
TV_IRTNA
TV_IRTNB
TV_IRTNC
J29
K30
TV_DCONSEL1
TV_DCONSEL0
<18> GMCH_CRT_CLK
<18> GMCH_CRT_DATA
C26
C25
DDCCLK
DDCDATA
<18> GMCH_CRT_VSYNC
<18> GMCH_CRT_HSYNC
<18> GMCH_CRT_B
H23
G23
E23
D23
C22
B22
A21
B21
<17>
<17>
<17>
<17>
LVDS_ACLK
LVDS_ACLK#
LVDS_BCLK
LVDS_BCLK#
LVDS_ACLK
LVDS_ACLK#
LVDS_BCLK
LVDS_BCLK#
GMCH_ENBKL
<17> GMCH_ENBKL
<17> LVDS_SCL
<17> LVDS_SDA
<17> GMCH_ENVDD
2
1
R104 1.5K_0402_1%
LVDS
<17> LVDS_A0
<17> LVDS_A1
<17> LVDS_A2
GMCH_CRT_R
1
GM@ 150_0402_1%
GMCH_CRT_G
1
GM@ 150_0402_1%
GMCH_CRT_B
1
GM@ 150_0402_1%
<18> GMCH_CRT_G
<18> GMCH_CRT_R
2 R122
1
255_0402_1%
J22
VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
CRT
2
R397
2
R526
2
R524
TV
2 R114
1
4.99K_0402_1%
EXP_COMPI
EXP_COMPO
PCI-EXPRESS GRAPHICS
H27
H28
+1.5VS_PCIE
R113
24.9_0402_1%
1
2
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
CRT_IREF
D40
D38
PEGCOMP
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15] <16>
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_P[0..15] <16>
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15] <16>
PCIE_GTX_C_MRX_P[0..15]
C404 1
C408 1
C411 1
C423 1
C465 1
C441 1
C440 1
C448 1
C407 1
C175
2 PM@ 0.1U_0402_10V7K
C144
2 PM@ 0.1U_0402_10V7K
C142
2 PM@ 0.1U_0402_10V7K
C149
2 PM@ 0.1U_0402_10V7K
C172
PM@
0.1U_0402_10V7K
2
C162
2 PM@ 0.1U_0402_10V7K
C166
PM@
0.1U_0402_10V7K
2
C177
2 PM@ 0.1U_0402_10V7K
C133
0.1U_0402_10V7K
C129
0.1U_0402_10V7K
C178
0.1U_0402_10V7K
C167
0.1U_0402_10V7K
C161
0.1U_0402_10V7K
C155
0.1U_0402_10V7K
C173
0.1U_0402_10V7K
C170
0.1U_0402_10V7K
2 PM@
C406 1
2 PM@
C405 1
2 PM@
C419 1
2 PM@
C426 1
2 PM@
C429 1
2 PM@
C437 1
2 PM@
C464 1
2 PM@
1
1
1
1
1
1
1
1
1
1
1
1
1
1
PCIE_GTX_C_MRX_P[0..15] <16>
2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N15
2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P3
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_P4
2
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P7
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_P8
2
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P11
PM@
0.1U_0402_10V7K
PCIE_MTX_C_GRX_P12
2
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P15
GM@
l.c
om
Date:
tm
f@
Crestline (3/7)-DDRII
Size
B
Document Number
LA-3691P
Rev
0.1
in
5
Title
ho
2007/8/18
xa
Deciphered Date
he
2006/08/18
Issued Date
ai
Compal Secret Data
Sheet
of
46
+VCCP
D21 @
+2.5VS
VCCA_TVBG
VSSA_TVBG
H20
G20
+3VS_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
E19
F19
C20
D20
E20
F20
+3VS_TVDACA
10U_0805_6.3V6M
C430
0.1U_0402_16V4Z
+1.5VS_MPLL
10U_1206_6.3V6M
AF2
10U_1206_6.3V6M
C605
VCCA_MPLL
220U_B2_2.5VM_R35
C134
+2.5VS
+1.5VS_DPLLA
close pin G41

CRTDAC: Route caps within
250mil of Alviso. Route FB
within 3" of Calistoga
+1.5VS_DPLLB
L42
1
2
FBM-L10-160808-301-T_0603
1
+
L43
1
2
+1.5VS
FBM-L10-160808-301-T_0603
+1.5VS
1
+
2
+3VS_TVBG
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
C140
0.1U_0402_16V4Z
+3VS
+1.5VS_TVDAC
+3VS
1
PCI-E/MEM/PSB PLL decoupling
+1.5VS
R87
0_0603_5%
2
1
+1.5VS
+1.5VS_TVDAC
R527
0_0603_5%
2
1
+1.5VS_MPLL
R85
0_0603_5%
2
1
45mA Max.
1
C154
GM@
R17
0_0603_5%
2
1
45mA Max.
1
+1.5VS_HPLL
+1.5VS
+1.5VS
C402
0.1U_0402_16V4Z
+1.5VS_3GPLL
+1.5VS
10U_1206_6.3V6M
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
C148
0.022U_0402_16V7K
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
+3VS
R529
2
1
10_0805_1%
1
C427
A23
B23
B25
0.1U_0402_16V4Z
D21
H19
VCCHV0
VCCHV1
VCCHV2
C601
VCCD_TVDAC
VCCDQ_TVDAC
C143
0.1U_0402_16V4Z
A28
B28
C28
+1.5VS
C410
0.1U_0402_16V4Z
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
C606
0.022U_0402_16V7K
C153
0.1U_0402_16V4Z
1
2
+3VS_TVDACA
C400
0.022U_0402_16V7K
C603
10U_1206_6.3V6M
AH1
AH2
+3VS_TVDACA
R528
2
1
0_0603_5%
close pin A38

VCCD_HMPLL0
VCCD_HMPLL1
+3VS_TVDACA
C425
0.1U_0402_16V4Z
C126
0.1U_0402_16V4Z
C397
0.01U_0402_16V7K
+3VS_TVDACA
+3VS_TVDACA
10U_1206_6.3V6M
+1.5VS
VCCA_LVDS
VSSA_LVDS
A38
B39
2
R878
2
1 +2.5VS
10_0603_5%
+2.5VS
P O W E R
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
C157
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
B26
C39
AF1
+2.5VS
0.1U_0402_16V4Z
MCH_D2
C600
0.47U_0603_10V7K
MCH_AB1
+2.5VS_CRTDAC
C130
0.1U_0402_16V4Z
1
C163
0.22U_0603_10V7K
C165
0.22U_0603_10V7K
E21
F21
G21
C607
0.022U_0402_16V7K
C602
0.47U_0603_10V7K
MCH_A6
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2
C608
0.1U_0402_16V4Z
C121
2.2U_0805_16V4Z
C168
4.7U_0805_10V4Z
+1.5VS_3GPLL
+2.5VS
GM@ C145
AC33
G41
H41
+
2
+1.5VS
330U_D2E_2.5VM
C431
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
1
C438
R86
0_0805_5%
2
1
0.1U_0402_16V4Z
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
GM@ C417
+1.5VS_PCIE
W=40 mils
AB41
AJ41
L41
N41
R41
V41
Y41
330U_D2E_2.5VM
C124
@ 10_0402_5%
+2.5VS
C619
+3VS
R530
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
1
2
C396
0.1U_0402_16V4Z
C432
0.1U_0402_16V4Z
1 1
RB751V-40TE17_SOD323-2
H22
B30
C30
A30
0.1U_0402_16V4Z
C604
220U_B2_2.5VM_R35
D19 @
VCC_SYNC
C442
0.022U_0402_16V7K
+1.5VS
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76
C424
10U_1206_6.3V6M
@ 10_0402_5%
D
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
C394
0.1U_0402_16V4Z
+VCCP
+2.5VS
R531
U20H
C422
0.1U_0402_16V4Z
1 1
RB751V-40TE17_SOD323-2
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
5
Title
Crestline (4/7)-VGA/LVDS/TV
Custom
Rev
0.1
LA-3691P
Date:
Sheet

1
10
of
46
Strap Pin Table

CFG[3:17] have internal pull up
+
2
C164
0.47U_0603_10V7K
GM@
Place near pin AV1 & AJ1

A
C158
0.47U_0603_10V7K
0 = DMI x 2
1 = DMI x 4 *(Default)
CFG7
0 = Reserved
1 = Mobile Yonah CPU*(Default)
CFG9
0 = Lane Reversal Enable

1 = Normal Operation (Default)*
CFG6
0 = Reserved
Place near pin AT41 & AM41
C146
0.1U_0402_16V4Z
C112
0.1U_0402_16V4Z
=
=
=
=
Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation *(Default)
0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled *(Default)
CFG16
1
1 = Calistoga
00
01
10
11
CFG[13:12]
= 667MT/s FSB
= 533MT/s FSB
CFG5
PSB 4X CLK Enable
0.1U_0402_16V4Z
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
+1.8V
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
C147
0.47U_0603_10V7K
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
C138
VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107
+VCCP
011
001
CFG[2:0]
0.1U_0402_16V4Z
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
MCH_AT41
MCH_AM41
C139
0.47U_0603_10V7K
10 = 1.05V*(Default)
01 = 1.5V
CFG10 CFG18
0 = Normal Operation * (Default)

1 = DMI Lane Reversal Enable
CFG19
0 = No SDVO Device Present *

(Default)
SDVO_CTRLDATA
1 = SDVO Device Present
CFG20
(PCIE/SDVO select)
0 = Only PCIE or SDVO is

operational. *(Default)
1 = PCIE/SDVO are operating
simu.
Place near pin BA23
<7>
CFG5
<7>
CFG7
<7>
CFG9
<7>
CFG11
<7>
CFG12
<7>
CFG13
<7>
CFG16
R124
2 @
R88
2 @
2.2K_0402_5%
2.2K_0402_5%
R110
2 @
2.2K_0402_5%
R123
2 @
2.2K_0402_5%
R125
2 @
2.2K_0402_5%
R109
2 @
2.2K_0402_5%
R108
2 @
2.2K_0402_5%
+3VS
<7>
<7>
<7>
R131
R130
R126
CFG18
CFG19
CFG20
2 @ 1K_0402_5%
2 @ 1K_0402_5%
2 @ 1K_0402_5%
1
1
1
Place near pin BA15
5
Crestline (5/7)-VCC
Custom
LA-3691P
Date:
tm
ho
Title
f@
2007/8/18
Deciphered Date
Rev
0.1
in
2006/08/18
Issued Date
Compal Secret Data
ai
l.c
om
GM@
xa
C127
0.22U_0603_10V7K
P O W E R
VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99
he
220U_B2_2.5VM_R35
C150
CFG[19:18] have internal pull down
C122
10U_1206_6.3V6M
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
C118
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19
C141
0.47U_0603_10V7K
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
+1.8V
U20G
C137
10U_1206_6.3V6M
C119
1U_0603_10V4Z
C115
0.22U_0603_10V7K
C114
10U_1206_6.3V6M
C136
10U_1206_6.3V6M
C159
0.22U_0603_10V7K
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
P O W E R
AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18
+VCCP
+1.5VS
C128
0.47U_0603_10V7K
U20F
+VCCP
Sheet
1
11
of
46
U20I
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
U20J
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
P O W E R
GM@
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
P O W E R
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
4
GM@
Issued Date
Title
Crestline (6/7)-VCC
Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet
1
12
of
46
<14,31,33> EC_RX_P80_CLK
<8> DDRA_SBS2
<8> DDRA_SBS0
<8> DDRA_SWE#
<8> DDRA_SCAS#
<7> DDRA_SCS1#
<7> DDRA_ODT1
<8> DDRA_SDQS4#
<8> DDRA_SDQS4
EC_RX_P80_CLK
R201 1
2
<14> EC_RX_P80_CLK_R
<8> DDRA_SDQS6#
<8> DDRA_SDQS6
<14,15,23> D_CK_SDATA
<14,15,23> D_CK_SCLK
@ C234
DDRA_SDM1
1K_0402_1%
220P_0402_50V7K
2 @
DDRA_SDQ20
DDRA_SDQ21
R207 1
DDRA_SDM2
2 0_0402_5%
PM_EXTTS#0 <7,14>
<8> DDRA_SDQ[0..63]
2
DDRA_CKE1 <7>
DDRA_CKE0
DDRA_SBS2
4
3
56_0404_4P2R_5%
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA12
1
DDRA_SMA9
2
RP15
4
3
56_0404_4P2R_5%
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SMA8
DDRA_SMA5
4
3
56_0404_4P2R_5%
DDRA_ODT0
DDRA_SMA13
DDRA_SMA3
DDRA_SMA1
DDRA_SBS1 <8>
DDRA_SRAS# <8>
DDRA_SCS0# <7>
DDRA_ODT0 <7>
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# <8>
DDRA_SDQS5 <8>
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_CLK1 <7>
DDRA_CLK1# <7>
2.2U_0805_10V6K
C245
2.2U_0805_10V6K
C233
2.2U_0805_10V6K
C242
2.2U_0805_10V6K
C246
2.2U_0805_10V6K
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7# <8>
DDRA_SDQS7 <8>
1
1
2
RP16
C243
0.1U_0402_16V4Z
4
3
56_0404_4P2R_5%
DDRA_SMA10
1
DDRA_SBS0
2
RP18
4
3
56_0404_4P2R_5%
DDRA_SWE#
1
DDRA_SCAS#
2
RP19
4
3
56_0404_4P2R_5%
DDRA_SCS1#
1
DDRA_ODT1
2
RP20
4
3
56_0404_4P2R_5%
DDRA_SMA11
1
DDRA_CKE1
2
RP21
4
3
56_0404_4P2R_5%
+0.9VS
DDRA_SMA6
DDRA_SMA7
1
2
RP22
4
3
56_0404_4P2R_5%
DDRA_SMA2
DDRA_SMA4
1
2
RP23
4
3
56_0404_4P2R_5%
DDRA_SBS1
DDRA_SMA0
1
2
RP24
4
3
56_0404_4P2R_5%
DDRA_SCS0#
1
DDRA_SRAS#
2
RP25
4
3
56_0404_4P2R_5%
DDRA_SMA13
1
DDRA_ODT0
2
RP26
4
3
56_0404_4P2R_5%
C244
0.1U_0402_16V4Z
C230
0.1U_0402_16V4Z
C231
0.1U_0402_16V4Z
1
+
2
+0.9VS
C235
0.1U_0402_16V4Z
C236
0.1U_0402_16V4Z
C237
0.1U_0402_16V4Z
C238
0.1U_0402_16V4Z
C239
0.1U_0402_16V4Z
C240
0.1U_0402_16V4Z
C241
0.1U_0402_16V4Z
C250
0.1U_0402_16V4Z
C251
0.1U_0402_16V4Z
C252
0.1U_0402_16V4Z
+0.9VS
C253
0.1U_0402_16V4Z
C254
0.1U_0402_16V4Z
C255
0.1U_0402_16V4Z
DDRA_SDQ62
DDRA_SDQ63
R204 1
R205 1
2 10K_0402_5%
2 10K_0402_5%
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Layout Note:
Pla ce these resistor
closely JP35,all
trace length Max=1.5"
Compal Secret Data
2006/08/18
2007/8/18
Deciphered Date
4
+1.8V
1
2
RP17
DDRA_SDM6
DDRA_SDQS7#
DDRA_SDQS7
C232
+0.9VS
1
2
RP14
DDRA_SBS1
DDRA_SRAS#
DDRA_SCS0#
+1.8V
DDRA_SDQS3# <8>
DDRA_SDQS3 <8>
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
Layout Note:
Place near JP35
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
<8> DDRA_SDM[0..7]
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SMA[0..13]
<8> DDRA_SMA[0..13]
DDRA_SDQ22
DDRA_SDQ23
Issued Date
2.2U_0805_10V6K
DDRA_CLK0 <7>
DDRA_CLK0# <7>
DIMM0 STD H:5.2mm (BOT)
0.1U_0402_16V4Z
2
2
2.2U_0805_10V6K
0.1U_0402_16V4Z
C221
DDRA_SDQ14
DDRA_SDQ15
Change PCB Footprint
C228
R198
TYCO_292526-4
ME@
+3VS
C225
om
<7> DDRA_CKE0
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
C224
Title
DDRII-SODIMM0
Size
B
Date:
Document Number
l.c
<14,31,33> EC_TX_P80_DATA
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
+DIMM_VREF
1
DDRA_SDQ12
DDRA_SDQ13
ai
<8> DDRA_SDQS2#
<8> DDRA_SDQS2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
1K_0402_1%
20mils
DDRA_SDQ6
DDRA_SDQ7
tm
41
43
45
47
DDRA_SDQS2#
49
DDRA_SDQS2
51
53
DDRA_SDQ18
55
DDRA_SDQ19
57
59
DDRA_SDQ24
61
DDRA_SDQ25
63
65
DDRA_SDM3
67
EC_TX_P80_DATA 69
71
DDRA_SDQ26
73
DDRA_SDQ27
75
77
DDRA_CKE0
79
81
EC_RX_P80_CLK
83
DDRA_SBS2
85
87
DDRA_SMA12
89
DDRA_SMA9
91
DDRA_SMA8
93
95
DDRA_SMA5
97
DDRA_SMA3
99
DDRA_SMA1
101
103
DDRA_SMA10
105
DDRA_SBS0
107
DDRA_SWE#
109
111
DDRA_SCAS#
113
DDRA_SCS1#
115
117
DDRA_ODT1
119
121
DDRA_SDQ32
123
DDRA_SDQ33
125
127
DDRA_SDQS4#
129
DDRA_SDQS4
131
133
DDRA_SDQ34
135
DDRA_SDQ35
137
139
DDRA_SDQ40
141
DDRA_SDQ41
143
145
DDRA_SDM5
147
149
DDRA_SDQ42
151
DDRA_SDQ43
153
155
DDRA_SDQ48
157
DDRA_SDQ49
159
0_0402_5%
161
EC_RX_P80_CLK_R
163
165
DDRA_SDQS6#
167
DDRA_SDQS6
169
171
DDRA_SDQ50
173
DDRA_SDQ51
175
177
DDRA_SDQ56
179
DDRA_SDQ57
181
183
DDRA_SDM7
185
187
DDRA_SDQ58
189
DDRA_SDQ59
191
193
D_CK_SDATA
195
D_CK_SCLK
197
199
+3VS
DDRA_SDQ16
DDRA_SDQ17
R195
+DIMM_VREF
DDRA_SDM0
ho
DDRA_SDQ10
DDRA_SDQ11
+1.8V
C614
220U_B2_2.5VM_R35
DDRA_SDQS1#
DDRA_SDQS1
<8> DDRA_SDQS1#
<8> DDRA_SDQS1
9/25 Change DIMM0 to SP070004Z00 (HBL50)

DDRA_SDQ4
DDRA_SDQ5
f@
DDRA_SDQ9
DDRA_SDQ8
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Rev
0.1
in
DDRA_SDQ2
DDRA_SDQ3
D
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
LA-3691P
xa
<8> DDRA_SDQS0#
<8> DDRA_SDQS0
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
he
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0#
DDRA_SDQS0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+DIMM_VREF
+1.8V
JP25
+1.8V
Sheet

1
13
of
46
9/25 Change DIMM1 to SP070006F00

+1.8V
+1.8V
+DIMM_VREF
JP23
+DIMM_VREF
DDRB_SDQ5
DDRB_SDQ4
1
<8> DDRB_SDQS0#
<8> DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
<8> DDRB_SDQS1#
<8> DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
<8> DDRB_SDQS2#
<8> DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ19
DDRB_SDQ22
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
EC_TX_P80_DATA
<13,31,33> EC_TX_P80_DATA
2
DDRB_SDQ26
DDRB_SDQ27
<7> DDRB_CKE0
<13,31,33> EC_RX_P80_CLK
<8> DDRB_SBS2
DDRB_CKE0
EC_RX_P80_CLK
DDRB_SBS2
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
<8> DDRB_SBS0
<8> DDRB_SWE#
<8> DDRB_SCAS#
<7> DDRB_SCS1#
<7> DDRB_ODT1
DDRB_SMA10
DDRB_SBS0
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
<8> DDRB_SDQS4#
<8> DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
EC_RX_P80_CLK_R
<13> EC_RX_P80_CLK_R
<8> DDRB_SDQS6#
<8> DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ54
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
<13,15,23> D_CK_SDATA
<13,15,23> D_CK_SCLK
D_CK_SDATA
D_CK_SCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRB_SDQ1
DDRB_SDQ0
DDRB_SMA[0..13]
<8> DDRB_SMA[0..13]
DDRB_SDM0
C199
<8> DDRB_SDQ[0..63]
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDM1
DDRB_CLK1 <7>
DDRB_CLK1# <7>
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
R199 1
DDRB_SDM2
0_0402_5%
2
Layout Note:
Place near JP34
PM_EXTTS#0 <7,13>
DDRB_SDQ18
DDRB_SDQ23
+1.8V
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
C483
DDRB_SDQS3# <8>
DDRB_SDQS3 <8>
+0.9VS
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
DDRB_CKE1 <7>
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SBS1
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_CKE0
DDRB_SBS2
1
2
RP1
4
3
56_0404_4P2R_5%
DDRB_SMA12
DDRB_SMA9
1
2
RP2
4
3
56_0404_4P2R_5%
DDRB_SMA8
DDRB_SMA5
1
2
RP3
4
3
56_0404_4P2R_5%
DDRB_SBS1 <8>
DDRB_SRAS# <8>
DDRB_SCS0# <7>
DDRB_SMA3
DDRB_SMA1
1
2
RP4
4
3
56_0404_4P2R_5%
DDRB_ODT0 <7>
DDRB_SMA10
DDRB_SBS0
1
2
RP5
4
3
56_0404_4P2R_5%
DDRB_SWE#
DDRB_SCAS#
1
2
RP6
4
3
56_0404_4P2R_5%
DDRB_SCS1#
DDRB_ODT1
1
2
RP7
4
3
56_0404_4P2R_5%
DDRB_SMA11
DDRB_CKE1
1
2
RP8
4
3
56_0404_4P2R_5%
DDRB_SMA6
DDRB_SMA7
1
2
RP9
4
3
56_0404_4P2R_5%
DDRB_SMA2
DDRB_SMA4
1
2
RP10
4
3
56_0404_4P2R_5%
DDRB_SBS1
DDRB_SMA0
1
2
RP11
4
3
56_0404_4P2R_5%
DDRB_SCS0#
DDRB_SRAS#
1
2
RP12
4
3
56_0404_4P2R_5%
DDRB_SMA13
DDRB_ODT0
1
2
RP13
4
3
56_0404_4P2R_5%
DDRB_SDQ36
DDRB_SDQ37
C487
C219
C220
C216
+1.8V
C217
C482
C479
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C192
DDRB_SDM4
2.2U_0805_10V6K
2.2U_0805_10V6K
2.2U_0805_10V6K
2
2
2
2
2
2.2U_0805_10V6K
2.2U_0805_10V6K
C218
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
C193
C194
C195
C196
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# <8>
DDRB_SDQS5 <8>
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK0 <7>
DDRB_CLK0# <7>
DDRB_SDM6
DDRB_SDQ55
DDRB_SDQ51
C198
C203
C204
C205
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C206
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
+0.9VS
C197
C207
C208
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
DDRB_SDQS7# <8>
DDRB_SDQS7 <8>
DDRB_SDQ62
DDRB_SDQ63
R196
R197
1
1
2 10K_0402_5%
2 10K_0402_5%
Layout Note:
Pla ce these resistor
closely JP35,all
trace length Max=1.5"
+3VS
DIMM1 STD H:9.2mm (BOT)

2006/08/18
Issued Date
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
2007/8/18
Deciphered Date
C
Compal Secret Data
DDRB_SDQ12
DDRB_SDQ13
TYCO_292530-4
ME@
C200
2.2U_0805_10V6K
2
2
0.1U_0402_16V4Z
DDRB_SDM[0..7]
<8> DDRB_SDM[0..7]
DDRB_SDQ[0..63]
Title
DDRII-SODIMM1
Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet

E
14
of
46
FSLC
FSLB
FSLA
CLKSEL2
CLKSEL1
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
+3VS
166
33.3
100
33.3
1
<21,24,29> ICH_SMBDATA
Table : ICS954306
2
0_0805_5%
C343
C338
C336
C434
C335
C337
C472
2.2K_0402_5%
2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D_CK_SDATA
2
G
+CK_VDD_MAIN2
+3VS
C471
<21,44>
CLK_XTAL_IN
MCH_CLKSEL0 <7>
CLK_XTAL_OUT
R327
1K_0402_5%
VDDSRC
VDDSRC
VDDSRC
VDDSRC
30
36
VDDPCI
VDDPCI
12
VDDCPU
+CK_VDD_MAIN2
2
18
0.1U_0402_16V4Z
+CK_VDD_MAIN2
2
40
0.1U_0402_16V4Z
1
C477
1
C433
2N7002_SOT23
Q40
CLK_Rd
1
3
S
@ R456
56_0402_5%
1
D
2
G
+VCCP
20
19
<21> CLK_ICH_48M
CLK_ICH_48M
2
1
33_0402_5%
R553
@ 1K_0402_5%
CLK_ICH_14M
<21> CLK_ICH_14M
+VCCP
33_0402_5% 2
1
R132
0_0402_5%
CPU_BSEL1
R127
1K_0402_5%
2
1
<5>
1
R450
@
CLK_MCH_DREFCLK
1
<7> CLK_MCH_DREFCLK
R440
GM@
CLK_MCH_DREFCLK#
1
<7> CLK_MCH_DREFCLK#
R5401
GM@
<16> CLK_27M_VGA#
R534
@
CLK_PCI_ICH
<19> CLK_PCI_ICH
<16> CLK_27M_VGA
MCH_CLKSEL1 <7>
41
USB_48MHz/FSLA
45
FSLB/TEST_MODE/24Mhz
CLK_Rb
@ R120
0_0402_5%
2
CLK_Re
<44> CLK_ENABLE#
25
H_STP_PCI#
CPU_STOP#
24
H_STP_CPU#
CPUCLKT1LP
11
CLK_MCH_BCLK
CPUCLKC1LP
10
CLK_MCH_BCLK#
CPUCLKT0LP
14
CLK_CPU_BCLK
CPUCLKC0LP
13
CLK_CPU_BCLK#
SRCCLKT9LP
REF0/FSLC/TEST_SEL
34
PCICLK4/FCTSEL1
PCI_EC
33
32
CLK_ENABLE#
SRCCLKC9LP
SRCCLKT8LP
70
SRCCLKC8LP
69
27
SEL_PCI6/PCICLK1
CLKREQ8#
71
22
SEL_PCI5/REF1
SRCCLKT7LP
66
CLK_PCIE_SATA
SRCCLKC7LP
67
CLK_PCIE_SATA#
43
DOTT_96MHz/27MHz_Nonspread
CLKREQ7#/48Mhz_1
38
SATA_CLKREQ#
44
DOTC_96MHz/27MHz_spread
63
CLK_PCIE_EXP
SRCCLKC6LP
64
CLK_PCIE_EXP#
CLKREQ6#
62
EXP_CLKREQ#
SRCCLKT5LP
60
CLK_MCH_3GPLL
SRCCLKC5LP
61
CLK_MCH_3GPLL#
SRCCLKT6LP
ITP_EN/PCICLK_F0
VTT_PWRGD#/PD
16
SMBCLK
CLKREQ5#/PCICLK6
29
MCH_CLKREQ#
SRCCLKT4LP
58
CLK_PCIE_ICH
D_CK_SDATA
17
SMBDAT
SRCCLKC4LP
59
CLK_PCIE_ICH#
CLKREQ4#
57
D_CK_SCLK
R542
CLKIREF
R551
1K_0402_5%
R444
PCI_ICH
R555
@ 10K_0402_5%
PCI6
@ 10K_0402_5%
2
10K_0402_5%
2
PCI5
R557
CLK_ENABLE#
SRCCLKT3LP
55
CLK_PCIE_LAN
GNDSRC
SRCCLKC3LP
56
CLK_PCIE_LAN#
15
GNDCPU
CLKREQ3#/PCICLK5
28
CLKREQ_LAN#
21
GNDREF
SRCCLKT2LP
52
CLK_PCIE_WLAN
31
GNDPCI
SRCCLKC2LP
53
CLK_PCIE_WLAN#
35
GNDPCI
CLKREQ2#
26
W LAN_CLKREQ#
PCI5
42
GND48
SRCCLKT1LP
50
CLK_PCIE_VGA
SRCCLKC1LP
51
CLK_PCIE_VGA#
CLKREQ1#
46
LCD100/96/SRC0_TLP
47
CLK_MCH_SSCDREFCLK
48
CLK_MCH_SSCDREFCLK#
68
R549
@ R415
@ 10K_0402_5%
@ 10K_0402_5%
10K_0402_5%
10K_0402_5%
R537
R532
GNDSRC
LCD100/96/SRC0_CLP
@ 10K_0402_5%
PCI_MINI = FCTSEL1
FCTSEL1
(PIN34)
PCI_PME=SEL_PCI6
PIN43
PIN44
DOT96T
DOT96C
PIN47
PIN48
PCI6
PCI_MINI
R401
96/100M_T 96/100M_C
10K_0402_5%
1
5
27Mout
27MSSout
SRCT0
CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>
CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>
CLK_PCIE_SATA <20>
CLK_PCIE_SATA# <20>
SATA_CLKREQ# <21>
CLK_PCIE_EXP <24>
CLK_PCIE_EXP# <24>
EXP_CLKREQ# <24>
CLK_MCH_3GPLL <7>
MCH_CLKREQ# <7>
CLK_PCIE_ICH <21>
CLK_PCIE_ICH# <21>
CLK_PCIE_LAN <29>
CLK_PCIE_LAN# <29>
CLKREQ_LAN# <29>
CLK_PCIE_WLAN <23>
CLK_PCIE_WLAN# <23>
WLAN_CLKREQ# <23>
CLK_PCIE_VGA <16>
CLK_PCIE_VGA# <16>
SATA_CLKREQ#
2
1
R407
10K_0402_5%
CLKREQ_LAN#
2
1
@ R141
10K_0402_5%
CLK_MCH_SSCDREFCLK# <7>
W LAN_CLKREQ# 2
1
R140 WLAN@ 10K_0402_5%
EXP_CLKREQ#
2
1
R142
10K_0402_5%
MCH_CLKREQ#
1
2
R870
10K_0402_5%
+3VS
CLK_MCH_SSCDREFCLK <7>
GND
SLG8LP465VTR_QFN72
PIN27
CLKREQ5
PCICLK6
Compal Secret Data
2006/08/04
Issued Date
2006/10/06
Deciphered Date
SRCC0
CLK_MCH_3GPLL# <7>
l.c
73
R445
GND
PCI6
R448
+3VS
ITP
10K_0402_5%
+3VS
+3VS
1
CLK_Rf
+3VS
0_0402_5%
+3VS
@ R390
CLK_Rc
MCH_CLKSEL2 <7>
1
R399
0_0402_5%
CPU_BSEL2
<5>
<13,14,23> D_CK_SDATA
@ 1K_0402_5%
H_STP_CPU# <21>
SEL_24M/PCICLK2
39
Place near U4
H_STP_PCI# <21>
SEL_48M/PCICLK3
37
Place crystal within

500 mils of CK410
72
+VCCP
R547
8.2K_0402_5%
CLKREF1 2
1
27P_0402_50V8J
CLKREQ9#
<13,14,23> D_CK_SCLK
0.1U_0402_16V4Z 10U_0805_10V4Z
2
2
1
2
R865
0_0402_5%
PCI_SRC_STOP#
CPUCLKC2_ITP/SRCCLKC10LP
23
PCI5
2
0_0402_5%
MCH_DREFCLK
2
0_0402_5%
MCH_DREFCLK#
2
20_0402_5%
0_0402_5%
2 R392
1 PCI_ICH
33_0402_5%
C466
1
2
+3VS
1 FBM-L10-160808-301-T_0603
C485
FSB
PCI6
CPUCLKT2_ITP/SRCCLKT10LP
@ 1K_0402_5%
1
GNDA
X2
PCI_MINI
1 R545
X1
1 CLKREF1
33_0402_5%
R129
FSB
VDD48
FSA
<31> CLK_PCI_LPC
2
R418
VDDA
VDDREF
R408
CLK_Ra
U23
+CK_VDD_MAIN1
VGATE
CLK_ENABLE#
om
CLK_Re
1
R451
0_0402_5%
CLK_XTAL_OUT
Title

Clock generator
Size
Document Number
LA-3691P
Date:
ai
CLK_Ra CLK_Rb CLK_Rc
Y3
14.31818MHZ_20P_6X1430004201
CLK_XTAL_IN
tm
No Stuff
0.1U_0402_16V4Z
L19
1
49
54
65
CLK_Rd CLK_Rf
D_CK_SCLK
3
2N7002_SOT23
Q32
Stuff
R396
8.2K_0402_5%
FSA 2
1
0.1U_0402_16V4Z
ho
667MHz
1 27P_0402_50V8J
f@
ICH_SMBCLK
10U_0805_10V4Z
1
@ C474
Rev
0.1
in
CLK_Rd CLK_Re CLK_Rf
1
@ C463
C418
xa
CLK_Rd CLK_Re CLK_Rf

<21,24,29>
Stuff
No Stuff
CPU_BSEL0
C480 2
1
No Stuff
533MHz
<5>
2
0_0805_5%
*(Default)
1
R400
Sheet

1
he
Stuff
CPU Driven
+3VS
FSB Frequency Selet:
2
G
2.2K_0402_5%
Q34
2N7002_SOT23
1
R430
100
133
+3VS
R434
+CK_VDD_MAIN1
R552
15
of
46
<9> PCIE_MTX_C_GRX_N[0..15]
<9> PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
+1.5VS
+3VS
+2.5VS
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
+5VS
+1.8VS
<15> CLK_PCIE_VGA
<15> CLK_PCIE_VGA#
<18> VGA_DDCCLK
<18> VGA_DDCDATA
B+
<18> VGA_VSYNC
<18> VGA_HSYNC
<18> VGA_CRT_R
<18> VGA_CRT_G
<18> VGA_CRT_B
HRS_FX8-80P-SV1(92)
ME@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
C
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
+5VS
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
SUSP#
VGA_THER_ALERT#
SUSP#
<24,31,36,40,42,43>
VGA_THER_ALERT# <21>
+2.5VS
PM@
PM@
1
@
0.1U_0402_16V4Z
C458
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
0.1U_0402_16V4Z
C454
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
0.1U_0402_16V4Z
C176
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
VGA_ENBKL <17>
PLT_RST_BUF# <7,19,21,23,24,27,29>
CLK_27M_VGA <15>
CLK_27M_VGA# <15>
+3VS
HRS_FX8-80P-SV1(92)
ME@
PM@
C445
0.047U_0402_16V4Z
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
JP20
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
0.1U_0402_16V4Z
C174
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
MAX. 655mA @ 3.3V
C444
0.047U_0402_16V4Z
JP19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_P[0..15]
<9> PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
MAX. 130mA @ 2.5V
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
<9> PCIE_GTX_C_MRX_N[0..15]
MAX. 4.06A @ 1.8V
PM@
Title
5

VGA/B connector
Size
Document Number
Custom IEL10 LA-3451P
Date:
Sheet

1
16
Rev
0.2
of
46
LCD POWER CIRCUIT
INVERTER Conn.
+3VS
+3VALW
+LCDVDD
1
W=60mils
1
2
R270
1
GM@ 1K_0402_5%
Q29
SI2301BDS_SOT23
GM@
<31>
DAC_BRIG
BKOFF#
2
1+INVPWR_B+
L1
FBMA-L11-201209-221LMA30T_0805
+LCDVDD
0.047U_0402_16V7K
1 GM@
0.1U_0603_50V4Z
W=60mils
1
C334
4.7U_0805_10V4Z
2 GM@
1
2
3
4
5
6
7
MOLEX_53780-0790
ME@
C14
C330
Q39
DTC124EK_SC59
GM@
<9> GMCH_ENVDD
INVT_PWM
B+ <31>
C333
0.1U_0402_16V4Z
2 GM@
<9> GMCH_ENBKL
R69
<16> VGA_ENBKL
R72
2
2
ENBKL
1
GM@ 0_0402_5%
1
PM@ 0_0402_5%
ENBKL
<31>
2
G
1 2
GM@ Q6
2N7002_SOT23
JP3
C329
4.7U_0805_10V4Z
2 GM@
G
D
D
1
R271
100K_0402_5%
GM@
S
R90
470_0603_5%
GM@
R66
100K_0402_5%
LCD/PANEL BD. Conn.

ME@
ACES_87216-3006
<9> LVDS_A1#
<9> LVDS_A1
LVDS_A1#
LVDS_A1
<9> LVDS_A2#
<9> LVDS_A2
LVDS_A2#
LVDS_A2
LVDS_ACLK#
LVDS_ACLK
<9> LVDS_ACLK#
<9> LVDS_ACLK
2
+LCDVDD
1
GM@
+LCDVDD_L
(60 MIL)
L18
FBMA-L11-201209-221LMA30T_0805
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GNDGND
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JP16
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
32
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
LVDS_B0#
LVDS_B0
LVDS_B0# <9>
LVDS_B0 <9>
LVDS_B1#
LVDS_B1
LVDS_B1# <9>
LVDS_B1 <9>
<31>
LVDS_B2#
LVDS_B2
BKOFF#
BKOFF#
LVDS_B2# <9>
LVDS_B2 <9>
LVDS_BCLK#
LVDS_BCLK
LVDS_A0#
LVDS_A0
R6
LVDS_BCLK# <9>
LVDS_BCLK <9>
100K_0402_5%
LVDS_SDA
LVDS_SCL
31
<9> LVDS_A0#
<9> LVDS_A0
+3VS
Follow HEL80's pin definition

Except pin 29
<9>
<9>
LVDS_SCL
LVDS_SDA
R285
2.2K_0402_5%
GM@
2
GM@
R220
2.2K_0402_5%
2
1
+3VS
LVDS_SCL
LVDS_SDA
Date:
tm
ho
f@
LVDS & DVI Connector

Size
B
Document Number
Rev
0.1
in
Title
LA-3691P
xa
2007/8/18
Deciphered Date
he
2006/08/18
Issued Date
Compal Secret Data
ai
l.c
om
Sheet
1
17
of
46
CRT Connector
1
Place closed to chipset
1
1
R80
R93
<16> VGA_CRT_B
<9> GMCH_CRT_B
1
1
R79
R92
CRT_R_1
0_0402_5%
0_0402_5%
CRT_G_1
0_0402_5%
0_0402_5%
CRT_B_1
0_0402_5%
0_0402_5%
R8
RED
GREEN
BLUE
<16> VGA_CRT_G
<9> GMCH_CRT_G
2
2 PM@
GM@
2
2 PM@
GM@
2
2 PM@
GM@
1
1
R78
R91
<16> VGA_CRT_R
<9> GMCH_CRT_R
L2
BK1608LL121-T 0603
1
2
L3
BK1608LL121-T 0603
1
2
L4
BK1608LL121-T 0603
1
2
R9
R12
C15
150_0402_1%
C16
C17
1
1
150_0402_1%
C6
10P_0402_50V8J
2
@
2 @
2 @
2 @
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
150_0402_1%
C13
10P_0402_50V8J
2
@
+5VS
C12
10P_0402_50V8J
@
+CRT_VCC
D1
2
W=40mils
RB411DT146_SOT23-3
1
+CRT_VCC
2
0.1U_0402_16V4Z
2
R30
1
<9> GMCH_CRT_HSYNC
1
1K_0402_5%
2
FCM1608C-121T_0603
JVGA_HS
1
L6
2
FCM1608C-121T_0603
JVGA_VS
CRT_HSYNC_1
C10
10P_0402_50V8J
SN74AHCT1G125DCKR_SC70-5
<9> GMCH_CRT_VSYNC
OE#
2
R55
R56
2
R61
1
D
1
0_0402_5% GM@
2.2K_0402_5%
VGA_DDC_DAT
Q2
2N7002_SOT23
<9> GMCH_CRT_CLK
1
0_0402_5% GM@
<9> GMCH_CRT_DATA
1
R62
2.2K_0402_5%
R58
PM@
2
0_0402_5%
+3VS
2
<16> VGA_DDCDATA
+CRT_VCC
2.2K
R60
2.2K_0402_5%
VGA_DDC_CLK
Q3
2N7002_SOT23
<16> VGA_DDCCLK
2
0_0402_5%
PM@
10P_0402_50V8J
2
R64
@ C9
100P_0402_50V8J
GREEN
PIN ASSIGMENT
PIN D-SUB FUNCTION
1
9
+CRT_VCC
1
2
RED
3
6
GND
4
2
GREEN
5
GND
7
6
BLUE
3
7
8
GND
8
VSYNC
14
10
GND
9
HSYNC
13
SENSE
11
12
SM_DAT
10
15
SM_CLK
11
12
5
GND
4
SN74AHCT1G125DCKR_SC70-5
2.2K_0402_5%
R53
C11
RED
+3VS
2.2K
CRT_VSYNC_1
Update Footprint
U3
<16> VGA_VSYNC
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
1
R83
1
R84
JP1
2
0.1U_0402_16V4Z
C42
+CRT_VCC
+CRT_VCC
Place closed to chipset
C5
0.1U_0402_16V4Z
2
U2
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
1
R82
1
R81
<16> VGA_HSYNC
OE#
C34
1
L5
2 @ C8
2
68P_0402_50V8K
BLUE
JVGA_VS
JVGA_HS
VGA_DDC_DAT
VGA_DDC_CLK
PIN4
C7
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND1
GND2
ACES_87213-1200G
@
2 0.1U_0402_16V4Z ME@
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
Title
CRT & TV-OUT Connector

Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet

E
18
of
46
U29B
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
+3VS
2 8.2K_0402_5%
PCI_DEVSEL#
2 8.2K_0402_5%
PCI_STOP#
R281 1
2 8.2K_0402_5%
PCI_TRDY#
R101 1
2 8.2K_0402_5%
PCI_FRAME#
R111 1
2 8.2K_0402_5%
PCI_PLOCK#
R278 1
2 8.2K_0402_5%
P CI_IRDY#
R297 1
2 8.2K_0402_5%
PCI_SERR#
R107 1
2 8.2K_0402_5%
PCI_PERR#
R301 1
2 8.2K_0402_5%
PCI_PIRQA#
R128 1
2 8.2K_0402_5%
PCI_PIRQB#
R139 1
2 8.2K_0402_5%
PCI_PIRQC#
R99
R96
+3VS
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
C/BE0#
C/BE1#
C/BE2#
C/BE3#
B15
C12
D12
C15
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
C26
A9
B19
PCI_PLTRST#
CLK_PCI_ICH
PCI_PME#
G8
F7
F8
G7
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
D
PCI_REQ#5
P CI_IRDY#
PCI_RST# <31>
Place closely pin A9
CLK_PCI_ICH <15>
PCI_PME# <31>
CLK_PCI_ICH
2 8.2K_0402_5%
PCI_PIRQD#
R298 1
2 8.2K_0402_5%
PCI_PIRQE#
R300 1
2 8.2K_0402_5%
PCI_PIRQF#
R296 1
2 8.2K_0402_5%
PCI_PIRQG#
R121 1
2 8.2K_0402_5%
PCI_PIRQH#
R116 1
2 8.2K_0402_5%
PCI_REQ#0
R102 1
2 8.2K_0402_5%
PCI_REQ#1
R103 1
2 8.2K_0402_5%
PCI_REQ#2
R100 1
2 8.2K_0402_5%
PCI_REQ#3
R119 1
2 8.2K_0402_5%
PCI_REQ#4
R133 1
2 8.2K_0402_5%
PCI_REQ#5
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
A3
B4
C5
B5
Interrupt
PIRQA#
PIRQB#
PIRQC#
PIRQD#
I/F
GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#
R302
@ 10_0402_5%
PCI_REQ#0
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4# / GPIO22
GNT4# / GPIO48
GPIO1 / REQ5#
GPIO17 / GNT5#
PCI
R97
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AE5
AD5
AG4
AH4
AD9
MISC
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
AE9
AG8
AH8
F21
AH20
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
C371
@ 8.2P_0402_50V
MCH_ICH_SYNC# <7>
ICH7_BGA652~D
+3VS
C611
U21
NC7SZ08P5X_NL_SC70-5
PLT_RST_BUF# <7,16,21,23,24,27,29>
PCI_PLTRST#
B
0.1U_0402_16V4Z
R370
2
0_0402_5%
100K_0402_5%
1
@ R340
tm
f@
ICH8M(1/4)-PCI
Size
Document Number
LA-3691P
Date:
Rev
0.1
in
5
Title
ho
2007/8/18
xa
Deciphered Date
he
2006/08/18
Issued Date
ai
Compal Secret Data
l.c
om
Sheet
19
of
46
+RTCVCC
NC
IN
NC
OUT
+RTCVCC
D
R308 1
20K_0402_5%
+RTCVCC
R304
ICH_RTCRST#
ICH_INTVRMEN
SM_INTRUDER#
@ J2
1
ICH_INTVRMEN
<25> HDA_SYNC_AUDIO
<24> HDA_SYNC_MDC
<25> HDA_BITCLK_AUDIO
<24> HDA_BITCLK_MDC
<24> HDA_RST_MDC#
<25> HDA_SDOUT_AUDIO
<24> HDA_SDOUT_MDC
1
R363
1
R368
HD A_SYNC_ICH
2
33_0402_5%
2
33_0402_5% MDC@
1
R348
1
R349
HDA_BITCLK_ICH
2
33_0402_5%
2
33_0402_5% MDC@
1
R365
1
R364
HDA_RST_ICH#
2
33_0402_5%
2
33_0402_5% MDC@
1
R367
1
R366
HDA_SDOUT_ICH
2
33_0402_5%
2
33_0402_5% MDC@
SATA_ITX_C_DRX_P0 2
HDA_BITCLK_ICH
HD A_SYNC_ICH
HDA_RST_ICH#
<25> HDA_SDIN0
<24> HDA_SDIN1
HDA_SDOUT_ICH
INTVRMEN
INTRUDER#
W1
Y1
Y2
W3
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
SATA_ITX_DRX_P0
<27> SATA_DTX_C_IRX_N0
<27> SATA_DTX_C_IRX_P0
R702
R703
1
1
<15> CLK_PCIE_SATA#
<15> CLK_PCIE_SATA
ACZ_RST#
T2
T3
T1
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
1K_0402_5%
1K_0402_5%
AF7
AE7
AG6
AH6
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF1
AE1
SATA_CLKN
SATA_CLKP
2
2
FERR#
AG26
H_FERR#
GPIO49 / CPUPWRGD
AG24
H_PW RGOOD
IGNNE#
INIT3_3V#
INIT#
INTR
AG22
AG21
AF22
AF25
H_IGNNE#
RCIN#
AG23
KB_RST#
SMI#
NMI
AF23
AH24
H_SMI#
H_NMI
STPCLK#
AH22
H_STPCLK#
THERMTRIP#
AF26
THRMTRIP_ICH#
DA0
DA1
DA2
AH17
AE17
AF17
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
AE16
AD16
IDE_DCS1#
IDE_DCS3#
ACZ_SDOUT
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
+3VS
R5
AH10
AG10
1 R347
1 R346
1 R339
IDE_ DIORDY
IDE_IRQ
SATA_LED#
<27> IDE_DIORDY
<27>
IDE_IRQ
<27> IDE_DDACK#
<27> IDE_DIOW#
<27> IDE_DIOR#
IDE_ DIORDY AG16

IDE_IRQ
AH16
IDE_DDACK# AF16
IDE_DIOW#
AH15
IDE_DIOR#
AF15
SATARBIASN
SATARBIASP
IDE
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
1 R274 10K_0402_5%
GATEA20 <31>
H_A20M# <4>
@
H_INIT#
H_INTR
1 R361 0_0402_5%
+3VS
H_CPUSLP# <4,7>
1 R292 0_0402_5%
H_DPRSTP# <4,44>
H_DPSLP# <4>
56_0402_5% +VCCP
1
R356
H_FERR# <4>
H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT#
H_INTR
<4>
<4>
+VCCP
24.9_0402_1%
4.7K_0402_5% 2
8.2K_0402_5% 2
10K_0402_5% 2
LPC_FRAME# <31>
2
DPRSLP#
H_DPSLP#
ACZ_BCLK
ACZ_SYNC
AF3
AE3
AG2
AH2
R280
GATEA20
H_A20M#
LAN_TXD0
LAN_TXD1
LAN_TXD2
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
CLK_PCIE_SATA#
CLK_PCIE_SATA
AE22
AH28
LPC_FRAME#
H_CPUSLP_R#
LAN_RXD0
LAN_RXD1
LAN_RXD2
SATALED#
2
2
A20GATE
A20M#
SATA
C435 1000P_0402_50V7K
AB3
AF24
AH25
U5
V4
T5
AF18
SATA RX n/p need tie to GND when no used
LFRAME#
AG27
LAN_RSTSYNC
T4
LDRQ0#
LDRQ1# / GPIO23
AC3
AA5
CPUSLP#
LAN_CLK
U1
R6
AA6
AB5
AC4
Y6
TP1 / DPRSTP#
TP2 / DPSLP#
V3
U3
SATA_LED#
<27> SATA_LED#
C436 1000P_0402_50V7K
SATA_ITX_C_DRX_N0 2
SATA_ITX_DRX_N0
1
<27> SATA_ITX_C_DRX_N0
RTCRST#
W4
Y5
U7
V6
V7
close ICH7
<27> SATA_ITX_C_DRX_P0
AA3
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LAD0
LAD1
LAD2
LAD3
AC-97/AZALIA
<25> HDA_RST_AUDIO#
RTXC1
RTCX2
LAN
C392
1U_0603_10V4Z
1
2
LPC_AD[0..3] <31>
AB1
AB2
2
3MM
332K_0402_1%
U29A
ICH_RTCX2
RTC
C346
15P_0402_50V8J
2
1
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DDREQ
AE15
IDE_DDREQ
KB_RST# <31>
1
SM_INTRUDER#
H_SMI#
H_NMI
<4>
<4>
R293
56_0402_5%
H_STPCLK# <4>
1M_0402_5%
ICH_RTCX1
Y4
LPC
32.768K_1TJS125BJ4A421P
2
CPU
R291
R115
10M_0402_5%
2
1
C344
15P_0402_50V8J
2
1
1 R362
2
24.9_0402_1%
H_THERMTRIP# <4,7>
IDE_DA[0..2] <27>
IDE_DCS1# <27>
IDE_DCS3# <27>
IDE_DD[0..15] <27>
IDE_DDREQ <27>
B
ICH7_BGA652~D
BATT1.1
+RTCVCC
R118
1
2
W=20mils
BATT1
100_0603_1%
C345
1
0.1U_0402_16V4Z
+CHGRTC ML1220T13RE
45@
D9
RB751V-40TE17_SOD323-2
Compal Secret Data
2006/08/18
Issued Date
2007/8/18
Deciphered Date
5
Title

ICH8M(2/4)-LAN,IDELPC,RTC

Custom
Rev
0.1
LA-3691P
Date:
Sheet

1
20
of
46
Place closely pin B2
+3VS
R330
C22
B22
A26
B25
A25
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
I CH_RI#
A28
RI#
SB_SPKR
SUS_STAT#
ITP_DBRESET#
A19
A27
A22
SPKR
SUS_STAT#
SYS_RST#
+3V_STB
R312
1
2
8.2K_0402_5%
10K_0402_5%
R326 1
2 LINKALERT#
10K_0402_5%
R275 1
2 OCP#
<7> PM_BMBUSY#
<4>
OCP#
<15> H_STP_PCI#
<15> H_STP_CPU#
10K_0402_5%
R321 1
2 SB_SPI_CS#
OCP#
H_STP_PCI#
H_STP_CPU#
IDERST_CD#
<27> IDERST_CD#
PM_CLKRUN#
1K_0402_5%
R290 1
2 ICH_PCIE_WAKE#
8.2K_0402_5%
R272 2
1 ICH_LOW_BAT#
10K_0402_5%
@ R309 1
WL_ON
2
<23,24,29> ICH_PCIE_WAKE#
<31>
SERIRQ
<4,31> EC_THERM#
10K_0402_5%
R294 1
2 SPI_MOSI
<15,44>
VGATE
<16> VGA_THER_ALERT#
<31>
EC_SMI#
AB18
B23
AC20
AF21
VGA_THER_ALERT#
EC_SMI#
GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP
CLK14
CLK48
GPIO18 / STPPCI#
GPIO20 / STPCPU#
GPIO26
B21
E23
GPIO27
GPIO28
AG18
GPIO32 / CLKRUN#
AC19
U2
GPIO33 / AZ_DOCK_EN#
GPIO34 / AZ_DOCK_RST#
WAKE#
SERIRQ
THRM#
AD22
VRMPWRGD
AC21
AC18
E21
GPIO6
GPIO7
GPIO8
GPIO
ICH7_BGA652~D
AF19
AH18
AH19
AE19
AC1
B2
1 R289
2
100_0402_5%
CLK_ICH_14M
CLK_ICH_48M
SUSCLK
C20
ICH_SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
B24
D23
F22
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PWROK
AA4
ICH_POK
GPIO11 / SMBALERT#
A21
ICH_PCIE_WAKE# F20
SERIRQ
AH21
EC_THERM#
AF20
VGATE
GPIO0 / BM_BUSY#
GPIO
10K_0402_5%
R320 1
2 SPI_MISO
PM_BMBUSY#
SYS
<25>
SB_SPKR
PAD T41
<4> ITP_DBRESET#
10K_0402_5%
R317 1
2 ITP_DBRESET#
1
R313
R334
@ 10_0402_5%
@ 10_0402_5%
2
1
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
SATA
GPIO
<15,24,29> ICH_SMBCLK
U29C
Clocks
10K_0402_5%
1
10K_0402_5%
10K_0402_5%
2VGA_THER_ALERT#
2.2K_0402_5%
2
2.2K_0402_5%
+3V_STB
CLK_ICH_14M
R333
R310
SMB
R328 1
GM@
R325
POWER MGT
8.2K_0402_5%
R329 1
2 PM_CLKRUN#
10K_0402_5%
R311 1
2 SERIRQ
Place closely pin AC1
CLK_ICH_48M
+3V_STB
1
+3V_STB
C385
@ 4.7P_0402_50V8C
T44 PAD
PM_SLP_S3# <31>
PM_SLP_S4# <31>
PM_SLP_S5# <31>
TP0 / BATLOW#
C21
PWRBTN#
C23
PBTN_OUT#
LAN_RST#
C19
PLT_RST_BUF#
RSMRST#
Y4
EC_RSMRST#
R318 10K_0402_5%
1
2
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35 / SATAREQ#
GPIO38
GPIO39
AC22
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
@ 4.7P_0402_50V8C
CLK_ICH_14M <15>
CLK_ICH_48M <15>
@ R319
ICH_POK <7,31>
1
2 10K_0402_5%
PM_DPRSLPVR
1
2
PM_DPRSLPVR <7,44>
R105
100_0402_5%
ICH_LOW_BAT#
GPIO16 / DPRSLPVR
C395
PBTN_OUT# <31>
PLT_RST_BUF# <7,16,19,23,24,27,29>
EC_RSMRST# <31>
EC_SCI#
EC_SCI# <31>
ACIN
<31,38>
EC_LID_OUT#
PM_DPRSLPVR 2
1
@ R106
100K_0402_5%
EC_LID_OUT# <31>
CPUSB#
WL_ON
CPUSB#
SATA_CLKREQ#
SATA_CLKREQ# <15>
<24>
Need update symbol
NEW Card
WLAN
<23>
<23>
<23>
<23>
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
<29>
<29>
<29>
<29>
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
C107 2
C104 2
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
WLAN@
C101 2
1 0.1U_0402_10V7K
C99 2
1 0.1U_0402_10V7K
WLAN@
C97
C92
1 0.1U_0402_10V7K
1 0.1U_0402_10V7K
<35>
USB_OC#0
<24>
USB_OC#2
<35>
USB_OC#4
<35>
<35>
USB_OC#6
USB_OC#7
F26
F25
E28
E27
PERn1
PERp1
PETn1
PETp1
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2
H26
H25
G28
G27
PERn2
PERp2
PETn2
PETp2
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
K26
K25
J28
J27
PERn3
PERp3
PETn3
PETp3
M26
M25
L28
L27
PERn4
PERp4
PETn4
PETp4
P26
P25
N28
N27
PERn5
PERp5
PETn5
PETp5
T25
T24
R28
R27
PERn6
PERp6
PETn6
PETp6
SB_SPI_CS#
R2
P6
P1
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
P5
P2
SPI_MOSI
SPI_MISO
D3
C4
D5
D4
E5
C3
A2
B3
OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
SPI
2
2
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1
PCI-EXPRESS
LAN
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1
USB
DIRECT MEDIA INTERFACE
U29D
<24>
<24>
<24>
<24>
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V26
V25
U28
U27
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y26
Y25
W28
W27
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA28
AA27
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD25
AD24
AC28
AC27
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_CLKN
DMI_CLKP
AE28
AE27
CLK_PCIE_ICH#
CLK_PCIE_ICH
C25
D25
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USBRBIAS#
USBRBIAS
D2
D1
USBRBIAS
DMI_ZCOMP
DMI_IRCOMP
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
<7>
<7>
<7>
<7>
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
<7>
<7>
<7>
<7>
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
<7>
<7>
<7>
<7>
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
<7>
<7>
<7>
<7>
USB_OC#3
USB_OC#1
USB_OC#5
USB_OC#7
USB_OC#4
USB_OC#0
USB_OC#6
RP27
4
USB_OC#2 3
2
1
5
6
7
8
+3V_STB
10K_1206_8P4R_5%
CLK_PCIE_ICH# <15>
CLK_PCIE_ICH <15>
R332 24.9_0402_1%
1
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
Within 500 mils

+1.5VS
<35>
<35>
<23>
<23>
<24>
<24>
<23>
<23>
<35>
<35>
<28>
<28>
<35>
<35>
<35>
<35>
USB
BT
New Card
WLAN
USB
Card Reader
USB
USB
R322 22_0402_1%
1
2
A
Within 500 mils
tm

f@
ICH8M(3/4)-USB,GPIO,PCIE
Custom
LA-3691P
Date:
Rev
0.1
in
Title
xa
2007/8/18
Deciphered Date
he
2006/08/18
ho
Compal Secret Data
Issued Date
ai
l.c
om
ICH7_BGA652~D
Sheet
21
of
46
+VCCP
U29F
F6
0.1U_0402_16V4Z
+5VS
+3VS
2
C340
220U_B2_2.5VM_R35
R295
C379
C348
0.1U_0402_16V4Z
RB751V-40TE17_SOD323-2
0.1U_0402_16V4Z
C339
D15
100_0402_5%
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
ICH_V5REF_RUN
1
@C362
2
0.1U_0402_16V4Z
Place closely pin

D28,T28,AD28.
C361
0.1U_0402_16V4Z
+5VALW +3V_STB
D16 @
R303
RB751V-40TE17_SOD323-2
2
10_0402_5%
ICH_V5REF_SUS
C376
0.1U_0402_16V4Z
+3VS
C352
0.1U_0402_16V4Z
Place closely pin AG28 within 100mlis.

+1.5VS_DMIPLLR
R277
2
1
2
0_0805_5%
C375
+1.5VS
1
+3V_STB
C372
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C399
0.01U_0402_16V7K
0.5_0805_1%
+1.5VS_DMIPLL
B27
R299
+3VS
1
+1.5VS
C380
0.1U_0402_16V4Z
+1.5VS
C377
1U_0603_10V4Z
Place closely pin AG9.
1
+1.5VS
2
+1.5VS_DMIPLL
Place closely pin AG5.

C381
0.1U_0402_16V4Z
C382
10U_0805_10V4Z
+1.5VS
C374
0.1U_0402_16V4Z
1
T47
T45
PAD
PAD
ICH_AA2
IC H_Y7
+3V_STB
1
Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]
Vcc3_3 / VccHDA
U6
VccSus3_3/VccSusHDA
R7
Vcc3_3[1]
VccDMIPLL
AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5
Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9
Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
V5
V1
W2
W7
V5REF_Sus
AG28
AA2
Y7
V5REF[2]
VccSus1_05/VccLAN1_05[1]
V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]
AE23
AE26
AH26
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
VccRTC
W5
VccSus3_3[1]
P7
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
A24
C24
D19
D22
G19
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
0.1U_0402_16V4Z
1
C363
AB17
AC17
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
T7
F17
G17
Vcc1_5_A[24]
Vcc1_5_A[25]
AB8
AC8
C357
+ C351
+3VS
1
+VCCP
+3V_STB
C355
1
2
C353
0.1U_0402_16V4Z
1
2
C401
0.1U_0402_16V4Z
C359
4.7U_0805_10V4Z
+3VS
C386
0.1U_0402_16V4Z
C391
0.1U_0402_16V4Z
+3V_STB
C378
0.1U_0402_16V4Z
+3V_STB
C398
0.1U_0402_16V4Z
+1.5VS
VccSus1_05[1]
K7
VccSus1_05[2]
VccSus1_05[3]
C28
G20
ICH_C28
ICH_G20
A1
H6
H7
J6
J7
PAD
PAD
T46
T15
T43
+1.5VS
1
C403
0.1U_0402_16V4Z
A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
ICH7_BGA652~D
A
ICH7_BGA652~D
C383
0.1U_0402_16V4Z
Compal Secret Data

2006/08/18
Issued Date
Deciphered Date
2007/8/18
4
0.1U_0402_16V4Z
+RTCVCC
C356
0.1U_0402_16V4Z
1
2
+3VS
1
C349 0.1U_0402_16V4Z
ICH_K7
PAD
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
220U_B2_2.5VM_R35
1U_0603_10V4Z
Vcc1_5_A[19]
Vcc1_5_A[20]
C373
0.1U_0402_16V4Z
ICH_V5REF_SUS
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
C384
0.1U_0402_16V4Z
+1.5VS
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
C354
0.1U_0402_16V4Z
AD17
U29E
V5REF[1]
C350
0.1U_0402_16V4Z
G10
C388
0.1U_0402_16V4Z
ICH_V5REF_RUN
Title
IFTXX M/B LA-3541P Schematic

Custom
R ev
0.1
LA-3691P
Date:
Sheet
1
22
of
46
Mini-Express Card for 3G Or TV Tuner

Mini-Express Card for WLAN
+3VS_WLAN
+1.5VS
+3V_WLAN
C365
WLAN@
4.7U_0805_10V4Z
C370
WLAN@
0.1U_0402_16V4Z
C364
WLAN@
4.7U_0805_10V4Z
C369
WLAN@
0.1U_0402_16V4Z
C368
WLAN@
0.01U_0402_25V7K
C367
WLAN@
0.1U_0402_16V4Z
1
+3VS
JP18
<15> CLK_PCIE_WLAN#
<15> CLK_PCIE_WLAN
<21> PCIE_PTX_C_IRX_N2
<21> PCIE_PTX_C_IRX_P2
<21> PCIE_ITX_C_PRX_N2
<21> PCIE_ITX_C_PRX_P2
2005/09/27 modified.
Base on OPTION GTM351E Datasheet Rev0.1
53
Vcc 3.3V +/- 8%

Peak Icc 2750mA
with max supply droop 50mA
Average Icc 1000mA
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
+3VS_WLAN
R871 1
2 0_0805_5%
WLAN@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
47K
+3VS
+1.5VS
10K
DTA114YKAT146_SOT23-3
Q41
WLAN@
+3V_WLAN
WL_OFF#
WL_OFF# <31>
PLT_RST_BUF#
PLT_RST_BUF# <7,16,19,21,24,27,29>
1
2
+3VALW
@ R873 1
2 0_0402_5% +3VS
R874
WLAN@
0_0402_5%
WLAN_LED#
WLAN_BLUE_LED# <34>
D_CK_SCLK <13,14,15>
D_CK_SDATA <13,14,15>
USB20_N3 <21>
USB20_P3 <21>
2 0_0402_5%
WLAN_LED#
@ R5001
(WWAN_LED#)
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
0_0402_5%
0_0402_5%
2
2
2
G
@ R288
1
+5VS
100K_0402_5%
R875
100K_0402_5%
WLAN@
2
FOX_AS0B226-S56N-7F
ME@
Q43
2N7002KW_SOT323-3
WLAN@
<15> WLAN_CLKREQ#
@ R306 1
@ R305 1
ICH_PCIE_WAKE#
BT_ACTIVE
WLAN_ACTIVE
W LAN_CLKREQ#
1 2
+5VS
R98
10K_0402_1%
BT@
Q9
DTC114EKA_SC59-3
BT@
<31>
BT MODULE CONN
BT_OFF#
+3VS
Q8 BT@
+3VS_BT
C60
3
AO3413_SOT23
BT@
1
0.1U_0402_16V4Z
G
BT_LED#
JP6
<34>
<21>
<21>
Q7
DTC124EK_SC59
BT@
R94
10K_0402_5%
BT@
USB20_N1
USB20_P1
USB20_N1
USB20_P1
BTON_LED
BT_ACTIVE
WLAN_ACTIVE
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
GND1
GND2
MOLEX_53780-0870
ME@
tm
Size
f@
Mini-Card/3G/FeliCa/FP
Document Number
LA-3691P
Date:
Rev
0.1
in
Title
xa
2007/08/05
Deciphered Date
Sheet

E
he
2006/08/05
Issued Date
ho
Compal Secret Data
ai
l.c
om
23
of
46
+1.5VS_CARD1
Imax = 0.75A
C202
Express Card Power Switch

2
C222
1
0.1U_0402_16V4Z
U11
12
14
+3VS
2
C223
2
C212
<7,16,19,21,23,27,29> PLT_RST_BUF#
1
0.1U_0402_16V4Z
17
1
0.1U_0402_16V4Z
PLT_RST_BUF# 6
SYSON
<31,36,42> SYSON
SUSP#
<16,31,36,40,42,43> SUSP#
2 R200
+3VALW
<21>
1
CPUSB#
CPUSB#
2
4
+3VALW
100K_0402_5%
1.5Vin
1.5Vin
1.5Vout
1.5Vout
AUX_IN
+3VS_CARD1
AUX_OUT
15
+3VALW_CARD1
OC#
19
USB_OC#2
PERST#
3.3Vout
3.3Vout
SYSRST#
20
SHDN#
STBY#
NC
10
CPPE#
GND
9
18
+1.5VS_CARD1
11
13
3
5
3.3Vin
3.3Vin
PERST#
C201
New Card Socket (Left/TOP)

1
JP9
10U_0805_10V4Z
+1.5VS
0.1U_0402_16V4Z
40mil
<21>
<21>
60mils
+3VS_CARD1
C213
USB_OC#2 <21>
10U_0805_10V4Z
C214
0.1U_0402_16V4Z
CPUSB#
+1.5VS_CARD1
Imax = 1.35A
40mil
USB20_N2
USB20_P2
+3VALW_CARD1
PERST#
+3VS_CARD1
16
<15> EXP_CLKREQ#
<15> CLK_PCIE_EXP#
<15> CLK_PCIE_EXP
CPUSB#
CPUSB#
+3VALW_CARD1
RCLKEN
Imax = 0.275A
R5538_QFN20
@ C210
10U_0805_10V4Z
C211
0.1U_0402_16V4Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND
GND
GND
29
30
FOX_1CH4110C
ME@
(NEW)
2
MDC CONN.
C559
1
JP10
<20> HDA_SDOUT_MDC
MDC@ HDA_SYNC_MDC
R474 1
2AZ_SDIN3
HDA_RST_MDC#
33_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
1U_0805_25V4Z
+3V_STB
HDA_BITCLK_MDC <20>
R475
10K_0402_5%
ACES_88018-124G
ME@
Connector for MDC Rev1.5

MDC@
R481
10_0402_5%
@
2
13
14
15
16
17
18
GND
GND
GND
GND
GND
GND
<20> HDA_SYNC_MDC
<20> HDA_SDIN1
<20> HDA_RST_MDC#
1
3
5
7
9
11
MDC@
C560
22P_0402_50V8J
@
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
Title
NEW CARD & USB Connector

Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet

E
24
of
46
+VDDA
1
AC97 Codec
28.7K for Module Design (VDDA = 4.702)
+5VS
1U_0603_10V4Z
CNOISE
GND
+VDDA
2
SD
4.85V
1
R493
150K_0603_1%
1
C578
C278
10U_0805_10V4Z
1
EAPD 2
G
2
560_0402_5%
ERROR
SENSE or ADJ
(output = 250 mA)
40mil
C573
680P_0402_50V7K
LINE_OUTL
C572
680P_0402_50V7K
LINE_OUTR
R492
51K_0603_1%
0.1U_0402_16V4Z
R227
1 1
SI9182DH-AD_MSOP8
R230
10K_0402_1%
C273
2
Q26
2SC2411KT146_SOT23-3
2
B
560_0402_5%
1U_0603_10V4Z
<21> SB_SPKR
DELAY
R229
10K_0402_1%
C267
@ 0.1U_0402_16V4Z
R236
1 1
VOUT
C279
2
BEEP#
2
R239 20K_0402_5%
10U_1206_10V4Z
VIN
2MONO_IN1
R238 20K_0402_5%
C567
10U_0805_10V4Z
2 470P_0402_50V7K
C271 1U_0603_10V4Z
2
1 MONO_IN
+VDDA
C272
1
R245
10K_0402_1%
1
U15
60mil
1U_0603_10V4Z
<31>
+5VAMP
L17
1
2
FBMA-L11-201209-221LMA30T_0805
1
2
L16 @
1
FBMA-L11-201209-221LMA30T_0805
C280
1C285
R242
10K_0402_1%
D11
@Q24
BSS138LT1G_SOT23-3
SUB WOOFER SUPPORT
R231
RB751V_SOD323
ALC262
@ 10K_0402_5%
+MIC2_VREFO
+MIC1_VREFO_L
+AUD_VREF
ALC861D
Window mode
Driver initial
DOS mode
ACPI
10mil
@
C561
0.1U_0402_16V4Z
GNDA
RST
10mil
@
C263
0.1U_0402_16V4Z
GNDA
10mil
@
C264
0.1U_0402_16V4Z
GNDA
+VDDC
R218
CHB1608U301_0603
1
2
+AVDD_AC97
DOS mode
RST
<26>
<26>
HP_L
<26>
HP_R
INT_MIC
HP_L
1
2
C549
4.7U_0603_6.3V6K
HP_R
1
2
C552
4.7U_0603_6.3V6K
1
2
C553
2.2U_0603_6.3V6K
1
2
C556
2.2U_0603_6.3V6K
EC_MUTE
<26>
12sec
EXT_MIC1
C563
1
C564
EXT_MIC
C_MIC
2
2.2U_0603_6.3V6K
2
2.2U_0603_6.3V6K
MONO_IN
+3VS
EAPD
R213 1
R212 1
<20> HDA_RST_AUDIO#
1
GPIO
<26> JACK_PLUG_MIC
2
0_0603_5%
1
R482
2
0_0603_5%
EAPD
C_LINE_OUTL
15
LINE2_R
FRONT_OUT_R
36
C_LINE_OUTR
16
MIC2_L
SURR_OUT_L
39
C_HP_OUTL
17
MIC2_R
SURR_OUT_R
41
C_HP_OUTR
23
LINE1_L
SIDESURR_OUT_L
45
24
LINE1_R
SIDESURR_OUT_R
46
18
CD_L
CEN_OUT
43
20
CD_R
LFE_OUT
44
19
CD_GND
BIT_CLK
SDATA_IN
MIC1_L
22
MIC1_R
12
PCBEEP
11
RESET#
GPIO
R467
2 20K_0402_1%
JACK_PLUG 1
EAPD
L37
2 R232
39.2K_0402_1%
2
0_0603_5%
NC
37
NC
29
LINE2_VREFO
31
MIC1_VREFO_L
28
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
JDREF
40
SYNC
SDATA_OUT
2
3
13
34
GPIO0
GPIO1
SENSE A
SENSE B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
NC
33
AVSS1
AVSS2
26
42
1
C566
1
C565
1
C557
1
C551
2
@ 1000P_0402_50V7K
2
@ 1000P_0402_50V7K
LINE_OUTL
2
1U_0603_10V4Z
LINE_OUTR
2
1U_0603_10V4Z
HP_L
2 @
1U_0603_10V4Z
HP_R
2 @
1U_0603_10V4Z
LINE_OUTL <26>
LINE_OUTR <26>
R216 1
C256 1
2
@ 22_0402_5%
2 22P_0402_50V8J
@
HDA_BITCLK_AUDIO
250_SDIN
10mil
10mil
10mil
2
R471
1
R228
R215 1
2
33_0402_5%
HDA_BITCLK_AUDIO <20>
HDA_SDIN0
HDA_SDIN0 <20>
+MIC1_VREFO_L
+AUD_VREF
+MIC2_VREFO
2
1
C270
10U_0805_10V4Z
1
20K_0402_1%
2
+VDDA
@ 10K_0402_5%
ALC861-VD-GR_LQFP48
om
1
R466
<26,31>
35
tm

ALC861 VD Codec
f@
Title

Date:
Rev
0.2
in
2006/10/06
Deciphered Date
xa
2006/08/04
Issued Date
he
GNDA
ho
Compal Secret Data
GND
ai
l.c
2
0_0603_5%
R217
10K_0402_1%
1
R463
<26> JACK_PLUG
FRONT_OUT_L
<20> HDA_SDOUT_AUDIO
R214
10K_0402_1%
@
C261
LINE2_L
10
<20> HDA_SYNC_AUDIO
2 0_0402_5% @
2 0_0402_5%
C262
14
21
C259
0.1U_0402_16V4Z
U13
C258
+3VS
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
C260
2
0.1U_0402_16V4Z
C257
DVDD2
DOS mode
C555
DVDD1
C569
10U_0805_10V4Z
38
0.1U_0402_16V4Z
1
1
25
L40
CHB1608U301_0603
1
2
+VDDA
AVDD2
12sec
AVDD1
EC_MUTE
Sheet
E
25
of
46
+3VS
APA2056 SPK/HP Amplifier
+5VAMP
L44 BLM15BB121SN1D_0402
1
2
R254 1
1 R247
2
0_0402_5% INR_A
3
5
1 R243
2 INL_A
0_0402_5%
AMP_EN#27
2 100K_0402_5%
R226 1
2 100K_0402_5%
<25> LINE_OUTL
+5VAMP
HP_L
SET/SD
28
BEEP
12
14
CP+
CP-
25
BIAS
19
1
HP_R
HP_L
17
18
HP_ROUT
HP_LOUT
CVSS
VSS
15
16
GND
PGND
PGND
CGND
2
23
7
13
GND
29
Speaker
Speaker
Headphone
20mil
1
1
1
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
2
2
2
SPK_L1+
SPK_L1SPK_R1+
SPK_R1-
4
3
2
1
Speaker Conn.
1
CVSS
2
1
C268
1U_0402_6.3V4Z
4 GND
3 GND
2
1
JP2
6
5
22P_0402_50V8J
AMP_CP+
AMP_CP2
1U_0402_6.3V4Z
AMP_BIAS
2.2U_0603_6.3V6K
1
0.1U_0402_16V4Z
26
SPKL+
SPKL-
R5
R4
R3
R2
22P_0402_50V8J
C288
INR_H
INL_H
LOUT+
LOUT-
8
9
SPKL+
SPKLSPKR+
SPKR-
22P_0402_50V8J
C282
4
6
SPKR+
SPKR-
22P_0402_50V8J
C269
INR _H
2
INL_H
39K_0402_5%
2
39K_0402_5%
VOL_AMP
22
21
@ C1
HP_L
1
R491
1
R488
HP EN
ME@
ACES_87213-0400G
ROUT+
ROUT-
@ C2
<25>
HP_R
24
@ C3
HP_R
/AMP EN
HP_EN
9/5 ANPEC Suggest

Place 1U cap between pin 1 and 2
@ C4
<25>
INR_A
INL_A
1U_0402_6.3V4Z
<25> LINE_OUTR
C290
VDD
CVDD
U16
20
10
R240 @ 1.5K_0402_1%
1
2
R253 @ 1.5K_0402_1%
1
2
fo=1/(2*3.14*R*C)=106Hz
R=1.5K / C= 1uF
PVDD
PVDD
11
C275
HVDD
C277
10U_0805_10V4Z
0.1U_0402_16V4Z
W=40mil
R1
0_0402_5%
@
APA2057RI-TRL_TSSOP28
IN_A Gain = 10dB (Internal Speaker)

IN_H Gain = 0dB (Headphone)
+5VAMP
1
EXT MIC
R877
51K_0402_5%
1
@
R465
<25> JACK_PLUG_MIC
3K_0402_5%
2
C612
2
G
@ Q44
EC_MUTE#
Audio Jack
VOL_AMP
D
0.1U_0402_16V4Z
1
0_0402_5%
2
R233
+MIC1_VREFO_L
R505
120K_0402_5%
EC_MUTE#
EC_MUTE#
1
@ 0_0402_5%
<31>
2
R234
EAPD
2N7002_SOT23
<25,31> EAPD
<25>
EXT_MIC
EXT_MIC
JACK_PLUG_MIC
+AUD_VREF
EXT_MIC_L-2
1
2
L36 FBM-11-160808-700T_0603
C542
47P_0402_50V8J
JP27
1
EXT_MIC_L-2
C547
GNDA
2
GNDA
JACK_PLUG_MIC
@
10P_0402_50V8J
1
3
5
7
9
11
13
15
17
1
3
5
7
9
11
G1
G3
G5
2
4
6
8
10
12
G2
G4
G6
2
4
6
8
10
12
14
16
18
PL-OUT
PR-OUT
3
JACK_PLUG
ACES_88028-1210M
ME@
JACK_PLUG
<25> JACK_PLUG
1
R473
1K_0402_5%
+MIC2_VREFO
INT MIC
PR-OUT
PL-OUT
1
2
L39 FBM-11-160808-700T_0603
R480
1K_0402_5%
GNDA
GNDA
2
HP_LOUT
L38 FBM-11-160808-700T_0603
1
2
R476 47_0402_5%
1
2
R477 47_0402_5%
1
2
HP_ROUT
C546
End or Begain
2 GNDA
C548
10P_0402_50V8J
R490
3K_0402_5%
2
MIC1
1
2
WM-64PCY_2P
45@
INT_MIC
1
C574
47P_0402_50V8J
2
GNDA
2006/08/05
Issued Date
Compal Secret Data
2007/08/05
Deciphered Date
A
@
10P_0402_50V8J
INT_MIC <25>
GNDA
Title
AMP/VR/Audio Jack/MIC

Custom
LA-3691P
Date:
Rev
0.1
Sheet
Monday, May 21, 2007

E
26
of
46
C247
C248
1
C249
0.1U_0402_16V4Z
C540
<20> IDE_DD[0..15]
<20> IDE_DA[0..2]
C541
IDE_DD[0..15]
1U_0603_10V4Z
C296
C295
10U_0805_10V4Z
1
C299
1
@C302
C300
IDE_DA[0..2]
1000P_0402_50V7K
1000P_0402_50V7K
+5VS
@
10U_0805_10V4Z
0.1U_0402_16V4Z
Placea caps. near ODD CONN.
+5VS
1U_0603_10V4Z
2
10U_0805_10V4Z
10U_0805_10V4Z
SATA HDD Conn.

JP14
<20> SATA_ITX_C_DRX_P0
<20> SATA_ITX_C_DRX_N0
JP28
R314
R287
<21> IDERST_CD#
19,21,23,24,29> PLT_RST_BUF#
2@
2
1
1
0_0402_5%
33_0402_5%
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
IDE_DIOW#
IDE_ DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
<20> IDE_DIOW#
<20> IDE_DIORDY
<20> IDE_IRQ
2
+5VS
R209
<20> IDE_DCS1#
100K_0402_5%
R206
+5VS
2
470_0402_5%
IDE_CSEL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
<20> SATA_DTX_C_IRX_N0
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
<20> SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_P0
1
C312
1
C311
SATA_DTX_IRX_N0
2
1000P_0402_50V7K
SATA_DTX_IRX_P0
2
1000P_0402_50V7K
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
IDE_DDREQ <20>
IDE_DIOR# <20>
+5VS
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
SATA_DTX_C_IRX_N0
1
2
3
4
5
6
7
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
IDE_DDACK# <20>
2 R210
+5VS
100K_0402_5%
IDE_DCS3# <20>
+5VS
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
SUYIN_127043FB022S338ZR_RV
ME@
OCTEK_CDR-50DY1G
ME@
(NEW)
Change Library
(NEW)
IDE_CSEL
Grounding for Master (When use SATA HDD)
Open or High for Slaver (Normal)
GND
A+
AGND
BB+
GND
U12
<20>
SATA_LED#
IDE_LED#
SATA_LED#
DRIVE_LED#
DRIVE_LED# <32>
4
Document Number
LA-3691P
Date:
G
tm
ho
HDD & ODD Connector

Size
B
f@
Title
Rev
0.1
in
2007/8/18
Deciphered Date
xa
2006/08/18
he
Issued Date
Compal Secret Data
ai
l.c
om
DAP202U_SOT323-3
Sheet
27
H
of
46
1U_0603_16V4Z
CARD@
C526
0_0402_5%
2
C531 1
0.1U_0402_16V4Z
CARD@
C580
1
R438
1
CARD@
0.1U_0402_16V4Z
CARD@
2
U25 CARD@
Used 9701 by 10K

SDPW R0_MSPWR 1
1
3
7
9
11
33
R454
0_0402_5%
2
CARD@
AV_PLL
A3V3
A3V3
CARD_3V3
D3V3
D3V3
C523
VREG
CF_DMACK#
CF_CS0#
10
22
30
XD_CLE/CF_SP19
XD_CE#/CF_D11_SP18
XD_ALE/CF_D4_SP17
SD_DAT2/XD_RE#/CF_D12_SP16
SD_DAT3/XD_WE#/CF_D5_SP15
XD_RDY/CF_D13_SP14
SD_DAT4/XD_WP#/CF_D6_SP13
SD_DAT5/XD_D0/CF_D14_SP12
SD_CLK/XD_D1/MS_CLK/CF_D7_SP11
SD_DAT6/XD_D7/MS_D3/CF_D15_SP10
MS_INS#/CF_IORD#_SP9
SD_DAT7/XD_D2/MS_D2/CF_IOWR#_SP8
SD_DAT0/XD_D6/MS_D0/CF_RST#_SP7
SD_DAT1/XD_D3/MS_D1/CF_IORDY_SP6
XD_D5/MS_BS/CF_A2_SP5
CF_A1/XD_D4_SP4
CF_A0/SD_CD#_SP3
CF_D0/SM_WPM#/XD_WP_SP2
CF_D1/XD_CD#_SP1
CF_D8/SM_CD#_SP0
43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18
CARD@
R495 1
+5VS
+5VALW
@ R496 1
2 0_0402_5%
2 0_0402_5% 1
RST#
MODE SEL
XTLI
XTLO
C532
0.1U_0402_16V4Z
CARD@
<21>
<21>
USB20_N5
USB20_P5
USB20_N5
USB20_P5
VBUS
RST#
MODE_SEL
XTLI
XTLO
4
5
14
DM
DP
GPIO0
RST#
C514
CARD@
1U_0402_6.3V4Z
R447
6.19K_0402_1%
CARD@
RREF
12
32
DGND
DGND
6
46
AGND
AGND
1
C
CF_CD#
CF_DMARQ
13
24
CF_D10
CF_D9
CF_D2
SD_CMD
15
16
17
36
2
1U_0603_16V4Z
CARD@
3 in 1 Card Reader
JP26
+VCC_3IN1
SD_DATA2
SD_DATA3
CARD@
R446 1
SD_MS_CLK
2 22_0402_5%
MS_DATA3_SD_DATA6
MSCD#
MS_DATA2_SD_DATA7
SD_MS_DATA0
SD_MS_DATA1
MSBS
SD_MS_DATA0
SD_MS_DATA1
SD_DATA2
SD_DATA3
SD_MS_CLK
SDW P#
SDCMD
S DCD#
R458 1
CARD@
2 22_0402_5%
SDCLK
SD_MS_DATA1
S DCD#
SDW P#
SD_MS_CLK
MSCD#
SD_MS_DATA0
MSBS
MS_DATA3_SD_DATA6
MS_DATA2_SD_DATA7
MSCLK
SDCMD
6
9
10
2
3
7
11
4
1
5
8
VDD_SD
DAT0_SD
DAT1_SD
DAT2_SD
CD/DAT3_SD
CLK_SD
WP_SD
CMD_SD
CD_SD
VSS_SD
VSS_SD
19
13
14
16
18
20
15
17
21
12
22
23
VCC_MS
VCC_MS
SCLK_MS
INS_MS
SDIO_MS
BS_MS
RESERVED_MS
RESERVED_MS
VSS_MS
VSS_MS
GND
GND
PROCO_MDR019-C0-1202
ME@
RTS5158-GR_LQFP48_7x7
R433
0_0402_5%
CARD@
R437
100K_0402_5%
CARD@
8
44
45
47
48
2
CARD@
+VCC_3IN1
10_0402_5%
@
XTLO
C515
18P_0402_50V8J
CARD@
GND
RT9701CB_SOT25
2 @
1
1
R459
10_0402_5%
@
C536
10P_0402_50V8J
@
@
C537
10P_0402_50V8J
R501
100K_0402_5%
CARD@
1
5
R462
150K_0402_5%
12MHZ_16P_6X12000012
VIN
VOUT
VIN/CE VOUT
CARD@ C538
1U_0603_10V4Z
Y2
CARD@
R436
10K_0402_5%
CARD@
C513
0.1U_0402_16V4Z
@
3
4
SDPW R0_MSPWR
C535
0.1U_0402_16V4Z
18P_0402_50V8J
CARD@
C511
R457
40mil
@ U26
XTLI
+3VS
MODE SEL
0_0402_5%
R497
reserved power circuit
Compal Secret Data
Issued Date
2006/08/04
Deciphered Date
2006/10/06
5
Title

1394+3 in 1 Card

Custom LA-3691P
Date:
R ev
0.1
Sheet
1
28
of
46
Layout Notice : 1.2V filter. Place as close

chip as possible.
U30 C test change to 3413

@ L15
FBM-L11-321611-260-LMT_1206
1
2
Layout Notice : Place as close

chip as possible.
+1.2V_LAN
2
1
L31 FBM-L11-160808-601LMT_0603
2
C450
0.1U_0402_16V4Z
33K_0402_5%
1
+LAN_AVDD
2
<31>
C449
0.1U_0402_16V4Z
1
EN_WOL
EN_WOL 2
G
Q11
2N7002_SOT23
+LAN_BIASVDD
2
1
L29 FBM-L11-160808-601LMT_0603
1
C455
(CLKREQ#) and (ENERGY_DET) are
only supported in BCM5787M
0.1U_0402_16V4Z
<15> CLK_PCIE_LAN#
28
PCIE_REFCLK_N
<15> CLK_PCIE_LAN
29
PCIE_REFCLK_P
11
CLKREQ
<15> CLKREQ_LAN#
1
R426
+AVDDL
+3VS
C451
0.1U_0402_16V4Z
R371
+3VALW_VDDIO
R380
TRD0_N
TRD0_P
TRD1_N
TRD1_P
TRD2_N
TRD2_P
TRD3_N
TRD3_P
2
4.7K_0402_5%
3
C439
4.7U_0805_6.3V6K
CBE#1 53
2
1K_0402_5%
2
1K_0402_5%
54
41
40
42
43
48
47
49
50
LAN_TX0LAN_TX0+
LAN_RX1LAN_RX1+
LAN_TX2LAN_TX2+
LAN_TX3LAN_TX3+
LOW PWR
VMAIN_PRSNT
VAUX_PRSNT
C459
4.7U_0805_6.3V6K
GPHY_PLLVDD
32
PCIE_RXD_N
31
PCIE_RXD_P
25
PCIE_TXD_N
26
PCIE_TXD_P
10
PERST
12
WAKE
0.1U_0402_10V7K
+PCIE_PLLVDD
0.1U_0402_10V7K
PCIE_MRX_C_LTX_N3
C484
PCIE_MRX_C_LTX_P3
C478
<7,16,19,21,23,24,27> PLT_RST_BUF#
+PCIE_VDD
<31> LAN_WAKE#
C475
0.1U_0402_16V4Z
PCIE_GND
1
R427
1
R431
1
R394
1
R383
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
58
SMB_CLK
57
SMB_DATA
REGCTL12
REGCTL25
RDAC
SMBus to support ASF

1
2
@ R502
0_0402_5%
LAN_WP
GPIO_0(SERIAL_DO)
GPIO_1(SERIAL_DI)
No CIS Symbol
2
R422
XTALO
1
200_0603_1%
XTALI
1
2
25MHZ_20P
C501
27P_0402_50V8J
C495
27P_0402_50V8J
Y1
2
SCLK(EECLK)
SI
SO(EEDATA)
CS
C470
0.1U_0402_16V4Z
2
1
L30 FBM-L11-160808-601LMT_0603
1
2
C453
4.7U_0805_6.3V6K
ENERGY_DET
35
+GPHY_PLLVDD
2
1
L33 FBM-L11-160808-601LMT_0603
2
2
C457
0.1U_0402_16V4Z
1
4
2 R425 1
1 R424 1
67 R420@1
66
2 0_0402_5%
0_0402_5%
2
2 0_0402_5%
LINKLED# <30>
ACTIVITY# <30>
Pin16 conect to C1206 Pin1
GPIO_2
UART_MODE
XTALI
21
XTALI
XTALO
22
XTALO
REG_GND
16
REG_GND
24
PCIE_GND
CTL12
2 0.1U_0402_16V4Z
C512 1
2 4.7U_0603_6.3V6K
MMJT9435T1G_SOT223
+1.2V_LAN
CTL12
14
18 CTL25
37 2
1
R357 1K_0402_1%
XTALVDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
23
6
15
19
56
61
+XTALVDD
+3VALW_VDDIO
VDDP
VDDP
17
68
+2.5V_LAN
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
5
13
20
34
55
60
+1.2V_LAN
C510
0.1U_0402_16V4Z
2REG_GND 2
C509
10U_0805_10V4Z
+3VALW_VDDIO
1
2
C508
0.1U_0402_16V4Z
4.7uF
Q31
MBT35200MT1G_TSOP6
CTL25
+LAN_BIASVDD
BIASVDD
PCIE_PLLVDD
PCIE_VDD
PCIE_VDD
36
30
27
33
AVDD
AVDD
AVDD
38
45
52
+LAN_AVDD
AVDDL
AVDDL
AVDDL
AVDDL
39
44
46
51
+AVDDL
+PCIE_PLLVDD
+PCIE_VDD
+2.5V_LAN
Notice : 4.7u 6.3V capactor Thickness 1.25mm

Layout Notice : Filter place as close
chip as possible.
69
PCIE_GND
65
63
64
62
LAN_CLK
SI
LAN_DATA
CS#
Place closed to L14 & K14
C516 1
1
2
5
6
59
+GPHY_PLLVDD
C452
0.1U_0402_16V4Z
2
4
C443
4.7U_0805_6.3V6K
+3VALW_VDDIO
LINKLED
SPD100LED
SPD1000LED
TRAFFICLED
GND
LAN_TX0- <30>
LAN_TX0+ <30>
LAN_RX1- <30>
LAN_RX1+ <30>
Q33
2
1
L27 FBM-L11-160808-601LMT_0603
2
2
C476
0.1U_0402_16V4Z
C132
0.1U_0603_25V7K
+1.2V_LAN
2
1
L28 FBM-L11-160808-601LMT_0603
2
2
C460
0.1U_0402_16V4Z
C461
0.01U_0402_25V7K
U87
close to each of the pins 38, 45, and 52
C481
0.1U_0402_16V4Z
C506
0.1U_0402_16V4Z
C456
4.7U_0805_6.3V6K
+VSB
C507
0.1U_0402_16V4Z
AO4468_SO8
R174
1
1
2
3
4
S
S
S
G
C486
0.1U_0402_16V4Z
C488
0.1U_0402_16V4Z
D
D
D
D
C468
4.7U_0805_10V4Z
8
7
6
5
+3VALW
2
1
+XTALVDD
L35 FBM-L11-160808-601LMT_0603
2
C505
0.1U_0402_16V4Z
U30
+2.5V_LAN
C503
0.1U_0402_16V4Z
+3VALW_VDDIO
Layout Notice : Filter place as close

chip as possible.
C502
0.1U_0402_16V4Z
Pin 24 conect to C1339 Pin1
Layout Notice : Place as close

chip as possible.
+3VALW_VDDIO
+2.5V_LAN
A0
A1
NC
GND
1
2
3
4
C498
C613
2200P_0402_25V7K
VCC
WP
SCL
SDA
C496
8
7
6
5
LAN_WP
LAN_CLK
LAN_DATA
0.1U_0402_16V4Z
U7
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
R166
4.7K_0402_5%
C504
R165
4.7K_0402_5%
2
10U_0805_10V4Z
AT24C02_SO8
1
2006/08/04
2006/10/06
Deciphered Date
A
Title
BCM5787M-GLAN

Date:
ai
l.c
Issued Date
tm
Compal Secret Data
ho
2
4.7K_0402_5%
1
4.7K_0402_5%
2
4.7K_0402_5%
f@
1
R419
2
R416
1
R409
Rev
0.1
in
@
CS#
@
xa
SI
he
LAN_CLK
om
Close to U87
Sheet
29
of
46
+2.5V_LAN
R331
0_0402_5%
2
C413 1
2 0.1U_0402_16V4Z
C428 1
2 0.1U_0402_16V4Z
<29>
<29>
<29>
<29>
LAN_RX1+
LAN_RX1-
LAN_TX0+
LAN_TX0-
TCT
LAN_TX0+
LAN_TX0-
1
2
3
4
5
6
7
8
RD+
RDCT
NC
NC
CT
TD+
TD-
RX+
RXCT
NC
NC
CT
TX+
TX-
16
15
14
13
12
11
10
9
MDO1+
MDO1MCT0
MCT1
MDO0+
MDO0-
1 R175
75_0402_5%
1 R178
75_0402_5%
ACTIVITY#
<29> ACTIVITY#
+3VALW_VDDIO
1
@ R866
2
300_0402_5%
1
R867
2
300_0402_5%
10mil
+3VS
350uH_NS0013LF
@ C6161
2 220P_0402_50V7K
@ C617
68P_0402_50V8K
2
1
Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF
LINKLED#
<29> LINKLED#
1
49.9_0402_1%
1
49.9_0402_1%
JP21
2
Change T1 from SP050001210 to SP050001210
LAN_RX1- 2
R373
LAN_RX1+ 2
R372
Lan Conn.
@ C615
68P_0402_50V8K
2
1
T24
LAN_RX1+
LAN_RX1TCT
C446
1
2 0.1U_0402_16V4Z
+3VALW_VDDIO
+3VS
1
@ R868
2
300_0402_5%
1
R170
2
300_0402_5%
12
Amber LED-
11
Amber LED+
SHLD4
16
MDO3-
PR4-
SHLD3
15
MDO3+
PR4+
MDO1-
PR2-
MDO2-
PR3-
MDO2+
PR3+
MDO1+
PR2+
MDO0-
PR1-
MDO0+
SHLD2
14
PR1+
SHLD1
13
10mil
10
Green LED-
Green LED+
TYCO_2-1734819-5
ME@
@ C6181
LAN_TX0- 2
R374
LAN_TX0+ 2
R375
1
49.9_0402_1%
1
49.9_0402_1%
2 220P_0402_50V7K
C447
1
2 0.1U_0402_16V4Z
C151
1
2
RJ45_PR
near LAN controller
LANGND
1000P_1206_2KV7K
Compal Secret Data
2006/08/04
Issued Date
2006/10/06
Deciphered Date
5
Title

LAN CONTROLLER

Custom LA-3691P
Date:
Rev
0.1
Sheet

1
30
of
46
+3VALW
+EC_AVCC
122
123
67
2
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
V18R
124
GPI
2
R23
1
10K_0402_5%
2
R52
0
1
2
3
4
5
6
7
+3VALW
FSTCHG <40>
CHARGE_LED0# <34>
CAPS_LED# <32>
CHARGE_LED1# <34>
NOVO#
<32>
SYSON <24,36,42>
VR_ON
<44>
ACIN
<21,38>
SYSON
ICH_POK_EC
BKOFF#
BKOFF#
<17>
WL_OFF# <23>
1
R16
1
R36
TP_DATA
1
R34
1
R22
2
R21
+3VALW
2
@ C609
20mils
C293
0.1U_0402_16V4Z
FSEL#SPICS# 2
R259
SPI_CLK
2
R19
FWR#SPI_SI 2
R257
1
1
2
0V
0.25V
0.50V
0.82V
1.19V
1.65V
2.20V
3.30V
U18
SPI_CS#
1
0_0402_5%
SPI_CLK_R
1
15_0402_5%
SPI_SI
1
0_0402_5%
+3VALW
32.768K_1TJS125BJ4A421P
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
VCC
HOLD
1
3
5
7
1
3
5
7
2
R876
SPI_SO 2
R260
1 FRD#SPI_SO
0_0402_5%
2
4
6
8
2
4
6
8
+3VALW
SPI_CLK_R
SPI_SI
SPI_CLK_R
1
15_0402_5%
@
Compal Secret Data

2006/08/04
E&T_2941-G08N-00E~D
ME@
10P_0402_25V8K
@
VSS
JP11
SPI_CS#
SPI_SO
Issued Date
0
8.2K
18K
33K
56K
100K
200K
NC
R57/45(Ra)=100K Ohm
SST25LF080A_SO8-200mil
R54/42(Rb) Vab
om
R43
3
I
G
T
3
0
BRD ID
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
8M SPI ROM
2
4.7K_0402_5%
2
4.7K_0402_5%
+3VS
1
0
1
2
3
4
5
6
7
2
+3VS
10K_0402_5%
C610
R49
ID
I
H
L
V
2
ICH_POK <7,21>
2
0_0402_5%
@
SCROLL_LED# <32>
I
H
L
0
0
0.25V
IHLV2 VGA
IHL00/IGT30 VGA 0V
R54
PM_SLP_S4# <21>
ENBKL
<17>
EAPD
<25,26>
KILL_SW# <35>
1
+3VALW
10K_0402_5%
STB
<36>
+5VS
TP_CLK
Vab
UMA_DES
IHL00/IGT30 UMA 3.30V
2.20V
IHLV3 UMA
EC_RSMRST# <21>
EC_LID_OUT# <21>
EC_ON
<32>
RB751V_SOD323
D5 2 ICH_POK
1
EC_LID_OUT#
EC_ON
ECAGND
15P_0402_50V8J
4
OUT
IN
NC
NC
3
X1
+3VALW
ID
1
10K_0402_5%
BRD_ID
R51
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#
CHARGE_LED0#
CAPS_LED#
CHARGE_LED1#
R57
100K_0402_1%
SKU_ID
2 4.7K_0402_5%
1U_0402_6.3V4Z
C19
C20
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
15P_0402_50V8J
R44
KB925 SPI STRAP PIN
1
BT_OFF# <23>
+5VALW
R48
@ R50
100K_0402_1%
R26
1
11
24
35
94
113
KB926QFA1_LQFP128
TP_CLK <33>
TP_DATA <33>
AVCC
9
22
33
96
111
125
VCC
VCC
VCC
VCC
VCC
VCC
100
101
102
103
104
105
106
107
108
XCLK1
XCLK0
GND
GND
GND
GND
GND
XCLKI
XCLKO
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
TP_CLK
TP_DATA
+3VALW
Deciphered Date
2006/10/06
Title

BIOS & EC I/O Port

Custom IGT30 LA-3571P
Date:
l.c
EC_TX_P80_DATA
EC_RX_P80_CLK
73
74
89
90
91
92
93
95
121
127
+3VALW
2
@ 10K_0402_5%
ai
Q1
2N7002_SOT23
@
<13,14,33> EC_TX_P80_DATA
<13,14,33> EC_RX_P80_CLK
<32>
ON/OFF#
<34> PWR_LED#
<32> NUM_LED#
119
120
126
128
1
R40
tm
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
97
98
99
109
EC_MUTE#
EC_MUTE# <26>
USB_ON <35>
ho
<4,21> EC_THERM#
<4> FAN_SPEED1
+3V_STB
EC_THERM#
FAN_SPEED1
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
83
84
85
86
87
88
f@
1
2
0_0402_5%
PCI_PME#
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
SUSP#
PBTN_OUT#
<21> PM_SLP_S3#
<21> PM_SLP_S5#
<21> EC_SMI#
<32> LID_SW#
<16,24,36,40,42,43> SUSP#
<21> PBTN_OUT#
<29> LAN_WAKE#
77
78
79
80
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
PSCLK1/GPIO4A
KSI4/GPIO34
PSDAT1/GPIO4B
KSI5/GPIO35
PSCLK2/GPIO4C
PS2 Interface
KSI6/GPIO36
PSDAT2/GPIO4D
KSI7/GPIO37
TP_CLK/PSCLK3/GPIO4E
KSO0/GPIO20
TP_DATA/PSDAT3/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
SDICS#/GPXOA00
KSO4/GPIO24
SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B
SDIDO/GPXOA02
KSO6/GPIO26 Matrix
SDIDI/GPXID0
SPI Device Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/RD#
KSO10/GPIO2A
SPIDO/WR#
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
CIR_RX/GPIO40
KSO16/GPIO48
CIR_RLC_TX/GPIO41
KSO17/GPIO49
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO BATT_LOW_LED#/GPIO54
SCL1/GPIO44
SDA1/GPIO45
SUSP_LED#/GPIO55
SM Bus
SCL2/GPIO46
SYSON/GPIO56
SDA2/GPIO47
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
Analog Board ID definition,

Please see page 3.
+3VALW
Rev
0.1
in
R47
10K_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
DAC_BRIG <17>
EN_FAN1 <4>
IREF
<40>
200K_0402_5%
GM@
Sheet
xa
<39>
<39>
<4>
<4>
KSO16
KSO17
DAC_BRIG
EN_FAN1
IR EF
R63
100K_0402_1%
R42
31
he
<32>
<32>
+3VALW
68
70
71
72
R42
KSI[0..7]
<32,33> KSI[0..7]
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
1
2
3
4
KSO[0..15]
AD
BATT_TEMP <39>
BATT_OVP <40>
ADP_I
<40>
BRD_ID
SKU_ID
UMA_DES
A0
A1
A2
GND
AT24C16AN-10SU-2.7_SO8
UMA_DES
KSO[0..15]
<33>
BATT_TEMP
BATT_OVP
VCC
WP
SCL
SDA
33K_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
63
64
65
66
75
76
PWM Output
INVT_PWM <17>
BEEP#
<25>
EN_WOL <29>
ACOFF
<38,40>
ACOFF
12
13
37
20
38
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
EC_RST#
EC_SCI#
EC_SCI#
INVT_PWM
BEEP#
C57
<21>
21
23
26
27
<15> CLK_PCI_LPC
<19> PCI_RST#
2
47K_0402_5%
R65
100K_0402_1%
U4
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
R45
100K_0402_1%
56K_0402_5%
1
10_0402_5%
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
<21>
SERIRQ
<20> LPC_FRAME#
<20>
LPC_AD3
<20>
LPC_AD2
<20>
LPC_AD1
<20>
LPC_AD0
1
2
3
4
5
7
8
10
C59
2 0.1U_0402_16V4Z
+3VALW
8.2K_0402_5%
PM@
0.1U_0402_16V4Z
<19>
AGND
2
R38 @
@ 22P_0402_50V8J
1
+3VALW
R59
1
@ R507
U1
+5VALW
USB_ON
1 @
2
R506 10K_0402_5%
69
GATEA20
KB_RST#
C35
2
+5VALW
2 10K_0402_5%
<20>
<20>
C48
1000P_0402_50V7K
+3VS
C40
1000P_0402_50V7K
R872 1
C25
0.1U_0402_16V4Z
+3VALW
C21
0.1U_0402_16V4Z
1
2
+EC_AVCC
FBM-11-160808-601-T_0603 2
1
C46
C44
0.1U_0402_16V4Z
1000P_0402_50V7K
1 ECAGND 2
1
2
L7
FBM-11-160808-601-T_0603
C22
0.1U_0402_16V4Z
C23
0.1U_0402_16V4Z
L8
of
46
SW1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
GND
3
4
+3VALW
SMT1-05_4P
R255
+5VALW
100K_0402_5%
+3VALW
D12
ON/OFF#
2
1
51_ON#
Power Button
C291
<38>
D13
KSI0
1
R258
KSI2
2
@ 0_0402_5%
2
@ 0_0402_5%
<27> DRIVE_LED#
<31> CAPS_LED#
<31> NUM_LED#
<31> SCROLL_LED#
+5VS
DRIVE_LED#
CAPS_LED#
NUM_LED#
SCROLL_LED#
ON/OFFBTN#
<31>
KSO16
<31,33> KSI0
KSO17
<31>
D22
D23
PSOT24C_SOT23
PSOT24C_SOT23
Q27
2
G
3
EC_ON
KSO16
RLZ20A_LL34
2
1000P_0402_50V7K
1
EC_ON
DAN202U_SC70
<31>
R10
ON/OFF# <31>
51_ON#
R11
ON/OFFBTN#
Bottom Side
+5VALW
KSO17
<31,33>
KSI2
NOVO_BTN#
Switch Board Conn.
1
@ JOPEN
1
@ JOPEN
1
J3
TOP Side
J1
6
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
ON/OFF switch
JP4
ACES_88716-1601-01
ME@
MUTE#
USER#
S 2N7002_SOT23
+3VALW
10K_0402_5%
KSI 0 & KSO16

KSI 2 & KSO17
ON/OFFBTN#
R15
NOVO_BTN#
D24
100K_0402_5%
PSOT24C_SOT23
NOVO#
NOVO#
<31>
<38>
51_ON#
D4
2
51_ON#
NOVO_BTN#
1
3
DAN202U_SC70
LID Switch
2
0_0402_5%
2
2
OUTPUT
D14 1
3
1
GND
C289
0.1U_0402_16V4Z
C276
U14
A3212ELHLT-T_SOT23W-3
R221
100K_0402_5%
2
VDD
R244
47K_0402_5%
10P_0402_50V8J
1
R241
+3VALW
+3VALW
LID_SW# <31>
CH751H-40_SC76
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
BIOS, I/O Port & K/B Connector

Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet
32
of
46
INT_KBD Conn.
KSI[0..7]
KSI[0..7]
KSO[0..15]
<31,32>
KSO[0..15] <31>
For IHL00
To TP/B Conn.
ME@
ACES_85202-24051
2 @ 100P_0402_50V8J
KSO4
C66
2 @ 100P_0402_50V8J
2 @ 100P_0402_50V8J
KSO5
C64
2 @ 100P_0402_50V8J
KSI2
C63
2 @ 100P_0402_50V8J
KSO6
C82
2 @ 100P_0402_50V8J
KSI3
C78
2 @ 100P_0402_50V8J
KSO7
C81
2 @ 100P_0402_50V8J
KSI4
C76
2 @ 100P_0402_50V8J
KSO8
C67
2 @ 100P_0402_50V8J
KSI5
C62
2 @ 100P_0402_50V8J
KSO9
C61
2 @ 100P_0402_50V8J
KSI6
C75
2 @ 100P_0402_50V8J
KSO10
C85
2 @ 100P_0402_50V8J
KSI7
C74
2 @ 100P_0402_50V8J
KSO11
C70
2 @ 100P_0402_50V8J
KSO0
C77
2 @ 100P_0402_50V8J
KSO12
C83
2 @ 100P_0402_50V8J
KSO1
C79
2 @ 100P_0402_50V8J
KSO13
C69
2 @ 100P_0402_50V8J
KSO2
C80
2 @ 100P_0402_50V8J
KSO14
C84
2 @ 100P_0402_50V8J
KSO3
C68
2 @ 100P_0402_50V8J
KSO15
C86
2 @ 100P_0402_50V8J
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
G1
G2
JP7
JP8
1
2
3
4
5
6
7
8
+5VS
<31>
<31>
TP_DATA
TP_CLK
TP_DATA
TP_CLK
1
2
3
4
5
6
7
8
ACES_87151-0807G
ME@
TP_DATA
TP_CLK
+5VS
C73
C65
KSI1
C117
D10
@
PSOT24C_SOT23
0.1U_0402_16V4Z
KSI0
Update Footprint
EC DEBUG PORT
JP12
+3VALW
<13,14,31> EC_TX_P80_DATA
<13,14,31> EC_RX_P80_CLK
EC_TX_P80_DATA
EC_RX_P80_CLK
1
2
3
4
1
2
3
4
ACES_85205-0400
ME@
Date:
tm
f@
EC ENE KB910L(Reserved)
Size
B
Document Number
LA-3691P
Rev
0.1
in
5
Title
ho
2007/8/18
xa
Deciphered Date
he
2006/08/18
Issued Date
ai
Compal Secret Data
l.c
om
Sheet
33
of
46
LED
+5VALW
R249
300_0402_5%
1
2
PWR_LED# <31>
LED3
HT-191NB5-DT_BLUE_0603
4
2
+5VALW
R248
1
2
300_0402_5%
R250
1
2
300_0402_5%
+3VALW
Amber
CHARGE_LED1# <31>
Blue
CHARGE_LED0# <31>
LED1
HT-297UD/CB _BLUE/AMB_0603
Blue&Amber
LED@
4
2
+5VS
R252 BT@
1
2
300_0402_5%
R251
1
2
300_0402_5%
WLAN@
+3VS
Amber
BT_LED# <23>
Blue
WLAN_BLUE_LED# <23>
LED2
HT-297UD/CB _BLUE/AMB_0603
Issued Date
Compal Secret Data
2006/08/18
Deciphered Date
2007/8/18
Title
MDC/CIR & LED

Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet
34
of
46
USB Conn.
W=80mils
+USB_VCCC
ME@
ACES_87213-1000G
Kill SWITCH
1
GND2
GND1
12
11
10
9
8
7
6
5
4
3
2
1
10
9
8
7
6
5
4
3
2
1
+USB_VCCC
+3VS
2
+USB_VCCC
@ D2
DAN217_SC59
+3VALW
R7
C497
150U_Y_6.3VM
+5VALW
1+USB_VCCC
C18
@
470P_0402_50V7K
2
C499
@
470P_0402_50V7K
100K_0402_5%
KILL_SW#
+USB_VCCC
C301
8
7
6
5
OUT
OUT
OUT
FLG
USB_ON
@ D17
USB20_P0
CH3
CH2
USB20_N6
+
+USB_VCCA
C294
Vp
Vn
C462
2
2
0.1U_0402_16V4Z
2 @
W=80mils
+USB_VCCA
1
USB_OC#7 <21>
2
1
<31>
W=80mils
+USB_VCCA
USB_OC#4 <21>
G545C1P1U_SO8
4.7U_0805_10V4Z
USB20_P7 <21>
USB20_N7 <21>
KILL_SW#
USB CONN. 1
+USB_VCCC
GND
IN
IN
EN#
USB20_P4 <21>
USB20_N4 <21>
USB20_P7
USB20_N7
JP5
KILL_SW# <31>
U17
1
2
3
4
USB20_P4
USB20_N4
C473
220U_V_6.3VM_R25 470P_0402_50V7K
2
JP22
USB20_P6
CH4
CH1
USB20_N0
<21> USB20_N0
<21> USB20_P0
CM1293-04SO_SOT23-6
USB20_N0
USB20_P0
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G579ZR
ME@
USB CONN. 2
+5VALW
+USB_VCCA
+USB_VCCA
W=80mils
U24
C527 0.1U_0402_16V4Z
2
1
<31>
USB_ON
1
2
3
USB_ON 4
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
1
USB_OC#6 <21>
G545C1P1U_SO8
USB_OC#0 <21>
1
C528
470P_0402_50V7K
JP24
C500
@ 1000P_0402_50V7K
<21> USB20_N6
<21> USB20_P6
USB20_N6
USB20_P6
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
ME@
Date:
tm
ho
f@
Power OK, Reset and RTC Circuit, TP

Size
B
Document Number
Rev
0.1
in
Title
LA-3691P
xa
2007/8/18
Deciphered Date
he
2006/08/18
Issued Date
Compal Secret Data
ai
l.c
om
Sheet
E
35
of
46
+5VALW TO +5VS
+3VALW TO +3VS
+5VALW
+1.8V to +1.8VS
+5VS
+3VALW
+1.8V
+3VS
+1.8VS
U28
10U_0805_10V4Z
2
2
1U_0603_10V4Z
2 SUSP
G
Q38
2N7002_SOT23
R483
20K_0402_5%
1
2
R202
47K_0402_5%
+VSB
C568
C226
R203
C190
10U_0805_10V4Z
2
2
1U_0603_10V4Z
8
7
6
5
C191
2
Q18 G
2N7002_SOT23
D
D
D
D
1
2
3
4
S
S
S
G
C184
2 SUSP
G
Q19
2N7002_SOT23
+VSB
C209
C185
10U_0805_10V4Z
2
PM@ 2
1U_0603_10V4Z
PM@
AO4468_SO8
PM@
10U_0805_10V4Z
2
PM@ 2
10U_0805_10V4Z
PM@
470_0603_5%
D
SUSP
0.1U_0603_25V7K
R193
PM@
470_0603_5%
1.8VS_GATE
R192
180K_0402_5%
PM@
S
1
SUSP
0.1U_0603_25V7K
2 SUSP
G
Q17
2N7002_SOT23
PM@
C189
0.1U_0603_25V7K
2 PM@
2
G
Q15
S
2N7002_SOT23
PM@
3
C229
SUSP
2
Q37G
2N7002_SOT23
1
2
3
4
S
S
S
G
5VS_GATE
C215
D
D
D
D
AO4468_SO8
10U_0805_10V4Z
2
2
10U_0805_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
C227
470_0603_5%
R484
C579
AO4468_SO8
+VSB
8
7
6
5
2
C575
U9
U10
1
2
3
4
1 1
C571
S
S
S
G
D
D
D
D
C577
8
7
6
5
+5VALW
2
+3VALW to +3V Transfer

+3VALW
R225
100K_0402_5%
+3V_STB
1
@ J4
PAD-OPEN 3x3m
2
SYSON#
10U_0805_10V4Z
@
D
D
D
D
10U_0805_10V4Z
1
C545
@
1
2
3
4
S
S
S
G
C543
Q23
0.1U_0402_16V4Z
2 @
AO4468_SO8
U27
SYSON
DTC124EK_SC59
@ R224
100K_0402_5%
2
G
+VSB
<24,31,42> SYSON
Q35
2N7002KW_SOT323-3
C539
@
8
7
6
5
R464
33K_0402_5%
@
3
RTCVREF
C544
0.1U_0603_25V7K
Q36
BSS138LT1G_SOT23-3 @
2
@
R508
10K_0402_5%
SUSP
SUSP
<43>
R223
100K_0402_5%
@
1
2
G
STB
STB
1
<31>
+5VALW
D
Q22
D
2 SUSP
G
Q20
2N7002_SOT23
2 SYSON#
G
Q16
2N7002_SOT23
2006/08/18
Issued Date
Compal Secret Data
2007/8/18
Deciphered Date
A
1
1
1
1
D
2 SUSP
G
Q28
2N7002_SOT23
DTC124EK_SC59
@ R222
100K_0402_5%
R191
470_0603_5%
R211
470_0603_5%
D
2 SUSP
G
Q10
2N7002_SOT23
+1.8V
2
1
1
1
S
+0.9VS
R262
470_0603_5%
D
2 SUSP
G
Q25
2N7002_SOT23
R137
470_0603_5%
R235
470_0603_5%
+VCCP
+2.5VS
<16,24,31,40,42,43> SUSP#
+1.5VS
Title
DC Interface
Size
B
Date:
Document Number
Rev
0.1
LA-3691P
Sheet

E
36
of
46
FM1
FM6
FM5
CF3
CF4
1
CF5
CF6
CF7
CF8
CF2
H22
H
@
H7
H
@
H24
H
H29
H
H1
H
FM4
H21
H
CF1
@
H16
H
@
H19
H
H23
H
1
@
H11
H
@
H13
H
@
H28
H
@
H20
H
FM2
H18
H
@
H12
H
@
H15
H
H8
H
1
H9
ai
tm
Title
FAN & Screw Hole

Size
B
Date:
ho
2007/8/18
f@
Deciphered Date
Document Number
LA-3691P
Rev
0.1
in
2006/08/18
Sheet
xa
Issued Date
Compal Secret Data
l.c
om
37
he
@
H6
H
@ H5
H
FM3
H17
H
H27
H
H26
H
H25
H
H14
H
H10
H
H4
H
H3
H
H2
H
of
46
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
ACIN
Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
DC030005Q00
1
PR1
10_1206_5%
PR3
1K_1206_5%
1
2
LL4148_LL34-2
PR4
PC5
@10K_0402_1% @ 0.01U_0402_25V7K
1
2
1
2
PR12
10K_0402_1%
1
2
ACIN
<21,31>
PACIN
<40>
PACIN
<31,40>
Vin Detector
ACOFF
PQ3
DTC115EUA_SC70-3
High 18.764 17.901 17.063

Low 17.745 16.9
16.03
3.3V
B+
RTCVREF
GLZ4.3B_LL34-2
PR17
10K_0402_1%
2
1
PQ2
DTC115EUA_SC70-3
PD3
PR16
10K_0402_1%
PU1A
LM393DG_SO8
8
3
PC7
0.1U_0402_16V7K
PR7
1K_1206_5%
1
2
1
PR11
10K_0402_1%
2
1
PR10
84.5K_0402_1%
1
PR15
20K_0402_1%
2
PC6
1000P_0402_50V7K
VS
PR13
22K_0402_1%
1
2
PR5
1K_1206_5%
1
2
VS
PR6
1M_0402_1%
1
2
VIN
PQ1
TP0610K-T1-E3_SOT23-3
1
1
PR14
100K_0402_5%
2
1
PR9
100K_0402_5%
PD2
VIN
2
1
PR8
100K_0402_5%
1 2
PR2
1K_1206_5%
1
2
PD1
RLZ24B_LL34
1
2
PC4
1000P_0402_50V7K
JST_B4B-EH-A(LF)(SN)
PC3
100P_0402_50V8J
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
ADPIN
PJP1
VIN
PL11
FBMA-L11-322513-201LMA40T_1210
1
2
1 2
VIN
PR18
2.2M_0402_5%
2
1
VL
(7A,280mils ,Via NO.=14)

PJ5
PAD-OPEN 3x3m
1
2
+5VALW
RTCVREF
PJ6
PAD-OPEN 3x3m
2
PQ5 D
PC14
0.01U_0402_25V7K
2
1
PR28
499K_0402_1%
1
PR27
191K_0402_1%
PRG++ 2
PR30
34K_0402_1%
2
1
(8A,320mils ,Via NO.= 16)
+0.9VSP
PU1B
LM393DG_SO8
2N7002W-T/R7_SOT323-3
PR31
47K_0402_1%
2
2
1
G
PACIN <40>
PQ6
DTC115EUA_SC70-3
+5VALWP
+0.9VS
+5VALWP
+1.8VP
+1.5VS
2
1
PR32
66.5K_0402_1%
+1.5VSP
PJ3 PAD-OPEN 3x3m

1
2
+1.8V
BAS40CW_SOT323-3
PQ4
TP0610K-T1-E3_SOT23-3
PJ2
PAD-OPEN 3x3m
1
2
P
1
ACON
<40>
1
2
2
<39,41> MAINPWON
51_ON#
PD6
PC13
1000P_0402_50V7K
<32>
PR29
22K_0402_1%
1
2
PC10
0.22U_1206_25V7K
CHGRTCP
GND
2
1
2
PC8
4.7U_0805_6.3V6K
+CHGRTC
PR25
200_0805_5%
2
1
2
1
IN
2
1
PR26
100K_0402_5%
OUT
PC9
1U_0805_25V4Z
PU2
2
1
PR22
100K_0402_1%
G920AT24U_SOT89-3
PR24
PR23
560_0603_5%
560_0603_5%
1
2 1
2
VS
VS
1
RB751V-40_SOD323-2
PC11
0.1U_0603_25V7K
2
1
PR20
68_1206_5%
2
1
PR21
68_1206_5%
BATT+
RTCVREF
PC12
0.1U_0603_25V7K
PD5
3.3V
2
1
PR19
499K_0402_1%
PD4
LL4148_LL34-2

PJ7
PAD-OPEN 3x3m
1
2
+3VALWP

4
PJ8
+3VALW
+2.5VSP
+2.5VS
JUMP_43X79
(6A,240mils ,Via NO.=12)
+VCCPP
PJ4
PAD-OPEN 3x3m
2
+VCCP
(16A,800mils ,Via NO.= 24)

A
+VSBP
PJ10
PAD-OPEN 3x3m
2
Issued Date
Compal Secret Data
+VSB
2005/10/17
Deciphered Date
2006/10/17
(0.3A,40mils ,Via NO.= 2)

B
Title
DCIN/DECTOR
Size
B
Date:
Document Number
Rev
0.1
Sheet

D
38
of
46
PL12
HCB4532KF-800T90_1812
1
2
BATT+
PH1 under CPU botten side :

CPU thermal protection at 85 degree C
Recovery at 70 degree C
PJP2
VS
MAINPWON <38,41>
PR46
150K_0402_1%
VS
2
PU3A
LM393DG_SO8
O
4
BATT_TEMP <31>
PR43
2 150K_0402_1%
1
VL
1
PR45
1K_0402_1%
PC20
1U_0603_6.3V6M
1
+3VALWP
1
2
2
PR44
6.49K_0402_1%
PC19
1000P_0402_50V7K
PH1
100K_0603_1%_TH11-4H104FT
TM_REF1
EC_SMB_DA1 <31>
1
2
PR38
150K_0402_1%
PR42
69.8K_0603_1%
1
2
EC_SMB_CK1 <31>
PR39
1 442K_0603_1%
2
1
1
PR41
100_0402_1%
<40>
2
1
PR40
100_0402_1%
ALI/MH#
VL
VL
2
1
PR37
10.5K_0402_1%
PC17
0.01U_0603_50V7K
PR35
1K_0402_1%
@ 100K_0402_5%
PR33
100K_0402_5%
+3VALWP
PR34
+3VALWP
ID
B /I
SMC
SMD
TS
GND
PC16
1000P_0603_50V7K
PC15
1000P_0603_50V7K
BATT++
PR36
1K_0402_5%
1
2
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
G1
G2
DC040003600
PC18
0.1U_0603_25V7K
BATT++
PU3B
LM393DG_SO8
PJ20
JUMP_43X79
PQ7
TP0610K-T1-E3_SOT23-3
3
1
2
2
PC21
0.22U_1206_25V7K
2N7002W-T/R7_SOT323-3
tm
ai
ho
Title
BATTERY CONN. / OTP

Size
B
Date:
f@
2006/10/17
Document Number
Rev
0.1
in
Deciphered Date
IHL00 LA-3691P
xa
2005/10/17
he
Issued Date
Compal Secret Data
l.c
om
PQ8
2
G
PR50
@ 0_0402_5%
2
SPOK
PC23
0.1U_0402_16V7K
1
2
PR49
100K_0402_5%
<41>
2
1
PR47
100K_0402_5%
PR48
22K_0402_1%
1
2
VL
+VSBP
1
PC22
0.1U_0603_25V7K
B+
Sheet
39
of
46
65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR69=39.2K, CP=3.079A

90W, Iadapter=0~4.74A, Current Sense=0.015ohm, PR69=28.7K, CP=4.263A
ADP_I = 19.9*Iadapter*Rsense
B+
3CS IN
JUMP_43X118
PC29
5600P_0402_25V7K
1
2
PQ42
TP0610K-T1-E3_SOT23-3
3
1
8
7
6
5
4
PQ43
DTC115EUA_SC70-3
PR54
47K_0402_1%
1
2
PR55
10K_0402_1%
FSTCHG
2
2
PR209
100K_0402_1%
ACOFF
1
3
SUSP#
<31,38>
200K_0402_1%
PR56
1
2
<16,24,31,36,42,43>
BAS40CW_SOT323-3
VIN
2
1SS355_SOD323-2
PD16
2
VIN
PD7
PC30
0.1U_0603_25V7K
PQ12
DTA144EUA_SC70-3
2
6251DC_IN
PR208
100K_0402_1%
VIN
PQ11
AO4407_SO8
1
2
3
PC27
2200P_0402_50V7K
2
1
PR51
0.02_2512_1%
4
2
1
2
3
PC28
0.1U_0603_25V7K
4
1
2
PR53
200K_0402_1%
PC26
0.1U_0603_25V7K
2
1
CSIP
PR52
47K_0402_1%
CHG_B+
PJ12
8
7
6
5
PC25
10U_1206_25V6M
2
1
1
2
3
PC24
10U_1206_25V6M
2
1
1
2
3
P3
8
7
6
5
VIN
PQ10
AO4407_SO8
P2
PQ9
AO4407_SO8
0.1U_0603_25V7K
VCOMP
CSIP
19
PHASE
18
16
PR68
BST_CHG 1
2
2.2_0603_5%
ACLIM
VDDP
15
6251VDDP
10
BST_CHGA
PC41
0.1U_0603_25V7K
PD10
LGATE
14
12
GND
PGND
13
39.2K_0402_1%
PR70
2
ISL6251AHAZ-T_QSOP24
6251VREF 1
1
26251VDD
4.7_0603_5%
PR71
PC45
4.7U_0805_6.3V6K
6251VDD 1
VS
<39>
1
3
PC46
0.01U_0402_25V7K
LI-3S :13.50V--BATT-OVP=1.5V
LI-4S :18V--BATT-OVP=2.0V
LM358ADR_SO8
PR78
105K_0402_1%
OVP voltage :
PU5A
3
PR76
499K_0402_1%
PC48
0.01U_0402_25V7K
BATT-OVP=0.111*BATT+
1
2
PR75
340K_0402_1%
<31> BATT_OVP
PR77
10K_0402_1%
2
PC47
0.01U_0402_25V7K
CHGSEL
If this area float, Charge voltage is 4.2V/cell
2SC2411KT146_SOT23-3
@
PR211
20K_0402_1%
ALI/MH#
1
3
E
1
@ SI2301BDS-T1-E3_SOT23-3
2
B
PQ21
PR74
@ 100K_0402_1%
C PQ44
PC157
0.01U_0402_25V7K
2
1
PR73
@ 274K_0402_1%
PQ45
DTC115EUA_SC70-3
BATT+
2
1
CELLS
PR58
47K_0402_5%
PR210
100K_0402_1%
CSON
CC=0.6~3.4A
VCHLM=0.24V~1.36V
IREF=0.972*Icharge
IREF=0.5832V~3.3V
SI4800BDY-T1-E3_SO8
6251VREF
10K_0402_1%
PR72
CP mode
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=0.5535V, Iinput=3.079A
where Vaclm=0.6667V, Iinput=4.263A
PR65
0.02_2512_1%
4
3
2
1
DL_CHG
VADJ
BATT+
CSON
PQ19
RB751V-40_SOD323-2
11
BOOT
CHLIM
D
D
D
D
DH_CHG
6251_EN
6251VREF
CHG
5
6
7
8
17
VREF
PC44
1
PR69
100K_0402_1%
PL1
<BOM Structure>
10U_LF919AS-100M-P3_4.5A_20%
G
S
S
S
2
IREF
DTC115EUA_SC70-3
1
PQ20
<31>
UGATE
ACOFF
PR67
143K_0402_1%
2
1
0.01U_0402_25V7K
<31,38>
ICM
ADP_I
PC40
0.1U_0402_16V7K
PQ17
SI4800BDY-T1-E3_SO8
CS IN
2
1
PC38
PR62 20_0603_5%
0.1U_0603_25V7K
CSIP
1
2
PR220
2.2_0603_5%
LX_CHG
PC43
10U_1206_25V6M
20
<38>
CSIN
PC42
10U_1206_25V6M
ICOMP
PACIN
21
PQ15
2
G
CSOP
6251VREF
PR63
10K_0402_1%
<31>
2N7002W-T/R7_SOT323-3
CELLS
PC33
0.1U_0603_25V7K
CSON
PR219
20_0603_5%
CSON
1
2
PC35
0.047U_0603_25V7M
CSOP
1
2
PR61
20_0603_5%
D
D
D
D
EN
22
PC37
0.01U_0402_25V7K
G
S
S
S
5
6
7
8
23
2 1
CSOP
2N7002W-T/R7_SOT323-3
ACON
100_0402_1%
PR64 2
ACON
PD9
2
4
3
2
1
CELLS
100P_0402_50V8J
PC39
PQ14
DTC115EUA_SC70-3
BATT+
1SS355_SOD323-2
D
PC156
0.1U_0402_16V7K
<38>
2
1
PQ18
2
G
PACIN
<38>
PC36
6800P_0402_25V7K
PR66
22K_0402_1%
PACIN 1
2
PC32
1
6251DC_IN 2
ACSET ACPRN
24
@ 680P_0402_50V7K
PC34
CSON1
2
PR57
10K_0402_5%
DCIN
PR60
150K_0402_1%
2N7002W-T/R7_SOT323-3
PC31
2.2U_0603_6.3V6K
6251_EN
100K_0402_1%
PR59
2
1
FSTCHG
<31>
PQ13
DTC115EUA_SC70-3
3
PQ16
2
G
VDD
1SS355_SOD323-2
PD8
1
2
PU4
6251VDD
BATT Type
Charging Voltage
ALI/MH#
(0x15)
CV mode
4800mAH 3S pack
16800mV
LOW
16.8V
2400mAH 4S pack
12600mV
HIGH
12.60V
Issued Date
Compal Secret Data
2006/05/18
Deciphered Date
2007/05/18
B
Title
CHARGER
Size
Date:
Document Number
R ev
0.1
Sheet
D
40
of
46
PJ13
JUMP_43X118
B+++
B+++
PQ23
SI4800BDY-T1-E3_SO8
5
6
7
8
G
S
S
S
4
3
2
1
2
1
DH3
10UH_1164AY-100M=P3_4.7A_20%
PQ25
SI4810BDY-T1-E3_SO8
5
6
7
8
D
D
D
D
4
3
2
1
PL3
28
26
24
27
22
7
2
1
+
SPOK
PC62
330U_D3L_6.3VM_R25M
+3VALWP
1
2
PR95
6.81K_0402_1%
LDO3
G
S
S
S
2
PR87
0_0603_5%
1
DL3
1
2
PR99
10K_0402_1%
<39>
D
D
D
D
10U_1206_25V6M
1
2
1
2
PR89
499K_0402_1%
11
PC53
2200P_0402_50V7K
PC54
2
1
2
PR84
0_0603_5%
1
2
PR86
200K_0402_1%
1
2
PR85
200K_0402_1%
1
2
PR88
499K_0402_1%
BST3A
PRO#
VCC
3HG
LX3
PC52
0.1U_0402_16V7K
2
1
2
17
2
13
TON
ILIM3
4.7U_0805_6.3V6K
10
1
2
PR97
0_0402_5%
REF
25
PC63
2
1
12
PC61
0.22U_0603_16V7K
2
2
20
LX5
DL5
ILIM5
OUT5
PU7
FB5
BST3
N.C.MAX8734AEEI+_QSOP28 DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD
V+
15
19
21
9
1
2
1
PR98
47K_0402_1%
1
2
18
DH5
PC64
0.047U_0603_16V7K
1
2
PR94
0_0402_5%
PC60
0.047U_0603_16V7K
GLZ5.1B_LL34-2
1
2
PR96
100K_0402_5%
1
2
PR90
10.5K_0402_1%
+5V Ipeak = 6.66A ~ 10A
2
PR91
0_0402_5%
8734_VREF
PR93
47K_0402_1%
2 1
2
BST5
16
6
4
3
VS
14
LD05
BST5A
8734_VREF
PC57
1U_0805_16V7K
PC56
4.7U_0805_6.3V6K
2
1
VL
DL5
PZD1
PC55
1U_0805_25V4Z
PQ24
SI4810BDY-T1-E3_SO8
8
7
6
5
D
D
D
D
1
2
3
4
S
S
S
G
1
2
PL2
10UH_1164AY-100M=P3_4.7A_20%
1
2
PR92
6.81K_0402_1%
PC59
150U_D2_6.3VM
1 PC58
0.1U_0603_25V7K
DH5
<BOM Structure>
+5VALWP
2
1
PR81
4.7_1206_5%
1
2
PR82
47_0402_5%
2
1
PR80
4.7_1206_5%
PR83
0_0603_5%
2
BAW56W_SOT323-3
B+++
GND
2
PR79
0_0603_5%
VL
LX5
PC50
0.1U_0402_16V7K
1
2
BST3B
23
5HG
PD11
<BOM Structure>
PQ22
SI4800BDY-T1-E3_SO8
1
2
3
4
S
S
S
G
D
D
D
D
10U_1206_25V6M
PC51
1
8
7
6
5
BST5B
PC49
0.1U_0402_16V7K
1
2
B+
VFB=2V
+3.3V Ipeak = 6.66A ~ 10A
1
2
PC65
1U_0603_6.3V6M
MAINPWON <38,39>
tm
ho
+5VALWP/+3VALWP
f@
Title
Custom
Date:
Rev
0.1
in
2006/10/17
xa
Deciphered Date
he
2005/10/17
ai
Compal Secret Data
Issued Date
l.c
om
Sheet
41
of
46
+5VALW
ILIM1
VCCA1
25
VCCA_1.8V
LX1
VOUT1
24
Vout_1.8V
DH1
TON1
23
EN/PSV1
22
19
LX_1.05V
VCCA2
12
FB2
ILIM2
18
VDDP2
17
PGND2
15
VSSA2
SC413TSTRT_TSSOP28
+5VALW
1
2
FB_1.05V
PC78
1U_0603_10V6K
1
+
PR107
10K_0402_1%
VFB=0.5V
PC70
0.1U_0402_16V7K
PC67
4.7U_1206_25V6K
PC66
4.7U_1206_25V6K
2
1
5
6
7
8
D
D
D
D
PC74
33P_0402_50V8K
1
+
to VSSA1 and VOUT1 PIN
16
<16,24,31,36,40,43> SUSP#
PR103
56K_0402_5%
1
2
DL2
PGD2
SI4810BDY-T1-E3_SO8
PQ27
DL_1.05V
+VCCPP
Vout_1.05V
FB_1.05V
PR109
ILIM_1.05V1
2
34K_0402_1%
+5VALW
PC71
330U_D2_2V_Y
LX2
Maximum continuous current=>6A

PL4
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
PC69
330U_D2_2V_Y
VOUT2
Vout_1.05V
DH_1.05V-1
1
PR106
11K_0402_1%
10
VCCA_1.05V 11
PR102
0_0402_5%
1
2
0.1U_0603_25V7K
BST_1.05V
1
2
0_0402_5%
DH_1.05V
20
21
DH2
B+_1.8/1.05
G
S
S
S
BST2
TON2
PC72
1
2
4
3
2
1
EN/PSV2
14
Close to IC Side
PR108
13
Differential routing of feedback
SI4800BDY-T1-E3_SO8
PR112
PQ26
2
1 B+_1.8/1.05
820K_0402_5%
5
6
7
8
BST1
PGOOD1_1.8V
PC84
1000P_0402_50V7K
1
2
D
D
D
D
PC68
1000P_0402_50V7K
FB_1.8V
PR116
1M_0402_5%
26
G
S
S
S
0_0402_5%
27
FB1
VDDP1
4
3
2
1
B+_1.8/1.05 2
28
PGD1
DL1
8
7
6
5
D
D
D
D
0.1U_0603_25V7K
PQ29
SI4810BDY-T1-E3_SO8
1
2
3
4
PR121
10K_0402_1%
PC82
2
DH_1.8V
6
PR115
2 BST_1.8V 7
VSSA1
PGND1
PR119
0_0402_5%
2
D
D
D
D
DH_1.8V-1
1
1
FB_1.8V
2
1
PC91
1U_0603_10V6K
1 2
8
7
6
5
BST_1.05V-1
DL_1.8V
2
PC80
1
2 +5VALW 3
1U_0603_10V6K
1
2 ILIM_1.8V
4
PR114 27.4K_0402_1%
LX_1.8V
5
S
S
S
G
1
2
BST_1.8V-1
PQ28
SI4800BDY-T1-E3_SO8
PC89
33P_0402_50V8K
PR100
100K_0402_5%
@
PC85
220U_D2_4VY_R15M
PR122
26.1K_0402_1%
PL5
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
Vout_1.8V
1
2
3
4
+1.8VP
VCCA_1.8V
PU8
S
S
S
G
JUMP_43X118
BAW56W_SOT323-3
PD12
VCCA_1.05V
PC86
4.7U_1206_25V6K
2
1
PC87
4.7U_1206_25V6K
2
1
B+_1.8/1.05
PJ14
PR101
10_0603_5%
PR110
10_0603_5%
B+
PC83
2.2U_0603_6.3V6K
PC90
1U_0603_10V6K
<24,31,36> SYSON
PR124
0_0402_5%
1
Close to IC Side
Differential routing of feedback to VSSA2 and VOUT2 PIN
2
1
PR113
100K_0402_5%
@
@ PC168
0.1U_0402_16V7K
PGOOD2_1.05V
VFB=0.5V
VFB=0.5V
Vo=VFB*(1+PR129/PR130)=1.5V
Vo=VFB*(1+PR122/PR127)=1.805V
Ipeak=5.16A, Imax=3.612A
Ton=(3.3E-12*(PR125+37K)*(Vout/VBat))+50ns
Ipeak=12.17A, Imax=8.519A
Ton=(3.3E-12*(PR121+37K)*(Vout/VBat))+50ns
=0.3201us
AO4916 Rds(on)=>Typ:21 mOhm
=3.3*10e-12*(820K+37K)*(1.8/19)+50ns=0.3179us
Max:27 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm
Max:11.5 mOhm
Ivalleymin=9*10u*(29.4K/0.027*1.4)=7A
Iocp=Ivalley+ Iripple /2
Ivalleymax=11*E-6*(29.4K/0.021*1.1)=12.833A
Iripple=(vin-vout)*(Ton/L)=5.467A, 1/2 Iripple=2.734A.
Iripple=(vin-vout)*(Ton/L)=2.546A, 1/2Iriiple=1.273A
Ivalleymin=10E-6*(PR120/Rds(ON)max*1.5)
=9*10e-6*(27.4K/0.0115*1.5)=14.295A>11.73*1.2=14.076A
OCP==>8.273A~14.106A
Ivalleymax=10E-6*(PR120/Rds(ON)typ*1.2)
=11*10e-6*(27.4K/0.009*1.2)=27.907A.
Compal Secret Data
OCP==>17.029A~30.641A
2007/01/16
Issued Date
Deciphered Date
2008/01/16
+VCCPP/+1.8VP
5
Title

Custom
Date:
Rev
0.1
Sheet
1
42
of
46
+5VALW
ILIM
10
ILIM_1.5V
+5VALW
PC93
4.7U_1206_25V6K
2
1
D
D
D
D
SI4810BDY-T1-E3_SO8
PQ31
G
S
S
S
PC101
33P_0402_50V8K
FB_1.5V
4
3
2
1
VFB=0.5V
1
+
2
PR133
10K_0402_1%
1
PC108
1U_0603_10V6K
+1.5VSP
Vout_1.5V
DL_1.5V
B+
5
6
7
8
PR128
1
2
26.1K_0402_1%
JUMP_43X118
PL6
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
DL
8
PGND
7
17
PU9
SC411MLTRT_MLPQ16_4X4
VDDP
0.1U_0603_25V7K
PC96
470U_D2_2.5VM
LX
LX_1.5V
PJ15
PR132
20K_0402_1%
DH_1.5V
12
11
PC100
2
DH
PC111
4.7U_1206_25V6K
2
1
13
BST
15
14
NC
16
TON
PGD
VSSA
FB
TP
PGOOD2_1.5V
PR126
1
2
0_0603_5%
BST_1.5V
VCCA
NC
VOUT
FB_1.5V
EN/PSV
Vout_1.5V
VCCA_1.5V
PQ30
SI4800BDY-T1-E3_SO8
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8
2
1
2
+5VALW
PR214
100K_0402_5%
BST_1.5V-1
PC164
1000P_0402_50V7K
B+_1.5VSP
1SS355_SOD323-2
1
PD14
VCCA_1.5V
PR213
1M_0402_5%
2
1
PC163
B+_1.5VSP
0.1U_0402_16V7K
PC99
1U_0603_10V6K
<16,24,31,36,40,42> SUSP#
PR127
10_0603_5%
PC97
2.2U_0603_6.3V6K
PR212
47K_0402_5%
1
2
Close to IC Side
+3VS
Differential routing of feedback to VSSA2 and VOUT2 PIN
The current rating of +1.05VSP include +VCC_GFX current.
+5VS
Vo=VFB*(1+PR146/PR147)=1.05V
1
VFB=0.5V, Ipeak=14.02A, Imax=9.814A

PJ18
JUMP_43X79
Ton=(3.3E-12*(PR142+37K)*(Vout/VBat))+50ns=0.2391us
PC154
1U_0603_6.3V6M
PR205
PC155
2
2.15K_0402_1%
APL5913-KAC-TRL_SO8
0.01U_0402_25V7K
Ivalleymax=11*10E-6*(PR145/Rds(ON)min*1.2)
22U_1206_6.3V6M
FB
=9*10E-6*(26.1K/(0.0115*1.5))=13.617A
+2.5VSP
PC158
2
3
4
VOUT
VOUT
EN
POK
PC160
@0.1U_0402_16V7K
8
7
GND
0_0402_5% PR204
Ivalleymin=9*10E-6*(PR145/Rds(ON)max*1.5)
VCNTL
VIN
VIN
<16,24,31,36,40,42> SUSP#
Max:11.5 mOhm
PU13
6
5
9
SI4810BDY:Rds(on)=>Typ:9mOhm
PC159
10U_0805_6.3V6M
=11*10E-6*(26.1K/(0.009*1.3))=20.076A
Iripple=(vin-vout)*(Ton/L)=4.292A, 1/2Iripple=2.146A
B
OCP==>15.763A~22.222A
PR203
1K_0402_1%
+1.8V
PJ19
JUMP_43X118
VCNTL
GND
NC
REFEN
NC
VOUT
NC
GND
+3VALW
1
VIN
PC161
10U_0805_6.3V6M
PR206
1K_0402_1%
PU14
1
PC162
1U_0603_6.3V6M
RT9173DPSP_SO8
PR207
A
1
PR215
1K_0402_1%
om
ai
l.c
3
tm
1.5VSP/2.5VSP/0.9VSP
4
Title

Custom
Date:
ho
2006/10/17
Deciphered Date
f@
2005/10/17
Rev
0.1
in
<BOM
2N7002W-T/R7_SOT323-3
Structure>
Issued Date
Compal Secret Data
PC167
0.1U_0402_16V7K
PC165
22U_1206_6.3V6M
xa
he
PC166
0.1U_0402_16V7K
+0.9VSP
SUSP
PQ41
2
G
<36>
0_0402_5%
1
2
Sheet
43
of
46
+5VS
CPU_B+
B+
LX1
28
LX1__CPU
D3
DL1
26
DL1__CPU
<5>
CPU_VID4
35
D4
PGND1
27
<5>
CPU_VID5
36
D5
GND
18
<5>
CPU_VID6
37
D6
CSP1
17
TIME
CSN1
16
CSN1_CPU
CCV
FB
12
FB_CPU
REF
CCI
10
DPRSLPVR
DH2
21
DH2_CPU-1
BST2
20
BST2_CPU
LX2
22
LX2_CPU
DL2
24
DL2__CPU
PGND2
23
40
PSI
PWRGD
CLKEN
DPRSTP
GNDS
PR184
1
PC141
1
3.92K_0402_1%
2
0_0402_5%
1
2
<5>
VSSSENSE
VSSSENSE
PC132
2200P_0402_50V7K
2
1
PC131
0.1U_0603_25V7K
2
1
2
PR185
100_0402_1%
PC142
4700P_0402_25V7K
@
2
PR188
3K_0603_1%
PC144
470P_0603_50V8J
CPU_B+
PQ38
SI7686DP-T1-E3_SO8
0_0603_5%
PR196
1
2
PR198
@ 10_0402_5%
DH2_CPU-2
3
2
1
PC151
0.1U_0402_16V7K
PR200
2.1K_0402_1%
PR199
4.7_1206_5%
PL10
0.36H_ETQP4LR36WFC_24A_20%
2
1
2
DL2__CPU
PC152
680P_0603_50V7K
PQ40
G
S
S
S
4
3
2
1
G
S
S
S
4
3
2
1
SI4856DY-T1-E3_SO8
D
D
D
D
PQ39
5
6
7
8
SI4856DY-T1-E3_SO8
PR201
3.48K_0402_1%
1
2
NTC
1
2005/10/17
Issued Date
Deciphered Date
0.22U_0603_16V7K

2006/10/17
4
PC153
Compal Secret Data
PH3
2
10KB_0603_5%_ERTJ1VR103J
1
PR202 0_0402_5%
1
2
PR197 10K_0402_1%
D
D
D
D
POUT
PR191
20K_0402_1%
<4> H_PROCHOT#
PR194
100_0402_1%
@ PR193
56_0402_5%
PR195
4700P_0402_25V7K
0.022U_0402_16V7K
CPU_VCC_SENSE
2
+3VS
PR192
@ 10K_0402_5%
PC145
2
1
PC143
PR190
0_0402_5%
PC130
10U_1206_25V6M
2
1
PC129
10U_1206_25V6M
2
1
PR181 @ 3K_0603_1%
1
2
NTC PR187
@ 3K_0603_1%
MAX8770GTL+_TQFN40
<BOM Structure>
41
TP
POUT
VCCSENSE
PR178
0_0402_5%
CSN2__CPU
13
PR180
15
14
CSN2
0.22U_0603_16V7K
PR179 0_0402_5%
1
2
BSTM2_CPU
2
0_0402_5%
@ PR189
1
2
1
CSP2
VRHOT
VR_ON
SHDN
<31>
1
<15> CLK_ENABLE#
38
PR183
@ 2K_0402_1%
<15,21> VGATE
2
PR182
10K_0402_1%
PR186
0_0402_5%
10KB_0603_5%_ERTJ1VR103J<5>
1
2
PC140
CSP2_CPU
PH2 NTC
2
11
0.22U_0603_16V7K 39
C CI_CPU
DL1__CPU
PC146
10U_1206_25V6M
2
1
H_PSI#
+3VS
1
PC139
3.48K_0402_1%
PR174
2
1
<5>
PC138
CSP1__CPU
+CPU_CORE
D2
34
PC150
2200P_0402_50V7K
2
1
33
10_0402_5%
1
CPU_VID3
PR172
CPU_VID2
<5>
PC149
0.1U_0603_25V7K
2
1
<5>
71.5K_0402_1%
1
7
+CPU_CORE
PL9
0.36H_ETQP4LR36WFC_24A_20%
2
1
PC148
10U_1206_25V6M
2
1
DH1__CPU-1
PC147
10U_1206_25V6M
2
1
29
PC137
680P_0603_50V7K 2.1K_0402_1%
PR170
1
2
DH1
PQ37
SI4856DY-T1-E3_SO8
PR169
4.7_1206_5%
2
1
2
1
D1
<4,20> H_DPRSTP#
0_0402_5%
32
3
2
1
5
6
7
8
D
D
D
D
CPU_VID1
G
S
S
S
<5>
0.22U_0603_16V7K
PC136
BSTM1_CPU 1
2
4
3
2
1
BST1_CPU 1
5
6
7
8
30
D
D
D
D
BST1
PQ36
D0
<7,21> PM_DPRSLPVR
499_0402_1%
PC128
10U_1206_25V6M
2
1
31
PR177
200K_0402_1%
2 PR158 1
0_0402_5%
47P_0402_50V8J
1
PR176
0_0603_5%
PR163
2
CPU_VID0
PR1732
PR175
<5>
G
S
S
S
PR171 0_0402_5%
TON
4
3
2
1
PR168 0_0402_5%
VDD
THRM
SI4856DY-T1-E3_SO8
PR167 0_0402_5%
25
Vcc
5
6
7
8
PR166 0_0402_5%
+
2
0_0603_5%
PR161
1
2DH1_CPU-2
4
0_0603_5%
PR165 0_0402_5%
19
0.22U_0603_16V7K
PR164 0_0402_5%
V CC
PQ35
SI7686DP-T1-E3_SO8
PU12
NTC
100K_0402_5%
PR160
1
2
PR162 0_0402_5%
PC134
1U_0603_6.3V6M
PR159
13K_0402_5%
2
2
PC135
2.2U_0603_6.3V6K
PC127
0.01U_0402_25V7K
0_1206_5%
PR157
10_0402_5%
PL8
HCB4532KF-800T90_1812
1
2
PC133
220U_25V_M
PR156
5VS12
Title
+CPU_CORE
Custom
Date:
R ev
0.1
Sheet
1
44
of
46
Version change list (P.I.R. List)

Item
Page 1 of 1
Fixed Issue
Rev.
PG#
Modify List
0.2
P.35
Change
U17 P/N SA005280110 to SA00001H600
Change symbol
0.2
P.20.31
Change
Y4 and X1 to SJ132P7K220
CRT wave
0.2
P.10
Change L41 to R878 and reserve C619
To meet INTEL SPEC
0.2
Delete reserve
0.2
P.17
Delete R71,74
FACTORY REQUEST
0.2
P.35
Delete JP5 PIN3
To meet CRT SPEC
0.2
P.18
Remove C7
Tune frequency
0.2
P.28
Change C511;515 from 27p to 18p
EMI Request
0.2
10
EMI Request
0.2
P.30
LAN RX TX change
11
EMI Request
0.2
P.32
ADD D22;23;24
12
EMI Request
0.2
P.4
Delete ITP_BPM0-5 and R515
13
FAN issue
0.2
P.4
USB port 2 and 4 can't work
Change C148.C442.C171.C400.C606.C607 from 2200P to 22N

Delete C171
14
1.0
USB issue
change C632 to 2.2nF
P.21
Remove R441,R145,C6,12,13, change L2,3,4 to SM01000AL00
Change R276 from 10k to 1k ohm C341 from 1000p to 100p

Change USB port 2 to NEW card port 7 to USB
Change R322 to 22 ohm
15
Remove LPC debug connect
1.0
16
ESD Request and reserve
1.0
17
Power improve
1.0
18
0.2
19
0.2
20
0.2
P.33
Remove JP13,R265,R441,R145
ADD T48 AND R515 AND JP9 29,30 pin to GND
P.6
RemoveC26,31,314,315
l.c
om
tm
ai

ho
Title
Rev
xa
in
Document Number
Date:
he
Size
f@
HW PIR
Sheet
E
45
of
46
Version change list (P.I.R. List)

Item
Fixed Issue
Reason for change
Rev.
PG#
Modify List
Page 1 of 2
for PWR
Date
Phase
+1.5VSP output voltage is 2V.
Power sequence update for 1.5VS.
Power sequence update for +VCCPP.
Reduce the overshoot on P2 point.
IFL01 issue.
0.2
Symbol issue.
DFB team request.
0.2
1/3
Noise issue for idle.
Noise issue for idle.
0.2
BOM error for +1.5VSP output.
0.2
0.2
1.Change the PR132 for 30K to 20K.
03/20/07
DVT
04/09/07
PVT
04/09/07
PVT
1.Add the PR1 10_1206 and PD1 RZ24B.
04/09/07
PVT
1.Change the symbol for the PZD1,PD2,PD3,PD4 and PQ21.
04/09/07
PVT
1.Change the PC133 from 100U to 220U 25V.
04/09/07
PVT
1.Add the PC163 0.1u_0402_16V.

HW request.
2.Change the PR212 from O to 47K.

1.Add the PC97 0.1u_0402_16V.
HW request.
0.2
5
2.Change the PR103 from O to 56K.

Title
PIR (PWR)
Size
Document Number
Date:
IHL00
LA-3581P
Sheet
1
46
of
46
Rev
0.2

Lenovo G400 (Compal LA-3781P) Free Laptop Schematics

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A

Everest Schematics Document

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

Model Name : Everest

Intel Calistoga GMCH Memory BUS(DDRII)

New Card MINI Card

1.8V DDRII 533/667

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

0.9V switched power rail for DDR terminator

VCCP switched power rail

1.5V switched power rail

External PCI Devices

1.8V power rail for DDR

1.8V switched power rail

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

ICH7M SM Bus address

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

This shall place near CPU

H_THERMDA, H_THERMDC routing together.

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

Close to CPU pin AD26

Length match within 25 mils

Close to CPU pin

Resistor placed within

POWER, GROUNG, RESERVED SIGNALS AND NC

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

South Side Secondary

North Side Secondary

(Place these capacitors on South side,Secondary Layer)

9/25 10U checked. OK for use!

(Place these capacitors on North side,Secondary Layer)

(Place these capacitors on South side,Primary Layer)

(Place these capacitors on North side,Primary Layer)

Compal Electronics, Inc.

Compal Secret Data

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

DDR SYS MEMORY A

DDR SYS MEMORY B

Compal Electronics, Inc.

Compal Secret Data

Friday, May 18, 2007

2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N0