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PWA : Y507R
PWB : Y509R Calpella Intel Discrete Block Diagram SYSTEM POWER
SCH : Y510R PCH REGULATOR SYS VR VGA Core
VER : D3A +1.05V_PCH +5V_ALW2/+3.3V_ALW +VCC_GFX_CORE
PG 49 +5V_ALW/+15V_ALW PG 51 +1.1V_GFX_PCIE PG 52

DDR3 VR CPU VR REGULATOR


A
POWER +1.5V_SUS/+0.75V_DDR_VTTPG 47 +1.1V_VTT PG 48 +1.8V_RUN PG 46 A

CLOCK FAN & THERMAL Clarksfield


AC/BATT CONNECTOR PG 55
SLG8SP585V EMC1422 (Qual Core) Load Switch VCC Core VGA VDDCI
BATT CHARGER (QFN-64) PG 15 (8P TSSOP) +5V_SUS/+3.3V_SUS/+5V_RUN/ +VCC_CORE +VDDCI
PG 45 PG 37 +3.3V_RUN/+1.5V_RUN/
+1.5V_GDDR PG 54 PG 50 PG 53

HDMI
800 / 1066 MHZ DDR III HDMI CONN. PG 23
DDR3-SODIMM1 PG 13
PCIEx16 AMD M96XT
DP
DISPLAYPORT PG 23
800 / 1066 MHZ DDR III (989 PGA) PCI EXPRESS GFX
DDR3-SODIMM2 PG 14 PG 3,4,5,6
(962 FCBGA)
LVDS
Panel Connector PG 24
Subwoofer DMI x 4
Subwoofer AMP
CONN PG 40 VGA
MAXIM MAX9759 PG 17,18,19,20 CRT CONN.
B PG 25 B

(16 Pin TQFN) PG 40 AUDIO


MIC
IDT 92HD73C
IHDA
GPU THERMAL
Internal Speaker Amplifier DDR3 x 8 (1G, 64Mx16 bit)
Ibex Peak-M (100P FBGA)
ANALOG DEVICES ADM1032
TI TPA6040A4
(8 MSOP) 3 x 3 mm
(32 Pin QFN) (56 LQFP) PG 21,22 PG 20
PG 39
HP2 9 x 9 mm
PCIE [1]
Amplifier
USB2.0 [5] WWAN MINI-CARD PG 32
TI TPA4411MRTJR
HP1
(20 Pin QFN) PG 39 PG 38
PCIE [2]
Camera + D-MIC USB2.0 [4] WLAN Half MINI-CARD PG 31
PG 35
USB2.0 [11]
PCIE [3]
USB2.0 [9]
TV CONN PG 33
USB2.0 [6] UWB/BT MINI-CARD PG 32
C C

USB CONN USB2.0 x 2 [0:1] PCIE [4] Express Switch


USB2.0 [7] Express Card PG 28
RICOH R5538D001
USB2.0 [8] (20 QFN) 4 x 4 mm
USB/eSATA Combo PG 28
PG 33 & eSATA board
SATA2 [A5]
SATA2 [A1] LAN
PCIE [6] Magnetic RJ45
SATA2 [A0] Broadcom BCM5784M
SATA-ODD PG 34 (68P QFN) PG 42 PG 42
PCIE [5] PG 41
PG 7,8,9,10,11,12
SATA-HDD PG 34
LPC
PAD & System To IO Board To Daughter Board
1394 CONN PC Card/1394 SCREW & Reset (USB*2/ MIC/ (Power Button/Speaker/
PG 27
SIO SPRING Circuit HP2/ HP1/ LED) KB LED/Touch PAD/
RICOH R5U230
SPI ITE ITE8512E SMBus [2] Media Button)
(48 Pin QFN)
CardReader (128 Pin LQFP) PG 44 PG 43 PG 40 PG 35
6 x 6 mm
CONN PG 27 PG 26 16 x 16 mm
D PG 29 D

PS/2 QUANTA
SPI ROM
Keyboard CIR Touchpad Media Button LED RTC Title
COMPUTER
2MB BLOCK DIAGRAM
RM5 MB PCB (rev D)
(8 Pin SO8W) PG 30 PG 35 PG 30 PG 36 PG 30 Size Document Number Rev
Calpella 3A

Date: Thursday, August 20, 2009 Sheet 1 of 61


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Table of Contents Power States


CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
1 Block Diagram
2 Front Page +PWR_SRC 10V~+19V 24,30,45,46,47,48,49,50,51,52,53 MAIN POWER S0~S5
3-6 CPU (Clarksfield)
+RTC_CELL +3.0V~+3.3V 8,11,29,30 RTC S0~S5
7-12 PCH (IBex Peak-M)
A 13-14 DDR3 SO-DIMM(204P) +3.3V_ALW +3.3V 3,29,30,34,35,36,43,45,51,54,55 8051 POWER ALWON S0~S5 A

15 Clock Generator
+5V_ALW +5V 24,33,34,35,47,51,52,54 LCD/CHARGE POWER ALWON S0~S5
16-22 GPU (M96XT)
23 HDMI & DP +15V_ALW +15V 24,34,51,54 LARGE POWER +5V_ALW S0~S5
24 LCD connector
+3.3V_LAN +3.3V 41,42 LAN POWER AUX_ON
25 CRT
26 Card reader PCIe interface +5V_SUS +5V 11,46,48,49,52,53,54 SLP_S5# CTRLD POWER SUS_ON
27 Card reader & 1394 CONN 7,8,9,10,11,20,24,28,29,42,43,46,47,48,
+3.3V_SUS +3.3V 49,52,53,54 SLP_S5# CTRLD POWER 3.3V_SUS_ON
28 Express card
29 SIO (IT8512) +1.5V_SUS +1.5V 3,5,13,14,47,52,54 SODIMM POWER SUS_ON
30 Flash/RTC/CIR
+0.75V_DDR_VTT +0.75V 13,14,47,54 SODIMM POWER SUS_ON
31 WLAN
32 WWAN/WPAN +5V_RUN +5V 11,18,23,25,33,35,36,37,38,50,54 SLP_S3# CTRLD POWER RUN_ON
33 USB & eSATA & TV 7,8,9,10,11,13,14,15,18,23,24,26,28,29,30,31,
+3.3V_RUN +3.3V 32,33,34,35,36,37,38,39,40,41,50,52,54,56 SLP_S3# CTRLD POWER 3.3V_RUN_ON
34 SATA HDD & ODD
B 35 KB/CCD/UI +1.8V_RUN +1.8V 5,11,17,18,19,46,54 SDVO POWER RUN_ON B

36 LED
+1.5V_RUN +1.5V 28,31,32,54 PCH POWER 1.5V_RUN_ON
37 FAN/Thermal
38-40 Audio/CONN/Subwoofer (92HD73C). +1.1V_VTT +1.1V 3,5,10,11,48,50,56 CPU POWER RUN_ON
41-42 LAN/RJ45 (BCM5784M)
+1.05V_PCH +1.05V 8,9,11,15,49 PCH POWER RUN_ON
43 System Reset Circuit
44 PAD & SCREW & SPRING +VCC_CORE +0.7V~+1.5V 5,50 CPU CORE POWER IMVP_VR_ON
45 CHARGER (MAX8731A) LCDVCC_TST_EN
+LCDVCC +3.3V 24 LCD Power & ENVDD
46 1.8V_RUN (TPS51218)
47 1.5_SUS/0.75(TPS51116) +5V_MOD +5V 34 Module Power MODC_EN#
48 1.1V_VTT(TPS51218)
+5V_HDD +5V 34 HDD Power HDDC_EN#
49 1.05V_PCH (TPS51218)
50 VCC_CORE(MAX17036GTL+) +5V_ALW2 +5V 35,36,51,54,55 LED power source LDO output
51 3.3V/5V/15V (MAX17020)
52 VGA_M97(MAX8792)
C C
53 VDDCI_M97(TPS51218)
54 Run Power Switch GND PLANE PAGE DESCRIPTION
55 DCIN & Batt
56 XDP Connector AGND 38,39,40
57 Power Block Diagram
AGND_DC/DC 51
58 SMBUS BLOCK
59 Power status AGND_VCORE 50

GND ALL

D D

QUANTA
Title
COMPUTER
FRONTPAGE

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 2 of 61


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5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)


U38A U38B
B26 R480 49.9/F H_COMP3 AT23
PEG_ICOMPI COMP3
PEG_ICOMPO A26 BCLK A16 CLK_CPU_BCLK 10

MISC
A24 B27 H_COMP2 AT24 B16 CLK_CPU_BCLK# 10
7 DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK#
C23 A25 R479 750/F 6/23: Pull SKTOCC# to EC
7 DMI_TXN1 DMI_RX#[1] PEG_RBIAS

CLOCKS
B22 PCIE_MRX_GTX_N[0..15] 16 H_COMP1 G16 AR30 BCLK_ITP 56
7 DMI_TXN2 DMI_RX#[2] according to EC request COMP1 BCLK_ITP
A21 K35 PCIE_MRX_GTX_N15 AT30 BCLK_ITP# 56
7 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] BCLK_ITP#
J34 PCIE_MRX_GTX_N14 H_COMP0 AT26
PEG_RX#[1] PCIE_MRX_GTX_N13 COMP0
7 DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 PEG_CLK E16 CLK_PCIE_3GPLL 9
D23 G35 PCIE_MRX_GTX_N12 D16 CLK_PCIE_3GPLL# 9
7 DMI_TXP1 DMI_RX[1] PEG_RX#[3] PEG_CLK# +1.1V_VTT

DMI
B23 G32 PCIE_MRX_GTX_N11 29 SKTOCC# AH24
7 DMI_TXP2 DMI_RX[2] PEG_RX#[4] SKTOCC#
A22 F34 PCIE_MRX_GTX_N10 A18
D 7 DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK D
F31 PCIE_MRX_GTX_N9 A17
PEG_RX#[6] PCIE_MRX_GTX_N8 H_CATERR# DPLL_REF_SSCLK#
7 DMI_RXN0 D24 DMI_TX#[0] PEG_RX#[7] D35 AK14 CATERR#

THERMAL
G24 E33 PCIE_MRX_GTX_N7
7 DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 PCIE_MRX_GTX_N6
7 DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
H23 D32 PCIE_MRX_GTX_N5 F6 DDR3_DRAMRST# 13,14
7 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] SM_DRAMRST#
B32 PCIE_MRX_GTX_N4 AT15 R246
PEG_RX#[11] 10 H_PECI PECI
D25 C31 PCIE_MRX_GTX_N3 AL1 SM_RCOMP_0 10K R247
7 DMI_RXP0 DMI_TX[0] PEG_RX#[12] SM_RCOMP[0]
F24 B28 PCIE_MRX_GTX_N2 AM1 SM_RCOMP_1 10K
7 DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[1]
E23 B30 PCIE_MRX_GTX_N1 AN1 SM_RCOMP_2 PM_EXTTS#0_R
7 DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[2]
G23 A31 PCIE_MRX_GTX_N0 H_PROCHOT# AN26
7 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT#
PCIE_MRX_GTX_P[0..15] 16 AN15 PM_EXTTS#0_RR245 0 PM_EXTTS#0 13 PM_EXTTS#1_R
PM_EXT_TS#[0]

DDR3
MISC
J35 PCIE_MRX_GTX_P15 AP15 PM_EXTTS#1_RR248 0 PM_EXTTS#1 14
PEG_RX[0] PM_EXT_TS#[1]

2
H34 PCIE_MRX_GTX_P14
PEG_RX[1] PCIE_MRX_GTX_P13 H_THERM# R249
PEG_RX[2] H33 10 H_THERM# AK15 THERMTRIP#
E22 F35 PCIE_MRX_GTX_P12 *12.4K/F_NC
FDI_TX#[0] PEG_RX[3] PCIE_MRX_GTX_P11
5/14: Change FDI signals D21 FDI_TX#[1] PEG_RX[4] G33
PCIE_MRX_GTX_P10
D19 E34 AT28 XDP_PRDY# 56
from GND to NC to support

1
FDI_TX#[2] PEG_RX[5] PCIE_MRX_GTX_P9 PRDY# XDP_PREQ#
D18 FDI_TX#[3] PEG_RX[6] F32 PREQ# AP27 XDP_PREQ# 56
Arrandale discrete G21 FDI_TX#[4] PEG_RX[7] D34 PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P7 XDP_TCLK
PCI EXPRESS -- GRAPHICS
E19 FDI_TX#[5] PEG_RX[8] F33 TCK AN28 XDP_TCLK 56
F21 B33 PCIE_MRX_GTX_P6 56 H_CPURST# R499 1K H_CPURST#_R AP26 AP28 XDP_TMS XDP_TMS 56
FDI_TX#[6] PEG_RX[9] RESET_OBS# TMS
Intel(R) FDI

PWR MANAGEMENT
G18 D31 PCIE_MRX_GTX_P5 AT27 XDP_TRST# XDP_TRST# 56
FDI_TX#[7] PEG_RX[10] PCIE_MRX_GTX_P4 TRST#

JTAG & BPM


PEG_RX[11] A32
C30 PCIE_MRX_GTX_P3 AL15 AT29 XDP_TDI_R
PEG_RX[12] 7 PM_SYNC PM_SYNC TDI PAD T85 PAD T10
D22 A28 PCIE_MRX_GTX_P2 AR27 XDP_TDO_R
FDI_TX[0] PEG_RX[13] TDO PAD T76 PAD T75
C21 B29 PCIE_MRX_GTX_P1 AR29 XDP_TDI_M
FDI_TX[1] PEG_RX[14] TDI_M PAD T82 PAD T49
D20 A30 PCIE_MRX_GTX_P0 AN14 AP29 XDP_TDO_M
FDI_TX[2] PEG_RX[15] T12 PAD VCCPWRGOOD_1 TDO_M PAD T80
C18 FDI_TX[3]
G22 L33 PCIE_MTX_GRX_C_N15 AN25 H_DBR#_R R495 0 XDP_DBRESET# 7,56
FDI_TX[4] PEG_TX#[0] PCIE_MTX_GRX_C_N14 R180 0 DBR#
E20 FDI_TX[5] PEG_TX#[1] M35 10,56 H_CPUPWRGD AN27 VCCPWRGOOD_0
F20 M33 PCIE_MTX_GRX_C_N13 XDP_OBS[0:7] 56
FDI_TX[6] PEG_TX#[2] PCIE_MTX_GRX_C_N12 XDP_OBS0_R R203 0 XDP_OBS0
G19 FDI_TX[7] PEG_TX#[3] M30 BPM#[0] AJ22
L31 PCIE_MTX_GRX_C_N11 R210 0 VDDPWRGOOD_R AK13 AK22 XDP_OBS1_R R211 0 XDP_OBS1
PEG_TX#[4] 7 PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
F17 K32 PCIE_MTX_GRX_C_N10 AK24 XDP_OBS2_R R207 0 XDP_OBS2
C FDI_FSYNC[0] PEG_TX#[5] PCIE_MTX_GRX_C_N9 BPM#[2] XDP_OBS3_R R206 0 XDP_OBS3 C
E17 FDI_FSYNC[1] PEG_TX#[6] M29 BPM#[3] AJ24
J31 PCIE_MTX_GRX_C_N8 VTTPWRGOOD AM15 AJ25 XDP_OBS4_R R198 0 XDP_OBS4
PEG_TX#[7] PCIE_MTX_GRX_C_N7 VTTPWRGOOD BPM#[4] XDP_OBS5_R R201 0 XDP_OBS5
C17 FDI_INT PEG_TX#[8] K29 BPM#[5] AH22
H30 PCIE_MTX_GRX_C_N6 AK23 XDP_OBS6_R R204 0 XDP_OBS6
PEG_TX#[9] PCIE_MTX_GRX_C_N5 BPM#[6] XDP_OBS7_R R197 0 XDP_OBS7
F18 FDI_LSYNC[0] PEG_TX#[10] H29 56 H_PWRGD_XDP AM26 TAPPWRGOOD BPM#[7] AH23
D17 F29 PCIE_MTX_GRX_C_N4
FDI_LSYNC[1] PEG_TX#[11] PCIE_MTX_GRX_C_N3
PEG_TX#[12] E28
D29 PCIE_MTX_GRX_C_N2 R241 1.5K/F RSTIN# AL14
R158 R170 PEG_TX#[13] PCIE_MTX_GRX_C_N1 9,16,26,28,29,31,32,41,56 PLTRST# RSTIN#
PEG_TX#[14] D27 = 1.1V
1K 1K C26 PCIE_MTX_GRX_C_N0
PEG_TX#[15] R242
L34 PCIE_MTX_GRX_C_P15 Clarksfield/Auburndale
PEG_TX[0] PCIE_MTX_GRX_C_P14 750/F
PEG_TX[1] M34
M32 PCIE_MTX_GRX_C_P13 +1.5V_SUS 4/27: Change R200 to 1.1K
PEG_TX[2] PCIE_MTX_GRX_C_P12
L30
PEG_TX[3]
M31 PCIE_MTX_GRX_C_P11 and R202 to 3K according +3.3V_ALW
PEG_TX[4]
PEG_TX[5] K31 PCIE_MTX_GRX_C_P10 to Intel Design guide 1.52
M28 PCIE_MTX_GRX_C_P9 R200 C851 0.1U/10V
PEG_TX[6] PCIE_MTX_GRX_C_P8
PEG_TX[7] H31 H_VTTPWRGD
K28 PCIE_MTX_GRX_C_P7 1.1K/F = 1.075V
PEG_TX[8] high level:1.1V

5
G30 PCIE_MTX_GRX_C_P6 U55
PEG_TX[9] PCIE_MTX_GRX_C_P5 VDDPWRGOOD_R
PEG_TX[10] G29 43,48 1.1V_VTT_PWRGD 2
F28 PCIE_MTX_GRX_C_P4 4 1 2 VTTPWRGOOD
PEG_TX[11] PCIE_MTX_GRX_C_P3 R243 2K/F
PEG_TX[12] E27 DG 1.1, processor requires this 1

2
D28 PCIE_MTX_GRX_C_P2 R202
PEG_TX[13] pin to be never driven high before

3
C27 PCIE_MTX_GRX_C_P1 from power 74AHC1G08GW R244 +1.1V_VTT
PEG_TX[14] PCIE_MTX_GRX_C_P0 3K/F DDR3 voltage planes have ramped
PEG_TX[15] C25 +1.1V_VTT circuit
to a stable value. It requires a 1K/F XDP_TMS R489 *51_NC
1.05V or 1.1V Suspend power rail XDP_TDI_R R528 *51_NC

1
XDP_PREQ# R190 *51_NC
Clarksfield/Auburndale XDP_TCLK R168 *51_NC

PCIE_MTX_GRX_C_N0 10 C619 0.1U PCIE_MTX_GRX_N0


PCIE_MTX_GRX_N[0..15] 16 5/3: Added buffer to prevent
H_THERMTRIP# 51 DDR3 Compensation Signals
B PCIE_MTX_GRX_C_N1 10 C604 0.1U PCIE_MTX_GRX_N1 Thermtrip power good voltage to fluctuate B
PCIE_MTX_GRX_C_N2 10 C621 0.1U PCIE_MTX_GRX_N2
PCIE_MTX_GRX_C_N3 10 C606 0.1U PCIE_MTX_GRX_N3 SM_RCOMP_2

3
PCIE_MTX_GRX_C_N4 10 C623 0.1U PCIE_MTX_GRX_N4 SM_RCOMP_1
PCIE_MTX_GRX_C_N5 10 C608 0.1U PCIE_MTX_GRX_N5 H_CPUPWRGD 2 SM_RCOMP_0 JTAG MAPPING
PCIE_MTX_GRX_C_N6 10 C625 0.1U PCIE_MTX_GRX_N6 A
PCIE_MTX_GRX_C_N7 10 C610 0.1U PCIE_MTX_GRX_N7 Q37

1
PCIE_MTX_GRX_C_N8 10 C632 0.1U PCIE_MTX_GRX_N8 MMST3904-7-F R221 R218 R214 XDP_TDI_R XDP_TDI 56
PCIE_MTX_GRX_C_N9 10 C633 0.1U PCIE_MTX_GRX_N9 Layout Note: Place R529 0
PCIE_MTX_GRX_C_N10 10 C636 0.1U PCIE_MTX_GRX_N10 130/F 24.9/F 100/F
PCIE_MTX_GRX_C_N11 10 C637 0.1U PCIE_MTX_GRX_N11 H_THERM#
these resistors XDP_TDO_M
near Processor XDP_TDO 56
PCIE_MTX_GRX_C_N12 10 C640 0.1U PCIE_MTX_GRX_N12 R522 *0_NC
PCIE_MTX_GRX_C_N13 10 C645 0.1U PCIE_MTX_GRX_N13 B
PCIE_MTX_GRX_C_N14 10 C648 0.1U PCIE_MTX_GRX_N14 C XDP_TRST#
PCIE_MTX_GRX_C_N15 10 C650 0.1U PCIE_MTX_GRX_N15 R521

PCIE_MTX_GRX_P[0..15] 16 0
PCIE_MTX_GRX_C_P0 10 C618 0.1U PCIE_MTX_GRX_P0 D R290
PCIE_MTX_GRX_C_P1 10 C603 0.1U PCIE_MTX_GRX_P1 Processor Pullups Processor
PCIE_MTX_GRX_C_P2 10 C620 0.1U PCIE_MTX_GRX_P2 +1.1V_VTT XDP_TDI_M 51
PCIE_MTX_GRX_C_P3 10 C605 0.1U PCIE_MTX_GRX_P3 RSTIN#
Compensation R525 *0_NC
PAD T42 F
PCIE_MTX_GRX_C_P4 10 C622 0.1U PCIE_MTX_GRX_P4 Signals
PCIE_MTX_GRX_C_P5 10 C607 0.1U PCIE_MTX_GRX_P5 CLK_CPU_BCLK H_COMP0 XDP_TDO_R
PCIE_MTX_GRX_C_P6 10 C624 0.1U PCIE_MTX_GRX_P6 R490 0
PCIE_MTX_GRX_C_P7 10 C609 0.1U PCIE_MTX_GRX_P7 CLK_CPU_BCLK# H_COMP1 E
PCIE_MTX_GRX_C_P8 10 C630 0.1U PCIE_MTX_GRX_P8 R208 R306 R501
PCIE_MTX_GRX_C_P9 10 C631 0.1U PCIE_MTX_GRX_P9 H_COMP2 Scan Chain STUFF -> A, C, E
PCIE_MTX_GRX_C_P10 10 C634 0.1U PCIE_MTX_GRX_P10 49.9/F 49.9/F *68_NC
PCIE_MTX_GRX_C_P11 10 C635 0.1U PCIE_MTX_GRX_P11 H_COMP3
(Default) NO STUFF -> B, D
For Boundary scan purpose!
PCIE_MTX_GRX_C_P12 10 C638 0.1U PCIE_MTX_GRX_P12 H_CATERR# STUFF -> A, B
PCIE_MTX_GRX_C_P13 10 C641 0.1U PCIE_MTX_GRX_P13 H_PROCHOT# CPU Only
PCIE_MTX_GRX_C_P14 10 C646 0.1U PCIE_MTX_GRX_P14 H_CPURST#_R R310 R156 R238 R239
NO STUFF -> C, D, E
PCIE_MTX_GRX_C_P15 10 C649 0.1U PCIE_MTX_GRX_P15 STUFF -> D, E
H_PROCHOT# 49.9/F 49.9/F 20/F 20/F PCH Only
A NO STUFF -> A, B, C A
use : pull to 68 ohm
unused : pull to 50 ohm

QUANTA
Title
COMPUTER
CPU 1/4(PEG/DMI)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 3 of 61


5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)


U38C U38D

SA_CK[0] AA6 M_A_CLK0 13 SB_CK[0] W8 M_B_CLK0 14


SA_CK#[0] AA7 M_A_CLK0# 13 14 M_B_DQ[63:0] SB_CK#[0] W9 M_B_CLK0# 14
P7 M_A_CKE0 13 M_B_DQ0 B5 M3 M_B_CKE0 14
13 M_A_DQ[63:0] SA_CKE[0] SB_DQ[0] SB_CKE[0]
M_A_DQ0 A10 M_B_DQ1 A5
M_A_DQ1 SA_DQ[0] M_B_DQ2 SB_DQ[1]
D
C10 SA_DQ[1] C3 SB_DQ[2] D
M_A_DQ2 C7 M_B_DQ3 B3 V7 M_B_CLK1 14
M_A_DQ3 SA_DQ[2] M_B_DQ4 SB_DQ[3] SB_CK[1]
A7 SA_DQ[3] SA_CK[1] Y6 M_A_CLK1 13 E4 SB_DQ[4] SB_CK#[1] V6 M_B_CLK1# 14
M_A_DQ4 B10 Y5 M_A_CLK1# 13 M_B_DQ5 A6 M2 M_B_CKE1 14
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ6 SB_DQ[5] SB_CKE[1]
D10 SA_DQ[5] SA_CKE[1] P6 M_A_CKE1 13 A4 SB_DQ[6]
M_A_DQ6 E10 M_B_DQ7 C4
M_A_DQ7 SA_DQ[6] M_B_DQ8 SB_DQ[7]
A8 SA_DQ[7] D1 SB_DQ[8]
M_A_DQ8 D8 M_B_DQ9 D2
M_A_DQ9 SA_DQ[8] M_B_DQ10 SB_DQ[9]
F10 SA_DQ[9] SA_CS#[0] AE2 M_A_CS#0 13 F2 SB_DQ[10] SB_CS#[0] AB8 M_B_CS#0 14
M_A_DQ10 E6 AE8 M_A_CS#1 13 M_B_DQ11 F1 AD6 M_B_CS#1 14
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ12 SB_DQ[11] SB_CS#[1]
F7 SA_DQ[11] C2 SB_DQ[12]
M_A_DQ12 E9 M_B_DQ13 F5
M_A_DQ13 SA_DQ[12] M_B_DQ14 SB_DQ[13]
B7 SA_DQ[13] F3 SB_DQ[14]
M_A_DQ14 E7 AD8 M_A_ODT0 13 M_B_DQ15 G4 AC7 M_B_ODT0 14
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ16 SB_DQ[15] SB_ODT[0]
C6 SA_DQ[15] SA_ODT[1] AF9 M_A_ODT1 13 H6 SB_DQ[16] SB_ODT[1] AD1 M_B_ODT1 14
M_A_DQ16 H10 M_B_DQ17 G2
M_A_DQ17 SA_DQ[16] M_B_DQ18 SB_DQ[17]
G8 SA_DQ[17] J6 SB_DQ[18]
M_A_DQ18 K7 M_B_DQ19 J3
M_A_DQ19 SA_DQ[18] M_B_DQ20 SB_DQ[19]
J8 SA_DQ[19] G1 SB_DQ[20] M_B_DM[7:0] 14
M_A_DQ20 G7 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ21 SA_DQ[20] M_B_DQ22 SB_DQ[21] SB_DM[0] M_B_DM1
G10 SA_DQ[21] M_A_DM[7:0] 13 J2 SB_DQ[22] SB_DM[1] E1
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ23 J1 H3 M_B_DM2
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ24 SB_DQ[23] SB_DM[2] M_B_DM3
J10 SA_DQ[23] SA_DM[1] D7 J5 SB_DQ[24] SB_DM[3] K1
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ25 SA_DQ[24] SA_DM[2] M_A_DM3 M_B_DQ26 SB_DQ[25] SB_DM[4] M_B_DM5
M6 SA_DQ[25] SA_DM[3] M7 L3 SB_DQ[26] SB_DM[5] AL2
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ27 M1 AR4 M_B_DM6
M_A_DQ27 SA_DQ[26] SA_DM[4] M_A_DM5 M_B_DQ28 SB_DQ[27] SB_DM[6] M_B_DM7
L9 SA_DQ[27] SA_DM[5] AM7 K5 SB_DQ[28] SB_DM[7] AT8
M_A_DQ28 L6 AN10 M_A_DM6 M_B_DQ29 K4
M_A_DQ29 SA_DQ[28] SA_DM[6] M_A_DM7 M_B_DQ30 SB_DQ[29]
K8 SA_DQ[29] SA_DM[7] AN13 M4 SB_DQ[30]
M_A_DQ30 N8 M_B_DQ31 N5
M_A_DQ31 SA_DQ[30] M_B_DQ32 SB_DQ[31]
C P9 SA_DQ[31] AF3 SB_DQ[32]
C
M_A_DQ32 AH5 M_B_DQ33 AG1
SA_DQ[32] SB_DQ[33] M_B_DQS#[7:0] 14
M_A_DQ33 AF5 M_B_DQ34 AJ3 D5 M_B_DQS#0
SA_DQ[33] M_A_DQS#[7:0] 13 SB_DQ[34] SB_DQS#[0]
M_A_DQ34 AK6 C9 M_A_DQS#0 M_B_DQ35 AK1 F4 M_B_DQS#1
SA_DQ[34] SA_DQS#[0] SB_DQ[35] SB_DQS#[1]
DDR SYSTEM MEMORY A

M_A_DQ35 AK7 F8 M_A_DQS#1 M_B_DQ36 AG4 J4 M_B_DQS#2


M_A_DQ36 SA_DQ[35] SA_DQS#[1] M_A_DQS#2 M_B_DQ37 SB_DQ[36] SB_DQS#[2] M_B_DQS#3
AF6 SA_DQ[36] SA_DQS#[2] J9 AG3 SB_DQ[37] SB_DQS#[3] L4
M_A_DQ37 AG5 N9 M_A_DQS#3 M_B_DQ38 AJ4 AH2 M_B_DQS#4
SA_DQ[37] SA_DQS#[3] SB_DQ[38] SB_DQS#[4]

DDR SYSTEM MEMORY - B


M_A_DQ38 AJ7 AH7 M_A_DQS#4 M_B_DQ39 AH4 AL4 M_B_DQS#5
M_A_DQ39 SA_DQ[38] SA_DQS#[4] M_A_DQS#5 M_B_DQ40 SB_DQ[39] SB_DQS#[5] M_B_DQS#6
AJ6 SA_DQ[39] SA_DQS#[5] AK9 AK3 SB_DQ[40] SB_DQS#[6] AR5
M_A_DQ40 AJ10 AP11 M_A_DQS#6 M_B_DQ41 AK4 AR8 M_B_DQS#7
M_A_DQ41 SA_DQ[40] SA_DQS#[6] M_A_DQS#7 M_B_DQ42 SB_DQ[41] SB_DQS#[7]
AJ9 SA_DQ[41] SA_DQS#[7] AT13 AM6 SB_DQ[42]
M_A_DQ42 AL10 M_B_DQ43 AN2
M_A_DQ43 SA_DQ[42] M_B_DQ44 SB_DQ[43]
AK12 SA_DQ[43] AK5 SB_DQ[44]
M_A_DQ44 AK8 M_B_DQ45 AK2
M_A_DQ45 SA_DQ[44] M_B_DQ46 SB_DQ[45]
AL7 SA_DQ[45] M_A_DQS[7:0] 13 AM4 SB_DQ[46]
M_A_DQ46 AK11 C8 M_A_DQS0 M_B_DQ47 AM3
SA_DQ[46] SA_DQS[0] SB_DQ[47] M_B_DQS[7:0] 14
M_A_DQ47 AL8 F9 M_A_DQS1 M_B_DQ48 AP3 C5 M_B_DQS0
M_A_DQ48 SA_DQ[47] SA_DQS[1] M_A_DQS2 M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQS1
AN8 SA_DQ[48] SA_DQS[2] H9 AN5 SB_DQ[49] SB_DQS[1] E3
M_A_DQ49 AM10 M9 M_A_DQS3 M_B_DQ50 AT4 H4 M_B_DQS2
M_A_DQ50 SA_DQ[49] SA_DQS[3] M_A_DQS4 M_B_DQ51 SB_DQ[50] SB_DQS[2] M_B_DQS3
AR11 SA_DQ[50] SA_DQS[4] AH8 AN6 SB_DQ[51] SB_DQS[3] M5
M_A_DQ51 AL11 AK10 M_A_DQS5 M_B_DQ52 AN4 AG2 M_B_DQS4
M_A_DQ52 SA_DQ[51] SA_DQS[5] M_A_DQS6 M_B_DQ53 SB_DQ[52] SB_DQS[4] M_B_DQS5
AM9 SA_DQ[52] SA_DQS[6] AN11 AN3 SB_DQ[53] SB_DQS[5] AL5
M_A_DQ53 AN9 AR13 M_A_DQS7 M_B_DQ54 AT5 AP5 M_B_DQS6
M_A_DQ54 SA_DQ[53] SA_DQS[7] M_B_DQ55 SB_DQ[54] SB_DQS[6] M_B_DQS7
AT11 SA_DQ[54] AT6 SB_DQ[55] SB_DQS[7] AR7
M_A_DQ55 AP12 M_B_DQ56 AN7
M_A_DQ56 SA_DQ[55] M_B_DQ57 SB_DQ[56]
AM12 SA_DQ[56] AP6 SB_DQ[57]
M_A_DQ57 AN12 M_A_A[15:0] 13 M_B_DQ58 AP8
M_A_DQ58 SA_DQ[57] M_A_A0 M_B_DQ59 SB_DQ[58]
AM13 SA_DQ[58] SA_MA[0] Y3 AT9 SB_DQ[59]
M_A_DQ59 AT14 W1 M_A_A1 M_B_DQ60 AT7
M_A_DQ60 SA_DQ[59] SA_MA[1] M_A_A2 M_B_DQ61 SB_DQ[60]
B
AT12 SA_DQ[60] SA_MA[2] AA8 AP9 SB_DQ[61] B
M_A_DQ61 AL13 AA3 M_A_A3 M_B_DQ62 AR10 M_B_A[15:0] 14
M_A_DQ62 SA_DQ[61] SA_MA[3] M_A_A4 M_B_DQ63 SB_DQ[62] M_B_A0
AR14 SA_DQ[62] SA_MA[4] V1 AT10 SB_DQ[63] SB_MA[0] U5
M_A_DQ63 AP14 AA9 M_A_A5 V2 M_B_A1
SA_DQ[63] SA_MA[5] M_A_A6 SB_MA[1] M_B_A2
SA_MA[6] V8 SB_MA[2] T5
T1 M_A_A7 V3 M_B_A3
SA_MA[7] M_A_A8 SB_MA[3] M_B_A4
SA_MA[8] Y9 SB_MA[4] R1
13 M_A_BS0 AC3 U6 M_A_A9 14 M_B_BS0 AB1 T8 M_B_A5
SA_BS[0] SA_MA[9] M_A_A10 SB_BS[0] SB_MA[5] M_B_A6
13 M_A_BS1 AB2 SA_BS[1] SA_MA[10] AD4 14 M_B_BS1 W5 SB_BS[1] SB_MA[6] R2
13 M_A_BS2 U7 T2 M_A_A11 14 M_B_BS2 R7 R6 M_B_A7
SA_BS[2] SA_MA[11] M_A_A12 SB_BS[2] SB_MA[7] M_B_A8
SA_MA[12] U3 SB_MA[8] R4
AG8 M_A_A13 R5 M_B_A9
SA_MA[13] M_A_A14 SB_MA[9] M_B_A10
SA_MA[14] T3 14 M_B_CAS# AC5 SB_CAS# SB_MA[10] AB5
13 M_A_CAS# AE1 V9 M_A_A15 14 M_B_RAS# Y7 P3 M_B_A11
SA_CAS# SA_MA[15] SB_RAS# SB_MA[11] M_B_A12
13 M_A_RAS# AB3 SA_RAS# 14 M_B_WE# AC6 SB_WE# SB_MA[12] R3
13 M_A_WE# AE9 AF7 M_B_A13
SA_WE# SB_MA[13] M_B_A14
SB_MA[14] P5
N1 M_B_A15
SB_MA[15]

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5]


Clarksfield/Auburndale
A
Requires minimum 12mils spacing A
with all other signals, including data signals.
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
QUANTA
Title
COMPUTER
CPU 2/4(DDR)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 4 of 61


5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)


U38F U38G

AT21 VAXG1
AT19 VAXG2 VAXG_SENSE AR22
5/14: Change to GND to

SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22
AT16
+VCC_CORE +1.1V_VTT support Arrandale disable AR21
VAXG4
5/14: Change to NC to
VAXG5
AR19
AG35 AH14 AR18
VAXG6 support Arrandale disable
VCC1 VTT0_1 VAXG7
AG34 VCC2 VTT0_2 AH12 AR16 VAXG8 GFX_VID[0] AM22
C669 C685 C683 AG33 AH11 AP21 AP22
VCC3 VTT0_3 VAXG9 GFX_VID[1]

GRAPHICS VIDs
D AG32 AH10 +1.1V_VTT AP19 AN22 D
22U 22U 22U VCC4 VTT0_4 VAXG10 GFX_VID[2]
AG31 VCC5 VTT0_5 J14 AP18 VAXG11 GFX_VID[3] AP23
AG30 VCC6 VTT0_6 J13 AP16 VAXG12 GFX_VID[4] AM23
AG29 VCC7 VTT0_7 H14 AN21 VAXG13 GFX_VID[5] AP24

GRAPHICS
AG28 H12 C310 C311 C312 AN19 AN24
C678 C676 C672 VCC8 VTT0_8 VAXG14 GFX_VID[6]
AG27 VCC9 VTT0_9 G14 AN18 VAXG15
AG26 G13 22U 22U 22U AN16
22U 22U 22U VCC10 VTT0_10 VAXG16
AF35 VCC11 VTT0_11 G12 AM21 VAXG17 GFX_VR_EN AR25
AF34 VCC12 VTT0_12 G11 AM19 VAXG18 GFX_DPRSLPVR AT25
AF33 F14 AM18 AM24 R205 1K
VCC13 VTT0_13 C351 C328 C309 VAXG19 GFX_IMON
AF32 VCC14 VTT0_14 F13 AM16 VAXG20
C680 C674 C677 AF31 F12 AL21
VCC15 VTT0_15 22U 22U 22U VAXG21
AF30 VCC16 VTT0_16 F11 AL19 VAXG22
22U 22U 22U AF29 E14 AL18 +1.5V_SUS
VCC17 VTT0_17 VAXG23
AF28 VCC18 VTT0_18 E12 AL16 VAXG24
AF27 VCC19 VTT0_19 D14 AK21 VAXG25 VDDQ1 AJ1
AF26 D13 C365 AK19 AF1
VCC20 VTT0_20 VAXG26 VDDQ2

1.1V RAIL POWER


C679 C684 C686

- 1.5V RAILS
AD35 D12 AK18 AE7 C317 C327 C345 C364 C355
VCC21 VTT0_21 22U VAXG27 VDDQ3
AD34 VCC22 VTT0_22 D11 AK16 VAXG28 VDDQ4 AE4
22U 22U 22U AD33 C14 AJ21 AC1 1U 1U 1U 1U 1U
VCC23 VTT0_23 VAXG29 VDDQ5
AD32 VCC24 VTT0_24 C13 AJ19 VAXG30 VDDQ6 AB7
AD31 VCC25 VTT0_25 C12 Under cavity of the socket AJ18 VAXG31 VDDQ7 AB4
Inside cavity of the socket AD30 VCC26 VTT0_26 C11 AJ16 VAXG32 VDDQ8 Y1
AD29 B14 AH21 W7 C303 C371
VCC27 VTT0_27 VAXG33 VDDQ9

POWER
AD28 VCC28 VTT0_28 B12 AH19 VAXG34 VDDQ10 W4 & no 330U x 1 for
AD27 A14 C708 C709 C707 AH18 U1 22U 22U
C321 C330 C336 VCC29 VTT0_29 VAXG35 VDDQ11 Clarksfield only.
AD26 VCC30 VTT0_30 A13 AH16 VAXG36 VDDQ12 T7
AC35 A12 10U 10U 10U T4
10U 10U 10U VCC31 VTT0_31 VDDQ13
AC34 VCC32 VTT0_32 A11 VDDQ14 P1
AC33 VCC33 VDDQ15 N7
AC32 +1.1V_VTT N4
VCC34 VDDQ16

DDR3
AC31 C706 C616 C613 L1
C C356 C346 C363 VCC35 VDDQ17 C
AC30 VCC36 VTT0_33 AF10 J24 VTT1_45 VDDQ18 H1

FDI
AC29 AE10 10U 10U 10U J23
10U 10U 10U VCC37 VTT0_34 VTT1_46
AC28 VCC38 VTT0_35 AC10 H25 VTT1_47
CPU CORE SUPPLY

AC27 AB10 +1.1V_VTT


VCC39 VTT0_36
AC26 VCC40 VTT0_37 Y10
AA35 W10 C629 C627 P10
C366 VCC41 VTT0_38 VTT0_59
AA34 VCC42 VTT0_39 U10 VTT0_60 N10
AA33 T10 10U 10U L10
10U VCC43 VTT0_40 VTT0_61
AA32 VCC44 VTT0_41 J12 VTT0_62 K10
AA31 VCC45 VTT0_42 J11
AA30 VCC46 VTT0_43 J16 Edge of the socket
Under cavity of the socket AA29 VCC47 VTT0_44 J15
AA28 VCC48

1.1V
AA27 VCC49 330U x 3 put on Power side VTT1_63 J22
AA26 VCC50 K26 VTT1_48 VTT1_64 J20
C378 C393 C392 Y35 J27 J18
VCC51 VTT1_49 VTT1_65

PEG & DMI


Y34 VCC52 J26 VTT1_50 VTT1_66 H21
10U 10U 10U Y33 J25 H20
VCC53 VTT1_51 VTT1_67
Y32 VCC54 H27 VTT1_52 VTT1_68 H19
Y31 VCC55 G28 VTT1_53
Y30 VCC56 G27 VTT1_54
C389 C408 C410 Y29 G26
VCC57 VTT1_55 +1.8V_RUN
Y28 VCC58 F26 VTT1_56
10U 10U 10U Y27 E26 L26
VCC59 VTT1_57 VCCPLL1

1.8V
Y26 VCC60 E25 VTT1_58 VCCPLL2 L27
V35 VCC61 PSI# AN33 H_PSI# 50 VCCPLL3 M26
V34 C666 C665 C313 C304 C668
POWER

C407 C397 C409 VCC62


V33 VCC63
V32 VCC64 VID[0] AK35 VID0 VID0 50 1U 1U 2.2U 4.7U 22U
10U 10U 10U V31 AK33 VID1 VID1 50
VCC65 VID[1]
V30 VCC66 VID[2] AK34 VID2 VID2 50
V29 AL35 VID3 VID3 50
VCC67 VID[3]
CPU VIDS

B VID4 B
Between inductor and V28 VCC68 VID[4] AL33 VID4 50
socket on top layer V27 VCC69 VID[5] AM33 VID5 VID5 50 Clarksfield/Auburndale
V26 VCC70 VID[6] AM35 VID6 VID6 50
U35 VCC71 PROC_DPRSLPVR AM34 DPRSLPVR DPRSLPVR 50
U34 VCC72
U33 VCC73
U32 VCC74 Auburndale : drive VTT_SELECT = 1 for 1.05V
U31 VCC75 VTT_SELECT G15 H_VTTVID1 48 Clarksfield : drive VTT_SELECT = 0 for 1.1V
U30 VCC76
U29 VCC77
U28 +1.1V_VTT
VCC78
U27 VCC79
U26 VCC80
R35 +VCC_CORE
VCC81
R34 VCC82
R33 VCC83
1

R32 AN35 R292 R283 R289 R298 R296 R317 R304 R301 R311
VCC84 ISENSE I_MON 50
R31 R216 1K 1K 1K *1K_NC *1K_NC 1K *1K_NC 1K *1K_NC
VCC85
R30 VCC86
R29 100/F VID0
VCC87 VID1
SENSE LINES

R28 AJ34 VCCSENSE 50


1 2

VCC88 VCC_SENSE VID2


R27 VCC89 VSS_SENSE AJ35 VSSSENSE 50
470U x 4 or 330U x 6 R26 VID3
VCC90 R212 VID4
put on Power side P35 VCC91
P34 B15 VTT_SENSE 48 VID5
VCC92 VTT_SENSE 100/F VID6
P33 VCC93 VSS_SENSE_VTT A15
P32 DPRSLPVR
2

VCC94 H_PSI#
P31 VCC95
P30 VCC96
P29 VCC97
P28 VCC98
P27 R291 R282 R288 R297 R295 R314 R303 R300 R307
A VCC99 *1K_NC *1K_NC *1K_NC 1K 1K *1K_NC 1K *1K_NC 1K A
P26 VCC100

Note : For Validating IMVP VR R?


should be STUFF and R? NO_STUFF QUANTA
Clarksfield/Auburndale Title
COMPUTER
CPU 3/4(POWER)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 5 of 61


5 4 3 2 1
5 4 3 2 1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)


U38H U38I U38E

AT20 VSS1 VSS81 AE34 RSVD32 AJ13


AT17 VSS2 VSS82 AE33 RSVD33 AJ12
AR31
AR28
VSS3 VSS83 AE32
AE31
K27
K9
VSS161 Processor Generated AP25
VSS4 VSS84 VSS162 RSVD1
AR26
AR24
VSS5 VSS85 AE30
AE29
K6
K3
VSS163 SO-DIMM VREF_DQ (M3) AL25
AL24
RSVD2 RSVD34 AH25
AK26
VSS6 VSS86 VSS164 RSVD3 RSVD35
AR23
AR20
VSS7 VSS87 AE28
AE27
J32
J30
VSS165 Connect to page 13, 14 AL22
AJ33
RSVD4
AL26
D VSS8 VSS88 VSS166 RSVD5 RSVD36 D
AR17 VSS9 VSS89 AE26 J21 VSS167 AG9 RSVD6 RSVD_NCTF_37 AR2
AR15 VSS10 VSS90 AE6 J19 VSS168 M27 RSVD7
AR12 AD10 H35 *0_NC L28 AJ26
VSS11 VSS91 VSS169 R140 SA_DIMM_VREF RSVD8 RSVD38
AR9 VSS12 VSS92 AC8 H32 VSS170 M_VREF_DQ_DIMM0 J17 SA_DIMM_VREF RSVD39 AJ27
AR6 AC4 H28 M_VREF_DQ_DIMM1 SB_DIMM_VREF H17
VSS13 VSS93 VSS171 R142 SB_DIMM_VREF
AR3 VSS14 VSS94 AC2 H26 VSS172 G25 RSVD11
AP20 AB35 H24 *0_NC G17
VSS15 VSS95 VSS173 RSVD12
AP17 VSS16 VSS96 AB34 H22 VSS174 E31 RSVD13 RSVD_NCTF_40 AP1
AP13 VSS17 VSS97 AB33 H18 VSS175 E30 RSVD14 RSVD_NCTF_41 AT2
AP10 VSS18 VSS98 AB32 H15 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177 RSVD_NCTF_42 AT3
AP4 VSS20 VSS100 AB30 H11 VSS178 RSVD_NCTF_43 AR1
AP2 VSS21 VSS101 AB29 H8 VSS179
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182 RSVD45 AL28
AN20 AB6 G31 CFG0 AM30 AL29
VSS25 VSS105 VSS183 T48 PAD CFG[0] RSVD46
AN17 VSS26 VSS106 AA10 G20 VSS184 T77 PAD AM28 CFG[1] RSVD47 AP30
AM29 VSS27 VSS107 Y8 G9 VSS185 T36 PAD AP31 CFG[2] RSVD48 AP32
AM27 Y4 G6 CFG3 AL32 AL27
VSS28 VSS108 VSS186 T50 PAD CFG[3] RSVD49
AM25 Y2 G3 CFG4 AL30 AT31
VSS29 VSS109 VSS187 T46 PAD CFG[4] RSVD50
AM20 VSS30 VSS110 W35 F30 VSS188 T53 PAD AM31 CFG[5] RSVD51 AT32
AM17 VSS31 VSS111 W34 F27 VSS189 T79 PAD AN29 CFG[6] RSVD52 AP33
AM14 W33 F25 CFG7 AM32 AR33
VSS32 VSS112 VSS190 T47 PAD CFG[7] RSVD53
AM11 VSS33 VSS113 W32 F22 VSS191 T27 PAD AK32 CFG[8] RSVD_NCTF_54 AT33
AM8 W31 F19 AK31 AT34

RESERVED
VSS34 VSS114 VSS192 T52 PAD CFG[9] RSVD_NCTF_55
AM5 VSS35 VSS115 W30 F16 VSS193 T78 PAD AK28 CFG[10] RSVD_NCTF_56 AP35
AM2 VSS36 VSS116 W29 E35 VSS194 T16 PAD AJ28 CFG[11] RSVD_NCTF_57 AR35
AL34 W28 E32 & NC CFG12 for Clarksfield only. AN30 AR32
C AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS T51
T20
PAD
PAD
AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
C

AL20 VSS40 VSS120 W6 E21 VSS198 T81 PAD AJ29 CFG[15] RSVD_TP_59 E15
AL17 VSS41 VSS121 V10 E18 VSS199 T24 PAD AJ30 CFG[16] RSVD_TP_60 F15 Follow Intel CRB to GND
AL12 VSS42 VSS122 U8 E13 VSS200 T35 PAD AK30 CFG[17] KEY A2
AL9 VSS43 VSS123 U4 E11 VSS201 H16 RSVD_TP_86 RSVD62 D15 PAD T111
AL6 VSS44 VSS124 U2 E8 VSS202 RSVD63 C15
AL3 T35 E5 AJ15 RSVD64_R R700 *0_NC
VSS45 VSS125 VSS203 RSVD64 RSVD65_R R701 *0_NC
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35 RSVD65 AH15
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1 Follow Intel CRB to GND
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34 B19 RSVD15 PAD T112
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34 T113 PAD A19 RSVD16
AK17 T30 D9 B2
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5 R702 *0_NC TP_RSVD17_R
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 A20 RSVD17
AJ23 T28 D3 A35 R703 *0_NC TP_RSVD18_R B20
VSS52 VSS132 VSS210 VSS_NCTF7 RSVD18
AJ20 VSS53 VSS133 T27 C34 VSS211 RSVD_TP_66 AA5
AJ17 VSS54 VSS134 T26 C32 VSS212 T114 PAD U9 RSVD19 RSVD_TP_67 AA4
AJ14 VSS55 VSS135 T6 C29 VSS213 T9 RSVD20 RSVD_TP_68 R8
AJ11 VSS56 VSS136 R10 C28 VSS214 RSVD_TP_69 AD3
AJ8 VSS57 VSS137 P8 C24 VSS215 AC9 RSVD21 RSVD_TP_70 AD2
AJ5 VSS58 VSS138 P4 C22 VSS216 AB9 RSVD22 RSVD_TP_71 AA2 PAD T90
AJ2 VSS59 VSS139 P2 C20 VSS217 RSVD_TP_72 AA1 PAD T96
AH35 VSS60 VSS140 N35 C19 VSS218 RSVD_TP_73 R9
AH34 VSS61 VSS141 N34 C16 VSS219 RSVD_TP_74 AG7
AH33 VSS62 VSS142 N33 B31 VSS220 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
AH32 VSS63 VSS143 N32 B25 VSS221 A3 RSVD_NCTF_24
AH31 VSS64 VSS144 N31 B21 VSS222
AH30 VSS65 VSS145 N30 B18 VSS223 RSVD_TP_76 V4
AH29 VSS66 VSS146 N29 B17 VSS224 RSVD_TP_77 V5
B
AH28 VSS67 VSS147 N28 B13 VSS225 RSVD_TP_78 N2 B
AH27 VSS68 VSS148 N27 B11 VSS226 J29 RSVD26 RSVD_TP_79 AD5
AH26 VSS69 VSS149 N26 B8 VSS227 J28 RSVD27 RSVD_TP_80 AD7
AH20 VSS70 VSS150 N6 B6 VSS228 RSVD_TP_81 W3
AH17 VSS71 VSS151 M10 B4 VSS229 A34 RSVD_NCTF_28 RSVD_TP_82 W2 PAD T89
AH13 VSS72 VSS152 L35 A29 VSS230 A33 RSVD_NCTF_29 RSVD_TP_83 N3
AH9 VSS73 VSS153 L32 A27 VSS231 RSVD_TP_84 AE5
AH6 VSS74 VSS154 L29 A23 VSS232 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
AH3 VSS75 VSS155 L8 A9 VSS233 B35 RSVD_NCTF_31
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2 VSS AP34
AF4 VSS78 VSS158 K34
AF2 VSS79 VSS159 K33 Can be left NC is Intel CRM
AE35 K30 R302
VSS80 VSS160 implementation; ESD/DG
Clarksfield/Auburndale 0 recommendation to GND

Clarksfield/Auburndale Clarksfield/Auburndale

CFG0 R285 *3.01K_NC

CFG3 R294 3.01K


1 0
Scott_0630:Change R294
footprint from RC0402-C to CFG0
CFG4 R281 *3.01K_NC Single PEG (Default) Bifurcation enabled
RC0402 (PCI-Epress
CFG7 R276 *3.01K_NC Configuration Select)

CFG3
(PCI-Epress Static Normal Operation Lane Numbers Reversed
A The Clarksfield processor's PCI (Default) A
Lane Reversal)
Express interface may not meet
PCI Express 2.0 jitter CFG4 Disabled; No Physical Enabled; An external Display
specifications. Intel recommends
placing a 3.01K +/- 5% pull down
(Display Port Display Port attached to port device is connected to QUANTA
Presence) Embedded Diplay Port the Embedded Display port
resistor to VSS on CFG[7] pin for
both rPGA and BGA components.
(Default)
Title
COMPUTER
This pull down resistor should be CFG7 Common For early samples CPU 4/4(GND_RESV)
removed when this issue is fixed. Clarksfield (only for motherboard pre-ES1 CFD Size Document Number Rev
early samples pre-ES1) design (Default) RM5 3A

Date: Thursday, August 20, 2009 Sheet 6 of 61


5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (DMI,FDI,GPIO) IBEX PEAK-M (LVDS,DDI)


U39C U39D
FDI_RXN0 BA18 T48 L_BKLTEN SDVO_TVCLKINN BJ46
3 DMI_RXN0 BC24 DMI0RXN FDI_RXN1 BH17 T47 L_VDD_EN SDVO_TVCLKINP BG46
3 DMI_RXN1 BJ22 DMI1RXN FDI_RXN2 BD16
3 DMI_RXN2 AW20 DMI2RXN FDI_RXN3 BJ16 Y48 L_BKLTCTL SDVO_STALLN BJ48
3 DMI_RXN3 BJ20 DMI3RXN FDI_RXN4 BA16 SDVO_STALLP BG48
FDI_RXN5 BE14 AB48 L_DDC_CLK
3 DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 Y45 L_DDC_DATA SDVO_INTN BF45
3 DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 SDVO_INTP BH45
D 3 DMI_RXP2 BA20 DMI2RXP AB46 L_CTRL_CLK D
3 DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 V48 L_CTRL_DATA
FDI_RXP1 BF17
3 DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 AP39 LVD_IBG SDVO_CTRLCLK T51

SDVO
3 DMI_TXN1 BF21 DMI1TXN FDI_RXP3 BG16 AP41 LVD_VBG SDVO_CTRLDATA T53
3 DMI_TXN2 BD20 DMI2TXN FDI_RXP4 AW16 FDI Disable :
3 DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 NC all signals AT43 LVD_VREFH

Display port B
FDI_RXP6 BB14 AT42 LVD_VREFL DDPB_AUXN BG44
BD22 BD12 as DG 1.1, BJ44
3 DMI_TXP0 DMI0TXP FDI_RXP7 DDPB_AUXP
3 DMI_TXP1 BH21 DMI1TXP
Page 82 & 83 DDPB_HPD AU38

LVDS
3 DMI_TXP2 BC20 DMI2TXP AV53 LVDSA_CLK#
3 DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 LVDS Disable : AV51 LVDSA_CLK DDPB_0N BD42
BC42

DMI
FDI
All signals associated DDPB_0P
Width = 4 mil ; close FDI_FSYNC0 BF13 BB47 LVDSA_DATA#0 DDPB_1N BJ42
with the interface can

Digital Display Interface


PCH within 500 mil BH25 DMI_ZCOMP BA52 LVDSA_DATA#1 DDPB_1P BG42
FDI_FSYNC1 BH13 be left asNo connects. AY48 LVDSA_DATA#2 DDPB_2N BB40
+1.05V_VCCIO R494 49.9/F DMI_COMP BF25 AV47 BA40
DMI_IRCOMP LVDSA_DATA#3 DDPB_2P
FDI_LSYNC0 BJ12 DDPB_3N AW38
BB48 LVDSA_DATA0 DDPB_3P BA38
DG1.1, Page 314. FDI_LSYNC1 BG14 BA50 LVDSA_DATA1
SYS_PWROK : This signal should be used on the platform to AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
indicate that the processor VR power is good and therefore AB49
DDPC_CTRLDATA
it can be connected to the same source as PWROK on PCH.
MEPWROK : For platform not supporting Intel AMT it can be AP48 LVDSB_CLK#

Display port C
AP47 BE44
connected to PWROK LVDSB_CLK DDPC_AUXN
BD44
PCIE_WAKE# DDPC_AUXP
3,56 XDP_DBRESET# T6 SYS_RESET# WAKE# J12 PCIE_WAKE# 28,41 AY53 LVDSB_DATA#0 DDPC_HPD AV40
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
C R228 0 SYS_PWROK M6 Y1 CLKRUN# AT53 BD40 C
SYS_PWROK CLKRUN# / GPIO32 CLKRUN# 29 LVDSB_DATA#3 DDPC_0P
DDPC_1N BF41
AY51 BH41

System Power Management


R555 0 PWROK LVDSB_DATA0 DDPC_1P
29 PCH_PWRGD B17 PWROK AT48 LVDSB_DATA1 DDPC_2N BD38
AU50 LVDSB_DATA2 DDPC_2P BC38
AT51 LVDSB_DATA3 DDPC_3N BB36
R234 0 MEPWROK K5 P8 RSV_LPCPD# BA36
MEPWROK SUS_STAT# / GPIO61 PAD T25 DDPC_3P

LAN_RST# A10 F3 SUSCLK AA52 U50


LAN_RST# SUSCLK / GPIO62 PAD T102 CRT_BLUE DDPD_CTRLCLK
CRT Disable : AB53 CRT_GREEN DDPD_CTRLDATA U52
CRT_RED AD53 CRT_RED
3 PM_DRAM_PWRGD D9 DRAMPWROK SLP_S5# / GPIO63 E4 SIO_SLP_S5# 29 CRT_GREEN

Display port D
DDPD_AUXN BC46
CRT_BLUE V51 CRT_DDC_CLK DDPD_AUXP BD46
PCH_RSMRST# C16 H7 CRT_HSYCN V53 AT38
29 PCH_RSMRST# RSMRST# SLP_S4# PAD T26 CRT_DDC_DATA DDPD_HPD
CRT_VSYNC BJ40
SUS_PWR_ACK Leave as NC (floating). DDPD_0N
29 SUS_PWR_ACK M1 SUS_PWR_DN_ACK / GPIO30 SLP_S3# P12 SIO_SLP_S3# 29 Y53 CRT_HSYNC DDPD_0P BG40
Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38

CRT
P5 K8 SLP_M# BF37
29 SIO_PWRBTN# PWRBTN# SLP_M# PAD T31 DDPD_2N
AD48 DAC_IREF DDPD_2P BH37
AB51 CRT_IRTN DDPD_3N BE36
29 AC_PRESENT P7 ACPRESENT / GPIO31 TP23 N2 PAD T29 DDPD_3P BD36
R215
1K IbexPeak-M_R1P0
+3.3V_SUS R566 2 1 10K PM_BATLOW# A6 BATLOW# / GPIO72 PMSYNCH BJ10 PM_SYNC 3
0.5%

B B
+3.3V_SUS R268 2 1 10K PM_RI# F14 F6 SLP_LAN#
RI# SLP_LAN# / GPIO29 PAD T39

IbexPeak-M_R1P0

+3.3V_SUS
PCH_PWRGD R564 2 1 10K

PCH_RSMRST# R571 2 1 10K


PCIE_WAKE# R254 1K
LAN_RST# R557 2 1 10K
+3.3V_RUN
Internal LAN disable, LAN_RST#
CLKRUN# R531 2 1 10K
is required 8.2K ~ 10K PD.

A A

QUANTA
Title
COMPUTER
PCH 1/6(DMI_VIDEO)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 7 of 61


5 4 3 2 1
5 4 3 2 1

+RTC_CELL Cap values depend on Xtal


C701
2 1 RTC_X1 IBEX PEAK-M (HDA,JTAG,SATA)

2
15P/50V

2
R570 R568 R574 Y3 R552

1M 20K 20K 32.768KHZ 10M U39A

1
C696 B13 D33 LPC_LAD0 29,32

1
RTC_X2 RTCX1 FWH0 / LAD0
2 1 D13 RTCX2 FWH1 / LAD1 B33 LPC_LAD1 29,32
D FWH2 / LAD2 C32 LPC_LAD2 29,32 D
15P/50V A32
FWH3 / LAD3 LPC_LAD3 29,32
RTC_RST# C14 RTCRST#
FWH4 / LFRAME# C34 LPC_LFRAME# 29,32
SRTC_RST# D17 SRTCRST#
A34

RTC

LPC
LDRQ0# PAD T92
SM_INTRUDER# A16 F34
INTRUDER# LDRQ1# / GPIO23 PAD T34

1
C700 C699 +RTC_CELL R556 330K PCH_INVRMEN A14 AB9 IRQ_SERIRQ
INTVRMEN SERIRQ IRQ_SERIRQ 29
1U/10V 1U/10V

2
INTVRMEN(Internal Voltage Regulator Enable) :
ACZ_BIT_CLK A30
This signal enables the internal 1.05 V regulators. HDA_BCLK
SATA0RXN AK7 SATA_RX0- 34
This signal must be always pulled-up to VccRTC. ACZ_SYNC D29 AK6
HDA_SYNC SATA0RXP SATA_RX0+ 34
SATA0TXN AK11 SATA_TX0-_C 34 HDD
SPKR P1 AK9
38 SPKR SPKR SATA0TXP SATA_TX0+_C 34
R562 1 2 33 ACZ_BIT_CLK
38 ICH_AZ_CODEC_BITCLK
ACZ_RST# C30 HDA_RST#
2

C703 AH6
SATA1RXN SATA_RX1- 34
SATA1RXP AH5 SATA_RX1+ 34 ODD
*27P/50V_NC G30 AH9
38 ICH_AZ_CODEC_SDIN0 SATA_TX1-_C 34
1

HDA_SDIN0 SATA1TXN
SATA1TXP AH8 SATA_TX1+_C 34
T37 PAD F30 HDA_SDIN1
R273 1 2 33 ACZ_SYNC AF11 Notes : Put AC Coupling Cap. near device side.
38 ICH_AZ_CODEC_SYNC SATA2RXN
T40 PAD E32 AF9 As DG1.1, Page 299, the series capacitors may

IHDA
R561 1 HDA_SDIN2 SATA2RXP
29,38 ICH_AZ_CODEC_RST# 2 33 ACZ_RST#
SATA2TXN AF7
F32 AF6 be placed at any point on the traces between
T43 PAD HDA_SDIN3 SATA2TXP
38 ICH_AZ_CODEC_SDOUT
R573 1 2 33 ACZ_SDOUT PCH and the Serial ATA connector. However, it
SATA3RXN AH3 is recommended that they should be close to
C ACZ_SDOUT B29 AH1 C
Place all series terms close to PCH (within 500 mil) except for SDIN
HDA_SDO SATA3RXP
AF3
the connector for optimal signal quality
SATA3TXN
input lines,which should be close to source.Placement of R773, R775, SATA3TXP AF1
GPIO33 H32

SATA
R776 & R777 should equal distance to the T split trace point. HDA_DOCK_EN# / GPIO33
SATA4RXN AD9
Basically, keep the same distance from T for all series 35 KB_LED_DET J30 HDA_DOCK_RST# / GPIO13 SATA4RXP AD8
termination resistors. SATA4TXN AD6 Notes : FIS-based Port
SATA4TXP AD5 Multiplier support on
PCH_JTAG_TCK_BUFM3 AD3 SATA Ports 4 and 5 in
T93 PAD JTAG_TCK SATA5RXN SATA_RX5- 33
SATA5RXP AD1 SATA_RX5+ 33 AHCI/RAID mode.
No Reboot strap. PCH_JTAG_TMS K3 AB3 E-SATA
T88 PAD JTAG_TMS SATA5TXN SATA_TX5-_C 33
Scott_0630:Change R545 footprint from RC0402-C to RC0402. SATA5TXP AB1 SATA_TX5+_C 33
Low = Default. PCH_JTAG_TDI K1
T97 PAD JTAG_TDI
SPKR High = No Reboot.

JTAG
+3.3V_RUN PCH_JTAG_TDO J2 AF16 within 500 mils of the PCH
T99 PAD JTAG_TDO SATAICOMPO
R545 1 2 *1K_NC SPKR PCH_JTAG_RST# J4 AF15 SATA_COMP R213 37.4/F +1.05V_PCH
T95 PAD TRST# SATAICOMPI

30 PCH_SPI_CLK BA2 SPI_CLK


PU 10K to +3.3V_RUN
30 PCH_SPI_CS0# AV3 SPI_CS0# at Page 38
R261 1 2 *1K_NC GPIO33 AY3 T3
T13 PAD SPI_CS1# SATALED# SATA_ACT# 36

6/2: Change R261 from 10K_NC R188 1


30 PCH_SPI_SI AY1 Y9 2 10K
to 1K_NC according to Intel design guide 1.51 SPI_MOSI SATA0GP / GPIO21

SPI
B B
AV1 V1 R537 1 2 10K +3.3V_RUN
30 PCH_SPI_SO SPI_MISO SATA1GP / GPIO19
Note : GPIO33 is a signal used for Flash
IbexPeak-M_R1P0
Descriptor Security Override/ME Debug
Mode.This signal should be only asserted
lowthrough an external pull-down in
manufacturing or debug environments
ONLY.

6/2: NC JTAG resistors as PCH is in QT stage


+3.3V_SUS Res. of TDI near PCH

R236 R251 R263 R259

*200_NC *200_NC *200_NC *20K_NC


PCH_JTAG_TCK_BUF
PCH_JTAG_TMS
PCH_JTAG_TDI R544
PCH_JTAG_TDO
PCH_JTAG_RST# 51

A A
R546 R547 R549 R548 Scott_0707: Reserver
PCH_JTAG_RST#
*100_NC *100_NC *100_NC *10K_NC
circuit as review. Note : Only pop when PCH is production
stage & need "JTAG boundary Scan".
QUANTA
Remember to depop XDP side Res.
Title
COMPUTER
NC all Res. when PCH is Res. of TDO Scott_0703 : Note : Delete pull up 1.05V according to PCH 2/6(SATA_SPI)
production stage. PCH ES1 stage : NC Intel change notice! (Reserved for debug purpose) Size Document Number Rev
PCH ES2 stage : pop RM5 3A

Date: Thursday, August 20, 2009 Sheet 8 of 61


5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (PCI,USB,NVRAM) IBEX PEAK-M (PCI-E,SMBUS,CLK)


U39B
U39E Mini WPAN
H40 AY9 BG30 B9 PCH_SMB_ALERT#
AD0 NV_CE#0 32 PCIE_RX1- PERN1 SMBALERT# / GPIO11 PAD T100
N34 AD1 NV_CE#1 BD1 32 PCIE_RX1+ BJ30 PERP1
C44 AP15 C659 1 2 0.1U/10V PCIE_TXN1_C BF29 H14 PCH_SMBCLK
AD2 NV_CE#2 32 PCIE_TX1- PETN1 SMBCLK
A38 BD8 C660 1 2 0.1U/10V PCIE_TXP1_C BH29
AD3 NV_CE#3 32 PCIE_TX1+ PETP1
C36 Mini WLAN C8 PCH_SMBDATA
AD4 SMBDATA
J34 AD5 NV_DQS0 AV9 31 PCIE_RX2- AW30 PERN2
A40 AD6 NV_DQS1 BG8 31 PCIE_RX2+ BA30 PERP2
D45 C318 1 2 0.1U/10V PCIE_TXN2_C BC30 J14 PCH_SML0ALERT#
D AD7 31 PCIE_TX2- PETN2 SML0ALERT# / GPIO60 PAD T38 D
E36 AP7 C315 1 2 0.1U/10V PCIE_TXP2_C BD30
AD8 NV_DQ0 / NV_IO0 31 PCIE_TX2+ PETP2
H48 AP6 Mini WWAN C6 SML0CLK
AD9 NV_DQ1 / NV_IO1 SML0CLK
E40 AT6 AU30

SMBus
AD10 NV_DQ2 / NV_IO2 32 PCIE_RX3- PERN3
C40 AT9 AT30 G8 SML0DATA
AD11 NV_DQ3 / NV_IO3 32 PCIE_RX3+ PERP3 SML0DATA
M48 BB1 C353 1 2 0.1U/10V PCIE_TXN3_C AU32
AD12 NV_DQ4 / NV_IO4 32 PCIE_TX3- PETN3
M45 AV6 C349 1 2 0.1U/10V PCIE_TXP3_C AV32
AD13 NV_DQ5 / NV_IO5 32 PCIE_TX3+ PETP3
F53 BB3 Express Card M14 PCH_SML1ALERT#
AD14 NV_DQ6 / NV_IO6 SML1ALERT# / GPIO74 PAD T22
M40 AD15 NV_DQ7 / NV_IO7 BA4 28 PCIE_RX4- BA32 PERN4 SML1_SMBCLK

NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4 28 PCIE_RX4+ BB32 PERP4 SML1CLK / GPIO58 E10
J36 BB6 C329 1 2 0.1U/10V PCIE_TXN4_C BD32 To EC
AD17 NV_DQ9 / NV_IO9 28 PCIE_TX4- PETN4
K48 BD6 C324 1 2 0.1U/10V PCIE_TXP4_C BE32 G12 SML1_SMBDATA
AD18 NV_DQ10 / NV_IO10 28 PCIE_TX4+ PETP4 SML1DATA / GPIO75
F40 BB7 Card Reader

PCI-E*
AD19 NV_DQ11 / NV_IO11
C42 AD20 NV_DQ12 / NV_IO12 BC8 26 PCIE_RX5- BF33 PERN5
K46 AD21 NV_DQ13 / NV_IO13 BJ8 26 PCIE_RX5+ BH33 PERP5 CL_CLK1 T13

Controller
M51 BJ6 C658 1 2 0.1U/10V PCIE_TXN5_C BG32
AD22 NV_DQ14 / NV_IO14 26 PCIE_TX5- PETN5
J52 BG6 C657 1 2 0.1U/10V PCIE_TXP5_C BJ32 T11 NC for Non-iAMT
AD23 NV_DQ15 / NV_IO15 26 PCIE_TX5+ PETP5 CL_DATA1
K51 Giga Bit LOM

Link
AD24
L34 AD25 NV_ALE BD3 NV_ALE 10 41 PCIE_RX6-/GLAN_RX- BA34 PERN6 CL_RST1# T9
F42 AD26 NV_CLE AY6 NV_CLE 10 41 PCIE_RX6+/GLAN_RX+ AW34 PERP6
J40 C339 1 2 0.1U/10V GLAN_TXN_C BC34
AD27 41 PCIE_TX6-/GLAN_TX- PETN6
G46 C332 1 2 0.1U/10V GLAN_TXP_C BD34
AD28 41 PCIE_TX6+/GLAN_TX+ PETP6
F44 AU2 H1 PEG_A_CLKRQ# R563 10K
AD29 NV_RCOMP PEG_A_CLKRQ# / GPIO47
M47 AD30 AT34 PERN7

PCI
H36 AD31 NV_RB# AV7 AU34 PERP7
AU36 PETN7 CLKOUT_PEG_A_N AD43 CLK_PCIE_VGA# 16
J50 C/BE0# NV_WR#0_RE# AY8 AV36 PETP7 CLKOUT_PEG_A_P AD45 CLK_PCIE_VGA 16
G42 C/BE1# NV_WR#1_RE# AY5
H47 C/BE2# BG34 PERN8 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLL# 3

PEG
G34 C/BE3# NV_WE#_CK0 AV11 BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLL 3
NV_WE#_CK1 BF5 BG36 PETN8
Change Cardreader to PCIE PCI_PIRQA# G38 BJ36
T45 PAD PIRQA# PETP8
PCI_PIRQB# H51 AT1
Interface! PCI_PIRQC# PIRQB# CLKOUT_DP_N / CLKOUT_BCLK1_N
Del PCI debug card! PCI_PIRQD#
B37 PIRQC# USBP0N H18 PCH_USBP0- 40
Side pair (Top / left, IB) 5/3: Added 0 ohms and change CLKOUT_DP_P / CLKOUT_BCLK1_P AT3
T94 PAD A44 J18 PCH_USBP0+ 40 AK48
PIRQD# USBP0P
A18 PCH_USBP1- 40 pull up to PCH side AK47
CLKOUT_PCIE0N
USBP1N Side pair (Bottom / left, IB) CLKOUT_PCIE0P

From CLK BUFFER


PCI_REQ0# F51 C18 PCH_USBP1+ 40 AW24
C REQ0# USBP1P CLKIN_DMI_N CLK_BUF_PCIE_3GPLL# 15 C
PCI_REQ1# A46 N20 PCH_USBP2- 33 CLK_PCIE_REQ0# P9 BA24
T104 PAD REQ1# / GPIO50 USBP2N USB W/ E-SATA port PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_PCIE_3GPLL 15
USB_MCARD3_DET# B45 P20 PCH_USBP2+ 33
32 USB_MCARD3_DET# REQ2# / GPIO52 USBP2P
USB_MCARD1_DET# M53 J20 PCH_USBP3-
31 USB_MCARD1_DET# REQ3# / GPIO54 USBP3N PAD T32
L20 PCH_USBP3+ AM43 AP3
USBP3P PAD T23 32 CLK_PCIE_MINI2# CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLK# 15
PCI_GNT0# F48 F20 PCH_USBP4- 31 Mini WPAN AM45 AP1
GNT0# USBP4N Mini Card (WLAN) 32 CLK_PCIE_MINI2 CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK 15
PCI_GNT1# K45 G20 PCH_USBP4+ 31
T28 PAD GNT1# / GPIO51 USBP4P
PCI_GNT2# F36 A20 PCH_USBP5- 32 R671 1 2 0 MINI2CLK_REQ#_R U4
T44 PAD GNT2# / GPIO53 USBP5N 32 MINI2CLK_REQ# PCIECLKRQ1# / GPIO18
PCI_GNT3# H53 C20 PCH_USBP5+ 32 Mini Card (WPAN) F18
T87 PAD GNT3# / GPIO55 USBP5P CLKIN_DOT_96N CLK_BUF_DREFCLK# 15
USBP6N M22 CLKIN_DOT_96P E18 CLK_BUF_DREFCLK 15
PCI_PIRQE# B41 N22 5/12: Move WPAN from port 6 to port 8 and AM47
T103 PAD PIRQE# / GPIO2 USBP6P 32 CLK_PCIE_MINI3# CLKOUT_PCIE2N
PCI_PIRQF# K53 B21 Mini WWAN AM48
T86 PAD PIRQF# / GPIO3 USBP7N Expresscard from port 7 to port 10 to support HM55 32 CLK_PCIE_MINI3 CLKOUT_PCIE2P
PCI_PIRQG# A36 D21 AH13
T91 PAD PIRQG# / GPIO4 USBP7P CLKIN_SATA_N / CKSSCD_N CLK_BUF_DREFSSCLK# 15
PCH_IRQH_GPIO5 A48 H22 PCH_USBP8- 32 Mini Card (WWAN) R672 1 2 0 MINI3CLK_REQ#_R N4 AH12
34 PCH_IRQH_GPIO5 PIRQH# / GPIO5 USBP8N 32 MINI3CLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_DREFSSCLK 15
USBP8P J22 PCH_USBP8+ 32
USB

PCI_RST#_G K6 E22 PCH_USBP9- 33


T33 PAD PCIRST# USBP9N TV
USBP9P F22 PCH_USBP9+ 33 31 CLK_PCIE_MINI1# AH42 CLKOUT_PCIE3N REFCLK14IN P41 CLK_ICH_14M 15
PCI_SERR# E44 A22 PCH_USBP10- 28 Mini WLAN AH41
SERR# USBP10N Express Card 31 CLK_PCIE_MINI1 CLKOUT_PCIE3P
PCI_PERR# E50 C22 PCH_USBP10+ 28
PERR# USBP10P MINI1CLK_REQ#_R CLK_PCI_FB
G24 PCH_USBP11- 35 A8 J42
USBP11N
H24 PCH_USBP11+ 35
Camera PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK
PCI_IRDY# USBP11P
A42 IRDY# USBP12N L24
H44 M24 AM51 AH51 R675 1 2 0 5/3: Added 0 ohms to GND according
PAR USBP12P 28 CLK_PCIE_EXPCARD# CLKOUT_PCIE4N XTAL25_IN
PCI_DEVSEL# F46 A24 Express Card AM53 AH53 R676 1 2 0
DEVSEL# USBP13N 28 CLK_PCIE_EXPCARD CLKOUT_PCIE4P XTAL25_OUT to Intel reccomandation
PCI_FRAME# C46 C24
FRAME# USBP13P
28 CARD_CLK_REQ#
R674 1 2 0 CARD_CLK_REQ#_C M9 PCIECLKRQ4# / GPIO26 XCLK_RCOMP AF38 XCLK_RCOMP +1.05V_PCH
PCI_PLOCK# D49 R191 90.9/F
PLOCK# USB_BIAS
USBRBIAS# B25
PCI_STOP# D41 R262 22.6/F AJ50 T45 CLK_FLEX0
STOP# 26 CLK_PCIE_CARD_READER# CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 PAD T18
PCI_TRDY# C48 D25 Card Reader AJ52
TRDY# USBRBIAS 26 CLK_PCIE_CARD_READER CLKOUT_PCIE5P
PME# M7 CLK_PCIE_REQ5#_R H6 P43 CLK_FLEX1

Clock Flex
T30 PAD PME# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 PAD T21
N16 OC0# for USB 0/1
OC0# / GPIO59 OC0# 33
PCI_PLTRST# D5 J16 OC1# for USB 2
PLTRST# OC1# / GPIO40 OC1# 33
F16 OC2# AK53 T42 CLK_FLEX2
OC2# / GPIO41 41 CLK_PCIE_LOM# CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 PAD T19
R534 1 22 2 CLK_LPC_DEBUG_C N52 L16 OC3# Giga Bit LOM AK51
32 CLK_LPC_DEBUG CLKOUT_PCI0 OC3# / GPIO42 41 CLK_PCIE_LOM CLKOUT_PEG_B_P
P53 E14 OC4#
B CLK_PCI_8512_C CLKOUT_PCI1 OC4# / GPIO43 OC5# B
29 CLK_PCI_8512
R220 1 22 2 P46 CLKOUT_PCI2 OC5# / GPIO9 G16 41 LOMCLK_REQ#
R225 1 2 0 LOMCLK_REQ#_R P13 PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 N50 CLK_FLEX3
PAD T84
CLK_PCI_FB R526 1 22 2 CLK_PCI_FB_C P51 F12 OC6#
CLKOUT_PCI3 OC6# / GPIO10 OC7#
P48 CLKOUT_PCI4 OC7# / GPIO14 T15
IbexPeak-M_R1P0

IbexPeak-M_R1P0 5/13: Added MOSFET Q81 to prevent leakage 5/4: Added MOSFET Q80 to prevent leakage
from 3.3V_SUS to cardreader during S3 from 3.3V_SUS to cardreader during S3
+3.3V_RUN +3.3V_RUN

5/12: Depop R226 and R229 as BIOS decided


+3.3V_RUN
to boot from SPI ROM connected to PCH These are for Non-iAMT

2
Q81 Q80
backdrive issue.
5/19: Update BIOS strap table

2
4
1 3 MINI1CLK_REQ#_R 1 3 CLK_PCIE_REQ5#_R
31 MINI1CLK_REQ# 26 CLK_PCIE_REQ5#
R226 *1K_NC PCI_GNT0# RP7
R229 *1K_NC PCI_GNT1# 2N7002W-7-F 2N7002W-7-F 4P2R-2.2K

2
PCI Pullup

1
3
+3.3V_SUS +3.3V_SUS Q63
+3.3V_RUN Boot BIOS Strap PCH_SMBDATA 3 1
56 PCH_SMBDATA MEM_SDATA 13,14,28,31,32,34
PCH_SMB_ALERT# R558 10K/F
PCI_PIRQE# R572 8.2K PCI_GNT1# PCI_GNT0# Boot BIOS Location PCH_SML0ALERT# R250 10K/F

2
PCI_PIRQF# R541 8.2K PCH_SML1ALERT# R219 10K/F 2N7002W-7-F
PCI_PIRQG# R560 8.2K 0 0 LPC Q61 PCH_SMBCLK R267 2.2K/F
+3.3V_SUS USB_MCARD3_DET# R577 8.2K SML1_SMBCLK 1 3 PCH_SMBDATA R255 2.2K/F +3.3V_RUN
SMBCLK1 20,24,29
C401 0 1 Reserved (NAND) SML0CLK R565 2.2K/F
1 2 SML0DATA R271 2.2K/F

2
1 0 PCI 2N7002W-7-F SML1_SMBCLK R266 2.2K/F
5

0.047U/10V U8 7SH32 +3.3V_RUN SML1_SMBDATA R235 2.2K/F Q60


RP5 56 PCH_SMBCLK PCH_SMBCLK
2 1 1 SPI 3 1 MEM_SCLK 13,14,28,31,32,34
4 PCI_REQ1# 6 5 +3.3V_SUS
PLTRST# 3,16,26,28,29,31,32,41,56
PCI_PLTRST# 1 PCI_FRAME# 7 4 PCI_PLOCK# CLK_PCIE_REQ0# R232 2 1 10K
A PCI_TRDY# 8 3 USB_MCARD1_DET# MINI1CLK_REQ#_R R576 2 1 10K 2N7002W-7-F A
PCH_IRQH_GPIO5 9 2 PCI_PIRQB#
2

10 1 PCI_REQ0# R542 *1K_NC PCI_GNT3# CLK_PCIE_REQ5#_R R258 2 1 10K


+3.3V_RUN
Q62 LOMCLK_REQ#_R R227 2 1 10K
USB OC Pullup SML1_SMBDATA 1 3 CARD_CLK_REQ#_C R277 2 1 10K
10P8R-8.2K SMBDAT1 20,24,29
+3.3V_SUS +3.3V_RUN

OC7# 6
RP1
5 PCI_PIRQC# 6
RP6
5
A16 swap override Strap/Top-Block 2N7002W-7-F QUANTA
OC3# OC6# PCI_STOP# PCI_PIRQA# Swap Override jumper +3.3V_RUN
OC0#
OC1#
7
8
9
4
3
2
OC4#
OC2#
PCI_IRDY#
PCI_PIRQD#
7
8
9
4
3
2
PCI_SERR#
PCI_DEVSEL#
0 = A16 swap 4/28: Change polarity to prevent leakage
Title
COMPUTER
OC5# PCI_PERR# override/Top-Block MINI2CLK_REQ#_R R536
+3.3V_SUS 10 1 +3.3V_RUN 10 1 PCI_GNT3# 2 1 10K PCH 3/6(PCI_SMBUS_CLK)
Swap Override enabled MINI3CLK_REQ#_R R231 2 1 10K
1 = Default Size Document Number Rev
10P8R-10K 10P8R-8.2K
RM5 3A

Date: Thursday, August 20, 2009 Sheet 9 of 61


5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)


U39F

S_GPIO Y3 AH45
BMBUSY# / GPIO0 CLKOUT_PCIE6N
CLKOUT_PCIE6P AH46
29 SIO_EXT_SMI# SIO_EXT_SMI# C38 TACH1 / GPIO1

29 SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6


CLKOUT_PCIE7N AF48

MISC
29 SIO_EXT_WAKE# SIO_EXT_WAKE# J32 AF47
TACH3 / GPIO7 CLKOUT_PCIE7P
D RSV_WOL_EN F10 D
GPIO8
T41 PAD GPIO12 K9 U2 SIO_A20GATE
LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE 29
TEST_WOOFER_EN T7
39 TEST_WOOFER_EN GPIO15

32 PCIE_MCARD3_DET# PCIE_MCARD3_DET# AA2 AM3


SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 3
PCIE_MCARD1_DET# F38 AM1 +1.1V_VTT
31 PCIE_MCARD1_DET# TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK 3

32 PCIE_MCARD2_DET# PCIE_MCARD2_DET# Y7 BG10


SCLOCK / GPIO22 PECI H_PECI 3

GPIO
H10 T1 R178
GPIO24 RCIN# SIO_RCIN# 29
56
T15 PAD GPIO27 AB12 BE10
GPIO27 PROCPWRGD H_CPUPWRGD 3,56

CPU
PCH_GPIO28 V13 BD10 R181 56
GPIO28 THRMTRIP# H_THERM# 3
USB_MCARD2_DET# M11
32 USB_MCARD2_DET# STP_PCI# / GPIO34
GPIO35 V6 SATACLKREQ# / GPIO35
CAMERA_CBL_DET# AB7 BA22
35 CAMERA_CBL_DET# SATA2GP / GPIO36 TP1
SATA3GP AB13 AW22
SATA3GP / GPIO37 TP2

31 WLAN_RADIO_DIS# WLAN_RADIO_DIS# V3 BB22 PCH_TP3


SLOAD / GPIO38 TP3 PAD T14

32 WPAN_RADIO_DIS_MINI# R540 0 CRB_SV_DET P3 AY45 Note : TP3 is not part of the JTAG
SDATAOUT0 / GPIO39 TP4
T101 PAD GPIO45
interface, but is required to select
C H3 PCIECLKRQ6# / GPIO45 TP5 AY46 C
the Boundary Scan test mode.
T98 PAD GPIO46 F1 AV43
PCIECLKRQ7# / GPIO46 TP6
R192 0 SV_SET_UP AB6 AV45
32 WWAN_RADIO_DIS# SDATAOUT1 / GPIO48 TP7
R511 0 SATA5GP AA4 AF13
29 CRIT_TEMP_REP# SATA5GP / GPIO49 TP8
GPIO57 F8 M18
GPIO57 TP9

TP10 N18

A4 VSS_NCTF_1 TP11 AJ24


A49
NCTF

VSS_NCTF_2 RSVD
A5 VSS_NCTF_3 TP12 AK41
A50 VSS_NCTF_4
A52 VSS_NCTF_5 TP13 AK42
A53 VSS_NCTF_6
B2 VSS_NCTF_7 TP14 M32
B4 VSS_NCTF_8
B52 N32 +NVRAM_VCCQ
VSS_NCTF_9 TP15
B53 VSS_NCTF_10
BE1 VSS_NCTF_11 TP16 M30
BE53 R185 *1K_NC
VSS_NCTF_12 9 NV_ALE
+3.3V_RUN BF1 N30
VSS_NCTF_13 TP17 R189 *1K_NC
BF53 VSS_NCTF_14 9 NV_CLE
SIO_RCIN# R538 10K BH1 H12
VSS_NCTF_15 TP18
BH2 VSS_NCTF_16
SIO_A20GATE R539 10K BH52 AA23
VSS_NCTF_17 TP19
BH53 VSS_NCTF_18
DMI Termination Voltage
SIO_EXT_SCI# R575 10K BJ1 AB45
B VSS_NCTF_19 NC_1 B
BJ2 VSS_NCTF_20
SIO_EXT_SMI# R559 10K BJ4 AB38 Set to Vcc when LOW
VSS_NCTF_21 NC_2
BJ49 VSS_NCTF_22
NV_CLE
SIO_EXT_WAKE# R272 10K BJ5 AB42 Set to Vcc/2 when HIGH
VSS_NCTF_23 NC_3
BJ50 VSS_NCTF_24
BJ52 VSS_NCTF_25 NC_4 AB41
CAMERA_CBL_DET# R186 10K BJ53 VSS_NCTF_26
D1 VSS_NCTF_27 NC_5 T39 2/12: Peter: According to checklist, Anti-Thief Enabled
SATA3GP R196 10K D2 VSS_NCTF_28
D53
E1
VSS_NCTF_29
P6
default is set to low for disabling anti - NV_ALE
High = Enable (Default)
VSS_NCTF_30 INIT3_3V#
USB_MCARD2_DET# R233 10K E53 VSS_NCTF_31 theif! Low = Disable
TP24 C10
PCIE_MCARD1_DET# R257 10K
IbexPeak-M_R1P0 +3.3V_RUN
PCIE_MCARD2_DET# R193 10K

PCIE_MCARD3_DET# R527 10K

SATA5GP R530 10K SV_SET_UP R187 10K

S_GPIO R532 10K

WLAN_RADIO_DIS# R533 10K


SV_SET_UP 1-X High = Strong (Default)

+3.3V_RUN +3.3V_SUS !!!


5/6: Added GPIO57 to
A +3.3V_SUS A
R543
recognize
10K R256 M96 and Madison
10K 1 = M96 ; 0 = Madison
PCH_GPIO28 R223 10K CRB_SV_DET
GPIO57
QUANTA
GPIO12

TEST_WOOFER_EN
R270

R222
10K

1K
GPIO35
R677 Title
COMPUTER
R217 *10K_NC PCH 4/6(GPIO)
RSV_WOL_EN R269 10K 10K
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 10 of 61


5 4 3 2 1
5 4 3 2 1

U39G POWER
IBEX PEAK-M (POWER) +1.05V_PCH AB24
AB26
VCCCORE[1] VCCADAC[1] AE50 +3.3V_RUN
VCCCORE[2]
AB28 VCCCORE[3] VCCADAC[2] AE52
AD26 VCCCORE[4]

CRT
C350 C382 AD28 AF53
10U 1U VCCCORE[5] VSSA_DAC[1]
AF26 VCCCORE[6]

VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51
AF30
AF31
VCCCORE[8]
VCCCORE[9]
U39J POWER
AH26 VCCCORE[10]
AH28 +1.05V_PCH L59 *10uH_NC +1.05V_RUN_VCCA_CLK AP51 V24 +1.05V_PCH
VCCCORE[11] VCCACLK[1] VCCIO[5]
AH30 VCCCORE[12] VCCIO[6] V26
AH31 AH38 C643 C644 AP53 Y24 C384
D VCCCORE[13] VCCALVDS *10U_NC *1U_NC VCCACLK[2] VCCIO[7] 1U D
AJ30 VCCCORE[14] VCCIO[8] Y26
AJ31 VCCCORE[15] VSSA_LVDS AH39
+1.05V_PCH AF23 VCCLAN[1] VCCSUS3_3[1] V28 +3.3V_SUS
VCCSUS3_3[2] U28
VCCTX_LVDS[1] AP43 AF24 VCCLAN[2] VCCSUS3_3[3] U26
AP45 U24 C399 C391
VCCTX_LVDS[2] VCCSUS3_3[4]
AT46 P28

LVDS
VCCTX_LVDS[3] VCCSUS3_3[5] 0.1U 0.1U
+1.05V_PCH AK24 VCCIO[24] VCCTX_LVDS[4] AT45 Y20 DCPSUSBYP VCCSUS3_3[6] P26
VCCSUS3_3[7] N28
C385 N26
L62 *1uH_NC +1.05V_RUN_PLLEXP VCCSUS3_3[8]
+1.05V_PCH BJ24 VCCAPLLEXP AD38 VCCME[1] VCCSUS3_3[9] M28
AB34 +3.3V_RUN 0.1U M26
VCC3_3[2] VCCSUS3_3[10]
AD39 L28

USB
C661 C396 VCCME[2] VCCSUS3_3[11]
AN20 VCCIO[25] VCC3_3[3] AB35 VCCSUS3_3[12] L26
*10U_NC AN22 AD41 J28

HVCMOS
VCCIO[26] 0.1U VCCME[3] VCCSUS3_3[13]
AN23 VCCIO[27] VCC3_3[4] AD35 VCCSUS3_3[14] J26
AN24 VCCIO[28] +1.05V_PCH AF43 VCCME[4] VCCSUS3_3[15] H28
+1.05V_VCCIO AN26 H26
PJP8 VCCIO[29] VCCSUS3_3[16]
AN28 VCCIO[30] AF41 VCCME[5] VCCSUS3_3[17] G28
+1.05V_PCH 2 1 BJ26 C359 C354 C381 G26
VCCIO[31] 22U 22U 1U VCCSUS3_3[18]
BJ28 VCCIO[32] AF42 VCCME[6] VCCSUS3_3[19] F28
POWER_JP AT26 F26
C331 C347 C333 C342 C361 VCCIO[33] VCCSUS3_3[20]
AT28 VCCIO[34] V39 VCCME[7] VCCSUS3_3[21] E28

Clock and Miscellaneous


10U 1U 1U 1U 1U AU26 E26
VCCIO[35] VCCSUS3_3[22]
AU28 VCCIO[36] V41 VCCME[8] VCCSUS3_3[23] C28
AV26 VCCIO[37] VCCSUS3_3[24] C26
AV28 VCCIO[38] VCCVRM[2] AT24 +1.8V_RUN V42 VCCME[9] VCCSUS3_3[25] B27
AW26 VCCIO[39] VCCSUS3_3[26] A28
AW28 VCCIO[40] Y39 VCCME[10] VCCSUS3_3[27] A26

DMI
BA26 AT16 +VCCDMI R184 0 +1.1V_VTT Scott_0626:Change D9,D10 PN from BCRB500VZ29
VCCIO[41] VCCDMI[1]
BA28 VCCIO[42] Y41 VCCME[11] VCCSUS3_3[28] U23 to BC010K45004.
BB26 AU16 R183 *0_NC +1.05V_PCH
C VCCIO[43] VCCDMI[2] C334 C
BB28 VCCIO[44] Y42 VCCME[12] VCCIO[56] V23 +1.05V_PCH
BC26 1U
VCCIO[45]

PCI E*
BC28 F24 +V5REF_SUS R274 1 2 100 +5V_SUS
VCCIO[46] V5REF_SUS C400
BD26 VCCIO[47]
BD28 C388 0.1U +VCCRTCEXT V9 D9 SDM10K45-7-F +3.3V_SUS
+3.3V_RUN VCCIO[48] +NVRAM_VCCQ DCPRTC 1uF
BE26 VCCIO[49] VCCPNAND[1] AM16
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 AK20 R194 K49 +V5REF R230 1 2 100 +5V_RUN
VCCIO[51] VCCPNAND[3] V5REF
BG28 AK19 2 1 *0_0603_NC +3.3V_RUN +1.8V_RUN AU24 C395

PCI/GPIO/LPC
VCCIO[52] VCCPNAND[4] R195 VCCVRM[3] D10 SDM10K45-7-F
BH27 VCCIO[53] VCCPNAND[5] AK15 +3.3V_RUN
C352 AK13 C358 2 1 0_0603 +1.8V_RUN J38 1uF
VCCPNAND[6] VCC3_3[8]
AN30 VCCIO[54] VCCPNAND[7] AM12 BB51 VCCADPLLA[1]

NAND / SPI
0.1U AN31 AM13 0.1U +1.05V_VCCADPLLA BB53 L38
VCCIO[55] VCCPNAND[8] VCCADPLLA[2] VCC3_3[9]
VCCPNAND[9] AM15
VCC3_3[10] M36 +3.3V_RUN
AN35 +1.05V_VCCADPLLB BD51
+1.8V_RUN VCC3_3[1] VCCADPLLB[1] C390
BD53 VCCADPLLB[2] VCC3_3[11] N36
0.1U
AT22 VCCVRM[1] +1.05V_PCH AH23 VCCIO[21] VCC3_3[12] P36
AJ35 VCCIO[22]
+1.05V_PCH L63 *1uH_NC +V1.1LAN_VCCAPLL_FDI BJ18 AM8 C379 C380 C377 AH35 U35
VCCFDIPLL VCCME3_3[1] VCCIO[23] VCC3_3[13]
VCCME3_3[2] AM9 +3.3V_RUN
FDI

+1.05V_PCH AM23 AP11 1U 1U 1U AF34


C662 VCCIO[1] VCCME3_3[3] C343 VCCIO[2]
VCCME3_3[4] AP9 VCC3_3[14] AD13
*10U_NC AH34
0.1U VCCIO[3] C340
AF32 0.1U
IbexPeak-M_R1P0 VCCIO[4]
VCCSATAPLL[1] AK3
C376 0.1U +VCCSST V12 AK1 +V1.1LAN_VCCAPLL L64 *10uH_NC +1.05V_PCH
DCPSST VCCSATAPLL[2]
C673 C671
*1U_NC *10U_NC
B +V1.1LAN_INT_VCCSUS Y22 B
C386 DCPSUS
VCCIO[9] AH22 +1.05V_PCH
0.1U
P18 AT20 +1.8V_RUN C383
VCCSUS3_3[29] VCCVRM[4] 1U
+3.3V_SUS U19

SATA
VCCSUS3_3[30]

PCI/GPIO/LPC
C394 AH19
VCCIO[10]
U20 VCCSUS3_3[31]
0.1U AD20
VCCIO[11]
U22 VCCSUS3_3[32]
VCCIO[12] AF22

VCCIO[13] AD19
+3.3V_RUN V15 VCC3_3[5] VCCIO[14] AF20
VCCIO[15] AF19
C387 V16 AH20
VCC3_3[6] VCCIO[16]
0.1U Y16 AB19
VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
VCCIO[19] AB22
VCCIO[20] AD22
+1.1V_VTT AT18 V_CPU_IO[1]
L60 10uH +1.05V_VCCADPLLA AA34

CPU
+1.05V_PCH VCCME[13] +1.05V_PCH
C344 C326 C325 Y34
VCCME[14]
AU18 V_CPU_IO[2] VCCME[15] Y35
C652 + C663 4.7U 0.1U 0.1U AA35
220U VCCME[16]
3528 1U

RTC
+RTC_CELL A12 L30 +VCCSUSHDA R224 2 1 0_0603 +3.3V_SUS
VCCRTC VCCSUSHDA

HDA
L61 10uH +1.05V_VCCADPLLB C697 C705 C704
A IbexPeak-M_R1P0 C398 A
1U 0.1U 0.1U 1U
C653 + C664
220U
3528 1U
QUANTA
Use External Graphics. Can connect power directly
Title
COMPUTER
without Inductor & Cap ? As Ibex peak-M EDS 1.0, PCH 5/6(POWER)
need +1.05V. Can use +1.1V_VTT as CPU ?
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 11 of 61


5 4 3 2 1
5 4 3 2 1

IBEX PEAK-M (GND)


U39H U39I
AB16 VSS[0] AY7 VSS[159] VSS[259] H49
B11 VSS[160] VSS[260] H5
AA19 VSS[1] VSS[80] AK30 B15 VSS[161] VSS[261] J24
AA20 VSS[2] VSS[81] AK31 B19 VSS[162] VSS[262] K11
AA22 VSS[3] VSS[82] AK32 B23 VSS[163] VSS[263] K43
AM19 VSS[4] VSS[83] AK34 B31 VSS[164] VSS[264] K47
AA24 VSS[5] VSS[84] AK35 B35 VSS[165] VSS[265] K7
AA26 VSS[6] VSS[85] AK38 B39 VSS[166] VSS[266] L14
D
AA28 VSS[7] VSS[86] AK43 B43 VSS[167] VSS[267] L18 D
AA30 VSS[8] VSS[87] AK46 B47 VSS[168] VSS[268] L2
AA31 VSS[9] VSS[88] AK49 B7 VSS[169] VSS[269] L22
AA32 VSS[10] VSS[89] AK5 BG12 VSS[170] VSS[270] L32
AB11 VSS[11] VSS[90] AK8 BB12 VSS[171] VSS[271] L36
AB15 VSS[12] VSS[91] AL2 BB16 VSS[172] VSS[272] L40
AB23 VSS[13] VSS[92] AL52 BB20 VSS[173] VSS[273] L52
AB30 VSS[14] VSS[93] AM11 BB24 VSS[174] VSS[274] M12
AB31 VSS[15] VSS[94] BB44 BB30 VSS[175] VSS[275] M16
AB32 VSS[16] VSS[95] AD24 BB34 VSS[176] VSS[276] M20
AB39 VSS[17] VSS[96] AM20 BB38 VSS[177] VSS[277] N38
AB43 VSS[18] VSS[97] AM22 BB42 VSS[178] VSS[278] M34
AB47 VSS[19] VSS[98] AM24 BB49 VSS[179] VSS[279] M38
AB5 VSS[20] VSS[99] AM26 BB5 VSS[180] VSS[280] M42
AB8 VSS[21] VSS[100] AM28 BC10 VSS[181] VSS[281] M46
AC2 VSS[22] VSS[101] BA42 BC14 VSS[182] VSS[282] M49
AC52 VSS[23] VSS[102] AM30 BC18 VSS[183] VSS[283] M5
AD11 VSS[24] VSS[103] AM31 BC2 VSS[184] VSS[284] M8
AD12 VSS[25] VSS[104] AM32 BC22 VSS[185] VSS[285] N24
AD16 VSS[26] VSS[105] AM34 BC32 VSS[186] VSS[286] P11
AD23 VSS[27] VSS[106] AM35 BC36 VSS[187] VSS[287] AD15
AD30 VSS[28] VSS[107] AM38 BC40 VSS[188] VSS[288] P22
AD31 VSS[29] VSS[108] AM39 BC44 VSS[189] VSS[289] P30
AD32 VSS[30] VSS[109] AM42 BC52 VSS[190] VSS[290] P32
AD34 VSS[31] VSS[110] AU20 BH9 VSS[191] VSS[291] P34
AU22 VSS[32] VSS[111] AM46 BD48 VSS[192] VSS[292] P42
AD42 VSS[33] VSS[112] AV22 BD49 VSS[193] VSS[293] P45
AD46 VSS[34] VSS[113] AM49 BD5 VSS[194] VSS[294] P47
AD49 VSS[35] VSS[114] AM7 BE12 VSS[195] VSS[295] R2
AD7 VSS[36] VSS[115] AA50 BE16 VSS[196] VSS[296] R52
C AE2 VSS[37] VSS[116] BB10 BE20 VSS[197] VSS[297] T12 C
AE4 VSS[38] VSS[117] AN32 BE24 VSS[198] VSS[298] T41
AF12 VSS[39] VSS[118] AN50 BE30 VSS[199] VSS[299] T46
Y13 VSS[40] VSS[119] AN52 BE34 VSS[200] VSS[300] T49
AH49 VSS[41] VSS[120] AP12 BE38 VSS[201] VSS[301] T5
AU4 VSS[42] VSS[121] AP42 BE42 VSS[202] VSS[302] T8
AF35 VSS[43] VSS[122] AP46 BE46 VSS[203] VSS[303] U30
AP13 VSS[44] VSS[123] AP49 BE48 VSS[204] VSS[304] U31
AN34 VSS[45] VSS[124] AP5 BE50 VSS[205] VSS[305] U32
AF45 VSS[46] VSS[125] AP8 BE6 VSS[206] VSS[306] U34
AF46 VSS[47] VSS[126] AR2 BE8 VSS[207] VSS[307] P38
AF49 VSS[48] VSS[127] AR52 BF3 VSS[208] VSS[308] V11
AF5 VSS[49] VSS[128] AT11 BF49 VSS[209] VSS[309] P16
AF8 VSS[50] VSS[129] BA12 BF51 VSS[210] VSS[310] V19
AG2 VSS[51] VSS[130] AH48 BG18 VSS[211] VSS[311] V20
AG52 VSS[52] VSS[131] AT32 BG24 VSS[212] VSS[312] V22
AH11 VSS[53] VSS[132] AT36 BG4 VSS[213] VSS[313] V30
AH15 VSS[54] VSS[133] AT41 BG50 VSS[214] VSS[314] V31
AH16 VSS[55] VSS[134] AT47 BH11 VSS[215] VSS[315] V32
AH24 VSS[56] VSS[135] AT7 BH15 VSS[216] VSS[316] V34
AH32 VSS[57] VSS[136] AV12 BH19 VSS[217] VSS[317] V35
AV18 VSS[58] VSS[137] AV16 BH23 VSS[218] VSS[318] V38
AH43 VSS[59] VSS[138] AV20 BH31 VSS[219] VSS[319] V43
AH47 VSS[60] VSS[139] AV24 BH35 VSS[220] VSS[320] V45
AH7 VSS[61] VSS[140] AV30 BH39 VSS[221] VSS[321] V46
AJ19 VSS[62] VSS[141] AV34 BH43 VSS[222] VSS[322] V47
AJ2 VSS[63] VSS[142] AV38 BH47 VSS[223] VSS[323] V49
AJ20 VSS[64] VSS[143] AV42 BH7 VSS[224] VSS[324] V5
AJ22 VSS[65] VSS[144] AV46 C12 VSS[225] VSS[325] V7
B
AJ23 VSS[66] VSS[145] AV49 C50 VSS[226] VSS[326] V8 B
AJ26 VSS[67] VSS[146] AV5 D51 VSS[227] VSS[327] W2
AJ28 VSS[68] VSS[147] AV8 E12 VSS[228] VSS[328] W52
AJ32 VSS[69] VSS[148] AW14 E16 VSS[229] VSS[329] Y11
AJ34 VSS[70] VSS[149] AW18 E20 VSS[230] VSS[330] Y12
AT5 VSS[71] VSS[150] AW2 E24 VSS[231] VSS[331] Y15
AJ4 VSS[72] VSS[151] BF9 E30 VSS[232] VSS[332] Y19
AK12 VSS[73] VSS[152] AW32 E34 VSS[233] VSS[333] Y23
AM41 VSS[74] VSS[153] AW36 E38 VSS[234] VSS[334] Y28
AN19 VSS[75] VSS[154] AW40 E42 VSS[235] VSS[335] Y30
AK26 VSS[76] VSS[155] AW52 E46 VSS[236] VSS[336] Y31
AK22 VSS[77] VSS[156] AY11 E48 VSS[237] VSS[337] Y32
AK23 VSS[78] VSS[157] AY43 E6 VSS[238] VSS[338] Y38
AK28 VSS[79] VSS[158] AY47 E8 VSS[239] VSS[339] Y43
F49 VSS[240] VSS[340] Y46
IbexPeak-M_R1P0 F5 P49
VSS[241] VSS[341]
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
H30 VSS[255] VSS[355] AK45
A H34 VSS[256] VSS[356] AK39 A
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
QUANTA
IbexPeak-M_R1P0
Title
COMPUTER
PCH 6/6(GND)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 12 of 61


5 4 3 2 1
5 4 3 2 1

5/13: Change connector from Tyco to Foxconn to avoid shortage Channel A


+1.5V_SUS
JDIM2A M_A_DQ[63:0] 4 JDIM2B
4 M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0 75 44
M_A_A1 A0 DQ0 M_A_DQ1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_A_A2 96 15 M_A_DQ2 81 49
M_A_A3 A2 DQ2 M_A_DQ3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_A_A4 92 4 M_A_DQ4 87 55
M_A_A5 A4 DQ4 M_A_DQ5 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
M_A_A6 90 16 M_A_DQ6 93 61
M_A_A7 A6 DQ6 M_A_DQ7 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_A_A8 89 21 M_A_DQ8 99 66
D
M_A_A9 A8 DQ8 M_A_DQ9 VDD9 VSS24 D
85 A9 DQ9 23 100 VDD10 VSS25 71
M_A_A10 107 33 M_A_DQ10 105 72
A10/AP DQ10 +3.3V_RUN VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


M_A_A11 84 35 M_A_DQ11 106 127
M_A_A12 A11 DQ11 M_A_DQ12 VDD12 VSS27
83 A12/BC# DQ12 22 111 VDD13 VSS28 128
M_A_A13 119 24 M_A_DQ13 112 133
M_A_A14 A13 DQ13 M_A_DQ14 VDD14 VSS29
80 A14 DQ14 34 117 VDD15 VSS30 134
M_A_A15 78 36 M_A_DQ15 C402 C404 118 138
A15 DQ15 VDD16 VSS31

PC2100 DDR3 SDRAM SO-DIMM


39 M_A_DQ16 123 139
DQ16 M_A_DQ17 2.2U/6.3V_6 .1U/10V_4 VDD17 VSS32
4 M_A_BS0 109 BA0 DQ17 41 124 VDD18 VSS33 144
108 51 M_A_DQ18 145
4 M_A_BS1 BA1 DQ18 VSS34
79 53 M_A_DQ19 199 150
4 M_A_BS2 BA2 DQ19 VDDSPD VSS35
114 40 M_A_DQ20 151
4 M_A_CS#0 S0# DQ20 VSS36
121 42 M_A_DQ21 77 155
4 M_A_CS#1 S1# DQ21 NC1 VSS37
101 50 M_A_DQ22 122 156
4 M_A_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_A_DQ23 125 161
4 M_A_CLK0# CK0# DQ23 NCTEST VSS39
102 57 M_A_DQ24 162
4 M_A_CLK1 CK1 DQ24 VSS40
104 59 M_A_DQ25 PM_EXTTS#0 198 167
4 M_A_CLK1# CK1# DQ25 3 PM_EXTTS#0 EVENT# VSS41
73 67 M_A_DQ26 30 168
4 M_A_CKE0 CKE0 DQ26 3,14 DDR3_DRAMRST# RESET# VSS42
74 69 M_A_DQ27 172
4 M_A_CKE1 CKE1 DQ27 VSS43
115 56 M_A_DQ28 173
4 M_A_CAS# CAS# DQ28 VSS44
110 58 M_A_DQ29 M_VREF_DQ_DIMM0 1 178
4 M_A_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_A_DQ30 126 179
4 M_A_WE# WE# DQ30 VREF_CA VSS46
SA0_DIM0_0 197 70 M_A_DQ31 C272 C275 184
SA1_DIM0_0 SA0 DQ31 M_A_DQ32 VSS47
201 SA1 DQ32 129 VSS48 185
MEM_SCLK 202 131 M_A_DQ33 2.2U/6.3V_6 .1U/10V_4 2 189
9,14,28,31,32,34 MEM_SCLK SCL DQ33 VSS1 VSS49
MEM_SDATA 200 141 M_A_DQ34 3 190
9,14,28,31,32,34 MEM_SDATA SDA DQ34 VSS2 VSS50
143 M_A_DQ35 8 195

(204P)
DQ35 M_A_DQ36 VSS3 VSS51
4 M_A_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
120 132 M_A_DQ37 M_VREF_CA_DIMM0 13
4 M_A_ODT1 ODT1 DQ37 VSS5
C 140 M_A_DQ38 14 C
4 M_A_DM[7:0] DQ38 VSS6
M_A_DM0 11 142 M_A_DQ39 C374 C372 19
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS7
28 DM1 DQ40 147 20 VSS8
M_A_DM2 46 149 M_A_DQ41 2.2U/6.3V_6 .1U/10V_4 25
(204P)

M_A_DM3 DM2 DQ41 M_A_DQ42 VSS9


63 DM3 DQ42 157 26 VSS10 VTT1 203 +0.75V_DDR_VTT
M_A_DM4 136 159 M_A_DQ43 31 204
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_A_DM6 170 148 M_A_DQ45 37 205
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS13 G1
187 DM7 DQ46 158 38 VSS14 G2 206
160 M_A_DQ47 43 207
4 M_A_DQS[7:0] DQ47 VSS15 H1
M_A_DQS0 12 163 M_A_DQ48 208
M_A_DQS1 DQS0 DQ48 M_A_DQ49 H2
29 DQS1 DQ49 165
M_A_DQS2 47 175 M_A_DQ50 AS0A626-U4SN-7F
M_A_DQS3 DQS2 DQ50 M_A_DQ51
64 DQS3 DQ51 177
M_A_DQS4 137 164 M_A_DQ52
M_A_DQS5 DQS4 DQ52 M_A_DQ53
154 DQS5 DQ53 166
M_A_DQS6 171 174 M_A_DQ54
M_A_DQS7 DQS6 DQ54 M_A_DQ55
4 M_A_DQS#[7:0] 188 DQS7 DQ55 176
M_A_DQS#0 10 181 M_A_DQ56
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57
27 183
M_A_DQS#2 45
DQS#1
DQS#2
DQ57
DQ58 191 M_A_DQ58 For CH A SO-DIMM VREF_DQ for M2
M_A_DQS#3 62 193 M_A_DQ59
M_A_DQS#4 DQS#3 DQ59 M_A_DQ60
135 180
M_A_DQS#5 152
DQS#4
DQS#5
DQ60
DQ61 182 M_A_DQ61 Delete according to Intel Design Change
M_A_DQS#6 169 192 M_A_DQ62
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194

M1 VREF 5/18: Separate voltage divider for M_VREF_DQ_DIMM0


AS0A626-U4SN-7F
and M_VREF_CA_DIMM0 to follow Intel CRB design
B B

SA1_DIM0_0 6/02: Change M1 from voltage regulator to voltage divider


SA0_DIM0_0 Note:
If SA1_DIM0 = 0, SA0_DIM0 = 0
2

R293 R278 SO-DIMMA SPD Address is 0xA0


SO-DIMMA TS Address is 0x30 +DDR_VTTREF
10K 10K If SA1_DIM0 = 0, SA0_DIM0 = 1

2
1

SO-DIMMA SPD Address is 0xA2 R685


SO-DIMMA TS Address is 0x32 *0_NC
+1.5V_SUS M_VREF_DQ_DIMM0

1
R155 1K/F
1 2

2
+1.5V_SUS Channel A Decoupling R153 C283

1K/F .1U/10V_4
1

C305 C370 C307 C368 C338 C335 C316 C362 C319 C348 C323 + C687
+DDR_VTTREF
10U 10U 10U 10U 10U 10U .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 330U
2

R686
*0_NC
A +1.5V_SUS M_VREF_CA_DIMM0 A
+0.75V_DDR_VTT
1

R143 1K/F
1 2
QUANTA
2

C420 C417 C418 C421 C419


R151 C860
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U
1K/F .1U/10V_4 Title
COMPUTER
DDR3 DIMM-A
1

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 13 of 61


5 4 3 2 1
5 4 3 2 1

5/13: Change connector from Tyco to Foxconn to avoid shortage Channel B


+1.5V_SUS
JDIM1A M_B_DQ[63:0] 4 JDIM1B
4 M_B_A[15:0]
M_B_A0 98 5 M_B_DQ0 75 44
M_B_A1 A0 DQ0 M_B_DQ1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_B_A2 96 15 M_B_DQ2 81 49
M_B_A3 A2 DQ2 M_B_DQ3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ4 87 55
M_B_A5 A4 DQ4 M_B_DQ5 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ6 93 61
M_B_A7 A6 DQ6 M_B_DQ7 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 89 21 M_B_DQ8 99 66
D
M_B_A9 A8 DQ8 M_B_DQ9 VDD9 VSS24 D
85 A9 DQ9 23 100 VDD10 VSS25 71
M_B_A10 107 33 M_B_DQ10 105 72
A10/AP DQ10 +3.3V_RUN VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


M_B_A11 84 35 M_B_DQ11 106 127
M_B_A12 A11 DQ11 M_B_DQ12 VDD12 VSS27
83 A12/BC# DQ12 22 111 VDD13 VSS28 128
M_B_A13 119 24 M_B_DQ13 112 133
M_B_A14 A13 DQ13 M_B_DQ14 VDD14 VSS29
80 A14 DQ14 34 117 VDD15 VSS30 134
M_B_A15 78 36 M_B_DQ15 C403 C406 118 138
A15 DQ15 VDD16 VSS31

PC2100 DDR3 SDRAM SO-DIMM


39 M_B_DQ16 123 139
DQ16 M_B_DQ17 2.2U/6.3V_6 .1U/10V_4 VDD17 VSS32
4 M_B_BS0 109 BA0 DQ17 41 124 VDD18 VSS33 144
108 51 M_B_DQ18 145
4 M_B_BS1 BA1 DQ18 VSS34
79 53 M_B_DQ19 199 150
4 M_B_BS2 BA2 DQ19 VDDSPD VSS35
114 40 M_B_DQ20 151
4 M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ21 77 155
4 M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ22 122 156
4 M_B_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ23 125 161
4 M_B_CLK0# CK0# DQ23 NCTEST VSS39
102 57 M_B_DQ24 162
4 M_B_CLK1 CK1 DQ24 VSS40
104 59 M_B_DQ25 PM_EXTTS#1 198 167
4 M_B_CLK1# CK1# DQ25 3 PM_EXTTS#1 EVENT# VSS41
73 67 M_B_DQ26 30 168
4 M_B_CKE0 CKE0 DQ26 3,13 DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ27 172
4 M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ28 173
4 M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ29 M_VREF_DQ_DIMM1 1 178
4 M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ30 126 179
4 M_B_WE# WE# DQ30 VREF_CA VSS46
SA0_DIM1_0 197 70 M_B_DQ31 C274 C276 184
SA1_DIM1_0 SA0 DQ31 M_B_DQ32 VSS47
201 SA1 DQ32 129 VSS48 185
MEM_SCLK 202 131 M_B_DQ33 2.2U/6.3V_6 .1U/10V_4 2 189
9,13,28,31,32,34 MEM_SCLK SCL DQ33 VSS1 VSS49
MEM_SDATA 200 141 M_B_DQ34 3 190
9,13,28,31,32,34 MEM_SDATA SDA DQ34 VSS2 VSS50
143 M_B_DQ35 8 195

(204P)
DQ35 M_B_DQ36 VSS3 VSS51
4 M_B_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
120 132 M_B_DQ37 M_VREF_CA_DIMM1 13
4 M_B_ODT1 ODT1 DQ37 VSS5
C 140 M_B_DQ38 14 C
4 M_B_DM[7:0] DQ38 VSS6
M_B_DM0 11 142 M_B_DQ39 C375 C373 19
M_B_DM1 DM0 DQ39 M_B_DQ40 VSS7
28 DM1 DQ40 147 20 VSS8
M_B_DM2 46 149 M_B_DQ41 2.2U/6.3V_6 .1U/10V_4 25
(204P)

M_B_DM3 DM2 DQ41 M_B_DQ42 VSS9


63 DM3 DQ42 157 26 VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM4 136 159 M_B_DQ43 31 204
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_B_DM6 170 148 M_B_DQ45 37 205
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS13 G1
187 DM7 DQ46 158 38 VSS14 G2 206
160 M_B_DQ47 43 207
4 M_B_DQS[7:0] DQ47 VSS15 H1
M_B_DQS0 12 163 M_B_DQ48 208
M_B_DQS1 DQS0 DQ48 M_B_DQ49 H2
29 DQS1 DQ49 165
M_B_DQS2 47 175 M_B_DQ50 AS0A626-U8SN-7F
M_B_DQS3 DQS2 DQ50 M_B_DQ51
64 DQS3 DQ51 177
M_B_DQS4 137 164 M_B_DQ52
M_B_DQS5 DQS4 DQ52 M_B_DQ53
154 DQS5 DQ53 166
M_B_DQS6 171 174 M_B_DQ54
M_B_DQS7 DQS6 DQ54 M_B_DQ55
4 M_B_DQS#[7:0] 188 DQS7 DQ55 176
M_B_DQS#0 10 181 M_B_DQ56
M_B_DQS#1 DQS#0 DQ56 M_B_DQ57
27 DQS#1 DQ57 183
M_B_DQS#2 45 191 M_B_DQ58
M_B_DQS#3 DQS#2 DQ58 M_B_DQ59
62 193
M_B_DQS#4 135
DQS#3
DQS#4
DQ59
DQ60 180 M_B_DQ60 For CH B SO-DIMM VREF_DQ for M2
M_B_DQS#5 152 182 M_B_DQ61
M_B_DQS#6 DQS#5 DQ61 M_B_DQ62
169 192
+3.3V_RUN M_B_DQS#7 186
DQS#6
DQS#7
DQ62
DQ63 194 M_B_DQ63 Delete according to Intel Design Change
2

AS0A626-U8SN-7F
R280 5/18: Separate voltage divider for M_VREF_DQ_DIMM1
B
10K M1 VREF B
and M_VREF_CA_DIMM1 to follow Intel CRB design
1

SA1_DIM1_0 Note: 6/02: Change M1 from voltage regulator to voltage divider


SA0_DIM1_0
If SA1_DIM1 = 1, SA0_DIM1 = 0
2

SO-DIMMA SPD Address is 0xA4


R275 SO-DIMMA TS Address is 0x34 +DDR_VTTREF
10K If SA1_DIM1 = 1, SA0_DIM1 = 1

2
SO-DIMMA SPD Address is 0xA6 R687
1

SO-DIMMA TS Address is 0x36 *0_NC


+1.5V_SUS M_VREF_DQ_DIMM1

1
R154 1K/F
1 2
Channel B Decoupling
2

+1.5V_SUS
R152 C282
1K/F
.1U/10V_4
1

C308 C341 C367 C306 C337 C369 C314 C320 C357 C322 C360 + C667
330U +DDR_VTTREF
10U 10U 10U 10U 10U 10U .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4
2

R688
*0_NC
A +1.5V_SUS M_VREF_CA_DIMM1 A
+0.75V_DDR_VTT
1

R141 1K/F
1 2
QUANTA
2

C413 C412 C415 C416 C414


R150 C861
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U 1K/F
.1U/10V_4 Title
COMPUTER
DDR3 DIMM-B
1

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 14 of 61


5 4 3 2 1
5 4 3 2 1

Realtek: 0.1uFx6pcs, 22uFx1pcs


+3.3V_RUN IDT: 0.1uFx5pcs, 10uFx1pcs
U47
L68 BLM21PG600SN1D
40mil +3.3V_CLK_VDD 1
0805 VDD_USB CLK_BUF_BCLK
D
5 VDD_LCD CPU-0 23 CLK_BUF_BCLK 9 D
17 22 CLK_BUF_BCLK#
VDD_SRC CPU-0# CLK_BUF_BCLK# 9
C761 C738 C746 C754 C749 C745 +VDDIO_CLK 24 VDD_CPU
29 20
10U/6.3V 0.1U 0.1U 0.1U 0.1U 0.1U 15
18
VDD_REF
VDD_SRC_IO CK505 CPU-1
CPU-1# 19
VDD_CPU_IO
9 VSS_SATA
QFN32 DOT96T_LPR 3 CLK_BUF_DREFCLK
CLK_BUF_DREFCLK 9
0.1uF near the every power pin. 2 4 CLK_BUF_DREFCLK#
VSS_USB DOT96C_LPR CLK_BUF_DREFCLK# 9
8 VSS_LCD
12 13 CLK_BUF_PCIE_3GPLL
VSS_SRC SRC-1 CLK_BUF_PCIE_3GPLL 9
21 14 CLK_BUF_PCIE_3GPLL#
VSS_CPU SRC-1# CLK_BUF_PCIE_3GPLL# 9
26
8 VSS_REF
SATA
SATA#
10
11
CLK_BUF_DREFSSCLK
CLK_BUF_DREFSSCLK#
CLK_BUF_DREFSSCLK 9
CLK_BUF_DREFSSCLK# 9
+3.3V_RUN
R607 10K 16 6 27M_NSS R601 33
CPU_STOP# 27MHz_nonSS CLK_VGA_27M 17
25 7 27M_SS R604 33
43 CK_PWRGD_R CK_PWRGD/PD#_3.3 27MHz_SS CLK_VGA_27M_SS 17
CLK_ICH_14M R590 33 CPU_SEL 30
9 CLK_ICH_14M REF_0/CPU_SEL
Place within
XTAL_OUT
0.5" of CLKGEN
Place the 33 ohm 27 XOUT
resistors close to the CK 505 XTAL_IN 28 XIN

37 EC_SMBDAT0 EC_SMBDAT0 31 33
EC_SMBCLK0 SDATA GND
37 EC_SMBCLK0 32 SCLK

SLG8SP585VTR

C
Realtek: 0.1uFx3pcs, 22uFx1pcs C
IDT: 0.1uFx2pcs, 10uFx1pcs

+3.3V_RUN +VDDIO_CLK

L69 BLM21PG600SN1D
R614 *0_NC 40mil
Y5 0805
XTAL_IN 1 2 XTAL_OUT +1.05V_PCH C772 C750 C762

14.318MHZ 10U 0.1U 0.1U

2
C734 R613 0
C733 33P
33P HP: 10u x2pcs

1
50 50

SLG,IDT: +1.05V Place each 0.1uF cap as close as


possible to each VDD IO pin. Place
Realtek: +3.3V the 10uF caps on the VDD_IO plane.

+VDDIO_CLK:
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.
Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.
+3.3V_RUN IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.
B B

CPU_SEL:
2

PIN 30 CPU_0 CPU_1 SLG date sheet (V0.2) P15:


R591
*4.7K_NC
High Voltage: Min 0.7V, Max 1.5V.
0(default) 133MHz 133MHz Low Voltage: Min Vss-0.3V, Max 0.35V.
Realtek date sheet(V1.2) P11:
1

CPU_SEL
High Voltage: Min 0.7V, Max 1.5V.
1(0.7V-1.5V) 100MHz 100MHz
Low Voltage: Min Vss-0.3V, Max 0.35V.
2

R592 IDT date sheet(V0.7) P10:


4.7K C737 High Voltage: Min 0.7V, Max 1.5V.
*10P_NC Low Voltage: Min Vss-0.3V, Max 0.35V.
1

EMI Capacitor

A A

QUANTA
Title
COMPUTER
CLOCK GENERATOR

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 15 of 61


5 4 3 2 1
5 4 3 2 1

ASIC PN 100-CK QCI P/N


U29A -----------------------------------------------------------------------------------------
M96-M2 XT A13 216-0729051 100-CK3186 AJ072900T08
M97-M2 LP A11 216-0731001 100-CG1806 AJ073100T01
3 PCIE_MTX_GRX_P[0..15] PCIE_MRX_GTX_P[0..15] 3
3 PCIE_MTX_GRX_N[0..15] PCIE_MRX_GTX_N[0..15] 3

PCIE_MTX_GRX_P0 AA38 Y33 PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_C_P0 C189 0.1U PCIE_MRX_GTX_P0


PCIE_MTX_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_MRX_GTX_C_N0
Y37 PCIE_RX0N PCIE_TX0N Y32
PCIE_MRX_GTX_C_P1 C188 0.1U PCIE_MRX_GTX_P1
D D
PCIE_MTX_GRX_P1 Y35 W33 PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_C_P2 C205 0.1U PCIE_MRX_GTX_P2
PCIE_MTX_GRX_N1 PCIE_RX1P PCIE_TX1P PCIE_MRX_GTX_C_N1
W36 PCIE_RX1N PCIE_TX1N W32
PCIE_MRX_GTX_C_P3 C176 0.1U PCIE_MRX_GTX_P3

PCIE_MTX_GRX_P2 W38 U33 PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_C_P4 C212 0.1U PCIE_MRX_GTX_P4


PCIE_MTX_GRX_N2 PCIE_RX2P PCIE_TX2P PCIE_MRX_GTX_C_N2
V37 PCIE_RX2N PCIE_TX2N U32
PCIE_MRX_GTX_C_P5 C204 0.1U PCIE_MRX_GTX_P5

PCIE_MTX_GRX_P3 V35 U30 PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_C_P6 C218 0.1U PCIE_MRX_GTX_P6


PCIE_MTX_GRX_N3 PCIE_RX3P PCIE_TX3P PCIE_MRX_GTX_C_N3
U36 PCIE_RX3N PCIE_TX3N U29
PCIE_MRX_GTX_C_P7 C216 0.1U PCIE_MRX_GTX_P7

PCIE_MTX_GRX_P4 U38 T33 PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_C_P8 C222 0.1U PCIE_MRX_GTX_P8


PCIE_MTX_GRX_N4 PCIE_RX4P PCIE_TX4P PCIE_MRX_GTX_C_N4
T37 PCIE_RX4N PCIE_TX4N T32

PCI EXPRESS INTERFACE


PCIE_MRX_GTX_C_P9 C211 0.1U PCIE_MRX_GTX_P9

PCIE_MTX_GRX_P5 T35 T30 PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_C_P10 C230 0.1U PCIE_MRX_GTX_P10


PCIE_MTX_GRX_N5 PCIE_RX5P PCIE_TX5P PCIE_MRX_GTX_C_N5
R36 PCIE_RX5N PCIE_TX5N T29
PCIE_MRX_GTX_C_P11 C221 0.1U PCIE_MRX_GTX_P11

PCIE_MTX_GRX_P6 R38 P33 PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_C_P12 C245 0.1U PCIE_MRX_GTX_P12


PCIE_MTX_GRX_N6 PCIE_RX6P PCIE_TX6P PCIE_MRX_GTX_C_N6
P37 PCIE_RX6N PCIE_TX6N P32
PCIE_MRX_GTX_C_P13 C247 0.1U PCIE_MRX_GTX_P13

PCIE_MTX_GRX_P7 P35 P30 PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_C_P14 C249 0.1U PCIE_MRX_GTX_P14


PCIE_MTX_GRX_N7 PCIE_RX7P PCIE_TX7P PCIE_MRX_GTX_C_N7
N36 PCIE_RX7N PCIE_TX7N P29
PCIE_MRX_GTX_C_P15 C251 0.1U PCIE_MRX_GTX_P15

PCIE_MTX_GRX_P8 N38 N33 PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_C_N0 C194 0.1U PCIE_MRX_GTX_N0


PCIE_MTX_GRX_N8 PCIE_RX8P PCIE_TX8P PCIE_MRX_GTX_C_N8
C M37 PCIE_RX8N PCIE_TX8N N32 C
PCIE_MRX_GTX_C_N1 C179 0.1U PCIE_MRX_GTX_N1

PCIE_MTX_GRX_P9 M35 N30 PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_C_N2 C207 0.1U PCIE_MRX_GTX_N2


PCIE_MTX_GRX_N9 PCIE_RX9P PCIE_TX9P PCIE_MRX_GTX_C_N9
L36 PCIE_RX9N PCIE_TX9N N29
PCIE_MRX_GTX_C_N3 C171 0.1U PCIE_MRX_GTX_N3

PCIE_MTX_GRX_P10 L38 L33 PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_C_N4 C215 0.1U PCIE_MRX_GTX_N4


PCIE_MTX_GRX_N10 PCIE_RX10P PCIE_TX10P PCIE_MRX_GTX_C_N10
K37 PCIE_RX10N PCIE_TX10N L32
PCIE_MRX_GTX_C_N5 C195 0.1U PCIE_MRX_GTX_N5

PCIE_MTX_GRX_P11 K35 L30 PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_C_N6 C219 0.1U PCIE_MRX_GTX_N6


PCIE_MTX_GRX_N11 PCIE_RX11P PCIE_TX11P PCIE_MRX_GTX_C_N11
J36 PCIE_RX11N PCIE_TX11N L29
PCIE_MRX_GTX_C_N7 C217 0.1U PCIE_MRX_GTX_N7

PCIE_MTX_GRX_P12 J38 K33 PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_C_N8 C223 0.1U PCIE_MRX_GTX_N8


PCIE_MTX_GRX_N12 PCIE_RX12P PCIE_TX12P PCIE_MRX_GTX_C_N12
H37 PCIE_RX12N PCIE_TX12N K32
PCIE_MRX_GTX_C_N9 C208 0.1U PCIE_MRX_GTX_N9

PCIE_MTX_GRX_P13 H35 J33 PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_C_N10 C231 0.1U PCIE_MRX_GTX_N10


PCIE_MTX_GRX_N13 PCIE_RX13P PCIE_TX13P PCIE_MRX_GTX_C_N13
G36 PCIE_RX13N PCIE_TX13N J32
PCIE_MRX_GTX_C_N11 C220 0.1U PCIE_MRX_GTX_N11

PCIE_MTX_GRX_P14 G38 K30 PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_C_N12 C246 0.1U PCIE_MRX_GTX_N12


PCIE_MTX_GRX_N14 PCIE_RX14P PCIE_TX14P PCIE_MRX_GTX_C_N14
F37 PCIE_RX14N PCIE_TX14N K29
PCIE_MRX_GTX_C_N13 C248 0.1U PCIE_MRX_GTX_N13

PCIE_MTX_GRX_P15 F35 H33 PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_C_N14 C250 0.1U PCIE_MRX_GTX_N14


PCIE_MTX_GRX_N15 PCIE_RX15P PCIE_TX15P PCIE_MRX_GTX_C_N15
E37 PCIE_RX15N PCIE_TX15N H32
PCIE_MRX_GTX_C_N15 C252 0.1U PCIE_MRX_GTX_N15
B B

CLOCK
9 CLK_PCIE_VGA AB35 PCIE_REFCLKP
9 CLK_PCIE_VGA# AA36 PCIE_REFCLKN
!!! Park, Madison : Pop 0 Ohm
CALIBRATION
M96: depop 0 ohm R101 1.27K
AJ21 NC#1 PCIE_CALRP Y30
AK21 NC#2
R426 *0_NC AH16 Y29 R99 2K/F +PCIE_VDDC
PWRGOOD PCIE_CALRN

AA30 PERSTB

R100
2 1 PERST#
3,9,26,28,29,31,32,41,56 PLTRST#
0 216-0729051(M96-M2 XT)

A A

QUANTA
Title
COMPUTER
M96XT_PCIE

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 16 of 61


5 4 3 2 1
5 4 3 2 1

RAM_ RAM_ RAM_ RAM_


Memory Straps TYPE_CFG3 TYPE_CFG2 TYPE_CFG1 TYPE_CFG0 U29B CONFIGURATION STRAPS
800 MHz 512MB(32M*16) Hynix_Tiva die H5TQ5163MFR-12 1 1 1 1
STRAPS PIN DESCRIPTION SET
reserve for Qimonda 1 1 1 0
TXCAP_DPA3P AU24 ATI_HDMI_CLK+ 23 TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING
reserve for Samsung 1 1 0 1 TXCAM_DPA3N AV23 ATI_HDMI_CLK- 23 0 = 50% Tx output swing 1
800 MHz 1GB(64M*16) Hynix_Orion die H5TQ1G63BFR-12C 1 0 1 1 AT25 1 = Full Tx output swing
TX0P_DPA2P ATI_HDMI_TX0+ 23
MUTI GFX AR24 TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED
TX0M_DPA2N ATI_HDMI_TX0- 23
800 MHz 1GB(64M*16) Qimonda_A1 die IDGH1G-04A1F1C-16X 1 0 1 0 DPA 1
0 = Disable ; 1 = Enable
TX1P_DPA1P AU26 ATI_HDMI_TX1+ 23
800 MHz 1GB(64M*16) Samsung_E die K4W1G1646E-HC12 1 0 0 1 TX1M_DPA1N AV25 ATI_HDMI_TX1- 23 BIF_GEN2_EN_A GPIO2 0 = Advertises the PCIe device as
2.5 GT/s capable at power-on.
Note : Required Frequency = 800 MHz AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 ATI_HDMI_TX2+ 23 0
AU8 AR26 1 = Advertises the PCIe device as
D DVPCNTL_MVP_1 TX2M_DPA0N ATI_HDMI_TX2- 23 D
AP8 5.0 GT/s capable at power-on.
+1.8V_RUN DVPCNTL_0
AW8 DVPCNTL_1 TXCBP_DPB3P AR30 DP_LANE3_P 23
AR3 DVPCNTL_2 TXCBM_DPB3N AT29 DP_LANE3_N 23 GPIO_5_AC_BATT GPIO5 1 = AC (Performance mode)
R427 10K RAM_TYPE_CFG0 MEMORY APERTURE SIZE SELECT AR1 1
R429 *10K_NC RAM_TYPE_CFG1 DVPCLK (M96-M2) 0 = Battery saving mode
R428 *10K_NC RAM_TYPE_CFG2 VRAM TYPE MEMORY CFG2 CFG1 CFG0
AU1
AU3
DVPDATA_0 TX3P_DPB2P AV31
AU30
DP_LANE2_P 23
DP_LANE2_N 23 VGA_DIS GPIO9 0: VGA Controller capacity enabled
R430 10K RAM_TYPE_CFG3 DVPDATA_1 DPB TX3M_DPB2N
SIZE GPIO13 GPIO12 GPIO11 AW3 DVPDATA_2 1: The device will not be recognized 0
AP6 AR32 DP_LANE1_P 23
128MB 0 0 0 AW5
DVPDATA_3 TX4P_DPB1P
AT31 as the system’s VGA controller
+3.3V_DELAY DVPDATA_4 TX4M_DPB1N DP_LANE1_N 23
AU5 DVPDATA_5 BIOS_ROM_EN GPIO22 Enable external BIOS ROM device
256MB 0 0 1 AR6 DVPDATA_6 TX5P_DPB0P AT33 DP_LANE0_P 23 0 = Disable ; 1 = Enable 0
R61 3K RAM_CFG0 AW6 AU32 DP_LANE0_N 23
R62 *3K_NC RAM_CFG1 DVPDATA_7 TX5M_DPB0N
APERTURE SIZE 64MB 0 1 0 AU6 DVPDATA_8 AUD[1] VGAHSYNC AUD[1:0]:
R63 *3K_NC RAM_CFG2 AT7 AU14
DVPDATA_9 TXCCP_DPC3P AUD[0] VGAVSYNC 00 - No audio function;
AV7 DVPDATA_10 TXCCM_DPC3N AV13
AN7 01 - Audio for DisplayPort only; 11
DVPDATA_11 10 - Audio for DisplayPort and HDMI if dongle is
AV9 DVPDATA_12 TX0P_DPC2P AT15
+3.3V_DELAY AT9 DVPDATA_13 TX0M_DPC2N AR14 detected;
AR10 DVPDATA_14 11 - Audio for both DisplayPort and HDMI.
R77 3K GPIO0 AW10 DPC AU16
R79 3K GPIO1 DVPDATA_15 TX1P_DPC1P
AU10 DVPDATA_16 TX1M_DPC1N AV15
R64 *3K_NC GPIO2 AP10 VIP_DEVICE_STRAP_EN BIOS_ROM_EN VIP Device Strap Enable
R85 *3K_NC GPIO3 DVPDATA_17
AV11 DVPDATA_18 TX2P_DPC0P AT17 0 = Disable ; 1 = Enable 0
R76 *3K_NC GPIO4 AT11 AR16
R80 3K GPIO5 RAM_TYPE_CFG0 DVPDATA_19 TX2M_DPC0N
AR12 DVPDATA_20 !!! NC when M92-M2
R60 *3K_NC GPIO6 RAM_TYPE_CFG1 AW12 AU20
R83 *3K_NC GPIO8 RAM_TYPE_CFG2 DVPDATA_21 TXCDP_DPD3P
AU12 DVPDATA_22 TXCDM_DPD3N AT19
R82 *3K_NC GFX_CORE_CNTRL2 RAM_TYPE_CFG3 AP12
R81 *3K_NC GPIO10 DVPDATA_23
TX3P_DPD2P AT21
TX3M_DPD2N AR20
R444 3K VGAHSYNC
R442 3K VGAVSYNC DPD AU22
TX4P_DPD1P
TX4M_DPD1N AV21
R89 *3K_NC VGAVSYNC2
I2C AT23
TEMP_FAIL TX5P_DPD0P
1 2 TX5M_DPD0N AR22
R71 *10K_NC AK26 SCL
C AJ26 SDA
C

AD39 VGA_RED VGA_RED 25


GENERAL PURPOSE I/O R VGA_BLU
RB AD37
GPIO0 AH20 VGA_GRN
+3.3V_DELAY GPIO1 GPIO_0 VGA_GRN VGA_RED
AH18 GPIO_1 G AE36 VGA_GRN 25
GPIO2 AN16 AD35
GPIO3 GPIO_2 GB
AH23 GPIO_3_SMBDATA
3

R47 Q19 GPIO4 AJ23 AF37 VGA_BLU VGA_BLU 25 R441 R443 R445
MMST3904-7-F GPIO5 GPIO_4_SMBCLK B 150/F 150/F 150/F
23 ATI_DP_HPD 2 1 2 AH17 GPIO_5_AC_BATT BB AE38
GPIO6 AJ17 DAC1 Layout Note:
150K GPIO_6 VGAHSYNC
29 PANEL_BKEN AK17 AC36 VGAHSYNC 25 Place 150 ohm
1

GPIO14_HPD2 GPIO8 GPIO_7_BLON HSYNC VGAVSYNC


AJ13 GPIO_8_ROMSO VSYNC AC38 VGAVSYNC 25
GFX_CORE_CNTRL2 AH15 termination resistors
52 GFX_CORE_CNTRL2 GPIO_9_ROMSI
GPIO10 AJ16 close to ATI CHIP.
R44 R50 RAM_CFG0 GPIO_10_ROMSCK RSET R97
AK16 GPIO_11 RSET AB34 2 1 499/F
RAM_CFG1 AL16 L21
*365K/F_NC 10K RAM_CFG2 GPIO_12
AM16 GPIO_13 AVDD AD34 +AVDD +1.8V_RUN +AVDD (1.8V @ 70mA AVDD)
GPIO14_HPD2 AM14 AE34 BLM15BD121SN1D
GPIO_14_HPD2 AVSSQ C129 C130 C131
52 GFX_CORE_CNTRL0 AM13 GPIO_15_PWRCNTL_0 120ohm, 300mA
CLK_VGA_27M_SS_R AK14 AC33
GPIO_16_SSIN VDD1DI +VDD1DI 10uF 1uF 100nF
20 THERMAL_INT# AG30 GPIO_17_THERMAL_INT VSS1DI AC34
T70 PAD AN14
+3.3V_DELAY TEMP_FAIL GPIO_18_HPD3
AM17 GPIO_19_CTF
52 GFX_CORE_CNTRL1 AL13 GPIO_20_PWRCNTL_1 R2 AC30
18 BB_ENA AJ14 AC31 L22
GPIO_21_BB_EN R2B
3

R46 Q20 AK13 +1.8V_RUN ( 1.8V @ 45mA VDD1DI)


T62 PAD GPIO_22_ROMCSB +VDD1DI
2 1 2 MMST3904-7-F AN13 AD30 BLM15BD121SN1D
23 ATI_HDMI_DET T59 PAD GPIO_23_CLKREQB G2
AM23 AD31 120ohm, 300mA C145 C146 C147
T61 PAD JTAG_TRSTB G2B
150K AN23 ( 1.8V @ 40mA VDD2DI)
T63 PAD
1

HPD1 JTAG_TDI 10uF 1uF 100nF


T73 PAD AK23 JTAG_TCK B2 AF30
T72 PAD AL24 JTAG_TMS B2B AF31
T71 PAD AM24 JTAG_TDO
R45 R51 AJ19
T65 PAD GENERICA
AK19 AC32 L51
T69 PAD GENERICB C
*365K/F_NC 10K AJ20 AD32 +1.8V_RUN (1.8V @ 20mA A2VDDQ)
T64 PAD GENERICC Y +A2VDDQ
AK20 AF32 BLM15BD121SN1D
T60 PAD GENERICD COMP
AJ24 120ohm, 300mA C540 C106
B T66 PAD GENERICE_HPD4 DAC2 B
T68 PAD AH26 GENERICF
L9 AH24 AD29 1uF 100nF
T67 PAD GENERICG H2SYNC
+1.8V_RUN AC29 VGAVSYNC2
BLM15BD121SN1D +DPLL_PVDD V2SYNC
120ohm, 300mA C46 C47 C48 (1.8V @ 120mA DPLL_PVDD) +1.8V_RUN PLACE HPD1 AK24
HPD1
VREFG VDD2DI AG31 +VDD1DI
10uF 1uF 100nF AG32
DIVIDER VSS2DI C89 *100nF_NC
R419 AND CAP
CLOSE TO A2VDD AG33 +3.3V_DELAY
L10 499/F
ASIC
+1.1V_GFX_PCIE +DPLL_VDDC A2VDDQ AD33 +A2VDDQ
BLM15BD121SN1D AH13
C51 C53 C54 VREFG
120ohm, 300mA !!! A2VSSQ AF33
R417 C530
10uF 1uF 100nF
(1.1V @ 150mA DPLL_VDDC)
(1.0V @ 150mA DPLL_VDDC for M97) 249/F 100nF AA29 R2SET R94 2 1 715/F
R2SET

R431 *0_NC
1 2 CLK_VGA_27M_SS_R DDC/AUX AM26 ATI_HDMI_SCL 23
15 CLK_VGA_27M_SS PLL/CLOCK DDC1CLK
DDC1DATA AN26 ATI_HDMI_SDA 23 HDMI
1

+DPLL_PVDD AM32 DPLL_PVDD


R432 AN32 AM27
DPLL_PVSS AUX1P
*10K_NC AUX1N AL27
R67 0 Reserve 0 ohm for
AN31 AM19 DDC2CLK 1 2 Dual mode DDC/AUX
2

+DPLL_VDDC DPLL_VDDC DDC2CLK DDC2DATA


DDC2DATA AL19 1 2
R74 0
R412 100/F AV33 AN20 AUX_SINK_P 23
15 CLK_VGA_27M XTALIN AUX2P
XTAOUT AU34 AM20 AUX_SINK_N 23 DP
T110 PAD XTALOUT AUX2N
2 1
R413 120/F AL30
DDCCLK_AUX3P
DDCDATA_AUX3N AM30
!!! NC when M92-M2
DDCCLK_AUX4P AL29
20 VGA_THERMDP AF29 DPLUS DDCDATA_AUX4N AM29
A AG29 THERMAL A
20 VGA_THERMDN DMINUS
AN21 ATI_LCD_DDCCLK ATI_LCD_DDCDAT R78 2 1 2.2K +3.3V_DELAY
+TSVDD DDCCLK_AUX5P ATI_LCD_DDCCLK 24
AM21 ATI_LCD_DDCDAT LVDS ATI_LCD_DDCCLK R70 2 1 2.2K
DDCDATA_AUX5N ATI_LCD_DDCDAT 24
L20 (1.8V @ 20mA TSVDD) AK32 TS_FDO
+1.8V_RUN AJ32 TSVDD DDC6CLK AJ30 G_CLK_DDC 25
BLM15BD121SN1D AJ33 AJ31 G_DAT_DDC 25 CRT
C115 C114 C90 TSVSS DDC6DATA
120ohm, 300mA
AK30
10uF 1uF 100nF NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N AK29 DDC6CLK/DDC6DATA support
internal HDCP(High-bandwidth
QUANTA
Digital Content Protection) function.
Title
COMPUTER
Scott_0703:Delete Spread Spectrum XTAL circuit as placement required of thermal issue. 216-0729051(M96-M2 XT) M96XT_IO & STRAP

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 17 of 61


5 4 3 2 1
5 4 3 2 1

U29E U29F

+1.5V_GDDR For DDR3, VDDR1 = 1.5V MEM I/O +PCIE_VDDR


(1.5V @ 2.9A VDDR1+VDDRHA+VDDRHB) PCIE (1.8V @ 210mA PCIE_VDDR) L54
AC7 VDDR1#1 PCIE_VDDR#1 AA31 +1.8V_RUN AB39 PCIE_VSS#1 GND#1 A3
AD11 AA32 BLM18PG471SN1D E39 A37
C580 C576 C238 C578 C566 VDDR1#2 PCIE_VDDR#2 C119 C118 C138 C144 C545 PCIE_VSS#2 GND#2
AF7 VDDR1#3 PCIE_VDDR#3 AA33 470ohm, 1A F34 PCIE_VSS#3 GND#3 AA16
AG10 VDDR1#4 PCIE_VDDR#4 AA34 F39 PCIE_VSS#4 GND#4 AA18
1uF 1uF 1uF 1uF 1uF AJ7 V28 100nF 1uF 1uF 1uF 10uF G33 AA2
VDDR1#5 PCIE_VDDR#5 PCIE_VSS#5 GND#5
AK8 VDDR1#6 PCIE_VDDR#6 W29 G34 PCIE_VSS#6 GND#6 AA21
AL9 VDDR1#7 PCIE_VDDR#7 W30 H31 PCIE_VSS#7 GND#7 AA23
G11 VDDR1#8 PCIE_VDDR#8 Y31 !!! H34 PCIE_VSS#8 GND#8 AA26
C575 C567 C587 C581 C569 G14 H39 AA28
VDDR1#9 For M96/M92 PCIE_VDDC = 1.1V PCIE_VSS#9 GND#9
D
G17 VDDR1#10 J31 PCIE_VSS#10 GND#10 AA6 D
1uF 1uF 1uF 1uF 1uF G20 G30 (1.1V @ 1.4A PCIE_VDDC) +PCIE_VDDC For M97 PCIE_VDDC = 1.0V J34 AB12
VDDR1#11 PCIE_VDDC#1 L24 PCIE_VSS#11 GND#11
G23 VDDR1#12 PCIE_VDDC#2 G31 K31 PCIE_VSS#12 GND#12 AB15
G26 VDDR1#13 PCIE_VDDC#3 H29 +1.1V_GFX_PCIE K34 PCIE_VSS#13 GND#13 AB17
G29 H30 BLM18PG121SN1D K39 AB20
C93 C200 C104 C186 C173 VDDR1#14 PCIE_VDDC#4 C175 C191 C182 C167 C198 C187 C197 C209 PCIE_VSS#14 GND#14
H10 VDDR1#15 PCIE_VDDC#5 J29 120ohm, 2A L31 PCIE_VSS#15 GND#15 AB22
J7 VDDR1#16 PCIE_VDDC#6 J30 L34 PCIE_VSS#16 GND#16 AB24
1uF 1uF 1uF 1uF 1uF J9 L28 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF M34 AB27
VDDR1#17 PCIE_VDDC#7 PCIE_VSS#17 GND#17
K11 VDDR1#18 PCIE_VDDC#8 M28 M39 PCIE_VSS#18 GND#18 AC11
K13 VDDR1#19 PCIE_VDDC#9 N28 N31 PCIE_VSS#19 GND#19 AC13
K8 VDDR1#20 PCIE_VDDC#10 R28 N34 PCIE_VSS#20 GND#20 AC16
C150 C111 C210 C568 C88 L12 T28 P31 AC18
VDDR1#21 PCIE_VDDC#11 PCIE_VSS#21 GND#21
L16 VDDR1#22 PCIE_VDDC#12 U28 P34 PCIE_VSS#22 GND#22 AC2
1uF 1uF 1uF 1uF 1uF L21 VDDR1#23 (1.2V @ 29.5A VCC_GFX_CORE) +VCC_GFX_CORE P39 PCIE_VSS#23 GND#23 AC21
L23 VDDR1#24 R34 PCIE_VSS#24 GND#24 AC23
L26 VDDR1#25 VDDC#1 AA15 T31 PCIE_VSS#25 GND#25 AC26
L7 CORE AA17 T34 AC28
C234 C232 C577 C583 C555 VDDR1#26 VDDC#2 C92 C103 C120 C121 C124 C125 C126 PCIE_VSS#26 GND#26
M11 VDDR1#27 VDDC#3 AA20 T39 PCIE_VSS#27 GND#27 AC6
N11 VDDR1#28 VDDC#4 AA22 U31 PCIE_VSS#28 GND#28 AD15
10uF 10uF 10uF 10uF 10uF P7 AA24 1uF 1uF 1uF 1uF 1uF 1uF 1uF U34 AD17
VDDR1#29 VDDC#5 PCIE_VSS#29 GND#29
R11 VDDR1#30 VDDC#6 AA27 V34 PCIE_VSS#30 GND#30 AD20
U11 VDDR1#31 VDDC#7 AB16 V39 PCIE_VSS#31 GND#31 AD22
1U = 20 pcs U7 VDDR1#32 VDDC#8 AB18 W31 PCIE_VSS#32 GND#32 AD24
Y11 AB21 C128 C132 C136 C137 C151 C152 C153 W34 AD27
10U = 5pcs VDDR1#33 VDDC#9 PCIE_VSS#33 GND#33
Y7 VDDR1#34 VDDC#10 AB23 Y34 PCIE_VSS#34 GND#34 AD9
AB26 1uF 1uF 1uF 1uF 1uF 1uF 1uF Y39 AE2
VDDC#11 PCIE_VSS#35 GND#35
VDDC#12 AB28 GND#36 AE6
VDDC#13 AC17 GND#37 AF10
VDDC#14 AC20 GND#38 AF16
+1.8V_RUN +VDD_CT LEVEL AC22 C154 C155 C156 C158 C159 C164 C165 AF18
L53 TRANSLATION VDDC#15 GND#39
(1.8V @ 136mA VDD_CT) AC24 AF21
VDDC#16
GND GND#40

POWER
AF26 AC27 1uF 1uF 1uF 1uF 1uF 1uF 1uF AG17
BLM15BD121SN1D VDD_CT#1 VDDC#17 GND#41
AF27 VDD_CT#2 VDDC#18 AD18 F15 GND#100 GND#42 AG2
120ohm, 300mA C544 C543 C109 C108 C94 AG26 AD21 F17 AG20
VDD_CT#3 VDDC#19 GND#101 GND#43
AG27 VDD_CT#4 VDDC#20 AD23 F19 GND#102 GND#44 AG22
10uF 1uF 1uF 100nF 1uF AD26 C172 C174 C177 C178 C181 C183 C190 F21 AG6
VDDC#21 GND#103 GND#45
VDDC#22 AF17 F23 GND#104 GND#46 AG9
I/O AF20 1uF 1uF 1uF 1uF 1uF 1uF 1uF F25 AH21
VDDC#23 GND#105 GND#47
C AF23 VDDR3#1 VDDC#24 AF22 F27 GND#106 GND#48 AJ10 C
+3.3V_DELAY AF24 AG16 F29 AJ11
VDDR3#2 VDDC#25 GND#107 GND#49
(3.3V @ 60mA VDDR3) AG23 VDDR3#3 VDDC#26 AG18 F31 GND#108 GND#50 AJ2
AG24 AG21 C192 C199 F33 AJ28
VDDR3#4 VDDC#27 GND#109 GND#51
VDDC#28 AH22 F7 GND#110 GND#52 AJ6
C91 C98 C110 C99 +VDDR4 AH27 1uF 1uF F9 AK11
VDDC#29 GND#111 GND#53
AF13 VDDR4#4 VDDC#30 AH28 G2 GND#112 GND#54 AK31
10uF 1uF 1uF 1uF AF15 M26 G6 AK7
VDDR4#5 VDDC#31 GND#113 GND#55
AG13 VDDR4#7 VDDC#32 N24 H9 GND#114 GND#56 AL11
AG15 VDDR4#8 VDDC#33 N27 J2 GND#115 GND#57 AL14
DVP isn't used. R18 C105 C123 C140 C141 C142 C149 C166 J27 AL17
VDDC#34 GND#116 GND#58
VDDC#35 R21 J6 GND#117 GND#59 AL2
+1.5V_GDDR +VDDRHA AD12 R23 10uF 10uF 10uF 10uF 10uF 10uF 10uF J8 AL20
+1.8V_RUN +VDDR4 L57 VDDR4#1 VDDC#36 GND#118 GND#60
AF11 VDDR4#2 VDDC#37 R26 K14 GND#119 GND#61 AL21
L18 AF12 T17 K7 AL23
BLM15BD121SN1D VDDR4#3 VDDC#38 GND#120 GND#62 R422
AG11 VDDR4#6 VDDC#39 T20 1U = 30 pcs VDDC/VDDCI decoupling Cap follow AMD "ref137-03" L11 GND#121 GND#63 AL26
BLM15BD121SN1D 120ohm, 300mA C224 T22 L17 AL32 0
C107 C113 VDDC#40 10U = 7 pcs GND#122 GND#64
120ohm, 300mA VDDC#41 T24 L2 GND#123 GND#65 AL6
1uF T27 22U = 5pcs L22 AL8
1uF 100nF VDDC#42 GND#124 GND#66
!!! M96 Only VDDC#43 U16 L24 GND#125 GND#67 AM11
M20 NC_VDDRHA VDDC#44 U18 5/18: Adjusted cap values and quantities! L6 GND#126 GND#68 AM31
M21 NC_VSSRHA VDDC#45 U21 M17 GND#127 GND#69 AM9 !!!
+VDDRHB U23 M22 AN11
L23 VDDC#46 GND#128 GND#70 Reserve for PX_EN
VDDC#47 U26 M24 GND#129 GND#71 AN2
V12 V17 N16 AN30 for Park and Madison
BLM15BD121SN1D NC_VDDRHB VDDC#48 GND#130 GND#72
U12 NC_VSSRHB VDDC#49 V20 N18 GND#131 GND#73 AN6
C163 V22 N2 AN8
VDDC#50 GND#132 GND#74
VDDC#51 V24 N21 GND#133 GND#75 AP11
!!! M96 Only 1uF V27 N23 AP7
+1.8V_RUN +PCIE_PVDD VDDC#52 GND#134 GND#76
VDDC#53 Y16 N26 GND#135 GND#77 AP9
L56 (1.8V @ 68mA PCIE_PVDD) PLL Y18 N6 AR5
VDDC#54 GND#136 GND#78
AB37 PCIE_PVDD VDDC#55 Y21 R15 GND#137 GND#79 AW34
BLM15BD121SN1D Y23 R17 B11
C556 C552 C553 +MPV18 VDDC#56 GND#138 GND#80
120ohm, 300mA H7 MPV18#1 VDDC#57 Y26 R2 GND#139 GND#81 B13
H8 MPV18#2 VDDC#58 Y28 R20 GND#140 GND#82 B15
10uF 1uF 100nF Scott_0701: Change 5pcs*22U to 5pcs*47U as Loki's suggestion R22 B17
+SPV18 GND#141 GND#83
R24 GND#142 GND#84 B19
B
AM10 SPV18 R27 GND#143 GND#85 B21 B
AA13 +VCC_GFX_CORE R6 B23
VDDCI#1 +BBP GND#144 GND#86
(0.95-1.2V @ 136mA SPV10) AN9 SPV10 VDDCI#2 AB13 T11 GND#145 GND#87 B25
+SPV10 AC12 T13 B27
L12 VDDCI#3 C112 C160 C161 C162 C201 GND#146 GND#88
AN10 SPVSS VDDCI#4 AC15 5/13: Added 5 0805 caps! T16 GND#147 GND#89 B29
+1.1V_GFX_PCIE VDDCI#5 AD13 T18 GND#148 GND#90 B31
*BLM15BD121SN1D_NC AD16 47U 47U 47U 47U 47U T21 B33
C60 C67 C70 VDDCI#6 GND#149 GND#91
120ohm, 300mA VDDCI#7 M15 T23 GND#150 GND#92 B7
L11 M16 T26 B9
10uF 1uF 100nF VOLTAGE VDDCI#8 GND#151 GND#93
+VCC_GFX_CORE VDDCI#9 M18 U15 GND#153 GND#94 C1
BLM15BD121SN1D_ SENESE M23 U17 C39
VDDCI#10 GND#154 GND#95
120ohm, 300mA VDDCI#11 N13 U2 GND#155 GND#96 E35
!!! AF28 FB_VDDC VDDCI#12 N15 U20 GND#156 GND#97 E5
For M96 SPV10 = +VCC_GFX_CORE VDDCI#13 N17 U22 GND#157 GND#98 F11
N20 +VDDCI +VCC_GFX_CORE U24 F13
For Park, Madison SPV10 = +1.1V_GFX_PCIE = 1.0V VDDCI#14 L25 GND#158 GND#99
AG28 FB_VDDCI N22 U27
ISOLATED VDDCI#15 R12 U6
GND#159
CORE I/O VDDCI#16 R13 BLM18PG121SN1D Scott_0821:Change R704 F/P to 0603 type. V11
GND#160
VDDCI#17 C193 C184 C185 C180 GND#161
AH29 FB_GND VDDCI#18 R16 V16 GND#163
+1.8V_RUN +MPV18 T12 V18
L26 VDDCI#19 1uF 1uF 1uF 10uF GND#164
(1.8V @ 40mA MPV18) VDDCI#20 T15 V21 GND#165
V15 R704 0_0603 V23
*BLM15BD121SN1D_NC VDDCI#21 GND#166
VDDCI#22 Y13 +BBP Q82 V26 GND#167
120ohm, 300mA C233 C228 C229 C213 C203 (For M96, 1.2V @ 375mA VDDCI) W2
*SI2303BDS-T1-E3_NC GND#168
VDDCI UNDER REVIEW FOR M97 W6 GND#169
*10uF_NC *1uF_NC *1uF_NC *100nF_NC *100nF_NC Y15
216-0729051(M96-M2 XT) GND#170
1U = 3 pcs +3.3V_DELAY 3 1 +3.3V_RUN Y17 GND#171
10U = 1 pcs Y20 GND#172

1
+BBP Y22 A39
R37 *0_0603_NC GND#173 VSS_MECH#1
Y24 AW1

2
+SPV18 R705 GND#174 VSS_MECH#2
1 2 +VDDCI Y27 GND#175 VSS_MECH#3 AW39
L13 (1.8V @ 75mA SPV18) *100K_NC U13 GND#152
V13

2
*BLM15BD121SN1D_NC GND#162
120ohm, 300mA C68 C69 C71
3 1 +1.8V_RUN 3 1 +VCC_GFX_CORE 216-0729051(M96-M2 XT)

3
*10uF_NC *1uF_NC *100nF_NC R706 *75K/F_NC Q83 C862
1

C10 Q15 2 *4700P_NC


24,43,46,47,48,49,54 RUN_ON
A 1U Q11 2N7002W-7-F 25 A
2

!!! For Park, Madison 603 SI2301BDS-T1-E3 OPTIONAL RC


2

1
10 R36 2 1 100K +5V_RUN NETWORK C863 *2N7002W-7-F_NC
TO FINE TUNE *0.1U_NC
C856 +BBP POWER SEQUENCING 10 5/03: Added 4700pF for time tuning purpose
3

*4700P_NC
2 Q14 25
17 BB_ENA
2N7002W-7-F
QUANTA
1

R35 C148 C139

10K
!!!
5/03: Added 4700pF for time tuning purpose
1uF 1uF
Scott_0819:Reserve +3.3V_delay circuit and add 0ohm resistor from +3.3V_Run to +3.3V_Delay Title
COMPUTER
M96XT_POWER
M96 support Back Bias
Park, Madison : pop 0 ohm, depop other parts Size Document Number Rev
M96 : pop other parts, depop 0 ohm RM5 3A

Date: Thursday, August 20, 2009 Sheet 18 of 61


5 4 3 2 1
5 4 3 2 1

!!!
!!! For M97 Only
For M96/92, DPx_VDD10 = 1.1V
For M97 DPx_VDD10 = 1.0V (1.8V @ 110mA DPA_VDD18)
+DPA_VDD18
L15
DPC & DPD U29H +1.8V_RUN
*BLM15BD121SN1D_NC
+DPC_VDD18 aren't used. DP C/D POWER DP A/B POWER +DPA_VDD18 C80 C74 C73 120ohm, 300mA
AP20 AN24 *100nF_NC *1uF_NC *10uF_NC
DPC_VDD18#1 DPA_VDD18#1
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
D
(1.1V @ 200mA DPA_VDD10) D
+DPA_VDD10
+1.1V_GFX_PCIE L48
AP13 DPC_VDD10#1 DPA_VDD10#1 AP31 +1.1V_GFX_PCIE (1.8V @ 110mA DPB_VDD18)
AT13 AP32 BLM15BD121SN1D +DPB_VDD18
DPC_VDD10#2 DPA_VDD10#2 C519 C520 C521 L14
120ohm, 300mA DPA for HDMI
C55 +1.8V_RUN
AN17 AN27 100nF 1uF 10uF *BLM15BD121SN1D_NC
*100nF_NC DPC_VSSR#1 DPA_VSSR#1 C79 C75 C72
AP16 DPC_VSSR#2 DPA_VSSR#2 AP27 120ohm, 300mA
AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
AW14 AW24 *100nF_NC *1uF_NC *10uF_NC
DPC_VSSR#4 DPA_VSSR#4
AW16 DPC_VSSR#5 DPA_VSSR#5 AW26
+DPD_VDD18 +DPB_VDD18

AP22 DPD_VDD18#1 DPB_VDD18#1 AP25


AP23 AP26 +DPC_VDD18
DPD_VDD18#2 DPB_VDD18#2 R59 *0_NC
(1.1V @ 200mA DPB_VDD10)
+DPB_VDD10 1 2
+1.1V_GFX_PCIE +1.8V_RUN
L16
AP14 AN33 +1.1V_GFX_PCIE C82
DPD_VDD10#1 DPB_VDD10#1 BLM15BD121SN1D
AP15 DPD_VDD10#2 DPB_VDD10#2 AP33
C78 C77 C83 120ohm, 300mA DPB for DP *100nF_NC
C57
100nF 1uF 10uF
*100nF_NC AN19 AN29
DPD_VSSR#1 DPB_VSSR#1
AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 AP30 +DPD_VDD18
DPD_VSSR#3 DPB_VSSR#3 R58 *0_NC
AW20 DPD_VSSR#4 DPB_VSSR#4 AW30
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32 1 2 +1.8V_RUN
C (1.8V @ 20 mA DPA_PVDD) C
+DPA_PVDD C81
L49
(1.8V @ 400mA DPE_VDD18; 150/F R425 AW18 AW28 R424 150/F +1.8V_RUN *100nF_NC
DPCD_CALR DPAB_CALR BLM15BD121SN1D
200mA for DPE/DPF respectively) +DPE_VDD18 C534 C532 C529 120ohm, 300mA
L19 DP E/F POWER DP PLL POWER
+1.8V_RUN AH34 AU28 100nF 1uF 10uF
BLM18PG600SN1D DPE_VDD18#1 DPA_PVDD
AJ34 DPE_VDD18#2 DPA_PVSS AV27
60ohm, 500mA C97 C95 C96
+DPE_VDD10 (1.8V @ 20 mA DPB_PVDD) +DPB_PVDD
0504: Change L19 for low DCR 10uF 1uF 100nF L50
AL33 AV29 +1.8V_RUN
0.1ohm as AMD suggest. AM33
DPE_VDD10#1 DPB_PVDD
AR28 BLM15BD121SN1D
DPE_VDD10#2 DPB_PVSS C537 C533 C531 120ohm, 300mA
DPC & DPD +1.8V_RUN
100nF 1uF 10uF
aren't used.
AN34 DPE_VSSR#1 DPC_PVDD AU18
DPE & DPF for LVDS AP39 DPE_VSSR#2 DPC_PVSS AV17
AR39 C535
DPE_VSSR#3
AU37 DPE_VSSR#4
AW35 *100nF_NC
DPE_VSSR#5
DPD_PVDD AV19
+DPE_VDD18 AR18 C536 (1.8V @ 40mA DPE_PVDD; 20mA
DPD_PVSS
*100nF_NC +DPE_PVDD for DPE/DPF respectively)
AF34 DPF_VDD18#1
(1.1V @ 200mA DPE_VDD10; AG34 L55
DPF_VDD18#2
100mA for DPE/DPF respectively) +DPE_VDD10 DPE_PVDD AM37 +1.8V_RUN
AN38 BLM15BD121SN1D
L17 DPE_PVSS C549 C548 C547
B 120ohm, 300mA B
+1.1V_GFX_PCIE AK33 DPF_VDD10#1
BLM15BD121SN1D AK34 100nF 1uF 10uF
C86 C84 C85 DPF_VDD10#2
120ohm, 300mA NC_DPF_PVDD AL38
NC_DPF_PVSS AM35
10uF 1uF 100nF
AF39 DPF_VSSR#1
AH39 DPF_VSSR#2
AK39 DPF_VSSR#3
AL34 DPF_VSSR#4
AM34 DPF_VSSR#5

150/F R438 AM39 DPEF_CALR

216-0729051(M96-M2 XT)

A A

QUANTA
Title
COMPUTER
M96XT_DP POWER

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 19 of 61


5 4 3 2 1
5 4 3 2 1

U29C U29D
RASA0# DDR2 DDR2 RASB0# DDR2 DDR2
21 RASA0# 22 RASB0#
RASA1# GDDR3/GDDR5 GDDR5/GDDR3 RASB1# GDDR3/GDDR5 GDDR5/GDDR3
21 RASA1# DDR3 DDR3 22 RASB1# DDR3 DDR3
21 CASA0# CASA0# MDA0 C37 G24 MAA0 22 CASB0# CASB0# MDB0 C5 P8 MAB0
CASA1# MDA1 DQA0_0/DQA_0 MAA0_0/MAA_0 MAA1 CASB1# MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1
21 CASA1# C35 J23 22 CASB1# C3 T9

MEMORY INTERFACE A
MDA2 DQA0_1/DQA_1 MAA0_1/MAA_1 MAA2 MDB2 DQB0_1/DQB_1 MAB0_1/MAB_1 MAB2
A35 H24 E3 P9

MEMORY INTERFACE B
WEA0# MDA3 DQA0_2/DQA_2 MAA0_2/MAA_2 MAA3 WEB0# MDB3 DQB0_2/DQB_2 MAB0_2/MAB_2 MAB3
21 WEA0# E34 DQA0_3/DQA_3 MAA0_3/MAA_3 J24 22 WEB0# E1 DQB0_3/DQB_3 MAB0_3/MAB_3 N7
21 WEA1# WEA1# MDA4 G32 H26 MAA4 22 WEB1# WEB1# MDB4 F1 N8 MAB4
MDA5 DQA0_4/DQA_4 MAA0_4/MAA_4 MAA5 MDB5 DQB0_4/DQB_4 MAB0_4/MAB_4 MAB5
D33 DQA0_5/DQA_5 MAA0_5/MAA_5 J26 F3 DQB0_5/DQB_5 MAB0_5/MAB_5 N9
21 CKEA0 CKEA0 MDA6 F32 H21 MAA6 22 CKEB0 CKEB0 MDB6 F5 U9 MAB6
CKEA1 MDA7 DQA0_6/DQA_6 MAA0_6/MAA_6 MAA7 CKEB1 MDB7 DQB0_6/DQB_6 MAB0_6/MAB_6 MAB7
21 CKEA1 E32 DQA0_7/DQA_7 MAA0_7/MAA_7 G21 22 CKEB1 G4 DQB0_7/DQB_7 MAB0_7/MAB_7 U8
MDA8 D31 H19 MAA8 MDB8 H5 Y9 MAB8
D CSA0_0# MDA9 DQA0_8/DQA_8 MAA1_0/MAA_8 MAA9 CSB0_0# MDB9 DQB0_8/DQB_8 MAB1_0/MAB_8 MAB9 D
21 CSA0_0# F30 DQA0_9/DQA_9 MAA1_1/MAA_9 H20 22 CSB0_0# H6 DQB0_9/DQB_9 MAB1_1/MAB_9 W9
21 CSA1_0# CSA1_0# MDA10 C30 L13 MAA10 22 CSB1_0# CSB1_0# MDB10 J4 AC8 MAB10
MDA11 DQA0_10/DQA_10 MAA1_2/MAA_10 MAA11 MDB11 DQB0_10/DQB_10 MAB1_2/MAB_10 MAB11
A30 DQA0_11/DQA_11 MAA1_3/MAA_11 G16 K6 DQB0_11/DQB_11 MAB1_3/MAB_11 AC9
21 ODTA0 ODTA0 MDA12 F28 J16 MAA12 22 ODTB0 ODTB0 MDB12 K5 AA7 MAB12
ODTA1 MDA13 DQA0_12/DQA_12 MAA1_4/MAA_12 A_BA2 ODTB1 MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12 B_BA2
21 ODTA1 C28 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 H16 22 ODTB1 L4 DQB0_13/DQB_13 MAB1_5/BA2 AA8
MDA14 A28 J17 A_BA0 MDB14 M6 Y8 B_BA0
CLKA0 MDA15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 A_BA1 CLKB0 MDB15 DQB0_14/DQB_14 MAB1_6/BA0 B_BA1
21 CLKA0 E28 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 H17 22 CLKB0 M1 DQB0_15/DQB_15 MAB1_7/BA1 AA9
21 CLKA0# CLKA0# MDA16 D27 22 CLKB0# CLKB0# MDB16 M3
MDA17 DQA0_16/DQA_16 DQMA#0 MDB17 DQB0_16/DQB_16 DQMB#0
F26 DQA0_17/DQA_17 WCKA0_0/DQMA_0 A32 M5 DQB0_17/DQB_17 WCKB0_0/DQMB_0 H3
21 CLKA1 CLKA1 MDA18 C26 C32 DQMA#1 22 CLKB1 CLKB1 MDB18 N4 H1 DQMB#1
CLKA1# MDA19 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 DQMA#2 CLKB1# MDB19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 DQMB#2
21 CLKA1# A26 DQA0_19/DQA_19 WCKA0_1/DQMA_2 D23 22 CLKB1# P6 DQB0_19/DQB_19 WCKB0_1/DQMB_2 T3
MDA20 F24 E22 DQMA#3 MDB20 P5 T5 DQMB#3
QSA#[7..0] MDA21 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 DQMA#4 QSB#[7..0] MDB21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 DQMB#4
21 QSA#[7..0] C24 DQA0_21/DQA_21 WCKA1_0/DQMA_4 C14 22 QSB#[7..0] R4 DQB0_21/DQB_21 WCKB1_0/DQMB_4 AE4
MDA22 A24 A14 DQMA#5 MDB22 T6 AF5 DQMB#5
QSA[7..0] MDA23 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 DQMA#6 QSB[7..0] MDB23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 DQMB#6
21 QSA[7..0] E24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 E10 22 QSB[7..0] T1 DQB0_23/DQB_23 WCKB1_1/DQMB_6 AK6
MDA24 C22 D9 DQMA#7 MDB24 U4 AK5 DQMB#7
DQMA#[7..0] MDA25 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 DQMB#[7..0] MDB25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
21 DQMA#[7..0] A22 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 22 DQMB#[7..0] V6 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3
MDA26 F22 C34 QSA0 MDB26 V1 F6 QSB0
MDA[63..0] MDA27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 QSA1 MDB[63..0] MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 QSB1
D21 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 D29 V3 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 K3
21 MDA[63..0] MDA28 A20 D25 QSA2 22 MDB[63..0] MDB28 Y6 P3 QSB2
MAA[13..0] MDA29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 QSA3 MAB[13..0] MDB29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 QSB3
21 MAA[13..0] F20 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 E20 22 MAB[13..0] Y1 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 V5
MDA30 D19 E16 QSA4 MDB30 Y3 AB5 QSB4
MDA31 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 QSA5 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 QSB5
E18 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 E12 Y5 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 AH1
21 A_BA0 A_BA0 MDA32 C18 J10 QSA6 22 B_BA0 B_BA0 MDB32 AA4 AJ9 QSB6
A_BA1 MDA33 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 QSA7 B_BA1 MDB33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 QSB7
21 A_BA1 A18 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 D7 22 B_BA1 AB6 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 AM5
21 A_BA2 A_BA2 MDA34 F18 22 B_BA2 B_BA2 MDB34 AB1
MDA35 DQA1_2/DQA_34 QSA#0 MDB35 DQB1_2/DQB_34 QSB#0
D17 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 A34 AB3 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 G7
MDA36 A16 E30 QSA#1 MDB36 AD6 K1 QSB#1
MDA37 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 QSA#2 MDB37 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 QSB#2
F16 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 E26 AD1 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 P1
MDA38 D15 C20 QSA#3 MDB38 AD3 W4 QSB#3
MDA39 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 QSA#4 MDB39 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 QSB#4
E14 DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 C16 AD5 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 AC4
MDA40 F14 C12 QSA#5 MDB40 AF1 AH3 QSB#5
C MDA41 DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 QSA#6 MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 QSB#6 C
D13 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 J11 AF3 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 AJ8
MDA42 F12 F8 QSA#7 MDB42 AF6 AM3 QSB#7
MDA43 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 DQA1_11/DQA_43 AG4 DQB1_11/DQB_43
MDA44 D11 J21 ODTA0 MDB44 AH5 T7 ODTB0
MDA45 DQA1_12/DQA_44 ADBIA0/ODTA0 ODTA1 MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB1
F10 DQA1_13/DQA_45 ADBIA1/ODTA1 G19 AH6 DQB1_13/DQB_45 ADBIB1/ODTB1 W7
MDA46 A10 MDB46 AJ4
MDA47 DQA1_14/DQA_46 CLKA0 MDB47 DQB1_14/DQB_46 CLKB0
C10 DQA1_15/DQA_47 CLKA0 H27 AK3 DQB1_15/DQB_47 CLKB0 L9
MDA48 G13 G27 CLKA0# MDB48 AF8 L8 CLKB0#
MDA49 DQA1_16/DQA_48 CLKA0B MDB49 DQB1_16/DQB_48 CLKB0B
H13 DQA1_17/DQA_49 AF9 DQB1_17/DQB_49
+1.5V_GDDR MDA50 J13 J14 CLKA1 MDB50 AG8 AD8 CLKB1
MDA51 DQA1_18/DQA_50 CLKA1 CLKA1# +1.5V_GDDR MDB51 DQB1_18/DQB_50 CLKB1 CLKB1#
H11 DQA1_19/DQA_51 CLKA1B H14 AG7 DQB1_19/DQB_51 CLKB1B AD7
PLACE MVREF MDA52 G10 MDB52 AK9
R110 MDA53 DQA1_20/DQA_52 RASA0# MDB53 DQB1_20/DQB_52 RASB0#
DIVIDERS G8 DQA1_21/DQA_53 RASA0B K23 PLACE MVREF AL7 DQB1_21/DQB_53 RASB0B T10
Ra MDA54 K9 K19 RASA1# R98 MDB54 AM8 Y10 RASB1#
AND CAPS 100/F MDA55 DQA1_22/DQA_54 RASA1B DIVIDERS MDB55 DQB1_22/DQB_54 RASB1B
K10 DQA1_23/DQA_55 Ra AM7 DQB1_23/DQB_55
CLOSE TO ASIC MDA56 G9 K20 CASA0# AND CAPS 100/F MDB56 AK1 W10 CASB0#
MDA57 DQA1_24/DQA_56 CASA0B CASA1# MDB57 DQB1_24/DQB_56 CASB0B CASB1#
A8 DQA1_25/DQA_57 CASA1B K17 CLOSE TO ASIC AL4 DQB1_25/DQB_57 CASB1B AA10
MDA58 C8 MDB58 AM6
+1.5V_GDDR R111 C196 MDA59 DQA1_26/DQA_58 CSA0_0# MDB59 DQB1_26/DQB_58 CSB0_0#
E8 DQA1_27/DQA_59 CSA0B_0 K24 AM1 DQB1_27/DQB_59 CSB0B_0 P10
Rb MDA60 A6 K27 +1.5V_GDDR R96 C143 MDB60 AN4 L10
100/F 100nF MDA61 DQA1_28/DQA_60 CSA0B_1 MDB61 DQB1_28/DQB_60 CSB0B_1
C6 DQA1_29/DQA_61 Rb AP3 DQB1_29/DQB_61
R113 MDA62 E6 M13 CSA1_0# 100/F 100nF MDB62 AP1 AD10 CSB1_0#
MDA63 DQA1_30/DQA_62 CSA1B_0 R92 MDB63 DQB1_30/DQB_62 CSB1B_0
Ra A5 DQA1_31/DQA_63 CSA1B_1 K16 AP5 DQB1_31/DQB_63 CSB1B_1 AC10
100/F Ra
MVREFDA L18 K21 CKEA0 100/F U10 CKEB0
MVREFSA MVREFDA CKEA0 CKEA1 MVREFDB Y12 CKEB0 CKEB1
L20 MVREFSA CKEA1 J20 MVREFDB CKEB1 AA11
MVREFSB AA12
R109 C206 R107 1 MVREFSB
+1.5V_GDDR 2 *240/F_NC L27 MEM_CALRN0 WEA0B K26 WEA0#
WEB0B N10 WEB0#
Rb !!! R104 1 2 *240/F_NC N12 L15 WEA1# R93 C134 AB11 WEB1#
100/F 100nF R88 1 MEM_CALRN1 WEA1B WEB1B
For PM 2 *240/F_NC AG12 MEM_CALRN2 Rb
100/F 100nF
R105 1 2 240/F MAA13 R91 1K MAB13
GDDR5

M12 H23 AD28 T8

GDDR5
B MEM_CALRP1 MAA0_8 TESTEN MAB0_8 B
M27 MEM_CALRP0 MAA1_8 J19 MAB1_8 W8
R106 1 2 *240/F_NC AH12 AK10
R84 1 MEM_CALRP2 CLKTESTA
2 *240/F_NC AL10 CLKTESTB DRAM_RST AH11 DDR3_RST 21,22

1
!!! For PM R75 R690 R691 R68 R440 4.7K +1.5V_GDDR
AL31 C100 R439
RSVD 4.7K
!!! For PM: Park and Madison DDR3/GDDR3 Memory Stuff Option
4.7K 1nF *4.7K_NC
GDDR3 DDR3 *0_NC *0_NC

2
216-0729051(M96-M2 XT)
216-0729051(M96-M2 XT) MVDDQ 1.8V 1.5V
0504:Change C100 from 1uF to 1nF
Ra 40.2R 100R
according to AMD's suggestion Q22
Rb 100R 100R !!! For M96 : Pop 4.7K SI2303BDS-T1-E3
For Madison : Pop 0 ohm
+3.3V_ADM1032A 3 1 +3.3V_SUS

1
2
R114
100K

2
+3.3V_ADM1032A +3.3V_ADM1032A

3
THERMAL MONITOR 29,52,53 GFX_ON 2 Q21 C858
2N7002W-7-F *4700P_NC
2

Q52 25

1
2N7002W-7-F R455 R454
9,24,29 SMBCLK1 3 1
4.7K 4.7K +3.3V_ADM1032A
A U31 A
VGA_THERMDP 17 5/03: Added 4700pF for time tuning purpose
2

2
2

Q51 8 1
SCLK VDD

1
2N7002W-7-F C563
9,24,29 SMBDAT1 3 1 7 SDATA D+ 2
2200P
QUANTA

2
THERMAL_INT# 6 3 50
17 THERMAL_INT# ALERT# D- VGA_THERMDN 17
MB_THERM#
5 GND THERM#
ADM1032ARMZ-1RL
4 1

C562
MB_THERM# 51
Title
COMPUTER
MB_THERM# R450 2 1 10K +3.3V_ADM1032A M96XT_MEMORY/THERM
Scott_0703:Delete Spread Spectrum IC as placement require of thermal issue. 0.1U
2

THERMAL_INT# R451 2 1 10K 10 Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 20 of 61


5 4 3 2 1
1 2 3 4 5 6 7 8

DDR3 64MX16, CH A : 512MB


U4 U32 U5 U33

VREF_A0 M8 E3 MDA29 VREF_A2 M8 E3 MDA19 VREF_A4 M8 E3 MDA38 VREF_A6 M8 E3 MDA57


VREF_A1 VREFCA DQL0 MDA24 VREF_A3 VREFCA DQL0 MDA22 VREF_A5 VREFCA DQL0 MDA34 VREF_A7 VREFCA DQL0 MDA60
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDA30 F2 MDA18 F2 MDA36 F2 MDA58
MAA0 DQL2 MDA25 MAA0 DQL2 MDA21 MAA0 DQL2 MDA35 MAA0 DQL2 MDA61
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
MAA1 P7 H3 MDA28 MAA1 P7 H3 MDA16 MAA1 P7 H3 MDA39 MAA1 P7 H3 MDA56
MAA2 A1 DQL4 MDA26 MAA2 A1 DQL4 MDA20 MAA2 A1 DQL4 MDA32 MAA2 A1 DQL4 MDA63
P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8
MAA3 N2 G2 MDA31 MAA3 N2 G2 MDA17 MAA3 N2 G2 MDA37 MAA3 N2 G2 MDA59
MAA4 A3 DQL6 MDA27 MAA4 A3 DQL6 MDA23 MAA4 A3 DQL6 MDA33 MAA4 A3 DQL6 MDA62
P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7
MAA5 P2 MAA5 P2 MAA5 P2 MAA5 P2
MAA6 A5 MAA6 A5 MAA6 A5 MAA6 A5
R8 A6 R8 A6 R8 A6 R8 A6
MAA7 R2 D7 MDA12 MAA7 R2 D7 MDA4 MAA7 R2 D7 MDA51 MAA7 R2 D7 MDA43
MAA8 A7 DQU0 MDA15 MAA8 A7 DQU0 MDA3 MAA8 A7 DQU0 MDA50 MAA8 A7 DQU0 MDA44
A
T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 A
MAA9 R3 C8 MDA10 MAA9 R3 C8 MDA7 MAA9 R3 C8 MDA49 MAA9 R3 C8 MDA46
MAA10 A9 DQU2 MDA13 MAA10 A9 DQU2 MDA0 MAA10 A9 DQU2 MDA48 MAA10 A9 DQU2 MDA42
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAA11 R7 A7 MDA9 MAA11 R7 A7 MDA5 MAA11 R7 A7 MDA54 MAA11 R7 A7 MDA40
MAA12 A11 DQU4 MDA11 MAA12 A11 DQU4 MDA1 MAA12 A11 DQU4 MDA53 MAA12 A11 DQU4 MDA47
N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2
MAA13 T3 B8 MDA8 MAA13 T3 B8 MDA6 MAA13 T3 B8 MDA52 MAA13 T3 B8 MDA41
A13 DQU6 MDA14 A13 DQU6 MDA2 A13 DQU6 MDA55 A13 DQU6 MDA45
T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR

A_BA0 M2 B2 A_BA0 M2 B2 A_BA0 M2 B2 A_BA0 M2 B2


A_BA1 BA0 VDD#B2 A_BA1 BA0 VDD#B2 A_BA1 BA0 VDD#B2 A_BA1 BA0 VDD#B2
N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7
BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
CLKA0 J7 N9 CLKA0 J7 N9 CLKA1 J7 N9 CLKA1 J7 N9
20 CLKA0 CK VDD#N9 CK VDD#N9 20 CLKA1 CK VDD#N9 CK VDD#N9
CLKA0# K7 R1 CLKA0# K7 R1 CLKA1# K7 R1 CLKA1# K7 R1
20 CLKA0# CK VDD#R1 CK VDD#R1 20 CLKA1# CK VDD#R1 CK VDD#R1
CKEA0 K9 R9 CKEA0 K9 R9 CKEA1 K9 R9 CKEA1 K9 R9
20 CKEA0 CKE VDD#R9 +1.5V_GDDR CKE VDD#R9 +1.5V_GDDR 20 CKEA1 CKE VDD#R9 +1.5V_GDDR CKE VDD#R9 +1.5V_GDDR

ODTA0_M K1 A1 ODTA0_M K1 A1 ODTA1_M K1 A1 ODTA1_M K1 A1


CSA0_0# ODT VDDQ#A1 CSA0_0# ODT VDDQ#A1 CSA1_0# ODT VDDQ#A1 CSA1_0# ODT VDDQ#A1
20 CSA0_0# L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8 20 CSA1_0# L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8
RASA0# J3 C1 RASA0# J3 C1 RASA1# J3 C1 RASA1# J3 C1
20 RASA0# RAS VDDQ#C1 RAS VDDQ#C1 20 RASA1# RAS VDDQ#C1 RAS VDDQ#C1
CASA0# K3 C9 CASA0# K3 C9 CASA1# K3 C9 CASA1# K3 C9
20 CASA0# CAS VDDQ#C9 CAS VDDQ#C9 20 CASA1# CAS VDDQ#C9 CAS VDDQ#C9
WEA0# L3 D2 WEA0# L3 D2 WEA1# L3 D2 WEA1# L3 D2
20 WEA0# WE VDDQ#D2 WE VDDQ#D2 20 WEA1# WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
QSA3 F3 H2 QSA2 F3 H2 QSA4 F3 H2 QSA7 F3 H2
QSA1 DQSL VDDQ#H2 QSA0 DQSL VDDQ#H2 QSA6 DQSL VDDQ#H2 QSA5 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9

DQMA#3 E7 A9 DQMA#2 E7 A9 DQMA#4 E7 A9 DQMA#7 E7 A9


DQMA#1 DML VSS#A9 DQMA#0 DML VSS#A9 DQMA#6 DML VSS#A9 DQMA#5 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
QSA#3 G3 J2 QSA#2 G3 J2 QSA#4 G3 J2 QSA#7 G3 J2
QSA#1 DQSL VSS#J2 QSA#0 DQSL VSS#J2 QSA#6 DQSL VSS#J2 QSA#5 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
B
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 B

VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9


VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9
20,22 DDR3_RST RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
R131 1 2 240/F L8 T9 R456 1 2 240/F L8 T9 R122 1 2 240/F L8 T9 R465 1 2 240/F L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1


VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1
VSSQ#D8 D8 VSSQ#D8 D8 VSSQ#D8 D8 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

100-BALL 100-BALL 100-BALL 100-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12
MDA[63..0]
20 MDA[63..0]
MAA[13..0]
20 MAA[13..0]
QSA#[7..0]
20 QSA#[7..0] +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR
QSA[7..0]
20 QSA[7..0]
DQMA#[7..0]
20 DQMA#[7..0]
R133 R126 R458 R462 R123 R134 R463 R460
A_BA[2..0]
20 A_BA[2..0]
4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F

VREF_A0 VREF_A1 VREF_A2 VREF_A3 VREF_A4 VREF_A5 VREF_A6 VREF_A7

Placement has to be close to VRAM


2

2
R132 C259 R119 C235 R457 C585 R461 C595 R124 C242 R135 C262 R464 C598 R459 C589
C C
4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U
1

1
CLKA0 R129 56 10 10 10 10 10 10 10 10
C258 1 2 0.01U/16V
CLKA0# R130 56

CLKA1 R137 56
C264 1 2 0.01U/16V
CLKA1# R136 56 +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR
1

1
ODTA0_M +1.5V_GDDR C240 C260 C256 C239 C257 C594 C586 C579 C593 C596 C236 C263 C261 C241 C237 C600 C599 C588 C582 C597
R120 0
2 1 R125 *56_NC 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V
20 ODTA0
2

2
R121 0
2 1 R127 *56_NC
20 ODTA1
ODTA1_M
!!! M96 : pop 0 ohm :
+1.5V_GDDR +1.5V_GDDR
Park, Madison: pop 56 ohm
1

1
C254 C243 C592 C584 C244 C255 C591 C590

10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V


2

2
CC0603 CC0603 CC0603 CC0603 CC0603 CC0603 CC0603 CC0603

D D

QUANTA
Title
COMPUTER
M96XT_DDR3_A_512M

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 21 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

DDR3 64MX16, CH B : 512MB


U30 U3 U2 U28

VREF_B0 M8 E3 MDB3 VREF_B2 M8 E3 MDB16 VREF_B4 M8 E3 MDB55 VREF_B6 M8 E3 MDB33


VREF_B1 VREFCA DQL0 MDB4 VREF_B3 VREFCA DQL0 MDB17 VREF_B5 VREFCA DQL0 MDB52 VREF_B7 VREFCA DQL0 MDB39
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDB2 F2 MDB23 F2 MDB54 F2 MDB38
MAB0 DQL2 MDB5 MAB0 DQL2 MDB18 MAB0 DQL2 MDB51 MAB0 DQL2 MDB36
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
MAB1 P7 H3 MDB0 MAB1 P7 H3 MDB20 MAB1 P7 H3 MDB49 MAB1 P7 H3 MDB35
MAB2 A1 DQL4 MDB6 MAB2 A1 DQL4 MDB19 MAB2 A1 DQL4 MDB48 MAB2 A1 DQL4 MDB34
P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8
MAB3 N2 G2 MDB1 MAB3 N2 G2 MDB21 MAB3 N2 G2 MDB53 MAB3 N2 G2 MDB37
MAB4 A3 DQL6 MDB7 MAB4 A3 DQL6 MDB22 MAB4 A3 DQL6 MDB50 MAB4 A3 DQL6 MDB32
P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7
MAB5 P2 MAB5 P2 MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
R8 A6 R8 A6 R8 A6 R8 A6
MAB7 R2 D7 MDB15 MAB7 R2 D7 MDB24 MAB7 R2 D7 MDB41 MAB7 R2 D7 MDB63
MAB8 A7 DQU0 MDB10 MAB8 A7 DQU0 MDB31 MAB8 A7 DQU0 MDB47 MAB8 A7 DQU0 MDB56
A
T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 A
MAB9 R3 C8 MDB14 MAB9 R3 C8 MDB28 MAB9 R3 C8 MDB40 MAB9 R3 C8 MDB60
MAB10 A9 DQU2 MDB8 MAB10 A9 DQU2 MDB30 MAB10 A9 DQU2 MDB46 MAB10 A9 DQU2 MDB58
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAB11 R7 A7 MDB12 MAB11 R7 A7 MDB26 MAB11 R7 A7 MDB43 MAB11 R7 A7 MDB62
MAB12 A11 DQU4 MDB9 MAB12 A11 DQU4 MDB29 MAB12 A11 DQU4 MDB45 MAB12 A11 DQU4 MDB57
N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2 N7 A12/BC DQU5 A2
MAB13 T3 B8 MDB13 MAB13 T3 B8 MDB25 MAB13 T3 B8 MDB44 MAB13 T3 B8 MDB61
A13 DQU6 MDB11 A13 DQU6 MDB27 A13 DQU6 MDB42 A13 DQU6 MDB59
T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR

B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2


B_BA1 BA0 VDD#B2 B_BA1 BA0 VDD#B2 B_BA1 BA0 VDD#B2 B_BA1 BA0 VDD#B2
N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
B_BA2 M3 G7 B_BA2 M3 G7 B_BA2 M3 G7 B_BA2 M3 G7
BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
CLKB0 J7 N9 CLKB0 J7 N9 CLKB1 J7 N9 CLKB1 J7 N9
20 CLKB0 CK VDD#N9 CK VDD#N9 20 CLKB1 CK VDD#N9 CK VDD#N9
CLKB0# K7 R1 CLKB0# K7 R1 CLKB1# K7 R1 CLKB1# K7 R1
20 CLKB0# CK VDD#R1 CK VDD#R1 20 CLKB1# CK VDD#R1 CK VDD#R1
CKEB0 K9 R9 CKEB0 K9 R9 CKEB1 K9 R9 CKEB1 K9 R9
20 CKEB0 CKE VDD#R9 +1.5V_GDDR CKE VDD#R9 +1.5V_GDDR 20 CKEB1 CKE VDD#R9 +1.5V_GDDR CKE VDD#R9 +1.5V_GDDR

ODTB0_M K1 A1 ODTB0_M K1 A1 ODTB1_M K1 A1 ODTB1_M K1 A1


CSB0_0# ODT VDDQ#A1 CSB0_0# ODT VDDQ#A1 CSB1_0# ODT VDDQ#A1 CSB1_0# ODT VDDQ#A1
20 CSB0_0# L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8 20 CSB1_0# L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8
RASB0# J3 C1 RASB0# J3 C1 RASB1# J3 C1 RASB1# J3 C1
20 RASB0# RAS VDDQ#C1 RAS VDDQ#C1 20 RASB1# RAS VDDQ#C1 RAS VDDQ#C1
CASB0# K3 C9 CASB0# K3 C9 CASB1# K3 C9 CASB1# K3 C9
20 CASB0# CAS VDDQ#C9 CAS VDDQ#C9 20 CASB1# CAS VDDQ#C9 CAS VDDQ#C9
WEB0# L3 D2 WEB0# L3 D2 WEB1# L3 D2 WEB1# L3 D2
20 WEB0# WE VDDQ#D2 WE VDDQ#D2 20 WEB1# WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
QSB0 F3 H2 QSB2 F3 H2 QSB6 F3 H2 QSB4 F3 H2
QSB1 DQSL VDDQ#H2 QSB3 DQSL VDDQ#H2 QSB5 DQSL VDDQ#H2 QSB7 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9

DQMB#0 E7 A9 DQMB#2 E7 A9 DQMB#6 E7 A9 DQMB#4 E7 A9


DQMB#1 DML VSS#A9 DQMB#3 DML VSS#A9 DQMB#5 DML VSS#A9 DQMB#7 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
QSB#0 G3 J2 QSB#2 G3 J2 QSB#6 G3 J2 QSB#4 G3 J2
QSB#1 DQSL VSS#J2 QSB#3 DQSL VSS#J2 QSB#5 DQSL VSS#J2 QSB#7 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
B
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 B

VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9


VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9 DDR3_RST T2 P9
20,21 DDR3_RST RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
R449 1 2 240/F L8 T9 R95 1 2 240/F L8 T9 R66 1 2 240/F L8 T9 R446 1 2 240/F L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1


VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1
VSSQ#D8 D8 VSSQ#D8 D8 VSSQ#D8 D8 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

100-BALL 100-BALL 100-BALL 100-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12

MDB[63..0] +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR


20 MDB[63..0]
MAB[13..0]
20 MAB[13..0]
QSB#[7..0] R447 R452 R116 R112 R90 R55 R415 R436
20 QSB#[7..0]
QSB[7..0] 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F 4.99K/F
20 QSB[7..0]
DQMB#[7..0] VREF_B0 VREF_B1 VREF_B2 VREF_B3 VREF_B4 VREF_B5 VREF_B6 VREF_B7
20 DQMB#[7..0]
B_BA[2..0]
20 B_BA[2..0]
2

2
R448 C561 R453 C571 R117 C227 R108 C202 R86 C87 R54 C63 R414 C526 R435 C542
C C
4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U 4.99K/F 0.1U
1

1
CLKB0 R118 56 10 10 10 10 10 10 10 10
C226 1 2 0.01U/16V
CLKB0# R115 56

CLKB1 R52 56
C62 1 2 0.01U/16V
CLKB1# R53 56 +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR +1.5V_GDDR
1

1
ODTB0_M +1.5V_GDDR C573 C570 C565 C564 C560 C157 C214 C225 C546 C572 C522 C64 C122 C61 C127 C550 C557 C554 C525 C523
R102 0
2 1 R103 *56_NC 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3V
20 ODTB0
2

2
R72 0
2 1 R73 *56_NC
20 ODTB1
ODTB1_M
!!! M96 : pop 0 ohm :
+1.5V_GDDR +1.5V_GDDR
Park, Madison: pop 56 ohm
1

1
C574 C559 C66 C558 C76 C135 C524 C551

10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V 10uF_6.3V


2

2
CC0603 CC0603 CC0603 CC0603 CC0603 CC0603 CC0603 CC0603

D D

QUANTA
Title
COMPUTER
M96XT_DDR3_B_512M

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 22 of 61


1 2 3 4 5 6 7 8
5 4 3 2 1

CN14
R23 2 1 499/F HDMI_CLK+_L C503 0.1U L39 20
ATI_HDMI_CLK+ 17 SHELL1
R22 2 1 499/F HDMI_CLK-_L C502 0.1U HDMI_TX2-_L 4 3 HDMI_TX2- HDMI_TX2+ 1 22
ATI_HDMI_CLK- 17 D2+ GND
HDMI_TX2+_L 1 2 HDMI_TX2+ 2
HDMI_TX2- D2 Shield
3 D2-
EXC24CG900U HDMI_TX1+ 4
R26 HDMI_TX2+_L D1+
2 1 499/F C506 0.1U
ATI_HDMI_TX2+ 17 5 D1 Shield
R27 2 1 499/F HDMI_TX2-_L C507 0.1U HDMI_TX1- 6
ATI_HDMI_TX2- 17 D1-
+5V_RUN HDMI_TX0+ 7 D0+
8 D0 Shield

1
HDMI_TX0- 9
R25 HDMI_TX1+_L HDMI_CLK+ D0-
2 1 499/F C505 0.1U
ATI_HDMI_TX1+ 17
R5 R6 10 CK+
R24 2 1 499/F HDMI_TX1-_L C504 0.1U 11
D ATI_HDMI_TX1- 17 CK Shield D
2.2K 2.2K HDMI_CLK- 12
L38 HDMI_CEC CK-
13

2
HDMI_TX1-_L HDMI_TX1- T1 CE Remote
1 2 T4 14 NC
R20 2 1 499/F HDMI_TX0+_L C500 0.1U HDMI_TX1+_L 4 3 HDMI_TX1+ HDMI_SCL_L 15
ATI_HDMI_TX0+ 17 DDC CLK
R21 2 1 499/F HDMI_TX0-_L C501 0.1U HDMI_SDA_L 16
ATI_HDMI_TX0- 17 DDC DATA
EXC24CG900U 17 GND
18 +5V
3

R7 10K HDMI_DET 19 23
17 ATI_HDMI_DET HP DETGND
+5V_RUN 2 SHELL2 21
Q6 R399 2 1 0 +VCC_HDMI_+5V
2N7002W-7-F TYC_2041602-3
1

Pop for ATI Graphic +5V_RUN F1 1 2 HDMI-2041602-3-19P-LDV-H

*POLY SWITCH 1.1A_NC


L36 C490
+3.3V_DELAY HDMI_TX0-_L 4 3 HDMI_TX0- *0.1U_NC
HDMI_TX0+_L 1 2 HDMI_TX0+

EXC24CG900U
1

R33 R32
4.7K 4.7K Q5 FDV301N
2

1 3 HDMI_SCL_L
17 ATI_HDMI_SCL

L37 AUX_SINK_N 1 3 3 1 AUX_SINK_N_C


2

HDMI_CLK-_L HDMI_CLK- 17 AUX_SINK_N


+3.3V_DELAY 1 2
C HDMI_CLK+_L 4 3 HDMI_CLK+ C
2

Q9 Q12

2
EXC24CG900U BSS138_NL BSS138_NL +5V_RUN +3.3V_RUN
1 3 HDMI_SDA_L
17 ATI_HDMI_SDA

1
Q4 FDV301N AUX_SINK_P 1 3 3 1 AUX_SINK_P_C
17 AUX_SINK_P R13 R16
100K 100K
Reserve For EMI Scott_0814:Delete 0ohm reserve resistors as confirm with EMI. Q10 Q13

2
BSS138_NL BSS138_NL
C492 0.1U/10V R388 0 Q1

3
1 2 DP_LANE3_N_C 1R389 02 DP_LANE3_N_R Delete EMI ESD IC for EMI asked HDMI signals link to C8 2N7002W-7-F
17 DP_LANE3_N

1
1 2 DP_LANE3_P_C 1 2 DP_LANE3_P_R 2 2 CAD_SINK
17 DP_LANE3_P C493 0.1U/10V CONN directly. 0.1U/10V
Temporary DP dongle

1
R34 R30

1
support circuit for DP *499/F_NC *499/F_NC AUX Intermittent Read Failure :
function test R17
M8x bug, need 500 ohm to GND;

3 2
Q2 1M
Remember to keep 1M M9x don't need. 2N7002W-7-F

2
connection when 2
remove dongle circuit. Q3

1
*2N7002W-7-F_NC
C494 0.1U/10V R390 0
1 2 DP_LANE2_N_C 1R391 02 DP_LANE2_N_R
17 DP_LANE2_N DP_LANE2_P_C DP_LANE2_P_R
17 DP_LANE2_P 1 2 1 2
C495 0.1U/10V

+3.3V_RUN
B DISPLAY PORT CONNECTOR B

Scott_0814:Delete reserve choke as confirm with EMI. DP only, no dongle


support DVI or HDMI
FS1
1206L150-C
C496 0.1U/10V R392 0
1 2 DP_LANE1_N_C 1R393 02 DP_LANE1_N_R CN18
17 DP_LANE1_N DP_LANE1_P_C DP_LANE1_P_R dp-rsd-47644-001-20p-l-h
17 DP_LANE1_P 1 2 1 2
C497 0.1U/10V SHIELD6 21

1
SHIELD5 23 C489 C491

220P 10U/6.3V/0603

2
PWR 20
20
PWR_RET 19
19
R396 10K DP_HPD_SINK 18 HPD
17 ATI_DP_HPD 18

17
C498 0.1U/10V R394 0 Scott_0703:Delete ESD Clamp U23,U24,U25 as EMI suggestion. AUX_SINK_N_R 17 AUXN
16
GND 16
1 2 DP_LANE0_N_C 1R395 02 DP_LANE0_N_R AUX_SINK_P_R 15 AUXP
17 DP_LANE0_N DP_LANE0_P_C DP_LANE0_P_R
15
GND CONFIG2
17 DP_LANE0_P 1 2 1 2 14 14 T2
C499 0.1U/10V MODE 13 CAD_SINK
+3.3V_DELAY DP_LANE3_N_R LANE_3N
13 T3
12 12
+3.3V_DELAY DP_LANE3_P_R 10 LANE_3P GND 11
11

10
DP_LANE2_N_R 9 LANE_2N
1
1

9
DP_LANE2_P_R 7 LANE_2P
8
GND 8
R4 R18 7
*100K_NC 100K DP_LANE1_N_R 6 LANE_1N
6
A DP_LANE1_P_R 4 LANE_1P
5 GND 5 A
C4 0.1U/10V R386 0
2
2

4
AUX_SINK_N 1 2 AUX_SINK_N_C 1R387 02 AUX_SINK_N_R DP_LANE0_N_R 3 LANE_0N
3
AUX_SINK_P 1 2 AUX_SINK_P_C 1 2 AUX_SINK_P_R DP_LANE0_P_R 1 LANE_0P GND 2
C5 0.1U/10V
2

QUANTA
1
1

R8 R19
100K *100K_NC SHIELD3
SHIELD2
22
24 Title
COMPUTER
HDMI & DP
2
2

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 23 of 61


5 4 3 2 1
5 4 3 2 1

CN3 +PWR_SRC +GFX_PWR_SRC


LCD_BCLK-
Shunt capacitors on LVDS for improving WWAN.
50 50
LCD_BCLK+
65 mils
49 49
+LCDVCC +3.3V_RUN LCD_B0- C267 1 LCD_B0+
65 mils 6
48 48 2 3.3P/16V 4 5
47 LCD_B1- C266 1 2 3.3P/16V LCD_B1+ 2
47 DS2413_IN 29

1
46 LCD_B2- C265 1 2 3.3P/16V LCD_B2+ 1
46

1
45 For new function! R148 C277 C279 C278
45 LCD_B2- 0.1U/50V Q27
44

3
44

1
43 LCD_B2+ C614 C615 C611 LCD_A0- C271 1 2 3.3P/16V LCD_A0+ 100K 0603 FDC658AP 0.1U/50V 0.1U/50V

2
43 LCD_A1- C270 1
42 2 3.3P/16V LCD_A1+ 50 CC0603 CC0603

2
42 LCD_B1- 0.1U/10V 0.047U/10V 0.1U/10V LCD_A2- C269 1 LCD_A2+
41 2 3.3P/16V

2
41 LCD_B1+
40 40

1
D D
39 39
38 LCD_B0- R149
38 LCD_B0+
37 37
36 LCD_ACLK- 100K
36 LCD_ACLK-
35

3 2
35

1
34 LCD_ACLK+
34

2
33 R138 GFX_PWR_SRC layout note:
33 +3.3V_RUN C268 Q28
32 32 18,43,46,47,48,49,54 RUN_ON 2 40 mil trace for tube type
31 *0_NC 3.3P/16V 2N7002W-7-F

1
31
30
45 mil for white LED type

1
30

1
29 LCD_A2- LCD_ACLK+ 65 mil for RGB LED type
29 LCD_A2+ R468
28 28
27 27
26 LCD_A1- *10K_NC
26 LCD_A1+ LCD_BCLK-
25

2
25 LCD_PWM
24 24 29 PWM_VADJ

1
23 LCD_A0-
23

2
22 LCD_A0+ R128
22 C253
21 21
20 *0_NC 3.3P/16V
ATI_LCD_DDCCLK 17

1
20
19 ATI_LCD_DDCDAT 17

2
19 LCD_BCLK+
18 18
17 17 +3.3V_RUN
16 16
15 15 +LCDVCC
14 14
13 13 LCD_TST 29
12 12
11 11 +GFX_PWR_SRC Adress : A9H --Contrast
C 10 C
10
9
AAH --Backlight +15V_ALW +3.3V_RUN +LCDVCC
9 Q56
8 8 +5V_ALW
7 FDC655BN
7 SMBCLK1 SMBCLK1
51 51 6 6 SMBCLK1 9,20,29 6

1
52 5 SMBDAT1 SMBDAT1 5 4
52 5 SMBDAT1 9,20,29
53 4 R485 2
53 4 INVERTER_CBL_DET# 29
1

1
54 3 C285 C284 1
54 3 LCD_BAK# 29
55 2 LCD_PWM 330K
55 2

1
56 1 *47P/50V_NC *47P/50V_NC C617 C612
LCD_CBL_DET# 29
2

3
56 1 R472
IPX_20323-050ED41 LCDVCC_ON 47 22U/10V 0.01U/25V

2
RC0805 CC1206

2
1
R483 C639

U29G R423 R69 *100K_NC 0.01U/25V

2
2
10K 10K

LVDS CONTROL AK27 +3.3V_SUS


VARY_BL

3
AJ27 ENVDD
DIGON
2 2
Q53

1
Q57 2N7002W-7-F

1
R473 2N7002W-7-F
AK35 LCD_BCLK+
TXCLK_UP_DPF3P LCD_BCLK- 47K
TXCLK_UN_DPF3N AL36
Support the new imbeded

2
AJ38 LCD_B0+
B TXOUT_U0P_DPF2P
AK37 LCD_B0- diagnostics. B
TXOUT_U0N_DPF2N D19

3
AH35 LCD_B1+ ENVDD 1
TXOUT_U1P_DPF1P LCD_B1-
TXOUT_U1N_DPF1N AJ36
3 EN_LCDVCC 2 Q55
AG38 LCD_B2+ DDTC124EUA-7-F
TXOUT_U2P_DPF0P LCD_B2-
TXOUT_U2N_DPF0N AH37 Scott_0812: Delete DPST function as non-used. 29 LCDVCC_TST_EN 2

1
AF35 BAT54C T/R
TXOUT_U3P PAD T9
TXOUT_U3N AG36 PAD T8

LVTMDP

AP34 LCD_ACLK+
TXCLK_LP_DPE3P LCD_ACLK-
TXCLK_LN_DPE3N AR34

AW37 LCD_A0+
TXOUT_L0P_DPE2P LCD_A0-
TXOUT_L0N_DPE2N AU35

AR37 LCD_A1+
TXOUT_L1P_DPE1P LCD_A1-
TXOUT_L1N_DPE1N AU39

AP35 LCD_A2+
TXOUT_L2P_DPE0P LCD_A2-
TXOUT_L2N_DPE0N AR35

TXOUT_L3P AN36 PAD T7


TXOUT_L3N AP37 PAD T74
A A

216-0729051(M96-M2 XT) QUANTA


Title
COMPUTER
M96XT_LVDS & LCD CONN

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 24 of 61


5 4 3 2 1
A B C D E

+3.3V_DELAY +5V_RUN

2
D13

2
SDM10K45-7-F

1
4 4
Layout Note:
Setting R,G,B treac L3 D1 D2 D3

3
BLM18BB750SN1D *DA204U_NC *DA204U_NC *DA204U_NC
impedance to 50 ohm. RC0603 +5V_CRT_REF
1 2 RED
17 VGA_RED
L2
BLM18BB750SN1D PAD T55 M_SEN#_R
RC0603
1 2 GREEN
17 VGA_GRN
L1 CN17
BLM18BB750SN1D 6
RC0603 11
1 2 BLUE 1
17 VGA_BLU
7
1

1
12

1
R28 R29 R31 C6 C7 C9 C1 C2 C3 2
150/F 150/F 150/F 22P/50V 22P/50V 22P/50V 10P/50V 10P/50V 10P/50V 8
13

2
3
2

2
9
14
4/28: Change to +5V_CRT_REF PAD T54 M_ID2# 4
10
+3.3V_DELAY to prevent leakage +5V_CRT_REF 15
5

FOX_DZ11A91-SB283-9F

1
DSUB-DZ11A91-SB283-9F-15P-H

1
3 R397 R398 C481 R373 R372 3
2.7K/F 2.7K/F 0.01U/25V 2.7K/F 2.7K/F
Q50

2
BSS138_NL

2
R370 33
G_DAT_DDC 1 3 G_DAT_DDC_C 1 2 G_DAT_DDC_R
17 G_DAT_DDC

2
+3.3V_DELAY

2
R369 33
G_CLK_DDC 1 3 G_CLK_DDC_C 1 2 G_CLK_DDC_R
+5V_RUN 17 G_CLK_DDC

1
R377 1K Q49
2 1 BSS138_NL C487 C482
*22P/50V_NC *22P/50V_NC

2
5

U22
R374 33 L35 BLM11A05S
VGAHSYNC 2 4 VGAHSYNC_R 1 2 HSYNC 1 2 JVGA_HS
17 VGAHSYNC
RC0603

74AHCT1G125GW

1
C484 Place near
0.1U/10V U24,U25 < C488 C486
2 1 *10P/50V_NC 47P/50V

2
200 mil
5

2 2

U21
R371 33 L34 BLM11A05S
VGAVSYNC 2 4 VGAVSYNC_R 1 2 VSYNC 1 2 JVGA_VS
17 VGAVSYNC
RC0603

74AHCT1G125GW

1
C485 C483
*10P/50V_NC 47P/50V

2
+5V_RUN +3.3V_DELAY

Place near JVGA1 connector <


200 mil
1

D14 D15 D16 D17


3

*DA204U_NC *DA204U_NC *DA204U_NC *DA204U_NC

VGAHSYNC G_DAT_DDC
VGAVSYNC G_CLK_DDC

1 1

QUANTA
Title
COMPUTER
CRT CONN

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 25 of 61


A B C D E
A B C D E

Place close U23


SD_WP#/MS_BS/XD_DATA7 27
SD_DATA1/XD_DATA6 27
SD_DATA0/MS_DATA1/XD_DATA5 27
SD_DATA7/XD_DATA4 27
R633 0
SDATA_6/MS_DATA5/XD_DATA3 27
SD_CLK/MS_DAT0/XD_DATA2_R 1 2 SD_CLK/MS_DAT0/XD_DATA2 27
XD_DATA1 27
SD_DATA5/MS_DATA4/XD_DATA0 27

1
C804
1 SD_CMD/MS_DATA2/XD_WP# 27 1
*22P/50V_NC
SD_DATA4/MS_DATA6/XD_WE# 27
SD_DATA3/MS_DATA3/XD_ALE 27

2
SD_DATA2/XD_CLE 27
XD_CE# 27
R639 0
MS_DATA7/XD_RE# 27
MS_CLK/XD_R/B#_R 1 2 MS_CLK/XD_R/B# 27
SD_CD#/XD_CD0# 27
MS_INS#/XD_CD1# 27

1
C808
Close to RU230 *22P/50V_NC

25
26
27
28
29
30
31
32
33
34
35
38
39
40
41

2
4
5
Shield GND Required U51 +3.3V_R5U230
MFIO Pin Assignment Table

MFCD0N
MFCD1N
MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14
C813

4/30: Change C812 to 27pF 1 2 1394_XI 44 11


1394_XO XI VCC_3V1 MFIO SD8 MS8 XD
43 37
Change C813 to 22pF 1
XO VCC_3V0
00 WP BS D7
22P/50V

2
Y6 C807 C803
24.576MHZ
01 D1 - D6
30PPM 0.1U/10V 0.1U/10V 02 D0 D1 D5
C812
2

1
16p
03 D7 - D4
12 +3.3V_RUN +3.3V_R5U230 04 D6 D5 D3
27P 50NPO PCIE_VOUT1 PCIE_VIN_VOUT R634 0
42
PCIE_VOUT0
1 2 05 CLK D0 D2

1
13 C797 C810 C796 06 - - D1
9 CLK_PCIE_CARD_READER REFCLKP
9 CLK_PCIE_CARD_READER# 14 REFCLKN
18 0.1U/10V 0.1U/10V 10uF_6.3V 07 D5 D4 D0

2
C800 1 TXP PCIE_VIN1
9 PCIE_RX5+ 20.1U/10V 19 TXP PCIE_VIN0 23 CC0603 08 CMD D2 WP#
2 C799 1 20.1U/10V TXN 20 2
9 PCIE_RX5- TXN 09 D4 D6 WE#

2
C802 C801
9 PCIE_TX5+ 15 RXP 10 D3 D3 ALE
17 0.1U/10V 0.1U/10V
9 PCIE_TX5-

1
RXN +3.3V_R5U230 11 D2 - CLE
3,9,16,28,29,31,32,41,56 PLTRST# 9 PERSTN 12 - - CE#
RXC 16
CPO 22
RXC
2 13 - D7 RE#
RREF CPO AVCC_3V
24 RREF 14 - CLK R/B#

1
C806 C805
2

+3.3V_RUN_CARD
C795 C798 R630 0.1U/10V 1U/6.3V

2
0.022U 1500P 5.1K/F
MF_VOUT 36
1

TPB0N 45 49
27 TPB0N TPBN0 GND0
TPB0P 46 21
27 TPB0P TPBP0 AGND0
TPA0N 47
27 TPA0N TPAN0
TPA0P 48
27 TPA0P TPAP0
TPBIAS0 1
UDIO0
UDIO1
UDIO2
UDIO3
TPBIAS0
TEST
1

R636 R635 R638 R637


3
6
7
8

10

56.2/F 56.2/F 56.2/F 56.2/F R5U230


3 3
2

9 CLK_PCIE_REQ5#
2

R640 C811 C809 C859 50


5.11K/F 270P/50V 0.33U/16V *100P_NC NPO
1

CC0603
1

5/13: Reseved 100P


cap for EMI concern!
+3.3V_R5U230 1 2
R631 47K

5/18: Added 10K pull-up to avoid floating signal


when powering up cardreader IC
+3.3V_RUN

CLK_PCIE_REQ5# R684 10K

4 4

QUANTA
Title
COMPUTER
CardReader (5C833)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 26 of 61


A B C D E
A B C D E

1 1

1. TPA0P/TPA0N,TPB0P/TPB0N pair trace :


Same length electrically.
2. TPA0P/TPA0N,TPB0P/TPB0N pair trace : As
close as possible.
3. Termination resistor for TPA+/- TPB+/- : As
Reserved EMI Solution close as possible to its cable driver (device pin
out).
TPB0N L33
26 TPB0N
4 3 OLTPB-
1 2 OLTPB+ CN13
TPB0P
26 TPB0P 1
*DLW21SN900SQ2B_NC
2
3
4
TPA0N L32 5 7
26 TPA0N 6 8
4 3 OLTPA-
1 2 OLTPA+ TYC_2041054-6
TPA0P 06FFS-SP-TF-6P-L
26 TPA0P
*DLW21SN900SQ2B_NC

2 TPB0N R368 1 2 0 OLTPB- 2


TPB0P R367 1 2 0 OLTPB+
TPA0N R366 1 2 0 OLTPA-
TPA0P R365 1 2 0 OLTPA+

SD_WP#/MS_BS/XD_DATA7
26 SD_WP#/MS_BS/XD_DATA7
SD_DATA1/XD_DATA6
26 SD_DATA1/XD_DATA6
SD_DATA0/MS_DATA1/XD_DATA5
26 SD_DATA0/MS_DATA1/XD_DATA5
SD_DATA7/XD_DATA4
26 SD_DATA7/XD_DATA4
SDATA_6/MS_DATA5/XD_DATA3 +3.3V_RUN_CARD +3.3V_RUN_CARD
26 SDATA_6/MS_DATA5/XD_DATA3
SD_CLK/MS_DAT0/XD_DATA2 2.2uF cap is no more than
26 SD_CLK/MS_DAT0/XD_DATA2
XD_DATA1
26 XD_DATA1
26 SD_DATA5/MS_DATA4/XD_DATA0
SD_DATA5/MS_DATA4/XD_DATA0 250mils away from the power

1
SD_CMD/MS_DATA2/XD_WP# C838
26 SD_CMD/MS_DATA2/XD_WP#
SD_DATA4/MS_DATA6/XD_WE#
pin and a have a min trace 2.2U/6.3V
26 SD_DATA4/MS_DATA6/XD_WE#
26 SD_DATA3/MS_DATA3/XD_ALE
SD_DATA3/MS_DATA3/XD_ALE width of 40mils. CC0603

2
SD_DATA2/XD_CLE CON1
26 SD_DATA2/XD_CLE
XD_CE# 1 24 SD_CMD/MS_DATA2/XD_WP#
26 XD_CE# SD(CD2/WP2/GND) MS-5(DATA2)
MS_DATA7/XD_RE# SD_CD#/XD_CD0# 2 25
26 MS_DATA7/XD_RE# SD(CD1) XD-9(GND)
MS_CLK/XD_R/B# SD_WP#/MS_BS/XD_DATA7 3 26 MS_INS#/XD_CD1#
26 MS_CLK/XD_R/B# SD(WP1) MS-6(INS)
SD_CD#/XD_CD0# 4 27
26 SD_CD#/XD_CD0# XD-18(VCC) SD-3(VSS1)
MS_INS#/XD_CD1# SD_WP#/MS_BS/XD_DATA7 5 28 SD_DATA3/MS_DATA3/XD_ALE
26 MS_INS#/XD_CD1# XD-17(D7) MS-7(DATA3)
SD_DATA1/XD_DATA6 6 29 SD_DATA5/MS_DATA4/XD_DATA0
SD_DATA0/MS_DATA1/XD_DATA5 XD-16(D6) MMC-(D5) MS_CLK/XD_R/B#
7 XD-15(D5) MS-8(SCLK) 30
SD_DATA7/XD_DATA4 8 31 SD_CMD/MS_DATA2/XD_WP#
SD_DATA1/XD_DATA6 XD-14(D4) SD-2(CMD)
9 SD-8(DAT1) MS-9(VCC) 32
SDATA_6/MS_DATA5/XD_DATA3 10 33 SD_DATA4/MS_DATA6/XD_WE#
SD_DATA0/MS_DATA1/XD_DATA5 XD-13(D3) MMC-(D4)
11 SD-7(DAT0) MS-10(VSS) 34
MS_CLK/XD_R/B# SD_CLK/MS_DAT0/XD_DATA2 SD_CLK/MS_DAT0/XD_DATA2 12 35 SD_DATA3/MS_DATA3/XD_ALE
3
SD_DATA7/XD_DATA4 XD-12(D2) SD-1(DAT3) SD_CMD/MS_DATA2/XD_WP# 3
13 MMC-(D7) XD-8(-WP) 36
XD_DATA1 14 37 SD_DATA2/XD_CLE
XD-11(D1) SD-9(DAT2)
1

15 38 SD_DATA4/MS_DATA6/XD_WE#
SD-6(GND/VSS2) XD-7(WE) SD_DATA3/MS_DATA3/XD_ALE
16 MS-1(VSS) XD-6(ALE) 39
R655 R657 SDATA_6/MS_DATA5/XD_DATA3 17 40 SD_DATA2/XD_CLE
*22_NC *22_NC SD_WP#/MS_BS/XD_DATA7 MMC-(D6) XD-5(CLE) XD_CE#
18 MS-2(BS) XD-4(CE) 41
SD_CLK/MS_DAT0/XD_DATA2 19 42 MS_DATA7/XD_RE#
2

SD_DATA0/MS_DATA1/XD_DATA5 SD-5(CLK) XD-3(RE) MS_CLK/XD_R/B#


20 MS-3(VCC/DATA1) XD-2(R/-B) 43
SD_DATA5/MS_DATA4/XD_DATA0 21 44 XD_CD#
XD-10(D0) XD-1(CD)
1

C836 C837 SD_CLK/MS_DAT0/XD_DATA2 22 45


*1P/50V_NC *1P/50V_NC MS-4(SDIO/DATA0) XD-0(GND)
23 SD-4(VCC/VDD)
2

1
C840 C847 TAI-SOL_144-2400002900 C843 C845
*270P/25V_NC *27P/50V_NC C841 8IN1-144-2400002900-45P-R-H C844 *27P/50V_NC *27P/50V_NC
*270P/25V_NC 270P/25V
2

2
Close to the Chip
+3.3V_R5U230

+3.3V_RUN_CARD
Close Pin4 of
1

CardReader Conn
R632
*10K_NC The trace width for
1
1

4 +3.3V_RUN_CARD C839 C846 C842 R656 4


2

D27 0.01U/25V 0.01U/25V 0.01U/25V 150K


SD_CD#/XD_CD0# 2 XD_CD#
should be 40MIL at
1
2

least.
QUANTA
2

1SS355
D26
MS_INS#/XD_CD1# 2

1SS355
1

Title
COMPUTER
8 IN 1 & 1394 CONN

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 27 of 61


A B C D E
1 2 3 4 5 6 7 8

Express Card +1.5V_CARD Max. 650mA, Average 500mA.


+3V_CARD Max. 1300mA, Average 1000mA.
A A
CN12
1 GND_1
USB10_D- 2
USB10_D+ USB- +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
3 USB+ U53
CPUSB# 4 CPUSB#
5 RSV_0
6 RSV_1 17 AUXIN AUXOUT 15
9,13,14,31,32,34 MEM_SCLK 7 SMBCLK 2 3.3VIN_0 3.3VOUT_0 3
9,13,14,31,32,34 MEM_SDATA 8 SMBDATA 4 3.3VIN_1 3.3VOUT_1 5
9 +1.5V_0 12 1.5VIN_0 1.5VOUT_0 11
+1.5V_CARD 10 +1.5V_1 14 1.5VIN_1 1.5VOUT_1 13
7,41 PCIE_WAKE# 11 WAKE#
+3.3V_CARDAUX 12 +3.3VAUX R654 100K
CARD_RESET# 13 2 1 ExpressSwitch +3.3V_SUS
PERST# +3.3V_SUS
+3.3V_CARD 14 +3.3V_1
15 20 8 CARD_RESET#
CARD_CLK_REQ#_R +3.3V_2 SHDN# PERST# EXPRCRD_PWREN# R647 2
16 CLKREQ# T109 PAD 1 STBY# CPPE# 10 1 100K
EXPRCRD_PWREN# 17 6 9 CPUSB# R648 2 1 100K
CPPE# 3,9,16,26,29,31,32,41,56 PLTRST# SYSRST# CPUSB#
9 CLK_PCIE_EXPCARD# 18 REFCLK- OC# 19
9 CLK_PCIE_EXPCARD 19 REFCLK+ 16 NC
20 7 18 RCLKEN
GND_2 GND0 RCLKEN
9 PCIE_RX4- 21
22
PERn0 4/27: Del R652
9 PCIE_RX4+ PERp0
23 R5538D001-TR-F
GND_3
9 PCIE_TX4- 24 PETn0
25

NC1
NC2
NC3
NC4
9 PCIE_TX4+ PETp0 +3.3V_RUN
26 GND_4
CARD_CLK_REQ# 9

27
28
29
30

3
B B
R649 2N7002W-7-F
2
FOX_1CH4110C-PL 100K Q71
expcard-1cx41101-pl-26p-l-smt

1
2
Scott_0813:Change CN12 F/P to expcard-1cx41101-pl-26p-l-smt as ME modify. CARD_CLK_REQ#_R

PCI-Express TX and RX direct to connector. +1.5V_RUN +3.3V_RUN +3.3V_SUS

R364 0

1
9 PCH_USBP10+ 1R363 02 USB10_D+
1 2 USB10_D- C826 C834 C828
9 PCH_USBP10-
0.1U/10V 0.1U/10V 0.1U/10V

2
C C

Scott_0814:Delete L31 as confirm with EMI. Please the cap Please the cap Please the cap
near pin 12 & near pin 2 & 4 near pin 17
14(1.5VIN). (3.3VIN). (AUXIN).

+3.3V_CARD +1.5V_CARD +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD

1
C825 C835 C827
1

C822 C824 C823 C819 C820 0.1U/10V 0.1U/10V 0.1U/10V

2
10U/6.3V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V
CC0603
2

Please the cap Please the cap Please the cap


near pin 15 near pin 3 & 5 near pin 11 &
Please the cap near connector. Please the cap near connector.
(AUXOUT). (3.3VOUT). 13(1.5VOUT).

D D

QUANTA
Title
COMPUTER
EXPRESS CARD

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 28 of 61


1 2 3 4 5 6 7 8
5 4 3 2 1

U40 +RTC_CELL +3.3V_ALW


35 KSO[0..16]
35 KSI[0..7]
3 SMBDAT0 1 2 RP2
ITE8512E VBAT1
VCC 11 +3.3V_RUN SMBCLK0 3 4 2.2KX2

2
50 IMVP_PWRGD
KSO16
57 KSO17/GPC5 LQFP-128L VSTBY1 26 +3.3V_ALW C694
0.1U
SMBDAT1
SMBCLK1
1 2 RP3
56 50 3 4 10KX2

1
KSO15 KSO16/GPC3 VSTBY2
55 KSO15 VSTBY3 92
KSO14 54 114 NC RP22 with new MMB SMBDAT2 1 2 RP4
KSO13 KSO14 VSTBY4 10 SMBCLK2
53 KSO13 VSTBY5 121 firmware V35 which have 3 4 *10KX2_NC
+3.3V_ALW KSO12 52 127
KSO11 KSO12/SLCT VSTBY6 internal PU(5.6K) at MMB IC SIO_SLP_S5# R512 2 *100K_NC
51 KSO11/ERR 1
KSO10 46
KSO9 KSO10/PE USB_CHG_DET# R510 2
D
45 KSO9/BUSY 1 100K D
KSO8 44 66 HWPG
KSO8/ACK ADC0/GPI0 HWPG 43
2

2
KSO7 43 67 BREATH_PWLED# R569 1 2 100K
KSO7/PD7 ADC1/GPI1 IMVP6_PROCHOT# 50
C695 C688 C681 C689 C690 KSO6 42 68
KSO6/PD6 ADC2/GPI2 SUS_PWR_ACK 7
10U 0.1U 0.1U 0.1U 0.1U KSO5 41 KEYBOARD 69 LCD_CBL_DET# BREATH_LED# R553 1 2 100K
LCD_CBL_DET# 24
1

1
KSO4 KSO5/PD5 ADC3/GPI3 INVERTER_CBL_DET#
40 KSO4/PD4 ADC4/GPI4 70 INVERTER_CBL_DET# 24
KSO3 39 71 BAT_LED# R554 1 2 100K
KSO3/PD3 ADC5/GPI5 PBAT_PRES# 55
6.3 10 10 10 10 KSO2 38 72
KSO2/PD2 ADC6/GPI6 IINP 45
Place these caps close to ITE8512. KSO1 37 ADC/DAC 73 SIO_SLP_S5# Scott_0821:Delete USB_SIN_SIDE_EN# R341 1 2 100K
KSO1/PD1 ADC7/GPI7 SIO_SLP_S5# 7
KSO0 36 SKTOCC# PH as SKTOCC#
603 KSO0/PD0
76 CRIT_TEMP_REP# 10
KSI7 65
DAC0/GPJ0
77
has been tie to GND on
KSI7 DAC1/GPJ1 SIO_EXT_WAKE# 10
KSI6 64 78 LAN_DISABLE 41
processor package
KSI5 KSI6 DAC2/GPJ2 +3.3V_SUS
63 KSI5 DAC3/GPJ3 79 AUDIO_AVDD_ON 39
KSI4 62 80
KSI4 DAC4/GPJ4 PCH_RSMRST# 7
KSI3 61 81 1 2 AC_PRESENT R535 2 1 10K
KSI3/SLIN DAC5/GPJ5 SIO_PWRBTN# 7
KSI2 60 D20 SDMK0340L-7-F
KSI1 KSI2/INT SUS_PWR_ACK R515 2
59 KSI1/AFD 1 10K
KSI0 58 KSI0/STB BREATH_LED#
PWM0/GPA0 24 BREATH_LED# 36
25 BREATH_PWLED# +3.3V_RUN
PWM1/GPA1 BREATH_PWLED# 36
3,9,16,26,28,31,32,41,56 PLTRST# 22 LPCRST/WUI4/GPD2 PWM2/GPA2 28 FAN1_PWM 37
CLK_PCI_8512 13 29
9 CLK_PCI_8512 LPCCLK PWM3/GPA3 PWM_VADJ 24
6 30 BAT_LED# LCD_BAK# R551 2 1*10K_NC
8,32 LPC_LFRAME# LFRAME PWM4/GPA4 BAT_LED# 36
8,32 LPC_LAD0 10 LAD0 PWM5/GPA5 31 KB_BACKLITE_EN 35
9 PWM 32 IRQ_SERIRQ R567 2 110K
8,32 LPC_LAD1 LAD1 PWM6/GPA6 USBP0_BUS_SW_CB 33
8,32 LPC_LAD2 8 LAD2 PWM7/GPA7 34 BEEP 38
7 LCD_CBL_DET# R514 2 1 100K
8,32 LPC_LAD3 LAD3
TACH0/GPD6 47 FAN1_TACH 37
93 48 INVERTER_CBL_DET# R513 2 1 100K
7 CLKRUN# CLKRUN/GPH0/ID0 TACH1/GPD7 PANEL_BKEN 17
C IRQ_SERIRQ 5 LPC C
8 IRQ_SERIRQ D23 SERIRQ
10 SIO_EXT_SMI# 2 1 SDMK0340L-7-F 15 ECSMI/GPD4 TMRI0/WUI2/GPC4 120 LID_SW# 35,36
D24 2 1 SDMK0340L-7-F 23 124 IMVP_VR_ON R509 2 1 *100K_NC
10 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/WUI3/GPC6 SIO_SLP_S3# 7
D21 2 1 SDMK0340L-7-F 126
10 SIO_A20GATE GA20/GPB5 SUS_ON R524 2
24 LCD_TST 17 LPCPD/WUI6/GPE6 1 100K

D22 2 1 SDMK0340L-7-F 4 108 HWPG R661 2 1 100K


10 SIO_RCIN# KBRST/GPB6 RXD/GPB0 DS2413_IN 24
WRST# 14 109
WRST TXD/GPB1 SKTOCC# 3
LCD_BAK# 16 119 6/23: Pull SKTOCC# from CPU
24 LCD_BAK# PWUREQ/GPC7 CRX0/GPC0 CIRRX 30
IR/UART CTX0/GPB2 123 RUN_ON_1 43 to EC according to EC request
39 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 HDDC_EN 34
20 95 IMVP_VR_ON
8,38 ICH_AZ_CODEC_RST# L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 IMVP_VR_ON 50

SMBCLK0 110
Board ID Straps
37,45,55 SMBCLK0 SMCLK0/GPB3 +3.3V_ALW
CHARGE, BAT,CLK & THERMAL SMBDAT0 111 100 SUS_ON
37,45,55 SMBDAT0 SMDAT0/GPB4 FLFRAME/GPG2/LF SUS_ON 47,54
SMBCLK1 FLRST/GPG0/TM 106 KB_DET# 35 Clarksfield
9,20,24 SMBCLK1 115 SMCLK1/GPC1 FLAD3/GPG6 104 CAP_LED# 35
PCH & LCD & VGA THERMAL SMBDAT1 116 SMBUS LPC/FWH
9,20,24 SMBDAT1 SMDAT1/GPC2

1
FLASH FLAD2/SO 103 EC_FLASH_SPI_DO 30
SMBCLK2 117 102 R507 R523 R518 R516
35 SMBCLK2 SMCLK2/GPF6 FLAD1/SI EC_FLASH_SPI_DIN 30
MMB ONLY!! SMBDAT2 118 101 10K *10K_NC 10K 10K
35 SMBDAT2 SMDAT2/GPF7 FLAD0/SCE EC_FLASH_SPI_CS# 30
FLCLK 105 EC_FLASH_SPI_CLK 30

2
BID0
85 BID1
36 LED_MASK# PS2CLK0/GPF0
USB_CHG_DET# 86 82 PCH_PWRGD BID2
33 USB_CHG_DET# PS2DAT0/GPF1 EGAD/GPE1 PCH_PWRGD 7
EGPC 83 USB_L_SIDE_EN#
EGCS/GPE2 5V_ALW_ON 51
55 PS_ID 87 PS2CLK1/GPF2 EGCLK/GPE3 84 GFX_ON 20,52,53

2
B 35 MEDIA_INT# 88 PS2DAT1/GPF3 PS/2 B

89 R508 R520 R519 R517


35 CLK_TP_SIO PS2CLK2/GPF4
90 96 USB_L_SIDE_EN# *10K_NC 10K *10K_NC *10K_NC
35 DAT_TP_SIO PS2DAT2/GPF5 GPH3/ID3 USB_L_SIDE_EN# 33
97 BID0

1
GPH4/ID4 BID1
GPIO GPH5/ID5 98
99 BID2 Arrandale
CLK_PCI_8512 ITE8512_XTAL1 GPH6/ID6
128 CK32K GPG1/ID7 107 MODC_EN 34
ITE8512_XTAL2 2 CPU_IDENTIFY (USB_L_SIDE_EN#)
R550 CK32KE
10 USB_SIN_SIDE_EN#
1 = Clarksfield. ; 0 = Arrandale.
1 VSS1 RI1/WUI0/GPD0 18 USB_SIN_SIDE_EN# 33
ITE8512IX_JX 12 21 BID2 BID1 BID0 RM5
VSS2 RI2/WUI1/GPD1 ACAV_IN 45
27 VSS3 WUI5/GPE5 35 MMB_ISSP 35
49 VSS4 0 0 0 SSI(X00)
1

91 VSS5 RING/PWRFAIL/LPCRST/GPB7 112 AC_PRESENT 7


C702 113 0 0 1 PT(X01)
2.2P +3.3V_ALW VSS6
122 125 MAIN_PWR_SW# 35
2

L66 BLM18AG121SN1D VSS7 PWRSW/GPE4


0 1 0 ST(X02)
74 AVCC GINT/GPD5 33 LCDVCC_TST_EN 24
50 603 75 0 1 1 QT(X03)
AVSS
2

C682 IT8512E/KX-L 1 0 0
32KHz Clock. L65 0.1U LQFP128-16X16-4-FX2
1

10 1 0 1
ITE8512_XTAL2 603
BLM18AG121SN1D
+3.3V_ALW
2

A A
Y4
ITE8512IX_JX
1 4 ITE8512_XTAL1 R643
2

C693 100K
2 3 0.1U QUANTA
1

10 D28
1

C692 32.768KHZ C691 WRST#


18P 18P
37,51 THERM_STP# 1 2
COMPUTER
1

50 50 Title
ITE8512IX Populate R735 0 ohms. SDMK0340L-7-F C821 SIO (ITE8512)
1U
2

ITE8512JX Populate R735 to 0.1uF, & De-pop Cap 1uF. Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 29 of 61


5 4 3 2 1
5 4 3 2 1

EC SPI ROM, 8Mbit (1M Byte) 5/12: Change U37 from 2MB to 1MB RTC BATTERY
according to BIOS request!
+RTC_CELL +3.3V_ALW +PWR_SRC

+3.3V_ALW +3.3V_ALW U19


1 2 3 OUT IN 1
D12 4 5/3#

1
SDMK0340L-7-F

1
D D
R506 C472 2 5 C477
GND SHDN

1
10K 2.2U/6.3V *1U/25V_NC
R502 CC0603 *MAX1615EUK-T+_NC CC0805

2
U37 10K

2
29 EC_FLASH_SPI_CS# 1 CE# VDD 8
R503 1 2 15 6
29 EC_FLASH_SPI_CLK

2
R505 1 SCK
29 EC_FLASH_SPI_DIN 2 15 5 SI
R504 1 2 15 2 7
29 EC_FLASH_SPI_DO SO HOLD# BT1
3 WP# VSS 4 1 2 +RTC_1 1 2 +RTC 1

1
C670 D11 R340 1K 2

1
C675 MX25L8005M2C-15G 0.1U/10V SDMK0340L-7-F

2
22P/50V C469 MLX_53398-0271

2
1U/10V 53261-0210-2P-L

2
CC0603

1
PCH SPI ROM, (4M Byte) 5/12: Change U36 from 2MB to 4MB Consumer IR
according to BIOS request! +3.3V_ALW +3.3V_ALW

2
C R658 R660 C
100 10K
+3.3V_RUN +3.3V_RUN U20

1
29 CIRRX 4 IRTX
1

3 VCC
R487 2 GND1

1
10K 1 GND2

1
R492 C848 C849
U36 10K 4.7U/10V 0.1U/10V
2

R486 1 2 15 SPI_CS0# 1 8 CC0805 CC0402 IR-TSOP36136TR-4P


8 PCH_SPI_CS0#

2
R497 15 SPI_CLK CE# VDD
8 PCH_SPI_CLK 1 2 6

2
R498 15 SPI_SI SCK
8 PCH_SPI_SI 1 2 5 SI
R488 1 2 15 SPI_SO 2 7
8 PCH_SPI_SO SO HOLD#
3 WP# VSS 4
1

C654
1

C655 MX25L3205DM2I-12G 0.1U/10V


22P/50V
2
2

B B

A A

QUANTA
Title
COMPUTER
FLASH/ RTC/ CIR

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 30 of 61


5 4 3 2 1
1 2 3 4 5 6 7 8

A A
Mini Card Nut
H21
Mini Card Align (h6.6)

Reserved PAD for EMI


MiniCard WLAN Connector L70
USB4_D- 1 2 PCH_USBP4- 9
1 USB4_D+ 4 3 PCH_USBP4+ 9
*DLW21SN900SQ2B_NC

+3.3V_RUN +3.3V_RUN +1.5V_RUN


5/15: Change WAKE# to NC as it is 1
R708 0
2
CN24
not required
1 WAKE# 3.3V_1 2 1 2
3 4 R709 0
32 COEX2_WLAN_ACTIVE RESERVED_1 GND0
32 COEX1_BT_ACTIVE_MINI 5 RESERVED_2 1.5V_1 6
MINI1CLK_REQ# MINI1CLK_REQ# 7 8
9 MINI1CLK_REQ# CLKREQ# UIM_PWR
9 GND1 UIM_DATA 10
9 CLK_PCIE_MINI1# 11 REFCLK- UIM_CLK 12
9 CLK_PCIE_MINI1 13 REFCLK+ UIM_RESET 14
1

15 GND2 UIM_VPP 16
C698
220P/50V PLTRST# 3,9,16,26,28,29,32,41,56
2

PCI-Express TX and RX C853 50


17 18 100P NPO
B
direct to connector 19
UIM_C8 GND3
20 WLAN_RADIO_OFF# B
UIM_C4 W_DISABLE#
21 GND4 PERST# 22
9 PCIE_RX2- 23 PERn0 3.3VAUX1 24 +3.3V_RUN
9 PCIE_RX2+ 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 GND7 SMB_CLK 30 MEM_SCLK 9,13,14,28,32,34
9 PCIE_TX2- 31 PETn0 SMB_DATA 32 MEM_SDATA 9,13,14,28,32,34
9 PCIE_TX2+ 33 PETp0 GND8 34
35 36 USB4_D-
GND9 USB_D- USB4_D+
10 PCIE_MCARD1_DET# 37 RESERVED_3 USB_D+ 38
39 RESERVED_4 GND10 40 USB_MCARD1_DET# 9
41 RESERVED_5 LED_WWAN# 42 PAD T106
43 RESERVED_6 LED_WLAN# 44 LED_WLAN_OUT# 36
45 RESERVED_7 LED_WPAN# 46 PAD T105
47 RESERVED_8 1.5V_3 48
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52 5/03: Added 100p to PLTRST# and
PCIE_WAKE# according to EMI request
1759513-1
MIPCIEXP-1775838-1-52P
Suport for WoW D25
SDMK0340L-7-F
WLAN_RADIO_OFF# 2 1 WLAN_RADIO_DIS# 10

R612
*0_NC Prevent backdrive when
C C
1 2
WoW is enabled.

Place caps close to connector.


+1.5V_RUN
1

C434 C779
0.047U/10V 0.047U/10V
2

+3.3V_RUN

D D
1

C460 C767 C456 C457 C449


0.1U/10V 0.047U/10V 0.1U/10V 0.047U/10V 4.7U/10V QUANTA
2

CC0805

Title
COMPUTER
MINI-CARD (WLAN)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 31 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Mini Card Nut Reserve For EMI


5/08: Swap WWAN and WPAN according H23 H15 L71
5/13: Pull up WAKE# to 3.3V_RUN to antenna team's suggestion Mini Card Align (h3.2) *Mini Card Nut (h3.2)_NC USB8_D- 1 2 PCH_USBP8- 9
USB8_D+ 4 3 PCH_USBP8+ 9
so as to avoid leakage
*DLW21SN900SQ2B_NC
5/15: Change WAKE# to NC as it is MiniCard WWAN Connector R710 1 2 0

1
not required Layout Note: R711 1 2 0
Scott_0123:Change CN31 PN
A
with DFHS52FR015(FOX). +1.5V_RUN R240 and R244 close to choke as possible to minimize stubs. A
+3.3V_RUN
CN29 +3.3V_RUN

1 WAKE# 3.3V_1 2
+1.5V_RUN
Place caps close to connector.
T107 PAD 3 RESERVED_1 GND0 4
T108 PAD 5 RESERVED_2 1.5V_1 6
MINI3CLK_REQ# 7 8 UIM_PWR
9 MINI3CLK_REQ# CLKREQ# UIM_PWR
9 10 UIM_DATA
GND1 UIM_DATA UIM_CLK
9 CLK_PCIE_MINI3# 11 REFCLK- UIM_CLK 12

1
13 14 UIM_RESET
9 CLK_PCIE_MINI3 REFCLK+ UIM_RESET UIM_VPP C816 C814
15 GND2 UIM_VPP 16
0.047U/10V 33P/50V

2
17 UIM_C8 GND3 18
19 UIM_C4 W_DISABLE# 20 WWAN_RADIO_DIS# 10
21 22 PLTRST#
GND4 PERST# +3.3V_RUN
9 PCIE_RX3- 23 PERn0 3.3VAUX1 24 +3.3V_RUN
9 PCIE_RX3+ 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 30 MEM_SCLK
GND7 SMB_CLK MEM_SCLK 9,13,14,28,31,34

1
31 32 MEM_SDATA
9 PCIE_TX3- PETn0 SMB_DATA MEM_SDATA 9,13,14,28,31,34

1
33 34 C817 C833 C818 C829 + C832
9 PCIE_TX3+ PETp0 GND8 USB8_D- 33P/50V 0.047U/10V 33P/50V 0.047U/10V 330U/6.3V
35 GND9 USB_D- 36
37 38 USB8_D+ CC7343
10 PCIE_MCARD3_DET#

2
RESERVED_3 USB_D+
39 RESERVED_4 GND10 40 USB_MCARD3_DET# 9
PCI-Express TX and RX 41 RESERVED_5 LED_WWAN# 42 LED_WWAN_OUT# 36
43 44
direct to connector 45
RESERVED_6 LED_WLAN#
46
RESERVED_7 LED_WPAN#
B 47 RESERVED_8 1.5V_3 48 B
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52

FOX_AS0B226-S56N-7F
MIPCIEXP-1775838-1-52P
5/13: Change SIM card connector to Lotes

CN23 layout note:10 mil trace and 20 mil space for SIM card and UIM_PWR use 20mil Reserve For EMI
MINI3CLK_REQ# UIM_PWR 1 5 ESD1 L72
VCC GND UIM_CLK UIM_VPP UIM_PWR USB5_D-
1 1 6 6 1 2 PCH_USBP5- 9
UIM_RESET 2 6 UIM_VPP 2 5 UIM_PWR USB5_D+ 4 3 PCH_USBP5+ 9
RST VPP UIM_RESET 2 5 UIM_DATA
3 3 4 4
1

C830 UIM_CLK 3 7 UIM_DATA *DLW21SN900SQ2B_NC


CLK DATA
1

1
RCLAMP0504S.TCT
220P/50V 4 8 C438 C439 C433 C440 C442 R712 1 2 0
2

Case_GND Case_GND 33P/50V 33P/50V 33P/50V 33P/50V 1U/10V R713 1


Layout Note: 2 0
2

2
Lotes_YCA-MSD-004-K01 CC0603
R240 and R244 close to choke as possible to minimize stubs.
Place as close as possible to JMINI connector
+1.5V_RUN Place caps close to connector.

Mini Card Nut


MiniCard Robson, BT. UWB Connector

1
H16 C777 C463
C C
*Mini Card Nut (h3.2)_NC 0.047U/10V 0.047U/10V

2
Scott_0123:Change CN25
+3.3V_RUN PN with DFHS52FR015. +3.3V_RUN +1.5V_RUN
5/15: Change WAKE# to NC as it is
not required CN26

1
1 2 +3.3V_RUN
COEX2_WLAN_ACTIVE WAKE# 3.3V_1
31 COEX2_WLAN_ACTIVE 3 RESERVED_1 GND0 4
31 COEX1_BT_ACTIVE_MINI 5 RESERVED_2 1.5V_1 6
MINI2CLK_REQ# 7 8
9 MINI2CLK_REQ# CLKREQ# UIM_PWR LPC_LFRAME# 8,29
9 GND1 UIM_DATA 10 LPC_LAD3 8,29

1
9 CLK_PCIE_MINI2# 11 REFCLK- UIM_CLK 12 LPC_LAD2 8,29
13 14 C464 C462
9 CLK_PCIE_MINI2 REFCLK+ UIM_RESET LPC_LAD1 8,29
15 16 0.1U/10V 0.047U/10V
LPC_LAD0 8,29

2
GND2 UIM_VPP

R650 1 2 0 17 18
3,9,16,26,28,29,31,41,56 PLTRST# R651 1 UIM_C8 GND3
9 CLK_LPC_DEBUG 2 0 19 UIM_C4 W_DISABLE# 20 WPAN_RADIO_DIS_MINI# 10
21 22 PLTRST#
GND4 PERST#

1
9 PCIE_RX1- 23 PERn0 3.3VAUX1 24 +3.3V_RUN

1
25 26 C855 50 +
9 PCIE_RX1+ PERp0 GND5
27 28 100P NPO C776 C778 C815 C794
GND6 1.5V_2 MEM_SCLK 0.1U/10V 0.047U/10V 4.7U/6.3V *330U/6.3V_NC
29 30

2
GND7 SMB_CLK MEM_SDATA CC0603 CC7343
9 PCIE_TX1- 31 PETn0 SMB_DATA 32
9 PCIE_TX1+ 33 PETp0 GND8 34
35 36 USB5_D-
GND9 USB_D- USB5_D+
10 PCIE_MCARD2_DET# 37 RESERVED_3 USB_D+ 38
D 39 RESERVED_4 GND10 40 USB_MCARD2_DET# 10 D
41 RESERVED_5 LED_WWAN# 42
MINI2CLK_REQ# COEX2_WLAN_ACTIVE 43 44
RESERVED_6 LED_WLAN#
45 46
47
RESERVED_7
RESERVED_8
LED_WPAN#
1.5V_3 48
LED_WPAN_OUT# 36
QUANTA
2

49 RESERVED_9 GND11 50 5/03: Added 100p to PLTRST# and


1

C476 C831 R653

220P/50V
*33P/50V_NC *100K_NC
51 RESERVED_10 3.3V_2 52
PCIE_WAKE# according to EMI request
Title
COMPUTER
2

FOX_AS0B226-S56N-7F MINI-CARD (WPAN,WWAN)


1

MIPCIEXP-1775838-1-52P
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 32 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

eSATA Re-driver IC USB POWER SW +5V_ALW +USB_RIGHT_PWR

+3.3V_RUN
Each channel is 1A
U49 qfn20-4x4-5-21p-adg786 U15
6 VCC 2 IN GND 1
10 VCC
1

1
C780 C775 C465 C461 16
4.7U 4.7U VCC
6.3 6.3 0.1U/ 10V 0.1U/ 10V
20 VCC 29 USB_SIN_SIDE_EN# 3 EN1# OUT1 7
8
eSATA CONN
OC1# 9
2

2
603 603 OC1#
4 6 +USB_RIGHT_PWR
C781 0.01U/16V C773 0.01U/16V EN2# OUT2
A OC2# 5 A
1 2 SATA_TX5+ 1 15 eSATA_TX5+_R 1 2 eSATA_TX5+ CN25
8 SATA_TX5+_C IN0P OUT0P

1
1 2 SATA_TX5- 2 14 eSATA_TX5-_R 1 2 eSATA_TX5- C447 TPS2062DR 1
8 SATA_TX5-_C IN0M OUT0M
C782 0.01U/16V C774 0.01U/16V 0.1U/50V Place one 150uF cap by 2

1
C783 0.01U/16V CC0603 C470 3

2
8 SATA_RX5+ 1 2 SATA_RX5+_C 4 OUT1P IN1P 12 eSATA_RX5+ each USB connector. 0.1U/10V 4
5

2
1 2 SATA_RX5-_C 5 11 eSATA_RX5- 6
8 SATA_RX5- OUT1M IN1M
7
C784 0.01U/16V +3.3V_RUN
+3.3V_RUN 1 2 7 3 2 0 1 R680 USB Power Share 29 USB_CHG_DET# 8
9
EN GND

EP_AGND
R623 10K 13 2 0 1 R681 10
GND

1
1 2 9 17 USB2_D- 11
R617 10K B0 GND USB2_D+
GND 18 2 0 1 R682 R678 12
1 2 8 19 2 0 1 R683 +USB_RIGHT_PWR +5V_ALW 13
+3.3V_RUN B1 GND
R622 *10K_NC 1 *100K_NC 14

1
PI3EQX4951BZDE eSATA_RX5+ 15

21

1
Scott_0708: Pop R617 for passed eye R621 R618 C468 eSATA_RX5- 16
diagram of MAXIM. 0.1U/10V 17

2
10K *10K_NC eSATA_TX5- 18

2
R679 R355 R353 U17 eSATA_TX5+ 19
2

0 75K_F 43.2K_F 20
9 VCC
3 USB2_D+

1
RES_DIV_D+ COM1 USB2_D- FOX_GS12201-1011-9F
1 NC1 COM2 5
RES_DIV_D- 7 2006114-1-20P-L
NC2

2
9 PCH_USBP2+ 2 NO1 5/13: Change Connector to Foxconn
5/11: Reserved 0 ohms for R625 R624
9 PCH_USBP2- 6 NO2 EN 8
to avoid material shortage for Tyco
B B
Pericom enhanced mode select 49.9K_F 49.9K_F
29 USBP0_BUS_SW_CB 10 4
CB GND
5/12: Change IC to Pericom

1
as Maxim failed EA test MAX4983EEVB+
6/23: NC according to Pericom
reccomandation!

TV module +5V_RUN
R467 0
USB POWER SW 9 PCH_USBP9- 1R466 02 USB9_D-
Each channel is 1A 9 PCH_USBP9+ 1 2 USB9_D+

1
C601 C602
10U/10V 0.1U/10V
+5V_ALW +USB_LEFT_PWR CC0805

2
Scott_0814:Delete L58 as confirm with EMI. CN20
U35 1 1
2 IN GND 1 2 2
3 3
4 4
29 USB_L_SIDE_EN# 3 EN1# OUT1 7 5 5
8 ESD2 6
OC1# OC0# 9 6
USB9_D+ 1 6 USB9_D- 7
1 6 USB9_D+ 7
C
4 EN2# OUT2 6 2 2 5 5 +5V_RUN 8 8 C
5 3 4 USB9_D- 9 11
OC2# 3 4 9 11
1

C647 10 12
0.1U/50V *RCLAMP0504S.TCT_NC 1012
CC0603 TPS2062DR IPX_20374-010E-31
2

20374-010E-10P-L
TV RF Jack & Microwave connector

CN16 CN1
MLX_733660490 3 R376 1 2 *0_NC
mcx-73366-049-5p R3 1 2 *0_NC
R375 1 2 *0_NC
1 TYC_1909763-1 R2 1 2 *0_NC
2
1 1
MINIRF-1909763-1-3P
5
4
3
2

RF_GND
5
4
3
2

RF_GND

RF_GND

Add a metal cap for TV sensitivity


concern. BOM location use PV8,
actually mount on PV7, PV8 & PV9.
PV2 PV4 PV3
PAD181X67 PAD181X67(FBRM2035) PAD118X67
D D

QUANTA
GND

GND

GND

COMPUTER
1

Title
USB & eSATA & TV

RF_GND RF_GND RF_GND Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 33 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

SATA Connector ODD Connector


CN21 CN28

GND1 1 GND1 1
2 SATA_TX0+ C292 2 1 0.01U/16V SATA_TX0+_C 8 2 SATA_TX1+ C792 2 1 0.01U/16V SATA_TX1+_C 8
RXP SATA_TX0- C293 2 RXP SATA_TX1-
RXN 3 1 0.01U/16V SATA_TX0-_C 8 RXN 3 C791 2 1 0.01U/16V SATA_TX1-_C 8
GND2 4 GND2 4
5 SATA_RXN0_C C291 1 2 0.01U/25V 5 SATA_RXN1_C C790 1 2 0.01U/25V
TXN SATA_RX0- 8 TXN SATA_RX1- 8
6 SATA_RXP0_C C290 1 2 0.01U/25V 6 SATA_RXP1_C C789 1 2 0.01U/25V
A TXP SATA_RX0+ 8 TXP SATA_RX1+ 8 A
GND3 7 GND3 7

3.3V_0 8 +3.3V_RUN DP 8
3.3V_1 9 5V_0 9
3.3V_2 10 5V_1 10 +5V_MOD
GND4 11 14 14 MD 11
GND5 12 15 15 GND 12
GND6 13 16 16 GND 13
5V_0 14 +5V_HDD
5V_1 15
5V_2 16
21 GND9 GND7 17
22 18 MLX_47645-2000
GND10 GND8 SATA-47645-2000-13P-L-H
23 GND11 12V_0 19
24 GND12 12V_1 20

+5V_MOD
FOX_GS12201-1011-9F
2006114-1-20P-L

1
C788 C787 C479 C793 C480
+3.3V_RUN *10U/10V_NC 1U/10V 0.1U/16V 0.1U/16V 1000P/50V
CC0805 CC0603 CC0402 CC0402 CC0402

2
1

1
C298 C301 C286 C294 C287 C295 Place caps close to connector.
*10U/10V_NC *1U/10V_NC *0.1U/16V_NC *0.1U/16V_NC *0.1U/16V_NC *1000P/50V_NC
B CC0805 CC0603 CC0402 CC0402 CC0402 CC0402 B
2

2 +5V_ALW Q48 +5V_MOD


SI4800BDY-T1-E3
8 3
+5V_HDD 7 2
6 1

1
+3.3V_ALW +15V_ALW 5

1
C478
1

C300 C299 C289 C288 C296 C297 R359 10U/10V R362

4
1
10U/10V 1U/10V 0.1U/16V 0.1U/16V 0.1U/16V 1000P/50V 100K CC0805 100K

2
CC0805 CC0603 CC0402 CC0402 CC0402 CC0402 R360 1 2 MOD_EN_5V
2

2
100K

6
Place caps close to connector.

2
2

3
Q47B

1
+5V_ALW Q58 +5V_HDD 5 2N7002DW-7-F
29 MODC_EN
FDC655BN Q47A

1
6 2N7002DW-7-F

1
5 4 C475
R361 0.1U/25V
2
1

+3.3V_ALW +15V_ALW 100K CC0603


1

2
1

C642 R484

2
R481 4.7U/6.3V 100K
3
1

100K CC0603
2

R482 1 2 HDD_EN_5V
2

100K
6

C C
2

2
3

Q54B
1

5 2N7002DW-7-F
29 HDDC_EN
Q54A
1

2N7002DW-7-F
4

R469 C628
0.1U/25V
100K CC0603
2
2

3-axis Fall Sensor (HDD data protector)


+3.3V_RUN, the same
+3.3V_RUN U9
SMBus with WLAN
1 VDD_IO SCL 14 MEM_SCLK 9,13,14,28,31,32
1

C411 C426 2 13
GND1 SDA MEM_SDATA 9,13,14,28,31,32
*10U_NC *0.1U/10V_NC
603 3 12
2

6.3 Reserved1 SDO


4 GND2 Reserved2 11
D D
5 GND3 GND4 10

6 9

7
VDD INT2
8 PCH_IRQH_GPIO5 9
QUANTA
CS INT1

*LIS302DLTR_NC Title
COMPUTER
HDD & ODD (SATA)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 34 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

KEYBOARD CONNECTOR
To Daughter Board connector
Scott_0123:Change CN8 PN with Power Button 29 KSI[0..7]
29 KSO[0..16]
Solid White = System On, Normal Activity DFHD32MR003(With mylar)
+3.3V_ALW +3.3V_ALW R493 100K
Off= System off (system off or hibernate); 2 1
+3.3V_ALW CN7
"Breathing White " = System in Standby (S3); CN9

GND1
29 KB_DET# 1

2
1 KSI7
KSI6 2
36 BREATH_PWRLED_INT 2 3

1
D29 KSI4
Power Button POWER_ SW_IN0#
3
4 *DA204U_NC R666 KSI2 4
100K KSI5 5
5 6
6 KSI1

3
R668 10K KSI3 7
39 AUD_SPK_L1 7

2
POWER_ SW_IN0# KSI0 8
A 39 AUD_SPK_L2 8 1 2 MAIN_PWR_SW# 29 9 A
9 KSO5
KSO4 10
Speaker 10 11

1
11 KSO7
C850 KSO6 12
12 13
13 1U/10V KSO8

2
CC0603 KSO3 14
39 AUD_SPK_R1 14 15
15 KSO1
39 AUD_SPK_R2 16
R588 200K/F 16 KSO2
KSO0 17
2 1 17 18
2 1 18 KSO12
8 KB_LED_DET 19
R594 100K KSO16
KB LED 29 KB_BACKLITE_EN
+5V_RUN
19
20 Hall Switch KSO15 20
KSO13 21
21 22
22 +3.3V_ALW +3.3V_ALW KSO14
29 DAT_TP_SIO 23
23 C626 0.1U/10V KSO9
KSO11 24
Touch Pad 29 CLK_TP_SIO 24 1 2 25

1
+3.3V_ALW 25 KSO10
R599 CAP_LED_L 26
26 "MEDIA_INT#" 27
27 100K U7
PU at MB side 28

GND2
SMBDAT2_MMB 28 1
VDD 29
+5V_ALW 29

2
MEDIA_INT# 30
Media Button +MMB_PWR
SMBCLK2_MMB
30
31
2 VSS HRS_FH28-60(30)SB-1SH(86)
MEDIA_INT# 32 3 LID_SW# FH28-30SB-1SH-30P-R
29 MEDIA_INT# OUT LID_SW# 29,36
EM-6781-T3
FOX_GB5RF321-1203-8F
gb5rf341-1203-7f-32p-l

+3.3V_ALW +3.3V_ALW +5V_RUN


+MMB_PWR

1
R265

1
1

1
NC R620 & R621 with new MMB 100K
Q44 SI2303BDS-T1-E3 R286 R299 Q38
firmware V35 which have

2
Q42 *20K_NC *20K_NC DDTA114YUA-7-F

2
47K

2
1 3 2N7002W-7-F internal PU(5.6K) at MMB IC
+5V_ALW2 +MMB_PWR
29 CAP_LED# 1 3 2

2
2
B 3 1 SMBDAT2_MMB 10K B
29 SMBDAT2
1

C405
2

Q41
1

0.1U/10V R253
2

3
R287 R279 2N7002W-7-F 150
10K 100 1 2 CAP_LED_L
1

+3.3V_ALW +MMB_PWR CP2 CP1


2

R284 100PX4 100PX4


Active high for 8 7 KSI1 8 7 KSI6
2

100K Q43 6 5 KSI3 6 5 KSI4


ISSP reset
3

2N7002W-7-F 4 3 KSI0 4 3 KSI2


2

1 3 2 3 1 SMBCLK2_MMB 2 1 KSO5 2 1 KSI5


29 MMB_ISSP 29 SMBCLK2
50 50
Q39 Q40 NPO NPO
1

2N7002W-7-F 2N7002W-7-F 1206 1206

CP4 CP3
100PX4 100PX4
8 7 KSO3 8 7 KSO4
6 5 KSO1 6 5 KSO7
4 3 KSO2 4 3 KSO6
2 1 KSO0 2 1 KSO8
50 50
NPO NPO
+3.3V_RUN +3.3V_RUN +3.6V_RUN 1206 1206
Array Microphone & Camera
CP6 CP5
1

100PX4 100PX4
1

8 7 KSO14 8 7 KSO12
R628 L30 L28 The GND (pin 8) for DMIC is defined as AGND. 6 5 KSO9 6 5 KSO16
Scott_0814:Delete L29 as confirm with EMI. 100K BLM11A05S *BLM11A05S_NC 4 3 KSO11 4 3 KSO15
RC0603 RC0603
Connect with GND at MB, but separate AGND KSO10 KSO13
2 1 2 1
& GND at coaxial cable & CCD module. 50 50
2

NPO NPO
CN10 1206 1206
1 C656
R358 1 USB11_D+ 1
9 PCH_USBP11+ 2 0 2 2
100P/50V 100P CAPS close to KB connector
9 PCH_USBP11- R357 1 2 0 USB11_D- 3 1 2 KSI7
CAM_VCC 3
C
4 4 C
5 5
DMIC_DATA DMIC_DATA_R
6 6 5/03: Populate according to EMI request!
R627 1 2 0/0603 7
38 DMIC_DATA 7
RC0603 8 5/12: Change from CA110084N04 to
DMIC_CLK R626 1 DMIC_CLK_R 8
38 DMIC_CLK 2 22/0603 9 11
RC0603 10
9 11
12 CA110084N39 due to material shortage!
10 CAMERA_CBL_DET# 1012
IPX_20374-010E-31
1

DMIC_CLK_R DMIC_DATA_R 20374-010E-10P-L


C471
10U/10V
2
1

C785 C786 CC0805


*33P/50V_NC *33P/50V_NC
2

+5V_RUN +3.6V_RUN
U16
1 IN OUT 5
1

3 EN
1

R351 C467
2 4 *100K/F_NC *27P/50V_NC
GND NC/FB
2

*TPS76301DBVR_NC
2
1

C459 C466
*1U/10V_NC *4.7U/6.3V_NC
1

CC0603 CC0603
2

R352
*49.9K/F_NC
2

D D

QUANTA
Title
COMPUTER
KB/ CCD/ UI

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 35 of 61


1 2 3 4 5 6 7 8
A B C D E

Hinge LED
Hinge & Power Button board LED (PWR/Battery indictor) Solid White= System On, Normal Activity HDD Activity LED Flicker with HDD activity.
+3.3V_RUN +3.3V_RUN +5V_RUN
Solid White= Charging (system on);
+5V_ALW2 +5V_ALW
Solid White= Charging (system off or hibernate and battery charge <90%);

1
2
Off= Charging (system off or hibernate and battery charge > 90%) ;

1
"Breathing White " = System in Standby (S3); R160 R159
29 LED_MASK#
+3.3V_ALW +5V_ALW2 R714 R715 10K 0
*0_NC 0 Off = System Off (or in Hibernate); LED_MASK#

1
1
1
R157

2
*0_NC
4 47K 4
Q46 R354 1 2 Q30

5
2N7002W-7-F 100K 1 3 2 DDTA114YUA-7-F
8 SATA_ACT#
10K

2
1 3 2 4 BREATH_PWRLED_EXT R356 1 2 150 BREATH_PWRLED_EXT_R
29 BREATH_LED#
Q29
U18 2N7002W-7-F

3
TC7SZ04FU(T5L,F,T) HDD_LED_R

3
Scott_0821:Change to +5V_ALW
+3.3V_ALW power rail for slove LED blinking issue. R161 330
+5V_ALW2 +5V_ALW 1 2 HDD_LED 40
1

1
+5V_ALW2 Power button board LED:
R578 R716 R717
100K *0_NC 0 Solid White = System On, Normal Activity +3.3V_RUN +3.3V_RUN +5V_RUN Turns On when WiFi
WLAN
1

Off= System off (system off or hibernate); radio is on.


2

29,35 LID_SW# "Breathing White " = System in Standby (S3)

5 2

1
R579
2

100K R174 R172


4.7K 0
2

1 3 2 4 BREATH_PWRLED_INT_R R581 1 2 390


29 BREATH_PWLED# BREATH_PWRLED_INT 35
LED_MASK#

1
U42
Q64 TC7SZ04FU(T5L,F,T) R169 Q34
3

2
2N7002W-7-F *0_NC DDTA114YUA-7-F
47K
1 2
31 LED_WLAN_OUT# 1 3 2
10K
3 3

Q33

3
2N7002W-7-F
Hinge LED: WLAN_LED_R
+3.3V_ALW
Flashing Amber = Low Battery (S0 and S3 and no AC) when battery charge <10% R171 330
Flash rate = on 1/4 sec., off 3/4 sec. 1 2 WLAN_LED 40
5

2 4 BAT_LED_EXT R629 1 2 100 BAT_LED_EXT_R


29 BAT_LED#
U50 +3.3V_RUN +3.3V_RUN +5V_RUN
BT / UWB LED Turns On when
TC7SZ04FU(T5L,F,T)
Bluetooth radio is on.
3

1
1
R164
R166 0
100K
LED_MASK#

1
2
R162 Q32

2
*0_NC DDTA114YUA-7-F
47K
1 2
32 LED_WPAN_OUT# 1 3 2
10K
Q31
2N7002W-7-F

3
BT_LED_R
2 2
R165 330
1 2 BT_LED 40

+3.3V_RUN +3.3V_RUN +5V_RUN


WWAN Turns On when
Hinge LED (PWR/Battery indictor) WWAN radio is on.

1
1
L-C filter (reserve R-C) for EMI R179
R182 0
100K
BREATH_PWRLED_EXT_R LED_MASK#

1
Left side Right side

2
BAT_LED_EXT_R R176

2
CN2 CN11 *0_NC
47K
4 1 1 4 1 2 Q36
4 1 1 4 DDTA114YUA-7-F
2 2 2 2 32 LED_WWAN_OUT# 1 3 2
5 5 3 3 3 3 5 5 10K
1

FOX_HS8803F FOX_HS8803F Q35


C509 C508 C473 C474 2N7002W-7-F

3
2200P/50V 2200P/50V 2200P/50V 2200P/50V WWAN_LED_R
2

R175 330
1 2 WWAN_LED 40

1 Solid White= System On, Normal Activity 1

Solid White= Charging (system on);


Solid White= Charging (system off or hibernate and battery charge <90%);
Off= Charging (system off or hibernate and battery charge > 90%);
"Breathing White " = System in Standby (S3);
QUANTA
Off = System Off (or in Hibernate);
Title
COMPUTER
Flashing Amber = Low Battery (S0 and S3 and no AC) when battery charge <10% LED
Flash rate = on 1/4 sec., off 3/4 sec. Size Document Number Rev
RM5 3A

Date: Friday, August 21, 2009 Sheet 36 of 61


A B C D E
1 2 3 4 5 6 7 8

+5V_RUN

Prevent Backdrive

1
C25 +3.3V_RUN +3.3V_RUN
2.2U/10V
CC0805

1
R144 R145 Q24
10K 10K 2N7002W-7-F

2
+5V_RUN +5V_RUN

1
A A

2
D8 C32 EC_SMBCLK0 1 3
15 EC_SMBCLK0 SMBCLK0 29,45,55
*SSM34PT_NC 0.1U/10V

2
1

2
D18 R402
*DA204U_NC 4.7K +3.3V_RUN

CN19

2
4 Q23
3

2
FAN1_PWM 3 2N7002W-7-F
29 FAN1_PWM 3
2 2
1 EC_SMBDAT0 1 3
29 FAN1_TACH 1 15 EC_SMBDAT0 SMBDAT0 29,45,55
MLX_53398-0471
53398-0410-4P-R

+3.3V_RUN
Place these under CPU
10/20mils
B REM_DIODE1_P B

U6
3

C281 1 8 EC_SMBCLK0
Q59 2200P/50V VDD SCL
2
MMST3904-7-F 2 7 EC_SMBDAT0
2

DP SDA
1

REM_DIODE1_N 3 6 THERM_ALERT#_C
DN ALERT#
4 SYS_SHDN# GND 5

EMC1422-1-ACZL-TR
1.Place C579 close to EMC1422
Total capacitance between D+/D- is 2200pF(max)
1
C280 +3.3V_RUN
2 0.1U/10V
THERM_STP# 29,51

1
R147
SYS_SHDN# 1M

3
Q25
2 2N7002W-7-F

1
3

1
2 C273
C C
0.1U/10V

2
Q26
1

2N7002W-7-F

OTP 90 degree

+3.3V_RUN R139 1 2 6.8K/F THERM_ALERT#_C

R146 1 2 10K/F SYS_SHDN#

OTP 85 degree : R98 = 10K, R103 = 6.8K


OTP 90 degree : R98 = 6.8K, R103 = 10K

D D

QUANTA
Title
COMPUTER
FAN /THERMAL

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 37 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Layout Note: +VDDA


Layout Note: +VDDA
Close to the Pin 34 R600 Close to the Pin 13 R315
5.1K/F 5.1K/F
of Codec SENSEB
of Codec SENSEA +5V_SPK_AMP +5V_RUN
1 2 1 2

L67

1
A A
C431 1 2
R606 R603 C758 R318 1000P/50V BLM21PG600SN1D
20K/F 39.2K/F 1000P/50V 39.2K/F

1
FB_60ohm+-25%_100MHz

1
C732 C744
_3A_0.05ohm DC

2
1U/10V 10U/10V

2
CC0603 CC0805

2
3

3
39,40 HP2_JD 2 2 MIC1_JD 40 39,40 HP1_JD 2

Q67 Q65 Q45

1
2N7002W-7-F 2N7002W-7-F 2N7002W-7-F
Layout Note:
Place close to pin 8

AZALIA (HD) CODEC


+3.3V_RUN +VDDA

B B
1

C720 C719 C721

1
1U/10V 1U/10V 0.1U/10V C747 C435
CC0603 CC0603 1U/10V 0.1U/10V
2

U46 CC0603

2
1 DVDD_CORE AVDD 25
9 DVDD_CORE AVDD 38
R595 1 2 *100K_NC 40 DVDD
Depop these for 92HD73C 1
C739
2
*1000P/50V_NC SENSEA
SENSE_A 13
34 SENSEB
SENSE_B
ICH_AZ_CODEC_BITCLK 6
+3.3V_RUN 8 ICH_AZ_CODEC_BITCLK HDA_BITCLK
R580 1 2 22 HDA_SDI 8
8 ICH_AZ_CODEC_SDIN0 HDA_SDI
8 ICH_AZ_CODEC_SDOUT 5 HDA_SDO PORT_A_L 39 AUD_HP1_L0 39
8 ICH_AZ_CODEC_SYNC 10 HDA_SYNC PORT_A_R 41 AUD_HP1_R0 39
1

8,29 ICH_AZ_CODEC_RST# 11 HDA_RST# NC/VREFOUT_A 37


R593
1

*10K_NC 21
C722 PORT_B_L
PORT_B_R 22
*10P/50V_NC 28
2

EAPD# VREFOUT_B

PORT_C_L 23
PORT_C_R 24
VREFOUT_C 29
18 NC/CD_L
C
19 NC/CD_GND PORT_D_L 35 AUD_FRONT_L 39,40 C
ICH_AZ_CODEC_BITCLK 20 36
NC/CD_R PORT_D_R AUD_FRONT_R 39,40
VREFOUT_D 32
1

PORT_E_L 14 AUD_MIC_L0 40
R308 15
PORT_E_R AUD_MIC_R0 40
*22_NC 31
GPIO4/VREFOUT_E AUD_MIC1_VREFO 40
16 AUD_HP2_L0 39
2

PORT_F_L
PORT_F_R 17 AUD_HP2_R0 39
GPIO3/VREFOUT_F 30
1

+VDDA
C425
Close to CODEC C711
PORT_G_L 43
*1P/50V_NC DMIC_CLK 2 44 0.1U/16V
35 DMIC_CLK
2

DMIC0/VOL_UP/GPIO1 PORT_G_R CC0603


+3.3V_RUN 3 DMIC1/VOL_DN/GPIO2
PORT_H_L 45 1 2
PORT_H_R 46
C725

5
1U/10V
EAPD# 47 CC0603 R582 10K 1
39 EAPD# DMIC_CLK/GPIO0/SPDIF_IN BEEP 29
48 12 AUD_PC_BEEP AUD_PC_BEEP 1 2 BEEP2 1 2 BEEP1 4
DMIC_CLK SPDIF_OUT_0 PC_BEEP
CAP2 33 2 SPKR 8

1
VREFFILT 27
DMIC_DATA 4 R583
35 DMIC_DATA

3
DVSS1
1

1
7 26 2.2K U41
R584 DVSS2 AVSS1 C752 C753 74LVC1G86GW
AVSS2 42
*22_NC 10U/10V 1U/10V
2

2
92HD73C-C1 CC0805 CC0603
2

D D
1

C717
*1P/50V_NC
QUANTA
2

Title
COMPUTER
AZELIA CODEC (92HD73C)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 38 of 61


1 2 3 4 5 6 7 8
5 4 3 2 1

+5V_SPK_AMP INTERNAL SPEAKER AMP 50


C453 2 1 270P/50V
2.2U/50V/1206 U48

1
C770 1 2 AUD_HP1_L1_L R348 1 2 2.2K AUD_HP1_L1 13 9
38 AUD_HP1_L0 INL OUTL AUD_HP1_L2 40
C764 1 2 AUD_HP1_R1_L R342 1 2 2.2K AUD_HP1_R1 15 11
38 AUD_HP1_R0 INR OUTR AUD_HP1_R2 40
R608 R605 R611 4
100K 100K 100K 2.2U/50V/1206 NC1
2 1 NC2 6
C448 270P/50V 14 8 Layout Note:

2
AUD_SPK_ENABLE# 50 AMP_HP1_SHUD# SHDNR NC3
WOOFER_EN 40 18 SHDNL NC4 12
NC5 16 +3.3V_RUN TPA 4411 : cannot connect EP to GND.
C757 1 2 2.2U/25V CC1206 1 20
D C1P NC6 The reason that we can't solder the pad D
3 C1N SVDD 10

3
PVDD 19 to vdd or ground is because it is
NB_MUTE# 2 2 5 2

GND
GND
GND
GND
GND
29 NB_MUTE# TEST_WOOFER_EN 10 PVSS PGND internally connected to VSS.

1
7 17 C771
Q68 Q69 SVSS SGND 1U/16V

1
2N7002W-7-F 2N7002W-7-F C748 MAX4411ETP+ CC0805

21
22
23
24
25

2
2.2U/25V

3
CC1206

2
EAPD# 2
38 EAPD#
Q66 1
2N7002W-7-F

+3.3V_RUN +3.3V_RUN
C727 +3.3V_RUN C429 +3.3V_RUN
2 1 U44 C728 2 1 U11 C428
TC7SZ08FU(T5L,F,T) 2 1 TC7SZ08FU(T5L,F,T) 2 1
5

5
0.1U/10V 0.1U/10V

5
NB_MUTE# 1 0.1U/10V NB_MUTE# 1 0.1U/10V
4 AMP_HP1_SHUD_L# 1 4 AMP_HP2_EN_L 1
HP1_JD 2 4 AMP_HP1_SHUD# HP2_JD 2 4 AMP_HP2_EN
38,40 HP1_JD 38,40 HP2_JD
EAPD# 2 EAPD# 2
U45 U10
3

3
TC7SZ08FU(T5L,F,T) TC7SZ08FU(T5L,F,T)

3
C C

R331 3.48K/F
1 2
+5V_SPK_AMP
C766 0.1U/10V
1 2
+5V_SPK_AMP
4

C441 C446 U13A


1 2 3 MAX4492AUD+ +5V_SPK_AMP
38,40 AUD_FRONT_L VDD
1 LINE_OUT_L Layout Note:
1

1
0.047U/25V 0.01U/50V 2

1
VSS
R332 MAX9789A/TPA6040A : need to connect
BUFFER_VIAS 1 2 R336 R335 R320
40 BUFFER_VIAS EP (exposed paddle) to GND.
11

*100K_NC 100K 100K


14.7K/F TPA 4411 : cannot connect EP to GND.
2

AUD_AMP_GAIN1 R316 *0_NC


MAX 4411: can connect EP to GND.

2
AUD_AMP_GAIN2 AUD_AMP_MUTE# 1 2 AUDIO_AVDD_ON
1

R347 3.48K/F GAIN1 GAIN2 GAIN


1 2
R334 R325 0 0 6dB R587 *0_NC EMI Reserved
+5V_SPK_AMP 100K *100K_NC 1 2 AUDIO_AVDD_ON
AUDIO_AVDD_ON 29
0 1 10dB R167 1 2 0/0603
2

R313 1 2 0/0603
4

1
C455 C451 U13B 1 0 15.6dB R163 1 2 0/0603
1 2 5 MAX4492AUD+ C729 R312 1 2 0_0805
B 38,40 AUD_FRONT_R VDD B
7 LINE_OUT_R 1 1 21.6dB 0.033U/16V R319 1 2 0/0603

2
0.047U/25V 0.01U/50V 6 VSS For MAX9789A, depop Cap., pop Res. R474 1 2 0/0603
R345 R322 1 2 0/0603
BUFFER_VIAS 1 2
11

14.7K/F
R596 *2.2K_NC

U43
1 2 +VDDA 7/01: Populate according to EMI request!

1
1
LINE_OUT_L C756 1 2 0.033U/50V CC1206 LIN- 3 6 C743 R589
SPKR_INL OUTL+ AUD_SPK_L1 35
LINE_OUT_R C755 1 2 0.033U/50V CC1206 RIN- 2 7 0.033U/16V *0_NC
SPKR_INR OUTL- AUD_SPK_L2 35

2
C751 1 2 2.2U/50V/1206 AUD_HP2_L1_L R598 1 2 2.2K AUD_HP2_L1 27 20 For MAX9789A, depop
38 AUD_HP2_L0 TPA6040A4 OUTR+ AUD_SPK_R1 35

2
HP_INL +5V_SPK_AMP
38 AUD_HP2_R0
C759 1 2 2.2U/50V/1206 AUD_HP2_R1_L R597 1 2 2.2K AUD_HP2_R1 26 HP_INR OUTR- 19 AUD_SPK_R2 35 Cap., pop 0 ohm.
C740 1 2 1U/10V CC0603 24 BIAS
QFN 32PIN HPL 16 AUD_HP2_L2 40
AUD_SPK_ENABLE# 23 15
SPKR_EN# HPR AUD_HP2_R2 40
AMP_HP2_EN 22 HP_EN

1
AUD_AMP_MUTE# 25 4 REGEN C710 C718 C724
AUD_AMP_GAIN1 MUTE# REGEN SET +VDDA 1U/10V 1U/10V 0.1U/10V
31 GAIN1 SET 1
+3.3V_RUN AUD_AMP_GAIN2 32 CC0603 CC0603

2
GAIN2
VOUT 29
17 HPVDD
9 30 +5V_SPK_AMP
CPVDD VDD +5V_SPK_AMP

1
8 C742 C741 Layout Note:
PVDD_8
1

C712 C715 C714 1 2 1U/16V CC0805 10 18 1U/10V 1U/10V


10U/10V 1U/10V C1P PVDD_18 CC0603 CC0603 Place close pin 30.
12

2
CC0805 CC0603 C1N
11 28
2

CPGND GND_28
1

A 5 C726 C723 C716 A


PGND_5 0.1U/10V 1U/10V 10U/10V
14 PVSS PGND_21 21
13 CC0603 CC0805
2

CPVSS
1

33
EMI Reserved C713
1U/16V TPA6040A4
AGND
QUANTA
2

C730 *47P/50V_NC LIN- CC0805


C731
C736
1
1
2
2
2
1
*47P/50V_NC
270P/50V
RIN-
AUD_HP2_L1
Layout Note:
Place close to pin 18.
Layout Note:
Place close TPA6040. Title
COMPUTER
C735 2 1 270P/50V AUD_HP2_R1 AUDIO AMP

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 39 of 61


5 4 3 2 1
1 2 3 4 5 6 7 8

INTERNAL SUBWOOFER AMP L27 BLM18PG121SN1D


1U/10V
C458 CC0603 U14 CN8
AUD_MONO_OUT AUD_SUB_IN+ 1 2 SUB_IN+ 2 11 SUB_OUT+ 1
IN+ OUT+ 1
120ohm, 2A 1 2 SUB_IN- 3 IN- MAX9759 OUT- 10 SUB_OUT- 2 2
+5V_SPK_AMP
SYNC Condition C450 C452 1U/10V
TQFN 16PIN TYC_1775765-2
VDD Spread-spectrum mode with fS = 1200kHz 100P CC0603 1
VDD
2

1
50 C763 C423 C422
R339 GND ±70kHz.
Fixed-frequency mode with fS = 1100kHz. NPO R344 100K 0.1U/10V *100P_NC *100P_NC
100K +5V_SPK_AMP 1 2 5 4 50 50

2
SHDN# GND +5V_SPK_AMP NPO NPO
FLOAT Fixed-frequency mode with fS = 1500kHz. SUB_MUTE#
+5V_SPK_AMP 1 2 8
1

A
SYNC R327 100K MUTE# A
Clocked Fixed-frequency mode with fS = external clock frequency. PVDD 9

1
C760
2

2 0.1U/10V
39 WOOFER_EN
R350 SYNC 7 6

2
SYNC PGND

1
*100K_NC Q70 13 C769

1
2N7002W-7-F SYNC_OUT 10U/10V
AUD_SUB_GAIN1 16 12 CC0805
1

2
G1 PVDD

1
AUD_SUB_GAIN2 15 C765
G2 0.1U/10V
17 14

2
Exposed Paddle PGND
MAX9759ETE+
+5V_SPK_AMP
2

R609 +5V_SPK_AMP
100K GAIN1 GAIN2 GAIN
0 0 24dB

2
+5V_SPK_AMP
1

BUFFER_VIAS +5V_SPK_AMP R338 R346


BUFFER_VIAS 39
BUFFER_VIAS *100K_NC 100K
0 1 18dB
2

4
BUFFER_VIAS U13C U13D 1 0 12dB
2

4
R610 C768 C443 0.47U/6.3V R324 10K/F MAX4492AUD+ 12 MAX4492AUD+

1
VDD
100K 1 2 1 2 10 R349 C444 C445 14 AUD_MONO_OUT AUD_SUB_GAIN1 1 1 6dB
38,39 AUD_FRONT_L VDD
2.2U/10V R329 8 1 2 13 AUD_SUB_GAIN2
1

VSS
CC0805 1 2 1 2 1 2 9
38,39 AUD_FRONT_R
1

2
VSS
10K/F 0.033U/16V 0.068U/16V

11
C437 0.47U/6.3V R323 10K/F 11.8K/F R337 R343

11
B R328 100K *100K_NC B
C436 1 20K/F
C454 0.01U/50V R333 100K/F

1
0.068U/16V 1 2 1 2
2

R330 4.99K/F R326 11.3K/F


2 1 1 2

Ambient Parts of Headphone & MIC Jack To IB(IO Board) connector


CN5

AUD_HP1_L2 34 32
39 AUD_HP1_L2
31 PCH_USBP0- 9
AUD_HP1_R2 30
39 AUD_HP1_R2 PCH_USBP0+ 9
29
28 PCH_USBP1- 9
27 PCH_USBP1+ 9 Two USB ports
26 & WWAN LED
25 WWAN_LED 36
24
23
22 +USB_LEFT_PWR
21
C
20 C
AUD_HP2_L2 19
39 AUD_HP2_L2 WLAN_LED 36
18 BT_LED 36 Front Side LED
AUD_HP2_R2 17
39 AUD_HP2_R2 HDD_LED 36
16
15
14
13 AUD_HP1_L2
12 AUD_HP1_R2
11 HP1_JD
10
C430 9 AUD_HP2_L2 Audio Jack
1U/10V 8 AUD_HP2_R2
CC0603 7 HP2_JD
38 AUD_MIC1_VREFO 1 2 6
5 AUD_MIC_L1
1

4 AUD_MIC_R1
R309 R305 3 MIC1_JD
C427 4.7K 4.7K 2
2.2U/10V 33 1
CC0805
2

1 2 AUD_MIC_L1
38 AUD_MIC_L0
FOX_GB5RF321-1203-8F
1 2 AUD_MIC_R1 gb5rf341-1203-7f-32p-l
38 AUD_MIC_R0
C424 Scott_0123:Change CN5 PN with DFHD32MR003 (FOX).
2.2U/10V
CC0805

+3.3V_RUN
D D
1

R602 R586 R585 Adding additional AGND QUANTA


100K 100K 100K
CN4 COMPUTER
2

HP1_JD 1 Title
HP1_JD 38,39 1
HP2_JD 2 IB CONN & SUBWOOFER
HP2_JD 38,39 2
MIC1_JD
MIC1_JD 38
MLX_53780-0270 Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 40 of 61


1 2 3 4 5 6 7 8
5 4 3 2 1

Core Power Decoupling


+1.2V_LOM

T56
C37 C34 C31 C43 C42 C50 C44 C38 C40 PAD
4.7U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U +3.3V_LAN
10 10 10 10 10 10 10 10 10
X5R X7R X7R X7R X7R X7R X7R X7R X7R
805

15
19
56
61

68
6
U26
VDDP Power Decoupling +1.2V_LOM +1.2V_VDDC_IO

DC/VDDP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
+3.3V_LAN
L46 BLM18AG601SN1D
+1.2V_VDDC_IO 36 LAN_BIASVDDH 1 2
BIASVDDH C511 0.1U/10V
5 VDDC_IO/VDDC
D 55 VDDC_IO/VDDC D
C35 C518 13 L7 BLM18AG601SN1D
0.1U 0.1U VDDC LAN_XTALVDDH
20 VDDC XTALVDDH 23 1 2
10 10 34 C41 0.1U/10V
X7R X7R VDDC
60 VDDC
45 +LAN_AVDDL
AVDDL/AVDDH L8
BLM18AG601SN1D
38 +LAN_AVDDH 1 2
DC/AVDDH
VDDIO Power Decoupling
+3.3V_LAN +1.2V_LOM 52

C45 C39 C56 C36


L5
BLM18AG601SN1D
+LAN_AVDDL
BCM5784M DC/AVDDH

1 2 39 AVDDL 10mm x 10mm


4.7U 0.1U 0.1U 0.1U 51 AVDDL
10 10 10 10 C30 4.7U/10V/0805 C24 0.1U/10V 68-Pin QFN 49
TRD3_N TRD3- 42
X5R X7R X7R X7R 50
TRD3_P TRD3+ 42
805
L4 48 +LAN_AVDDH C26 0.1U/10V
BLM18AG601SN1D AVDDH/TRD2_N
TRD2_N/TRD2_P 47 TRD2- 42
1 2 +LAN_GPHYPLLVDDL 35 46 Place one cap close
GPHY_PLLVDDL TRD2_P/AVDDL TRD2+ 42
C23 4.7U/10V/0805 C28 0.1U/10V
42, 48 respectively.
R406 2 1 200/F LAN_XTALO 42 +LAN_AVDDH C27 0.1U/10V
L47 AVDDH/TRD1_N
TRD1_N/TRD1_P 43 TRD1- 42
Y1 BLM18AG601SN1D 44
TRD1_P/AVDDL TRD1+ 42
1 2 LAN_XTALI 1 2 +LAN_PCIEPLLVDDL 30 PCIE_PLLVDDL
TRD0_N 41 TRD0- 42
C516 C517 C512 4.7U/10V/0805 C513 0.1U/10V 40
TRD0_P TRD0+ 42
27P 27P
50 25MHz 50 2
LINKLED# LINKLED# 42
NPO NPO L6 1
SPD100LED# SPD100LED# 42
BLM18AG601SN1D 27 67
PCIE_PLLVDDL SPD1000LED# SPD1000LED# 42
1 2 +LAN_PCIESDSVDDL 33 66
PCIE_VDDL TRAFFICLED# IO_LOM_ACTLED_YEL# 42

C C29 4.7U/10V/0805 24 8 LAN_GPIO T57 PAD C


C33 0.1U/10V PCIE_VDDL/GND GPIO2
R1208 & R1210: Stuff
+3.3V_LAN
only if U86 is installed +3.3V_LAN
UART_MODE 9
7 BCM_WP
C514 1 GPIO1_SERIALDI
9 PCIE_RX6+/GLAN_RX+ 2 0.1U 10 LAN_PCIETXDP 26 PCIE_TXD_P GPIO0_SERIALDO 4

1
C515 1 2 0.1U 10 LAN_PCIETXDN 25
9 PCIE_RX6-/GLAN_RX- PCIE_TXD_N
31 C528
9 PCIE_TX6+/GLAN_TX+ PCIE_RXD_P
32 R411 R407 R409 0.1U
9 PCIE_TX6-/GLAN_TX- PCIE_RXD_N
12 4.7K *4.7K_NC 4.7K U27 10
7,28 PCIE_WAKE# WAKE#
10 8 1 X7R BCM_SCL R410 4.7K
3,9,16,26,28,29,31,32,56 PLTRST#

2
PERST# BCM_SCL VCC A0
9 CLK_PCIE_LOM 29 PCIE_REFCLK_P SCLK_EECLK 65 7 NC A1 2
28 63 SI 6 3 SI R40 4.7K
9 CLK_PCIE_LOM# PCIE_REFCLK_N SI SCL A2
64 BCM_SDA 5 4
SO_EEDATA CS# SDA VSS CS# R39 4.7K
CS# 62
24LC02BT-I/STG

+3.3V_LAN T5 T6 T58
PAD PAD PAD
ENERGY_DET 59
+3.3V_RUN +3.3V_LAN
1

LAN_DISABLE
R404 R405 R403 1K 54
4.7K 4.7K
is hign active R401 1K VAUX_PRSNT
53 VMAIN_PRSNT
LAN_DISABLE 3 +1.2V_VDDC_IO
29 LAN_DISABLE LOW_PWR
2

58 TEST1/SMB_CLK VDDC_IO/VDDP 17
57 TEST2/SMB_DATA
LAN_XTALO 22 18
LAN_XTALI XTALO REGOUT12_IO/REGCTL25
21 XTALI
R400
LAN_RDAC 37 +3.3V_LAN
RDAC R42
1.24K/F 2 1
B C65 C49 B
1/F 0.1U 4.7U
10 10

3
Make sure it +3.3V_LAN X7R X5R
Q16 805
stays high when LAN_REGCTL12 PBSS5350Z
REGCTL12 14 1
2

not driven by
BCM5784M. R408 +1.2V_LOM
*4.7K_NC

2
4
C52 C58
1

11 Package Body SUPER_IDDQ don't 0.1U 10U


9 LOMCLK_REQ# CLK_REQ# 10 10
work, to GND directly. X7R X7R
GND

16 805
SUPER_IDDQ/GND
BCM5784MA0KMLG
69

Note:thermal pad

A A

QUANTA
Title
COMPUTER
LAN (BCM5784M)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 41 of 61


5 4 3 2 1
A B C D E

TRD0+ Reserved EMI


TRANSFORMER TRD0-
TRD1+
TRD1-

1
Layout Note: C18 C17 C22 C21
*1P/50V_NC *1P/50V_NC *1P/50V_NC *1P/50V_NC
Route TRD+/- pairs with 100 ohm

2
differential trace immpedance.
4 4
L45 TRD2+
24 RJ45-TX3+ TRD2-
CHIP SIDE MEDIA SIDE TX0+
TRD3+ 1 TRD3+
41 TRD3+ TD0+
23 RJ45-TX3- TRD3-
TRD3- TX0-
41 TRD3- 2 TD0-
22 TXCT3 R9 1 2 75/F
TXCT0

1
TDCT 3 C12 C11 C16 C15
TDCT0 1:1 TXCT2 R10
TXCT1 21 1 2 75/F *1P/50V_NC *1P/50V_NC *1P/50V_NC *1P/50V_NC
TDCT 4

2
TDCT1 RJ45-TX2+
TX1+ 20
TRD2+ 5
41 TRD2+ TD1+
19 RJ45-TX2-
TRD2- TX1-
41 TRD2- 6 TD1- 1:1 18 RJ45-TX1+
TRD1+ TX2+
41 TRD1+ 7 TD2+
17 RJ45-TX1-
TRD1- TX2-
41 TRD1- 8 TD2-
16 TXCT1 R11 1 2 75/F GND_LAN
TDCT TXCT2
9 TDCT2 1:1 15 TXCT0 R12 1 2 75/F
TDCT TXCT3
10 TDCT3
14 RJ45-TX0+
TX3+

1
TRD0+ 11 C510
41 TRD0+ TD3+
13 RJ45-TX0- 1000P/3K
TRD0- TX3- CC1808
41 TRD0- 12

2
TD3- 1:1
TDK TLA-7T203LF-T
1

1
C14 C13 C19 C20
Pace 0.1u physically 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V
3 Scott_0729:Change L45 PN to DB0RM5LAN00(TDK) 3
2

close to transformer

RJ-45 Connector +3.3V_SUS

R1 330 CN15

2
41 IO_LOM_ACTLED_YEL# 1 2 10 LED_YN Y
R41
+3.3V_LAN 9 LED_YP 0_0805

+3.3V_LAN RJ45-TX3- 8

1
RJ45-TX3+ 8
7 7 +3.3V_LAN
RJ45-TX1- 6 6
1

RJ45-TX2- 5
Q7 RJ45-TX2+ 5
4 4
DDTA114YUA-7-F RJ45-TX1+ 3
D5 47K 3
RJ45-TX0- 2
RJ45-TX0+ 2
41 SPD100LED# 1 2 2 1 1
10K
12 LED_GND
SDMK0340L-7-F
3

2 O G 2
+3.3V_LAN
1 2 R14 330 11 LED_GP/AN
13 LED_GN/AP
CHSGND1
CHSGND2
CHSGND3
CHSGND4

R38 4.7K
D4 SDMK0340L-7-F
41 SPD1000LED#
1 2 +3.3V_LAN
1

14
15
16
17

D7 SDMK0340L-7-F Q8
DDTA114YUA-7-F
D6 47K

41 LINKLED# 1 2 2
10K
SDMK0340L-7-F TYC_2006250-1
rj45-2006250-13p-v-rm2
3

R15 330

1 1

QUANTA
Title
COMPUTER
LAN SWITCH

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 42 of 61


A B C D E
1 2 3 4 5 6 7 8

A A

+3.3V_SUS

C432
0.1U

5
50 VR_PWRGD_CLKEN# 2 4 R321 0
CK_PWRGD_R 15
U12
TC7SZ04FU(T5L,F,T)

3
B B
+3.3V_ALW

14
U54A
46 1.8V_PWRGD 1
3
3,48 1.1V_VTT_PWRGD 2
U54C
SN74AHC08PW 9
8
10
U54B
52 GFX_CORE_PWRGD 4 SN74AHC08PW
6
53 1.12V_PWRGD 5

SN74AHC08PW

U54D
12
11 HWPG 29
49 1.05V_PWRGD 13

SN74AHC08PW

C C

+3.3V_ALW

U52
74AHC1G08GW
5

47 1.5V_SUS_PWRGD 2
4 RUN_ON 18,24,46,47,48,49,54
29 RUN_ON_1 1
3

R645 1 2 *0_NC

R646 *10K_NC
D 1 2 RUN_ON D
R644 *10K_NC
1 2 RUN_ON_1

QUANTA
Title
COMPUTER
System Reset Circuit

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 43 of 61


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

H-C276D118P2-8 * 7
H2 H8 H13 H1 H30 H31 H22
H-C276D118P2-8 H-C276D118P2-8 H-C276D118P2-8 H-C276D118P2-8 H-C276D118P2-8 H-C276D118P2-8 H-C276D118P2-8 PV1 PV5 PV6
6 7 6 7 6 7 6 7 6 7 6 7 6 7 HYH_RHC-CP-27G03 HYH_RHC-CP-27G03 HYH_RHC-CP-27G03
5 8 5 8 5 8 5 8 5 8 5 8 5 8
4 9 4 9 4 9 4 9 4 9 4 9 4 9

GND

GND

GND
3
2
1

3
2
1

3
2
1

3
2
1

3
2
1

3
2
1

3
2
1

1
A A
H-C236D118P2-8 * 3
H14 H10 H20
H-C236D118P2-8 H-C236D118P2-8 H-C236D118P2-8
6 7 6 7 6 7
5 8 5 8 5 8
4 9 4 9 4 9 Scott_0701:: Added PV6 according to EMI's suggestion
3
2
1

3
2
1

3
2
1
R6921 2 *0_NC
h-c236d197p2 * 1 H-C236D158P2 * 4 R6931 2 *0_NC
R6941 2 *0_NC
H12 H5 H4 H3 H6 R6951 2 *0_NC
h-c236d157p2 H-C236D157P2 H-C236D158P2 H-C236D158P2 H-C236D158P2 R6961 2 *0_NC
R6971 2 *0_NC
R6981 2 *0_NC
R6991 2 *0_NC
1

1
H24
H-T295X280B236D118P2 * 1 hg-c276i118d118p2 * 2 o-rm2-1 Scott_0703:Add 8pcs 0ohm resistors R692~R699 for thermal issue as EMI concern.
H26 H25 H19 Scott_0707: Reserver R692~R699.
H-T295X280B236D118P2 hg-c276i118d118p2 hg-c276i118d118p2
B 6 7 6 7 B
5 8 5 8

1
4 9 4 9
1

3
2
1

3
2
1

h-c236d157p2 * 2
H17 H11
h-c236d157p2 h-c236d157p2
1

h-c394d260p2 * 1 H-C394D260P2-8 * 1
H18 H7
hg-c394d217p2 h-o390x350d256x217p2
6 7
5 8
4 9 Scott_0731: change H7 & H18 footprint as ME change
Scott_0812:Delete H7 Pin2~Pin9 for layout requite.
3
2
1

C C

h-c236d236n * 2
H29
h-c236d236n
1

H-C197D118P2-8 * 1
H28
H-C197D118P2-8
6 7
5 8
4 9
3
2
1

H-C197D91P2-8 * 1 h-o205x157d138x91p2 * 1
D D
H9 H27
H-C197D91P2-8 h-o205x157d138x91p2
6 7
5
4
8
9
QUANTA
COMPUTER
3
2
1

Title
PAD & SCREW & SPRING

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 44 of 61


1 2 3 4 5 6 7 8
A B C D E

1 1

PQ40 PQ29
SI4835DDY-T1-E3 PR128 +PWR_SRC SI4835DDY-T1-E3 FL1
0.01/3720
8 1 1 8 HI1206T161R-10
+DC_IN_SS 7 2 1 1 2 2 2 7
6 3 3 3 4 4 3 6
5 5 FL2

PC215 PC216 *HI1206T161R-10_NC

4
PR134 PR121 4700P/25V 0.01U/25V +DC_IN_SS
10K 100K
PC135
0.1U/50V/0603
PR21
470K

3
FL5
2 HI1206T161R-10
PQ17
1 2N7002W-7-F

8731CSSN
8731CSSP
2 8731LDO 2
CHG_PWR_SRC

2
+DC_IN_SS
PD1
SDM10K45-7-F
PR36 PC148 PC151 PC149 PC150 PC43 PC44
365K/F PC60 2200P/50V 0.1U/50V/0603 2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206

1
1U/25V/0805

28

27
1
8731BST

GND

CSSP

CSSN
8731LDO PR37 49.9K/F 22 PC67 1U/10V/0603
DCIN 8731LDO PC50
0.1U/50V/0603
8731_ACIN 2 25
ACIN BST

5
6
7
8
PR42 PR33 PQ10 FL3 *HI1206T161R-10_NC
10K/F PC66 0.01U/25V 33/F/0603 FDS8884
LDO 21 4
13 PR110 +VCHGR
29 ACAV_IN ACOK
26 PC36 PL8 0.01/3720
VCC 3300P/50V MPLC0730L4R7 5.6A/41mOhm) FL4 HI1206T161R-10
+3.3V_ALW 11

1
2
3
VDD 8731DHI PC57 1U/10V/0603
DHI 24 2 1 1 1 2 2 +VCHGR 55
PR45 3 4
3 4

5
6
7
8
15.8K/F 23 8731LX PQ11
PC81 0.1U/50V/0603 LX PR34 1/0603 FDS8884 PC146 PC145 PC144 PC32 PC138 PC139 PC143
10 20 8731DLO 4 PR32
29,37,55 SMBCLK0 SCL DLO

3300P/50V

1000P/50V

2200P/50V

0.1U/50V/0603

10U/25V/1206

10U/25V/1206

10U/25V/1206
9 2.2/0805
29,37,55 SMBDAT0 SDA
14 BATSEL PGND 19

1
2
3
8731_IINP 8 18
29 IINP IINP CSIP PC35
3 3
17 1000P/50V
CSIN
6 CCV
8731CSIP
5 15 +VCHGR
CCI FBSA 8731CSIN
PR41 16 PR39
10K/F FBSB 100
4 CCS PC54
GND
DAC

3 220P/50V
REF
MAX8731AETI+
7

12

PR44 PC79 PC73 PC71 PC70 8731REF PU4 Frequency(Vadapter-Vbattery>5V) 400K


8.45K/F 0.1U/10V 0.01U/25V 0.01U/25V 0.01U/25V
PC68 PC76
1U/10V 0.1U/10V
PR38
2 2 1 1

GND_CHG Jump20X10

4 4

QUANTA
Title
COMPUTER
CHARGER (MAX8731A)
Size Document Number Rev
RM3 3A

Date: Sheet 45 of 61
A B C D E

2005/4/21
5 4 3 2 1

D D

Loki_0701: Remove all power jumpers

+PWR_SRC

+5V_SUS

PC116 PC114 PC12

2200P/50V

0.1U/50V/0603

10U/25V/1206
TDC : 2.7A
PC115
1U/10V/0603
Peak: 3.9A
+1.8V_RUN
PU2
OCP: 4.3A
7 10 PQ2
V5IN VBST PC8 0.1U/50V/0603
PR2 84.5K/F 2 9 +1.8V_DH 1 D1 G1 8
TRIP DRVH PL2 3.3u_6.5A_30mOhm_MPLC0730L3R3
3 8 +1.8V_LX 2 S1D2 7 Loki_0701: Remove all power jumpers
18,24,43,47,48,49,54 RUN_ON EN SW
+1.8V_VFB 4 1 G2
VFB PGOOD 1.8V_PWRGD 43 3 6

C 5 6 +1.8V_DL 4 S2 5 C
RF DRVL
PC110 11 SI4914DY-T1-E3
*0.1U_NC PR6 GND PR7
470K TPS51218_DCSR PR16 15.8K/F + PC119 PC120

220U/2.5V/ESR15
PR11 PR15 *2.2_NC PC2 0.1U
100K *422K/F_NC 100P/50V 50
50 0603
PC13 +1.8V_VFB
*2200p/50V_NC
VFB=0.704V
PR83
+3.3V_SUS 10K/F
Frequency(PR6=470K) 300K

B B

A A

Title
+1.8V_RUN(TPS51218)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 46 of 61


5 4 3 2 1
5 4 3 2 1

D D

+PWR_SRC

+1.5V_SUS

25
PC65 PC61 PC51 PC48 PC40

2200P/50V

0.1U/50V/0603

10U/25V/1206

10U/25V/1206

*10U/25V/1206_NC
PC173 PC174 1 24

GND
VTTGND VTT
TDC : 0.7A 10U/4V/0805 10U/4V/0805
PC168

5
6
7
8
9

5
6
7
8
9
2 23 10U/4V/0805 PQ16
+0.75V_DDR_VTT VTTSNS VLDOIN NTMFS4943NT1G
4 4
DDR_VBST PC163 0.1U/50V/0603
3 GND VBST 22
PQ15 TDC : 21.5A
*NTMFS4943NT1G_NC
Peak: 30.7A

1
2
3

1
2
3
4 21 +1.5V_DH
MODE DRVH
PL10 MPC1040LR45C (0.45UH/25A/1.1mOhm)
OCP: 33.7A
+DDR_VTTREF 5 20 +1.5V_LX
VTTREF LL +1.5V_SUS
1

PC105 +5V_ALW 6 19 +1.5V_DL


0.033U COMP DRVL PR118

5
6
7
8
9

5
6
7
8
9
0603 2 + +
2

25 7 18 PC45 PC49 PC152


NC PGND

0.1U/50V/0603

330U/2.5V/ESR15

330U/2.5V/ESR15
PC94 *0.1U_NC 4 4
C C
8 17 PQ36 PC159
VDDQSNS CS_GND NTMFS4935NT1G 2200P/50V

1
2
3

1
2
3
PQ39
+5V_ALW PR131 *0_NC 9 16 DDR_CS PR119 6.8K/F NTMFS4935NT1G
VDDQSET CS

18,24,43,46,48,49,54 RUN_ON 10 S3 V5IN 15

11 14 DDR_V5FILT PR120 5.1 +5V_ALW


29,54 SUS_ON S5 V5FILT 0603

12 13 PR124 100K +3.3V_SUS PC162 PC160


NC PGOOD 1U/10V/0603 1U/10V/0603
PU10 1.5V_SUS_PWRGD 43
TPS51116REGR

PC97 PR133
*18P_NC 76.8K/F
(Note 1) Current Limiting Setting :
VDDQSET=0.75V Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)

PR132
B 75K/F Frequency(Fixed) 400K B

A A

Title
+1.5V_SUS/+0.75V_VTT(TPS51218)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 47 of 61


5 4 3 2 1
5 4 3 2 1

D D

+PWR_SRC

TDC : 12.6A
+5V_SUS PC157 PC158 PC78 PC72
Peak: 18.1A
+1.1V_VTT
OCP: 19.9A

2200P/50V

0.1U/50V/0603

10U/25V/1206

10U/25V/1206
5
6
7
8
PQ38
FDS6298
PC84 4
1U/10V/0603

PU7 0603

1
2
3
7 10 PR58 2.2/0603
V5IN VBST PC86 0.1U/50V/0603
PR135 110K 2 9 +1.1V_VTT_DH
TRIP DRVH PL9 0.88uH_MPC1040LR88
C 3 8 +1.1V_VTT_LX C
18,24,43,46,47,49,54 RUN_ON EN SW
+1.1V_VTT_VFB 4 1
VFB PGOOD 1.1V_VTT_PWRGD 3,43
5 6 +1.1V_VTT_DL
RF DRVL

5
6
7
8
9
PC103 PR40
*0.1U_NC 11 2
GND 0805 + +
4
PR64 TPS51218_DCSR PR65 PR62 PC102 PC38 PC147 PC39

330U/2.5V/ESR15

330U/2.5V/ESR15
470K 100K *422K/F_NC PR70 *1500P_NC 0.1U
10.2K/F 50 50

1
2
3
PC80
2200P/50V +1.1V_VTT_VFB 0603
PQ37 50 VFB=0.704V
FDMS8672S
+3.3V_SUS PR71
20K/F

Frequency(PR64=470K) 300K PR68


PR66 *0_NC
137K/F

3
VTT_SENSE 5
PR67
100K
+3.3V_SUS 2 PQ19
B B
VTT_SELECT: BSS138-7-F
High level 1.05V for Auburndale PR180
Low level 1.1V for Clarksfield *10K_NC

1
PR179

3
2.2K PC101
5 H_VTTVID1 2 PQ43 0.01U
UMT3904
16

1
PR178 PC214
*0.01U_NC
100K
25

A A

Title
+1.1V_VTT(TPS51218)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 48 of 61


5 4 3 2 1
5 4 3 2 1

D D

Loki_0701: Remove all power jumpers

+PWR_SRC

+5V_SUS

PC129 PC128 PC127

2200P/50V

0.1U/50V/0603

10U/25V/1206
5
6
7
8
PC131 4
TDC : 4.8A
+1.05V_PCH
C
1U/10V/0603
PQ27
Peak: 6.8A C
PU9 FDS8884 OCP: 7.5A

1
2
3
7 V5IN VBST 10
PC134 0.1U/50V/0603
PR105 120K/F 2 9 +1.05V_DH
TRIP DRVH PL4 2.2UH_8.2A(MPLC0730L2R2) Loki_0701: Remove all power jumpers
3 8 +1.05V_LX
18,24,43,46,47,48,54 RUN_ON EN SW
+1.05V_VFB 4 1
VFB PGOOD 1.05V_PWRGD 43
5 6 +1.05V_DL
RF DRVL

5
6
7
8
PC133 11 PR99
*0.1U_NC PR101 GND 1 PR103
4
470K TPS51218_DCSR 10.2K/F + PC136 PC137

220U/2.5V/ESR15
PQ28 PC132 0.1U
FDS6690AS *1500P_NC 50

1
2
3
50 0603
PR106 PR100 PC130 +1.05V_VFB
100K *422K/F_NC 1000P/50V
VFB=0.704V
PR102
20K/F
Frequency(PR101=470K) 300K +3.3V_SUS

B B

A A

Title
+1.05V_PCH(TPS51218)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 49 of 61


5 4 3 2 1
5 4 3 2 1

+VCC_CORE ( MAX17036GTL+ ) +PWR_SRC


Loki_0813: De-pop PC171, PC169 and PC156 because
acoutic noise is passed

1
+ + + +
+5V_RUN PC171 PC169 PC161 PC156
*27U_25V_NC *27U_25V_NC 100U/25V *27U_25V_NC

2
PR57
10/0603

PC59 PC53 PC64 PC56 45W CPU

5
6
7
8
9
PC92 PC74
PQ14
NTMFS4943NT1G
2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206 TDC : 40A
D D
2.2U/6.3V/0603 2.2U/6.3V/0603 4 Peak: 52A

26
OCP :57A

7
PR59 PR56
133K/F 8.66K/F

VCC

VDD

1
2
3
6 28 UG1 PL7
TIME DH1 0.36UH (ETQP4LR36AFC)
Loki_0813: change PR56 from 7.5K to 8.66K for component PR43
tolerance and OCP up to 65A 2.2/0603 PH1 2 1 +VCC_CORE
5 ILIM BST1 30

3
PC75 PR113
PR49 0.22U/25V/0603 2

5
6
7
8
9

5
6
7
8
9
200K/F 29 PQ35 0805
LX1 NTMFS4935NT1G PR30
+PWR_SRC 16 TON
4 4 2.61K/F PC37 + + PC27
0.1U/50V/0603 PC28 *330U/2V/E9/7343_NC
27 LG1 PC153 PR31 PR24 330U/2V/E9/7343
DL1 2200P/50V 4.53K/F 10K/NTC/0603

1
2
3

1
2
3
50
32 PC91
5 VID0 D0
33 *1000P/50V_NC
5 VID1 D1
5 VID2 34 D2
5 VID3 35 D3 PQ34
36 39 CSP1 *NTMFS4935NT1G_NC
5 VID4 D4 CSP1
5 VID5 37 D5
38 PR125
5 VID6 D6
2.2/0603
PC164
29 IMVP_VR_ON 13 SHDN 0.22U/25V/0603
40 CSN1
CSN1
+PWR_SRC
PR51
499/F *1000P/50V_NC
14 PC90
5 DPRSLPVR DPRSLPVR
C C
PC208 PC213 PC320

100U/25V

100U/25V
+ + +

*100U/25V_NC
DH2 23

5
6
7
8
9
PQ13 PC47 PC46 PC55 PC63
PR46 NTMFS4943NT1G 2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206
2.2/0603 UG2 4
BST2 21
5 H_PSI# 15 PSI
+3.3V_RUN

1
2
3
10K PC77 PL6
PR116 18 22 0.22U25V/0603 0.36UH (ETQP4LR36AFC)
29 IMVP_PWRGD PWRGD LX2
PH2 2 1 +VCC_CORE
PR61 24

3
13K/F DL2 PR112
+5V_RUN 3 2
THRM

5
6
7
8
9

5
6
7
8
9
PC85 PQ33 0805
+3.3V_RUN *1000P/50V_NC NTMFS4935NT1G
Loki_0813: change pull up resistor from 68R to 499R LG2 4 4 PR28
and connect to 3.3V_RUN from 1.1V_VTT, align with FM9 PR60 2.61K/F PC41 + + PC142
*NTC_100K_NC 12 CSP2 PC155 0.1U/50V/0603 PC29 330U/2V/E9/7343
CSP2 2200P/50V PR29 PR23 *330U/2V/E9/7343_NC

1
2
3

1
2
3
PR114 PR54 50 4.53K/F 10K/NTC/0603
499/F 2.2/0603

29 IMVP6_PROCHOT# 25 PC93 PQ32


VRHOT 0.22U/25V/0603 CSN2 *NTMFS4935NT1G_NC
CSN2 11
PR123
1K/F PC95
5 I_MON 4 1000P/50V
IMON *1000P/50V_NC
PC87
PC167 10
GNDS VSSSENSE 5
0.027U/25V PR122
16.5K/F 10
VSSSENSE PC166 PR127
B B
PR55 *1000P/50V_NC PR130
Loki_0813: change PR122 from 14.7K to 16.5K and 6.49K/F 10
PC167 from 0.1u/0402 to 0.027u/0603 for Imon PR117 9
transient test FBAC VCCSENSE 5
1.91K/F
+3.3V_RUN
+PWR_SRC
17 1000P/50V
CLKEN PC96
43 VR_PWRGD_CLKEN# FB 8

PR47
1K +5V_RUN
+3.3V_RUN 20
PWM3

5
6
7
8
9
PR52 PQ12 PC58 PC52 PC69 PC62
2.2/0603 NTMFS4943NT1G 2200P/50V 0.1U/50V/0603 10U/25V/1206 10U/25V/1206
4
31 PC83
PGD_IN
DRVSKP 19 1U/10V/0603 PU6 PC82
1
2
3
5 VDD BST 1 0.22U/25V/0603
PL5
17030_PWM3 2 8 UG3 0.36UH (ETQP4LR36AFC)
PR48 17030_SKIP# PWM DH
6 SKIP
100K 7 PH3 2 1 +VCC_CORE
PC88 LX
3 GND
*1000P/50V_NC 9 4 LG3

3
PAD DL PR111
MAX8791GTA+ 2
5
6
7
8
9

5
6
7
8
9
2 PQ31 0805
CSP3 NTMFS4935NT1G
4 4 PR25
PR126 2.61K/F PC42 + + PC141
PU5 MAX17036GTL+ 2.2/0603 PC154 0.1U/50V/0603 330U/2V/E9/7343
2200P/50V PR26 PR22 PC140
1
2
3

1
2
3

PC165 50 4.53K/F 10K/NTC/0603 *330U/2V/E9/7343_NC


0.22U/25V/0603
A A
PQ30
1 *NTMFS4935NT1G_NC
CSN3
EP

CSP3
41

*1000P/50V_NC CSN3
SJ1 PC89
2 2 1 1

Title
AGND_VCORE +VCC_CORE(MAX17030)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 50 of 61


5 4 3 2 1
5 4 3 2 1

D D
+PWR_SRC

1
+5V_ALW2 PR160 +5V_VCC1 PC185 PC188 PC186
PC179 PC178 PC180 PD8 10/0603

10U/25V/1206

0.1U/50V/0603

2200P/50V

0.1U/50V/0603

2200P/50V

10U/25V/1206
PR153 UDZSTE-175.6B
*0_NC PC187

2
4.7U/25V/0805
PR163
*0_NC
PR154
68K
PC192 PC196
TDC : 7.7A

ISL6237_ONLOD

1U/10V/0603
PC190

0.1U/10V
ISL6237_ONLOD 0.1U/50V/0603
PC191
PR165
*0_NC PR167
Peak: 11A
1U/6.3V *0_NC OCP: 12.1A

5
6
7
8
PR155
200K/F +3.3V_ALW
PR164 PQ48
TDC : 4.9A PQ44
4
FDS8884
*0_NC

8
7
6
5
Peak: 7.0A FDS8884

42
8
7
6
5
4
3
2
1

1
2
3
OCP: 7.7A 4 +5V_DH 41 PL13

PAD
LDOREFIN

VIN
RTC

VCC
TON
LDO

ONLDO

REF
PAD SIL1045R-3R3A (8A/21mOhm)
40 PAD
39 +3.3V_LX
+5V_ALW PAD PR162
38

3
2
1
PAD 475K/F
9 BYP REFIN2 32
PL12 10 31
SIL1045R-3R3A (8A/21mOhm) OUT1 ILIM2
11 FB1 OUT2 30
+5V_LX 12 PU11 29 PR157
ILIM1 SKIP#

5
6
7
8
C PR149 287K/F POK1 POK2 *2.2/F/0603_NC C
13 PGOOD1 MAX17020ETJ+ PGOOD2 28
+5V_EN1 14 27 +3.3V_EN2 + PC181
ON1 ON2 +3.3V_DH PC182 220U/6.3V/ESR25
15 DH1 DH2 26 4
16 25 0.1U/50V/0603
LX1 LX2
8
7
6
5

PR142 37
+ PC177 PC176 *2.2/F/0603_NC PC184 PAD
36

SECFB

1
2
3
PAD

AGND
PGND
220U/6.3V/ESR25

0.1U/50V/0603

+5V_DL 0.1U/50V/0603 PC193

BST1

BST2
4

VDD
PAD
PAD
PAD

DL1

DL2
PC195 PQ45 *2200P/50V_NC
0.1U/50V/0603 FDS6690AS
PQ47 PR159
3
2
1

35
34
33

17
18
19
20
21
22
23
24
PC183 FDS6690AS PR152 1/0603
*2200P/50V_NC 1/0603
+3.3V_DL
PR151
*0_NC
+5V_ALW2 PR156
2 2 1 1

PC189
1U/10V/0603 Jump20X10

+3.3V_ALW +3.3V_ALW

PD9
1 PC198 PR148 PR161
0.1U/50V/0603 100K 100K
BAT54S-7-F 3

2
PC199 POK2
+15V_ALW PC200 0.1U/50V/0603
B PQ52 0.1U/50V/0603 PD10 POK1 B
1
DDTA114YUA-7-F
BAT54S-7-F 3

3 1 +15V_ALWP 2
47K
10K

PC201
2

0.1U/50V/0603
3

2 PQ51
2N7002W-7-F TON Frequency
1

GND OUT1@400K , OUT2@500K

VCC OUT1@200K , OUT2@300K

+3.3V_ADM1032A
OPEN OUT1@400K , OUT2@300K

PU 10K at Page 22 (GPU


2

PQ46
2N7002W-7-F
Thermal Monitor side)
+5V_ALW2 PR150 39K/F 3 1
A MB_THERM# 20 A
PR158 Jump20X10
+3.3V_EN2 2 2 1 1 THERM_STP# 29,37
PD7 1SS355 PR174 Jump20X10
29 5V_ALW_ON
PR143
+5V_EN1
200K/F
2 1 2 2 1 1 H_THERMTRIP# 3 QUANTA
PR144 *0_NC Title
COMPUTER
+3.3V/+5V/+15V (MAX17020)

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 51 of 61


5 4 3 2 1
5 4 3 2 1

+5V_SUS
+PWR_SRC
Scott_0819:Change PU1 library as DFx review.

D PR173 PC11 PC9 PC111 PC7 PC109 D


+3.3V_SUS

2200P/50V

0.1U/50V/0603

10U/25V/1206

10U/25V/1206

10U/25V/1206
*0_NC

5
6
7
8
9

5
6
7
8
9
PC6 1U/10V/0603 2 7 8792TON PQ3
PR4 VDD TON PR8 200K/F NTMFS4821NT1G
100K 5 8792DH 4 4
PC5 1U/10V/0603 8792VCC DH PQ1 +VCC_GFX_CORE
13 VCC NTMFS4821NT1G
8792BST PC4 0.22U
6 TDC : 27.5A

1
2
3

1
2
3
8792PGD BST PR10 1 25
43 GFX_CORE_PWRGD 14 PGOOD
1
0603 0603 PL1
ETQP4LR36AFC (0.36UH/28A/0.76mOhm)
Peak: 37.6A
20,29,53 GFX_ON EN
PU1 LX 4 8792LX +VCC_GFX_CORE_P OCP: 39A
PR12 *0_NC 8792SKIP# 12 MAX8792ETD+T
SKIP# 8792DL
DL 3

5
6
7
8
9

5
6
7
8
9
PC1
0.1U/10V/X5R/0402 8792REFIN 10 PR88 PC10 PC303
REFIN 1 *470u/2V/ESR6_NC 470u/2V/ESR6
FB 8 4 4
0805 + + +
REF-2V PQ24 PC118 PC112
8792REF 11 9 8792ILIM NTMFS4833NT1G 0.1U/50V/0603 470u/2V/ESR6

1
2
3

1
2
3
REF ILIM
PC113

EP
1000P/50V
PR5 PC219 PQ23 50

15
20K/F PR13 Short Jump *4700P_NC NTMFS4833NT1G
PR9 25
75K/F

Place near GND pin15


PC3
C C
PR80 1000P
3

133K/F 50
PR3
100K
17 GFX_CORE_CNTRL0 2 PQ22
BSS138-7-F Frequency(PR8=200K) 300K
PR89 PC117
100K 0.01U PR1
1

16 30.9K/F

GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 GFX_CORE_CNTRL2 +VCC_GFX_CORE


LOW LOW LOW 1.2V
HIGH LOW LOW 1.1V
HIGH HIGH LOW 1.0V
PR87
3

133K/F HIGH HIGH HIGH 0.9


PQ21
17 GFX_CORE_CNTRL1 2
BSS138-7-F

PR81 PC108 PQ7


100K 0.01U FDS6298
1

16 9
8 3
+1.5V_SUS 7 2
6 1
5

B PC22 PC20 +1.1V_GFX_PCIE B

4
10U 0.1U TDC : 2.2A
+1.1V_GFX_PCIE
PR77
3

91K/F

PQ20
17 GFX_CORE_CNTRL2 2 PU3 RT9024PE PC24
BSS138-7-F 4 100P PR18 PC23 PC21
PGD DRV 5 20K/F 22U 22U
PR76 PC107
100K 0.01U GFX_ON 1
1

16 EN
FB 3 0.8V

GND
+5V_ALW 6 VCC

2
PC25 PR20
0.1U PC26 49.9K/F
1U/10V/0603

A A

Title
+VGA_M97(MAX8792)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 52 of 61


5 4 3 2 1
5 4 3 2 1

D D

+1.12V_PWR_SRC +PWR_SRC
PJP4
+5V_SUS jumper

PC18 PC17 PC19 TDC : 2.8A

*2200P/50V_NC

*0.1U/50V/0603_NC

*10U/25V/1206_NC
Peak: 4.0A

5
6
7
8
OCP: 4.4A
PC125 4
*1U/10V/0603_NC +VDDCI_M97
C PQ5 C
PU8 0603 *AO4496_NC

1
2
3
7 10 PR91 *0_NC
V5IN VBST PC123 *0.1U/50V/0603_NC PJP5
PR93 *51.1K_NC 2 9 +1.12V_DH jumper
TRIP DRVH PL3 *3.3u_6.5A_30mOhm_MPLC0730L3R3_NC
3 8 +1.12V_LX +1.12V_VDDCI_P
20,29,52 GFX_ON PR94 *0_NC EN SW
+1.12V_VFB 4 1
VFB PGOOD 1.12V_PWRGD 43
5 6 +1.12V_DL
RF DRVL

5
6
7
8
PC124 11 PR90
*0.1U_NC PR97 GND *2.2/F/0603_NC PR96
4
*470K_NC *TPS51218_DCSR_NC *12.1K/F_NC + PC122 PC14

*220U/2.5V/ESR15_NC
PQ25 PC126 *0.1U_NC
*AO4712_NC *1500P_NC 50

1
2
3
50 0603
PR92 PR98 PC121 +1.12V_VFB
100K *422K/F_NC *2200p/50V_NC
VFB=0.704V
PR95
*20K/F_NC

+3.3V_SUS
Frequency(PR97=470K) 300K

B B

A A

Title
+VDDCI_M97(TPS51218)
Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 53 of 61


5 4 3 2 1
1 2 3 4 5

+5V_ALW2 +15V_ALW +5V_ALW PQ56 +5V_RUN +3.3V_SUS


FDS8884 +5V_ALW2 +15V_ALW +3.3V_ALW +3.3V_SUS
+5V_RUN PQ54
FDS8884 TDC : 0.89A
8
7
3
2
TDC :0.791A 8 3
PR170 6 1 7 2
PR171 100K 5 PR168 PR169 6 1
100K 100K 100K 5
Loki_0701: change to FDS8884 from SI4800BDY

4
RUN_ENABLE_5V

4
SUS_3.3V_ENABLE

6
Loki_0701: change to FDS8884 from SI4800BDY

6
A A
RUN_ON# 2 PC205
PQ55B 0.1U SUS_ON# 2

3
2N7002DW-7-F 0603 PQ53B PC202 PC203

3
5 PC204 50 2N7002DW-7-F 4700P 0.1U
18,24,43,46,47,48,49 RUN_ON

1
PQ55A 4700P 5 25 0603
29,47 SUS_ON
2N7002DW-7-F 25 PQ53A 50

4
2N7002DW-7-F

4
+15V_ALW +1.5V_SUS +1.5V_GDDR
PQ26 +1.5V_GDDR
SI4430BDY-T1-E3
8 3
TDC : 8.68A
7 2
6 1
PR17 5
47K +15V_ALW +5V_ALW PQ57 +5V_SUS
SI2304BDS-T1-E3
+5V_SUS

4
RUN_ENABLE_1.5V_GDDR PQ6
SI4430BDY-T1-E3 3 1 TDC : 42mA
3

8 3 PR172
RUN_ON# 2 7 2 100K
6 1

2
PQ4 PC15 5
1

2N7002W-7-F 4700P SUS_ENABLE_5V


25

3
PC16
0.1U SUS_ON# 2
B 0603 PC207 PC206 B
50 PQ58 4700P 0.1U

1
2N7002W-7-F 25 0603
50

+15V_ALW +1.5V_SUS +1.5V_RUN


PQ8 +1.5V_RUN
FDS8884

PR27
8
7
3
2
TDC : 1.05A
100K 6 1
5

RUN_ENABLE_1.5V_RUN Loki_0701: change to FDS8884 from SI4800BDY


4
3

RUN_ON# 2
PC34 PC33
PQ9 4700P 0.1U
1

2N7002W-7-F 25 0603
50

+15V_ALW +3.3V_ALW PQ49 +3.3V_RUN


FDS8880_NL
C +3.3V_RUN C

PR166
8
7
3
2
TDC : 6A
100K 6 1
5

RUN_ENABLE_3.3V
4
3

RUN_ON# 2
PC197 PC194
PQ50 4700P 0.1U
1

2N7002W-7-F 25 0603
50

Reserve discharge path


+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.75V_DDR_VTT +1.5V_SUS +5V_SUS +3.3V_SUS

R670 R659 R662 R664 R665 R663 R667 R669


*10_NC *10_NC *1K_NC *1K_NC *1K_NC *30/F_NC *1K_NC *1K_NC
3

3
D D
RUN_ON# 2 2 2 2 2 SUS_ON# 2 2 2

Q79 Q72 Q73 Q75 Q77 Q74 Q76 Q78


QUANTA
1

1
*2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC *2N7002W-7-F_NC

Title
COMPUTER
RUN POWER SW

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 54 of 61


1 2 3 4 5
A B C D E

PC317 0.01U/25V

PC318 4700P/25V +3.3V_ALW

PC319 3300P/50V
PD4 PD3 PD2

2
DA204U DA204U DA204U +3.3V_ALW
PC30 2200P/50V
1 1
PC31 0.1U/50V/0603

3
PR108
CN22 +VCHGR 100K
BATT1+ 1
2 PRP1 4P2R-100
BATT2+
SMB_CLK 3 3 4 SMBCLK0 29,37,45
SMB_DAT 4 1 2 SMBDAT0 29,37,45
BATT_PRES# 5 PBAT_PRES# 29
6 PR109 100
SYSPRES#
BATT_VOLT 7
BATT1- 8
BATT2- 9
PC99 0.1U PC211 0.01U/25V

FOX_BP02096-B51F5-7F
BAT-200045MR009H588ZR-9P-R-V PC100 1000P/50V PC209 6800P/50V

PC98 2200P/50V PC210 4700P/25V PQ41


+DC_IN SI4835DDY-T1-E3
+DC_IN_SS
PC212 3300P/50V 1 8
2 2
2 7
CN27 FL7 3 6
BLM41PG600SN1L 5
1 Adapter_DCIN+ 1 2
Adapter1+ PC104 PR73 PC175 PR137 PC172 PC170

4
2 0.47U/25V/0805 240K 0.01U/25V 10K/F/0603 0.1U/50V/0603 4.7U/25V/0805
Adapter2+ PC106
3 FL6 0.1U/50V/0603
PSID BLM41PG600SN1L
4 Adapter_DCIN- 1 2
Adapter1-
1

Adapter2- 5
100K
PRV1 PR74
MLX_87437-0573 *VZ0603M260AGT_NC
2

87437-0543-5p-r
1

+5V_ALW2

PRV2
*VZ0603M260AGT_NC
2

+3.3V_ALW

2
3 PC217 PC218 3
4700P/25V 0.01U/25V

PR138
PD6 2.2K

3
DA204U
PQ42
PL11 FDV301N PR139
BLM11B102S 33
1 2 DOCK_PSID 3 1
2 PS_ID 29

PR141
100K/F
PR75 10K +5V_ALW2
PD5
3

*SSM24PT_NC
2 PQ18
MMST3904-7-F
1

4 4

PR140
QUANTA
15K/F

Title
COMPUTER
DCIN & Batt

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 55 of 61


A B C D E
5 4 3 2 1

CPU XDP
CN6

1 GND0 GND1 2
3 XDP_PREQ# 3 OBSFN_A0 OBSFN_C0 4
3 XDP_PRDY# 5 OBSFN_A1 OBSFN_C1 6
7 GND2 GND3 8
3 XDP_OBS0 9 OBSDATA_A0 OBSDATA_C0 10
3 XDP_OBS1 11 OBSDATA_A1 OBSDATA_C1 12
13 GND4 GND5 14
D 3 XDP_OBS2 15 OBSDATA_A2 OBSDATA_C2 16 D
3 XDP_OBS3 17 OBSDATA_A3 OBSDATA_C3 18
19 GND6 GND7 20
21 OBSFN_B0 OBSFN_D0 22
23 24 +1.1V_VTT +3.3V_RUN
OBSFN_B1 OBSFN_D1
25 GND8 GND9 26
3 XDP_OBS4 27 OBSDATA_B0 OBSDATA_D0 28
3 XDP_OBS5 29 OBSDATA_B1 OBSDATA_D1 30
31 GND10 GND11 32
33 34 C651 R491 R496
3 XDP_OBS6 OBSDATA_B2 OBSDATA_D2
3 XDP_OBS7 35 OBSDATA_B3 OBSDATA_D3 36
37 38 *0.1U_NC 51 1K
+1.1V_VTT R177 1K H_CPUPWRGD_XDP GND12 GND13
3,10 H_CPUPWRGD 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 BCLK_ITP 3
T11 PAD PM_PWRBTN#_R 41 42
HOOK1 ITPCLK#/HOOK5 BCLK_ITP# 3
43 VCC_OBS_AB VCC_OBS_CD 44
R1731 2 0_0402 45 46 H_CPURST#
3 H_PWRGD_XDP HOOK2 RESET#/HOOK6 H_CPURST# 3
C302 47 48 XDP_DBRESET#
HOOK3 DBR#/HOOK7 XDP_DBRESET# 3,7
*0.1U/10V_NC 49 50
PCH_SMBDATA GND14 GND15
9 PCH_SMBDATA 51 SDA TDO 52 XDP_TDO 3
PCH_SMBCLK 53 54
9 PCH_SMBCLK SCL TRSTN XDP_TRST# 3
55 TCK1 TDI 56 XDP_TDI 3
3 XDP_TCLK 57 TCK0 TMS 58 XDP_TMS 3
59 GND16 GND17 60
H_CPURST# R500 *0_NC PLTRST#
PLTRST# 3,9,16,26,28,29,31,32,41
*Samtec BSH-030-01_NC

C C

PCH XDP

DEL PCH XDP as FM9 confirmed with


Intel that its not necessary!

B B

A A

QUANTA
Title
COMPUTER
XDP Connector

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 56 of 61


5 4 3 2 1
5 4 3 2 1

(1) AC : DC_IN -> DC_IN_SS -> +PWR_SRC


RM5 Power Design Block Diagram 2009/02/25 (2)
Bat : +VCHGR -> +PWR_SRC
+5V_ALW2, +3.3V_ALW
(3) MAIN_PWR_SW#
+5V_VCC1 (from +5V_ALW2)
(1) (1) (1) (4) 5V_ALW_ON
+DC_IN +DC_IN_SS +PWR_SRC +5V_ALW2 (5) +5V_ALW -> +15V_ALW
Power Jack LDO (2)
SYSTEM POWER (6) SUS_ON
+3.3V_ALW
Adapter input (2) (7) All SUS power & PWRGD
SI4835 SI4835 +5V_ALW2(for +3.3V_ALW) +5V_ALW +5V_ALW +15V_ALW (8) SIO_PWRBTN#, PCH_RSMRST#
(2) (5)
Diode & Cap (5)
MAX17020 VR (9) SIO_SLP_S5#, SIO_SLP_S3#
D D
5V_ALW_ON POK2 (+3.3V_ALW) Page 51
Charger (4) (10) RUN_ON_1, RUN_ON, GFX_RUN_ON
Page 51 POK1 (+5V_ALW) (11) All RUN power & PWRGD
MAX8731A (12) HWPG
Page 45 (13) IMVP_VR_ON
+5V_SUS (14) IMVP_PWRGD
(15) CLK_PWRGD
+VCHGR (1)
(1) PCH CORE POWER +1.05V_PCH (16) RESET_OUT#
(11)
+PWR_SRC (17) PCH_PWRGD
Battery RUN_ON TPS51218 VR 1.05V_PWRGD
(10) (11) (18) H_CPUPWRGD
+5V_SUS
Page 49 (19) PLTRST#
SI4835 +VCC_GFX_CORE
VGA POWER (11)
GFX_CORE_PWRGD
(10) GFX_RUN_ON MAX8792ETD+ VR (11)
+5V_ALW
Page 52
+5V_ALW S12304 +5V_SUS +1.5V_SUS
(5) (7) DDR POWER (7)
Page 54 SUS_ON VR 1.5V_SUS_PWRGD
(6) (7)
SUS_ON
TPS51116
(6) RUN_ON
(10) +0.75V_DDR_VTT
Page 47 LDO (11)
C +5V_SUS C

+3.3V_ALW SI4800 +3.3V_SUS


(2) (7)
Graphics +VDDCI
Page 54 (11)
(10) GFX_RUN_ON TPS51218 VR 1.12V_PWRGD
SUS_ON +5V_SUS (11)
(6)
Page 53
CPU Mem Control +1.1V_VTT
(11)
+5V_ALW SI4800 +5V_RUN
(5) (11) RUN_ON TPS51218 VR 1.1V_VTT_PWRGD
(10) (11)
Page 54
Page 48 +5V_SUS
RUN_ON
(10)
Graphics +1.8V_RUN
(11)
(10) RUN_ON TPS51218 VR 1.8V_PWRGD
+3.3V_ALW FDS8880 +3.3V_RUN (11)
(2) (11) +5V_RUN +3.3V_RUN
Page 46
Page 54
CPU POWER
RUN_ON
(10) +VCC_CORE
IMVP_VR_ON MAX17030 (15)
(14) VR
IMVP_PWRGD
TWO PHASE (15)
+1.5V_SUS SI4430 +1.5V_GDDR SOLUTION
B (7) (11) B

Page 54 Page 50
Reset Circuit
RUN_ON Page 43
(10)
1.5V_SUS_PWRGD
(7) RUN_ON
74AHC1G08GW (10)
RUN_ON_1
+1.5V_SUS SI4430 +1.5V_RUN (10)
(7) (11)
1.8V_PWRGD
Page 54 (7)
1.1V_VTT_PWRGD
RUN_ON (11)
(10)
1.12V_PWRGD HWPG
(11) SN74AHC08PW (12)
GFX_CORE_PWRGD
(11)
(3) 1.05V_PWRGD
CLK GEN (11)
MAIN_PWR_SW# 5V_ALW_ON CLK_PWRGD (15)
(4) IMVP_PWRGD
(14) PCH_PWRGD
SUS_ON PCH_PWRGD Page 17 74AHC1G08GW (17)
(6) (17) RESET_OUT#
EC PCH (16)
SIO_PWRBTN# (8)
IT8512
PCH_RSMRST# (8)
H_CPUPWRGD (18)
SIO_SLP_S5# (9)
A A

SIO_SLP_S3# (9) CPU


RUN_ON_1
Page 31 (10) Page 11~14
HWPG Page 3~4
(12) PLTRST# (19) QUANTA
IMVP_VR_ON
(13) Title
COMPUTER
IMVP_PWRGD RESET_OUT# Power Block Diagram
(14) (16) Size Document Number Rev
RM5 3A

Date: Thursday, August 20, 2009 Sheet 57 of 61


5 4 3 2 1
1 2 3 4 5 6 7 8

+3.3V_SUS

A +3.3V_RUN A

2.2K 2.2K
2.2K 2.2K
+3.3V_RUN
H14 PCH_SMBCLK MEM_SCLK 30
7002 MINICARD-WLAN
C8 PCH_SMBDATA MEM_SDATA 32 /WWAN/WPAN
7002
+3.3V_RUN 7
8 EXPRESS CARD

13
14 Fall Sensor

SO-DIMM

+3.3V_SUS 51
53 XDP
PCH
2.2K 2.2K
B B

G6 SMB_CLK_ME0
G8 SMB_DATA_ME0

+3.3V_SUS
+3.3V_ALW

10K 10K
2.2K 2.2K
+3.3V_SUS
E10 SMB_CLK_ME1 SMBCLK1 115
7002
G12 SMB_DATA_ME1 SMBDAT1 116 EC
7002
+3.3V_ALW
+3.3V_SUS
+3.3V_RUN
32
10K 10K 31 CLOCK
2.2K 2.2K
+3.3V_RUN
110 SMBCLK0 8
7002 THERMAL
111 SMBDAT0 7 (EMC1422)
7002
C C
+3.3V_RUN
9
10 CHARGER

100
4
+3.3V_ALW 3 BATTERY
+3.3V_SUS 100

SIO 10K 10K 2.2K 2.2K

ITE8502 +3.3V_SUS
115 SMBCLK1 SMB_CLK_ME1 115
7002
116 SMBDAT1 SMB_DATA_ME1 116 PCH
7002
+3.3V_SUS
6
5 LCD
+3.3V_ADM1032A

4.7K 4.7K
+3.3V_ADM1032A
D D
+3.3V_ALW 8
7002
GPU THERMAL
7
7002
+3.3V_ADM1032A
2.2K 2.2K

117 SMBCLK2 31 2 5 QUANTA


DB MMB
118 SMBDAT2 28 5 4
Title
COMPUTER
SMBUS BLOCK

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 58 of 61


1 2 3 4 5 6 7 8
5 4 3 2 1

POWER STATES
Signal SLP_ SLP SLP S4 ALWAYS SUS RUN USB PORT# DESTINATION
S3# _S4# _S5# _STATE# PLANE PLANE PLANE CLOCKS
State
0 Side pair Top / left
S0 (Full ON) / M0 HIGH N/A HIGH N/A ON ON ON ON
D D
1 Side pair Bottom / left
S3 (Suspend to RAM) / M-OFF LOW N/A HIGH N/A ON ON OFF OFF
2 USB W/ E-SATA port
S4 (Suspend to DISK) / M-OFF LOW N/A HIGH N/A ON OFF OFF OFF
3 Reserved
S5 (SOFT OFF) / M-OFF LOW N/A LOW N/A ON OFF OFF OFF
PCH 4 Mini Card (WLAN)
IBEX PEAK-M
PM TABLE 5 Mini Card (WWAN)
+RTC_CELL +DC_IN +5V_ALW +VCC_CORE +3.3V_RUN_CARD 6 Reserved
power
plane +DC_IN_SS +15V_ALW +0.75V_DDR_VTT +3.3V_CARD
+PWR_SRC +5V_SUS +1.05V_PCH +5V_RUN 7 Reserved
+CPU_PWR_SRC +3.3V_SUS +1.1V_GFX_PCIE +LCDVCC
+5V_ALW2 +3.3V_LAN +1.2V_LOM +5V_HDD 8 Mini Card (WPAN)
C C
+MMB_PWR +3.3V_CARDAUX +1.5V_RUN +5V_MOD
+3.3V_ALW +1.8V_SUS +1.5V_CARD +5V_SPK_AMP 9 TV
+1.5V_SUS +1.8V_RUN +VDDA
+3.3V_RUN +GFX_PWR_SRC 10 Express Card
+3.3V_DELAY
State
+3.3V_R5C833 11 Camera
S0 ON ON ON ON

S3 ON ON ON OFF PCI EXPRESS DESTINATION


S5 & S4 with Lane 1 Mini Card-1 WWAN
AC or BAT ON ON OFF OFF

no AC/Battery ON OFF OFF OFF


PCH Lane 2 Mini Card-2 WLAN
IBEX PEAK-M
B
Lane 3 Mini Card-3 WPAN B

PCI TABLE Lane 4 Express Card


PCI DEVICE IDSEL REQ#/GNT# PIRQ Lane 5 Cardreader

NONE Lane 6 LOM

A A

QUANTA
Title
COMPUTER
Power statu

Size Document Number Rev


RM5 3A

Date: Thursday, August 20, 2009 Sheet 59 of 61


5 4 3 2 1
www.s-manuals.com

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