VNN7NV04, VNS7NV04

VND7NV04, VND7NV04-1
OMNIFET II
fully autoprotected Power MOSFET

Features

Type RDS(on) Ilim Vclamp 2

VNN7NV04 3
2
VNS7NV04 1
60 mΩ 6A 40 V SOT-223 SO-8
VND7NV04
VND7NV04-1

■ Linear current limitation

3
3
■ Thermal shutdown 1 1
2

■ Short circuit protection TO252 (DPAK) TO251 (IPAK)

■ Integrated clamp
■ Low current drawn from input pin
■ Diagnostic feedback through input pin
■ ESD protection
■ Direct access to the gate of the Power
MOSFET (analog driving)
■ Compatible with standard Power MOSFET in
compliance with the 2002/95/EC European
Directive
Description
The VNN7NV04, VNS7NV04, VND7NV04
VND7NV04-1, are monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
MOSFETs from DC up to 50 kHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.

Table 1. Device summary

Order codes
Package
Tube Tube (lead-free) Tape and reel Tape and reel (lead-free)

SOT-223 VNN7NV04 - VNN7NV0413TR -

SO-8 VNS7NV04 - VNS7NV0413TR -
TO-252 VND7NV04 VND7NV04-E VND7NV0413TR VND7NV04TR-E
TO-251 VND7NV04-1 VND7NV04-1-E - -

September 2013 Doc ID 7383 Rev 4 1/37

www.st.com 1
Contents VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 DPAK maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 SOT-223 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . 19

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3 DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1 TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5 SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.6 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.7 DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.8 IPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 6. SOT-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 7. DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 8. TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 9. TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 10. SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 11. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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List of figures VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 15. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 21. Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 25. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 26. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 30. SO-8 maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 31. SO-8 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 32. DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 33. DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 34. SOT-223 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 35. SOT-223 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 36. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 37. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 38. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 39. Thermal fitting model of an OMNIFET II in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 40. SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 41. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 42. SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 43. Thermal fitting model of an OMNIFET II in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 44. DPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 45. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 46. DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 47. Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 48. TO-251 (IPAK) package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 List of figures

Figure 49. TO-252 (DPAK) package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 50. SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 51. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 52. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 53. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 54. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 55. DPAK footprint and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 56. DPAK tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 57. IPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Doc ID 7383 Rev 4 5/37

Block diagram and pin description VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

1 Block diagram and pin description

Figure 1. Block diagram

DRAIN
2

Overvoltage
Clamp

INPUT
Gate
1 Control

Linear
Current
Over Limiter
Temperature

3
SOURCE
FC01000

Figure 2. Configuration diagram (top view)

SO-8 Package(1)

SOURCE 1 8 DRAIN
SOURCE DRAIN
SOURCE DRAIN
INPUT 4 5 DRAIN

1. For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1.

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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

ID

VDS
DRAIN
IIN RIN
INPUT

SOURCE

VIN

2.1 Absolute maximum ratings

Table 2. Absolute maximum ratings
Value
Symbol Parameter Unit
SOT-223 SO-8 DPAK/IPAK

VDS Drain-source voltage (VIN=0 V) Internally clamped V

VIN Input voltage Internally clamped V
IIN Input current +/-20 mA
RIN MIN Minimum input series impedance 150 Ω
ID Drain current Internally limited A
IR Reverse DC output current -10.5 A
Electrostatic discharge (R=1.5 KΩ,
VESD1 4000 V
C=100 pF)
Electrostatic discharge on output pin
VESD2 16500 V
only (R=330 Ω, C=150 pF)
Ptot Total dissipation at Tc=25 °C 7 4.6 60 W
Maximum switching energy
EMAX (L=0.7 mH; RL=0 Ω; Vbat=13.5 V; 40 40 mJ
Tjstart=150 ºC; IL=9 A)
Maximum switching energy
EMAX (L=0.6 mH; RL=0 Ω; Vbat=13.5 V; 37 mJ
Tjstart=150 ºC; IL=9 A)
Tj Operating junction temperature Internally limited °C
Tc Case operating temperature Internally limited °C
Tstg Storage temperature -55 to 150 °C

Doc ID 7383 Rev 4 7/37

Electrical specifications VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

2.2 Thermal data

Table 3. Thermal data
Value
Symbol Parameter Unit
SOT-223 SO-8 DPAK IPAK

Rthj-case Thermal resistance junction-case max 18 2.1 2.1 °C/W

Rthj-lead Thermal resistance junction-lead max 27 °C/W
Rthj-amb (1) (1) (1)
Thermal resistance junction-ambient max 96 90 65 102 °C/W
1. When mounted on a standard single-sided FR4 board with 0.5 mm2 of Cu (at least 35 µm thick) connected to all DRAIN
pins.

2.3 Electrical characteristics

-40 °C < Tj < 150 °C, unless otherwise specified.

Table 4. Electrical characteristics

Symbol Parameter Test conditions Min Typ Max Unit

Off

Drain-source clamp
VCLAMP VIN=0 V; ID=3.5 A 40 45 55 V
voltage
Drain-source clamp
VCLTH VIN=0 V; ID=2 mA 36 V
threshold voltage
VINTH Input threshold voltage VDS=VIN; ID=1 mA 0.5 2.5 V
Supply current from input
IISS VDS=0 V; VIN=5 V 100 150 µA
pin

Input-source clamp IIN=1 mA 6 6.8 8

VINCL V
voltage IIN=-1 mA -1.0 -0.3
Zero input voltage drain VDS=13 V; VIN=0 V; Tj=25 °C 30
IDSS µA
current (VIN=0 V) VDS=25 V; VIN=0 V 75

On

Static drain-source on VIN=5 V; ID=3.5 A; Tj=25 °C 60

RDS(on) mΩ
resistance VIN=5 V; ID=3.5 A 120

Dynamic (Tj=25 °C, unless otherwise specified)

Forward
gfs (1) VDD=13 V; ID=3.5 A 9 S
transconductance
COSS Output capacitance VDS=13 V; f=1 MHz; VIN=0 V 220 pF

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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Electrical specifications

Table 4. Electrical characteristics (continued)

Symbol Parameter Test conditions Min Typ Max Unit

Switching (Tj=25 °C, unless otherwise specified)

td(on) Turn-on delay time 100 300 ns

VDD=15 V; ID=3.5 A
tr Rise time 470 1500 ns
Vgen=5 V; Rgen=RIN MIN=150 Ω
td(off) Turn-off delay time 500 1500 ns
(see figure Figure 4.)
tf Fall time 350 1000 ns
td(on) Turn-on delay time 0.75 2.3 µs
tr Rise time VDD=15 V; ID=3.5 A 4.6 14.0 µs
Vgen=5 V; Rgen=2.2 KΩ
td(off) Turn-off delay time (see figure Figure 4.) 5.4 16.0 µs
tf Fall time 3.6 11.0 µs
VDD=15 V; ID=3.5 A
(dI/dt)on Turn-on current slope 6.5 A/µs
Vgen=5 V; Rgen=RIN MIN=150 Ω
VDD=12 V; ID=3.5 A; VIN=5 V
Qi Total input charge 18 nC
Igen=2.13 mA (see figure Figure 7.)

Source drain diode (Tj=25 °C, unless otherwise specified)

VSD(1) Forward on voltage ISD=3.5 A; VIN=0 V 0.8 V

trr Reverse recovery time ISD=3.5 A; dI/dt=20 A/µs 220 ns
Qrr Reverse recovery charge VDD=30 V; L=200 µH 0.28 µC
IRRM Reverse recovery current (see test circuit, figure Figure 5.) 2.5 A

Protections (-40 °C < Tj < 150 °C, unless otherwise specified)

Ilim Drain current limit VIN=5 V; VDS=13 V 6 9 12 A

Step response current
tdlim VIN=5 V; VDS=13 V 4.0 µs
limit
Over temperature
Tjsh 150 175 200 °C
shutdown
Tjrs Over temperature reset 135 °C
Igf Fault sink current VIN=5 V; VDS=13 V; Tj=Tjsh 15 mA
starting Tj=25 °C; VDD=24 V
Single pulse avalanche
Eas VIN=5 V Rgen=RIN MIN=150 Ω; L=24 mH 200 mJ
energy
(see figures Figure 6. & Figure 8.)
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

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Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

3 Protection features

During normal operation, the input pin is electrically connected to the gate of the internal
Power MOSFET through a low impedance path.
The device then behaves like a standard Power MOSFET and can be used as a switch from
DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current
IISS (typ. 100µA) flows into the input pin in order to supply the internal circuitry.
The device integrates:
● Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
● Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin
voltages. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the over temperature threshold Tjsh.
● Over temperature and short circuit protection: these are based on sensing the chip
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a
typical value being 170 °C. The device is automatically restarted when the chip
temperature falls of about 15 °C below shutdown temperature.
● Status feedback: in the case of an over temperature fault condition (Tj > Tjsh), the
device tries to sink a diagnostic current Igf through the input pin in order to indicate fault
condition. If driven from a low impedance source, this current may be used in order to
warn the control circuit of a device shutdown. If the drive impedance is high enough so
that the input pin driver is not able to supply the current Igf, the input pin will fall to 0 V.
This will not however affect the device operation: no requirement is put on the current
capability of the input pin driver except to be able to supply the normal operation drive
current IISS.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL logic circuit.

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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features

Figure 4. Switching time test circuit for resistive load

ID

90%

tr tf
10%
t
td(on) td(off)
Vgen

Figure 5. Test circuit for diode recovery times

A
A
D
I FAST L=100uH
OMNIFET DIODE

S B
B

150Ω
D
VDD
Rgen
I
OMNIFET

Vgen
S

8.5 Ω

Doc ID 7383 Rev 4 11/37

Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Figure 6. Unclamped inductive load test Figure 7. Input charge test circuit
circuits

VIN

RGEN
VIN

PW

Figure 8. Unclamped inductive waveforms

12/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features

3.1 Electrical characteristics curves

Figure 9. Derating curve Figure 10. Transconductance

Gfs (S)
20

18
Vds=13V
16
Tj=-40ºC

14 Tj=25ºC
Tj=150ºC
12

10

0
0 1 2 3 4 5 6 7 8
Id(A)

Figure 11. Static drain-source on resistance Figure 12. Static drain-source on resistance
vs input voltage (part 1/2) vs input voltage (part 2/2)

Rds(on) (mOhm)
Rds(on) (mOhm)
140
120

110
Id=3.5A 120
100 Tj=150ºC

90 100
Tj=150ºC
80 Id=6A
Id=1A
70 80

60
60 Tj=25ºC
50
Tj=25ºC
40 Id=6A
Tj=-40ºC
40
30 Id=1A
Tj= - 40ºC
Id=6A
20 Id=1A
20
10

0 0
3 3.5 4 4.5 5 5.5 6 6.5 7 3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
Vin(V)

Figure 13. Source-drain diode forward Figure 14. Static drain source on resistance
characteristics

Vsd (mV) Rds(on) (mohms)

1000 150

950
Vin=0V
125
900
Vin=5V
850
100
Tj=150ºC
800

750 75

700
50
650 Tj=25ºC

600 Tj=-40ºC
25
550

500 0
0 2 4 6 8 10 12 14 0 1 2 3 4 5 6
Id(A) Id(A)

Doc ID 7383 Rev 4 13/37

Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Figure 15. Turn-on current slope (part 1/2) Figure 16. Turn-on current slope (part 2/2)

di/dt(A/us) di/dt(A/us)
2.25 8

2 7
Vin=3.5V Vin=5V
1.75 Vdd=15V 6 Vdd=15V
Id=3.5A Id=3.5A
1.5 5

1.25 4

1 3

0.75 2

0.5 1

0.25 0
100 200 300 400 500 600 700 800 900 1000 1100 100 200 300 400 500 600 700 800 900 1000 1100

Rg(ohm) Rg(ohm)

Figure 17. Transfer characteristics Figure 18. Static drain-source on resistance

vs Id

Idon(A) Rds(on) (mOhm)

10 140
Tj=25ºC
9
Tj=-40ºC 120
Vds=13.5V
8 Tj=150ºC
Vin=3.5V

7 100 Tj=150ºC
Vin=5V
6
80
5
60 Vin=3.5V
4
Tj=25ºC
Vin=5V
3 40 Vin=3.5V
Tj=-40ºC
2 Vin=5V
20
1

0 0
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Vin(V) Id(A)

Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope
(part 1/2)
dv/dt(V/us)
Vin(V)
300
8

7 250
Vds=12V
Id=3.5A Vin=5V
6
200 Vdd=15V
5 Id=3.5A

150
4

3 100

2
50

1
0
0 100 200 300 400 500 600 700 800 900 1000 1100
0 5 10 15 20 25
Rg(ohm)
Qg(nC)

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VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features

Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations
(part 2/2)

dv/dt(v/us) C(pF)
600
300

250
500

Vin=3.5V f=1MHz
200 Vdd=15V Vin=0V
Id=3.5A 400

150

300
100

50 200

0
100
100 200 300 400 500 600 700 800 900 1000 1100
0 5 10 15 20 25 30 35

Rg(ohm) Vds(V)

Figure 23. Output characteristics Figure 24. Normalized on resistance vs

temperature
v

ID(A) Rds(on)
12 2.25

11
2
10
Vin=5V
Vin=5V
9 Id=3.5A
Vin=4.5V 1.75
8 Vin=4V

7 1.5
Vin=3V
6

5 1.25

4
1
3
Vin=2.5V
2
0.75
1
Vin=2V
0 0.5
0 1 2 3 4 5 6 7 8 9 10 11 12 13 -50 -25 0 25 50 75 100 125 150 175
VDS(V) T(ºC)

Figure 25. Switching time resistive load (part Figure 26. Switching time resistive load (part
1/2) 2/2)

t(us) t(ns)
5.5 1600
tr
5
Vdd=15V tr 1400
4.5 Id=3.5A
td(off) Vdd=15V
4 Vin=5V 1200 Id=3.5A
tf Rg=150ohm
3.5
1000
3

2.5 800

2
600
1.5 td(off)
400
1 tf
td(on)
0.5 200
0 td(on)
0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0
3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
Rg(ohm) Vin(V)

Doc ID 7383 Rev 4 15/37

Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction
vs temperature temperature

Vin(th) Ilim (A)

1.15 15

1.1 14

Vds=Vin Vds=13V
13
1.05 Vin=5V
Id=1mA
12
1
11
0.95
10
0.9
9
0.85
8
0.8
7

0.75 6

0.7 5
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
T(ºC) Tj (ºC)

Figure 29. Step response current limit

Tdlim(us)
7

6.5
Vin=5V
Rg=150ohm
6

5.5

4.5

3.5
5 10 15 20 25 30 35
Vdd(V)

16/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features

3.2 SO-8 maximum demagnetization energy

Figure 30. SO-8 maximum turn-off current versus load inductance
ILMAX (A)
100

10

A
B
C

1
0.1 1 10 100
L(mH)
Legend
A = Single Pulse at TJstart=150 °C
B = Repetitive pulse at TJstart=100 °C
C = Repetitive Pulse at TJstart=125 °C

Conditions:
VCC=13.5 V
Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.

Figure 31. SO-8 demagnetization

VIN, IL
Demagnetization Demagnetization Demagnetization

Doc ID 7383 Rev 4 17/37

Protection features VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

3.3 DPAK maximum demagnetization energy

Figure 32. DPAK maximum turn-off current versus load inductance
ILM AX (A)
10 0

10

1
0.01 0.1 1 10 100
L (m H )
Legend
A = Single Pulse at TJstart=150 °C
B = Repetitive pulse at TJstart=100 °C
C = Repetitive Pulse at TJstart=125 °C

Conditions:
VCC=13.5 V
Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.

Figure 33. DPAK demagnetization

VIN, IL
Demagnetization Demagnetization Demagnetization

18/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Protection features

3.4 SOT-223 maximum demagnetization energy

Figure 34. SOT-223 maximum turn-off current versus load inductance
ILMAX (A)
100

10

1
0.01 0.1 1 10
L(mH)
Legend
A = Single Pulse at TJstart=150 °C
B = Repetitive pulse at TJstart=100 °C
C = Repetitive Pulse at TJstart=125 °C

Conditions:
VCC=13.5 V
Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.

Figure 35. SOT-223 demagnetization

VIN, IL
Demagnetization Demagnetization Demagnetization

Doc ID 7383 Rev 4 19/37

Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

4 Package and PCB thermal data

4.1 SO-8 thermal data

Figure 36. SO-8 PC board

Note: Layout condition of Rth and Zth measurements (PCB FR4 area=58 mm x 58 mm, PCB
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm2, 0.8 cm2, 2 cm2).

Figure 37. Rthj-amb vs PCB copper area in open box free air condition

RTHj_amb (ºC/W) SO-8 at 2 pins connected to TAB

110

105
100

95
90

85
80

75

70
0 0.5 1 1.5 2 2.5
PCB Cu heatsink area (cm^2)

20/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and PCB thermal data

Figure 38. SO-8 thermal impedance junction ambient single pulse

ZT H (°C /W)
1000

100

10

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
T ime (s)

Figure 39. Thermal fitting model of an OMNIFET II in SO-8

Tj C1 C2 C3 C4 C5 C6

R1 R2 R3 R4 R5 R6

Pd

T_amb

Equation 1 Pulse calculation formula

Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = t p ⁄ T

Table 5. SO-8 thermal parameter

Area/island (cm2) Footprint 2

R1 (°C/W) 0.2
R2 (°C/W) 0.9
R3 (°C/W) 3.5
R4 (°C/W) 21
R5 (°C/W) 16
R6 (°C/W) 58 28
C1 (W.s/°C) 3.00E-04

Doc ID 7383 Rev 4 21/37

Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Table 5. SO-8 thermal parameter (continued)

Area/island (cm2) Footprint 2

C2 (W.s/°C) 9.00E-04
C3 (W.s/°C) 7.50E-03
C4 (W.s/°C) 0.045
C5 (W.s/°C) 0.35
C6 (W.s/°C) 1.05 2

4.2 SOT-223 thermal data

Figure 40. SOT-223 PC board

Note: Layout condition of Rth and Zth measurements (PCB FR4 area=58 mm x 58 mm, PCB
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.11 cm2, 1 cm2, 2 cm2).

Figure 41. Rthj-amb vs PCB copper area in open box free air condition
RTH j-amb (°C/W)

140

130

120

110

100

90

80

70

60
0 0.5 1 1.5 2 2.5
Cu area (cm^2)

22/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and PCB thermal data

Figure 42. SOT-223 thermal impedance junction ambient single pulse

ZT H (°C/W)
1000

100

10

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
T ime (s)

Figure 43. Thermal fitting model of an OMNIFET II in SOT-223

Tj C1 C2 C3 C4 C5 C6

R1 R2 R3 R4 R5 R6

Pd

T_amb

Equation 2 Pulse calculation formula

Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = t p ⁄ T

Table 6. SOT-223 thermal parameter

Area/island (cm2) Footprint 2

R1 (°C/W) 0.2
R2 (°C/W) 1.1
R3 (°C/W) 4.5
R4 (°C/W) 24
R5 (°C/W) 0.1
R6 (°C/W) 100 45
C1 (W.s/°C) 3.00E-04

Doc ID 7383 Rev 4 23/37

Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Table 6. SOT-223 thermal parameter (continued)

Area/island (cm2) Footprint 2

C2 (W.s/°C) 9.00E-04
C3 (W.s/°C) 3.00E-02
C4 (W.s/°C) 0.16
C5 (W.s/°C) 1000
C6 (W.s/°C) 0.5 2

4.3 DPAK thermal data

Figure 44. DPAK PC board

Note: Layout condition of Rth and Zth measurements (PCB FR4 area=60 mm x 60 mm, PCB
thickness=2 mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8 cm2).

Figure 45. Rthj-amb vs PCB copper area in open box free air condition
RTH j_amb (ºC/W)

90

80

70

60

50

40

30
0 2 4 6 8 10
PCB CU heatsink area (cm^2)

24/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and PCB thermal data

Figure 46. DPAK thermal impedance junction ambient single pulse

ZT H (°C/W)
1000

100

10

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
T ime (s)

Figure 47. Thermal fitting model of an OMNIFET II in DPAK

Tj C1 C2 C3 C4 C5 C6

R1 R2 R3 R4 R5 R6

Pd

T_amb

Equation 3 Pulse calculation formula

Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = t p ⁄ T

Table 7. DPAK thermal parameter

Area/island (cm2) Footprint 6

R1 (°C/W) 0.1
R2 (°C/W) 0.35
R3 (°C/W) 1.20
R4 (°C/W) 2
R5 (°C/W) 15
R6 (°C/W) 61 24

Doc ID 7383 Rev 4 25/37

Package and PCB thermal data VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Table 7. DPAK thermal parameter (continued)

Area/island (cm2) Footprint 6

C1 (W.s/°C) 0.0006
C2 (W.s/°C) 0.0021
C3 (W.s/°C) 0.05
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.45
C6 (W.s/°C) 0.8 5

26/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information

5 Package and packing information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

5.1 TO-251 (IPAK) mechanical data

Table 8. TO-251 (IPAK) mechanical data
millimeters
Symbol
Min. Typ. Max.

A 2.2 2.4
A1 0.9 1.1
A3 0.7 1.3
B 0.64 0.9
B2 5.2 5.4
B3 0.85
B5 0.3
B6 0.95
C 0.45 0.6
C2 0.48 0.6
D 6 6.2
E 6.4 6.6
G 4.4 4.6
H 15.9 16.3
L 9 9.4
L1 0.8 1.2
L2 0.8 1

Doc ID 7383 Rev 4 27/37

Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Figure 48. TO-251 (IPAK) package dimensions

5.2 TO-252 (DPAK) mechanical data

Table 9. TO-252 (DPAK) mechanical data
millimeters
Symbol
Min. Typ. Max.

A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
B 0.64 0.90
B2 5.20 5.40
C 0.45 0.60
C2 0.48 0.60
D 6.00 6.20
D1 5.1
E 6.40 6.60
E1 4.7
e 2.28
G 4.40 4.60
H 9.35 10.10

28/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information

Table 9. TO-252 (DPAK) mechanical data (continued)

millimeters
Symbol
Min. Typ. Max.

L2 0.8
L4 0.60 1.00
R 0.2
V2 0° 8°
Package Weight Gr. 0.29

Figure 49. TO-252 (DPAK) package dimensions

P032P

5.3 SOT-223 mechanical data

Table 10. SOT-223 mechanical data
millimeters
Symbol
Min. Typ. Max.

A 1.8
B 0.6 0.7 0.85
B1 2.9 3 3.15
c 0.24 0.26 0.35
D 6.3 6.5 6.7
e 2.3

Doc ID 7383 Rev 4 29/37

Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Table 10. SOT-223 mechanical data (continued)

millimeters
Symbol
Min. Typ. Max.

e1 4.6
E 3.3 3.5 3.7
H 6.7 7 7.3
V 10 (max)
A1 0.02 0.1

Figure 50. SOT-223 package dimensions

0046067

5.4 SO-8 mechanical data

Table 11. SO-8 mechanical data
millimeters
Symbol
Min Typ Max

A 1.75
a1 0.1 0.25
a2 1.65
a3 0.65 0.85
b 0.35 0.48
A 1.75
A1 0.10 0.25

30/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information

Table 11. SO-8 mechanical data (continued)

millimeters
Symbol
Min Typ Max

A2 1.25
b 0.28 0.48
c 0.17 0.23
D(1) 4.80 4.90 5.00
E 5.80 6.00 6.20
E1(2) 3.80 3.90 4.00
e 1.27
h 0.25 0.50
L 0.40 1.27
L1 1.04
k 0° 8°
ccc 0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.

Figure 51. SO-8 package dimensions

0016023 D

Doc ID 7383 Rev 4 31/37

Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

5.5 SOT-223 packing information

Figure 52. SOT-223 tape and reel shipment (suffix “TR”)

REEL DIMENSIONS
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

32/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information

5.6 SO-8 packing information

Figure 53. SO-8 tube shipment (no suffix)

B
C Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A
A 3.2
B 6
C (± 0.1) 0.6

Figure 54. SO-8 tape and reel shipment (suffix “TR”)

REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

All dimensions are in mm.

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm. End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

Doc ID 7383 Rev 4 33/37

Package and packing information VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

5.7 DPAK packing information

Figure 55. DPAK footprint and tube shipment (no suffix)

A
6 .7 1 .8 3 .0 1 .6 C
Base Q.ty 75
Bulk Q.ty 3000
2 .3
6 .7 Tube length (± 0.5) 532
2 .3
A 6
B
B 21.3
C (± 0.1) 0.6

Figure 56. DPAK tape and reel shipment (suffix “TR”)

REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

34/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1 Package and packing information

5.8 IPAK packing information

Figure 57. IPAK tube shipment (no suffix)

A
C

Base Q.ty 75
Bulk Q.ty 3000
Tube length (± 0.5) 532
B A 6
B 21.3
C (± 0.1) 0.6

All dimensions are in mm.

Doc ID 7383 Rev 4 35/37

Revision history VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

6 Revision history

Table 12. Document revision history

Date Revision Changes

01-Feb-2003 1 Initial Release

Added Table 1: Device summary on page 1 and Section 4:
Package and PCB thermal data on page 20.
28-Apr-2009 2
Updated Section 5: Package and packing information on
page 27.
10-Sep-2010 3 Updated Table 4: Electrical characteristics
20-Sep-2013 4 Updated Disclaimer.

36/37 Doc ID 7383 Rev 4

VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

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WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
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OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
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