THE CENTRAL PROCESSING UNIT

A computer can be divided into three (3) broad categories or subsystems:

1. the central processing unit (CPU)
2. main memory
3. the input/output subsystem

The central processing unit (CPU) performs operations on data. In most architectures, it has three parts:
1. an arithmetic logic unit (ALU)
2. a control unit (CU)
3. a set of registers

The Arithmetic Logic Unit (ALU)

The arithmetic logic unit (ALU) performs logic, shift, and arithmetic operations on data.

Logic operations: NOT, AND, OR, and XOR.

Shift operations: logic shift operations and arithmetic shift operations
Arithmetic operations: arithmetic operations on integers and reals.

The control unit (CU)

• The control unit controls and coordinates all operations.

• It works through a cycle of fetch, decode, and execution.

The fetch-decode-execute cycle

1. Fetch: The Fetch Operation is used for taking the instructions those are given by the user and the
Instructions those are stored into the Main Memory will be fetch by using Registers.
2. Decode: The Decode Operation is used for interpreting the Instructions means the Instructions are
decoded means the CPU will find out which Operation is to be performed on the Instructions.
3. Execute: The Execute Operation is performed by the CPU. And Results those are produced by the CPU
are then Stored into the Memory and after that they are displayed on the user Screen.

• The role of control unit can be summarised as below:

o To fetch / decode / execute instructions;
o To synchronise operation of processor;
o To marshal/control operation of fetch-execute cycle;
o To send control signals/commands to other components of fetch-execute cycle

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Registers

Register are used to quickly accept, store, and transfer data and instructions that are being used immediately by
the CPU. These registers are the top of the memory hierarchy, and are the fastest way for the system to
manipulate data. In a very simple microprocessor, it consists of a single memory location, usually called an
accumulator. Registers are built from fast multi-ported memory cell.

1. Memory Address Register (MAR): This register holds the address of memory where CPU wants to read or
write data. When CPU wants to store some data in the memory or reads the data from the memory, it places
the address of the required memory location in the MAR.
2. Memory Buffer Register (MBR): This register holds the contents of data or instruction read from, or
written in memory. The contents of instruction placed in this register are transferred to the Instruction
Register, while the contents of data are transferred to the accumulator or I/O register. In other words you can
say that this register is used to store data/instruction coming from the memory or going to the memory.
3. I/O Address Register (I/O AR): I/O Address register is used to specify the address of a particular I/O
device.
4. I/O Buffer Register (I/O BR): I/O Buffer Register is used for exchanging data between the I/O module and
the processor.
5. Program Counter (PC): Program Counter register is also known as Instruction Pointer Register. This
register is used to store the address of the next instruction to be fetched for execution. When the instruction
is fetched, the value of IP is incremented. Thus this register always points or holds the address of next
instruction to be fetched.
6. Instruction Register (IR): Once an instruction is fetched from main memory, it is stored in the Instruction
Register. The control unit takes instruction from this register, decodes and executes it by sending signals to
the appropriate component of computer to carry out the task.
7. Accumulator Register(AC): The accumulator register is located inside the ALU, It is used during
arithmetic & logical operations of ALU. The control unit stores data values fetched from main memory in
the accumulator for arithmetic or logical operation. This register holds the initial data to be operated upon,
the intermediate results, and the final result of operation. The final result is transferred to main memory
through MBR.

The processor instruction set

Processor instruction set refers to the complete set of all the instructions in machine code that can be recognized
and executed by a central processing unit. Different processors have different instruction sets.

Typical instruction set includes the following common operations:

o LOAD, STORE - data handling and memory operations

o ADD, SUBTRACT, DIVID, MULTIPLY etc - arithmetic operations
o >, <, = etc - comparison operations
o AND, OR, XOR, NOR, NOT etc - logical operations
o Control flow operations - conditional or unconditional
o Logical shifts
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o Halt

Instruction sets are differentiated by the following:

• Number of bits per instruction.
• Stack-based or register-based.
• Number of explicit operands per instruction.
• Operand location.
• Types of operations.
• Type and size of operands.

Instruction set formats

Computers only deal with bits 0 and 1s. They do not understand high level languages so compilers or assembled
are required to translate these into the machine code instructions that the microprocessor understands. These
machine-code instructions consist of a sequence of bits within the computer that also locate operands by
defining registers or memory address locations. The instruction is divided into group of bits called a field. The
instruction format may be of the following types:

Variable Instruction Formats

These are the instruction formats in which the instruction length varies on the basis of operation code and
address. These instruction formats are usually difficult to decode.

Fixed Instruction Formats

In this type of instruction format, all instructions the same size. For example, MIPS, POWER PC, Alpha, ARM.
This is much easier to decode.

Addressing Modes
Addressing modes provide different ways to access an address on a processor. Data is stored in the memory and
each instruction requires certain data on which it has to operate. There are various techniques to specify the
address of the required data. These techniques are called addressing modes.

• Direct addressing mode – the address of the operand is given in the instruction and data is available in that
memory location provided in the instruction
• Indirect addressing mode – the instruction specifies a register which contains the address of the operand.
Both internal RAM and external RAM can be accessed via indirect addressing mode.
• Immediate addressing mode – data is given directly in the operand which moves the data in the accumulator
• Relative addressing mode – the effective address is determined by the index mode by using the program
counter instead of a general-purpose process register
• Index addressing mode – the effective address of the operand is generated by adding a content value to the
contents of the register.

CPU clock
CPUs have a working speed, which is regulated by a crystal which is constantly vibrating at a very high rate.
This crystal impulse is sent to the CPU as a clock tick and each pulse can cause the CPU to perform one action.

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The number of clock ticks per second is measured in Hertz. Since the CPU’s crystal vibrates millions of times
each second so clock speed is measured in millions of oscillations (MHz or GHz).

Cache memory
A cache memory component is used to store data on a temporary basis. Data stored in the cache memory can be
access faster. Cache memory is faster than main memory, but slower than the CPU and its registers. Cache
memory, which is normally small in size, is placed between the CPU and main memory.

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