Compal - La-9861p - r1-38068.0 - Satellite c45 - Schematics PDF

A B C D E
1 1
VFKTA
2
Rosetta 10FTG 2
LA-9861P REV 1.0 Schematic

Intel Processor (Ivy Bridge/Sandy Bridge)+
3
PCH(Panther Point) 3
2013-02-19 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2012/04/19 Deciphered Date 2015/04/19 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VFKTA
Date: Monday, March 11, 2013 Sheet 1 of 56
A B C D E
A B C D E
VGA (DDR3) Intel CPU

nVIDIA N14x PCI-Express Gen3 4X Ivy Bridge Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2
page 13,14,15,16,17,18,19,20,21
8GT/s
17W Dual Channel BANK 0, 1, 2, 3 page 11,12
1.5V DDRIII 1066/1333/1600 MT/s

1
BGA-1023 1
31mm*24mm
page 5,6,7,8,9,10
eDP 1.1 2x
2.7GT/s
FDI X8 DMI X4
2.7GT/s 5GT/s
USB30 2x
LVDS colay eDP Conn. 5V 5GT/s USB Right
USB20 port 0,1
USB20 3x USB30 port 1,2
page 22 page 38
5V 480MHz
2
Intel PCH USB20 2x CardReader GL834L Int. Camera 2
HDMI Conn. Panther Point 5V 480MHz USB20 port 8 USB port 11
page 37 page 22
page 24
FCBGA-989
RJ45 RTL8106E & 8111G PCIe Gen1 1x PCIe Gen1 1x PCIeMini Card WLAN and BT
PCIe port 1 1.5V 5GT/s 25mm*25mm 1.5V 5GT/s
Conn. page 36 USB20 2x
PCIe port 2 &USB port 9
page 35
USB20 2x 5V 480MHz
5V 480MHz
USB Left
USB20 port 2
page 36 SATA Gen3 1x SATA HDD
SATA port 0
5V 6GHz(600MB/s) page 34
To sub-board
SATA Gen2 1x SATA ODD
5V 3GHz(300MB/s) SATA port 2
page 24,25,26,27,28,29,30,31,32 page 34
3 3
LPC BUS HD Audio

3.3V 33 MHz 3.3V 24MHz
RTC CKT. SPI ROM

page 24
KB9012 HDA Codec
(4MB) page 25 page 41 ALC259/269
page 39
DC/DC Interface CKT.
page 42
Touch Pad Int.KBD G-Sensor LED+LID/B SPK Conn JPIO

page 40
Power Circuit DC/DC page 42 page 42 page 34 page 42 (HP &page
MIC)40
page 44~53
GCLK
4
SLG3NB300VTR 4
page 35
Power/B
page 42
To sub-board Block Diagram
1.0
VFKTA
A B C D E
5 4 3 2 1
DESIGN CURRENT 0.1A +3VL

B+
Ipeak=8.5A, Imax=5.95A, Iocp min=10.2 DESIGN CURRENT 5A +5VALW
PCH_PWR_EN#
P-CHANNEL
+5VALW_PCH
SUSP# AO-3413
D D
DESIGN CURRENT 2A +1.8VS
SY8032ABC
SUSP#
DESIGN CURRENT 6A +5VS

TPS22966DPUR
RT8243AZQW KB_LED
DESIGN CURRENT 400mA +5VS_LED
P-CHANNEL
AO-3413
+5VS
DESIGN CURRENT 300mA +3VS_HDP
LDO
G9191-330T1U
ODD_EN#
DESIGN CURRENT 1.6A +5VS_ODD
P-CHANNEL
AO-3413
Ipeak=5A, Imax=3.5A, Iocp min=6.12A DESIGN CURRENT 5A +3VALW
DESIGN CURRENT 330mA +3V_LAN

C WOWL_EN# C
DESIGN CURRENT 3A +3V_WLAN

P-CHANNEL
AO-3413
PCH_PWR_EN#
P-CHANNEL
+3VALW_PCH
AO-3413
SUSP#
DESIGN CURRENT 6A +3VS

TPS22966DPUR
LCD_ENVDD
DESIGN CURRENT 1.5A +LCD_VDD

APL3512ABI
DGPU_PWR_EN
DESIGN CURRENT 0.1A +3VS_DGPU
P-CHANNEL
AO-3413
VR_ON
DESIGN CURRENT 65A +CPU_CORE
ISL95833HRTZ DESIGN CURRENT 40A +GFX_CORE
B B
SUSP#
Ipeak=14.37A, Imax=10.06A, Iocp min=17.24A +1.05VS_VCCP

SY8208DQNC
VGA_PWROK#
DESIGN CURRENT 3A +1.05VS_DGPU
N-CHANNEL
AO3416
VCCP_PWRGOOD
DESIGN CURRENT 6A +VCCSA
G978F11U
SYSON
Ipeak=16.66A, Imax=11.66A, Iocp min=20A DESIGN CURRENT 2A +1.5V
RT8207MZQW 0.75VR_ON
DESIGN CURRENT 1.5A +0.75VS
SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5V_CPU

FDS6676AS
DESIGN CURRENT 2A +1.5VS
1.5_PWR_EN#
A A
N-CHANNEL DESIGN CURRENT 11A +VRAM_1.5VS

FDS6676AS
DGPU_PWR_EN
Ipeak=50A, Imax=35A, Iocp min=60A DESIGN CURRENT 30A +VGA_CORE
NCP81172MNTWG
Power Tree
1.0
VFKTA
5 4 3 2 1
A B C D E
( O MEANS ON X MEANS OFF )

Voltage Rails BTO Option Table
+5VS
+RTCVCC B+ +5VL +5VALW +1.5V Function CPU
+3VS
+3VL +3VALW
+1.8VS description IVB i7 3537U IVB i5 3337U IVB i3 3227U IVB i3 2375M IVB P 2117U IVB C 847
power +1.5VS
plane explain IVB i7 3537U IVB i5 3337U IVB i3 3227U IVB i3 2375M IVB P 2117U IVB C 847
+1.05VS
1
+0.75VS CPUI73537UR1@ CPUI53337UR1@ CPUI33227UR1@ CPUI32375MR1@ CPUP2117UR1@ CPUC847R1@ 1
+CPU_CORE
BTO
CPUI73537UR3@ CPUI53337UR3@ CPUI33227UR3@ CPUI32375MR3@ CPUP2117UR3@ CPUC847R3@
+VGA_CORE
+GFX_CORE
+VTT
State Function SKU PCH GPU VRAM EC
+VRAM_1.5VS
+3VS_DGPU description Optimus Panther Point N14M-GL N14P-GV2 Dual Rank EC
+1.05VS_DGPU
explain Optimus HM76 HM70 N14M-GL N14P-GV2 Dual Rank KB9012 NPCE885N
HM76R1@ HM70R1@ N14MGL@ N14PGV2@

BTO OPT@ DRANK@ 9012@ 885@
S0 N14MGLR1@ N14PGV2R1@
O O O O O O HM76R3@ HM70R3@
N14MGLR3@ N14PGV2R3@
S1
O O O O O O
Function LVDS-eDP Camera & Mic USB S&C CRT Touch Screen
S3
O O O O O X
description LVDS-eDP Camera & Mic 14640 14641 CRT Touch Screen
2 2
S5 S4/AC
O O O O X X explain LVDS eDP Camera & Mic 14640 14641 w/ CRT w/o CRT Touch Screen
S5 S4/ Battery only BTO LVDS@ IEDP@ CAM_EMI@ 14640@ 14641@ CRT@ CRT_EMI@ NOCRT@ TOUCH_EMI@
O O O X X X
S5 S4/AC & Battery
don't exist
O X X X X X Function WOWL G-SENSOR ZPODD GCLK VRAM SKU for GV2
description WOWL G-SENSOR ZPODD GCLK non-GCLK Single Rank
explain w/ w/o G-SENSOR w/ w/o GCLK non-GCLK Single Rank

PCH SM Bus Address
BTO WOWL@ NOWOWL@ GSENSOR@ ZPODD@ NONZP@ GCLK@ NOGCLK@ GVSR@
Power Device HEX Address

Function Sleep & Music KB Light EMI/ESD part
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b description Sleep & Music KB Light EMI/ESD part
+3VS WLAN/WIMAX
explain w/ S&M w/o S&M KB Light EMI/ESD part
3 3
BTO 269@ 259@ KBL@ EMI@ ESD@
SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5#
EC SM Bus1 Address EC SM Bus2 Address
Full ON HIGH HIGH HIGH
Power Device HEX Address Power Device HEX Address S1(Power On Suspend) HIGH HIGH HIGH
+3VL Smart Battery 16 H 0001 0110 b +3VS PCH 96 H 1001 0110 b S3 (Suspend to RAM) LOW HIGH HIGH
+3VL Smart Charger 12 H 0001 0010 b +3VS NVIDIA GPU 9E H 1001 1010 b
S4 (Suspend to Disk) LOW LOW HIGH
+3VL USB S&C 14640 35 H 0011 0101 b +3VS G-Sensor 40 H 0100 0000 b
S5 (Soft OFF) LOW LOW LOW
G3 LOW LOW LOW
4 4

Notes List
Custom 1.0
VFKTA
A B C D E
A B C D E
UC1B Stuff RC158&RC157 if do not support eDP

100 MHz
@ J3 CLK_CPU_DMI
BCLK CLK_CPU_DMI +1.05VS_VCCP
1000P_0402_50V7K 2 1 CC62 PM_DRAM_PWRGD_R H2 CLK_CPU_DMI#
BCLK# CLK_CPU_DMI#
MISC
CLOCKS
ESD@ H_SNB_IVB# F49 120 MHz LVDS@
1 2 CC63 H_SNB_IVB# PROC_SELECT# AG3
180P_0402_50V8J H_PWRGOOD_R CLK_CPU_EDP CLK_CPU_EDP# RC1571 2 1K_0402_5%
DPLL_REF_CLK AG1 CLK_CPU_EDP# CLK_CPU_EDP
C57 DPLL_REF_CLK# CLK_CPU_EDP#
@ESD@ T1 PAD TP_SKTOCC# CLK_CPU_EDP RC1581 2 1K_0402_5%
100P_0402_50V8J 1 2 CC1 H_THERMTRIP# PROC_DETECT# LVDS@
T2 PAD H_CATERR# C49 @ESD@

CATERR# H_DRAMRST# 1 2
THERMAL
1 CC34 180P_0402_50V8J 1
H_PECI A48 AT30 H_DRAMRST#

H_PECI PECI SM_DRAMRST# H_DRAMRST#
by ESD requestion and place near CPU by ESD requestion and place near CPU
RC159 BF44 SM_RCOMP_0 RC56 2 1 140_0402_1% DDR3 Compensation Signals
SM_RCOMP[0]
DDR3
MISC
+1.05VS_VCCP 1 2 H_PROCHOT#_R C45 BE43 SM_RCOMP_1 RC59 2 1 25.5_0402_1% Layout Note:Place these
H_PROCHOT# PROCHOT# SM_RCOMP[1]
56_0402_5% BG43 SM_RCOMP_2 RC61 2 1 200_0402_1% resistors near Processor
SM_RCOMP[2]
RC44 2 1 62_0402_5% H_PROCHOT#
H_THERMTRIP# D45
H_THERMTRIP# THERMTRIP# @ESD@
H_DRAMRST# 1 2
RC45 2 1 10K_0402_5% H_PWRGOOD N53 CC35 180P_0402_50V8J
PRDY# N55
PREQ#
L56 XDP_TCK T3 PAD TP@
TCK L55 XDP_TMS T4 PAD TP@
TMS
PWR MANAGEMENT
J58 XDP_TRST# 1 2 Routed as a single daisy chain
TRST# RC55 51_0402_5%
JTAG & BPM

@ H_PM_SYNC C48 M60 XDP_TDI
H_PM_SYNC PM_SYNC TDI
1000P_0402_50V7K 2 1 CC70 H_PECI L59 XDP_TDO T6 PAD TP@
TDO T7 PAD TP@
@
1000P_0402_50V7K 2 1 CC67 H_PM_SYNC H_PWRGOOD
1 2 H_PWRGOOD_R B46
Rshort@
UNCOREPWRGOOD K58
RC183 0_0402_5%
DBR# Close to CPU side
@
1000P_0402_50V7K 2 1 CC66 BUF_CPU_RST#
PM_SYS_PWRGD_BUF 1 2 PM_DRAM_PWRGD_R BE45 G58
RC170 130_0402_5% SM_DRAMPWROK BPM#[0] E55
BPM#[1] E59
BPM#[2] G55
2 Please place near JCPU BPM#[3] G59 2
BUF_CPU_RST# D44 BPM#[4] H60
RESET# BPM#[5] J59
BPM#[6] J61
BPM#[7]
+3VALW_PCH
2 1 DRAMPWROK +3VALW_PCH
RC11 200_0402_5% +1.5V_CPU
IVY-BRIDGE_BGA1023 <BOM>
1
0218. Delete 0.1u CPU@
RC14
UC3 200_0402_5%
5
10K_0402_5% 74AHC1G09GW_TSSOP5
2
2 RC13 1 1
P
+3VS B 4 PM_SYS_PWRGD_BUF
DRAMPWROK 2 O
DRAMPWROK A
G
3
3 3
Buffered Rest to CPU XDP Connector FAN Control Circuit

+3VS
+5VS +3VS
0218. Delete 0.1u
1
1A
+1.05VS_VCCP 1 2
Rshort@ +FAN1 R2 JFAN Conn@
PLT_RST#
R1 0_0603_5% 10K_0402_5% 6
5 GND
GND
1
UC2 4
2
PLT_RST# 1 RC38 3 4
OE# FANPWM 3
5 75_0402_5% 2
VCC FAN_SPEED1 +FAN1 1 2
2 RC35 1
2
IN 43_0402_1%
4 BUFO_CPU_RST# 1 2 BUF_CPU_RST# ACES_50273-0040N-001
3 OUT
GND
74AHC1G125GW_SOT353-5
1
1
D1 C5
4 4
BAS16_SOT23-3 2
2
10U_0603_6.3V6M

Ivy Bridge_JTAG/XDP/FAN
Custom 1.0
VFKTA
A B C D E
A B C D E
PEG_ICOMPI and RCOMPO signals should be

+1.05VS_VCCP shorted and routed
with - max length = 500 mils - typical
1
impedance = 43 m ohm (4 mils)
RC1
24.9_0402_1%
PEG_ICOMPO signals should be routed with -
max length = 500 mils
UC1A
- typical impedance = 14.5 m ohm (12 mils)
2
G3 PEG_COMP
PEG_ICOMPI G1
1 DMI_PTX_CRX_N0 M2 PEG_ICOMPO G4 1
DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 P6 DMI_RX#[0] PEG_RCOMPO
DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 P1 DMI_RX#[1]
DMI_PTX_CRX_N2 P10 DMI_RX#[2] H22 PCIE_GTX_C_CRX_N[0..15]
DMI_PTX_CRX_N3 PCIE_GTX_C_CRX_N0
DMI_PTX_CRX_N3 DMI_RX#[3] PEG_RX#[0] J21 PCIE_GTX_C_CRX_N1
DMI_PTX_CRX_P0 N3 PEG_RX#[1] B22 PCIE_GTX_C_CRX_N2
DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 P7 DMI_RX[0] PEG_RX#[2] D21 PCIE_GTX_C_CRX_N3
DMI_PTX_CRX_P1 DMI_RX[1] PEG_RX#[3]
DMI
DMI_PTX_CRX_P2 P3 A19
DMI_PTX_CRX_P2 DMI_PTX_CRX_P3 P11 DMI_RX[2] PEG_RX#[4] D17
DMI_PTX_CRX_P3 DMI_RX[3] PEG_RX#[5] B14
DMI_CTX_PRX_N0 K1 PEG_RX#[6] D13
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 M8 DMI_TX#[0] PEG_RX#[7] A11
DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 N4 DMI_TX#[1] PEG_RX#[8] B10
DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 R2 DMI_TX#[2] PEG_RX#[9] G8
DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] A8
DMI_CTX_PRX_P0 K3 PEG_RX#[11] B6
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 M7 DMI_TX[0] PEG_RX#[12] H8
DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 P4 DMI_TX[1] PEG_RX#[13] E5
DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 T3 DMI_TX[2] PEG_RX#[14] K7
DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15]
K22 PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_P[0..15]
PEG_RX[0] K19 PCIE_GTX_C_CRX_P1
PEG_RX[1] C21 PCIE_GTX_C_CRX_P2
FDI_CTX_PRX_N0 U7 PEG_RX[2] D19 PCIE_GTX_C_CRX_P3
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 W11 FDI0_TX#[0] PEG_RX[3] C19
FDI_CTX_PRX_N1 W1 FDI0_TX#[1] PEG_RX[4] D16
FDI_CTX_PRX_N2
FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 AA6 FDI0_TX#[2] PEG_RX[5] C13
FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 W6 FDI0_TX#[3] PEG_RX[6] D12
FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 V4 FDI1_TX#[0] PEG_RX[7] C11
PCI EXPRESS -- GRAPHICS

FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 Y2 FDI1_TX#[1] PEG_RX[8] C9
FDI_CTX_PRX_N6 AC9 FDI1_TX#[2] PEG_RX[9] F8
FDI_CTX_PRX_N7
FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
Intel(R) FDI
C8
2 PEG_RX[11] C5 2
FDI_CTX_PRX_P0 U6 PEG_RX[12] H6
FDI_CTX_PRX_P0 W10 FDI0_TX[0] PEG_RX[13] F6
FDI_CTX_PRX_P1
FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 W3 FDI0_TX[1] PEG_RX[14] K6
FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 AA7 FDI0_TX[2] PEG_RX[15]
FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 W7 FDI0_TX[3] G22 PCIE_CTX_GRX_N0 1 2 PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N[0..15]
CC8 OPT@ 0.22U_0402_16V7K
FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 T4 FDI1_TX[0] PEG_TX#[0] C23 PCIE_CTX_GRX_N1 1 2 PCIE_CTX_C_GRX_N1
CC11 OPT@ 0.22U_0402_16V7K
FDI_CTX_PRX_P5 AA3 FDI1_TX[1] PEG_TX#[1] D23 1 2
FDI_CTX_PRX_P6 PCIE_CTX_GRX_N2 CC16 OPT@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N2
FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 AC8 FDI1_TX[2] PEG_TX#[2] F21 PCIE_CTX_GRX_N3 1 2 PCIE_CTX_C_GRX_N3
CC20 OPT@ 0.22U_0402_16V7K
FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] H19
FDI_FSYNC0 AA11 PEG_TX#[4] C17
FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
FDI_FSYNC1 AC12 K15
FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17
FDI_INT U11 PEG_TX#[7] F14
FDI_INT FDI_INT PEG_TX#[8] A15
FDI_LSYNC0 AA10 PEG_TX#[9] J14
FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10]
FDI_LSYNC1 AG8 H13
FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] M10
PEG_TX#[12] F10
PEG_TX#[13] D9
PEG_TX#[14] J4
RC2 1 2 24.9_0402_1% EDP_COMP AF3 PEG_TX#[15]
+1.05VS_VCCP eDP_COMPIO PCIE_CTX_C_GRX_P[0..15]
AD2 F22 PCIE_CTX_GRX_P0 CC10 1 2 OPT@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P0
H_EDP_HPD# AG11 eDP_ICOMPO PEG_TX[0] A23 PCIE_CTX_GRX_P1 CC5 1 2 OPT@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P1
eDP_HPD# PEG_TX[1] D24 PCIE_CTX_GRX_P2 1 2 PCIE_CTX_C_GRX_P2
eDP_COMP signals should be PEG_TX[2]
CC6 OPT@ 0.22U_0402_16V7K
E21 PCIE_CTX_GRX_P3 CC7 1 2 OPT@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P3
shorted near balls and AG4 PEG_TX[3] G19
H_EDP_AUXN eDP_AUX# PEG_TX[4]
routed with typical H_EDP_AUXP
AF4
eDP_AUX PEG_TX[5]
B18
K17
impedance <25m ohm PEG_TX[6]
eDP
G17
AC3 PEG_TX[7] E14
H_EDP_TXN0 AC4 eDP_TX#[0] PEG_TX[8] C15
3 H_EDP_TXN1 AE11 eDP_TX#[1] PEG_TX[9] K13 3
AE7 eDP_TX#[2] PEG_TX[10] G13
eDP_TX#[3] PEG_TX[11] K10
AC1 PEG_TX[12] G10
H_EDP_TXP0 AA4 eDP_TX[0] PEG_TX[13] D8
H_EDP_TXP1 AE10 eDP_TX[1] PEG_TX[14] K4
AE6 eDP_TX[2] PEG_TX[15]
eDP_TX[3]
+1.05VS_VCCP IVY-BRIDGE_BGA1023 <BOM>

CPU@
2
RC10
PEG DG suggest AC cap
1K_0402_5%
Gen1/Gen2 75 nF~265 nF
1
H_EDP_HPD# IVY Bridge

Gen3 180 nF~265 nF
1
D
2 2N7002_SOT23-3
CPU_EDP_HPD QC1
G SANDY Bridge Gen1/Gen2 180 nF~265 nF
S IEDP@
3
2
IEDP@
RC9 NV N13X Gen1/2/3 Suggest 220 nF
100K_0402_5%
1
4 4

Ivy Bridge_DMI/PEG/FDI
Custom 1.0
VFKTA
A B C D E
A B C D E
DDR_A_D[0..63]
DDR_B_D[0..63]
UC1C UC1D
DDR_A_D0 AG6 DDR_B_D0 AL4

DDR_A_D1 AJ6 SA_DQ[0] AU36 DDRA_CLK0 DDR_B_D1 AL1 SB_DQ[0] BA34 DDRB_CLK0
AP11 SA_DQ[1] SA_CK[0] AV36 DDRA_CLK0 AN3 SB_DQ[1] SB_CK[0] AY34 DDRB_CLK0
DDR_A_D2 DDRA_CLK0# DDR_B_D2 DDRB_CLK0#
AL6 SA_DQ[2] SA_CK#[0] AY26 DDRA_CLK0# AR4 SB_DQ[2] SB_CK#[0] AR22 DDRB_CLK0#
DDR_A_D3 DDRA_CKE0 DDR_B_D3 DDRB_CKE0
DDR_A_D4 AJ10 SA_DQ[3] SA_CKE[0] DDRA_CKE0 DDR_B_D4 AK4 SB_DQ[3] SB_CKE[0] DDRB_CKE0
DDR_A_D5 AJ8 SA_DQ[4] DDR_B_D5 AK3 SB_DQ[4]
DDR_A_D6 AL8 SA_DQ[5] DDR_B_D6 AN4 SB_DQ[5]
DDR_A_D7 AL7 SA_DQ[6] DDR_B_D7 AR1 SB_DQ[6]
1 DDR_A_D8 AR11 SA_DQ[7] DDR_B_D8 AU4 SB_DQ[7] 1
DDR_A_D9 AP6 SA_DQ[8] AT40 DDRA_CLK1 DDR_B_D9 AT2 SB_DQ[8] BA36 DDRB_CLK1
DDR_A_D10 AU6 SA_DQ[9] SA_CK[1] AU40 DDRA_CLK1# DDRA_CLK1 DDR_B_D10 AV4 SB_DQ[9] SB_CK[1] BB36 DDRB_CLK1# DDRB_CLK1
DDR_A_D11 AV9 SA_DQ[10] SA_CK#[1] BB26 DDRA_CKE1 DDRA_CLK1# DDR_B_D11 BA4 SB_DQ[10] SB_CK#[1] BF27 DDRB_CKE1 DDRB_CLK1#
AR6 SA_DQ[11] SA_CKE[1] DDRA_CKE1 AU3 SB_DQ[11] SB_CKE[1] DDRB_CKE1
DDR_A_D12 DDR_B_D12
DDR_A_D13 AP8 SA_DQ[12] DDR_B_D13 AR3 SB_DQ[12]
DDR_A_D14 AT13 SA_DQ[13] DDR_B_D14 AY2 SB_DQ[13]
DDR_A_D15 AU13 SA_DQ[14] DDR_B_D15 BA3 SB_DQ[14]
DDR_A_D16 BC7 SA_DQ[15] DDR_B_D16 BE9 SB_DQ[15]
DDR_A_D17 BB7 SA_DQ[16] BB40 DDRA_SCS0# DDR_B_D17 BD9 SB_DQ[16] BE41 DDRB_SCS0#
DDR_A_D18 BA13 SA_DQ[17] SA_CS#[0] BC41 DDRA_SCS1# DDRA_SCS0# DDR_B_D18 BD13 SB_DQ[17] SB_CS#[0] BE47 DDRB_SCS1# DDRB_SCS0#
DDR_A_D19 BB11 SA_DQ[18] SA_CS#[1] DDRA_SCS1# DDR_B_D19 BF12 SB_DQ[18] SB_CS#[1] DDRB_SCS1#
DDR_A_D20 BA7 SA_DQ[19] DDR_B_D20 BF8 SB_DQ[19]
DDR_A_D21 BA9 SA_DQ[20] DDR_B_D21 BD10 SB_DQ[20]
DDR_A_D22 BB9 SA_DQ[21] DDR_B_D22 BD14 SB_DQ[21]
DDR_A_D23 AY13 SA_DQ[22] DDR_B_D23 BE13 SB_DQ[22]
DDR_A_D24 AV14 SA_DQ[23] AY40 DDRA_ODT0 DDR_B_D24 BF16 SB_DQ[23] AT43 DDRB_ODT0
DDR_A_D25 AR14 SA_DQ[24] SA_ODT[0] BA41 DDRA_ODT1 DDRA_ODT0 DDR_B_D25 BE17 SB_DQ[24] SB_ODT[0] BG47 DDRB_ODT1 DDRB_ODT0
DDR_A_D26 AY17 SA_DQ[25] SA_ODT[1] DDRA_ODT1 DDR_B_D26 BE18 SB_DQ[25] SB_ODT[1] DDRB_ODT1
DDR_A_D27 AR19 SA_DQ[26] DDR_B_D27 BE21 SB_DQ[26]
DDR_A_D28 BA14 SA_DQ[27] DDR_B_D28 BE14 SB_DQ[27]
DDR_A_D29 AU14 SA_DQ[28] DDR_B_D29 BG14 SB_DQ[28]
DDR_A_D30 BB14 SA_DQ[29] DDR_B_D30 BG18 SB_DQ[29]
BB17 SA_DQ[30] AL11 DDR_A_DQS#[0..7] BF19 SB_DQ[30] AL3 DDR_B_DQS#0 DDR_B_DQS#[0..7]
DDR_A_D31 DDR_A_DQS#0 DDR_B_D31
DDR_A_D32 BA45 SA_DQ[31] SA_DQS#[0] AR8 DDR_A_DQS#1 DDR_B_D32 BD50 SB_DQ[31] SB_DQS#[0] AV3 DDR_B_DQS#1
DDR_A_D33 AR43 SA_DQ[32] SA_DQS#[1] AV11 DDR_A_DQS#2 DDR_B_D33 BF48 SB_DQ[32] SB_DQS#[1] BG11 DDR_B_DQS#2
DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 DDR_B_D34 BD53 SB_DQ[33] SB_DQS#[2] BD17 DDR_B_DQS#3
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 DDR_B_D35 BF52 SB_DQ[34] SB_DQS#[3] BG51 DDR_B_DQS#4
DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 DDR_B_D36 BD49 SB_DQ[35] SB_DQS#[4] BA59 DDR_B_DQS#5
DDR_A_D37 AR45 SA_DQ[36] SA_DQS#[5] AT55 DDR_A_DQS#6 DDR_B_D37 BE49 SB_DQ[36] SB_DQS#[5] AT60 DDR_B_DQS#6
DDR SYSTEM MEMORY A
SA_DQ[37] SA_DQS#[6] SB_DQ[37] SB_DQS#[6]
DDR SYSTEM MEMORY B

DDR_A_D38 AT48 AK55 DDR_A_DQS#7 DDR_B_D38 BD54 AK59 DDR_B_DQS#7
DDR_A_D39 AY48 SA_DQ[38] SA_DQS#[7] DDR_B_D39 BE53 SB_DQ[38] SB_DQS#[7]
2 DDR_A_D40 BA49 SA_DQ[39] DDR_B_D40 BF56 SB_DQ[39] 2
DDR_A_D41 AV49 SA_DQ[40] DDR_B_D41 BE57 SB_DQ[40]
DDR_A_D42 BB51 SA_DQ[41] DDR_B_D42 BC59 SB_DQ[41]
DDR_A_D43 AY53 SA_DQ[42] DDR_B_D43 AY60 SB_DQ[42]
DDR_A_D44 BB49 SA_DQ[43] DDR_B_D44 BE54 SB_DQ[43]
DDR_A_D45 AU49 SA_DQ[44] AJ11 DDR_A_DQS0 DDR_A_DQS[0..7] DDR_B_D45 BG54 SB_DQ[44]
DDR_A_D46 BA53 SA_DQ[45] SA_DQS[0] AR10 DDR_A_DQS1 DDR_B_D46 BA58 SB_DQ[45] AM2 DDR_B_DQS0 DDR_B_DQS[0..7]
DDR_A_D47 BB55 SA_DQ[46] SA_DQS[1] AY11 DDR_A_DQS2 DDR_B_D47 AW59 SB_DQ[46] SB_DQS[0] AV1 DDR_B_DQS1
DDR_A_D48 BA55 SA_DQ[47] SA_DQS[2] AU17 DDR_A_DQS3 DDR_B_D48 AW58 SB_DQ[47] SB_DQS[1] BE11 DDR_B_DQS2
DDR_A_D49 AV56 SA_DQ[48] SA_DQS[3] AW45 DDR_A_DQS4 DDR_B_D49 AU58 SB_DQ[48] SB_DQS[2] BD18 DDR_B_DQS3
DDR_A_D50 AP50 SA_DQ[49] SA_DQS[4] AV51 DDR_A_DQS5 DDR_B_D50 AN61 SB_DQ[49] SB_DQS[3] BE51 DDR_B_DQS4
DDR_A_D51 AP53 SA_DQ[50] SA_DQS[5] AT56 DDR_A_DQS6 DDR_B_D51 AN59 SB_DQ[50] SB_DQS[4] BA61 DDR_B_DQS5
DDR_A_D52 AV54 SA_DQ[51] SA_DQS[6] AK54 DDR_A_DQS7 DDR_B_D52 AU59 SB_DQ[51] SB_DQS[5] AR59 DDR_B_DQS6
DDR_A_D53 AT54 SA_DQ[52] SA_DQS[7] DDR_B_D53 AU61 SB_DQ[52] SB_DQS[6] AK61 DDR_B_DQS7
DDR_A_D54 AP56 SA_DQ[53] DDR_B_D54 AN58 SB_DQ[53] SB_DQS[7]
DDR_A_D55 AP52 SA_DQ[54] DDR_B_D55 AR58 SB_DQ[54]
DDR_A_D56 AN57 SA_DQ[55] DDR_B_D56 AK58 SB_DQ[55]
DDR_A_D57 AN53 SA_DQ[56] DDR_B_D57 AL58 SB_DQ[56]
DDR_A_D58 AG56 SA_DQ[57] DDR_B_D58 AG58 SB_DQ[57]
DDR_A_D59 AG53 SA_DQ[58] DDR_B_D59 AG59 SB_DQ[58]
DDR_A_D60 AN55 SA_DQ[59] DDR_A_MA[0..15] DDR_B_D60 AM60 SB_DQ[59]
AN52 SA_DQ[60] BG35 AL59 SB_DQ[60] BF32 DDR_B_MA[0..15]
DDR_A_D61 DDR_A_MA0 DDR_B_D61 DDR_B_MA0
DDR_A_D62 AG55 SA_DQ[61] SA_MA[0] BB34 DDR_A_MA1 DDR_B_D62 AF61 SB_DQ[61] SB_MA[0] BE33 DDR_B_MA1
DDR_A_D63 AK56 SA_DQ[62] SA_MA[1] BE35 DDR_A_MA2 DDR_B_D63 AH60 SB_DQ[62] SB_MA[1] BD33 DDR_B_MA2
SA_DQ[63] SA_MA[2] BD35 DDR_A_MA3 SB_DQ[63] SB_MA[2] AU30 DDR_B_MA3
SA_MA[3] AT34 DDR_A_MA4 SB_MA[3] BD30 DDR_B_MA4
SA_MA[4] AU34 DDR_A_MA5 SB_MA[4] AV30 DDR_B_MA5
SA_MA[5] BB32 DDR_A_MA6 SB_MA[5] BG30 DDR_B_MA6
DDR_A_BS0 BD37 SA_MA[6] AT32 DDR_A_MA7 DDR_B_BS0 BG39 SB_MA[6] BD29 DDR_B_MA7
DDR_A_BS0 DDR_A_BS1 BF36 SA_BS[0] SA_MA[7] AY32 DDR_A_MA8 DDR_B_BS0 DDR_B_BS1 BD42 SB_BS[0] SB_MA[7] BE30 DDR_B_MA8
DDR_A_BS1 DDR_A_BS2 BA28 SA_BS[1] SA_MA[8] AV32 DDR_A_MA9 DDR_B_BS1 DDR_B_BS2 AT22 SB_BS[1] SB_MA[8] BE28 DDR_B_MA9
DDR_A_BS2 SA_BS[2] SA_MA[9] BE37 DDR_B_BS2 SB_BS[2] SB_MA[9] BD43
DDR_A_MA10 DDR_B_MA10
3 SA_MA[10] BA30 DDR_A_MA11 SB_MA[10] AT28 DDR_B_MA11 3
SA_MA[11] BC30 DDR_A_MA12 SB_MA[11] AV28 DDR_B_MA12
DDR_A_CAS# BE39 SA_MA[12] AW41 DDR_A_MA13 DDR_B_CAS# AV43 SB_MA[12] BD46 DDR_B_MA13
DDR_A_CAS# DDR_A_RAS# BD39 SA_CAS# SA_MA[13] AY28 DDR_A_MA14 DDR_B_CAS# DDR_B_RAS# BF40 SB_CAS# SB_MA[13] AT26 DDR_B_MA14
DDR_A_RAS# AT41 SA_RAS# SA_MA[14] AU26 DDR_B_RAS# BD45 SB_RAS# SB_MA[14] AU22
DDR_A_WE# DDR_A_MA15 DDR_B_WE# DDR_B_MA15
DDR_A_WE# SA_WE# SA_MA[15] DDR_B_WE# SB_WE# SB_MA[15]
IVY-BRIDGE_BGA1023 <BOM> IVY-BRIDGE_BGA1023 <BOM>

CPU@ CPU@
+1.5V
1
RC76
1K_0402_5%
RC77
2
QC3 1K_0402_5%
3 1 1 2
S
H_DRAMRST# H_DRAMRST# DDR3_DRAMRST#_R

SM_DRAMRST#
2
BSS138 1N SOT23-3
RC78
G
2
4.99K_0402_1%
1
4 4
RC73 0_0402_5%
1 2 DRAMRST_CNTRL
Rshort@
DRAMRST_CNTRL_PCH
1
CC37 Security Classification Compal Secret Data Compal Electronics, Inc.
0.047U_0402_25V6K 2012/04/19 2015/04/19 Title
Issued Date Deciphered Date
2
Ivy Bridge_DDR3
Custom 1.0
VFKTA
A B C D E
A B C D E
+CPU_CORE UC1F POWER +1.05VS_VCCP
33A 8.5A +1.05VS_VCCP
AF46
VCCIO[1] AG48
VCCIO[3]
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
AG50
VCCIO[4]
ESD@ CC17
ESD@ CC18
ESD@ CC19
A26 AG51 1 1 1
A29 VCC[1] VCCIO[5] AJ17
1 A35 VCC[4] VCCIO[8] AJ43 2 2 2 1
A39 VCC[6] VCCIO[10] AK50
A42 VCC[7] VCCIO[11] AK51
C26 VCC[8] VCCIO[12] AL14
VCC[9] VCCIO[13] For DDR
C27 AL15
VCC[14] VCCIO[18] by ESD requestion and place near CPU
C42 AL45
D27 VCC[15] VCCIO[19] AL48
D32 VCC[16] VCCIO[20] AM16
PEG IO AND DDR IO

E26 VCC[21] VCCIO[25] AN20
E37 VCC[25] VCCIO[29]
E38 VCC[26]
VCC[27]
CORE SUPPLY
F25
F26 VCC[28]
F28 VCC[29]
F32 VCC[30]
F34 VCC[31]
F37 VCC[32] AA14
F38 VCC[33] VCCIO[30] AA15
F42 VCC[34] VCCIO[31] AB17
G42 VCC[35] VCCIO[32] AB20
2 H25 VCC[36] VCCIO[33] AC13 2
H26 VCC[37] VCCIO[34] AD16
H32 VCC[40] VCCIO[37] AE14
VCC[41] VCCIO[38] For PEG
H34 AE15
H35 VCC[42] VCCIO[39] AF16
H40 VCC[45] VCCIO[42] AG15
J25 VCC[46] VCCIO[43] AG16
J32 VCC[50] VCCIO[47] AJ14
J34 VCC[51] VCCIO[48] AJ15
J35 VCC[52] VCCIO[49]
J37 VCC[53]
J38 VCC[54] +1.05VS_VCCP
J40 VCC[55]
J42 VCC[56]
K26 VCC[57] W16
K27 VCC[58] VCCIO50 W17
K29 VCC[59] VCCIO51
K32 VCC[60]
K34 VCC[61]
K35 VCC[62]
K37 VCC[63]
K39 VCC[64] 1mA
K42 VCC[66] BC22
L25 VCC[67] VCCIO_SEL
L28 VCC[68]
3 L33 VCC[69] 3
L36 VCC[70] +1.05VS_VCCP
L40 VCC[71]
N26 VCC[72] +1.05VS_VCCP +1.05VS_VCCP
N30 VCC[73] AM25
QUIET
RAILS
N34 VCC[74] VCCPQE[1] AN22

N38 VCC[75] VCCPQE[2]
VCC[76] 1
CC71
1
1
1U_0402_6.3V6K
RC91 RC89
2 130_0402_5% 75_0402_5%
2
2
A44 H_CPU_SVIDALRT# 1 2
VIDALERT# B43 VR_SVID_ALRT#
RC90 43_0402_1%
VIDSCLK VR_SVID_CLK
SVID
C44
VIDSOUT VR_SVID_DAT
+CPU_CORE Pull high resistor on VR side
2
RC93
100_0402_1%
1
F43
VCC_SENSE VCCSENSE
SENSE LINES
G43
VSS_SENSE VSSSENSE
1
VCCIO_SENSE
VCCIO_SENSE
RC97
1
RC98 100_0402_1%
AN16 10_0402_1%
4 VCCIO_SENSE AN17 4
2
VSS_SENSE_VCCIO
+1.05VS_VCCP Close to CPU

2
1
CPU@ RC96
10_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.
Close to CPU Ivy Bridge_POWER-1

2
Custom 1.0
VFKTA
A B C D E
A B C D E
Intel DDR Vref M3

+GFX_CORE UC1G POWER +V_SM_VREF should
+1.5V_CPU
29A have 20 mil trace width RC120 1K_0402_0.5%

1 2
AY43 +V_SM_VREF BSS138 1N SOT23-3
AA46 SM_VREF CC65 1 2 QC7
VREF
VAXG[1]
0.1U_0402_10V7K
AB47 3 1
D
1 RC109 1K_0402_0.5% +VREF_DQA_M3 +VREF_DQA
AB50 VAXG[2] BE7
VAXG[3] SA_DIMM_VREFDQ +VREF_DQA_M3
AB51 BG7
1 VAXG[4] SB_DIMM_VREFDQ +VREF_DQB_M3 1
AB52
G
2
AB53 VAXG[5] 2
AB55 VAXG[6]
AB56 VAXG[7]
AB58 VAXG[8] 5A DRAMRST_CNTRL_PCH
AB59 VAXG[9]
VAXG[10]
2
G
AC61
AD47 VAXG[11] +1.5V_CPU
AD48 VAXG[12] 3 1
VAXG[13] +VREF_DQB_M3 +VREF_DQB
AD50 Place TOP IN BGA
D
AD51 VAXG[14] AJ28 CC57 CC51 CC52 CC55 CC54 CC56 CC50 CC53 QC8
VAXG[15] VDDQ[1]
- 1.5V RAILS
BSS138 1N SOT23-3
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
47U_0805_6.3V6M
47U_0805_6.3V6M
AD52 AJ33
AD53 VAXG[16] VDDQ[2] AJ36
VAXG[17] VDDQ[3] 2 2 2 2 2 2
1
AD55 AJ40
AD56 VAXG[18] VDDQ[4] AL30
AD58 VAXG[19] VDDQ[5] AL34 @ @
2
AD59 VAXG[20] VDDQ[6] AL38 1 1 1 1 1 1
AE46 VAXG[21] VDDQ[7] AL42
N45 VAXG[22] VDDQ[8] AM33
P47 VAXG[23] VDDQ[9] AM36
P48 VAXG[24] VDDQ[10] AM40
+1.5V_CPU Decoupling:
VAXG[25] VDDQ[11]
P50
P51 VAXG[26] VDDQ[12]
AN30
AN34
2X 47U(MLCC), 6X 10U, 8X 1U
P52 VAXG[27] VDDQ[13] AN38
P53 VAXG[28] VDDQ[14] AR26 Place BOT OUT BGA
DDR3
P55 VAXG[29] VDDQ[15] AR28
GRAPHICS
P56 VAXG[30] VDDQ[16] AR30
P61 VAXG[31] VDDQ[17] AR32 CC82 CC81 CC80 CC79 CC78 CC87 CC86 CC85
VAXG[32] VDDQ[18]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
T48 AR34 1 1 1 1 1 1 1 1
T58 VAXG[33] VDDQ[19] AR36
T59 VAXG[34] VDDQ[20] AR40
T61 VAXG[35] VDDQ[21] AV41
2 U46 VAXG[36] VDDQ[22] AW26 2 2 2 2 2 2 2 2 2
V47 VAXG[37] VDDQ[23] BA40
V48 VAXG[38] VDDQ[24] BB28
V50 VAXG[39] VDDQ[25] BG33
V51 VAXG[40] VDDQ[26]
V52 VAXG[41]
V53 VAXG[42]
V55 VAXG[43]
V56 VAXG[44]
V58 VAXG[45]
V59 VAXG[46]
W50 VAXG[47] 1mA
W51 VAXG[48]
W52 VAXG[49]
W53 VAXG[50]
W55 VAXG[51]
+GFX_CORE W56 VAXG[52]
W61 VAXG[53]
Y48 VAXG[54]
VAXG[55] VCCSA_VID0 VCCSA_VID1 +VCCSA
Y61
VAXG[56]
1
RC105 0 0 0.90 V
100_0402_1%
+1.5V_CPU
For Sandy Bridge
Close to CPU 0 1 0.80 V
2
QUIET RAILS
AM28
SENSE
LINES
VCC_AXG_SENSE F45 VCCDQ[1] AN26

VCC_AXG_SENSE G45 VAXG_SENSE VCCDQ[2]
VSS_AXG_SENSE 1 1 0 0.725 V
VSS_AXG_SENSE VSSAXG_SENSE
RC106 CC72
1 2 1U_0402_6.3V6K
VCCPLL Decoupling: 100_0402_1%
2
1 1 0.675 V
3
1X 330U (6m ohm), 1X 10U, 2x1U 1.2A
3
1.8V RAIL
1 Rshort@ 2 +1.8VS_VCCPLL BB3

+1.8VS VCCPLL[1]
RC119 0_0805_5% CC60 BC1
VCCPLL[2]
1U_0402_6.3V6K
Reserve for power consumption 1 1 BC4

CC59 VCCPLL[3]
Remove on PVT phase +1.5V_CPU +1.5V
10U_0603_6.3V6M
2 2 BC43
VDDQ_SENSE BA43 CC46 1 2@ 0.1U_0402_10V7K
VSS_SENSE_VDDQ
SENSE LINES
+1.5V_CPU +1.5VS
+VCCSA L17 6A CC47 1 2@ 0.1U_0402_10V7K JP@
PJ1
L21 VCCSA[1] 2 1
Place TOP IN BGA VCCSA[2] 2 1
N16 CC48 1 2@ 0.1U_0402_10V7K
CC44 CC40 CC42 CC41 CC43 N20 VCCSA[3] JUMP_43X39
VCCSA[4] +1.5V
47U_0805_6.3V6M
47U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
N22 CC45 1 2@ 0.1U_0402_10V7K

SA RAIL
P17 VCCSA[5]
2 2 2 VCCSA[6]
Vgs=10V,Id=14.5A,Rds=6mohm QC4
1
P20 U10 1 8
R16 VCCSA[7] VCCSA_SENSE 2 S D 7
VCCSA[8] S D
2
@ @ R18 1 3 6
2
1 1 1 R21 VCCSA[9] RC203 CC68 4 S D 5

U15 VCCSA[10] 470_0805_5% @ 10U_0603_6.3V6M G D
VCCSA VID
V16 VCCSA[11] FDS6676AS_SO8 RC204

V17 VCCSA[12] D48 H_VCCSA_VID0 2 RUN_ON_CPU1.5VS3 1 2
H_VCCSA_VID0 B+
3 1
VCCSA[13] VCCSA_VID[0]
lines
Place BOT OUT BGA V18 D49 H_VCCSA_VID1 220K_0402_5%

V21 VCCSA[14] VCCSA_VID[1] H_VCCSA_VID1
VCCSA[15]
6
W20 Please kindly check whether 2N7002KDWH_SOT363-6 1
CC77 CC76 CC75 CC74 CC73 VCCSA[16] QC5B CC69 RC205 QC5A
there is pull-down resister
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 in PWR-side or HW-side SUSP 5 0.1U_0402_25V6 820K_0402_5%

2 SUSP
2 SUSP
2
1
4 2 2 2 2 2 CPU@ 2N7002KDWH_SOT363-6 4
+VCCSA Decoupling:
2X 47U(MLCC), 3X 10U, 5X 1U
Ivy Bridge_POWER-2
Custom 1.0
VFKTA
A B C D E
A B C D E
UC1H
UC1I
CFG Straps for Processor
UC1E (CFG[17:0] internal pull high 5~15K to VCCIO)
A13 AM38 BG17 M4
A17 VSS[1] VSS[91] AM4 BG21 VSS[181] VSS[250] M58 TP@ CFG2
A21 VSS[2] VSS[92] AM42 BG24 VSS[182] VSS[251] M6 CFG0 B50 N59
VSS[3] VSS[93] VSS[183] VSS[252] CFG[0] BCLK_ITP
1
A25 AM45 BG28 N1 T89 PAD C51 N58
A28 VSS[4] VSS[94] AM48 BG37 VSS[184] VSS[253] N17 CFG2 B54 CFG[1] BCLK_ITP# RC79
A33 VSS[5] VSS[95] AM58 BG41 VSS[185] VSS[254] N21 D53 CFG[2] 1K_0402_1%
A37 VSS[6] VSS[96] AN1 BG45 VSS[186] VSS[255] N25 CFG4 A51 CFG[3] N42 @
A40 VSS[7] VSS[97] AN21 BG49 VSS[187] VSS[256] N28 CFG5 C53 CFG[4] RSVD30 L42
2
A45 VSS[8] VSS[98] AN25 BG53 VSS[188] VSS[257] N33 CFG6 C55 CFG[5] RSVD31 L45
1 A49 VSS[9] VSS[99] AN28 BG9 VSS[189] VSS[258] N36 CFG7 H49 CFG[6] RSVD32 L47 1
A53 VSS[10] VSS[100] AN33 C29 VSS[190] VSS[259] N40 A55 CFG[7] RSVD33
A9 VSS[11] VSS[101] AN36 C35 VSS[191] VSS[260] N43 H51 CFG[8]
AA1 VSS[12] VSS[102] AN40 C40 VSS[192] VSS[261] N47 K49 CFG[9] M13
VSS[13] VSS[103] VSS[193] VSS[262] CFG[10] RSVD34 PEG Static Lane Reversal - CFG2 is for the 16x
AA13 AN43 D10 N48 K53 M14
AA50 VSS[14] VSS[104] AN47 D14 VSS[194] VSS[263] N51 F53 CFG[11] RSVD35 U14
AA51 VSS[15] VSS[105] AN50 D18 VSS[195] VSS[264] N52 G53 CFG[12] RSVD36 W14
VSS[16] VSS[106] VSS[196] VSS[265] CFG[13] RSVD37 1: Normal Operation; Lane # definition
AA52 AN54 D22 N56 L51 P13
AA53 VSS[17] VSS[107] AP10 D26 VSS[197] VSS[266] N61 F51 CFG[14] RSVD38 matches socket pin map definition
VSS[18] VSS[108] VSS[198] VSS[267] CFG[15] CFG2
AA55 AP51 D29 P14 D52
AA56 VSS[19] VSS[109] AP55 D35 VSS[199] VSS[268] P16 L53 CFG[16] AT49 0:Lane Reversed
AA8
AB16
AB18
VSS[20]
VSS[21]
VSS[22]
VSS[110]
VSS[111]
VSS[112]
AP7
AR13
AR17
D4
D40
D43
VSS[200]
VSS[201]
VSS[202]
VSS[269]
VSS[270]
VSS[271]
P18
P21
P58 H43
CFG[17] RSVD39
RSVD40
K24
* CFG4
RESERVED
AB21 VSS[23]
VSS[24]
VSS[113]
VSS[114]
AR21 D46 VSS[203]
VSS[204] VSS VSS[272]
VSS[273]
P59 K43 VCC_VAL_SENSE
VSS_VAL_SENSE RSVD41
AH2
1
AB48 AR41 D50 P9 AG13
AB61 VSS[25] VSS[115] AR48 D54 VSS[205] VSS[274] R17 RSVD42 AM14 RC82
AC10 VSS[26] VSS[116] AR61 D58 VSS[206] VSS[275] R20 H45 RSVD43 AM15 1K_0402_1%
AC14 VSS[27] VSS[117] AR7 D6 VSS[207] VSS[276] R4 K45 VAXG_VAL_SENSE RSVD44 IEDP@
AC46 VSS[28] VSS[118] AT14 E25 VSS[208] VSS[277] R46 VSSAXG_VAL_SENSE
2
AC6 VSS[29] VSS[119] AT19 E29 VSS[209] VSS[278] T1 N50
VSS[30] VSS[120] VSS[210] VSS[279]
AD17
VSS[31] VSS[121]
AT36 E3
VSS[211] VSS[280]
T47 TP@ F48
VCC_DIE_SENSE TheseRSVD45
pins are for solder joint
AD20 AT4 E35 T50
AD4 VSS[32] VSS[122] AT45 E40 VSS[212] VSS[281] T51 PAD T87
reliability and non-critical to
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
F13
F15
VSS[213]
VSS[214]
VSS[215]
VSS[282]
VSS[283]
VSS[284]
T52
T53
H48
K48 RSVD6
RSVD7
function. For BGA only. Embedded Display Port Presence Strap
AE8 AU1 F19 T55 A4
AF1 VSS[36] VSS[126] AU11 F29 VSS[216] VSS[285] T56 DC_TEST_A4 C4 1 : Disabled; No Physical Display Port
AF17
AF21
AF47
VSS[37]
VSS[38]
VSS[39]
VSS[127]
VSS[128]
VSS[129]
AU28
AU32
AU51
F35
F40
F55
VSS[217]
VSS[218]
VSS[219]
VSS[286]
VSS[287]
VSS[288]
U13
U8
V20
BA19
AV19
AT21
RSVD8
RSVD9
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
D3
D1
A58
DC_TEST_C4_D3
* attached to Embedded Display Port
VSS[40] VSS[130] VSS[220] VSS[289] RSVD10 DC_TEST_A58 CFG4
AF48 AU7 G51 V61 BB21 A59 0 : Enabled; An external Display Port
2 AF50 VSS[41] VSS[131] AV17 G6 VSS[221] VSS[290] W13 BB19 RSVD11 DC_TEST_A59 C59 DC_TEST_A59_C59 2
AF51 VSS[42] VSS[132] AV21 G61 VSS[222] VSS[291] W15 AY21 RSVD12 DC_TEST_C59 A61 device is connected to the Embedded
AF52 VSS[43] VSS[133] AV22 H10 VSS[223] VSS[292] W18 BA22 RSVD13 DC_TEST_A61 C61 DC_TEST_A61_C61 Display Port
AF53 VSS[44] VSS[134] AV34 H14 VSS[224] VSS[293] W21 AY22 RSVD14 DC_TEST_C61 D61
AF55 VSS[45] VSS[135] AV40 H17 VSS[225] VSS[294] W46 AU19 RSVD15 DC_TEST_D61 BD61
AF56 VSS[46] VSS[136] AV48 H21 VSS[226] VSS[295] W8 AU21 RSVD16 DC_TEST_BD61 BE61
AF58 VSS[47] VSS[137] AV55 H4 VSS[227] VSS[296] Y4 BD21 RSVD17 DC_TEST_BE61 BE59 DC_TEST_BE61_BE59
AF59 VSS[48] VSS[138] AW13 H53 VSS[228] VSS[297] Y47 BD22 RSVD18 DC_TEST_BE59 BG61
AG10 VSS[49] VSS[139] AW43 H58 VSS[229] VSS[298] Y58 BD25 RSVD19 DC_TEST_BG61 BG59 DC_TEST_BG61_BG59
AG14 VSS[50] VSS[140] AW61 J1 VSS[230] VSS[299] Y59 BD26 RSVD20 DC_TEST_BG59 BG58
AG18 VSS[51] VSS[141] AW7 J49 VSS[231] VSS[300] G48 BG22 RSVD21 DC_TEST_BG58 BG4
AG47 VSS[52] VSS[142] AY14 J55 VSS[232] VSS[301] BE22 RSVD22 DC_TEST_BG4 BG3
AG52 VSS[53] VSS[143] AY19 K11 VSS[233] BG26 RSVD23 DC_TEST_BG3 BE3 DC_TEST_BG3_BE3
AG61 VSS[54] VSS[144] AY30 K21 VSS[234] BE26 RSVD24 DC_TEST_BE3 BG1
AG7 VSS[55] VSS[145] AY36 K51 VSS[235] BF23 RSVD25 DC_TEST_BG1 BE1 DC_TEST_BG1_BE1
AH4 VSS[56] VSS[146] AY4 K8 VSS[236] A5 BE24 RSVD26 DC_TEST_BE1 BD1
AH58 VSS[57] VSS[147] AY41 L16 VSS[237] VSS_NCTF_1 A57 RSVD27 DC_TEST_BD1
AJ13 VSS[58] VSS[148] AY45 L20 VSS[238] VSS_NCTF_2 BC61 CFG7
AJ16 VSS[59] VSS[149] AY49 L22 VSS[239] VSS_NCTF_3 BD3
VSS[60] VSS[150] VSS[240] VSS_NCTF_4
1
AJ20 AY55 L26 BD59
AJ22 VSS[61] VSS[151] AY58 L30 VSS[241] VSS_NCTF_5 BE4 IVY-BRIDGE_BGA1023 <BOM> RC85
NCTF
AJ26 VSS[62] VSS[152] AY9 L34 VSS[242] VSS_NCTF_6 BE58 1K_0402_1%

AJ30 VSS[63] VSS[153] BA1 L38 VSS[243] VSS_NCTF_7 BG5 @
VSS[64] VSS[154] VSS[244] VSS_NCTF_8 CPU@
AJ34 BA11 L43 BG57
2
AJ38 VSS[65] VSS[155] BA17 L48 VSS[245] VSS_NCTF_9 C3
AJ42 VSS[66] VSS[156] BA21 L61 VSS[246] VSS_NCTF_10 C58
AJ45 VSS[67] VSS[157] BA26 M11 VSS[247] VSS_NCTF_11 D59
AJ48 VSS[68] VSS[158] BA32 M15 VSS[248] VSS_NCTF_12 E1
AJ7 VSS[69] VSS[159] BA48 VSS[249] VSS_NCTF_13 E61
VSS[70] VSS[160] VSS_NCTF_14 PEG DEFER TRAINING
AK1 BA51
AK52 VSS[71] VSS[161] BB53
AL10 VSS[72] VSS[162] BC13 1: (Default) PEG Train immediately
3 AL13
AL17
AL21
VSS[73]
VSS[74]
VSS[75]
VSS[163]
VSS[164]
VSS[165]
BC5
BC57
BD12
CFG7 * following xxRESETB de assertion
3
AL25 VSS[76] VSS[166] BD16
VSS[77] VSS[167] 0: PEG Wait for BIOS for training
AL28 BD19
VSS[78] VSS[168] CPU@
AL33 BD23
AL36 VSS[79] VSS[169] BD27 CFG6
AL40 VSS[80] VSS[170] BD32
AL43 VSS[81] VSS[171] BD36 CFG5
AL47 VSS[82] VSS[172] BD40
VSS[83] VSS[173]
1
AL61 BD44
AM13 VSS[84] VSS[174] BD48 RC83 RC84
AM20 VSS[85] VSS[175] BD52 1K_0402_1% 1K_0402_1%
AM22 VSS[86] VSS[176] BD56 @ @
AM26 VSS[87] VSS[177] BD8
2
AM30 VSS[88] VSS[178] BE5
AM34 VSS[89] VSS[179] BG13
VSS[90] VSS[180]
PCIE Port Bifurcation Straps
IVY-BRIDGE_BGA1023 <BOM> 11: (Default) x16 - Device 1 functions 1 and 2

CPU@
* disabled
CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled;

function 2 disabled
01: Reserved - (Device 1 function 1 disabled;

4 function 2 enabled) 4
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

Ivy Bridge_GND/RSVD/CFG
Custom 1.0
VFKTA
A B C D E
5 4 3 2 1
+1.5V +1.5V
1
JDDR3L
2
DDR3 SO-DIMM A
+VREF_DQA
DDR_A_D0
3
5
VREF_DQ
VSS2
VSS1
DQ4
4
6
DDR_A_D4
DDR_A_D5
Standard Type DDR_A_DQS[0..7]
DDR_A_D1 7 DQ0 DQ5 8
1 DQ1 VSS3 DDR_A_DQS#[0..7]
CD1 9 10 DDR_A_DQS#0
11 VSS4 DQS#0 12 DDR_A_DQS0
DM0 DQS0 DDR_A_D[0..63]
0.1U_0402_10V7K
13 14
2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6
DQ2 DQ6 DDR_A_MA[0..15]
DDR_A_D3 17 18 DDR_A_D7
19 DQ3 DQ7 20
D DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12 D
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
25 DQ9 DQ13 26
DDR_A_DQS#1 27 VSS9 VSS10 28
DDR_A_DQS1 29 DQS#1 DM1 30
Close to JDDRL.1 31 DQS1 RESET# 32 SM_DRAMRST#
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14
37 DQ11 DQ15 38
43 DQ17 DQ21 44
49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28
DDR_A_D25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDR_A_DQS#3
63 VSS22 DQS#3 64 DDR_A_DQS3 +1.5V +1.5V
65 DM3 DQS3 66
DQ26 DQ30
1
DDR_A_D27 69 70 DDR_A_D31
71 DQ27 DQ31 72 RD1 RD10
VSS25 VSS26 1K_0402_1% 1K_0402_1%
2
73 74
DDRA_CKE0 75 CKE0 CKE1 76 DDRA_CKE1
VDD1 VDD2 +VREF_DQA +VREF_DQB
77 78 DDR_A_MA15
C 79 NC1 A15 80 DDR_A_MA14 C
DDR_A_BS2 BA2 A14
1
81 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11 RD2 RD11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 1K_0402_1% 1K_0402_1%
87 A9 A7 88
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
2
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
101 VDD9 VDD10 102
DDRA_CLK0 103 CK0 CK1 104 DDRA_CLK1
DDRA_CLK0# 105 CK0# CK1# 106 DDRA_CLK1#
DDR_A_MA10 107 VDD11 VDD12 108 +1.5V
109 A10/AP BA1 110 DDR_A_BS1
DDR_A_BS0 111 BA0 RAS# 112 DDR_A_RAS#
VDD13 VDD14
1
113 114
DDR_A_WE# 115 WE# S0# 116 DDRA_SCS0#
RD6
DDR_A_CAS# 117 CAS# ODT0 118 DDRA_ODT0
1K_0402_1%
DDR_A_MA13 119 VDD15 VDD16 120
121 A13 ODT1 122 DDRA_ODT1
2
DDRA_SCS1# 123 S1# NC2 124
125 VDD17 VDD18 126 +VREF_CAA
127 NCTEST VREF_CA 128
VSS27 VSS28
1
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37 RD7
133 DQ33 DQ37 134 1K_0402_1%
DDR_A_DQS4 137 DQS#4 DM4 138 1
2
139 DQS4 VSS31 140 DDR_A_D38 CD16
DQ34 DQ39
0.1U_0402_10V7K
B DDR_A_D35 143 144 B

145 DQ35 VSS33 146 DDR_A_D44 2
DDR_A_D41 149 DQ40 DQ45 150
153 VSS36 DQS#5 154 DDR_A_DQS5
155 DM5 DQS5 156
Layout Note: Layout Note: Place these 4 Caps near Layout Note:
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47 Place near JDDRL Command and Control signals of DIMMA Place near JDDRL1.203 and 204
161 DQ43 DQ47 162
close to JDDRL.126
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS41 VSS42 170 +1.5V +1.5V +0.75VS
173 DQS6 VSS43 174 DDR_A_D54
DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55 CD8 1 2 10U_0603_6.3V6M CD20 1 2 0.1U_0402_10V7K CD24 2 1 1U_0402_6.3V6K
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_A_D60 CD9 1 2 10U_0603_6.3V6M CD17 1 2 0.1U_0402_10V7K CD21 2 1 1U_0402_6.3V6K
DDR_A_D57 183 DQ56 DQ61 184 CD10 1 2 10U_0603_6.3V6M CD18 1 2 0.1U_0402_10V7K
187 VSS48 DQS#7 188 DDR_A_DQS7 CD11 1 2 10U_0603_6.3V6M CD19 1 2 0.1U_0402_10V7K
189 DM7 DQS7 190
DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62 CD12 1 2 10U_0603_6.3V6M
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196 CD13 1 2 10U_0603_6.3V6M
197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS 201 VDDSPD SDA 202 PM_SMBDATA
203 SA1 SCL 204 PM_SMBCLK
1 +0.75VS VTT1 VTT2 +0.75VS
A 205 206 A
CD26 G1 G2
2 LCN_DAN06-K4406-0102
Conn@
0.1U_0402_10V7K
SPD setting (SA0, SA1) Security Classification Compal Secret Data Compal Electronics, Inc.
PU/PD by Channel A/B Issued Date 2012/09/24 Deciphered Date 2013/09/24 Title
->Channel A 00
->Channel B 01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM0
Custom 1.0
VFKTA
5 4 3 2 1
A B C D E
+1.5V +1.5V
1
JDDR3H
2
DDR3 SO-DIMM B
+VREF_DQB
DDR_B_D0
3
5
VREF_DQ
VSS2
VSS1
DQ4
4
6
DDR_B_D4
DDR_B_D5
Standard Type
DDR_B_D1 7 DQ0 DQ5 8
9 DQ1 VSS3 10 DDR_B_DQS#0
11 VSS4 DQS#0 12 DDR_B_DQS0
CD27 13 DM0 DQS0 14
1 VSS5 VSS6
DDR_B_D2 15 16 DDR_B_D6
DQ2 DQ6 DDR_B_DQS#[0..7]
DDR_B_D3 17 18 DDR_B_D7
DQ3 DQ7
0.1U_0402_10V7K
1 19 20 1
2 DDR_B_D8 21 VSS7 VSS8 22 DDR_B_D12 DDR_B_DQS[0..7]
DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13
DQ9 DQ13 DDR_B_D[0..63]
25 26
DDR_B_DQS#1 27 VSS9 VSS10 28
DQS#1 DM1 DDR_B_MA[0..15]
DDR_B_DQS1 29 30
31 DQS1 RESET# 32 SM_DRAMRST#
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
Close to JDDRH.1 37 DQ11 DQ15 38
43 DQ17 DQ21 44
DDR_B_DQS2 47 DQS#2 DM2 48
49 DQS2 VSS17 50 DDR_B_D22
DDR_B_D18 51 VSS18 DQ22 52 DDR_B_D23
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D28
DDR_B_D25 59 DQ24 DQ29 60
65 DM3 DQS3 66
71 DQ27 DQ31 72
VSS25 VSS26
73 74
DDRB_CKE0 75 CKE0 CKE1 76 DDRB_CKE1
2 77 VDD1 VDD2 78 DDR_B_MA15 2
79 NC1 A15 80 DDR_B_MA14
DDR_B_BS2 81 BA2 A14 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
87 A9 A7 88
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100
101 VDD9 VDD10 102
DDRB_CLK0 103 CK0 CK1 104 DDRB_CLK1
DDRB_CLK0# 105 CK0# CK1# 106 DDRB_CLK1#
DDR_B_MA10 107 VDD11 VDD12 108 +1.5V
109 A10/AP BA1 110 DDR_B_BS1
DDR_B_BS0 111 BA0 RAS# 112 DDR_B_RAS#
VDD13 VDD14
1
113 114
DDR_B_WE# 115 WE# S0# 116 DDRB_SCS0#
RD12
DDR_B_CAS# 117 CAS# ODT0 118 DDRB_ODT0
1K_0402_1%
DDR_B_MA13 119 VDD15 VDD16 120
121 A13 ODT1 122 DDRB_ODT1
2
DDRB_SCS1# 123 S1# NC2 124
125 VDD17 VDD18 126 +VREF_CAB
127 NCTEST VREF_CA 128
VSS27 VSS28
1
DDR_B_D32 129 130 DDR_B_D36
DDR_B_D33 131 DQ32 DQ36 132 DDR_B_D37 RD13
133 DQ33 DQ37 134 1K_0402_1%
DDR_B_DQS#4 135 VSS29 VSS30 136 CD47
DQS#4 DM4 1
DDR_B_DQS4 137 138
2
139 DQS4 VSS31 140 DDR_B_D38
VSS32 DQ38
0.1U_0402_10V7K
3 DDR_B_D34 141 142 DDR_B_D39 3

DDR_B_D35 143 DQ34 DQ39 144 2
145 DQ35 VSS33 146 DDR_B_D44
DDR_B_D41 149 DQ40 DQ45 150
155 DM5 DQS5 156
Layout Note: Layout Note: Place these 4 Caps near Layout Note:
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
Close to JDDRH.126 Place near JDDRH Command and Control signals of DIMMB Place near JDDRH.203 and 204
161 DQ43 DQ47 162
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
167 DQ49 DQ53 168 +1.5V +1.5V +0.75VS
DDR_B_DQS6 171 DQS#6 DM6 172 CD31 1 2 47U_0805_6.3V6M
173 DQS6 VSS43 174 DDR_B_D54 CD33 1 2 0.1U_0402_10V7K CD45 2 1 1U_0402_6.3V6K
DDR_B_D50 175 VSS44 DQ54 176 DDR_B_D55 CD41 1 2 10U_0603_6.3V6M
DDR_B_D51 177 DQ50 DQ55 178 CD29 1 2 0.1U_0402_10V7K CD42 2 1 1U_0402_6.3V6K
179 DQ51 VSS45 180 DDR_B_D60 CD36 1 2 10U_0603_6.3V6M
DDR_B_D56 181 VSS46 DQ60 182 DDR_B_D61 CD30 1 2 0.1U_0402_10V7K
DDR_B_D57 183 DQ56 DQ61 184 CD37 1 2 10U_0603_6.3V6M
185 DQ57 VSS47 186 DDR_B_DQS#7 CD32 1 2 0.1U_0402_10V7K
187 VSS48 DQS#7 188 DDR_B_DQS7 CD38 1 2 10U_0603_6.3V6M
189 DM7 DQS7 190
DDR_B_D58 191 VSS49 VSS50 192 DDR_B_D62 CD39 1 2 10U_0603_6.3V6M
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
195 DQ59 DQ63 196 CD40 1 2 10U_0603_6.3V6M
197 VSS51 VSS52 198
199 SA0 EVENT# 200
+3VS 2 1 201 VDDSPD SDA 202 PM_SMBDATA
203 SA1 SCL 204 PM_SMBCLK
1 RD15 10K_0402_5% +0.75VS +0.75VS
4 VTT1 VTT2 4
205 206
CD49 G1 G2
2 LCN_DAN06-K4806-0102
0.1U_0402_10V7K Conn@
SPD setting (SA0, SA1) Security Classification Compal Secret Data Compal Electronics, Inc.
PU/PD by Channel A/B Issued Date 2012/09/24 Deciphered Date 2013/09/24 Title
->Channel A 00
->Channel B 01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM1
Custom 1.0
VFKTA
A B C D E
A B C D E
UV1A
Part 1 of 6 DV1
PCIE_GTX_C_CRX_P[0..3] PCIE_CTX_C_GRX_P0 AG6 C6 FB_CLAMP_MON 2 1
PCIE_GTX_C_CRX_P[0..3] PCIE_CTX_C_GRX_N0 AG7 PEX_RX0 GPIO0 B2 FB_CLAMP +3VS_DGPU
PCIE_CTX_C_GRX_P1 AF7 PEX_RX0_N GPIO1 D6 +3VS_DGPU
RB751V40_SC76-2
2
PEX_RX1 GPIO2
G
PCIE_GTX_C_CRX_N[0..3] PCIE_CTX_C_GRX_N1 AE7 C7 OPT@ RPV1
PCIE_GTX_C_CRX_N[0..3] AE9 PEX_RX1_N GPIO3 F9 1 8
PCIE_CTX_C_GRX_P2 QV8 GPS_DOWN#
PCIE_CTX_C_GRX_N2 AF9 PEX_RX2 GPIO4 A3 GPU_EVENT 2 7
PEX_RX2_N GPIO5 N14PGV2@
PCIE_CTX_C_GRX_P[0..3] PCIE_CTX_C_GRX_P3 AG9 A4 FB_CLAMP_REQ# 3 1 XTAL_OUTBUFF 3 6
PCIE_CTX_C_GRX_P[0..3] PEX_RX3 GPIO6 CLK_REQ_GC6#
PCIE_CTX_C_GRX_N3 AG10 B6 For GC6 XTAL_SSIN 4 5
D
S
AF10 PEX_RX3_N GPIO7 A6 OVERT#_VGA
PEX_RX4 GPIO8 2N7002KW_SOT323-3
PCIE_CTX_C_GRX_N[0..3] AE10 F8 GPU_EVENT 10K_8P4R_5%
PCIE_CTX_C_GRX_N[0..3] AE12 PEX_RX4_N GPIO9 C5 OPT@
1 AF12 PEX_RX5 GPIO10 E7 DGPU_VID 1
AG12 PEX_RX5_N GPIO11 D7 GPS_DOWN# DGPU_VID
RPV2
AG13 PEX_RX6 GPIO12 B4 PSI GPS_DOWN# VGA_EDID_DATA 1 8
GPIO
AF13 PEX_RX6_N GPIO13 B3 PSI VGA_EDID_CLK 2 7
AE13 PEX_RX7 GPIO14 C3 SMB_DATA_GPU 3 6
AE15 PEX_RX7_N GPIO15 D5
EC GPS_DOWN# must be OD\Low SMB_CLK_GPU 4 5
AF15 NC GPIO16 D4 to avoid leakage
AG15 NC GPIO17 C2 2.2K_8P4R_5%
AG16 NC GPIO18 F7 OPT@
AF16 NC GPIO19 E6
AE16 NC GPIO20 C4 RPV3
AE18 NC GPIO21 VGA_CRT_CLK 1 8
AF18 NC AB6 VGA_CRT_DATA 2 7
AG18 NC NC HDCP_SCL 3 6
AG19 NC HDCP_SDA 4 5
AF19 NC
AE19 NC 2.2K_8P4R_5%
AE21 NC AG3 OPT@
AF21 NC DACA_RED AF4
AG21 NC DACA_GREEN AF3 RPV12
AG22 NC DACA_BLUE FB_CLAMP 1 8
NC OVERT#_VGA 2 7
FB_CLAMP_MON 3 6
PCIE_GTX_C_CRX_P0 CV1 1 2 OPT@ 0.22U_0402_16V7K PCIE_GTX_CRX_P0 AC9 AE3 FB_CLAMP_REQ# 4 5
PEX_TX0 DACA_HSYNC
DACs
PCIE_GTX_C_CRX_N0 CV2 1 2 OPT@ 0.22U_0402_16V7K PCIE_GTX_CRX_N0 AB9 AE4
PCIE_GTX_C_CRX_P1 CV3 1 2 OPT@ 0.22U_0402_16V7K PCIE_GTX_CRX_P1 AB10 PEX_TX0_N DACA_VSYNC 10K_8P4R_5%
PCIE_GTX_C_CRX_N1 CV4 1 2 OPT@ 0.22U_0402_16V7K PCIE_GTX_CRX_N1 AC10 PEX_TX1 OPT@
PCIE_GTX_C_CRX_P2 1 2 PCIE_GTX_CRX_P2 AD11 PEX_TX1_N
PCI EXPRESS
CV5 OPT@ 0.22U_0402_16V7K
PCIE_GTX_C_CRX_N2 CV6 1 2 OPT@ 0.22U_0402_16V7K PCIE_GTX_CRX_N2 AC11 PEX_TX2 W5 RPV13
PCIE_GTX_C_CRX_P3 1 2 PCIE_GTX_CRX_P3 AC12 PEX_TX2_N 120mA DACA_VDD AE2 CLK_REQ_GC6# 1 8
CV7 OPT@ 0.22U_0402_16V7K +3VS
PCIE_GTX_C_CRX_N3 CV8 1 2 OPT@ 0.22U_0402_16V7K PCIE_GTX_CRX_N3 AB12 PEX_TX3 DACA_VREF AF2 2 7
PEX_TX3_N DACA_RSET JTAG_TRST
AB13 3 6
2 PEX_TX4 TESTMODE 2
AC13 CLK_REQ_GPU# 4 5
AD14 PEX_TX4_N
AC14 PEX_TX5 10K_8P4R_5%
AC15 PEX_TX5_N OPT@
AB15 PEX_TX6
AB16 PEX_TX6_N B7 VGA_CRT_CLK
AC16 PEX_TX7 I2CA_SCL A7 VGA_CRT_DATA
AD17 PEX_TX7_N I2CA_SDA
AC17 NC C9 HDCP_SCL
AC18 NC I2CB_SCL C8 HDCP_SDA
NC I2CB_SDA
I2C
AB18
AB19 NC A9 VGA_EDID_CLK Internal Thermal Sensor
AC19 NC I2CC_SCL B9 VGA_EDID_DATA
AD20 NC I2CC_SDA +3VS_DGPU
AC20 NC D9 SMB_CLK_GPU
AC21 NC I2CS_SCL D8 SMB_DATA_GPU
AB21 NC I2CS_SDA
AD23 NC
AE23 NC
NC
5
AF24 OPT@
AE24 NC L6 +PLLVDD QV1B
AG24 NC 52mA CORE_PLLVDD M6 +1.05VS_DGPU SMB_CLK_GPU 4 3
LV1
AG25 NC SP_PLLVDD EC_SMB_CK2
71mA BLM18PG181SN1D_2P
NC
2
N6 +GPU_PLLVDD 1 2 OPT@ 2N7002DW-T/R7_SOT363-6
VID_PLLVDD
22U_0805_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
41mA QV1A
CV9
CV10
CV11
CV12
CV13
1 1 1 1 1 SMB_DATA_GPU 1 6
CLK_PCIE_VGA AE8 EC_SMB_DA2
CLK_PCIE_VGA PEX_REFCLK
CLK_PCIE_VGA# AD8 2N7002DW-T/R7_SOT363-6
CLK_PCIE_VGA# PEX_REFCLK_N
CLK_REQ_GPU# AC6
PEX_CLKREQ_N 2 2 2 2 2
1 @ 2 PEX_TSTCLK_OUT AF22
CLK
RV4 200_0402_1% PEX_TSTCLK_OUT# AE22 PEX_TSTCLK_OUT C11 XTALIN

3 PEX_TSTCLK_OUT_N XTAL_IN B10 XTAL_OUT 3
XTAL_OUT
AC7 A10 XTAL_SSIN CV42, CV43 under GPU
PLTRST_VGA# PEX_RST_N XTAL_SSIN
AF25 C10 XTAL_OUTBUFF
PEX_TERMP XTAL_OUTBUFF close to ball : AE8,AD7
2
RV5 N14P-GV2-S-A2_FCBGA595
2.49K_0402_1% N14PGV2@
OPT@
1
+1.05VS_DGPU
LV2 OPT@
10U_0603_6.3V6M
+PLLVDD 1 2
22U_0805_6.3V6M
OPT@ CV16
0.1U_0402_10V7K
1 2 XTALIN FBMA-L11-160808300LMA25T_2P 1
VGA_X1
OPT@ CV14
OPT@ CV15
RV8 0_0402_5% 1 1
GCLK@
under GPU
1 2
NOGCLK@ RV7 @EMI@
close to AD8 2 2
CLK_REQ_VGA#
10_0402_5%
YV1 27MHZ_16PF
2
XTALIN 1 3 XTAL_OUT 1
1 3
6
CV113 @EMI@
QV2A GND GND 10P_0402_50V8J
1 2 4 1 2
2 CV17 CV18
+3VS_DGPU
2N7002DW-T/R7_SOT363-6 18P_0402_50V8J 18P_0402_50V8J
OPT@ NOGCLK@
NOGCLK@ for EMI
1
2 2
4 4

VGA_N14x PEG & DAC
Custom 1.0
A B C D E
A
VRAM Interface Place close to the first T point
MDA[15..0]
MDA[15..0] +VRAM_1.5VS
UV1B
MDA[31..16]
MDA[31..16]
CMDA12
MDA[47..32] CMDA14
MDA[47..32]
Part 2 of 6 CMDA15
MDA[63..48] CMDA[30..0] CMDA7
MDA[63..48] MDA0 E18 C27 CMDA0
MDA1 F18 FBA_D00 FBA_CMD0 C26 CMDA1
MDA2 E16 FBA_D01 FBA_CMD1 E24 CMDA2
10
10
FBA_D02 FBA_CMD2
9
8
7
6
9
8
7
6
MDA3 F17 F24 CMDA3
MDA4 D20 FBA_D03 FBA_CMD3 D27 CMDA4 RPV4 RPV5
MDA5 D21 FBA_D04 FBA_CMD4 D26 CMDA5
FBA_D05 FBA_CMD5 100_1206_10P8R_5% 100_1206_10P8R_5%
MDA6 F20 F25 CMDA6
MDA7 E21 FBA_D06 FBA_CMD6 F26 CMDA7 OPT@ OPT@
MDA8 E15 FBA_D07 FBA_CMD7 F23 CMDA8
MDA9 D15 FBA_D08 FBA_CMD8 G22 CMDA9
MDA10 F15 FBA_D09 FBA_CMD9 G23 CMDA10
1
2
3
4
5
1
2
3
4
5
MDA11 F13 FBA_D10 FBA_CMD10 G24 CMDA11
MDA12 C13 FBA_D11 FBA_CMD11 F27 CMDA12
MDA13 B13 FBA_D12 FBA_CMD12 G25 CMDA13 CMDA11
MDA14 E13 FBA_D13 FBA_CMD13 G27 CMDA14 CMDA4
MDA15 D13 FBA_D14 FBA_CMD14 G26 CMDA15 CMDA5
MDA16 B15 FBA_D15 FBA_CMD15 M24 CMDA16 CMDA6
MDA17 C16 FBA_D16 FBA_CMD16 M23 CMDA17
MDA18 A13 FBA_D17 FBA_CMD17 K24 CMDA18
MDA20 B18 FBA_D19 FBA_CMD19 M27 CMDA20
MDA21 A18 FBA_D20 FBA_CMD20 M26 CMDA21 +VRAM_1.5VS
MDA22 A19 FBA_D21 FBA_CMD21 M25 CMDA22
MDA23 C19 FBA_D22 FBA_CMD22 K26 CMDA23 CMDA22
MDA24 B24 FBA_D23 FBA_CMD23 K22 CMDA24 CMDA9
MDA25 C23 FBA_D24 FBA_CMD24 J23 CMDA25 CMDA21
MDA26 A25 FBA_D25 FBA_CMD25 J25 CMDA26 CMDA24
MDA27 A24 FBA_D26 FBA_CMD26 J24 CMDA27
MDA29 B21 FBA_D28 FBA_CMD28 K25 CMDA29
10
10
FBA_D29 FBA_CMD29
9
8
7
6
9
8
7
6
MDA30 C20 J27 CMDA30
MDA31 C21 FBA_D30 FBA_CMD30 J26 RPV6 RPV7
MDA32 R22 FBA_D31 FBA_CMD31
FBA_D32 DQMA[3..0] 100_1206_10P8R_5% 100_1206_10P8R_5%
MDA33 R24 D19 DQMA0
INTERFACE A
MDA34 T22 FBA_D33 FBA_DQM0 D14 DQMA1 OPT@ OPT@
MDA35 R23 FBA_D34 FBA_DQM1 C17 DQMA2
MDA36 N25 FBA_D35 FBA_DQM2 C22 DQMA3
MDA37 N26 FBA_D36 FBA_DQM3 P24 DQMA4 DQMA[7..4]
MEMORY
1
2
3
4
5
1
2
3
4
5
MDA38 N23 FBA_D37 FBA_DQM4 W24 DQMA5
MDA39 N24 FBA_D38 FBA_DQM5 AA25 DQMA6
MDA40 V23 FBA_D39 FBA_DQM6 U25 DQMA7 CMDA23
MDA41 V22 FBA_D40 FBA_DQM7 CMDA13
T23 FBA_D41 F19 DQSA#[3..0]
MDA42 DQSA#0 CMDA8
MDA43 U22 FBA_D42 FBA_DQS_RN0 C14 DQSA#1 CMDA10
MDA44 Y24 FBA_D43 FBA_DQS_RN1 A16 DQSA#2
MDA45 AA24 FBA_D44 FBA_DQS_RN2 A22 DQSA#3
MDA46 Y22 FBA_D45 FBA_DQS_RN3 P25 DQSA#4 DQSA#[7..4]
1 1
MDA47 AA23 FBA_D46 FBA_DQS_RN4 W22 DQSA#5

MDA48 AD27 FBA_D47 FBA_DQS_RN5 AB27 DQSA#6
MDA49 AB25 FBA_D48 FBA_DQS_RN6 T27 DQSA#7 +VRAM_1.5VS
MDA50 AD26 FBA_D49 FBA_DQS_RN7
AC25 FBA_D50 E19 DQSA[3..0] RPV9
MDA51 DQSA0 RPV8
MDA52 AA27 FBA_D51 FBA_DQS_WP0 C15 DQSA1 8 1 CMDA26 CMDA28 1 8
MDA53 AA26 FBA_D52 FBA_DQS_WP1 B16 DQSA2 7 2 CMDA25 CMDA27 2 7
30ohms (ESR=0.01) FBA_D53 FBA_DQS_WP2
MDA54 W26 B22 DQSA3 6 3 CMDA27 CMDA25 3 6
MDA55 Y25 FBA_D54 FBA_DQS_WP3 R25 DQSA4 DQSA[7..4] 5 4 CMDA28 CMDA26 4 5
+1.05VS_DGPU MDA56 R26 FBA_D55 FBA_DQS_WP4 W23 DQSA5
Close to H22 Close to P22 FBA_D56 FBA_DQS_WP5
LV3 OPT@ MDA57 T25 AB26 DQSA6 100_0804_8P4R_5% 100_0804_8P4R_5%
1 2 +FB_PLLAVDD MDA58 N27 FBA_D57 FBA_DQS_WP6 T26 DQSA7 OPT@ OPT@
FBMA-L11-160808300LMA25T_2P MDA59 R27 FBA_D58 FBA_DQS_WP7 2 1 CMDA29 2 1
FBA_D59
CV20
22U_0805_6.3V6M
CV21
0.1U_0402_10V7K
CV22
0.1U_0402_10V7K
CV114
0.1U_0402_10V7K
Place close to BGA MDA60 V26 RV10 100_0402_5% RV11 100_0402_5%

MDA61 V27 FBA_D60 OPT@ OPT@
1 2 1 1 FBA_D61
MDA62 W27 2 1 CMDA30 2 1
MDA63 W25 FBA_D62 RV12 100_0402_5% RV13 100_0402_5%
FBA_D63
OPT@
OPT@
OPT@
D24 OPT@ OPT@

2 1 2 2 FBA_CLK0 CLKA0
OPT@
F16 62mA D25

FB_PLLAVDD_1 FBA_CLK0_N CLKA0#
+FB_PLLAVDD P22 62mA
FB_PLLAVDD_2 N22
FBA_CLK1 CLKA1
D23 M22
FB_VREF_PROBE FBA_CLK1_N CLKA1#
Near GPU Close to F16
D18
H22 FBA_WCK01 C18
FB_DLLAVDD 35mA FBA_WCK01_N D17
F3 FBA_WCK23 D16
FB_CLAMP FB_CLAMP FBA_WCK23_N Command Bit Default Pull-down
T24
@ FBA_WCK45 U24 ODTx 10k
TV1 PAD F22 FBA_WCK45_N V24
TV2 PAD J22 FBA_DEBUG0 FBA_WCK67 V25 DDR3 CKEx 10k
FBA_DEBUG1 FBA_WCK67_N
RST 10k
@
CS* No Termination
N14P-GV2-S-A2_FCBGA595
N14PGV2R3@
CMDA16 RV36 1 OPT@ 2 10K_0402_5%
CMDA19 RV37 1 OPT@ 2 10K_0402_5%
CMDA3 RV38 1 OPT@ 2 10K_0402_5%
CMDA0 RV40 1 OPT@ 2 10K_0402_5%
CMDA20 RV15 1 OPT@ 2 10K_0402_5%

N14x VRAM Interface
Custom 1.0
A
5 4 3 2 1
Physical Logical Logical Logical Logical

UV1C Strapping pin Power Rail Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
Part 3 of 6 F11 ROM_SO +3VS_DGPU FB[1] FB[0] VGA_DEVICE
AC3 NC AD10 SMB_ALT_ADDR
AC4 IFPA_TXC NC AD7
Y4 IFPA_TXC_N NC B19
Y3 IFPA_TXD0 NC V5 ROM_SCLK +3VS_DGPU PCI_DEVID[4] SUB_VENDOR PCI_DEVID[5] PEX_PLLEN_TERM
AA3 IFPA_TXD0_N NC V6
AA2 IFPA_TXD1 NC G1
IFPA_TXD1_N NC +3VS_DGPU
AB1
IFPA_TXD2 NC
G2 ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0]
NC
AA1 G3
AA4 IFPA_TXD2_N NC G4
IFPA_TXD3 NC STRAP0 +3VS_DGPU USER[3] USER[2] USER[1] USER[0]
D AA5 G5 D
IFPA_TXD3_N NC +3VS_DGPU 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
NC
G6 STRAP1
G7
AB5 NC V1
AB4 IFPB_TXC NC V2 STRAP2 +3VS_DGPU PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
AB3 IFPB_TXC_N NC W1
AB2 IFPB_TXD4 NC W2 STRAP3 +3VS_DGPU SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
AD3 IFPB_TXD4_N NC W3
AD2 IFPB_TXD5 NC W4 STRAP4 +3VS_DGPU RESERVED PCIE_SPEED_CHANGE_GEN3 PCIE_MAX_SPEED DP_PLL_VDD33V
AE1 IFPB_TXD5_N NC
AD1 IFPB_TXD6
AD4 IFPB_TXD6_N
IFPB_TXD7
OPT@ Pull-up to +3VS
AD5 D11 RV16 1 2 10K_0402_5% SKU Device ID biit5 to bit0 Resistor Values Pull-down to Gnd
IFPB_TXD7_N BUFRST_N _DGPU
D10 5K 1000 0000
T2 NC
IFPC_L0 N14P-GV2 TBD 010010
T3 E9 10K 1001 0001
T1 IFPC_L0_N NC
R1 IFPC_L1 E10
IFPC_L1_N NC N14M-GL 0x1140 000000 15K 1010 0010
R2
GENERAL
IFPC_L2
LVDS/TMDS
R3 F10 20K 1011 0011
N2 IFPC_L2_N NC
N3 IFPC_L3
IFPC_L3_N 25K 1100 0100
D1 STRAP0
STRAP0 D2 STRAP1
STRAP1 30K 1101 0101
V3 E4 STRAP2
V4 IFPD_L0 STRAP2 E3 STRAP3
IFPD_L0_N STRAP3 35K 1110 0110
U3 D3 STRAP4
U4 IFPD_L1 STRAP4 C1
IFPD_L1_N NC 45K 1111 0111
T4
T5 IFPD_L2 N14PGV2@
R4 IFPD_L2_N F6 MULTI_STRAP_REF0_GND 1 2
IFPD_L3 MULTI_STRAP_REF0_GND MULTI LEVEL STRAPS
C R5 F4 RV17 40.2K_0402_1% +3VS_DGPU C
IFPD_L3_N NC F5 +3VS_DGPU
NC
N1 +VGA_CORE
NC
@ 1
@ 1
@ 1
1
10K_0402_1%
10K_0402_1%
10K_0402_1%
45.3K_0402_1%
4.99K_0402_1%
M1
NC
@ 1
1
N14PGV2@
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
M2 F12
@
NC THERMDP
N14PGV2@
M3
NC
N14PGV2@
K2 E12
NC THERMDN
RV18
RV19
RV20
RV21
RV22
K3 RV26
2
NC
RV23
RV24
RV25
K1 100_0402_1%
2
J1 NC OPT@ STRAP0
NC STRAP1 STRAP3 ROM_SI
1
STRAP2 STRAP4 ROM_SO
M4 F2 VGA_VCC_SENSE ROM_SCLK
M5 NC VDD_SENSE VGA_VCC_SENSE
NC
@ 1
1
4.99K_0402_1%
45.3K_0402_1%
4.99K_0402_1%
45.3K_0402_1%
L3 trace width: 16mils
NC RV31
1
15K_0402_1%
N14PGV2@
N14PGV2@
N14PGV2@
N14PGV2@
L4
NC differential voltage sensing.
10K_0402_1%
10K_0402_1%
10K_0402_1%
N14MGL@
N14MGL@
N14MGL@
K4
NC
differential signal routing. 10K_0402_1%
RV27
RV28
RV29
RV30
RV31
K5
2
NC N14MGL@
RV32
RV33
RV34
J4 F1 VGA_VSS_SENSE
VGA_VSS_SENSE
2
NC GND_SENSE
OPT@
J5 2 1 For X76 (N14M-GL) For X76 (N14P-GV2)
N4 NC RV35
N5 IFPC_AUX_I2CW_SCL TEST 100_0402_1%
IFPC_AUX_I2CW_SDA_N
P3 AD9
P4 IFPD_AUX_I2CX_SCL TESTMODE AE5 JTAG_TCK TESTMODE
IFPD_AUX_I2CX_SDA_N JTAG_TCK PAD TV3 TP@
AE6 JTAG_TDI TP@ GPU FB Memory gDDR3 ROM_SI GPU FB Memory gDDR3 STRAP[3:0]
JTAG_TDI PAD TV4
AF6 JTAG_TDO
B JTAG_TDO PAD TV5 TP@ B
J2 AD6 JTAG_TMS
IFPE_AUX_I2CY_SCL JTAG_TMS PAD TV6 TP@
J3 AG4 900MHz K4W2G1646E-BC11 900MHz K4W2G1646E-BC11
IFPE_AUX_I2CY_SDA_N JTAG_TRST_N JTAG_TRST
Samsung PD 45K Samsung 0101
1 1
H3 1GHz K4W2G1646E-BC1A 1GHz K4W2G1646E-BC1A
H4 IFPF_AUX_I2CZ_SCL 2 2
IFPF_AUX_I2CZ_SDA_N SERIAL 8 8
D12 900MHz H5TQ2G63DFR-11C 900MHz H5TQ2G63DFR-11C
ROM_CS_N B12 ROM_SI M Hynix PD 34.8K M Hynix 0110
ROM_SI A12 ROM_SO
ROM_SO C12 ROM_SCLK
ROM_SCLK x 1GHz H5TQ2G63DFR-N0C x 1GHz H5TQ2G63DFR-N0C
1 1
6 6
N14P-GV2-S-A2_FCBGA595 Micron 900MHz MT41K128M16JT-107G PD 30K Micron 900MHz MT41K128M16JT-107G 0001
N14PGV2R3@
N14P-GV2 N14M-GL
Samsung 900MHz K4W4G1646B-HC11 PD 20K Samsung 900MHz K4W4G1646B-HC11 1011

2 2
5 5
6 6
M Micron 900MHz MT41K256M16HA-107G PD 10K M Hynix 900MHz H5TC4G63AFR-11C 0100
x x
1 1
A 6 6 A
Micron 900MHz MT41K256M16HA-107G 1101

VGA_N14x LVDS&TMDS
Custom 1.0
5 4 3 2 1
5 4 3 2 1
midway between GPU

Under GPU Near GPU and Power supply +1.05VS_DGPU
+VRAM_1.5VS
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
Under GPU UV1D
OPT@ CV26
OPT@ CV23
OPT@ CV27
OPT@ CV28
OPT@ CV29
OPT@ CV30
OPT@ CV31
1 1 1 1 1 1 1
3500 mA Part 4 of 6 2000 mA
B26 AA10
D FBVDDQ_01 PEX_IOVDDQ_1 D
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
C25 AA12
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
FBVDDQ_02 PEX_IOVDDQ_2 2 2 2 2 2 2 2
OPT@ CV32
OPT@ CV24
OPT@ CV33
OPT@ CV34
OPT@ CV25
OPT@ CV35
1 1 1 1 1 1 E23 AA13
E26 FBVDDQ_03 PEX_IOVDDQ_3 AA16
F14 FBVDDQ_04 PEX_IOVDDQ_4 AA18
F21 FBVDDQ_05 PEX_IOVDDQ_5 AA19
2 2 2 2 2 2 G13 FBVDDQ_06 PEX_IOVDDQ_6 AA20
G14 FBVDDQ_07 PEX_IOVDDQ_7 AA21 +1.05VS_DGPU
G15 FBVDDQ_08 PEX_IOVDDQ_8 AB22
G16 FBVDDQ_09 PEX_IOVDDQ_9 AC23
FBVDDQ_10 PEX_IOVDDQ_10
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
G18 AD24
4.7U_0603_6.3V6K
FBVDDQ_11 PEX_IOVDDQ_11
OPT@ CV36
OPT@ CV37
OPT@ CV38
OPT@ CV39
OPT@ CV40
OPT@ CV41
OPT@ CV42
G19 AE25 1 1 1 1 1 1 1
Near GPU G20 FBVDDQ_12 PEX_IOVDDQ_12 AF26
G21 FBVDDQ_13 PEX_IOVDDQ_13 AF27
H24 FBVDDQ_14 PEX_IOVDDQ_14
FBVDDQ_15 2 2 2 2 2 2 2
22U_0805_6.3V6M
10U_0603_6.3V6M
H26
FBVDDQ_16
OPT@ CV43
OPT@ CV44
1 1 J21 AA22
K21 FBVDDQ_17 PEX_IOVDD_1 AB23
L22 FBVDDQ_18 PEX_IOVDD_2 AC24
L24 FBVDDQ_19 PEX_IOVDD_3 AD25
POWER
2 2 L26 FBVDDQ_20 PEX_IOVDD_4 AE26
M21 FBVDDQ_21 PEX_IOVDD_5 AE27 +3VS_DGPU
N21 FBVDDQ_22 PEX_IOVDD_6 Under GPU Near GPU
R21 FBVDDQ_23
FBVDDQ_24
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1U_0402_6.3V6K
T21
4.7U_0603_6.3V6K
FBVDDQ_25
OPT@ CV45
OPT@ CV46
OPT@ CV47
OPT@ CV48
OPT@ CV49
V21 1 1 1 1 1
W21 FBVDDQ_26
FBVDDQ_27 G10
VDD33_1 G12
VDD33_2 G8 2 2 2 2 2
VDD33_3 G9
VDD33_4
C V7 Near Ball C
W7 IFPAB_PLLVDD_1
AA6 IFPAB_PLLVDD_2
W6 IFPAB_RSET D22 FB_CAL_PD_VDDQ 1 2
IFPA_IOVDD FB_CAL_PD_VDDQ +VRAM_1.5VS
Y6 40.2_0402_1% RV39
IFPB_IOVDD OPT@
C24 FB_CAL_PU_GND 2 1
FB_CAL_PU_GND 42.2_0402_1% RV41
OPT@
M7 B25 FB_CAL_TERM_GND 2 1
N7 IFPC_PLLVDD_1 FB_CAL_TERM_GND 51.1_0402_1% RV42
T6 IFPC_PLLVDD_2 OPT@
P6 IFPC_RSET
IFPC_IOVDD
T7 Under GPU
R7 IFPD_PLLVDD_2 Close to AH12/AG12 +3VS_DGPU
U6 IFPD_PLLVDD_1 Near GPU
R6 IFPD_RSET AA8
IFPD_IOVDD PEX_PLL_HVDD_1
0.1U_0402_10V7K
0.1U_0402_10V7K
AA9
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
PEX_PLL_HVDD_2
OPT@ CV50
OPT@ CV51
OPT@ CV52
OPT@ CV53
1 1 1 1
AB8
PEX_SVDD_3V3
J7 +1.05VS_DGPU 2 2 2 2
K7 NC Under GPU Near GPU LV4
K6 NC 120mA AA14 2 1
NC PEX_PLLVDD_1
0.1U_0402_10V7K
1U_0402_6.3V6K
H6 AA15
4.7U_0603_6.3V6K
BLM18PG121SN1D_0603
NC PEX_PLLVDD_2 N14MGL@
OPT@ CV54
OPT@ CV55
OPT@ CV56
J6 1 1 1
NC
RV1
B 2 1 B
2 2 2 0_0603_5%
N14PGV2@
N14P-GV2-S-A2_FCBGA595
N14PGV2R3@
A A

VGA_N14x POWER
Custom 1.0
5 4 3 2 1
5 4 3 2 1
+1.05VS_VCCP to +1.05VS_DGPU
UV1E +VGA_CORE UV1F +VGA_CORE
A2 Part 5 of 6 K11 Part 6 of 6

A26 GND_001 GND_057 K13
AB11 GND_002 GND_058 K15 K10 V18 +1.05VS_VCCP +5VALW
AB14 GND_003 GND_059 K17 K12 VDD_001 VDD_041 V16
AB17 GND_004 GND_060 L10 K14 VDD_002 VDD_040 V14 +1.05VS_DGPU
GND_005 GND_061 VDD_003 VDD_039
1
AB20 L12 K16 V12 Vgs=4.5V,Id=6.5A,Rds<22mohm
AB24 GND_006 GND_062 L14 K18 VDD_004 VDD_038 V10 RV43
GND_007 GND_063 VDD_005 VDD_037
2
D AC2 L16 L11 U17 270K_0402_5% D
GND_008 GND_064 VDD_006 VDD_036
POWER
AC22 L18 L13 U15 OPT@ QV3 OPT@ RV44
GND_009 GND_065 VDD_007 VDD_035
1
AC26 L2 L15 U13 D OPT@ 22_0805_5%
2
AC5 GND_010 GND_066 L23 L17 VDD_008 VDD_034 U11 2
AC8 GND_011 GND_067 L25 M10 VDD_009 VDD_033 T18 AO3416_SOT23-3 G
1
AD12 GND_012 GND_068 L5 M12 VDD_010 VDD_032 T16 S 1
3
GND_013 GND_069 VDD_011 VDD_031
0.01U_0402_25V7K
AD13 M11 M14 T14
GND_014 GND_070 VDD_012 VDD_030
3
AD15 M13 M16 T12 CV57 OPT@
AD16 GND_015 GND_071 M15 M18 VDD_013 VDD_029 T10 OPT@ QV4A OPT@
AD18 GND_016 GND_072 M17 N11 VDD_014 VDD_028 R17 2 QV4B
AD19 GND_017 GND_073 N10 N13 VDD_015 VDD_027 R15 2 VGA_PWROK# 5
AD21 GND_018 GND_074 N12 N15 VDD_016 VDD_026 R13 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
GND_019 GND_075 VDD_017 VDD_025 +1.05VS_DGPU
AD22 N14 N17 R11
4
AE11 GND_020 GND_076 N16 P10 VDD_018 VDD_024 P18
AE14 GND_021 GND_077 N18 P12 VDD_019 VDD_023 P16 +5VALW
AE17 GND_022 GND_078 P11 VDD_020 VDD_022 P14
AE20 GND_023 GND_079 P13 VDD_021 1 2
AF1 GND_024 GND_080 P15 100K_0402_5% RV45
AF11 GND_025 GND_081 P17
GND
GND_026 GND_082 OPT@
6
AF14 P2 QV5A D
AF17 GND_027 GND_083 P23 VGA_PWROK 2
AF20 GND_028 GND_084 P26 G
AF23 GND_029 GND_085 P5 2N7002KDWH_SOT363-6
AF5 GND_030 GND_086 R10 OPT@ S
1
AF8 GND_031 GND_087 R12
AG2 GND_032 GND_088 R14
AG26 GND_033 GND_089 R16 N14P-GV2-S-A2_FCBGA595
B1 GND_034 GND_090 R18 N14PGV2R3@
B11 GND_035 GND_091 T11
B14 GND_036 GND_092 T13
B17 GND_037 GND_093 T15
B20 GND_038 GND_094 T17
C B23
B27
GND_039
GND_040
GND_095
GND_096
U10
U12
+1.5V to +VRAM_1.5VS C
B5 GND_041 GND_097 U14

B8 GND_042 GND_098 U16 +1.5V +VRAM_1.5VS
E11 GND_043 GND_099 U18
E14 GND_044 GND_100 U2
E17 GND_045 GND_101 U23 +3VS
E2
E20
GND_046
GND_047
GND_102
GND_103
U26
U5
For GC6 QV6 OPT@ Vgs=10V,Id=14.5A,Rds=6mohm
GND_048 GND_104
2
E22 V11 8 1
E25 GND_049 GND_105 V13 7 D S 2 RV46
E5 GND_050 GND_106 V15 6 D S 3 470_0805_5%
E8 GND_051 GND_107 V17 5 D S 4 OPT@ OPT@
H2 GND_052 GND_108 Y2 D G RV47
1
H23 GND_053 GND_109 Y23 FDS6676AS_SO8 VRAM_1.5VS_GATE 1 2
GND_054 GND_110 B+
H25 Y26 1 1 180K_0402_5%
GND_055 GND_111
3
0.01U_0402_25V7K
H5 Y5
4.7U_0603_6.3V6K
UV2
GND_056 GND_112 2 CV59 CV60 RV48 QV7A
G Vcc
FB_CLAMP B 4 1.5V_PWR_EN OPT@ OPT@ OPT@ 820K_0402_5% QV7B
1 Y 2 2 2 1.5V_PWR_EN# 5 2N7002DW-T/R7_SOT363-6
VGA_PWROK A 2N7002DW-T/R7_SOT363-6 OPT@
2
AA7 N14PGV2@ NC7SZ32P5X_SC70-5 OPT@
4
GND AB7 +5VALW
GND
1 2
1 2 100K_0402_5% RV49
RV50 0_0402_5% OPT@
N14P-GV2-S-A2_FCBGA595 N14MGL@
3
N14PGV2R3@ QV5B D
1.5V_PWR_EN 5
G
2N7002KDWH_SOT363-6
B OPT@ S B
4
+3VS to +3VS_DGPU
+3VS
+3VS_DGPU +VGA_CORE +3VS
2
2
RV51 RV52 2 Vgs=-4.5V,Id=3A,Rds<97mohm
470_0805_5% 470_0805_5% RV53 CV61
OPT@ OPT@ OPT@ 10K_0402_5% 0.1U_0402_10V7K
OPT@
3 1
3 1
1
3
S
RV54 QV11
G
DGPU_PWR_EN# 1 2 2 OPT@
QV9B QV2B
2N7002DW-T/R7_SOT363-6 5 DGPU_PWR_EN# 5 2N7002DW-T/R7_SOT363-6 33K_0402_5% 2 AO3413_SOT23 D
1
6
OPT@ OPT@ OPT@
QV9A CV62 +3VS_DGPU
4
OPT@ 0.01U_0402_25V7K
2 1
DGPU_PWR_EN
2N7002DW-T/R7_SOT363-6
OPT@
1
A A

VGA_N14x POWER & GND
Custom 1.0
5 4 3 2 1
5 4 3 2 1
RANK 0 [31...0] Rank 0 Rank 1

Mode E
VRAM DDR3 Chips Address
CMD0
0..31
ODT
32..63 0..31
ODT
32..63
CMD1 CS1#
CMD2 CS0#
CMD3 CKE CKE
DQSA[3..0]
DQSA[3..0]
CMD4 A9 A9 A11 A11
D DQSA#[3..0] D
DQSA#[3..0]
CMD5 A6 A6 A7 A7
DQMA[3..0] UV3 @ UV4 @
DQMA[3..0]
CMD6 A3 A3 BA1 BA1
MDA[31..0] +MEM_VREF_CA0 M8 E3 MDA9 +MEM_VREF_CA0 M8 E3 MDA6
MDA[31..0] VREFCA DQL0 VREFCA DQL0
+MEM_VREF_DQ0 H1 F7 MDA12 +MEM_VREF_DQ0 H1 F7 MDA1 CMD7 A0 A0 A12 A12
CMDA[30..0] VREFDQ DQL1 F2 MDA8 VREFDQ DQL1 F2 MDA5
CMDA[30..0] CMDA7 N3 DQL2 F8 MDA15 CMDA7 N3 DQL2 F8 MDA0 Group0
A0 DQL3 A0 DQL3 CMD8 A8 A8 A8 A8
CMDA10 P7 H3 MDA13 Group1 CMDA10 P7 H3 MDA4
CMDA24 P3 A1 DQL4 H8 MDA11 CMDA24 P3 A1 DQL4 H8 MDA2
CMDA6 N2 G2 MDA10 CMDA6 N2 G2 MDA7
CMDA22 P8 A3 DQL6 H7 MDA14 CMDA22 P8 A3 DQL6 H7 MDA3
CMDA26 P2 CMDA26 P2
+VRAM_1.5VS CMDA5 R8 A5 CMDA5 R8 A5
A6 A6 CMD11 RAS# RAS# RAS# RAS#
CMDA21 R2 D7 MDA18 CMDA21 R2 D7 MDA30
CMDA8 T8 A7 DQU0 C3 MDA22 CMDA8 T8 A7 DQU0 C3 MDA26
A8 DQU1 A8 DQU1 CMD12 A13 A13 A14 A14
1
CMDA4 R3 C8 MDA16 CMDA4 R3 C8 MDA29

CMDA25 L7 A9 DQU2 C2 MDA23 CMDA25 L7 A9 DQU2 C2 MDA24 Group3
RV55
A10/AP DQU3 A10/AP DQU3 CMD13 BA1 BA1 A3 A3
1K_0402_1% CMDA23 R7 A7 MDA17 Group2 CMDA23 R7 A7 MDA28
CMDA9 N7 A11 DQU4 A2 MDA20 CMDA9 N7 A11 DQU4 A2 MDA27
OPT@
CMDA12 T3 B8 MDA19 CMDA12 T3 B8 MDA31
2
+MEM_VREF_CA0 CMDA14 T7 A13 DQU6 A3 MDA21 CMDA14 T7 A13 DQU6 A3 MDA25

+MEM_VREF_CA0 A14 DQU7 A14 DQU7 CMD15 CAS# CAS# CAS# CAS#
M7 M7
A15/BA3 A15/BA3
1
+VRAM_1.5VS +VRAM_1.5VS CMD16 ODT ODT

1
RV56 CV63
1K_0402_1% 0.01U_0402_25V7K CMDA29 M2 B2 CMDA29 M2 B2 CMD17 CS1#
OPT@ OPT@ CMDA13 N8 BA0 VDD D9 CMDA13 N8 BA0 VDD D9
2 CMDA27 M3 BA1 VDD G7 CMDA27 M3 BA1 VDD G7 CMD18 CS0#
2
BA2 VDD K2 BA2 VDD K2

VDD K8 VDD K8
VDD VDD CMD19 CKE CKE
N1 N1
CLKA0 J7 VDD N9 CLKA0 J7 VDD N9
C CK VDD CK VDD CMD20 RST RST RST RST C
CLKA0# K7 R1 CLKA0# K7 R1
CMDA3 K9 CK VDD R9 CMDA3 K9 CK VDD R9
+VRAM_1.5VS CKE/CKE0 VDD +VRAM_1.5VS CKE/CKE0 VDD +VRAM_1.5VS
CMD21 A7 A7 A6 A6
CMD22 A4 A4 A5 A5
CMDA0 K1 A1 CMDA0 K1 A1
ODT/ODT0 VDDQ ODT/ODT0 VDDQ
1
CMDA2 L2 A8 CMDA2 L2 A8 CMD23 A11 A11 A9 A9

RV57 CMDA11 J3 CS/CS0 VDDQ C1 CMDA11 J3 CS/CS0 VDDQ C1
CMDA15 K3 RAS VDDQ C9 CMDA15 K3 RAS VDDQ C9
1K_0402_1%
CAS VDDQ CAS VDDQ CMD24 A2 A2 A1 A1
OPT@ CMDA28 L3 D2 CMDA28 L3 D2
WE VDDQ E9 WE VDDQ E9
310mAVDDQ CMD25 A10 A10 WE# WE#
2
+MEM_VREF_DQ0 F1 VDDQ F1
+MEM_VREF_DQ0
DQSA1 F3 VDDQ H2 DQSA0 F3
310mAVDDQ H2
DQSL VDDQ DQSL VDDQ CMD26 A5 A5 A4 A4
1
1 DQSA2 C7 H9 DQSA3 C7 H9
DQSU VDDQ DQSU VDDQ
RV58 CV64 CMD27 BA2 BA2
1K_0402_1% 0.01U_0402_25V7K
OPT@ OPT@ DQMA1 E7 A9 DQMA0 E7 A9 CMD28 WE# WE# A10 A10
2 DQMA2 D3 DML VSS B3 DQMA3 D3 DML VSS B3
2
DMU VSS E1 DMU VSS E1

VSS VSS CMD29 BA0 BA0 BA0 BA0
G8 G8
DQSA#1 G3 VSS J2 DQSA#0 G3 VSS J2
DQSL VSS DQSL VSS CMD30 BA2 BA2
DQSA#2 B7 J8 DQSA#3 B7 J8
DQSU VSS M1 DQSU VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
CMDA20 T2 VSS P9 CMDA20 T2 VSS P9
RESET VSS T1 RESET VSS T1
ZQ0 L8 VSS T9 ZQ1 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
1
OPT@ J1 B1 OPT@ J1 B1
RV60 L1 NC/ODT1 VSSQ B9 RV61 L1 NC/ODT1 VSSQ B9 Place close to the first T point
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
B L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8 B
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ E8 VSSQ E8 CLKA0
VSSQ VSSQ
1
F9 F9
VSSQ G1 VSSQ G1 OPT@
VSSQ G9 VSSQ G9 RV63
VSSQ VSSQ 160_0402_1%
96-BALL 96-BALL
2
SDRAM DDR3 SDRAM DDR3
CLKA0#
K4B1G1646E-HC12_FBGA96 K4B1G1646E-HC12_FBGA96
Place close to RANK0 VRAM
+VRAM_1.5VS +VRAM_1.5VS +VRAM_1.5VS
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
OPT@ CV67
OPT@ CV68
OPT@ CV69
OPT@ CV70
OPT@ CV71
OPT@ CV72
OPT@ CV73
OPT@ CV74
OPT@ CV75
OPT@ CV76
OPT@ CV77
OPT@ CV78
OPT@ CV79
OPT@ CV80
OPT@ CV81
OPT@ CV82
OPT@ CV83
OPT@ CV84
OPT@ CV85
OPT@ CV86
OPT@ CV87
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A

VGA_N14x VRAM RANK 0L
Custom 1.0
5 4 3 2 1
5 4 3 2 1

Mode E
CMD0
0..31
ODT
32..63 0..31
ODT
32..63
CMD1 CS1#
CMD2 CS0#
DQSA[7..4] CMD3 CKE CKE
DQSA[7..4]
DQSA#[7..4] CMD4 A9 A9 A11 A11
D DQSA#[7..4] D
DQMA[7..4] UV5 @ UV6 @ CMD5 A6 A6 A7 A7
DQMA[7..4]
MDA[63..32] +MEM_VREF_CA1 M8 E3 MDA35 +MEM_VREF_CA1 M8 E3 MDA45 CMD6 A3 A3 BA1 BA1
MDA[63..32] VREFCA DQL0 VREFCA DQL0
+MEM_VREF_DQ1 H1 F7 MDA37 +MEM_VREF_DQ1 H1 F7 MDA41
CMDA[30..0] VREFDQ DQL1 F2 MDA32 VREFDQ DQL1 F2 MDA46
CMDA[30..0] DQL2 DQL2 CMD7 A0 A0 A12 A12
CMDA7 N3 F8 MDA36 CMDA7 N3 F8 MDA40
CMDA10 P7 A0 DQL3 H3 MDA33 Group4 CMDA10 P7 A0 DQL3 H3 MDA44 Group5
CMDA24 P3 H8 MDA38 CMDA24 P3 H8 MDA43
CMDA6 N2 A2 DQL5 G2 MDA34 CMDA6 N2 A2 DQL5 G2 MDA47
CMDA26 P2 A4 DQL7 CMDA26 P2 A4 DQL7
A5 A5 CMD10 A1 A1 A2 A2
CMDA5 R8 CMDA5 R8
+VRAM_1.5VS CMDA21 R2 A6 D7 MDA58 CMDA21 R2 A6 D7 MDA54
A7 DQU0 A7 DQU0 CMD11 RAS# RAS# RAS# RAS#
CMDA8 T8 C3 MDA62 CMDA8 T8 C3 MDA50
CMDA4 R3 A8 DQU1 C8 MDA56 CMDA4 R3 A8 DQU1 C8 MDA55
1
CMDA25 L7 C2 MDA63 CMDA25 L7 C2 MDA48

CMDA23 R7 A10/AP DQU3 A7 MDA57 Group7 CMDA23 R7 A10/AP DQU3 A7 MDA53 Group6
RV59
A11 DQU4 A11 DQU4 CMD13 BA1 BA1 A3 A3
1K_0402_1% CMDA9 N7 A2 MDA61 CMDA9 N7 A2 MDA51
CMDA12 T3 A12 DQU5 B8 MDA59 CMDA12 T3 A12 DQU5 B8 MDA52
OPT@
CMDA14 T7 A3 MDA60 CMDA14 T7 A3 MDA49
2
+MEM_VREF_CA1 M7 A14 DQU7 M7 A14 DQU7

+MEM_VREF_CA1 A15/BA3 +VRAM_1.5VS A15/BA3 +VRAM_1.5VS
CMD15 CAS# CAS# CAS# CAS#
1
1 CMD16 ODT ODT

RV62 CV65 CMDA29 M2 B2 CMDA29 M2 B2
CMDA13 N8 BA0 VDD D9 CMDA13 N8 BA0 VDD D9
1K_0402_1% 0.01U_0402_25V7K
BA1 VDD BA1 VDD CMD17 CS1#
OPT@ OPT@ CMDA27 M3 G7 CMDA27 M3 G7
2 BA2 VDD K2 BA2 VDD K2 CMD18 CS0#
2
VDD K8 VDD K8
VDD N1 VDD N1
VDD VDD CMD19 CKE CKE
CLKA1 J7 N9 CLKA1 J7 N9
CLKA1# K7 CK VDD R1 CLKA1# K7 CK VDD R1
C CK VDD CK VDD CMD20 RST RST RST RST C
CMDA19 K9 R9 CMDA19 K9 R9
CKE/CKE0 VDD +VRAM_1.5VS CKE/CKE0 VDD +VRAM_1.5VS
+VRAM_1.5VS
CMD21 A7 A7 A6 A6
CMDA16 K1 A1 CMDA16 K1 A1 CMD22 A4 A4 A5 A5
CMDA18 L2 ODT/ODT0 VDDQ A8 CMDA18 L2 ODT/ODT0 VDDQ A8
CS/CS0 VDDQ CS/CS0 VDDQ
1
CMDA11 J3 C1 CMDA11 J3 C1 CMD23 A11 A11 A9 A9

RV64 CMDA15 K3 RAS VDDQ C9 CMDA15 K3 RAS VDDQ C9
CMDA28 L3 CAS VDDQ D2 CMDA28 L3 CAS VDDQ D2
1K_0402_1%
WE VDDQ WE VDDQ CMD24 A2 A2 A1 A1
OPT@ 310mAVDDQ E9 310mAVDDQ E9
F1 F1 CMD25 A10 A10 WE# WE#
2
+MEM_VREF_DQ1 DQSA4 F3 VDDQ H2 DQSA5 F3 VDDQ H2

+MEM_VREF_DQ1 DQSL VDDQ DQSL VDDQ
DQSA7 C7 H9 DQSA6 C7 H9 CMD26 A5 A5 A4 A4
DQSU VDDQ DQSU VDDQ
1
1
RV65 CV66 CMD27 BA2 BA2
1K_0402_1% 0.01U_0402_25V7K DQMA4 E7 A9 DQMA5 E7 A9
DQMA7 D3 DML VSS B3 DQMA6 D3 DML VSS B3
OPT@
2
OPT@
DMU VSS DMU VSS CMD28 WE# WE# A10 A10
E1 E1
2
VSS G8 VSS G8
VSS VSS CMD29 BA0 BA0 BA0 BA0
DQSA#4 G3 J2 DQSA#5 G3 J2
DQSA#7 B7 DQSL VSS J8 DQSA#6 B7 DQSL VSS J8
DQSU VSS DQSU VSS CMD30 BA2 BA2
M1 M1
VSS M9 VSS M9
VSS P1 VSS P1
1
1
OPT@
OPT@ J1 B1 RV72 J1 B1
RV71 L1 NC/ODT1 VSSQ B9 243_0402_1% L1 NC/ODT1 VSSQ B9 Place close to the first T point
243_0402_1% J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
2
2
B NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 B
VSSQ E8 VSSQ E8 CLKA1
VSSQ VSSQ
1
F9 F9
VSSQ G1 VSSQ G1 OPT@
VSSQ G9 VSSQ G9 RV74
VSSQ VSSQ 160_0402_1%
96-BALL 96-BALL
2
CLKA1#
Place close to RANK1 VRAM
+VRAM_1.5VS +VRAM_1.5VS +VRAM_1.5VS
22U_0805_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
OPT@ CV100
OPT@ CV101
OPT@ CV102
OPT@ CV103
OPT@ CV104
OPT@ CV105
OPT@ CV106
OPT@ CV107
OPT@ CV108
OPT@ CV109
OPT@ CV110
OPT@ CV111
DRANK@ CV112
OPT@ CV92
OPT@ CV93
OPT@ CV94
OPT@ CV95
OPT@ CV96
OPT@ CV97
OPT@ CV98
OPT@ CV99
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A

VGA_N14x VRAM RANK 0H
Custom 1.0
5 4 3 2 1
5 4 3 2 1

Mode E
CMD0
0..31
ODT
32..63 0..31
ODT
32..63
CMD1 CS1#
CMD2 CS0#
CMD3 CKE CKE
DQSA[3..0]
DQSA[3..0]
CMD4 A9 A9 A11 A11
D DQSA#[3..0] D
DQSA#[3..0]
CMD5 A6 A6 A7 A7
DQMA[3..0]
DQMA[3..0]
CMD6 A3 A3 BA1 BA1
MDA[31..0]
MDA[31..0]
DRANK@ CMD7 A0 A0 A12 A12
CMDA[30..0] 0.01U_0402_25V7K
CMDA[30..0] 2 1 UV7 @ UV8 @ CMD8 A8 A8 A8 A8
CV88
M8 E3 MDA12 M8 E3 MDA1 CMD9 A12 A12 A0 A0
+MEM_VREF_CA0 +MEM_VREF_CA0
H1 VREFCA DQL0 F7 MDA9 H1 VREFCA DQL0 F7 MDA6
+MEM_VREF_DQ0 VREFDQ DQL1 +MEM_VREF_DQ0 VREFDQ DQL1
F2 MDA15 F2 MDA0 CMD10 A1 A1 A2 A2
CMDA9 N3 DQL2 F8 MDA8 CMDA9 N3 DQL2 F8 MDA5
1
CMDA24 P7 A0 DQL3 H3 MDA14 Group1 CV89 CMDA24 P7 A0 DQL3 H3 MDA3 Group0 CMD11 RAS# RAS# RAS# RAS#
CMDA10 P3 A1 DQL4 H8 MDA10 0.01U_0402_25V7K CMDA10 P3 A1 DQL4 H8 MDA7
CMDA13 N2 A2 DQL5 G2 MDA11 DRANK@ CMDA13 N2 A2 DQL5 G2 MDA2 CMD12 A13 A13 A14 A14
CMDA26 P8 A3 DQL6 H7 MDA13 2 CMDA26 P8 A3 DQL6 H7 MDA4
CMD13 BA1 BA1 A3 A3
CMDA21 R8 A5 CMDA21 R8 A5
CMDA5 R2 A6 D7 MDA22 CMDA5 R2 A6 D7 MDA26 CMD14 A14 A14 A13 A13
CMDA8 T8 A7 DQU0 C3 MDA18 CMDA8 T8 A7 DQU0 C3 MDA30
CMDA23 R3 A8 DQU1 C8 MDA23 CMDA23 R3 A8 DQU1 C8 MDA24 CMD15 CAS# CAS# CAS# CAS#
CMDA28 L7 A9 DQU2 C2 MDA16 CMDA28 L7 A9 DQU2 C2 MDA29
CMDA4 R7 A10/AP DQU3 A7 MDA21 Group2 CMDA4 R7 A10/AP DQU3 A7 MDA25 Group3 CMD16 ODT ODT
CMDA7 N7 A11 DQU4 A2 MDA19 CMDA7 N7 A11 DQU4 A2 MDA31
CMDA14 T3 A12 DQU5 B8 MDA20 CMDA14 T3 A12 DQU5 B8 MDA27 CMD17 CS1#
CMDA12 T7 A13 DQU6 A3 MDA17 CMDA12 T7 A13 DQU6 A3 MDA28
M7 A14 DQU7 M7 A14 DQU7
CMD18 CS0#
A15/BA3 +VRAM_1.5VS A15/BA3 +VRAM_1.5VS
CMD19 CKE CKE
CMDA29 M2 B2 CMDA29 M2 B2
CMDA6 N8 BA0 VDD D9 CMDA6 N8 BA0 VDD D9
C BA1 VDD BA1 VDD CMD20 RST RST RST RST C
CMDA30 M3 G7 CMDA30 M3 G7
VDD VDD CMD21 A7 A7 A6 A6
K8 K8
VDD N1 VDD N1
J7 N9 CLKA0 J7 N9
CLKA0 K7 CK VDD R1 CLKA0# K7 CK VDD R1
CLKA0# CK VDD CK VDD CMD23 A11 A11 A9 A9
CKE/CKE0 VDD +VRAM_1.5VS CKE/CKE0 VDD +VRAM_1.5VS CMD24 A2 A2 A1 A1
CMDA0 K1 A1 CMDA0 K1 A1 CMD25 A10 A10 WE# WE#
CMDA11 J3 CS/CS0 VDDQ C1 CMDA11 J3 CS/CS0 VDDQ C1
RAS VDDQ RAS VDDQ CMD26 A5 A5 A4 A4
CMDA15 K3 C9 CMDA15 K3 C9
WE VDDQ WE VDDQ CMD27 BA2 BA2
310mAVDDQ E9 310mAVDDQ E9
F1 F1 CMD28 WE# WE# A10 A10
DQSA1 F3 VDDQ H2 DQSA0 F3 VDDQ H2
DQSA2 C7 DQSL VDDQ H9 DQSA3 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ CMD29 BA0 BA0 BA0 BA0
CMD30 BA2 BA2
DQMA1 E7 A9 DQMA0 E7 A9
VSS G8 VSS G8
VSS M9 VSS M9
VSS P1 VSS P1
B ZQ/ZQ0 VSS ZQ/ZQ0 VSS B
1
1
J1 B1 J1 B1
L1 NC/ODT1 VSSQ B9 RV78 L1 NC/ODT1 VSSQ B9
RV77 J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
243_0402_1% L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
2
NCZQ1 VSSQ E2 DRANK@ NCZQ1 VSSQ E2
2
DRANK@ VSSQ E8 VSSQ E8

VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
96-BALL 96-BALL
A A

VGA_N14x VRAM RANK 1L
Custom 1.0
5 4 3 2 1
5 4 3 2 1
Rank 0 Rank 1
RANK 1 [63...32] Mode E
0..31 32..63 0..31 32..63
Address
VRAM DDR3 Chips CMD0

CMD1
ODT ODT
CS1#
CMD2 CS0#
CMD3 CKE CKE
DQSA[7..4]
DQSA[7..4]
CMD4 A9 A9 A11 A11
DQSA#[7..4]
D DQSA#[7..4] D
CMD5 A6 A6 A7 A7
DQMA[7..4]
DQMA[7..4]
CMD6 A3 A3 BA1 BA1
MDA[63..32]
MDA[63..32]
CMD7 A0 A0 A12 A12
CMDA[30..0]
CMDA[30..0]
DRANK@ CMD8 A8 A8 A8 A8
0.01U_0402_25V7K
2 1 UV9 @ UV10 @ CMD9 A12 A12 A0 A0
CV90
M8 E3 MDA37 M8 E3 MDA41 CMD10 A1 A1 A2 A2
+MEM_VREF_CA1 +MEM_VREF_CA1
H1 VREFCA DQL0 F7 MDA35 H1 VREFCA DQL0 F7 MDA45
+MEM_VREF_DQ1 VREFDQ DQL1 +MEM_VREF_DQ1 VREFDQ DQL1
F2 MDA36 F2 MDA40 CMD11 RAS# RAS# RAS# RAS#
CMDA9 N3 DQL2 F8 MDA32 CMDA9 N3 DQL2 F8 MDA46
A0 DQL3 1 A0 DQL3
CMDA24 P7 H3 MDA39 Group4 CV91 CMDA24 P7 H3 MDA42 Group5 CMD12 A13 A13 A14 A14
CMDA10 P3 A1 DQL4 H8 MDA34 0.01U_0402_25V7K CMDA10 P3 A1 DQL4 H8 MDA47
CMDA13 N2 A2 DQL5 G2 MDA38 CMDA13 N2 A2 DQL5 G2 MDA43
A3 DQL6
DRANK@
2 A3 DQL6 CMD13 BA1 BA1 A3 A3
A5 A5 CMD14 A14 A14 A13 A13
CMDA21 R8 CMDA21 R8
CMDA5 R2 A6 D7 MDA62 CMDA5 R2 A6 D7 MDA50
A7 DQU0 A7 DQU0 CMD15 CAS# CAS# CAS# CAS#
CMDA8 T8 C3 MDA58 CMDA8 T8 C3 MDA54
CMDA23 R3 A8 DQU1 C8 MDA63 CMDA23 R3 A8 DQU1 C8 MDA48
A9 DQU2 A9 DQU2 CMD16 ODT ODT
CMDA28 L7 C2 MDA56 CMDA28 L7 C2 MDA55
CMDA4 R7 A10/AP DQU3 A7 MDA60 Group7 CMDA4 R7 A10/AP DQU3 A7 MDA49 Group6
A11 DQU4 A11 DQU4 CMD17 CS1#
CMDA7 N7 A2 MDA59 CMDA7 N7 A2 MDA52
CMDA14 T3 A12 DQU5 B8 MDA61 CMDA14 T3 A12 DQU5 B8 MDA51
A13 DQU6 A13 DQU6 CMD18 CS0#
CMDA12 T7 A3 MDA57 CMDA12 T7 A3 MDA53
M7 A14 DQU7 M7 A14 DQU7
A15/BA3 +VRAM_1.5VS A15/BA3 +VRAM_1.5VS
CMD19 CKE CKE
CMD20 RST RST RST RST
CMDA29 M2 B2 CMDA29 M2 B2
C CMDA6 N8 BA0 VDD D9 CMDA6 N8 BA0 VDD D9 C
BA1 VDD BA1 VDD CMD21 A7 A7 A6 A6
CMDA30 M3 G7 CMDA30 M3 G7
K8 K8
VDD N1 VDD N1
J7 N9 CLKA1 J7 N9
CLKA1 K7 CK VDD R1 CLKA1# K7 CK VDD R1
CLKA1# CK VDD CK VDD CMD24 A2 A2 A1 A1
CKE/CKE0 VDD +VRAM_1.5VS CKE/CKE0 VDD +VRAM_1.5VS CMD25 A10 A10 WE# WE#
CMDA16 K1 A1 CMDA16 K1 A1 CMD26 A5 A5 A4 A4
CMDA11 J3 CS/CS0 VDDQ C1 CMDA11 J3 CS/CS0 VDDQ C1
RAS VDDQ RAS VDDQ CMD27 BA2 BA2
CMDA15 K3 C9 CMDA15 K3 C9
WE VDDQ WE VDDQ CMD28 WE# WE# A10 A10
310mAVDDQ E9 E9
F1 VDDQ F1
VDDQ 310mAVDDQ CMD29 BA0 BA0 BA0 BA0
DQSA4 F3 H2 DQSA5 F3 H2
DQSA7 C7 DQSL VDDQ H9 DQSA6 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ CMD30 BA2 BA2
DQMA4 E7 A9 DQMA5 E7 A9
VSS G8 VSS G8
VSS M9 VSS M9
VSS P1 VSS P1
B ZQ6 L8 VSS T9 ZQ7 L8 VSS T9 B
1
1
J1 B1 J1 B1
RV79 L1 NC/ODT1 VSSQ B9 RV80 L1 NC/ODT1 VSSQ B9
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
DRANK@ L9 NC/CE1 VSSQ D8 DRANK@ L9 NC/CE1 VSSQ D8
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
96-BALL 96-BALL
A A

VGA_N14x VRAM RANK 1H
Custom 1.0
5 4 3 2 1
A B C D E
For eDP Panel LCD POWER CIRCUIT

CAM_EMI@ Need check eDP&LVDS both 3V power rail.
USB20_P11_R 1 2 USB20_P11
1 2
+3VS
IEDP@ USB20_N11_R 4 3 USB20_N11
C890 1 20.1U_0402_10V7K LVDS_EDID_CLK 4 3 +LCD_VDD
H_EDP_AUXP
IEDP@
W=60mils W=60mils
L55 WCM-2012-900T_0805 U16
C891 1 20.1U_0402_10V7K LVDS_EDID_DATA 1.5A 1 +LCD_VDD_OUT 1 Rshort@ 2 I rush=1.5A
H_EDP_AUXN VOUT
IEDP@ Reserve for EMI request 5 R106 0_0805_5%
1 C912 1 20.1U_0402_10V7K LVDS_TXOUT0+ VIN 1
H_EDP_TXP0
IEDP@ 2
C913 1 20.1U_0402_10V7K LVDS_TXOUT0- +LCD_VDD_SS 4 GND
H_EDP_TXN0 SS
IEDP@
C914 1 20.1U_0402_10V7K LVDS_TXOUT1+ @TOUCH_EMI@ 3
H_EDP_TXP1 EN
IEDP@ 1 2
1
C915 1 20.1U_0402_10V7K LVDS_TXOUT1- R267 0_0402_5% APL3512ABI-TRG_SOT23-5
H_EDP_TXN1
C7
TOUCH_EMI@ 0.015u_0402_16V_X7R
2
USB20_P8_R 1 2 USB20_P8
1 2
LCD_ENVDD
2
USB20_N8_R 4 3 USB20_N8
4 3 R112
L57 WCM-2012-900T_0805 100K_0402_5%
1 2
1
R266 0_0402_5%
@TOUCH_EMI@
Reserve for EMI request
For LVDS 1ch Panel LVDS colay eDP cable

1 LVDS@ 2 LVDS_TXOUT0+
Pin define will be change after ME ready
LCD_TXOUT0+
R262 0_0402_5%
2 1 LVDS@ 2 LVDS_TXOUT0- 2
LCD_TXOUT0-
R263 0_0402_5%
1 LVDS@ 2 LVDS_TXOUT1+ +5VS
LCD_TXOUT1+
R265 0_0402_5%
1 LVDS@ 2 LVDS_TXOUT1- JLVDS
LCD_TXOUT1-
R264 0_0402_5% 1 +5VS_LVDS_TOUCH 1 @ 2 20mils
LCD_TXOUT2+ LCD_TXOUT2+ pin1-4 Touch function for panel 1 2 USB20_N8_R R390 0_0603_5%
2 3 USB20_P8_R
LCD_TXOUT2- 3 4 BKOFF#
LCD_TXOUT2- 4 5 INT_MIC_DATA
LCD_TXCLK+ 5 6 INT_MIC_CLK INT_MIC_DATA
LCD_TXCLK+ pin5-10 For Webcam with single or dual MIC 6 7 INT_MIC_CLK
LCD_TXCLK- 7 8 USB20_P11_R +3VS
LCD_TXCLK- 8 9 USB20_N11_R
1 LVDS@ 2 LVDS_EDID_CLK 9 10 +3VS_LVDS_CAM 1 @ 2
LCD_EDID_CLK 10 20mils
R300 0_0402_5% 11 +LCD_VDD R389 0_0603_5%
1 LVDS@ 2 LVDS_EDID_DATA 11 12 +3VS
LCD_EDID_DATA pin11-30 For LVDS or EDP panel 12 +LCD_VDD Irush=1.5A 60mils
R299 0_0402_5% 13 +3VS
13 14 LVDS_EDID_CLK
14 15 LVDS_EDID_DATA
15 16 LVDS_TXOUT0-
16 17 LVDS_TXOUT0+
17 18 LVDS_TXOUT1-
18 19 LVDS_TXOUT1+
19 20 LCD_TXOUT2-
20 21 LCD_TXOUT2+
21 22
22 23 LCD_TXCLK-
23 24 LCD_TXCLK+
24 25
25 26 LED_PWM CPU_EDP_HPD
26 27 BKOFF#_R
3 27 28 3
28 29
29 30
30 +LCD_INV Irush=1.5A 60mils
31
GND 32
GND 33
GND 34
GND 35
GND B+
Irush=1.5A 60mils
Conn@ +LCD_INV
L2
Reserve for eDP panel potential issue 2 1
FBMA-L11-201209-221LMA30T_0805
+3VS EMI@
IEDP@1 2 IEDP@ EMI@

5
R103 0_0402_5% U17 1 2 LED_PWM LED_PWM 1 2

PCH_PWM
1 C17 100P_0402_50V8J RB751V40_SC76-2 D17
P
BKOFF#_R 1 2 4 IN1 EC_ENBKL

D15 RB751V40_SC76-2 O 2
IN2 BKOFF#
G
1
LVDS@
1
R131
3
R113 SN74AHC1G08DCKR_SC70-5 For EMI request , cut in on PVT phase. 47K_0402_5%

10K_0402_5%
Place close CONN.
2
2
1 2
R147 0_0402_5%
4 LVDS@ 4

LVDS
Custom 1.0
VFKTA
A B C D E
A B C D E
CRT CONNECTOR
1 1
UMA_CRT_R L3 1 2 NBQ100505T-800Y_0402 CRT_R_L

CRT_EMI@
UMA_CRT_G L4 1 2 NBQ100505T-800Y_0402 CRT_G_L
CRT_EMI@
UMA_CRT_B L5 1 2 NBQ100505T-800Y_0402 CRT_B_L
CRT_EMI@ T65, T66: for ATE
JCRT
CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ CRT@ 6
T65 PAD 11
R138 R139 R140 CRT_R_L 1
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
7
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1
1
CRT_DDC_DAT 12
C238 C239 C240 C241 C242 C243 CRT_G_L 2
8
2 2 2 2 2 2 HSYNC 13
CRT_B_L 3
2
+HDMI_5V_OUT 9
VSYNC 14 G 16
T66 PAD 4 17
G
10
CRT_DDC_CLK 15
USE HDMI POWER 5
C-H_13-12201513CP
Conn@
2 2
CRT@
U49 +HDMI_5V_OUT
+HDMI_5V_OUT 1 8 1 2
VCC_SYNC BYP C15 0.22U_0402_16V7K
+3VS 2 3 CRT_R_L
VCC_VIDEO VIDEO1
2
+3VS 7 4 CRT_G_L R153 R159
VCC_DDC VIDEO2 4.7K_0402_5% 4.7K_0402_5%
UMA_CRT_DATA 10 5 CRT_B_L CRT@ CRT@
1
DDC_IN1 VIDEO3
UMA_CRT_CLK 11 9 CRT_DDC_DAT
DDC_IN2 DDC_OUT1
3 13 12 CRT_DDC_CLK 3
UMA_CRT_VSYNC SYNC_IN1 DDC_OUT2
R62 CRT@
15 14 VSYNC_R 1 2 22_0402_5% VSYNC
UMA_CRT_HSYNC SYNC_IN2 SYNC_OUT1
R63
CRT@
6 16 HSYNC_R 1 2 22_0402_5% HSYNC
GND SYNC_OUT2
TPD7S019-15DBQR_SSOP16
CRT@
4 4

CRT
1.0
VFKTA
A B C D E
A B C D E
OE# A Y
1
RPY1
8 UMA_HDMI_CLK
HDMI POWER CIRCUIT
+3VS L L L
2 7 UMA_HDMI_DATA VIN = 5V, IOUT = 0.5A , RDS(ON) TYP=95m ; MAX=115m
3 6 HDMI_SCLK L H H
+HDMI_5V_OUT Current Limit: TYP=0.8A ; MAX=1A
4 5 HDMI_SDATA
H X Z
2.2K_0804_8P4R_5%
1 1
+HDMI_5V_OUT
+HDMI_5V_OUT UY2
RY1 1 5
+3VS OUT IN +5VS
HDMI_HPD_U 1 2 HDMI_HPD_C
1K_0402_5% 1 2
CY18 GND
2
2
RY2 CY4 3 4
100K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_10V7K FLG EN
1
UY1 2 AP2151DWG-7_SOT25-5
1
SA00006H000
OE#
P
2 4 HDMI_HPD
1
A Y
G
74AHCT1G125GW_SOT353-5
3
2
G
BSS138 1N SOT23-3
UMA_HDMI_CLK 3 1 HDMI_SCLK
UMA_HDMI_CLK
D
QY1
2
G
BSS138 1N SOT23-3 2 1
+3VS
UMA_HDMI_DATA 3 1 HDMI_SDATA RY3
UMA_HDMI_DATA
2.2K_0402_5%
S
QY2
HDMI_HPD
HDMI_HPD
2 2
LY1 EMI@
CY2 1 2 0.1U_0402_16V7K HDMI_TXC- 1 2
UMA_HDMI_CLK- 1 2
UMA_HDMI_CLK+
CY1 1 2 0.1U_0402_16V7K HDMI_TXC+ 4
4 3
3 HDMI Connector
WCM-2012HS-900T_4P JHDMI
HDMI_HPD_C 19
18 HP_DET
+HDMI_5V_OUT +5V
17
HDMI_SDATA 16 DDC/CEC_GND
LY2 EMI@ HDMI_SCLK 15 SDA
CY5 1 2 0.1U_0402_16V7K HDMI_TXD0- 1 2 14 SCL
UMA_HDMI_TX0- 1 2 13 Reserved
HDMI_R_CK- 12 CEC
CY3 1 2 0.1U_0402_16V7K HDMI_TXD0+ 4 3 11 CK-
UMA_HDMI_TX0+ 4 3 HDMI_R_CK+ 10 CK_shield
WCM-2012HS-900T_4P HDMI_R_D0- 9 CK+
8 D0-
HDMI_R_D0+ 7 D0_shield
HDMI_R_D1- 6 D0+
5 D1-
HDMI_R_D1+ 4 D1_shield 23
LY3 EMI@ HDMI_R_D2- 3 D1+ GND 22
CY7 1 2 0.1U_0402_16V7K HDMI_TXD1- 1 2 2 D2- GND 21
3 UMA_HDMI_TX1- 1 2 1 D2_shield GND 20 3
HDMI_R_D2+
D2+ GND
CY6 1 2 0.1U_0402_16V7K HDMI_TXD1+ 4 3
UMA_HDMI_TX1+ 4 3
Conn@
WCM-2012HS-900T_4P
680 +-5% 8P4R

HDMI_R_D0- 5 4
HDMI_R_D0+ 6 3
LY4 EMI@ HDMI_R_CK- 7 2
CY9 1 2 0.1U_0402_16V7K HDMI_TXD2- 1 2 HDMI_R_CK+ 8 1
UMA_HDMI_TX2- 1 2
RPY3
CY8 1 2 0.1U_0402_16V7K HDMI_TXD2+ 4 3
UMA_HDMI_TX2+ 4 3
WCM-2012HS-900T_4P
680 +-5% 8P4R
HDMI_R_D1- 5 4
HDMI_R_D1+ 6 3
HDMI_R_D2- 7 2
HDMI_R_D2+ 8 1
RPY4
1
QY4 D
ZZZ HDMI45@ 2
+5VS
HDMI Royalty G
RO0000003HM S
3
2N7002KW_SOT323-3
4 4
HDMI W/Logo + HDCP
HDMI W/O Logo: RO0000001HM

HDMI W/Logo: RO0000002HM
HDMI W/Logo + HDCP: RO0000003HM Security Classification Compal Secret Data Compal Electronics, Inc.
please manually load Issued Date 2012/09/24 Deciphered Date 2013/09/24 Title
this virtual material to 45@ BOM THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Conn.
1.0
VFKTA
A B C D E
5 4 3 2 1
CMOS Setting, near DDR Door RH26 GCLK@

JCMOS SP@ 1 2 PCH_RTCX1
PCH_RTCX1_R
+RTCVCC RH23 1 2 PCH_RTCRST# 1 2 0_0402_5%
20K_0402_5% UH1A
CH4 1 2
1U_0402_6.3V6K 2 1 NOGCLK@ PCH_RTCX1 A20 INT.PH 20K C38 LPC_AD0
RTCX1 FWH0 / LAD0 A38 LPC_AD1 LPC_AD0
Placement near to YH1 CH2 15P_0402_50V8J INT.PH 20K FWH1 / LAD1 LPC_AD1
LPC
PCH_RTCX2 C20 INT.PH 20K B37 LPC_AD2
RTCX2 FWH2 / LAD2 LPC_AD2
1
10M_0402_5%
NOGCLK@
iME Setting. NOGCLK@ INT.PH 20K C37 LPC_AD3
D20 FWH3 / LAD3 LPC_AD3
JME SP@ PCH_RTCRST#
RTCRST#
RH2
RH24 1 2 PCH_SRTCRST# 1 2 YH1 D36 LPC_FRAME#
PCH_SRTCRST# G22 FWH4 / LFRAME# LPC_FRAME#
20K_0402_5% 32.768KHZ_12.5P_1TJF125DP1A000D
1
CH5 1 2 SRTCRST# E36
INT.PH 20K
2
2 1 NOGCLK@ SM_INTRUDER# K22 LDRQ0# K36
RTC
D
1U_0402_6.3V6K
INTRUDER# INT.PH 20K
LDRQ1# / GPIO23 D
CH3 15P_0402_50V8J
PCH_INTVRMEN C17 V5 SERIRQ
INTVRMEN SERIRQ SERIRQ
Integrated SUS 1.05V VRM Enable AM3 SATA_PRX_C_DTX_N0

N34 SATA0RXN AM1 SATA_PRX_C_DTX_N0
High - Enable Internal VRs AZ_BITCLK SATA_PRX_C_DTX_P0
HDA_BCLK SATA0RXP AP7 SATA_PTX_DRX_N0 SATA_PRX_C_DTX_P0
PCH_INTVRMEN
SATA 6G
(must be always pulled high) AZ_SYNC L34 INT.PD 20K SATA0TXN AP5 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 HDD
HDA_SYNC SATA0TXP SATA_PTX_DRX_P0
PCH_SPKR T10 INT.PD 20K AM10
PCH_SPKR SPKR SATA1RXN AM8
+RTCVCC AZ_RST# K34 SATA1RXP AP11
HDA_RST# SATA1TXN AP10
RH12 1 2 SM_INTRUDER# SATA1TXP
1M_0402_5% AZ_SDIN0_HD E34 INT.PD 20K AD7 SATA_PRX_C_DTX_N2
AZ_SDIN0_HD HDA_SDIN0 SATA2RXN SATA_PRX_C_DTX_N2
RH33 1 2 PCH_INTVRMEN AD5 SATA_PRX_C_DTX_P2
G34 SATA2RXP AH5 SATA_PTX_DRX_N2 SATA_PRX_C_DTX_P2
+3VS
330K_0402_5% PCH_SPKR HDA_SDIN1 INT.PD 20K SATA2TXN SATA_PTX_DRX_N2 ODD
AH4 SATA_PTX_DRX_P2
@ High = Enabled "No Reboot Mode" C34 INT.PD 20K SATA2TXP SATA_PTX_DRX_P2
1 2 PCH_SPKR *
Low = Disabled (Default) HDA_SDIN2 AB8
IHDA
A34 SATA3RXN AB10
RH36 1K_0402_5%
HDA_SDIN3 INT.PD 20K SATA3RXP AF3
SATA3TXN AF1
1 2 AZ_SDOUT A36 SATA3TXP
PWRME_CTRL
Rshort@
HDA_SDO INT.PD 20K
RH25 0_0402_5% Y7
SATA
SATA4RXN Y5 RPH1 +3VS
+RTCBATT SATA4RXP
C36 AD3
HDA_DOCK_EN# / GPIO33 SATA4TXN AD1 SERIRQ 1 8
SATA4TXP
1
Change Net name due to N32 PCH_GPIO21 2 7

HDA_DOCK_RST# / GPIO13 Y3 PCH_GPIO19 3 6
this function is high SATA5RXN
DH1 Y1 SATA_LED# 4 5
+RTCVCC BAS40-04_SOT23-3 active SATA5RXP AB3
C PCH_JTAG_TCK J3 SATA5TXN AB1 C
JTAG_TCKINT.PD 20K
T70 PAD 10K_0804_8P4R_5%
SATA5TXP
3
PCH_JTAG_TMS H7 Y11
+3VL T67 PAD JTAG_TMSINT.PH 20K SATAICOMPO
JTAG
1
PCH_JTAG_TDI K5 Y10 SATAICOMP 1 2
JTAG_TDI INT.PH 20K
CH8 T68 PAD +1.05VS_PCH
SATAICOMPI RH43 37.4_0402_1%
0.1U_0402_10V7K PCH_JTAG_TDO H1
2 T69 PAD JTAG_TDO AB12
SATA3RCOMPO
AB13 SATA3_COMP 1 2
SATA3COMPI +1.05VS_PCH
RH48 49.9_0402_1%
RPH2 PCH_SPICLK T3 AH1 RBIAS_SATA3 1 2

AZ_BITCLK_HD 1 8 AZ_BITCLK SPI_CLK SATA3RBIAS RH41 750_0402_1%
AZ_BITCLK_HD 2 7 AZ_SYNC_R PCH_SPICS0# Y14
AZ_SYNC_HD 3 6 AZ_RST# SPI_CS0#
AZ_RST_HD# 4 5 AZ_SDOUT PCH_SPICS1# T1
AZ_SDOUT_HD SPI_CS1#
SPI
P3 SATA_LED#
33_8P4R_5% SATALED#
PCH_SPIDI V4 V14 PCH_GPIO21
SPI_MOSI INT.PD 20K SATA0GP / GPIO21
PCH_SPIDO U3 P1 PCH_GPIO19
SPI_MISO INT.PH 20K
HDA_SDO SATA1GP / GPIO19 PCH_GPIO19 (PH)
INT.PH 20K
BOOT BIOS Strap Bit 0
ME debug mode, PANTHER-POINT_FCBGA989
HM76R3@
this signal has a weak internal pull down
*Low = Disable (default)
High = Enable (flash descriptor security overide)
B
HDA_SYNC +3VALW_PCH
B
*This signal has a weak internal pull

H=>On Die PLL is supplied by 1.5V
down
SPI ROM for BIOS & ME (4MByte )
+3VALW_PCH
L=>On Die PLL is supplied by 1.8V 0218. Delete 0.1u

SPI ROM (2MByte )
UH3 0218. Delete 0.1u
Need to pull high for Chief River Mobile platform PCH_SPICS0# 1 8 UH4 @
PCH_SPIDO 1 Rshort@ 2 PCH_SPI0_DO 2 CS# VCC 7 RH66 0_0402_5% RH269 @ PCH_SPICS1# 1 8
RH68 3 DO HOLD# 6
PCH_SPI0_CLK 1 Rshort@ 2 PCH_SPICLK PCH_SPIDO 1 2 PCH_SPI1_DO 2 CS# VCC 7 RH267 @ 0_0402_5%
+3VALW_PCH +3VALW_PCH WP# CLK SO HOLD#
0_0402_5% 4 5
PCH_SPI0_DI 1 Rshort@ 2 PCH_SPIDI 0_0402_5% 3 6 PCH_SPI1_CLK 1 2 PCH_SPICLK
GND DI +3VALW_PCH WP# SCLK
RH67 0_0402_5% 4 5 PCH_SPI1_DI 1 2 PCH_SPIDI
+5VS 32M EN25Q32B-104HIP SOP 8P GND SI RH271 0_0402_5%
2
MX25L1606EM2I-12G_SO8 @
RH55
1K_0402_5% 4MB ROM P/N: 2MB ROM P/N:
2
G
QH1
SA00003K800 SA000041N00
1
AZ_SYNC_R 3 1 AZ_SYNC
SA00004LI00 SA00003FO10
S
D
2
RH56 BSS138 1N SOT23-3

1M_0402_5%
Please place UH3 & UH4 close to UH1 PCH,
please place RH66, RH67, RH68 near UH3
1
Please place RH267 near RH66, Please place RH271 near RH67,
Please place RH269 near RH68.
A A
RPH9
1 8 PCH_SPI0_DO
EC_SDIO 2 7 PCH_SPICS0#
EC_CS0# 3 6 PCH_SPI0_CLK
EC_SCK 4 5 PCH_SPI0_DI
EC_SDI
33_8P4R_5% Security Classification Compal Secret Data Compal Electronics, Inc.
885@ 2012/09/24 2013/09/24 Title
Issued Date Deciphered Date
PCH_HDA/JTAG/SATA/SPI/LPC
Reserve for NPCE885N EC Size Document Number Rev
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
UH1B
+3VS
PCIE_PRX_C_LANTX_N1 BG34 +3VALW_PCH RH102 4.7K_0402_5%
PCIE_PRX_C_LANTX_N1 PERN1
5
PCIE_PRX_C_LANTX_P1 BJ34 E12 PCH_SMBALERT# QH3B RH103 4.7K_0402_5%
PCIE_PRX_C_LANTX_P1 PERP1 SMBALERT# / GPIO11 PCH_SMBALERT# RPH5
LAN PCIE_PTX_C_LANRX_N1 CH13 2 1 0.1U_0402_10V7K PCIE_PTX_LANRX_N1 AV32 (PH)
CH11 2 1 0.1U_0402_10V7K PCIE_PTX_LANRX_P1 AU32 PETN1 H14 PCH_SMBCLK 5 4 PCH_SMBDATA 3 4
PCIE_PTX_C_LANRX_P1 PETP1 SMBCLK PM_SMBDATA
6 3 PCH_SMBCLK
2
PCIE_PRX_WLANTX_N2 BE34 C9 PCH_SMBDATA 7 2 PCH_SMLDATA1 QH3A 2N7002DW-T/R7_SOT363-6
PCIE_PRX_WLANTX_N2 BF34 PERN2 SMBDATA 8 1
PCIE_PRX_WLANTX_P2 PCH_SMLCLK1
PCIE_PRX_WLANTX_P2 PERP2
WLAN PCIE_PTX_C_WLANRX_N2 CH14 2 1 0.1U_0402_10V7K PCIE_PTX_WLANRX_N2 BB32 6 1
PETN2 PM_SMBCLK
PCIE_PTX_C_WLANRX_P2 CH17 2 1 0.1U_0402_10V7K PCIE_PTX_WLANRX_P2 AY32 2.2K_0804_8P4R_5%
PETP2 A12
SMBUS
DRAMRST_CNTRL_PCH 2N7002DW-T/R7_SOT363-6
BG36 SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH
BJ36 PERN3 C8 PCH_SMLCLK0
PERP3 SML0CLK +3VS
5
D AV34 QH4B D
AU34 PETN3 G12 PCH_SMLDATA0
PETP3 SML0DATA 3 4
+3VS BF36 EC_SMB_DA2
PERN4
2
BE36 QH4A 2N7002DW-T/R7_SOT363-6
AY34 PERP4 C13 LAN_EN
PETN4 SML1ALERT# / PCHHOT# / GPIO74 LAN_EN
RH1041 2 10K_0402_5% CLKREQ_WLAN# BB34 6 1
PETP4 E14 PCH_SMLCLK1 EC_SMB_CK2
RH95 1 2 10K_0402_5% CLKREQ_LAN# BG37 SML1CLK / GPIO58
PCI-E*
2N7002DW-T/R7_SOT363-6
BH37 PERN5 M16 PCH_SMLDATA1
AY36 PERP5 SML1DATA / GPIO75
Intel Spec: PETN5
BB36
PCIECLK_RQ0# is suspend well, PETP5
but we pull high to +3VS BJ38
PERN6
BG38
for LAN en/disable function AU36 PERP6 M7 +3VALW_PCH
Controller
AV36 PETN6 CL_CLK1
PETP6 DRAMRST_CNTRL_PCH RH76 1 2 1K_0402_5%
Control Link only for support Intel IAMT.
Link
+3VALW_PCH BG40 T11
RPH10 BJ40 PERN7 CL_DATA1 PCH_SMLCLK0 RH73 2 1 2.2K_0402_5%
AY40 PERP7
8 1 RI# BB40 PETN7 P10 PCH_SMLDATA0 RH77 2 1 2.2K_0402_5%
RI# PETP7 CL_RST1#
7 2 LVDS_SEL
6 3 PCH_GPIO28 BE38
PCH_GPIO28 PERN8
5 4 PASSWORD_CLEAR# BC38
AW38 PERP8
10K_0804_8P4R_5% AY38 PETN8 +3VALW_PCH
PETP8
M10 CLK_REQ_VGA# CLK_REQ_VGA# 2 1
PEG_A_CLKRQ# / GPIO47 CLK_REQ_VGA#
CLK_LAN# Y40 RH89 10K_0402_5%
CLK_LAN# Y39 CLKOUT_PCIE0N
LAN CLK_LAN
CLK_LAN CLKOUT_PCIE0P AB37 CLK_PCIE_VGA#
C CLKREQ_LAN# J2 CLKOUT_PEG_A_N AB38 CLK_PCIE_VGA CLK_PCIE_VGA# C
VGA Need to check dGPU
CLOCKS
CLKREQ_LAN# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P CLK_PCIE_VGA
CLK_WLAN# AB49 AV22 RPH3

CLK_WLAN# CLK_WLAN AB47 CLKOUT_PCIE1N CLKOUT_DMI_N AU22 CLK_CPU_DMI# PCH_CLK_DMI# 1 8
WLAN CLK_WLAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI PCH_CLK_DMI 2 7
CLKREQ_WLAN# M1 CLKIN_GND1# 3 6
CLKREQ_WLAN# PCIECLKRQ1# / GPIO18 AM12 4 5
CLKIN_GND1
CLKOUT_DP_N AM13 CLK_CPU_EDP#
AA48 CLKOUT_DP_P CLK_CPU_EDP 120 MHz for eDP
10K_0804_8P4R_5%
AA47 CLKOUT_PCIE2N
CLKOUT_PCIE2P BF18 PCH_CLK_DMI# RPH4
V10 CLKIN_DMI_N BE18 PCH_CLK_DMI CLK_SATA# 1 8
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P CLK_SATA 2 7
CLK_DOT# 3 6
Y37 BJ30 CLKIN_GND1# CLK_DOT 4 5
Y36 CLKOUT_PCIE3N CLKIN_GND1_N BG30 CLKIN_GND1
CLKOUT_PCIE3P CLKIN_GND1_P 10K_0804_8P4R_5%
+3VALW_PCH A8
PCIECLKRQ3# / GPIO25 G24 CLK_DOT# CLK_14M_PCH RH87 1 2 10K_0402_5%
RPH6 CLKIN_DOT_96N E24 CLK_DOT From Clock Gen.
1 8 EC_SWI# Y43 CLKIN_DOT_96P
2 7 EC_SWI# Y45 CLKOUT_PCIE4N
LAN_EN
3 6 PCH_SUSPWRDN#_R CLKOUT_PCIE4P AK7 CLK_SATA#
4 5 USB_CHG_OC# PCH_SUSPWRDN#_R L12 CLKIN_SATA_N AK5 CLK_SATA @EMI@ @EMI@
USB_CHG_OC# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P CLK_PCILOOP 1 2 1 2
10K_0804_8P4R_5% RH70 10_0402_5% CH9 10P_0402_50V8J
V45 K45 CLK_14M_PCH
V46 CLKOUT_PCIE5N REFCLK14IN
CLKOUT_PCIE5P
L14 H45 CLK_PCILOOP
PCIECLKRQ5# / GPIO44 INT. PH 20K CLKIN_PCILOOPBACK CLK_PCILOOP
B RH37 B
+3VALW_PCH AB42 V47 PCH_X1 1 2 PCH_X1
AB40 CLKOUT_PEG_B_N XTAL25_IN V49 PCH_X2 PCH_X1_R
Note: place in DDR area CLKOUT_PEG_B_P XTAL25_OUT
0_0402_5%
GCLK@
PASSWORD_CLEAR# E6
1 LVDS@ 2 PANEL_SEL PEG_B_CLKRQ# / GPIO56 RH38 Placement near to YH2
1
RH119 10K_0402_5% JPW Y47 XCLK_RCOMP 1 2 XCLK_RCOMP_R 1 2

XCLK_RCOMP +1.05VS_VCCDIFFCLKN
SP@ V40 0_0402_5% RH115 90.9_0402_1%
V42 CLKOUT_PCIE6N EMI@
2
CLKOUT_PCIE6P
Place close PCH side
LVDS_SEL T13 EMI request for 200M noise.
1 IEDP@ 2 PANEL_SEL PCIECLKRQ6# / GPIO45
INT. PD 20K
RH276 10K_0402_5% V38 K43 CLK_FLEX0
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 T72 PAD
V37 INT. PD 20K NOGCLK@
FLEX CLOCKS
CLKOUT_PCIE7P F47 CLK_FLEX1 RH117 2 1 1M_0402_5%

CLKOUTFLEX1 / GPIO65 T74 PAD
PANEL_SEL K12 INT. PH 20K INT. PD 20K
PCIECLKRQ7# / GPIO46 H47 CLK_FLEX2 NOGCLK@YH2 25MHZ_20PF_7V25000016
CLKOUTFLEX2 / GPIO66 T73 PAD
AK14 INT. PD 20K
AK13 CLKOUT_ITPXDP_N K49 DGPU_PRSNT# 1 2 PCH_X1 1 3 PCH_X2
CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 RH261 10K_0402_5% 1 3
GND GND
1 1
HM76R3@ PANTHER-POINT_FCBGA989 CH26 CH27
2 4
27P_0402_50V8J 27P_0402_50V8J
NOGCLK@ 2 2 NOGCLK@
LVDS_SEL PANEL_SEL
DGPU_PRSNT#
LVDS_SEL H L PANEL_SEL H L
DGPU_PRSNT# H L
A
Single A
Channel (Default) Dual Channel LVDS EDP
M/B SKU UMA DIS/OPT
Compal common design SW request to
add DGPU_Present on this GPIO67

PCH_PCI-E/SMBUS/CLK
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
UH1C
BC24 BJ14
DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0
BE20 AY14
+3VALW_PCH DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1
BG18 BE14
BG20 BH13
RPH7 BC12
1 8 BE24 FDI_RXN4 BJ12 FDI_CTX_PRX_N4
PCH_LOW_BAT#
DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5
2 7 SLP_CHG_CB0 BC20 BG10
D SLP_CHG_CB0 DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 D
3 6 PCH_SMBALERT# BJ18 BG9
PCH_SMBALERT# DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7
4 5 EC_SMI# BJ20
EC_SMI# DMI_CTX_PRX_P3 DMI3RXP BG14
AW24 FDI_RXP0 BB14 FDI_CTX_PRX_P0
10K_0804_8P4R_5%
DMI_PTX_CRX_N0 AW20 DMI0TXN FDI_RXP1 BF14 FDI_CTX_PRX_P1
DMI_PTX_CRX_N1 BB18 DMI1TXN FDI_RXP2 BG13 FDI_CTX_PRX_P2
DMI_PTX_CRX_N2 AV18 DMI2TXN FDI_RXP3 BE12 FDI_CTX_PRX_P3
RH128 0_0402_5%
DMI_PTX_CRX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4
DMI
FDI
BG12 PCH_DPWROK 1 @ 2 PCH_RSMRST#
2 1 PCH_RSMRST# AY24 FDI_RXP5 BJ10 FDI_CTX_PRX_P5
DMI_PTX_CRX_P0 AY20 DMI0TXP FDI_RXP6 BH9 FDI_CTX_PRX_P6
RH163 10K_0402_5%
DMI_PTX_CRX_P1 AY18 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7
DMI_PTX_CRX_P2 DMI2TXP Do not support DeepSX state
AU18
DMI_PTX_CRX_P3 DMI3TXP AW16
FDI_INT FDI_INT
1 2 DMI_COMP BJ24 AV12
+1.05VS_PCH DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0
RH126 49.9_0402_1%
RPH17 BG25 BC10
1 8 PM_PWROK DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1
2 7 PCH_GPIO32 1 2 RBIAS_CPY BH21 AV14
3 6 PCH_GPIO37 DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0
RH127 750_0402_1%
4 5 OPTIMUS_EN# PCH_GPIO37 BB10 +RTCVCC
OPTIMUS_EN# FDI_LSYNC1 FDI_LSYNC1
10K_0804_8P4R_5%
DSWVREN RH150 2 1 330K_0402_5%
Reserve this signal to EC by SW demand A18 DSWVREN
DSWVRMEN
2011/10/18a
System Power Management

1 @ 2 SUSACK#_R C12 INT.PH 20K E22 PCH_DPWROK DSWVREN must be always pulled high to +RTCVCC
SUSACK# SUSACK# DPWROK
RH133 0_0402_5%
* ：：
H：Enable
DSWVREN - Internal Deep Sleep 1.05V regulator
：：
L：Disable
1 2 XDP_DBRESET# K3 B9 EC_SWI#
+3VS SYS_RESET# WAKE# EC_SWI#(PH)
RH47 1K_0402_5%
C C
P12 N3 PCH_GPIO32
VGATE SYS_PWROK CLKRUN# / GPIO32
PM_PWROK L22 G8 SUS_STAT# T76 PAD

PM_PWROK PWROK SUS_STAT# / GPIO61
32.768 KHz
L10 N14 Follow EC check list demand,
APWROK SUSCLK / GPIO62 CLK_EC
but don't implement CLKRUN# this fuction
DRAMPWROK B13 D10 PM_SLP_S5#
DRAMPWROK DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5#
SUSACK#_R 2 @ 1 PCH_SUSPWRDN#_R
RH282 0_0402_5% PCH_RSMRST# C21 H4 PM_SLP_S4#
PCH_RSMRST# RSMRST# SLP_S4# PM_SLP_S4#
(PH) PCH_SUSPWRDN#_R PCH_SUSPWRDN#_R K16 F4 PM_SLP_S3#

Stuff R137 if EC does not want to SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3#
1 @ 2
involve in the handshake mechanism PCH_SUSPWRDN#
RH132 0_0402_5%
for the DeepSX state entry and exit PBTN_OUT#
PBTN_OUT# E20
PWRBTN#INT.PH 20K SLP_A#
G10 PM_SLP_A# T77 PAD
INT.PD 20K
1 2 PCH_ACIN H20 G16 PM_SLP_SUS# T78 PAD
+3VALW_PCH ACPRESENT / GPIO31 SLP_SUS#
RH161 330K_0402_5%
DH2
1 2 PCH_LOW_BAT# E10 AP14 H_PM_SYNC
ACIN BATLOW# / GPIO72 INT.PH 20K PMSYNCH H_PM_SYNC
CH751H-40PT_SOD323-2
RI# A10 K14
(PH) RI# RI# SLP_LAN# / GPIO29
PANTHER-POINT_FCBGA989
B Reserve this signal to EC by SW demand HM76R3@ B
2011/10/18a
DH5
PM_PWROK 2 1 PCH_RSMRST#
DH6
1 2
POK
A A

PCH_DMI/FDI/PM
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
UH1D
EC_ENBKL J47 INT.PD 50 SDVO_TVCLKINN AP43
EC_ENBKL L_BKLTEN
1 2 EC_ENBKL LCD_ENVDD M45 INT.PD 50 SDVO_TVCLKINP AP45
LCD_ENVDD L_VDD_EN
RH125 100K_0402_5%
PCH_PW M P45 INT.PD 50 SDVO_STALLN AM42
PCH_PW M L_BKLTCTL
INT.PD 50 SDVO_STALLP AM40
LCD_EDID_CLK LCD_EDID_CLK T40
K47 L_DDC_CLK AP39
LCD_EDID_DATA LCD_EDID_DATA
L_DDC_DATA INT.PD 50 SDVO_INTN
INT.PD 50 AP40
LCTL_CLK T45 SDVO_INTP
D D
LCTL_DATA P39 L_CTRL_CLK
L_CTRL_DATA
INT.PD 20K
1 2 LVDS_IBG AF37 P38
LVD_IBG SDVO_CTRLCLK UMA_HDMI_CLK
RH143 2.37K_0402_1% AF36 M39
LVD_VBG SDVO_CTRLDATA UMA_HDMI_DATA
INT.PD 20K
AE48
AE47 LVD_VREFH AT49
LVD_VREFL DDPB_AUXN AT47
DDPB_AUXP AT40 HDMI_HPD
DDPB_HPD HDMI_HPD
AK39
LCD_TXCLK- LVDSA_CLK#
LVDS
AK40 AV42
LCD_TXCLK+ LVDSA_CLK DDPB_0N UMA_HDMI_TX2-
AV40
+3VS DDPB_0P UMA_HDMI_TX2+
AN48 AV45
LCD_TXOUT0- LVDSA_DATA#0 DDPB_1N UMA_HDMI_TX1-
RPH8 AM47 AV46
LCD_TXOUT1- LVDSA_DATA#1 DDPB_1P UMA_HDMI_TX1+ HDMI
Digital Display Interface

AK47 AU48
LCD_TXOUT2- LVDSA_DATA#2 DDPB_2N UMA_HDMI_TX0-
1 8 LCTL_CLK AJ48 AU47
LVDSA_DATA#3 DDPB_2P UMA_HDMI_TX0+
2 7 LCTL_DATA AV47
DDPB_3N UMA_HDMI_CLK-
3 6 LCD_EDID_CLK AN47 AV49
LCD_TXOUT0+ LVDSA_DATA0 DDPB_3P UMA_HDMI_CLK+
4 5 LCD_EDID_DATA AM49
LCD_TXOUT1+ LVDSA_DATA1
AK49
LCD_TXOUT2+ LVDSA_DATA2
2.2K_0804_8P4R_5% AJ47 P46
LVDSA_DATA3 DDPC_CTRLCLK P42
DDPC_CTRLDATA
INT.PD 20K
2 1 UMA_CRT_DATA AF40
RH142 2.2K_0402_5% AF39 LVDSB_CLK# AP47
CRT@ LVDSB_CLK DDPC_AUXN AP49
2 1 UMA_CRT_CLK AH45 DDPC_AUXP AT38 RH141 2 1 100K_0402_5%
RH144 2.2K_0402_5% AH47 LVDSB_DATA#0 DDPC_HPD
C CRT@ AF49 LVDSB_DATA#1 AY47 C
AF45 LVDSB_DATA#2 DDPC_0N AY49
LVDSB_DATA#3 DDPC_0P AY43
AH43 DDPC_1N AY45
AH49 LVDSB_DATA0 DDPC_1P BA47
AF47 LVDSB_DATA1 DDPC_2N BA48
AF43 LVDSB_DATA2 DDPC_2P BB47
LVDSB_DATA3 DDPC_3N BB49
DDPC_3P
UMA_CRT_B N48 M43

UMA_CRT_B CRT_BLUE DDPD_CTRLCLK
1 2 UMA_CRT_B UMA_CRT_G P49 M36
UMA_CRT_G CRT_GREEN DDPD_CTRLDATA
RH154 150_0402_1% UMA_CRT_R T49 INT.PD 20K
UMA_CRT_R CRT_RED
CRT@
1 2 UMA_CRT_G AT45
DDPD_AUXN
CRT
RH156 150_0402_1% UMA_CRT_CLK UMA_CRT_CLK T39 AT43
CRT@ UMA_CRT_DATA M40 CRT_DDC_CLK DDPD_AUXP BH41 RH255 2 1 100K_0402_5%
UMA_CRT_DATA CRT_DDC_DATA DDPD_HPD
1 2 UMA_CRT_R
RH152 150_0402_1% BB43
CRT@ M47 DDPD_0N BB45
UMA_CRT_HSYNC CRT_HSYNC DDPD_0P
M49 BF44
UMA_CRT_VSYNC CRT_VSYNC DDPD_1N BE44
DDPD_1P BF42
2 1 CRT_IREF T43 DDPD_2N BE42
RH138 1K_0402_0.5% T42 DAC_IREF DDPD_2P BJ42
CRT_IRTN DDPD_3N BG42
CRT@ DDPD_3P
B HM76R3@ B
RH138
1K_0402_5%
NOCRT@
A A

PCH_CRT/LVDS/HDMI
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
UH1E
AY7
For Optimus +3VS
RSVD1 AV7
BG26 RSVD2 AU3
TP1 RSVD3
1
BJ26 BG4
BH25 TP2 RSVD4 RH175 +3VS
BJ16 TP3 AT10
TP4 RSVD5 10K_0402_5%
BG16 BC8 0218. Delete 0.1u
AH38 TP5 RSVD6
2
TP6
5
D AH37 AU2 UH6 D
AK43 TP7 RSVD7 AT4 PLT_RST# 1
P
AK45 TP8 RSVD8 AT3 IN1 4
C18 TP9 RSVD9 AT1 DGPU_RST# 2 O PLTRST_VGA#
TP10 RSVD10 IN2
G
N30 AY3
TP11 RSVD11
1
H3 AT5 2 SN74AHC1G08DCKR_SC70-5
3
TP12 RSVD12
2
AH12 AV3
AM4 TP13 RSVD13 AV1 RH173 CH12 RH288
AM5 TP14 RSVD14 BB1 100K_0402_5% 0.47U_0402_6.3V6K 100K_0402_5%
Y13 TP15 RSVD15 BA3 1
2
K24 TP16 RSVD16 BB5
1
L24 TP17 RSVD17 BB3
AB46 TP18 RSVD18 BB7
AB45 TP19 RSVD19 BE8
TP20 RSVD20
RSVD
BD4
RSVD21 BF6
RSVD22
B21 AV5 NV_ALE
+3VS M20 TP21 RSVD23 AV10
RPH12 AY16 TP22 RSVD24
BG46 TP23 AT8
1 8 PCH_GPIO52 TP24 RSVD25
2 7 PCH_GPIO2 AY5
3 6 PCH_GPIO51 RSVD26 BA2
4 5 ODD_DA# U3RXDN1 BE28 RSVD27
U3RXDN1 BC30 USB3Rn1 AT12
U3RXDN2 Note: HM70 only enable
U3RXDN2 BE32 USB3Rn2 RSVD28 BF3
8.2K_0804_8P4R_5% USB port 0, 1, 2, 3, 8, 9, 10, 11
BJ32 USB3Rn3 RSVD29
U3RXDP1 BC28 USB3Rn4
U3RXDP1 U3RXDP2 BE30 USB3Rp1
RPH13
U3RXDP2 BF32 USB3Rp2
USB3Rp3 INT.PD 20K
1 8 PCI_PIRQD# BG32 C24 USB20_N0
C 2 7 PCI_PIRQA# U3TXDN1 AV26 USB3Rp4 USBP0N A24 USB20_P0 USB20_N0 C
USB20_P0 USB-Right1 Intel Anti-Theft Techonlogy
3 6 PCI_PIRQB# U3TXDN1 U3TXDN2 BB26 USB3Tn1 USBP0P C25 USB20_N1
4 5 U3TXDN2 AU28 USB3Tn2 USBP1N B25 USB20_N1
PCI_PIRQC# USB20_P1 USB-Right2 High=Endabled
AY30 USB3Tn3 USBP1P C26 USB20_N2 USB20_P1
USB3Tn4 USBP2N USB20_N2 NV_ALE
8.2K_0804_8P4R_5% U3TXDP1 AU26 A26 USB20_P2 Low=Disable(floating)
U3TXDP1 U3TXDP2 AY26 USB3Tp1 USBP2P K28 USB20_N3 USB20_P2 USB-Left *
U3TXDP2 AV28 USB3Tp2 USBP3N H28 USB20_P3 USB20_N3
AW30 USB3Tp3 USBP3P E28 USB20_P3 CardReader +1.8VS
10K_0402_5% RH176 EHCI 1
1 2 DGPU_PWR_EN USB3Tp4 USBP4N D28
USBP4P C28 NV_ALE 1 @ 2
USBP5N A28 RH164 1K_0402_5%
8.2K_0402_5% RH305 USBP5P C29
1 2 PCH_GPIO4 USBP6N B29
PCI_PIRQA# K40 USBP6P N28
8.2K_0402_5% RH306 PCI_PIRQB# K38 PIRQA# USBP7N M28
PIRQB# USBP7P
PCI
1 2 PCH_GPIO5 PCI_PIRQC# H38 L30 USB20_N8
PCI_PIRQD# G38 PIRQC# USBP8N K30 USB20_P8 USB20_N8
PIRQD# USBP8P G30 USB20_N9 USB20_P8 Touch Screen
C46 USBP9N E30 USB20_N9
DGPU_RST# USB20_P9 BT
REQ1# / GPIO50 USBP9P USB20_P9
USB
PCH_GPIO52 C44 C30
DGPU_PWR_EN E40 REQ2# / GPIO52 USBP10N A30
DGPU_PWR_EN REQ3# / GPIO54 EHCI 2 USBP10P L32 USB20_N11
NFC
D47 USBP11N K32 USB20_N11
PCH_GPIO51 INT.PU 20K USB20_P11 Int. Camera
E42 GNT1# / GPIO51 USBP11P G32 USB20_P11
GNT2# / GPIO53 INT.PU 20K USBP12N
F46 INT.PU 20K E32
GNT3# / GPIO55 USBP12P C32
USBP13N A32
PCH_GPIO2 G42 USBP13P
ODD_DA# G40 PIRQE# / GPIO2
ODD_DA# PCH_GPIO4 C42 PIRQF# / GPIO3 C33 USBBIAS 1 2
PCH_GPIO5 D44 PIRQG# / GPIO4 USBRBIAS# RH165 22.6_0402_1%
PIRQH# / GPIO5
B B33
Within 500 mils B
PCI_PME# K10 USBRBIAS
T80 PAD PME# INT.PU 20K
PLT_RST# C6 A14 USB_OC#0 USB-Right Rear
PLT_RST# PLTRST# OC0# / GPIO59 K20 USB_OC#0
USB_CHG_OC# USB-Right Front OC#1 PH @ page 26
OC1# / GPIO40 B17 USB_OC#2 USB_CHG_OC# CB0 PH @ page 27
OC2# / GPIO41 USB_OC#2 USB-Left
22_0402_5% 1 EMI@ 2 RH167 CLK_EC_R H49 INT.PD 20K C16 SLP_CHG_CB1
CLK_PCI_EC CLKOUT_PCI0 OC3# / GPIO42 SLP_CHG_CB1 +3VALW_PCH
0_0402_5% 1 @ 2 RH166 CLK_PCH H43 INT.PD 20K L16 SLP_CHG_CB0
CLK_PCILOOP CLK_PCI_DDR J48 CLKOUT_PCI1 OC4# / GPIO43 A16 USB_OC#5_7 SLP_CHG_CB0
T81 PAD INT.PD
CLKOUT_PCI2 20K OC5# / GPIO9
1 K42 INT.PD 20K D14 RPH11
CLKOUT_PCI3 OC6# / GPIO10
22P_0402_50V8J
CH115
H40 INT.PD 20K C14

CLKOUT_PCI4 OC7# / GPIO14 USB_OC#0 1 8
@RF@ USB_OC#5_7 2 7
2 PANTHER-POINT_FCBGA989 SLP_CHG_CB1 3 6
HM76R3@ USB_OC#2 4 5
10K_0804_8P4R_5%
Boot BIOS Strap

PCH_GPIO51 PCH_GPIO19 Boot BIOS Loaction
0 0 LPC
ESD@
180P_0402_50V8J 1 2 CH105 ODD_DA# Reserved
0 1
1 0 PCI
1K_0402_5% 2 @ 1 RH293 PCH_GPIO51
1 1 SPI *
1K_0402_5% 2 @ 1 RH294 PCH_GPIO19
A PCH_GPIO19 A
A16 Swap Override Strap

Low= A16 swap override Enable
WL_OFF# * High= A16 swap override Disable Security Classification Compal Secret Data Compal Electronics, Inc.
PCH_PCI/USB/NAND
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
UH1F +3VS
INT.PH 20K
HDMI_HPD T7 C40 ODD_EN#
+3VALW _PCH HDMI_HPD BMBUSY# / GPIO0 TACH4 / GPIO68 ODD_EN#
INT.PH 20K RPH16
A42 B41
TACH1 / GPIO1INT.PH 20K CPU_PGA_BGA#
TACH5 / GPIO69 for common BIOS on PBA/BGA CPU 1 8
INT.PH 20K ODD_EN#
2 1 EC_LID_OUT# H36 C41 2 7
TACH2 / GPIO6INT.PH 20K SPK_DET GATEA20
TACH6 / GPIO70 SPK_DET
RH204 1K_0402_5% INT.PH 20K KB_RST# 3 6
EC_SCI# E38 A40 4 5
EC_SCI# TACH3 / GPIO7INT.PH 20K TACH7 / GPIO71
D D
EC_SMI# C10 INT.PH 20K 10K_0804_8P4R_5%
(PH) GPIO8
C4 CPU_PGA_BGA# 2 1
LAN_PHY_PWR_CTRL / GPIO12 RH202 10K_0402_5%
EC_LID_OUT# G2 P4
GPIO15 INT.PD 20K
EC_LID_OUT# GATEA20
A20GATE GATEA20
INT.PD 350 AU16
PCH_GPIO16 U2 PECI @ESD@
SATA4GP / GPIO16 P5 KB_RST# H_THERMTRIP# 1 2
For Optimus RCIN# KB_RST#
CH1 100P_0402_50V8J
GPIO
VGA_PW ROK D40 INT.PH 20K AY11 H_PW RGOOD
+3VS VGA_PW ROK TACH0 / GPIO17 PROCPWRGD H_PW RGOOD
CPU/MISC
VRAM_DR_SR# T5 AY10 PCH_THRMTRIP# 1 2
SCLOCK / GPIO22 THRMTRIP# H_THERMTRIP#
RH191 390_0402_5%
E8 INT.PH 20K T14 by ESD requestion and place near CPU
1 2 GPIO24 INIT3_3V#
ODD_DETECT# This signal has weak internal
RH178 200K_0402_5% PCH_GPIO27 E16 AY1
GPIO27 INT.PH 20K INT.PD 20K NV_CLE
DF_TVS pull-up, can't be pulled low
P8
(PH) PCH_GPIO28 GPIO28 INT.PH 20K
AH8
PCH_GPIO34 K1 TS_VSS1 SM_DET BIOS setup Speaker Type BOM
+3VS STP_PCI# / GPIO34 AK11
K4 TS_VSS2
RPH15 GPIO35 AH10
1 8 PCH_GPIO34 ODD_DETECT# V8 TS_VSS3 1 S&M option Harman/Kardon 269@
ODD_DETECT# SATA2GP / GPIO36 INT.PD 20K
2 7 PCH_GPIO16 AK10
3 6 EC_SCI# M5 TS_VSS4
PCH_GPIO37 SATA3GP / GPIO37 INT.PD 20K
4 5 PCH_GPIO49 (PH)
0 Non Harman 259@
C N2 P37 C
(PH) OPTIMUS_EN# SLOAD / GPIO38 NC_1
10K_0804_8P4R_5%
GVDR@ M3
2 1 VRAM_DR_SR# SDATAOUT0 / GPIO39
RH203 10K_0402_5% SM_DET V13 BG2
269@ SDATAOUT1 / GPIO48 VSS_NCTF_15
2 1 SM_DET PCH_GPIO49 V3 BG48
Non-Harman detection
RH200 10K_0402_5% SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
D6 BH3
GPIO57 VSS_NCTF_17
BH47
0 ONKYO
0 Single Rank VSS_NCTF_18
259@ A4 BJ4
SPK_DET
2 1 SM_DET
VRAM_DR_SR# VSS_NCTF_1 VSS_NCTF_19
RH201 10K_0402_5% A44 BJ44
1 Non-Brand
GVSR@
1 Daul Rank VSS_NCTF_2 VSS_NCTF_20
2 1 VRAM_DR_SR# A45 BJ45
RH205 10K_0402_5% VSS_NCTF_3 VSS_NCTF_21
NCTF
A46 BJ46
2 1 VSS_NCTF_4 VSS_NCTF_22
@ PCH_GPIO27 DMI & FDI Termination Voltage
RH199 10K_0402_5% Follow Compal ORB A5 BJ5
VSS_NCTF_5 VSS_NCTF_23
and Intel Check list 460603 V1.5
A6 BJ6 Set to VCC when HIGH
NV_CLE
B3 C2 Set to VSS when LOW
B47 C48
BD1 D1 +1.8VS
B VSS_NCTF_9 VSS_NCTF_27 B
BD49 D49
1
BE1 E1 RH187
2.2K_0402_5%
BE49 E49
2
BF1 F1
VSS_NCTF_13 VSS_NCTF_31 NV_CLE 2 1 H_SNB_IVB#
BF49 F49 RH189 1K_0402_5%
GPIO28
On-Die PLL Voltage Regulator PANTHER-POINT_FCBGA989
* H: Enable HM76R3@
L: Disable
OPTIMUS_EN#
GPIO8 OPTIMUS_EN# H L
Integrated Clock Chip Enable (Removed)
H: Disable SKU NonOPT Optimus
L: Enable
*
A A
Integrated clock enable functionality

is achieved by soft-strap Security Classification Compal Secret Data Compal Electronics, Inc.
The current default is clock enable Issued Date 2012/09/24 Deciphered Date 2013/09/24 Title
PCH_CPU/GPIO
B 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
+1.05VS_VCCP UH1G POWER +3VS
JP@PJ4 PCH Power Rail Table

1730mA RH309 LH1
2
2 1
1 1U_0402_6.3V6K +1.05VS_PCH AA23
VCCCORE[1] 1mA VCCADAC
U48 +VCCA_DAC 0.1U_0402_10V7K 1 2 +VCCA_DAC_R2 1 Refer to PCH EDS R1.0
AC23 1 1 1_0603_1% BLM18PG181SN1D_0603
AD21 VCCCORE[2]
JUMP_43X79 1 1 1 1 CH35 CH36 CH37 S0 Iccmax
CRT
AD23 VCCCORE[3] U47
CH32 CH33 CH31 CH34
VCCCORE[4] VSSADAC
0.01U_0402_25V7K 10U_0603_6.3V6M Voltage Rail Voltage Current (A)
D AF21 D
VCC CORE
10U_0603_6.3V6M AF23 VCCCORE[5] 2 2
2 2 2 2 AG21 VCCCORE[6] +3VS
VCCCORE[7]
V_PROC_IO 1.05 0.001
AG23
AG24 VCCCORE[8] AK36 +VCCA_LVDS 1 2
1U_0402_6.3V6K 1U_0402_6.3V6K
VCCCORE[9] 1mA VCCALVDS
Rshort@
AG26 RH208 0_0402_5% V5REF 5 0.001
AG27 VCCCORE[10] AK37
AG29 VCCCORE[11] VSSALVDS
AJ23 VCCCORE[12]
VCCCORE[13]
V5REF_Sus 5 0.001
+1.8VS
LVDS
AJ26 AM37
AJ27 VCCCORE[14] VCCTX_LVDS[1] LH2
AJ29 VCCCORE[15] AM38 +VCCTX_LVDS 2 1
VCCCORE[16] VCCTX_LVDS[2]
0.01U_0402_25V7K Vcc3_3 3.3 0.228
AJ31 1 BLM18PG181SN1D_0603
VCCCORE[17] AP36
+1.05VS_PCH 60mA VCCTX_LVDS[3]
CH40
CH38 CH39 22U_0805_6.3V6M VccADAC 3.3 0.063
AP37 0.01U_0402_25V7K
AN19 VCCTX_LVDS[4] 2
VCCIO[28]
VccADPLLA 1.05 0.08
This pin can be left as NC if BJ22 +3VS
PAD T82
On-Die VR is enabled (Default) VCCAPLLEXP
VccADPLLB 1.05 0.08
V33
AN16 VCC3_3[6]
HVCMOS
VCCIO[15]
1 VccCore 1.05 1.7
AN17 CH42
VCCIO[16] V34 0.1U_0402_10V7K
VCC3_3[7]
VccDMI 1.1 0.047
AN21 2
VCCIO[17] +VCCAFDI_VRM +1.5VS
AN26 VccIO 1.05 3.711
VCCIO[18] RH221 0_0402_5%
AN27 AT16 +VCCAFDI_VRM 1 2
VCCIO[19] 3709mA
Rshort@
C VCCVRM[3] C
VccASW 1.05 0.903
+1.05VS_PCH AP21 +VCCP_VCCDMI +1.05VS_VCCP
VCCIO[20] RH213 0_0402_5%
1U_0402_6.3V6K AP23 AT20 +VCCP_VCCDMI 1 2
Rshort@ VccSPI 3.3 0.01
VCCIO[21] VCCDMI[1]
1
+1.05VS_PCH
DMI
1 1 1 1 1 AP24
VCCIO[22]
VCCIO
CH43 CH45 CH46 CH47 CH44 RH214 0_0402_5% CH48 VccDSW 3.3 0.001
AP26 AB36 +1.05VS_VCC_DMI 1 2
Rshort@ 1U_0402_6.3V6K
10U_0603_6.3V6M 1U_0402_6.3V6K VCCIO[23] 75mA VCCCLKDMI 2
2 2 2 2 2 1
AT24 VccDFTERM 1.8 0.002
VCCIO[24] CH49
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
AN33 2 VccRTC 3.3 N/A
VCCIO[25]
VCCDFTERM
AN34 AG16 +1.8VS
+3VS VCCIO[26] VCCDFTERM[1]
VccSus3_3 3.3 0.095
BH29 AG17
VCC3_3[3] VCCDFTERM[2]
1 DFT / SPI 1 VccSusHDA 3.3 0.01
CH50 190mA
0.1U_0402_10V7K AJ16 CH51
VCCDFTERM[3] 0.1U_0402_10V7K VccVRM 1.5 0.167
2 +VCCAFDI_VRM AP16 2
VCCVRM[2] AJ17
VCCDFTERM[4]
VccCLKDMI 1.05 0.07
This pin can be left as NC if BG6
PAD T83 VccAFDIPLL +3VALW_PCH
On-Die VR is enabled (Default) VccSSC 1.05 0.095
AP17
+1.05VS_PCH VCCIO[27] V1
FDI
20mA VCCSPI
VccDIFFCLKN 1.05 0.055
AU20 1
B +VCCP_VCCDMI VCCDMI[2] B
CH53 VccALVDS 3.3 0.001
PANTHER-POINT_FCBGA989 1U_0402_6.3V6K
2
HM76R3@ VccTX_LVDS 1.8 0.04
+3VALW to +3VALW_PCH
+3VALW +3VALW_PCH
QH2
AO3413_SOT23
3 1
S
D
CH111
CH112
CH113
G
1 1
2
0.01U_0402_25V7K
0.1U_0402_10V7K
0.1U_0402_25V6
2 2
A A
PCH_PWR_EN# 2 1
PCH_PWR_EN#
RH3 47K_0402_5%

PCH_POWER-1
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
+5VALW +5VALW_PCH
+3VS
LH5
1 2 +3VS_VCC_CLKF33
10UH_LB2012T100MR_20% 1 1
This pin can be left as NC if
CH73 CH74 QH6
10U_0603_6.3V6M 1U_0402_6.3V6K On-Die VR is enabled (Default) AO3413_SOT23
2 2 UH1J POWER +1.05VS_PCH 3 1
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
AD49 N26
+3VALW_PCH VCCACLK VCCIO[29]
G
1 1
2
D P26 D
VCCIO[30] 1
CH59
T16 CH56
VCCDSW3_3 3mA
CH80
P28 1U_0402_6.3V6K
VCCIO[31] 2 2
1 2
CH55 V12 T27
0.1U_0402_10V7K DCPSUSBYP VCCIO[32] RH328
T29 2 1
2 +3VS_VCC_CLKF33 T38 VCCIO[33] +3VALW_PCH PCH_PWR_EN#
47K_0402_5%
VCC3_3[5]
T23
BH23 VCCSUS3_3[7]
VCCAPLLDMI2 1
119mA VCCSUS3_3[8] T24 CH60 +3VALW_PCH
AL29 0.1U_0402_10V7K
+1.05VS_PCH VCCIO[14] V23
VCCSUS3_3[9] 2
USB
1 Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB
AL24 V24
DCPSUS[3] VCCSUS3_3[10] CH61
P24 0.1U_0402_10V7K
VCCSUS3_3[6] 2
AA19 +5VALW_PCH +3VALW_PCH
+1.05VS_PCH VCCASW[1] T26
VCCIO[34] +1.05VS_PCH
AA21 1010mA
VCCASW[2]
2
AA24 1mA M26 +PCH_V5REF_SUS RH232 DH3
VCCASW[3] V5REF_SUS
10_0402_5%
1 1 AA26 CH751H-40PT_SOD323-2
Clock and Miscellaneous

CH64 CH65 VCCASW[4] AN23
1
AA27 DCPSUS[4] +PCH_V5REF_SUS
22U_0805_6.3V6M VCCASW[5] AN24
2 2 VCCSUS3_3[1] +3VALW_PCH 1
AA29 CH63
22U_0805_6.3V6M VCCASW[6] 1 2
AA31 CH66 0.1U_0402_10V7K 0.1U_0402_10V7K
C VCCASW[7] 2 C
1U_0402_6.3V6K AC26 P34 +PCH_V5REF_RUN
1 1 1
VCCASW[8] 1mA V5REF +3VALW_PCH
CH67 CH68 CH69 AC27
VCCASW[9] N20
+1.05VS_PCH 1U_0402_6.3V6K 1U_0402_6.3V6K AC29 VCCSUS3_3[2]
PCI/GPIO/LPC
2 2 2 VCCASW[10] 1 +5VS +3VS
N22 CH70 CH63 & CH71 are
LH7 AC31 VCCSUS3_3[3] 1U_0402_6.3V6K
VCCASW[11] different by Intel CRB.
1 2 +1.05VS_VCCADPLLA P20
VCCSUS3_3[4]
2
BLM18PG181SN1D_0603 AD29 2
LH8 VCCASW[12] P22 RH237 DH4
1 2 +1.05VS_VCCADPLLB AD31 VCCSUS3_3[5] +3VS
VCCASW[13] 10_0402_5%
BLM18PG181SN1D_0603 CH751H-40PT_SOD323-2
W21 AA16
1
VCCASW[14] VCC3_3[1] +PCH_V5REF_RUN
1 1 1 1 +3VS 1
CH93 CH94 CH95 CH96 W23 W16 CH72 1
1U_0402_6.3V6K VCCASW[15] VCC3_3[8] 0.1U_0402_10V7K
1U_0402_6.3V6K W24 T34 CH71
2 2 2 2 VCCASW[16] VCC3_3[4] 2 1U_0402_6.3V6K
10U_0603_6.3V6M 10U_0603_6.3V6M W26 1 2 2
VCCASW[17] CH75
W29 0.1U_0402_10V7K +3VS
VCCASW[18]
W31 AJ2
VCCASW[19] VCC3_3[2] +1.05VS_PCH
1
W33
VCCASW[20] AF13 CH76
VCCIO[5] 0.1U_0402_10V7K
+VCCRTCEXT N16 2
DCPRTC 1
1 AH13 CH77
CH78 VCCIO[12] 1U_0402_6.3V6K
0.1U_0402_10V7K +VCCAFDI_VRM Y49 AH14
B VCCVRM[4] VCCIO[13] 2 B
2 Place CH77 near pin AF13, AH13, AH14, AF14
AF14 This pin can be left as NC if
+1.05VS_VCCADPLLA BD47 VCCIO[6]
VCCADPLLA 80mA On-Die VR is enabled (Default)
SATA
AK1
+1.05VS_PCH +1.05VS_VCCADPLLB BF47 VCCAPLLSATA +VCCAFDI_VRM
VCCADPLLB 80mA
Place CH79 near pin AF17 1 AF11 +VCCAFDI_VRM
AF17 VCCVRM[1] +1.05VS_PCH
CH79
VCCIO[7] 55mA
1U_0402_6.3V6K AF33
AF34 VCCDIFFCLKN[1] AC16
+1.05VS_PCH +1.05VS_VCCDIFFCLKN 2 +1.05VS_VCCDIFFCLKN AG34 VCCDIFFCLKN[2] VCCIO[2]
RH247 0_0402_5% +1.05VS_PCH VCCDIFFCLKN[3] AC17
VCCIO[3] 1
1 2
Rshort@ +1.05VS_VCCDIFFCLKN CH82
1 AG33 AD17 1U_0402_6.3V6K
CH81 VCCSSC 95mA VCCIO[4]
1 2
1U_0402_6.3V6K CH84
1U_0402_6.3V6K +VCCSST V16 Place CH82 near pin AC16, AC17, AD17
2 DCPSST +1.05VS_PCH
2 1
0.1U_0402_10V7K
T17 T21
CH85 V19 DCPSUS[1] VCCASW[22]
2 DCPSUS[2]
MISC
+1.05VS_VCCP V21
VCCASW[23]
1mA
CPU
0.1U_0402_10V7K BJ8
V_PROC_IO T19
VCCASW[21]
1 1 1
CH87 CH88 +RTCVCC
CH86 +3VALW_PCH
4.7U_0603_6.3V6K 0.1U_0402_10V7K 0.1U_0402_10V7K A22 10mA P32
RTC
2 2 2 VCCRTC VCCSUSHDA
HDA
A A
1 1
CH90 PANTHER-POINT_FCBGA989 CH92
Place CH86, CH87, CH88 near pin BJ8 HM76R3@ 0.1U_0402_10V7K
2 2

PCH_POWER-2
Custom 1.0
VFKTA
5 4 3 2 1
5 4 3 2 1
UH1I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
UH1H B15 VSS[163] VSS[263] K7
H5 B19 VSS[164] VSS[264] L18
VSS[0] B23 VSS[165] VSS[265] L2
AA17 AK38 B27 VSS[166] VSS[266] L20
AA2 VSS[1] VSS[80] AK4 B31 VSS[167] VSS[267] L26
D VSS[4] VSS[83] VSS[170] VSS[270] D
AA34 AK8 B7 L48
AB11 VSS[5] VSS[84] AL16 F45 VSS[171] VSS[271] M12
AB14 VSS[6] VSS[85] AL17 BB12 VSS[172] VSS[272] P16
AB39 VSS[7] VSS[86] AL19 BB16 VSS[173] VSS[273] M18
AC19 VSS[12] VSS[91] AL27 BB30 VSS[178] VSS[278] M34
AC33 VSS[16] VSS[95] AL48 BC14 VSS[182] VSS[282] M46
AC34 VSS[17] VSS[96] AM11 BC18 VSS[183] VSS[283] M8
AC48 VSS[18] VSS[97] AM14 BC2 VSS[184] VSS[284] N18
AD10 VSS[19] VSS[98] AM36 BC22 VSS[185] VSS[285] P30
AD11 VSS[20] VSS[99] AM39 BC26 VSS[186] VSS[286] N47
AD19 VSS[23] VSS[102] AM46 BC36 VSS[189] VSS[289] T33
AD26 VSS[25] VSS[104] AN2 BC42 VSS[191] VSS[291] P43
AD27 VSS[26] VSS[105] AN29 BC48 VSS[192] VSS[292] P47
AD33 VSS[27] VSS[106] AN3 BD46 VSS[193] VSS[293] P7
AD34 VSS[28] VSS[107] AN31 BD5 VSS[194] VSS[294] R2
AD36 VSS[29] VSS[108] AP12 BE22 VSS[195] VSS[295] R48
AD37 VSS[30] VSS[109] AP19 BE26 VSS[196] VSS[296] T12
AD38 VSS[31] VSS[110] AP28 BE40 VSS[197] VSS[297] T31
AD39 VSS[32] VSS[111] AP30 BF10 VSS[198] VSS[298] T37
AD40 VSS[34] VSS[113] AP38 BF16 VSS[200] VSS[300] W34
C AD42 VSS[35] VSS[114] AP4 BF20 VSS[201] VSS[301] T46 C
AD46 VSS[38] VSS[117] AP8 BF26 VSS[204] VSS[304] V11
AD8 VSS[39] VSS[118] AR2 BF28 VSS[205] VSS[305] V17
AE2 VSS[40] VSS[119] AR48 BD3 VSS[206] VSS[306] V26
AE3 VSS[41] VSS[120] AT11 BF30 VSS[207] VSS[307] V27
AF10 VSS[42] VSS[121] AT13 BF38 VSS[208] VSS[308] V29
AF12 VSS[43] VSS[122] AT18 BF40 VSS[209] VSS[309] V31
AD14 VSS[44] VSS[123] AT22 BF8 VSS[210] VSS[310] V36
AD16 VSS[45] VSS[124] AT26 BG17 VSS[211] VSS[311] V39
AF16 VSS[46] VSS[125] AT28 BG21 VSS[212] VSS[312] V43
AF19 VSS[47] VSS[126] AT30 BG33 VSS[213] VSS[313] V7
AF24 VSS[48] VSS[127] AT32 BG44 VSS[214] VSS[314] W17
AF26 VSS[49] VSS[128] AT34 BG8 VSS[215] VSS[315] W19
AF27 VSS[50] VSS[129] AT39 BH11 VSS[216] VSS[316] W2
AF38 VSS[53] VSS[132] AT7 BH19 VSS[219] VSS[319] Y12
AF4 VSS[54] VSS[133] AU24 H10 VSS[220] VSS[320] Y38
AF42 VSS[55] VSS[134] AU30 BH27 VSS[221] VSS[321] Y4
AF46 VSS[56] VSS[135] AV16 BH31 VSS[222] VSS[322] Y42
AF8 VSS[59] VSS[138] AV30 BH39 VSS[225] VSS[325] BG29
AG19 VSS[60] VSS[139] AV38 BH43 VSS[226] VSS[328] N24
AG2 VSS[61] VSS[140] AV4 BH7 VSS[227] VSS[329] AJ3
AG31 VSS[62] VSS[141] AV43 D3 VSS[228] VSS[330] AD47
AG48 VSS[63] VSS[142] AV8 D12 VSS[229] VSS[331] B43
AH11 VSS[64] VSS[143] AW14 D16 VSS[230] VSS[333] BE10
AH3 VSS[65] VSS[144] AW18 D18 VSS[231] VSS[334] BG41
B AH36 VSS[66] VSS[145] AW2 D22 VSS[232] VSS[335] G14 B
AH39 VSS[67] VSS[146] AW22 D24 VSS[233] VSS[337] H16
AH40 VSS[68] VSS[147] AW26 D26 VSS[234] VSS[338] T36
AH7 VSS[71] VSS[150] AW34 D34 VSS[237] VSS[343] C22
AJ19 VSS[72] VSS[151] AW36 D38 VSS[238] VSS[344] AP13
AJ21 VSS[73] VSS[152] AW40 D42 VSS[239] VSS[345] M14
AJ24 VSS[74] VSS[153] AW48 D8 VSS[240] VSS[346] AP3
AJ33 VSS[75] VSS[154] AV11 E18 VSS[241] VSS[347] AP1
AJ34 VSS[76] VSS[155] AY12 E26 VSS[242] VSS[348] BE16
AK12 VSS[77] VSS[156] AY22 G18 VSS[243] VSS[349] BC16
AK3 VSS[78] VSS[157] AY28 G20 VSS[244] VSS[350] BG28
VSS[79] VSS[158] G26 VSS[245] VSS[351] BJ28
PANTHER-POINT_FCBGA989 G28 VSS[246] VSS[352]
G36 VSS[247]
HM76R3@ G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
A HM76R3@ A

PCH_GND
Custom 1.0
VFKTA
5 4 3 2 1
A B C D E
SATA HDD Conn. SATA ODD Conn

JHDD
Close to JHDD
True Power Consumption
1
GND 2 SATA_PTX_C_DRX_P0 C369 1 2 0.01U_0402_25V7K JODD
Close to JODD
A+ 3 SATA_PTX_DRX_P0
SATA_PTX_C_DRX_N0 C367 1 2 0.01U_0402_25V7K Peak 1800 mA
A- 4 SATA_PTX_DRX_N0 1
GND 5 GND Read (CD) 1100 mA
SATA_PRX_DTX_N0 C368 1 2 0.01U_0402_25V7K 2 SATA_PTX_C_DRX_P2 C376 1 2 0.01U_0402_25V7K
B- 6 SATA_PRX_C_DTX_N0 A+ SATA_PTX_DRX_P2 Read (DVD) 950 mA
SATA_PRX_DTX_P0 C370 1 2 0.01U_0402_25V7K 3 SATA_PTX_C_DRX_N2 C377 1 2 0.01U_0402_25V7K
B+ 7 SATA_PRX_C_DTX_P0 A- 4 SATA_PTX_DRX_N2 Write 1300 mA
GND GND 5 SATA_PRX_DTX_N2 C378 1 2 0.01U_0402_25V7K
B- SATA_PRX_C_DTX_N2 Standby 20mA
6 SATA_PRX_DTX_P2 C375 1 2 0.01U_0402_25V7K
1 8 B+ 7 SATA_PRX_C_DTX_P2 1
V33 9 GND
V33 10 +3VS
V33 11 8
GND 12 DP 9 ODD_DETECT#
GND +5V +5VS_ODD
13 10
GND 14 +5V 11
V5 15 15 MD 12 ODD_DA#
V5 16 14 GND GND 13
V5 17 +5VS GND GND
GND 18 +5VS_ODD
DAS/DSS Place components closely ODD CONN.
19 SANTA_202401-1
23 GND 20 +5VS
24 GND V12 21
Place closely JHDD SATA CONN. Conn@
GND V12
1.2A 1 1 1
22 C355 C360 C380
V12
1 1 1
C356 C357 C358 10U_0805_10V4Z 0.1U_0402_10V7K 0.1U_0402_10V7K
SUYIN_127043FR022G196ZR 0.1U_0402_10V7K 0.1U_0402_10V7K 2 2 2
Conn@ 10U_0805_10V4Z
2 2 2
G-Sensor
2 2
+5VS +3VS_HDP UG1 GSENSOR@

2 3 VOUTX CG1 1 2 GSENSOR@ 0.033U_0402_16V7K
+3VS_HDP Vdd1 Voutx
12 5 VOUTY CG2 1 2 GSENSOR@ 0.033U_0402_16V7K
Vdd2 Vouty 7 VOUTZ CG3 1 2 GSENSOR@ 0.033U_0402_16V7K
1 1 Voutz
CG12 UG3 GSENSOR@ CG13
1U_0402_6.3V6K 1U_0402_6.3V6K SELF_TEST 4 10
GSENSOR@ 1 5 GSENSOR@ 6 ST NC1 11
2 VIN VOUT 2 8 PD NC2 14
2 FS NC3 15
GND NC4 16
3 4 NC5
SHDN# BP 9 1
+3VS_HDP Rev GND1 13
G9191-330T1U_SOT23-5 GND2
SA000022I00 TSH352TR LGA 16P
SA00004GB00
UG2
1 11
3 EC_SMB_CK2 P3_5/SSCK/SCL/CMP1_2 P1_6/CLK0/SSI01 HDPACT 3
2
SELF_TEST 2 12 RG9
P3_7/CNTR0#/SSO/TXD1 P1_5/RXD0/CNTR01/INT11# 47K_0402_5%
+3VS_HDP GSENSOR@
+3VS_HDP_R 3 13
1
RESET# P1_4/TXD0
RPG1 GXOUT 4 14
XOUT/P4_7 P1_3/KI3#/AN11/TZOUT HDPLOCK
1 8 +3VS_HDP_R RG10 47K_0402_5%
2 7 GXOUT 5 15 VOUTZ 2 1
3 6 GXIN VSS/AVSS P1_2/KI2#/AN10/CMP0_2 GSENSOR@
4 5 +3VS_HDP_M SA00003A600
GXIN 6 16
XIN/P4_6 P4_2/VREF +3VS_HDP
4.7K_8P4R_5%
GSENSOR@ 1
+3VS_HDP 7 17 VOUTX CG6
VCC/AVCC P1_1/KI1#/AN9/CMP0_1 0.1U_0402_10V7K
GSENSOR@
+3VS_HDP_M 8 18 VOUTY 2
MODE P1_0/KI0#/AN8/CMP0_0
HDPINT RG7 2 1 1K_0402_5% 9 19

HDPINT GSENSOR@ P4_5/INT0#/RXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0
1 1 10 20
P1_7/CNTR00/INT10# P3_4/SCS#/SDA/CMP1_1 EC_SMB_DA2
CG8
CG7 GSENSOR@
0.1U_0402_10V7K 0.1U_0402_10V7K R5F211B4D34SP GSENSOR@
GSENSOR@ 2 2
4 4

HDD/ODD/G-Sensor
1.0
VFKTA
A B C D E
A B C D E
Slot 1 Half PCIe Mini Card-WLAN

WLAN&BT Combo module circuits
+3V_WLAN
40 mils
BT BT
on module on module
0.1U_0402_10V7K
1 1 1 Enable Disable
CM1 CM2 CM3
2 2 2 BT_ON H L
0.1U_0402_10V7K 4.7U_0603_6.3V6K
1 1
BT_ON 1 RM27 2 E51_RXD

From EC BT_ON
1K_0402_5%
For isolate BT_ON and

Compal Debug Card.
+3V_WLAN
JWLAN
To EC
1 2
(Need pull-up +3VL) WLAN_WAKE# 1 2
3 4
BT_ON 1 RM24 2 BT_CTRL_R 5 3 4 6
@ 0_0402_5% 7 5 6 8
CLKREQ_WLAN# 7 8
9 10
CLK_WLAN#
11
13
9
11
10
12
12
14
+3VALW TO +3V_WLAN for WOWL
To PCH CLK_WLAN 13 14
15 16 To EC
17 15 16 18
19 17 18 20 +3VALW
19 20 WL_OFF#
21 22
21 22 PLT_RST# +3VALW
23 24
PCIE_PRX_WLANTX_N2 23 24
To PCH 25 26 To PCH
PCIE_PRX_WLANTX_P2 25 26
27 28
27 28
1
WLAN/ WiFi 29 30 PM_SMBCLK 2 WOWL@
31 29 30 32 RM31 CM9
PCIE_PTX_C_WLANRX_N2 31 32 PM_SMBDATA Vgs=-4.5V,Id=3A,Rds<97mohm
To PCH 33 34 WOWL@ 10K_0402_5% 0.1U_0402_10V7K
2 PCIE_PTX_C_WLANRX_P2 33 34 2
35 36 USB20_N9
37 35 36 38 1
USB20_P9 WiMax/ BT
2
37 38
3
S
+3V_WLAN 39 40 If system don't support WOWL
41 39 40 42 LED_WIMAX# 1 2 2
G
AO3413_SOT23
43 41 42 44
LED_WIMAX# To EC WOWL_EN#
QM2
45 43 44 46 47K_0402_5% D +3V_WLAN
2
1
47 45 46 48 1 2 RM30 WOWL@ WOWL@
47 48 +3VS
1
E51_TXD 49 50 RM6 100K_0402_5% WOWL@ CM10
E51_TXD 49 50
E51_RXD 51 52 RM2 0.01U_0402_25V7K RM1
E51_RXD 51 52 1
100K_0402_5% 1 2 +3VS
53 54 0_0603_5%
GND1 GND2 NOWOWL@
Debug card using
2
LOTES_AAA-PCI-049-P06-A
Conn@
+3VL +1.05VS_VCCP +3VS_DGPU +3VALW

0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 1 1
CCL1 CCL3 CCL6 CCL8
GCLK@ GCLK@ GCLK@ GCLK@
2 2 2 2
3 3
1 1
for safety request CCL7 CCL11
22U_0805_6.3V6M 2.2U_0402_6.3V6M
RCL4 GCLK@ UCL1 GCLK@ GCLK@
120_0603_5% 2 2
+RTC 2 1 +RTCGCLK 10 14
GCLK@ VBAT VDD_RTC_OUT
+3VL 15
+V3.3A
+3VALW 2
VDD 9
32kHz PCH_RTCX1_R
GCLK@
+3VS_DGPU 11 12 VGA_X1_R 1 2 PCH_X1_R_R 1 2
Rshort@
VDDIO_27M 27MHz VGA_X1 PCH_X1_R
RCL3 22_0402_5% RCL1 0_0402_5%
8 6
VDDIO_25M_A 25MHz_A 22 ohm for NV chip
+1.05VS_VCCP 3 5 PCH_X1_R_R
VDDIO_25M_B 25MHz_B
CLK_X1 1
CLK_X2 16 XTAL_IN
XTAL_OUT
GND1
GND2
GND3
GND4
SLG3NB304VTR_TQFN16_2X3
4
7
13
17
GCLK@
YCL1 25MHZ 12PF X3G025000DK1H-X
CLK_X1 1 3 CLK_X2
PN: SA000063300
1 3
GND GND
4 4
1 2 4 1
CCL9 CCL12
18P_0402_50V8J 18P_0402_50V8J
GCLK@ GCLK@
2 2

WLAN/GCLK
1.0
VFKTA
A B C D E
A B C D E
Left USB 2.0 x 1
+5VALW W=80mils
For EMI JLAN
2.0A +USB_VCCC
+3V_LAN
1
UR1 @EMI@ 2 1
2 6 2 1 PLT_RST# 3 2 2
EMI@ LR1 LANCLK_REQ#
USB20_P2 USB20_P2 2 1 USB20_P2_L 3 IN OUT 7 CR38 1000P_0402_50V7K ISOLATE# 4 3
2 1 USB_EN#2 4 IN OUT 8 5 4 4
USB_EN#2 1 EN/ENB OUT 5 EC_SWI# 6 5
GND OCB USB_OC#2
USB20_N2 USB20_N2 3 4 USB20_N2_L 7 6 6
1 3 4 G547I2P81U_MSOP8 8 7 1
WCM-2012-900T_0805 SA00004KB00 X1code 9 8 8
CLK_LAN# 10 9
SA00003TV00 CLK_LAN 11 10 10
12 11
PCIE_PTX_C_LANRX_N1
13 12 12
PCIE_PTX_C_LANRX_P1
14 13
PCIE_PRX_C_LANTX_N1 15 14 14
PCIE_PRX_C_LANTX_P1 16 15
USB20_P2_L 17 16 16
USB20_N2_L 18 17
19 18 18
20 19
+USB_VCCC 20 20
21
G1 22
W=80mils G2 23
G3 24
G4
ACES_50559-02001-001
+3VS Conn@
For LAN function
+3VS
1
RL24 2 1 10K_0402_5% LANCLK_REQ#
1K_0402_5%
RL6
@
2
LAN_EN ISOLATE# 1 2
Rshort@ WOL_EN# WOL_EN#
LAN_EN
2
RL433 0_0402_5%
G
2 2
CLKREQ_LAN# 1 3 LANCLK_REQ#
CLKREQ_LAN#
RL7
D
15K_0402_5%
QL53
Sx Enable Sx Disable S0
2N7002KW_SOT323-3
Wake up Wake up
WOL_EN# LOW HIGH HIGH
JP@
PJ29
2 1
+3VALW_PCH 2 1 +3V_LAN
JUMP_43X39
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

3 3
LAN WOL LAN_EN ISOLATEB

S0 Sx S0 Sx
----------------------------------------------
0 0 0 0 1 1
0 1 0 0 1 1
1 0 1 1 1 1
1 1 1 1 1 0*
*
S3: after SUSP# assert low over 100ms
S4/S5: after SYSON assert low over 100ms
4 4

LUSB20/LAN conn.
Custom 1.0
VFKTA
A B C D E
5 4 3 2 1
For EMI request LW1

(Place close to chip) SD_DATA0 2 1 SD_DATA0_R
BLM15BD121SN1D_0402
EMI@
LW2
SD_DATA1 2 1 SD_DATA1_R
BLM15BD121SN1D_0402
D EMI@ D
LW3
SD_DATA2 2 1 SD_DATA2_R
BLM15BD121SN1D_0402
1 EMI@
LW4
CW8 SD_DATA3 2 1 SD_DATA3_R
0.1U_0402_16V4Z UW1 BLM15BD121SN1D_0402
2 EMI@
22
RSTZ
5
2 MS_INS 17 SD_DATA2
<29> USB20_N3
3 DM SD_D2/MS_D5/SB13 16 SD_DATA3 EMI@ EMI@ 2 EMI@ 2 EMI@ 2 EMI@ 2
<29> USB20_P3
DP SD_D3/MS_D4/SB12
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
15 SDCMD 1 2 SDCMD_R LW5
30mils SD CMD/SD_CMD
CW13
CW12
CW11
CW10
14 SDCLK LW6 0_0402_5% 2 1 SDCLK_R
1 Rshort@ 2 +3VS_CR 1 SD CLK/SD_CLK 21 SDCD# BLM15BD121SN1D_0402
+3VS DVDD SD_CDZ 2 2 1 1 1 1
RW1 0_0402_5% 24 13 SD_DATA0 EMI@
+VCC_3IN1 PMOS SD_D0/MS_D6/SB9
1 CW1 12 SD_DATA1 @EMI@ CW14 CW9 EMI@
30mils SD_D1/MS_D7/SB8 11 4.7P_0402_50V8J 10P_0402_50V8J
2.2U_0402_6.3V6M +3VS_CR 19 MS BS/MS_BS 10 SDWP 1 1
+3VS_CR 23 DVDD SD_WP/MS_D1/SB5 9
2 20 DVDD SD_D4/MS_D0/SB4 8
GPIO0 SD_D5/MS_D2/SB3 7
+3VS_CR 4 SD_D6/MS_D3/SB1 6
please close the pin19 of UW1 AVDD SD_D7/MS_CLK/SB0
+VDD18 18
VDD18
12mils
+3VS_CR 1 25
+3VS_CR Thermal pad
30mils 1 CW5
0.1U_0402_16V4Z GL834L-OGY01_QFN24_4X4
CW2 2 NC (default) 10K pull down
C C
0.1U_0402_16V4Z
2
GPIO0 Power saving mode Normal mode
please close the pin4 of UW1

De-coupling and Bulk capacitor should place near to Cardreader chip and Combo Socket
+3VS_CR
+3VS_CR
30mils 1 1
CW3 CW4
2.2U_0402_6.3V6M 0.1U_0402_16V4Z
2 2
< 2 in 1 Card Reader >
Close to connector Close to IC
Conn@ JCARD 30mil
5
VDD +VCC_3IN1
3 SDCMD_R 1 1
CMD 6 SDCLK_R
CLK CW6 CW7
7
VSS 4 0.1U_0402_16V4Z 2.2U_0402_6.3V6M
VSS 2 2
8 SD_DATA0_R
DAT0 9 SD_DATA1_R
DAT1 1 SD_DATA2_R
DAT2 2 SD_DATA3_R
CD/DAT3
B 12 10 SDWP# B
13 GND_SW WP_SW 11 SDCD
GND_SW CD_SW
T-SOL_156-2000302604
"Normal Close" type connector

For normal close type connector invert circuit
+3VS_CR +3VS_CR
CD_SW WP_SW
1
Protect disable Protect Enable
1
Card Uninsertion SDCD#
Close RW3 SDWP
Close Close 100K_0402_5% RW4
100K_0402_5%
2
6
QW1A D
3
Card Insertion SDCD 2 QW1B
Open Open Close G SDWP# 5
D
2N7002KDWH_SOT363-6 G
S 2N7002KDWH_SOT363-6
1
S
4
A A

USB-CardReader GL834L
Custom 1.0
VFKAA
5 4 3 2 1
5 4 3 2 1
UR2 14641@ 0_0402_5%

1 8 CHG_CB0 14641@ RR1
CEN CB0 SLP_CHG_CB0
UR2 CHG_PWR_GATE# USB20_N1_S 2 7
Address SLP_CHG_CB1 RR2 14641@

USB20_P1_S
CHG_CB1
3
4
DM
DP
TDM
TDP
6
5
USB20_N1
USB20_P1
+5VALW
USB Sleep & Charge
0_0402_5% 9 CB1 VCC
0x35 PGND 1
CR9
MAX14641ETA-TGH7_TDFN8 0.1U_0402_10V7K State table for MAX14641
MAX14640ETA+TGH7
14640@ 2
CB0 CB1 Mode STATUS
2A auto-detection charger mode for Apple device.
0 0 AM2 Resistor dividers are connected to DP/DM. Including DCP
Forced 1A charger mode for Apple devices.
+3VALW +3VALW 0 1 AP1
D Resistor dividers are connected to DP/DM. D
1 0 PM USB pass-through mode.DP/DM are connected to TDP/TDM

USB pass-through mode with CDP emulation.
2
1 1 CM Auto connects DP/DM to TDP/TDM depending
RR3 RR4
4.7K_0402_5% 4.7K_0402_5% on CDP detection status.
2
QR1A 14640@ 14640@
1
6 1 CHG_CB1
EC_SMB_CK1
5
2N7002KDWH_SOT363-6 QR1B
14640@
3 4 CHG_CB0
EC_SMB_DA1
2N7002KDWH_SOT363-6
14640@
Right rear USB3.0 Conn.
USB20_N0
2
LR6
2
EMI@
1
1 USB20_N0_R Right front USB3.0 Conn.
(Support S&C function)
LR7 EMI@
USB20_N1_S 2 1 USB20_N1_R
3 4 USB20_P0_R 2 1
USB20_P0 3 4
WCM-2012-900T_0805 USB20_P1_S 3 4 USB20_P1_R
3 4
C
WCM-2012-900T_0805 C
LR2 EMI@ LR3 EMI@

1 2 U3RXDP1_L 1 2 U3RXDP2_L
U3RXDP1 1 2 U3RXDP2 1 2
4 3 U3RXDN1_L 4 3 U3RXDN2_L
U3RXDN1 4 3 U3RXDN2 4 3
DLW21SN670HQ2L_4P DLW21SN670HQ2L_4P
LR5 EMI@ LR4 EMI@

1 2U3TXDP1_C 1 2 U3TXDP1_C_L 1 2U3TXDP2_C 1 2 U3TXDP2_C_L
U3TXDP1 1 2 U3TXDP2 1 2
CR15 0.1U_0402_10V7K CR17 0.1U_0402_10V7K
1 2U3TXDN1_C 4 3 U3TXDN1_C_L 1 2U3TXDN2_C 4 3 U3TXDN2_C_L

U3TXDN1 4 3 U3TXDN2 4 3
CR14 0.1U_0402_10V7K CR16 0.1U_0402_10V7K
DLW21SN670HQ2L_4P DLW21SN670HQ2L_4P
+USB_VCCB +USB_VCCA
W=80mils W=100mils
+5VALW 2.0A +USB_VCCB W=80mils +5VALW 2.5A +USB_VCCA W=100mils
B UR4 0.1U_0402_10V7K 1000P_0402_50V7K UR3 0.1U_0402_10V7K 1000P_0402_50V7K B
2 6 2 6
3 IN OUT 7 3 IN OUT 7
IN OUT 1 1 IN OUT 1 1
2
2
4 8 CR12 CR13 CR39 4 8 CR10 CR11 CR40
USB_EN#0 EN/ENB OUT USB_CHG_EN# EN/ENB OUT
1 5 USB_OC#0 @EMI@ 1 5 USB_CHG_OC# @EMI@
GND OCB GND OCB
1
1
G547I2P81U_MSOP8 2 2 SY6288DCAC_MSOP8 2 2
SA00004KB00 X1code SA00006DN00
47U_0805_6.3V6M 47U_0805_6.3V6M
SA00003TV00
D3 @ESD@ DR4 @ESD@

U3TXDP1_C_L 1 9 U3TXDP1_C_L U3TXDP2_C_L 1 9 U3TXDP2_C_L
U3TXDN1_C_L 2 8 U3TXDN1_C_L U3TXDN2_C_L 2 8 U3TXDN2_C_L
U3RXDP1_L 4 7 U3RXDP1_L U3RXDP2_L 4 7 U3RXDP2_L
U3RXDN1_L 5 6 U3RXDN1_L U3RXDN2_L 5 6 U3RXDN2_L
3 3
JUSBF Conn@
TVWDF1004AD0_DFN9 JUSBR Conn@ TVWDF1004AD0_DFN9 U3TXDP2_C_L 9 13
U3TXDP1_C_L 9 13 U3TXDN2_C_L 8 StdA-SSTX+ GND 12
U3TXDN1_C_L 8 StdA-SSTX+ GND 12 7 StdA-SSTX- GND 11
7 StdA-SSTX- GND 11 U3RXDP2_L 6 GND-DRAIN GND 10
U3RXDP1_L 6 GND-DRAIN GND 10 U3RXDN2_L 5 StdA-SSRX+ GND
U3RXDN1_L 5 StdA-SSRX+ GND 4 StdA-SSRX-
4 StdA-SSRX- USB20_P1_R 3 GND
USB20_P0_R 3 GND USB20_N1_R 2 D+
USB20_N0_R 2 D+ 1 D-
D- +USB_VCCA VBUS
+USB_VCCB 1
VBUS LOTES_AUSB0015-P001A
A LOTES_AUSB0015-P001A A

RUSB30/S&C
Custom 1.0
VFKTA
5 4 3 2 1
A B C D E
20 mil 35mA for 3.3V level 40 mil 650mA for 5V level

UA1 close to pin 25 close to pin 38
+DVDD 1 Rshort@ 2 +AVDD 0.1U_0402_10V7K 0.1U_0402_10V7K 1 Rshort@ 2
+3VS +5VALW
MIC1_LINE1_R_R 4.7U_0603_6.3V6K CA58 MIC1_LINE1_R_C_R 22 1 +DVDD 1 RA22 0_0402_5% 2 1 2 1 RA18
MIC1_LINE1_R_L 4.7U_0603_6.3V6K CA57 MIC1_LINE1_R_C_L 21 MIC1_R DVDD 9 +DVDD 0_0603_5%
MIC1_L DVDD_IO 1
CA4 CA42 CA47 CA37 CA50
17 25 +AVDD 0.1U_0402_16V4Z CA3
16 MIC2_R AVDD1 38 +AVDD 2 10U_0603_6.3V6M 1 2 1 2
MIC2_L AVDD2 close to pin1 2
2.2U_0402_6.3V6M
10U_0603_6.3V6M
31 39 +PVDD
+MIC1_VREFO_L MIC1_VREFO_L PVDD1
30 46 +PVDD
+MIC1_VREFO_R MIC1_VREFO_R PVDD2
29 1
EC_MUTE_INT MIC2_VREFO
1
60 mil 1
15 45 SPKR+ CA45
14 LINE2_R SPK_OUT_R+ 44 SPKR- 0.1U_0402_16V4Z +PVDD 1 Rshort@ 2
LINE2_L SPK_OUT_R- 2 +5VALW
1 2 RA24
close to pin9 CA33 0_0603_5%
20 40 SPKL+ 0.1U_0402_10V7K
MONO_OUT SPK_OUT_L+ 41 SPKL-
SPK_OUT_L-
close to pin39 CA35
@ESD@ MONO_IN 12 2 1 10U_0603_6.3V6M
0.01U_0402_25V7K PCBEEP 75_0402_1%
CA65 1 2 10 33 HPOUT_R RA19 HP_R
AZ_SYNC_HD SYNC HPOUT_R 32 HPOUT_L RA20
11 HPOUT_L 75_0402_1% HP_L
AZ_RST_HD# RESET# 1
CA32
10 mil 5 0.1U_0402_10V7K
SDATA_OUT AZ_SDOUT_HD
close to pin19 8 AZ_SDIN0_HD_R 2 1 For P/N and footprint close to pin46
2 1 AC_JDREF 19 SDATA_IN AZ_SDIN0_HD 2
close to pin 28 JDREF
RA23 33_0402_5% Please place them to ISPD page
1 2 RA30 20K_0402_1% LDO_CAP 28 6 AZ_BITCLK_HD
AC_VREF 27 LDO_CAP BCLK AZ_BITCLK_HD
CA60 10U_0603_6.3V6M
1 2 CPVEE 34 VREF 269@ UA1
CA54 2.2U_0402_6.3V6M CBN 35 CPVEE 23 LINE1_R_C_L 1 2 MIC1_LINE1_R_L
1 CBN LINE1_L
1
1 2 CBP 36 24 LINE1_R_C_R CA9 0.1U_0402_10V6K

CA25 CA55 CA53 2.2U_0402_6.3V6M CBP LINE1_R 48 269@
2.2U_0402_6.3V6M 0.1U_0402_10V7K NC 1 2 MIC1_LINE1_R_R
2
2 2 CA10 0.1U_0402_10V6K
INT_MIC_DATA 3 GPIO0/DMIC_DATA 26
INT_MIC_CLK_R ALC269Q-VB6-CG
GPIO1/DMIC_CLK AVSS1 37 269@
AVSS2 42
For S&M
SENSE_A 13 PVSS1 43
Sleep and Music
2 @ 1 SENSE_B 18 SENSE_A PVSS2 7
RA34 20K_0402_1% SENSE_B DVSS
47 AGND 259@ No
4 EAPD 49
EC_MUTE# PD# Thermal Pad
2
269@ Yes 2
ALC259-VC2-CG_MQFN48_6X6 For EMI reserve 1 2
Rshort@
2
259@ RA44 0_0603_5%

269@ RA50 close to codec 1 2
Rshort@
4.7K_0402_5% RA43 0_0603_5%
For EMI reserve DGND @EMI@ CA51 1 2
Rshort@
To solve S&M noise issue AZ_BITCLK_HD 2 1 1 2 @EMI@ RA39 0_0603_5%
1
10_0402_5% RA41 1 @EMI@ 2

RA42 INT_MIC_CLK_R Internal AMP 10P_0402_50V8J RA38 0_0603_5%
INT_MIC_CLK MBK1005301YZF EC_MUTE# 1 @EMI@ 2
CAM_EMI@ Hight Enable RA31 0_0603_5%
LOW Disable
Beep sound SPK MIC/LINE IN

2W 4ohm =40mil For EMI reserve RA47 2 1
+MIC1_VREFO_R
1W 8ohm =20mil close to codec
1K_0402_5% RA48 2.2K_0402_5%
MIC1_LINE1_R_R 2 1 MIC1_R
SPKL+ 1 2
Rshort@
PCI Beep CA70 RA7 0_0603_5%
SPK_L1
MIC1_LINE1_R_L 2 1 MIC1_L
1 RA52 2 1 2 MONO_IN 1K_0402_5%
PCH_SPKR SPKL- 1 2 2 1
47K_0402_5% Rshort@ SPK_L2 RA45 +MIC1_VREFO_L
0.1U_0402_10V7K RA8 0_0603_5% 1 1 RA46 2.2K_0402_5%
3 CA31 CA30 3
2
1 1000P_0402_50V7K 1000P_0402_50V7K MIC_SENSE

RA49 CA27 2 2
@EMI@ @EMI@
6
4.7K_0402_5%
100P_0402_50V8J RA29 269@
2 QA1A 100K_0402_5%
1
2N7002KDWH_SOT363-6 2
For better sound SPKR+ 1 2
Rshort@ SPK_R1 269@
RA9 0_0603_5%
by customer request
1
RA37
0_0402_5%
SPKR- 1 2
Rshort@ SPK_R2 RA35 100K_0402_5%
+3VL
RA10 0_0603_5% 1 1 259@
SM_SENSE#
CA34 CA36
3
1000P_0402_50V7K
@EMI@
2 2
1000P_0402_50V7K
@EMI@ EC QA1B
2N7002KDWH_SOT363-6 5 JACK_SENSE
269@
4
Sense Pin Impedance Codec Signals Function
39.2K PORT-I (PIN 32, 33) Headphone out
place close to chip
20K PORT-B (PIN 21, 22) Ext. MIC MIC_SENSE 2 1 SENSE_A
SENSE A
RA32 20K_0402_1%
10K PORT-C (PIN 23, 24)
4 4
5.1K (PIN 48)

NBA_PLUG
RA33 39.2K_0402_1%
39.2K PORT-E (PIN 14, 15)
SENSE B 20K PORT-F (PIN 16, 17) Security Classification Compal Secret Data Compal Electronics, Inc.
10K PORT-H (PIN 20) HDA-ALC259-VC/269-VB
Custom
A B C D E
SPK Conn.
+3VS
For common design,
pull-high resistor should be placed at connector side.
2
RA95 JSPK
10K_0402_5% 8 <SM_DET> SM_DET BIOS setup Speaker Type BOM
7 GND
GND Intel : GPIO48
1
SPK_R1
6
6
AMD Richland : GPIO173
5 1 S&M option Harman/Kardon 269@
SPK_R2
4 5 AMD Kabini :GPIO70
SPK_L1 4
3
SPK_L2 3
2
SPK_DET 2
1 <SPK_DET> 0 Non Harman 259@
1
ACES_50228-0067N-001 Intel : GPIO70
Conn@ AMD Richland : GPIO74
AMD Kabini :GPIO62
Non-Harman detection
0 ONKYO
SPK_DET
1 Non-Brand
HeadPhone/LINE Out JACK
JLINE Conn@
6
1
1 2
Rshort@ HP_R_L 2
HP_L
RA54 0_0402_5%
1 2
Rshort@ HP_R_R 3
HP_R
RA53 0_0402_5%
4
CA11
CA12
NBA_PLUG
3
DA6
1 1 5
YSDA0502C_SOT23-3
100P_0402_50V8J
100P_0402_50V8J
@ESD@ TYCO_2041280-1_3.6D
2 2
@EMI@
@EMI@
1
MIC/LINE IN JACK
JEXMIC Conn@
6
1
1 2
Rshort@ MIC1_R_L 2
MIC1_L
RA56 0_0402_5%
1 2
Rshort@ MIC1_R_R 3
MIC1_R
RA55 0_0402_5%
4
CA14
CA13
JACK_SENSE
1 1
3
DA7 +3VL RA40 5
YSDA0502C_SOT23-3 4.7K_0402_5% TYCO_2041280-1_3.6D

100P_0402_50V8J
100P_0402_50V8J
@ESD@ 2 2
269@
@EMI@
@EMI@
RA36
0_0402_5%
259@
1

AUDIO CONN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
A B C D E
+3VL +3VL
0.1U_0402_10V7K CB3
1 1 0.1U_0402_10V7K 1 2
Rshort@ H_PROCHOT#
1 2 VR_HOT#
CB1 CB2 RB1 0_0402_5%
1
For RF 0.1U_0402_10V7K
D QB1 1
2 2 H_PROCHOT#_EC 2 CB8
111
125
CLK_PCI_EC G 47P_0402_50V8J
22
33
96
67
9
UB1 S 2N7002K_SOT23-3
1
2
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
3
RB3
22_0402_5% @RF@ @
BATT_PRES 1 2
1 21 CB9 100P_0402_50V8J
GATEA20 WL_BT_LED#
2
1 2 GATEA20/GPIO00 GPIO0F 23 1
1 KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 USB_EN#0
3 26 ACIN_D 1 2
SERIRQ 4 SERIRQ GPIO12 27 FANPWM
CB11 @RF@ CB10 100P_0402_50V8J
LPC_FRAME# 5 LPC_FRAME# ACOFF/GPIO13 CLK_REQ_GC6#
10P_0402_50V8J
2 LPC_AD3 7 LPC_AD3 1 2
PWM Output FANPWM
LPC_AD2 8 LPC_AD2 63 BATT_PRES CB17 100P_0402_50V8J
LPC_AD1 10 LPC_AD1 BATT_TEMP/GPIO38 64 BATT_PRES
LPC_AD0 LPC_AD0LPC & MISC GPIO39 USB_OC#0 @ESD@
65
12 ADP_I/GPIO3A 66 ADP_I
CLK_PCI_EC CLK_PCI_EC AD Input GPIO3B ADP_V +3VS
13 75
PLT_RST# EC_RST# 37 PCIRST#/GPIO05 GPIO42 76 HDPLOCK
+3VL 20 EC_RST# IMON/GPIO43 EC_ENBKL
RB2
EC_SCI# 38 EC_SCII#/GPIO0E H_PROCHOT#_EC 1 2
47K_0402_5% @
1 2 WOWL_EN# GPIO1D 68
EC_RST# RB6 10K_0402_5%
DAC_BRIG/GPIO3C 70 885_EC_ON HDPINT
1 2 EN_DFAN1/GPIO3D 71 +3VL
DA Output IREF/GPIO3E PCH_SUSPWRDN#
CB12 0.1U_0402_10V7K KSI0 55 72
KSI1 56 KSI0/GPIO30 CHGVADJ/GPIO3F SUSACK#
KSI2 57 KSI1/GPIO31 LID_SW# 1 2
KSI2/GPIO32
Reserve this signal to EC by SW demand
ESD@ KSI3 58 83 2011/10/18a RB35 47K_0402_5%
1 2 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 EC_MUTE#
PLT_RST# KSI4
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 PM_SLP_S4# WLAN_WAKE# 1 2
CB13 100P_0402_50V8J
KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D
RB7 10K_0402_5%
KSI7 62 87 TP_CLK
KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK CHG_PWR_GATE# 1 2
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA
RB11 10K_0402_5%
KSO2 41 KSO1/GPIO21
KSI[0..7] KSO3 42 KSO2/GPIO22 97 +3VS
KSI[0..7] KSO4 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 VGATE
KSO[0..15] 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 GPS_DOWN# 1 2
KSO5 TP_CLK
KSO[0..15] KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 PWRME_CTRL
VCIN0_PH connect to RB8 4.7K_0402_5%
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH
2 KSO7/GPIO27 SPI Device Interface power portion (9012 only) 2
KSO8 47 TP_DATA 1 2
KSO9 48 KSO8/GPIO28 119 RB9 4.7K_0402_5%
49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_SDIO
KSO10
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SDI
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 EC_SCK
KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A EC_CS0#
KSO14 53 KSO13/GPIO2D SYSON 1 2
KSO15 54 KSO14/GPIO2E 73 WLAN_WAKE# RB10 4.7K_0402_5%
81 KSO15/GPIO2F ENBKL/GPIO40 74 WLAN_WAKE#
CHG_PWR_GATE# 82 KSO16/GPIO48 PECI_KB930/GPIO41 89 WOL_EN# SUSP# 1 2
CHG_PWR_GATE# KSO17/GPIO49 FSTCHG/GPIO50 90 HDPACT
RPB1 RB21 10K_0402_5%
BATT_CHG_LED#/GPIO52 91 BATT_FULL_LED#
1 8 77 CAPS_LED#/GPIO53 92 CAPS_LED# 1 2
EC_SMB_CK1 EC_SMB_CK1 GPIO VR_ON
+3VL EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_SUSP_LED#
2 7 EC_SMB_DA1 EC_SMB_DA1 78 93 RB23 10K_0402_5%
3 6 EC_SMB_CK2 EC_SMB_DA1 EC_SMB_CK2 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON BATT_CHG_LOW_LED#
+3VS EC_SMB_CK2 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56 SYSON
4 5 EC_SMB_DA2 EC_SMB_DA2 80 121 VR_ON
EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON
FB_CLAMP_R 1 2
Rshort@
PM_SLP_S4#/GPIO59 FB_CLAMP
2.2K_8P4R_5% RB5 0_0402_5%
6 100
PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 PCH_RSMRST#
PM_SLP_S5# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 EC_LID_OUT#
RB27
EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 H_PROCHOT#_EC PROCHOT_IN VCOUT0_PH_L 1 2
100K_0402_5%
USB_OC#2
PROCHOT_IN connect Rshort@
VS_ON
1 2 E51_TXD 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 VCOUT0_PH_L RB34 0_0402_5%
USB_CHG_OC# GPIO0B VCOUT0_PH/GPXIOA07 to power portion (9012 only)
18 GPO 105 VCOUT0_PH connect to power portion (9012 only)
USB_CHG_EN# 19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF#
USB_EN#2 GPIO0D GPIO PBTN_OUT#/GPXIOA09 PBTN_OUT#
25 107 RB18
KB_LED 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 PCH_PWR_EN
@ESD@ 330K_0402_5%
1 2 FAN_SPEED1 FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 SA_PGOOD 2 1
WL_OFF# EC_PME#/GPIO15 +3VL
CB18 100P_0402_50V8J E51_TXD 30
E51_TXD 31 EC_TX/GPIO16 110 ACIN_D
E51_RXD 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 EC_ON_R ACIN_D 2 1
3 PM_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ACIN 3
RB751V40_SC76-2 DB1
BT_ON 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 ON/OFFBTN#
GPI LID_SW#
SM_SENSE# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP# LID_SW#
1 2 EC_MUTE_INT_R SUSP#/GPXIOD05 117 +VTT_EC SUSP# 1 885@ 2
GPXIOD06 +1.05VS_VCCP
RB12 4.7K_0402_5% RB37 0_0402_5% 118 EC_PECI RB4 1 2 0_0402_5%
PECI_KB9012/GPXIOD07 H_PECI
AGND/AGND
1 2 EC_MUTE_INT_R 122
Rshort@ RB19 43_0402_5%
EC_MUTE_INT 1 2 POK_R 123 XCLKI/GPIO5D 124 +EC_V18R
GND/GND
GND/GND
GND/GND
GND/GND
CLK_EC XCLKO/GPIO5E V18R

RB13@ 0_0402_5% 1
GND0
1 2 CB15
POK
RB14 0_0402_5% 4.7U_0603_6.3V6K Close to EC
1
1 2
RB22 CB16 KB9012QF-A3_LQFP128_14X14 @ESD@
11
24
35
94
113
69
100K_0402_5%@ 20P_0402_50V8 9012@ 1 2 SUSP#

@ CB14 180P_0402_50V8J
2 UB1
2
NPCE885NB0DX LQFP 128P

885@
885@
2 1
+3VL
RB20 330K_0402_5%
9012@
EC_ON_R 1 2
EC_ON
RB36 0_0402_5%
1 3
D
QB2 885@
4 2N7002K_SOT23-3 4
G
Voltage Comparator Pins FOR 9012 A3 RB24 885@

2
885_EC_ON 2 1
10K_0402_5%
VCIN0 pin109 >1.2V <1.2V
VCIN1 pin102
HIGH Security Classification Compal Secret Data Compal Electronics, Inc.
VCOUT0 pin104
(default) LOW
LOW LPC-EC-KB9012&NPCE885N
VCOUT1 pin103 HIGH (default) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.0
A B C D E
5 4 3 2 1
Power Button Conn. Touchpad Connector NFC
JTP Conn@
16 15
14 16 15 13 +3VS
14 13 TP_DATA
JPWR 12 11
12 11 TP_CLK
1 2 ON/OFFBTN# 10 9
+3VL 3 1 2 4 8 10 9 7
5 3 4 6 6 8 7 5
5 6 6 5 PM_SMBDATA
7 8 +5VS 4 3
7 8 4 3 PM_SMBCLK
2
2 1
R395 ACES_50611-0040N-001 2 1
Conn@
D 100K_0402_5% HB_A060877-SAVR01 D
1
ON/OFFBTN# ON/OFFBTN#
Battery Reset
ESD diode on SB
TJG-533-V-T/R_6P
3 1
4 2
ENLDO
SW4
5
6
BATT CHARGE /FULL LED Keyboard LED
Q38
Screw Hole
D24 R60 KBL@
390_0402_5% +5VS AO3413_SOT23
2 1 1 2
BATT_FULL_LED#
D
3 1 +5VS_LED
+5VALW HT-F196BP5_WHITE CPU VGA WLAN standoff
1
D23 R587 H1 H2 H3 H4 H5 H29
G
2
2 1 1 2 10K_0402_5% H_4P6 H_4P6x4P2 H_4P2 H_3P3 H_3P3 H_3P3
BATT_CHG_LOW_LED#
R3 KBL@ JBLG Conn@ @ @ @ @ @ @
HT-191UD5_AMBER_0603 510_0402_5% 1
1
2 1
C 2 C
3
4 3
White LED bright when both AC-adaptor is plugged in and Battery is full charged +5VS_LED 4
5
1
D
Amber LED bright while charging battery from AC-adaptor. 2 Q52 6 GND
KB_LED GND
Amber LED blink during Critical Low Battery G 2N7002KW_SOT323-3
KBL@ ACES_50578-0040N-001
S PTH NPTH
3
H6 H7 H8 H9 H10 H11 H17 H18 H19
H_3P0 H_4P0 H_3P2 H_3P0 H_3P0 H_3P0 H_3P2 H_3P2x3P7 H_3P2N
POWER LED @ @ @ @ @ @ @ @ @
KEYBOARD CONN.
1
JKB
1
D25 R61 2 1
390_0402_5% 3 2
CAPS_LED# 3
+5VALW
2 1 1 2 +3VS
2 1 4 H12 H13 H14 H15
PWR_SUSP_LED# 4
R376 300_0402_5% KSI1 5 H_3P0 H_3P0 H_7P0 H_3P0
HT-F196BP5_WHITE KSI6 6 5 @ @ @ @
KSI5 7 6
PCB Fedical Mark PAD
1
KSI0 8 7
KSI4 9 8
KSI3 10 9
White LED bright when system is power on. 10
KSI2 11
White LED blink when system is sleep mode. KSI7 12 11 FD1 FD2 FD3 FD4
KSO15 13 12
KSO12 14 13 @ @ @ @
KSO11 15 14
1
KSO10 16 15
KSI[0..7] KSO9 17 16
KSI[0..7] 17
KSO8 18
WLAN/WiMAX LED KSO[0..15]
KSO[0..15]
KSO13 19 18
19
KSO7 20
KSO6 21 20
LED_WIMAX#
KSO14 22 21 GPU
22 CPU
2
KSO5 23
R819 KSO3 24 23
B B
1 2 2 1 6 1 KSO4 25 24
+5VALW 25
R268 0_0402_5% 10K_0402_5% KSO0 26 (Default)
26
5
@ Q157A KSO1 27 CPU@

D26 2N7002DW-T/R7_SOT363-6 KSO2 28 27 UV1 N14PGV2R1@
28 SA00004SX00
+5VS
1 @ 2 2 1 1 2 3 4 @ 29 (Default)
R269 0_0402_5% R66 30 29
30 N14PGV2R3@
HT-191UD5_AMBER_0603 510_0402_5% Q157B 2N7002DW-T/R7_SOT363-6 31 UC1 CPUI73537UR1@ UC1 CPUI53337UR1@ UC6 CPUI73537UR3@ UC7 CPUI53337UR3@ SA00006DO00 N14P-GV2-S-A1
@ 32 31
33 32 SA00006DO40
34 33 N14P-GV2-S-A1 FCBGA
WL_BT_LED# 34 SA00006DB40 SA00006D850 ???????????? SA00006D880
35
GND1 36
GND2 Ivy Bridge i7 3537U R1 Ivy Bridge i5 3337U R1 Ivy Bridge i7 3537U R3 Ivy Bridge i5 3337U R3
CVILU_CF17341U0R0-NH UV1 N14MGLR1@ UV1 N14MGLR3@
Conn@
Amber LED bright while Wireless and/or WiMAX turns on. SA000069000 SA000069010
UC1 CPUI33227UR1@ UC1 CPUI32375MR1@ UC4 CPUI33227UR3@ UC5 CPUI32375MR3@
N14M-GL-S-A2 FCBGA N14M-GL-S-A2 FCBGA

SA00006D970 SA00006ED40 SA00006D960 SA00006ED60
ISPD PCH Ivy Bridge i3 3227U R1 Ivy Bridge i3 2375M R1 Ivy Bridge i3 3227U R3 Ivy Bridge i3 2375M R3
Lid SW
UC1 CPUP2117UR1@ UC1 CPUC847R1@ UC8 CPUP2117UR3@ UC9 CPUC847R3@
ZZZ UH1 HM76R1@
(Default)
+3VL HM76R3@ SA000061230 SA00005VK00 SA000061260 SA00005VK50
DA8000XE000 SA00005FHA0 BD82HM76 SLJ8E C1
U21
APX9132ATI-TRL_SOT23-3 SA00005FHE0 Ivy Bridge Pentium 2117U R1 Ivy Bridge Celeron 847 R1 Ivy Bridge Pentium 2117U R3 Ivy Bridge Celeron 847 R3
PCB LA-9861P BD82HM76 SLJ8E C1
2 3
GND
VDD VOUT LID_SW#

A A
1 1 UH1 HM70R1@ UH1 HM70R3@
1
@
C453 C452
0.1U_0402_16V4Z 10P_0402_50V8J SA00005MQ50 SA00005MQC0
2 2
BD82HM70 SJTNV C1 BD82HM70 SJTNV C1

TP/ISPD/KB/LED/Screw
1.0
VFKTA
5 4 3 2 1
A B C D E
+5VALW TO +5VS +5VALW VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

+5VS
+3VALW TO +3VS 1
2
U1
VIN1 VOUT1
14
13
Load switch @
1 C1
SUSP# 3
VIN1
ON1
VOUT1
CT1
12
C2
1
180P_0402_50V8J
2 @
2
C3
1U_0402_6.3V6K
0.1U_0402_10V7K
+5VALW 4 11
2 VBIAS GND C9 330P_0402_50V7K 1
SUSP# 5 10 1 2
ON2 CT2 +3VS
6 9
+3VALW 7 VIN2 VOUT2 8
VIN2 VOUT2
1 15 2 1
GPAD @ C8
TPS22966DPUR_SON14_2X3
0.1U_0402_10V7K
1 1
@ C10
1U_0402_6.3V6K
2
+5VALW
+5VALW +0.75VS +1.05VS_VCCP
+3VL
2
+1.8VS
2
R5545
10K_0402_5% R422 R421 R468
2
100K_0402_5% 22_0805_5% 470_0805_5%
885@ R5546 R470
1
10K_0402_5% PCH_PWR_EN# PCH_PWR_EN# 470_0805_5%
1
SUSP
SUSP
1
D Q189 Q60 D
1
Q5527 D
2 Q6A 2 SUSP 2
PCH_PWR_EN
1
D Q190 G G
G 2N7002KW_SOT323-3 SUSP# 2 2N7002KDWH_SOT363-6
2 SUSP SUSP#
2
S 2N7002KW_SOT323-3 G S 2N7002KW_SOT323-3 S 2
3
3
1
2N7002KW_SOT323-3
S
3
For S3 CPU Power Saving
VCCP_PWRGOOD 1 2 0.75VR_EN
0.75VR_EN
R158 220K_0402_5%
3
SUSP 5
Q6B
2N7002KDWH_SOT363-6
+5VS_ODD +5VS TO +5VS_ODD
2
R457
ZPODD@ 470_0805_5%
6 1
3 3
Q53A
ZPODD@ 2 ODD_EN#
2N7002DW-T/R7_SOT363-6
1
+5VS
+3VS +5VS
2
ZPODD@ ZPODD@ C471 Vgs=-4.5V,Id=3A,Rds<97mohm
R441 0.1U_0402_10V7K
100K_0402_5%
5
1 ZPODD@
1
S
R440 Q45
1
G
4 3 1 2 2 NONZP@
ODD_EN#
R120
2N7002DW-T/R7_SOT363-6 47K_0402_5% 2
D 0_0805_5%
1
Q53B ZPODD@ AO3413_SOT23 +5VS_ODD
2
ZPODD@ C217
ZPODD@ 0.01U_0402_25V7K
1
4 4

DC-DC INTERFACE
1.0
VFKAA
A B C D E
A B C D
EMI Part (47.1)

EMI@
A51 need add fuse PL102
FBMA-L11-201209-121LMA50T_0805
1 2
VIN
1 1
PL101 EMI@
@ PJP1 PF1 FBMA-L11-201209-121LMA50T_0805
1 1 2 DC_IN_S1 1 2
1 2
2 3 7A_32V_S1206-H-7.0A
3 4
4
ACES_50299-00401-001
1
EMI@ EMI@ EMI@ EMI@
PC102 PC103 PC101 PC104
1000P_0603_50V7K 100P_0603_50V8 100P_0603_50V8 1000P_0603_50V7K
2
2 2
For ML1220 RTC (38.2)
- PBJ101 @ + PR101
560_0603_5%
PR102
560_0603_5%
2 1 1 2 +RTC_R 1 2 +RTCBATT
ML1220T13RE
+RTC
3 3
4 4

DCIN/PRECHARGE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
VFKTA
Date: Sheet 44 of 56
A B C D
A B C D
PL3 EMI@
FBMA-L11-201209-121LMA50T_0805
1 2
Other component (37.1) VMB
@ PL2 EMI@
ACES_50299-01001-W01 PF2 FBMA-L11-201209-121LMA50T_0805
1 BATT_S1 1 2 1 2
1 2 BATT+
2 3 10A_125V_TR2/6125FF10-R
3 4
4 5 BATT_P5 EMI@ EMI@
5 6 OTP (39.7)
1
EC_SMDA
6 7 PC7 PC8
1
EC_SMCA
7 8 PR14 1000P_0402_50V7K 0.01U_0402_25V7K
2
1
8 9 1K_0402_1%
1
9 10
10
2
PJP2 +3VL
ADP_I
12.1K_0402_1%
2
1
1K_0402_1%
PR4
EMI Part (47.1)
PR1
PR16
2
6.49K_0402_1% @ PR2 @ PR5
2 1 0_0402_5% 0_0402_5%
+3VL 1 2 1 2
100K_0402_1%_TSM0B104F4251RZ
PROCHOT_IN VCIN0_PH
1
PR19
1
20K_0402_1%
1K_0402_1%
1
@ PC11
PR3
PH1
0.1U_0402_10V7K
2
2
2
PR20 PR21 BATT_PRES
2
100_0402_1% 100_0402_1%
1
EC_SMB_DA1
2 2
EC_SMB_CK1
PH1 under CPU botten side :

CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C
Protect Recovery
65W 0.752V 0.626V
75W 0.902V 0.722V

3 3
Initial Protect Recovery
CPU OTP 65W 93 C 56 C
4 4

BATTERY CONN / OTP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VFKTA 1.0
A B C D
A B C D
for reverse input protection
Charger controller (40.1), Support component (40.2)
1
D
2 PQ209
G SSM3K7002FU_SC70-3
S
3
PR225 PR226
1 2 1 2
10U_0805_25V6K
1 1
1M_0402_5% 3M_0402_5% EMI Part (47.1)
PC211
TPCA8057-H_PPAK56-8-5
VIN P1 P2 B+ EMI@
2
PQ203 PR211 PL201
0.01_1206_1% 1UH_NRS4018T1R0NDGJ_3.2A_30%
1 1
PQ205 1 4 1 2 PQ207 1
2200P_0402_25V7K
2 2 2
10U_0805_25V6K
5 3 3 5 2 3 5 3
0.1U_0402_25V6
1
PC213
@EMI@ PC214
2200P_0402_50V7K
0.01U_0402_50V7K
1
VIN
PC231
4
PC234
SI7716ADN-T1-GE3_POWERPAK8-5 SI7716ADN-T1-GE3_POWERPAK8-5
2
1 2
PC230
2
1
2
3
2
PC236
0.1U_0402_25V6 PD230
2
BQ24735_ACDRV_1 BAS40CW_SOT323-3
BQ24735_BATDRV 1 2BQ24735_BATDRV_1
0.1U_0402_25V6
0.1U_0603_25V7K
0.047U_0402_25V7K PR233
1 1
10_1206_1%
4.12K_0603_1%
PC237
1
PC238
PC235
PR228
1 2
5
2
1
2.2_0603_5%
PR229
PD231
BQ24735_VCC
2
RB751V-40_SOD323-2 PQ201
AON7408L
DH_CHG 1 @ 2 4
BQ24735_BST 2
BQ24735_REGN2
2
PR210 0_0603_5% 2
4.12K_0603_1%
4.12K_0603_1%
PC239
BQ24735_LX
1
1 2 BATT+
PR234
PR235
DH_CHG
PL202
3
2
1
1U_0603_25V6K PC205 4.7UH_ETQP3W4R7WFN_5.5A_20% PR227
BQ24735_ACP
BQ24735_ACN
1 2 0.01_1206_1%
BQ24735_LX 1 2 CHG 1 4
2
1U_0603_25V6K
5
2 3
20
19
18
17
16
4.7_1206_5%
PU200
CSON1
CSOP1
1
@EMI@
PR206
PHASE
HIDRV
BTST
VCC
REGN
10U_0805_25V6K
10U_0805_25V6K
21 PQ202
PAD
0.1U_0402_25V6
0.1U_0402_25V6
PC222
PC223
1
1
1 15 DL_CHG 4 AON7406L
ACN LODRV
PC240
PC241
2
2
2 14
680P_0603_50V8J
ACP GND PR236
3
2
1
2
1
10_0603_1%
@EMI@
PC206
BQ24735_CMSRC 3 13 SRP1 2 CSOP1
CMSRC BQ24725RGRR_QFN20_3P5X3P5SRP
1
PR237
2
6.8_0603_5%
BQ24735_ACDRV 4 12 SRN1 2 CSON1
2
ACDRV SRN
5 11 BQ24735_BATDRV PC242
ACOK BATDRV 0.1U_0603_16V7K EMI Part (47.1)
ACDET
IOUT
SDA
SCL
ILIM
1 2 BQ24735_ACOK +3VALW
+3VL
10
3
PR239 10K_0402_1% 3
BQ24735_ILIM 1 2
PR241
0.01U_0402_25V7K
ACIN VIN
100K_0402_1%
357K_0402_1%
PC243
PR242
1
BQ24735_ACDET
VIN
1
422K_0402_1%
2
1
PR244
PR247
309K_0402_1%
PR248
2
10K_0402_1%
2
1 2
ADP_V
Vin Dectector
0.1U_0402_25V6
1
66.5K_0402_1%
EC_SMB_CK1
1
1
@ PC247
Min. Typ Max. PR249
1
PR245
0.1U_0402_10V7K
PC244
47K_0402_1%
H-->L 17.23V
2
EC_SMB_DA1
2
2
L--> H 17.63V
2
@ PR246
PC245 0_0402_5%
2 1 1 2
ILIM and external DPM ADP_I
100P_0402_50V8J
3.61A For A51 ADP_V function
1
@ PC246
0.1U_0402_10V7K
2
4 4
Please locate the RC

Near EC chip
2011-02-22

CHARGER
A B C D
A B C D
3/5VALW controller (35.1), Support component (35.2) 5V

Peak Current 8.5A
OCP current 10.2A
FSW=390kHz
Delta I=4.29A,ripple=4.29*17m=72.93mV
DCR 15.5mohm+/-15%
ESR 17mohm
1
TYP MAX 1
H/S Rds(on) :27mohm , 34mohm

@ PC345
L/S Rds(on) :10.8mohm , 13.6mohm
100P_0402_50V8J PR350
1 2 30K_0402_1%
EMI Part (47.1) 1 2
B+ EMI@ PR330
3/5V_B+
PL331 14K_0402_1%
1 2 3/5V_B+
HCB2012KF-121T50_0805
56K_0402_1%
137K_0402_1%
143K_0402_1%
2
2
1 2 PR331
PR337
PR342
PR357
20K_0402_1%
1 2 FB_3V PR351
10U_0805_25V6K
2200P_0402_50V7K
10U_0805_25V6K
19.1K_0402_1%
FB_5V 1 2
1
PC340
1
1
1
@EMI@ PC339
PC361
1 2
+3VL
PR335
2
2
5
AON7408L
100K_0402_1%
1
PQ331
POK
4
FB2
ENTRIP2
ENTRIP1
FB1
TON
21
6 PAD
PC335 @ PR333 PGOOD 20 4
0.1U_0402_10V7K 0_0402_5% BYP1 @ PR355 PC355
1
2
3
1 2 BST1_3V1 2 BST_3V 7 0_0402_5% 0.1U_0402_10V7K AON7408L
BOOT2 19 BST_5V 1 2 BST1_5V 1 2 PQ351
BOOT1
3
2
1
UG_3V 8
2
PL332 UGATE2 18 UG_5V 2
4.7UH_ETQP3W4R7WFN_5.5A_20% UGATE1 PL352

2 1 LX_3V 9 2.2UH_ETQP3W2R2WFN_8.5A_20%
+3VALWP PHASE2 17 LX_5V 1 2
PHASE1 +5VALWP
5
LG_3V 10
LGATE2
1
16
4.7_1206_5%
LG_5V
150U_D2_6.3VY_R15M
ENLDO
SECFB
LGATE1
1
@EMI@ PR336
4.7_1206_5%
LDO5
LDO3
1
VIN
@EMI@
PR356
150U_D2_6.3VY_R15M
+
PC331
1
4 PU330
1 SNUB_3V 2
11
12
13
14
15
+
PC351
RT8243AZQW_WQFN20_3X3
2
SNUB_5V
2 4
AON7406L PR334 +3VLP PQ352 2

1
2
3
680P_0603_50V8J
680P_0603_50V8J
PQ332 499K_0402_1% FDMC7692S_MLP8-5
1
1 2 PC344 PC341
3/5V_B+
3
2
1
@EMI@ PC336
4.7U_0603_10V6K 4.7U_0603_10V6K
@EMI@
100K_0402_1%
PC356
1U_0603_10V6K
0.1U_0603_25V7K
2
1
2
1
PC360
PR338
PC342
2
2
2
2
EMI Part (47.1)
ENLDO
PR340 EMI Part (47.1)
2.2K_0402_1%
1 2
EC_ON
3
@ PR341 3
0_0402_5%
1 2
VS_ON
4.7U_0603_6.3V6K
100K_0402_5%
1
PC343
@ PR332
3.3V 2
1
Peak Current 8A
OCP current 9.68A
Delta I=1.28A ,ripple=1.28x15m=19.2mV
@ PJ333 @ PJ331
FSW=455kHz 2 1 1 2
+3VLP 2 1 +3VL +3VALWP 1 2 +3VALW
DCR 35mohm +/-15% JUMP_43X39 JUMP_43X118
ESR 15mohm (100mA,40mils ,Via NO.= 2)
TYP MAX
@ PJ332
H/S Rds(on) :27mohm , 34mohm 1 2
+5VALWP 1 2 +5VALW
L/S Rds(on) :19mohm , 23.5mohm JUMP_43X118
4 4

3VALW/5VALW
A B C D
A
DDR controller (35.3), Support component (35.4)
EMI@ EMI Part (47.1)

PL151
HCB1608KF-121T30_0603
B+ 1 2 1.5V_B+
BST_1.5V-1 1 @ 2 BST_1.5V +1.5V

PR155 0_0603_5%
2200P_0402_50V7K
10U_0805_25V6K
DH_1.5V +0.75VSP
0.1U_0603_25V7K
@EMI@ PC152
PC154
2
PC155
SW_1.5V
10U_0805_6.3V6K
10U_0805_6.3V6K
2
1
PC159
PC160
1
5
DL_1.5V
16
17
18
19
20
PU150
2
PHASE
UGATE
BOOT
VTT
VLDOIN
21
AON7408L
PAD
PQ151
4 15 1
LGATE VTTGND
PR158 14 2
PL152 27.4K_0402_1% PGND VTTSNS
1
2
3
0.68UH_PCMB053T-1R0MS_8.5A_20% 1 2CS_1.5V
2 1 13 3
+1.5VP PC162 CS RT8207MZQW_WQFN20_3X3 GND
5
1U_0603_10V6K
1 2 12 4 VTTREF_1.5V
FDMC7692S_MLP8-5
PR159 VDDP VTTREF
330U_D2_2V_Y
1
1 5.1_0603_5%
+1.5VP
PQ152
1 2 VDD_1.5V 11 5
+ VDD VDDQ
PC157
PR156 @EMI@ 4
PGOOD
1
4.7_1206_5%
TON
+5VALW PC163
FB
S5
S3
SNUB_+1.5VP 2
1
2 0.033U_0402_16V7K
2
PC164
1
2
3
10
6
1U_0603_10V6K
+5VALW
2
PR160
10.2K_0402_1%
FB_1.5V 2 1 +1.5VP
TON_1.5V
1
PC156 @EMI@
680P_0402_50V7K
2
2
PR161
510K_0402_1% PR162
@ PR163 1.5V_B+ 1 2 10K_0402_1%
0_0402_5%
1 2 EN_1.5V
SYSON
1
1 1
EN_0.75VSP
1
@ PC166 @
@ PJ151 PR164
0.1U_0402_10V7K
2 1 2 1
2
2 1 0.75VR_EN
JUMP_43X118
0_0402_5%
@ PJ153 @ PJ152
1
2 1 2 1
+0.75VSP 2 1 +0.75VS +1.5VP 2 1 +1.5V
@ PC167
JUMP_43X39 JUMP_43X118 0.1U_0402_10V7K
2
@ PJ180
(15A, 600mils ,Via NO.= 30) 1 2
OCP=18A +1.8VSP 1 2 +1.8VS
(0.5A,40mils ,Via NO.= 1) JUMP_43X79
1.5V
Peak Current 16.66A 1.8VS controller (35.15), Support component (35.16)
OCP current 20 A
FSW=495kHz PU180
DCR 12mohm PL181
HCB1608KF-121T30_0603
SY8032ABC_SOT23-6 PL182
1UH_NRS4018T1R0NDGJ_3.2A_30%
ESR 10mohm +5VALW 1 2 4
IN LX
3 LX_1.8V 1 2
+1.8VSP
TYP MAX 5 2
68P_0402_50V8J
PG GND
1
H/S Rds(on) :27mohm , 34mohm
4.7_0402_1%
1
1
PC187
6 1
PC184 FB EN
PR186
PR183
L/S Rds(on) :10.8mohm , 13.6mohm 22U_0805_6.3VAM
20K_0402_1%
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2
2
PC183
PC182
1
FB_1.8V
@ PR181
680P_0402_50V7K
2
1 2 EN_1.8V
STATE S3 S5 1.5VP VTT_REFP 0.75VSP SUSP#
1
PC186
0_0402_5% PR184
1
S0 Hi Hi On On On
2
10K_0402_1%
1
@ PR182 PC185
Off
2
499K_0402_1% @ 0.1U_0402_10V7K
S3 Lo Hi On On
2
(Hi-Z)
2
S4/S5 Lo Lo Off Off Off

(Discharge) (Discharge) (Discharge) Security Classification Compal Secret Data Compal Electronics, Inc.
Note: S3 - sleep ; S5 - power off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.5VP/0.75VSP/1.8VSP
A
5 4 3 2 1
D D
1.05VCCP controller (35.5), Support component (35.6)
@ 0_0402_5%
PR402
2 1
SUSP#
1
@ PC402
0.1U_0402_16V7K
2
EMI Part (47.1)
@EMI@ @EMI@
EMI Part (47.1) PR403 PC403
4.7_1206_5% 680P_0603_50V7K
PL401
1 2 SNUB_+1.05VSP 1 2
HCB2012KF-121T50_0805 EMI@ PU400
C
B+ 2 1 +1.05VSP_B+ 8
IN EN
1 PC406 C
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0603_25V7K
6 1 2 PL402
BS
1
PC401
0.68UH_PCMC063T-R68MN_15.5A_20%
+1.05VS_VCCPP
@EMI@ PC404
9 10 SW_+1.05VSP 1 2
GND LX
1K_0402_1% 4700P_0402_16V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC407
4
FB
PC408
PC409
PC410
PC411
2
3 7
+3VS +3VALW
2
ILMT BYP
1 2 PGD_1.05V 2 5
4.7U_0603_6.3V6K
2.2U_0603_6.3V6K
+3VS PG LDO
75K_0402_1%
PC413
1
1
PC412
PR401 SY8208DQNC_QFN10_3X3
PR404
100K_0402_5%
1
VCCP_PWRGOOD
PR406
@ PR413
0_0402_5%
2
VCCIO_SENSE
1
PR405
The current limit is set to 8A, 12A or 16A when this pin 100K_0402_1%
is pull low, floating or pull high respectively.
2
B B
@ PJ401
2 1
+1.05VS_VCCPP 2 1 +1.05VS_VCCP
JUMP_43X118
(14.37A,680mils ,Via NO.=30)
OCP=17.24A
A A

+1.05VS_VCCP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS VFKTA 1.0
5 4 3 2 1
5 4 3 2 1
VID [0] VID[1] VCCSA Vout

0 0 0.9V
0 1 0.85V
1 0 0.775V
1 1 0.75V
D D
VCCSA controller (35.17), Support component (35.18)

+VCCSAP @ PJ602 +VCCSA
1 2
1 2
JUMP_43X118
PEN@ PR611
1 2
+1.05VS_VCCP +VCCSA
0.005_1206_1%
C C
+3VS
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC628
PC626
100K_0402_5%
1
PU601
2
9
GND
PR610
5 4 +VCCSAP
+VCCSA_B+ VIN Vo
2
6 3 @ PR621
0.9V
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
+5VALW VPP Vo 0_0402_5%
22U_0603_6.3V6M
@ PR601 7 2 1@ PR622 2 H_VCCSA_VID1
POK D1
1
SA_PGOOD 0_0402_5% 0_0402_5%
PC613
PC615
PC616
PC618
VCCP_PWRGOOD 1 2 8 1 1 2 H_VCCSA_VID0
VEN/MODE D0
2
G978F11U_SO8
1U_0603_6.3V6M
1U_0603_6.3V6M
1
1
PC624
PC629
2
2
@ PJ601
2 1
+1.05VS_VCCP 2 1 +VCCSA_B+
JUMP_43X79
B B
(6A, 240mils ,Via NO.= 6)
A A

VCC_SAP
Custom VFKTA 1.0
5 4 3 2 1
5 4 3 2 1
CPU_Core controller (36.1), Support component (36.3)
1
@ PC535
1000P_0402_50V7K
local sense revese HW VCC_AXG_SENSE
1 2
VSS_AXG_SENSE
PC537
6800P_0402_25V7K PC536
0.01U_0402_25V7K
2
1 2
PR538
PC538 PC539
1
68P_0402_50V8J 499_0402_1% PL501
PR537 1 2 1 2 1 2 HCB2012KF-121T50_0805
649_0402_1% +CPU_B+ 1 2 B+
10U_0805_25V6K
10U_0805_25V6K
PH5 PR540
2200P_0402_50V7K
PC540 470P_0402_50V7K
@EMI@ PC510
D 10K_0402_1%_ERTJ0EG103FA 137K_0402_1% 1 D
100U_25V_M
VSUMG- 1 2 1 2 1 2 1 2 PQ501
1
+
PC531
PC532
PC500
PR539 PR541
1
422_0402_1% 150P_0402_50V8J
2
2.61K_0402_1%
1
0.022U_0402_25V7K
PC543
2
2
13.3K_0402_1%
.1U_0402_16V7K
PR542 UGATE1 1 @ 2 UGATE1-1 4
1
PC541
PR544
2K_0402_1% PR528 0_0603_5%
1
1 2
1
PR543
1 2
11K_0402_1% AON7518_DFN8-5 PL502
3
2
1
PR545 0.22UH_MMD-06DZNR22MEO1L_25A_20%
+3VS
2
2.61K_0402_1% PC542 PC544 PHASE1 2 1
+CPU_CORE
5
0.1U_0603_25V7K 470P_0402_50V7K
2
1.91K_0402_1%
4.7_1206_5%
PR530 PQ502
1
VSUMG+ 2.2_0603_5%
@EMI@ PR506
BOOT1 1 2 1 2
BOOTG
680P_0402_50V7K
LGATE1 PC527 4
UGATEG 0.22U_0603_16V7K
1 2
@EMI@ PC506
VSUM+ 1 2
PHASEG PR532
PR546
3.65K_0603_1%
3
2
1
LGATEG TPCA8059-H_PPAK56-8-5
2
+5VS Rds(on)=2.2m-3.3m ohm VSUM- 1 2
PU500 PR536
33
32
31
30
29
28
27
26
25
1_0402_5%
PR547 27.4K_0402_1%
PAD
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
PR549
1 2
For ULT 17W 1+1
1
3.83K_0402_1%
CPU_CORE LL= -2.9mΩ, Fsw = 450 kHz
1
1 2 1 2 NTCG 1 24 @ PR551
C
PR548 NTCG PHASEG PC545 PR550 1_0603_5% C
VR_ON
1 2 PH2 470K_0402_5%_ TSM0B474J4702RE 2 23 1U_0603_10V6K 0_0603_5% Icc_TDC=16A, Iocp_cpu=39.6A
2
VR_ON LGATEG
GFX_CORE LL= -3.9mΩ, Fsw = 450 kHz
2
2
0_0402_5% SCLK 3 22
VR_SVID_CLK SCLK VCCP
VR_SVID_ALRT#
ALERT# 4
ALERT#
ISL95833HRTZ-T_TQFN32_4X4
VDD
21
Icc_TDC=21.5A, Iocp_gfx=39.6A
1U_0603_10V6K
PC546
SDA 5 20
VR_SVID_DAT SDA PWM2
1
6 19 LGATE1
VR_HOT# VR_HOT# LGATE1
2
7 18 PHASE1
PR552 NTC PHASE1 +CPU_B+
10U_0805_25V6K
10U_0805_25V6K
1 2 8 17 UGATE1
PGOOD
BOOT1
ISUMN
ISUMP
ISEN2 UGATE1
COMP
ISEN1
130_0402_1%
RTN
1
499_0402_1%
@ PC547 0_0402_5% BOOT1

FB
1
1
54.9_0402_1%
75_0402_5%
PC533
PC534
47P_0402_50V8J @
5
PR553
PR554
+5VS
2
10
11
12
13
14
15
16
PR555
PQ503
PR556
2
470K_0402_5%_ TSM0B474J4702RE
27.4K_0402_1%
@
2
VGATE
1
UGATEG1 @ 2UGATEG-1 4
PR558
1
PR557
PR504 0_0603_5%
+1.05VS_VCCP +3VS
PH3
1 2
1
AON7518_DFN8-5 PL503
2
3
2
1
@ PC548 1.91K_0402_1% 0.22UH_MMD-06DZNR22MEO1L_25A_20%
2
0.1U_0402_16V7K PHASEG 2 1
+GFX_CORE
2
3.83K_0402_1%
1
4.7_1206_5%
1
PR559
@EMI@ PR526
PQ504
1
PC516
1
B 0.22U_0603_16V7K B
2
1 2
680P_0402_50V7K
1_0402_5%
PR514
4 PR513
1 2
@EMI@ PC526
3.65K_0603_1%
PR516
LGATEG
2.2_0603_5%
VSUMG+ 2
2
3
2
1
2
BOOTG
VSUMG-
2
TPCA8059-H_PPAK56-8-5
PC549 PR560 PR561 VSUM+

470P_0402_50V7K 2K_0402_1% 42.2K_0402_1%
11K_0402_1%
2.61K_0402_1%
1 2 1 2 1 2
Rds(on)=3.8m-4.8m ohm
1
0.022U_0402_16V7K
PR562
0.1U_0603_25V7K
PC553
1
PC550 PC551
PC552
649_0402_1%
422_0402_1%
470P_0402_50V7K 68P_0402_50V8J
12
1
1 2 1 2 1 2
2
2
PR563
PR564
PR565
PR566 PH4
6800P_0402_25V7K
499_0402_1%
2
10K_0402_1%_ERTJ0EG103FA
PC555
PR567 PC554 VSUM-

1.91K_0402_1% 150P_0402_50V8J
1
1 2 1 2 1 2
Close Phase 1 choke
1
.1U_0402_16V7K
PR568
PC556
137K_0402_1%
2
local sense revese HW
A A
PC557 @
330P_0402_50V7K
1 2
VCCSENSE
VSSSENSE
1 2
PC558
0.01U_0402_25V7K Security Classification Compal Secret Data Compal Electronics, Inc.
local sense revese HW Issued Date 2012/09/24 Deciphered Date 2013/09/24 Title
CPU_CORE
5 4 3 2 1
5 4 3 2 1
CPU_Core output CAP (Including MLCC) 36.4 GFX output CAP (Including MLCC) 36.5
+GFX_CORE
+CPU_CORE
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1
22U_0603_6.3V6M
1
22U_0603_6.3V6M
1
PC853
PC854
PC855
PC856
PC857
PC858
1
1
PC806 PC807 PC808 PC809 PC810 2 2 2 2 2 2
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
VCCP output Cap (Including MLCC) 36.6
2
2
D D
+1.05VS_VCCP
1
1
PC811 PC812 PC813 PC814 PC815
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 1 1
1
PC860
PC861
PC862
PC863
PC864
PC454
PC423
PC424
PC417
PC418
PC419
PC420
PC421
PC422
PC425
PC426
PC453
PC859
2
2
2 2 2 2 2 2 2 2 2
1
1
PC816 PC817 PC818 PC819 PC820 PC821
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
PC865
PC866
PC867
PC868
PC869
PC870
PC427
PC428
PC429
PC430
PC431
PC432
PC433
PC434
PC435
PC436
PC437
PC438
PC439
C C
2
+CPU_CORE
1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
PC834 PC835
PC872
PC873
PC874
PC876
PC875
PC440
PC441
PC442
PC443
PC444
PC445
PC446
PC447
PC448
PC449
PC450
PC451
PC452
22U_0603_6.3V6M 22U_0603_6.3V6M
2 2
2
1 1 1 1 1 1
560U_D2_2VM_R4.5M
PC822 PC823 PC824 PC825 PC826 PC827
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1
2 2 2 2 2 2
+
PC852
2
B
1 1 1 1 1 1 B
PC828 PC829 PC830 PC831 PC832 PC833
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 2 2 2 2 2
+CPU_CORE Chief River ULV 330uF*9m 22uF 10uF 2.2uF 1uF 470uF 560uF
1 1
+ +
CPU 2 14 16
PC802 PC803
330U_D2_2V_Y 330U_D2_2V_Y
2 2
GFX_CORE 6 6 11 1
1.05V_VCCP 9 3 26 1
A A

PWR - PROCESSOR DECOUPLING
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS VFKTA 1.0
5 4 3 2 1
A B C D
+VGA_CORE Under VGA Core GB4-128 package
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
VGA_CORE controller (43.1), Support component (43.2) EMI Part (47.1)
1
1
PC903
PC904
PC905
PC909
PC907
PC908
PC958
PC911
PC912
PC913
@ PC950
@ PC951
@ PC949
@ PC902
+VGA_B+ EMI@
2
2
PL901
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
2 1
B+
1 1
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2200P_0402_50V7K
1
1
PC918
PC919
PC920
PC921
10U_0805_25V6K
10U_0805_25V6K
5
1
EMI@ PC915
PC910
PC917
2
PQ901
AON7518
2
+3VS_DGPU
+3VS_DGPU
DGPU_VID
4
+VGA_CORE Near VGA Core
PSI
PR907 PC922
2.2_0603_5% 0.22U_0603_10V7K
3
2
1
2 1BOOT1_2_VGA 1 2
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
7x7
22U_0603_6.3V6M
47U_0805_6.3V6M
1 @ PR908
1
PR929 10K_0402_5%
PC923
PC924
PC925
PC926
PC927
PC928
PC929
@ PC952
@ PC953
@ PC955
@ PC954
@ PC956
2 1 UGATE1_2_VGA
.1U_0402_16V7K
PL903
+VGA_CORE
@ PR932 0_0402_5%
0.22UH_MMD-06DZNR22MEO1L_25A_20%
10K_0402_5%
0_0603_5% 1 2
BOOT1_VGA
2
1
2
5
0_0402_5%
PR912
1
@ PR909
PQ902
TPCA8059 EMI@
2
PR906
PC930
4.7_1206_5%
560U_D2_2VM_R4.5M
1
1
LGATE1_VGA 4
1 SNUB1_VGA 2
+
PC931
1
10K_0402_5%
GV@ PR915 GV@ PR913 GPU_VID
2
PSI_VGA
PR911
20K_0402_1% 20K_0402_1% UGATE1_VGA
EN_VGA
3
2
1
VREF 2 1 2 1 VIDBUF
2
EMI@ 2
1
@ PC933 @ PC906
2
PHASE1_VGA
1500P_0402_50V7K 680P_0402_50V7K
GV@ PR930
2
PU900
1
GV@ PR914 2K_0402_1%
18K_0402_1%
PSI
HG1
BST1
VIDBUF
VID
EN
2
2 1
GV@ PC940 Rdson(max)=4.8mohm EMI Part (47.1)
2 1 REFIN 7 24
2700P_0402_50V7K REFIN PH1
PRV11 = 71.5K ==>Fsw = 450KHz 1 2 VREF 8 23
VREF LG1 PC935 4.7U_0603_10V6K
@ PR917 PC934 .01U_0603_16V7K 2 1 FS 9 22 1 2
0_0402_5% PR931 34K_0402_1% FS PGND
1 2 10 21 PVCC_VGA 2 1
VGA_VSS_SENSE FBRTN PVCC +5VS
1000P_0402_50V7K
@ PR901
PC936
PC937 PR919 FB_VGA 11 20 0_0402_5%

FB LG2
1
47P_0402_50V8J 51_0402_1% PC938 10P_0402_50V8J +VGA_B+

1 2 FB1_VGA1 2 1 2 COMP_VGA 12 19
TALERT#
@ PR920 PR921 COMP PH2
PGOOD
2
TSNS
0_0402_5% 10K_0402_1%
BST2
GND
VCC
HG2
1 2 1 2 1 2FB2_VGA1 2
VGA_VCC_SENSE
10U_0805_25V6K
10U_0805_25V6K
5
PC939 PR922
25
13
14
15
16
17
18
1
PC942
PC943
100P_0402_50V8J 82K_0402_1% NCP81172MNTWG_QFN24_4X4
BOOT2_VGA
VCC_VGA
PR923
2
@
UGATE2_VGA 2 1 UGATE2_2_VGA 4
N14P-GV2 N14M-GL PQ903
VGA_PWROK 0_0603_5%
3
GL@ PR913 AON7518 3
PR926 5.9K_0402_1%
R1 PR913 20 Kohm 39 Kohm 39K_0402_1% PR925 10K_0402_5% PR924 PC944
3
2
1
2 1 +3VS 2.2_0603_5% 0.22U_0603_10V7K
GL@ PR915 2 1 BOOT2_2_VGA 1 2 7x7
1
R2 PR915 20 Kohm 30 Kohm 30K_0402_1% PR927 2.2_0402_5% PL904

2 1 +5VS 0.22UH_MMD-06DZNR22MEO1L_25A_20% +VGA_CORE
GL@ PR930 PHASE2_VGA 1 2
2
1U_0402_10V6K
R3 PR930 2 Kohm 3 Kohm 3K_0402_1%
5
2
1
PC946
GL@ PR914 PQ904

1
R4 PR914 18 Kohm 27 Kohm 27K_0402_1% TPCA8059

EMI@ PR916
GL@ PC940 4.7_1206_5%
330U_D2_2V_Y
VREF
1
1800P_0402_50V7K LGATE2_VGA 4
C PC940 2.7 nF 1.8 nF
1 SNUB2_VGA 2
+
PC947
2@
3
2
1
Rdson(max)=4.8mohm
EMI@ PC916
680P_0402_50V7K
2
EMI Part (47.1)
4 4

+VGA_COREP
A B C D
5 4 3 2 1
Item Time (When) Page (Where) Location / Discription ( How / What) Request (Who) Reson (Why)
1 EVT--2012/10/24 P45-PWR-BATTERY CONN / OTP @PD5 / Remove ESD diode company For part count reducation
2 EVT--2012/10/24 P45-PWR-BATTERY CONN / OTP @PD6 / Remove ESD diode company For part count reducation
3 EVT--2012/10/24 P46-PWR-CHARGER @PC221 /Remove 10uF capacitor company For part count reducation
4 EVT--2012/10/24 P47-PWR-3VALW/5VALW PC331 /Reserve PWR ME limitation
5 EVT--2012/10/24 P47-PWR-3VALW/5VALW @PC354/mount PWR ME limitation
D 6 EVT--2012/10/24 P47-PWR-3VALW/5VALW PR337/235K change to 137K PWR for RT8243 3V OCP setting D
7 EVT--2012/10/24 P47-PWR-3VALW/5VALW PR357/156K change to 143K PWR for RT8243 5V OCP setting
8 EVT--2012/10/24 P48-1.5VP/0.75VSP/1.8VSP PR158/16.2K change to 27.4K PWR for RT8207 OCP setting
9 EVT--2012/10/24 P52-PWR +CPU_CORE DECOUPLING PC416/ change 560uF PWR Based on height and space limitation
10 EVT--2012/10/24 P52-PWR +CPU_CORE DECOUPLING PC415/ Remove PWR Based on height and space limitation
11 EVT--2012/10/24 P53-PWR-VGA_COREP PR929 / Add 10K ohm HW Pull high PSI port
12 EVT--2012/10/24 P53-PWR-VGA_COREP PR913 / 39k change to 20K(GV) PWR For N14 PWM VID setting
13 EVT--2012/10/24 P53-PWR-VGA_COREP PR915 / 39k change to 20K(GV) 30K(GL) PWR For N14 PWM VID setting
14 EVT--2012/10/24 P53-PWR-VGA_COREP PR930 / 1.5k change to 2K(GV) 3K(GL) PWR For N14 PWM VID setting
15 EVT--2012/10/24 P53-PWR-VGA_COREP PR914 / 30k change to 18K(GV) 24K(GL) PWR For N14 PWM VID setting
16 EVT--2012/10/24 P53-PWR-VGA_COREP PR904 / 1.5k change to 0K(GV) 3K(GL) PWR For N14 PWM VID setting
17 EVT--2012/10/24 P53-PWR-VGA_COREP PC940 / Add 2700pF(GV) 1800pF(GL) PWR For N14 PWM VID setting
18 EVT--2012/10/24 P53-PWR-VGA_COREP PC933 /Reserve PWR For N14 PWM VID setting
19 EVT--2012/10/24 P53-PWR-VGA_COREP @PC914 /Remove 0.1uF capacitor company For part count reducation
20 EVT--2012/10/24 P53-PWR-VGA_COREP PR931/71.5K change to 34K PWR For NCP81172 Fsw setting
21 EVT--2012/10/24 P53-PWR-VGA_COREP PR927/PN change to SD028220B80 PWR for PN setting error
22 EVT--2012/10/25 P46-PWR-CHARGER PQ203/change to TPCA8507 PWR for design change MEMO
C C
23 DVT--2012/12/06 P46-PWR-CHARGER PU200/change to BQ24725RGRR PWR for design change
24 DVT--2012/12/06 P46-PWR-CHARGER PQ203/ change to TPCA8507 PWR AON6504 has burnt out issue
25 DVT--2012/12/06 P47-PWR-3VALW/5VALW PC534,PC351/Delete PWR Based on height and space limitation
26 DVT--2012/12/06 P47-PWR-3VALW/5VALW PR335/add 100K ohm PWR Pull high +3VL
27 DVT--2012/12/06 P47-PWR-3VALW/5VALW PC344/add 4.7U PWR for design request
28 DVT--2012/12/06 P47-PWR-3VALW/5VALW PC341/change to 4.7U PWR for design request
29 DVT--2012/12/06 P47-PWR-3VALW/5VALW PC352,PC353/add 150U_D2 PWR Based on height and space limitation
30 DVT--2012/12/06 P48-1.5VP/0.75VSP/1.8VSP PL152/change to 0.68UH PWR for design change
31 DVT--2012/12/06 P49-PWR-1.05VS_VCCP PL401/change PN PWR to integrate PN
32 DVT--2012/12/06 P49-PWR-1.05VS_VCCP PR403 PC403/Reserve EMI EMI Command
33 DVT--2012/12/06 P51-CPU_CORE CPU_CORE(PR5XX,PC5XX)/change solution PWR change solution
34 DVT--2012/12/06 P52-PWR +CPU_CORE DECOUPLING PC802 PC803/change to 470U PWR change solution
35 DVT--2012/12/06 P54-PWR-VGA_COREP PR912/add 10K ohm PWR pull high +3VS_DGPU
36 DVT--2012/12/06 P54-PWR-VGA_COREP PC934/change 0.01U PWR For N14 PWM VID setting
37 DVT--2012/12/06 P54-PWR-VGA_COREP PL903 PL904/change PN PWR have higher loss
38 DVT--2012/12/06 P45-PWR-BATTERY CONN / OTP PF2/change PN company For cost down
B
39 PVT--2013/01/18 P47-PWR-3VALW/5VALW PC352,PC353/change location to PC331,PC351 PWR change location B
40 PVT--2013/01/18 P48-1.5VP/0.75VSP/1.8VSP PC157/change 390U PWR for design change

41 PVT--2013/01/18 P49-PWR-1.05VS_VCCP PC414 / change 0ohm PWR change solution(change to location sense)
42 PVT--2013/01/18 P52-PWR +CPU_CORE DECOUPLING PC417,PC418,PC419,PC420,PC421,PC422,PC425/change to 22U PWR for 1.05VCCP test
43 PVT--2013/01/18 P52-PWR +CPU_CORE DECOUPLING PC426,PC453/add 22U PWR for 1.05VCCP test
44 PVT--2013/01/18 P49-PWR-1.05VS_VCCP PC407/change 4700P PWR for design change
45 PVT--2013/01/18 P52-PWR +CPU_CORE DECOUPLING PC416/Delete PWR for 1.05VCCP test(change to location sense)
46 PVT--2013/01/18 P49-PWR-1.05VS_VCCP PL402/change to 0.68U PWR for 1.05VCCP test
47 PVT--2013/01/18 P51-CPU_CORE PQ501,PQ503 /change AON7518 PWR AON7514 EOL
48 PVT--2013/01/18 P51-CPU_CORE PR553/Reserve PWR change solution
49 PVT--2013/01/18 P54-PWR-VGA_COREP PC906 ,PC915,PC916,PR906,PR916/add EMI EMI Command
50 PVT--2013/01/18 P54-PWR-VGA_COREP PC934/change PN PWR change PN
51 PVT--2013/01/21 P52-PWR +CPU_CORE DECOUPLING PC802,PC852/change to 560U PWR for CPU,GFX Transient
52 PVT--2013/01/21 P51-CPU_CORE PQ502,PQ504 /change TPCA8059 PWR for design change
53 PVT--2013/01/21 P54-PWR-VGA_COREP PC947/Reserve PWR for VGA Transient(for cost down)
54 PVT--2013/01/22 P52-PWR +CPU_CORE DECOUPLING PC802,PC803/change to 330U PWR for CPU Transient
55 Pre-MP--2013/03/04 P49-PWR-1.05VS_VCCP PR406/add 1k ohm PWR for 1.05VCCP test(change to location sense)
A
56 Pre-MP--2013/03/04 P53-PWR-VGA_COREP PR904 PR918 PR928 PC945 remove PR914 change from 24K to 27K PWR Remove and change for Richtek solution setting A

PIR (PWR)
5 4 3 2 1
A B C D E
HW PIR (Product Improve Record)

VFKTA LA-9861P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 TO 0.2
NO DATE PAGE MODIFICATION LIST PURPOSE

1
--------------------------------------------------------------------------------------------------------------------------------------------------- 1
1. 11/13 39 Add CA39 (SE102104K00) BOM structure change

2. 11/13 39 Reserve RA31,RA38 EMI request
3. 11/13 41 Change RB36 from 2.2k to 0 ohm and CB50 to @ Design change
4. 11/13 15 Update VGA strap pin all page Design change
5. 11/21 42 Remove NFC function Design change
6. 11/21 42 Update CPU config&PN Design change
7. 11/26 23 change BOM structure C238,C239,C240,C241,C242,C243 to CRT@EMI@ EMI request
8. 11/26 22 Add D92 for LID_SW#_D to isolate the +3VL power rail from LID_SW# Design change
9. 11/26 24 Add @ to JHDMI Design change
10. 11/26 37 Change JCARD.10 to SDWP# and JCARD.11 to SDCD. Design change
37 Add QW1, RW3, RW4 for normal close type connector.
11. 11/26 40 Update HDMI power circuit Design change
12. 11/26 40 Change JSPK from 8 pin to 6 pin (SP02000WS00) Design change
13. 11/26 40 Remove SPK_DET1 and change SPK_DET0 net name to SPK_DET Design change
2
14. 11/26 39 Change RA50 to 269@ Design change 2
15. 11/26 40 Reverse JSPK to keep same layout routing on MB Design change
16. 11/27 30 Remove GPIO71 and change SPK_DET1 to SPK_DET Design change
17. 11/29 30 Add GPIO22 as VRAM_DR_SR# and add RH203, RH205 for BOM control <DIS> For dual&single rank common bios
18. 11/30 30 Change RH202, RH203 BOM structure to GVDR@ and GVSR@ For dual&single rank common bios
19. 11/30 42 Change H7 to 4P0, Add H19 (3P2N), Change H17, H18 to PTH ME request
20. 11/30 25 Change UH3 from socket to IC Design change
21. 11/30 09 Change CC53 to 47U 0805 (SE00000PL00)& add CC50 (SE00000PL00) For 1206 MLCC Crack issue
09 Change CC44 to 47U 0805 (SE00000PL00)& add CC40 (SE00000PL00)
12 Change CD31 to 47U 0805 (SE00000PL00)
38 Change CR10&CR12 to 47U 0805 (SE00000PL00)
22. 11/30 07 Change RC73 to 0 ohm (do not use short pad on this location) For debug
23. 11/30 17 Change RV53 pull high to +3VS Design change
24. 11/30 15 Change RV24 to 4.99K Strap pin change
25. 11/30 22 Delete D92 and change the netname to BKOFF# Avoid LCD_INV leak to Touch/B
26. 11/30 23 Add R62 & R63 for CRT undershoot issue For CRT undershoot issue
3 3
27. 11/30 25 Chane UH4, RH269, RH271 to @, change RH267 from shortpad to 0-ohm @. Design change
28. 11/30 08 Add CC17~CC19 for ESD request ESD request
29. 11/30 29,41 Move PLT_RST# ESD capacitor (CH104) to EC side (CB13) and mount 0.1uF ESD request
30. 11/30 05 Change CC63 from @ESD@ to ESD@ ESD request
31. 11/30 41 Change PM_SLP_S4# from pin127 to pin84. For ENE common code
32. 11/30 41 Change USB_EN#0 from pin84 to pin23. For ENE common code
33. 11/30 41 Change FB_CLAMP from pin23 to pin127. For ENE common code
34. 11/30 17 CV57 and CV60 change to 0.01U. For sequence
35. 11/30 17 RV47 change to 180K. For sequence
36. 12/03 38 Update USB circuit For S&C MAX4640 and MAX4641 co-lay circuit
37. 12/04 42 Change H19 to NPTH Design change
38. 12/04 17 Change QV2 footprint to NC7ST32P5X_SC70-5 For non-A51 part change
39. 12/04 04 Add S&C SMBus address in the table Design change
4 4

HW-PIR
Custom 1.0
A B C D E
A B C D E
HW PIR (Product Improve Record)

QCLA4 LA-8861P SCHEMATIC CHANGE LIST
---------------------------------------------------------------------------------------------------------------------------------------------------
40. 12/04 41 Add short-pad (RB5) on pin127. Design change
41. 12/04 13 Reverse DV1, Change DV1, QV8 to OPT@,
1
13 Change FB_CLAMP_MON from pull down to pull high +3VS_DGPU 1
42. 12/04 17 Change UV2 PN to SA007320300 Design change
17 Change UV2, CV58 to OPT@ and change RV50 to @
43. 12/04 43 Add R5546 put high PCH_PWR_EN to +3VL Design change
45. 12/05 41 Add CHG_PWR_GATE# pull high 3VL and add RB11 10K. Design change
46. 12/05 38 S&C IC Pin1 was connected to the EC(GPIO49) Pin82. Design change

---------------------------------------------------------------------------------------------------------------------------------------------------
1. 12/24 17 Change RV43 to 270K For GC6 timing requirements
4. 12/24 17 Change RV50to N14MGL@ N14M-GL doesn't support GC6
5. 12/24 17 Change UV2to N14PGV2@ N14M-GL doesn't support GC6
6. 12/24 17 Change CV58 to @ Cost reduction
7. 12/24 13 Change QV8to N14PGV2@ N14M-GL doesn't support GC6
8. 12/24 13 Change DV1 P/N to SCS00002G00 BOM reduction
2 9. 01/09 41 Change CB31 to 100P P/NSE071101J80 Design Change 2
10. 01/09 7,9,25 Change QC3,QC7,QC8,QH1 to SB00000PF00 SB501380020 X1 code
11. 01/15 22 Reserve R267&R266 0 ohm For EMI cost down
12. 01/15 41 Reserve CB50 1U Common design
13. 01/15 13 GPIO12 be connected to EC_GPXIOA01(remove EC_DRAMRST_CNTRL_PCH&RC3) For GPS
14. 01/16 42 Modify JTP pin define For DFB highlight
15. 01/16 22 Add C17 100P on LED_PWM For EMI request
16. 01/17 39/42 Add RB12, RB37, connect EC_MUTE_INT from codec to EC For boot bobo issue
17. 01/17 5/30/42 Reserve CC1,CH1,CB17,CB18,CC35 100P For ESD
18. 01/17 26 Add RH38 0 ohm on XCLK_RCOMP For EMI 200M noise

---------------------------------------------------------------------------------------------------------------------------------------------------
1. 02/18 06 Swap H_EDP_TXN[0\1] to H_EDP_TXP[0\1] Design mistake
2. 02/18 22 Change C7 to SE076153K80 (15nF) for LCD sequence tuning
3. 02/19 05 Delete CC33, CC36, C4; change R1 to short pad for part count reduce
3
4. 02/19 07 Change RC73 to short pad for part count reduce 3
5. 02/19 09 Delete CC61, CC83; change RC119 to short pad for part count reduce
6. 02/19 11 Delete CD2, CD15 for part count reduce
7. 02/19 12 Delete CD28, CD46 for part count reduce
8. 02/19 17 Delete CV58 for part count reduce
9. 02/19 22 Change R106 to shortpad for part count reduce
10. 02/19 23 Delete C250 for part count reduce
11. 02/19 25 Delete CH6, CH100; change RH67, RH68 to short pad for part count reduce
12. 02/19 26 Delete RH275 for part count reduce
13. 02/19 28 Delete RH254 for part count reduce
14. 02/19 29 Delete CH30, RH287 for part count reduce
15. 02/19 35 Delete CCL2, RCL5, RCL2, net: LAN_X1_R_R, LAN_X1_R for part count reduce
16. 02/19 36 Delete net: LAN_X1_R for part count reduce
17. 02/19 37 Change RW1 to shortpad for part count reduce
18. 02/19 38 Delete CR7, CR8 for part count reduce
19. 02/19 39 Change RA22, RA18, RA24 to short pad for part count reduce
20. 02/19 41 Delete CB4, CB5, CB50 for part count reduce
21. 02/19 42 Delete SW2, SW3 for part count reduce
22. 02/23 37 Change RW2 to 33Ohm and mount CW9 10PF for EMI request
23. 03/04 41 Connect RB14 form POK_R to POK and reserve RB13,RB22,CB16 for abnormal shut down power request
4 4
24. 03/04 37 Add RW5~RW8 for EMI request and change netname SD_DATAx to SD_DATAx_R on conn side for EMI request

HW-PIR
Custom 1.0
A B C D E
www.s-manuals.com

Compal - La-9861p - r1-38068.0 - Satellite c45 - Schematics PDF

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A B C D E

LA-9861P REV 1.0 Schematic

2013-02-19 Rev 1.0

Security Classification Compal Secret Data Compal Electronics, Inc.

VGA (DDR3) Intel CPU

1.5V DDRIII 1066/1333/1600 MT/s

LPC BUS HD Audio

RTC CKT. SPI ROM

Touch Pad Int.KBD G-Sensor LED+LID/B SPK Conn JPIO

DESIGN CURRENT 0.1A +3VL

DESIGN CURRENT 6A +5VS

Ipeak=5A, Imax=3.5A, Iocp min=6.12A DESIGN CURRENT 5A +3VALW

DESIGN CURRENT 330mA +3V_LAN

DESIGN CURRENT 3A +3V_WLAN

DESIGN CURRENT 6A +3VS

DESIGN CURRENT 1.5A +LCD_VDD

Ipeak=14.37A, Imax=10.06A, Iocp min=17.24A +1.05VS_VCCP

N-CHANNEL DESIGN CURRENT 2A +1.5V_CPU

N-CHANNEL DESIGN CURRENT 11A +VRAM_1.5VS

( O MEANS ON X MEANS OFF )

HM76R1@ HM70R1@ N14MGL@ N14PGV2@

description WOWL G-SENSOR ZPODD GCLK non-GCLK Single Rank

explain w/ w/o G-SENSOR w/ w/o GCLK non-GCLK Single Rank

Power Device HEX Address

G3 LOW LOW LOW

Security Classification Compal Secret Data Compal Electronics, Inc.

UC1B Stuff RC158&RC157 if do not support eDP

T2 PAD H_CATERR# C49 @ESD@

H_PECI A48 AT30 H_DRAMRST#

JTAG & BPM

0218. Delete 0.1u CPU@

Buffered Rest to CPU XDP Connector FAN Control Circuit

Security Classification Compal Secret Data Compal Electronics, Inc.

PEG_ICOMPI and RCOMPO signals should be

PCI EXPRESS -- GRAPHICS

+1.05VS_VCCP IVY-BRIDGE_BGA1023 <BOM>

H_EDP_HPD# IVY Bridge

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D0 AG6 DDR_B_D0 AL4

DDR SYSTEM MEMORY B

IVY-BRIDGE_BGA1023 <BOM> IVY-BRIDGE_BGA1023 <BOM>

H_DRAMRST# H_DRAMRST# DDR3_DRAMRST#_R

+CPU_CORE UC1F POWER +1.05VS_VCCP

33A 8.5A +1.05VS_VCCP

PEG IO AND DDR IO

N34 VCC[74] VCCPQE[1] AN22

+1.05VS_VCCP Close to CPU

Close to CPU Ivy Bridge_POWER-1

Intel DDR Vref M3

29A have 20 mil trace width RC120 1K_0402_0.5%

VCC_AXG_SENSE F45 VCCDQ[1] AN26

1 Rshort@ 2 +1.8VS_VCCPLL BB3

Reserve for power consumption 1 1 BC4

N22 CC45 1 2@ 0.1U_0402_10V7K

1 1 1 R21 VCCSA[9] RC203 CC68 4 S D 5

V16 VCCSA[11] FDS6676AS_SO8 RC204

Place BOT OUT BGA V18 D49 H_VCCSA_VID1 220K_0402_5%

1 1 1 1 1 in PWR-side or HW-side SUSP 5 0.1U_0402_25V6 820K_0402_5%

AJ26 VSS[62] VSS[152] AY9 L34 VSS[242] VSS_NCTF_6 BE58 1K_0402_1%

PCIE Port Bifurcation Straps

IVY-BRIDGE_BGA1023 <BOM> 11: (Default) x16 - Device 1 functions 1 and 2

CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled;