CLASS D Signalling & DC Protection for FullBridge V.

3
FUSE 20A Design by Kartino Surodipo, Dec 2017
TO AMP

R23
V1
47K
++VDD MAIN AMP SUPPLY

90
D21
Q8
2N5551C
1N4148 R3

D26 15K
C7 C6 1N4148

D25
100µ 100µ 1N4148
R4

D22 15K Q9
R22 R11 2N5401C
1N4148
33K 33K

FROM_AMP_OUTPUT_2 TO_SPEAKER_MIN

FROM_AMP_OUTPUT_1 TO_SPEAKER_PLUS

D2
1N4148

D3
1N4148
D31
D4
1N4148
BZX84C12L
R32 R6
D27
QTLP690C 10K 47K
CLIP

R28
10K
2W
R2
U1

D28 4K7
R12
QTLP690C
R29 D7 D5
POWER ON 100K

V4
D1 10K QTLP690C 1N4148
C1 R7 Q2
D29 PROTECT OFF
Q10 Q11 FROM 12V BIAS SUPPLY
QTLP690C R8 2N5551C
2N5551C 2N5551C
10µ 47 Q1
BZX84C6V2L SIGNAL 12
16V D32 6K8 Q3 R10
V2 BD139C ..\sym\EXTRA\Relays\relay.lib
1N4148 2N5551C C2 4K7
--VSS MAIN AMP SUPPLY R5
D6
R9 R24 100µ 15K
100
Front Panel Signalling 16V
.tran 20s startup 4K7 4K7
FUSE 20A QTLP690C
PROTECT ON
TO AMP

FROM_OCP_PROTECTION

--- C:\Users\212520892\Documents\From D\LTC\Simulation\DC Protection\DC Protection FullBridge v3.asc ---