Scribd Logo
Upload

Welcome to Scribd!

  • 3rd Resume (After Conversion)

    Uploaded by

    gaurav rai
    11 views2 pages
    ABC XYZ is seeking a career in electronics and communication engineering. She graduated from Motilal Nehru National Institute of Technology Allahabad with a B.Tech in Electronics and Communication Engineering and a CGPA of 8.50. She has experience with Verilog HDL, C/C++ programming, and Silvaco Atlas. She completed a 6-week training in Verilog HDL and implemented a UART design. Her projects include designing an 8-bit RISC processor using Verilog and studying single and double gate SOI MOSFETs using Silvaco Atlas. She has received several prizes in technical, cultural, and sports competitions.

    Original Description:

    Original Title

    3rd resume (after conversion)

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    ABC XYZ is seeking a career in electronics and communication engineering. She graduated from Motilal Nehru National Institute of Technology Allahabad with a B.Tech in Electronics and Communication Engineering and a CGPA of 8.50. She has experience with Verilog HDL, C/C++ programming, and Silvaco Atlas. She completed a 6-week training in Verilog HDL and implemented a UART design. Her projects include designing an 8-bit RISC processor using Verilog and studying single and double gate SOI MOSFETs using Silvaco Atlas. She has received several prizes in technical, cultural, and sports competitions.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    11 views2 pages

    3rd Resume (After Conversion)

    Uploaded by

    gaurav rai
    ABC XYZ is seeking a career in electronics and communication engineering. She graduated from Motilal Nehru National Institute of Technology Allahabad with a B.Tech in Electronics and Communication Engineering and a CGPA of 8.50. She has experience with Verilog HDL, C/C++ programming, and Silvaco Atlas. She completed a 6-week training in Verilog HDL and implemented a UART design. Her projects include designing an 8-bit RISC processor using Verilog and studying single and double gate SOI MOSFETs using Silvaco Atlas. She has received several prizes in technical, cultural, and sports competitions.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 2

    ABC XYZ

    B.Tech– Electronics & Communication Engineering


    Motilal Nehru National Institute of Technology Allahabad
    abcxyz@gmail.com
    +91-7000008000

    CAREER OBJECTIVE
    Become one of the most reputed and ethical professional in the industry and grow manifold along with the organization I
    work for.

    ACADEMIC PERFORMANCE
    Bachelor of Technology- ECE CGPA: 8.50
    Motilal Nehru National Institute of Technology, Allahabad (on a scale of 10)
    Graduating in 2016

    Senior Secondary Examination- Class XII Percentage: 90.0


    St. Xavier’s School, Delhi
    2013

    Higher Secondary Examination- Class X Percentage: 94.0


    St. Xavier’s School, Delhi
    2011

    AREAS OF INTEREST
    • Digital CMOS design.
    • Operational amplifiers and its applications.
    • Digital electronics.

    TRAINING
    • Organization- Cetpa Infotech Pvt. Ltd.
    o Title- Hardware Descriptive Language- Verilog.
    o Duration- 6 weeks (May’14-June’14)
    o Brief Description– Learnt Verilog HDL, standardized as IEEE 1364, is a hardware description language (HDL) used
    in the design and verification of digital circuits at the register transfer level of abstraction. Also
    Implemented UART using verilog HDL.

    PROJECTS
    • 8-bit RISC processor using verilog HDL
    Brief Description: Implemented RISC processor using verilog HDL. It is designed to perform smaller number of type of
    computer instructions so that it can operate at a higher speed (perform more millions of instructions in one
    second, or MIPS.

    • Study of single gate SOI (SGSOI) mosfet and double gate SOI (DGSOI) mosfet using silvaco ATLAS. (ongoing)
    Brief Description: The project is about the invention of SOI technologies for high speed network servers and
    longer battery life and comparing the single gate and double gate SOI technologies and their study using silvaco tool.
    COMPUTER SKILLS
    • Basic C/C++ Programming
    • Verilog HDL
    • Silvaco Atlas
    • MS word , MS Excel ,MS PowerPoint

    ACHIEVEMENTS IN TECHNICAL ACTIVIES


    • Among Top 10 in Quintathlon under Electromania in Avishkar 2k14 MNNIT.
    • Awarded 3rd prize in FPGA event under Electromania in Avishkar 2k14 MNNIT.
    • Finalist of Circuit Design competition under Impromptu in Avishkar 2k14 MNNIT .
    • Participated in idea presenting competition ‘Sparks’ in MNNIT techfest AVISHKAR 2k13.
    • Awarded 3rd prize in Science Exhibition at school level.

    ACHIEVEMENTS IN CULTURAL ACTIVIES


    • Lead Dancer of the EFG folk dance ‘Garba’ in Swagat 2k13 of MNNIT Allahabad.
    • Committee member of EFG folk dance in Swagat 2k14 of MNNIT Allahabad.
    • Member of Dramatics ‘PQR Nukkad’ Team at MNNIT Allahabad.
    • Awarded 2nd prize in Rangoli making competition held at school level.
    • Participated in solo singing competition and reached in top 4 held at MNNIT Allahabad.
    • Worked with an NGO ‘Helpage India’ for creating awareness and assisting in raising funds for disadvantaged elderly
    citizens.

    ACHIEVEMENTS IN SPORTS ACTIVIES


    • Awarded 1st prize in cricket in Josh and J Lal competition 2k13 held at MNNIT Allahabad.
    • Awarded 2nd prize in informal event ‘Googly Cricket’ of Culrav 2k15 held at MNNIT Allahabad.
    • Participated in ‘Athletics meet’ 2k14 and won cash prize held at MNNIT Allahabad.

    PERSONAL DETAILS
    Nationality: Indian
    Date of Birth: 1st January, 1995
    Sex: Female
    Hobbies: Dancing, Singing and Pencil Sketching
    Father: Mr. ABC(in Govt. Service)
    Mother: Mrs. XYZ (Homemaker)
    Permanent Address: 100- JKL Street, Delhi

    I hereby declare that the information given above is correct to the best of my knowledge.

    Date: 3rd June, 2016

    Place: Allahabad (ABC XYZ)

    You might also like