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5 4 3 2 1

D
H61H2-M2 Rev : 1.0 ECS CONFIDENTIAL
D

TABLE OF CONTENTS REVISION HISTORY:


Page Index Page Index Rev Date Notes
------- ------------------------ ------- ------------------------ ------ -------------- ---------------------------------------------------------------------------------
V.A 2010/09/23 Change from H67H2-M3
1 Cover Page 26 PCIE LAN AR8151-B/AR8152-B 1. Audio change to vt1705
2 Block Diagram 27 Power Delivery 2, Super IO change to IT8758E
3, VCORE PWM change to RT8859M
3 CPU - DMI/FDI/PEG 28 Power Sequence, Reset Diagram 4, V_CPUVTT PWM change to RT8121
5, LAN change to AR8151-B & AR8152-B
4 CPU - MISC 29 Clock Distribution 6, Del PCI function
7, Del USB3.0 function
5 CPU - DDR3 8, Del SATA 6G
6 CPU - PWR/GND 9.Del Easy Charge Circuit of F_USB1
C C

7 DDR3 - CH_A_DIMM1
V.1.0 2010/12/03 1. PSON- Pull High 從5VSB改為3VSB_IO
8 DDR3 - CH_B_DIMM3 2, Del EC33 1000U-6.3DL-O
3, Change EC35 from (1000U-6.3DL) to (820U-2.5D6-OS)
9 VCore & VAXG-RT8859M 4, Del EC24 100U-16DE-O
5, 更改DDR3 SOCKET 顏色為兩根都灰色
10 VCore & VAXG- RT9612 6, 更改BATTERY SOCKET換成非架高料
7, 更改POWER CONN. 24pin 換成半透明STD料
11 DC/DC CPUVTT-RT8121 / VCCSA
8, 更改F_USB1改成和F_USB2為相同的顏色
12 DC/DC VDIMM/DDR_VTT/5VDUAL 9,VT1705更改為VT1705CE
10,SATA0GP、SATA1GP、SATA2GP、SATA3GP、SATA4GP、SATA5GP
13 Front Panel,FAN,PowerConn,GND,104 增加Pull High & Low線路
14 PCH - DMI/PCI/PE/USB
15 PCH - SATA / CLK
B 16 PCH - MISC, Strap Function B

17 PCH - DP/VGA/FDI
18 PCH - PWR
19 PCH - GND
20 Slot - PCI-EX16/PCI-EX1
21 DVI&HDMI&COM&PS2
22 USB/SATA/SPI
23 SIO-IT8758E
24 AUDIO VT1705/ALC662(CHIP)
25 AUDIO VT1705/ALC662(PANEL)
A A

NOTE: Elitegroup Computer Systems


Design by 428971_428971_Sugar_Bay_and_BromolowWS_PDG_Rev_0_8.pdf,
Title
428880_428880_Cougar_Point_Desktop_Ballout_Mech_Package_Rev1p0.zip Cover Page
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 1 of 29
5 4 3 2 1
5 4 3 2 1

PCH-GPIO function
---------------------------------------------------------
Pin Name Power Well Usage Default Status
---------------------------------------------------------
GPIO71 VCC3 GPI
GPIO22 VCC3 GPI
GPIO38 VCC3 GPI
D D
GPIO39 VCC3 GPI
GPIO48 VCC3 GPI
GPIO21 VCC3 GPI DDR3 Channel A
GPIO36 VCC3 GPI
Sandy Bridge DDR3
PCI-E X16
GPIO37 VCC3 GPI
Desktop Processor
1333MHz/1066MHz
GPIO16 VCC3 Reserve for TPM GPI Socket H2 DDR3 Channel B Total Max 8GB
GPIO49 VCC3 Reserve for TPM GPI
GPIO0 VCC3 F_AUDIO Detect GPI
GPIO33 VCC3 ME Enable/Disable GPO
GPIO34 VCC3 pull-up GPI
GPIO13 3VSB PME GPI

FDI

DMI
GPIO24 3VSB SKTOCC GPO
GPIO57 3VSB Board ID(CRB_0.7) GPI
GPIO61 3VSB TPM_LPCPD GPI

C C

PCI-E X1
Jack 3 in 1

AUDIO CODEC: SPDIF OUT


VT1705CE
F_AUDIO
LAN:
Cougar AR8152-B
Point Chipset
3Gbps RJ-45 & USB2.0 x2
SATA 2.0
B B

USB2.0 x2Ports
VGA

F_USB 2 Headers
DVI-D

SIO-GPIO function
--------------------------------------------------------- SIO:
Pin Name Power Well Usage Default Status
--------------------------------------------------------- IT8758E
GP16 VCC3 BEEP
A GP23 Power LED A

GP22 Power LED


Pin Name Usage
Elitegroup Computer Systems
Pin Name Usage
Pin Name Usage Title

Pin Name Usage


Block Diagram
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Tuesday, December 14, 2010 Sheet 2 of 29
5 4 3 2 1
5 4 3 2 1

CPUA
CPUB

PEG_RX_P0
BALLMAP_REV=1.4 PEG_TX_P0
<20> PEG_RX_P0
PEG_RX_N0
B11 PEG_RX_0 PEG_TX_0 C13
PEG_TX_N0
PEG_TX_P0 <20> BALLMAP_REV=1.4
<20> PEG_RX_N0 B12 PEG_RX#_0 PEG_TX#_0 C14 PEG_TX_N0 <20>
<20> PEG_RX_P1 PEG_RX_P1 D12 E14 PEG_TX_P1 PEG_TX_P1 <20> FDI_FSYNC0 AC5 AC8 FDI_TX_P0 FDI_TX_P0 <17>
PEG_RX_1 PEG_TX_1 <17> FDI_FSYNC0 FDI_FSYNC_0 FDI_TX_0
<20> PEG_RX_N1 PEG_RX_N1 D11 E13 PEG_TX_N1 PEG_TX_N1 <20> FDI_LSYNC0 AC4 AC7 FDI_TX_N0 FDI_TX_N0 <17>
PEG_RX#_1 PEG_TX#_1 <17> FDI_LSYNC0 FDI_LSYNC_0 FDI_TX#_0
<20> PEG_RX_P2 PEG_RX_P2 C10 G14 PEG_TX_P2 PEG_TX_P2 <20> AC2 FDI_TX_P1 FDI_TX_P1 <17>
PEG_RX_N2 PEG_RX_2 PEG_TX_2 PEG_TX_N2 FDI_TX_1 FDI_TX_N1
<20> PEG_RX_N2 C9 PEG_RX#_2 PEG_TX#_2 G13 PEG_TX_N2 <20> FDI_TX#_1 AC3 FDI_TX_N1 <17>
<20> PEG_RX_P3 PEG_RX_P3 E10 F12 PEG_TX_P3 PEG_TX_P3 <20> AD2 FDI_TX_P2 FDI_TX_P2 <17>
D
PEG_RX_N3 PEG_RX_3 PEG_TX_3 PEG_TX_N3 FDI_FSYNC1 FDI_TX_2 FDI_TX_N2 D
<20> PEG_RX_N3 E9 PEG_RX#_3 PEG_TX#_3 F11 PEG_TX_N3 <20> <17> FDI_FSYNC1 AE5 FDI_FSYNC_1 FDI_TX#_2 AD1 FDI_TX_N2 <17>
<20> PEG_RX_P4 PEG_RX_P4 B8 J14 PEG_TX_P4 PEG_TX_P4 <20> FDI_LSYNC1 AE4 AD4 FDI_TX_P3 FDI_TX_P3 <17>
PEG_RX_4 PEG_TX_4 <17> FDI_LSYNC1 FDI_LSYNC_1 FDI_TX_3
<20> PEG_RX_N4 PEG_RX_N4 B7 J13 PEG_TX_N4 PEG_TX_N4 <20> AD3 FDI_TX_N3 FDI_TX_N3 <17>
PEG_RX_P5 PEG_RX#_4 PEG_TX#_4 PEG_TX_P5 FDI_TX#_3
<20> PEG_RX_P5 C6 PEG_RX_5 PEG_TX_5 D8 PEG_TX_P5 <20>
<20> PEG_RX_N5 PEG_RX_N5 C5 D7 PEG_TX_N5 PEG_TX_N5 <20> FDI LINK AD7 FDI_TX_P4 FDI_TX_P4 <17>
PEG_RX_P6 PEG_RX#_5 PEG_TX#_5 PEG_TX_P6 FDI_TX_4 FDI_TX_N4
<20> PEG_RX_P6 A5 PEG_RX_6 PEG_TX_6 D3 PEG_TX_P6 <20> FDI_TX#_4 AD6 FDI_TX_N4 <17>
<20> PEG_RX_N6 PEG_RX_N6 A6 C3 PEG_TX_N6 PEG_TX_N6 <20> AE7 FDI_TX_P5 FDI_TX_P5 <17>
PEG_RX_P7 PEG_RX#_6 PEG_TX#_6 PEG_TX_P7 FDI_INT FDI_TX_5 FDI_TX_N5
<20> PEG_RX_P7 E2 PEG_RX_7 PEG_TX_7 E6 PEG_TX_P7 <20> <17> FDI_INT AG3 FDI_INT FDI_TX#_5 AE8 FDI_TX_N5 <17>
<20> PEG_RX_N7 PEG_RX_N7 E1 E5 PEG_TX_N7 PEG_TX_N7 <20> AF3 FDI_TX_P6 FDI_TX_P6 <17>
PEG_RX_P8 PEG_RX#_7 PEG_TX#_7 PEG_TX_P8 FDI_COMP FDI_TX_6 FDI_TX_N6
<20> PEG_RX_P8 F4 PEG_RX_8 PEG_TX_8 F8 PEG_TX_P8 <20> V_CPUVTT 1 2 AE2 FDI_COMPIO FDI_TX#_6 AF2 FDI_TX_N6 <17>

PEG
<20> PEG_RX_N8 PEG_RX_N8 F3 F7 PEG_TX_N8 PEG_TX_N8 <20> AE1 AG2 FDI_TX_P7 FDI_TX_P7 <17>
PEG_RX_P9 PEG_RX#_8 PEG_TX#_8 PEG_TX_P9 ER47 24.9-1-04 FDI_ICOMPO FDI_TX_7 FDI_TX_N7
<20> PEG_RX_P9 G2 PEG_RX_9 PEG_TX_9 G10 PEG_TX_P9 <20> FDI_TX#_7 AG1 FDI_TX_N7 <17>
<20> PEG_RX_N9 PEG_RX_N9 G1 G9 PEG_TX_N9 PEG_TX_N9 <20>
PEG_RX_P10 PEG_RX#_9 PEG_TX#_9 PEG_TX_P10
<20> PEG_RX_P10 H3 PEG_RX_10 PEG_TX_10 G5 PEG_TX_P10 <20>
<20> PEG_RX_N10 PEG_RX_N10 H4 G6 PEG_TX_N10 PEG_TX_N10 <20>
PEG_RX_P11 PEG_RX#_10 PEG_TX#_10 PEG_TX_P11 DIMM_DQ_CPU_VREF_B
<20> PEG_RX_P11 J1 PEG_RX_11 PEG_TX_11 K7 PEG_TX_P11 <20> AB7 RSVD_04 SB_DIMM_DQVREF AH1 DIMM_DQ_CPU_VREF_B <8>
<20> PEG_RX_N11 PEG_RX_N11 J2 K8 PEG_TX_N11 PEG_TX_N11 <20> AD37 AH4 DIMM_DQ_CPU_VREF_A
PEG_RX_P12 PEG_RX#_11 PEG_TX#_11 PEG_TX_P12 RSVD_05 SA_DIMM_DQVREF DIMM_DQ_CPU_VREF_A <7>
<20> PEG_RX_P12 K3 PEG_RX_12 PEG_TX_12 J5 PEG_TX_P12 <20> AG4 RSVD_08
<20> PEG_RX_N12 PEG_RX_N12 K4 J6 PEG_TX_N12 PEG_TX_N12 <20> AJ29 AT11
PEG_RX_P13 PEG_RX#_12 PEG_TX#_12 PEG_TX_P13 RSVD_10 RSVD_15
<20> PEG_RX_P13 L1 PEG_RX_13 PEG_TX_13 M8 PEG_TX_P13 <20> AJ30 RSVD_11 RSVD_14 AP20
<20> PEG_RX_N13 PEG_RX_N13 L2 M7 PEG_TX_N13 PEG_TX_N13 <20> AJ31 AN20
PEG_RX_P14 PEG_RX#_13 PEG_TX#_13 PEG_TX_P14 RSVD_12 RSVD_13
<20> PEG_RX_P14 M3 PEG_RX_14 PEG_TX_14 L6 PEG_TX_P14 <20> AV34 RSVD_19 RSVD_17 AU10
<20> PEG_RX_N14 PEG_RX_N14 M4 L5 PEG_TX_N14 PEG_TX_N14 <20> AW34 AY10
PEG_RX_P15 PEG_RX#_14 PEG_TX#_14 PEG_TX_P15 RSVD_21 RSVD_22
<20> PEG_RX_P15 N1 PEG_RX_15 PEG_TX_15 N5 PEG_TX_P15 <20>
<20> PEG_RX_N15 PEG_RX_N15 N2 N6 PEG_TX_N15 PEG_TX_N15 <20> P35
PEG_RX#_15 PEG_TX#_15 RSVD_43
P37 RSVD_44
P39 RSVD_45
DMI_RX_P0 W5 V7 DMI_TX_P0 DMI_TX_P0 <14> R34
<14> DMI_RX_P0 DMI_RX_0 DMI_TX_0 RSVD_46
DMI_RX_N0 W4 V6 DMI_TX_N0 DMI_TX_N0 <14> R36
<14> DMI_RX_N0 DMI_RX#_0 DMI_TX#_0 RSVD_47
C DMI_RX_P1 V3 W7 DMI_TX_P1 DMI_TX_P1 <14> R38 AF4 C
<14> DMI_RX_P1 DMI_RX_1 DMI_TX_1 RSVD_48 RSVD_07
DMI_RX_N1 V4 W8 DMI_TX_N1 DMI_TX_N1 <14> R40 AB6
<14> DMI_RX_N1 DMI_RX#_1 DMI_TX#_1 RSVD_49 RSVD_03
DMI_RX_P2 DMI_TX_P2
DMI
<14> DMI_RX_P2 Y3 DMI_RX_2 DMI_TX_2 Y6 DMI_TX_P2 <14> RSVD_06 AE6
DMI_RX_N2 Y4 Y7 DMI_TX_N2 DMI_TX_N2 <14> AJ11
<14> DMI_RX_N2 DMI_RX#_2 DMI_TX#_2 RSVD_09
DMI_RX_P3 AA4 AA7 DMI_TX_P3 DMI_TX_P3 <14>
<14> DMI_RX_P3 DMI_RX_3 DMI_TX_3
DMI_RX_N3 AA5 AA8 DMI_TX_N3 DMI_TX_N3 <14>
<14> DMI_RX_N3 DMI_RX#_3 DMI_TX#_3
A38 NCTF_01 RSVD_27 D38
AU40 NCTF_02 RSVD_26 C39
P3 PE_RX_0 PE_TX_0 P8 AW38 NCTF_03 RSVD_25 C38
P4 PE_RX#_0 PE_TX#_0 P7 C2 NCTF_04 RSVD_31 J34
R2 PE_RX_1 PE_TX_1 T7 D1 NCTF_05 2 OF 10 RSVD_41 N34
R1 PE_RX#_1 PE_TX#_1 T8 These signals are
GEN

T4 PE_RX_2 PE_TX_2 R6 available for Workstation only


T3 PE_RX#_2 PE_TX#_2 R5
U2 U5 SKT_H2_CRB
PE_RX_3 PE_TX_3
U1 PE_RX#_3 PE_TX#_3 U6

ER35 24.9-1-04
V_CPUVTT 1 2 PEG_COMP B5 PEG_ICOMPO
R
Q

C4 PEG_RCOMPO
B4 PEG_COMPI 1 OF 10

SKT_H2_CRB

SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4MIL TRACE TO RQ.


CPU(104)
1 ROUTE B5 TO RQ. 1 AS A SEPERATE 12MIL TRACE. CPU_SUBASSY_STEEL
B B

11-018-115021 CPU SMD SOCKET


SOCKET.CPU..LGA 1155P SMD.BLACK.PE115527-4041-01F.
LEAD-FREE.FOXCONN

20-800-004711 CPU SOCKET STEEL


SUBASSY.STEEL.LGA 1156P.W/
BACK PLATE.PT44A11-6401.LEAD-FREE(RoHS).FOXCONN

A A

01D201-000060 PCH ES0


Elitegroup Computer Systems
Title
CPU - DMI/FDI/PEG
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 3 of 29
5 4 3 2 1
5 4 3 2 1

V_CPUVTT

2
PECI 2 1 PECI_PCH PECI_PCH <15> CPUE R79
R112 0-04-O 10K-04
BALLMAP_REV=1.4

1
CK_CPU_100M_P W2 P33 VTT_SEL
<15> CK_CPU_100M_P BCLK_0 VCCP_SELECT VTT_SEL <11>
CK_CPU_100M_N W1 P34 VCCSA_VID
<15> CK_CPU_100M_N BCLK#_0 VCCSA_VID VCCSA_VID <11>
T2 VCCSA_SEN
D
VR_SVID_CK VCCSA_SENSE VCCSA_SEN <11> D
<9> VR_SVID_CK C37 VIDSCLK
DRAM_PWROK <9> VR_SVID_DATAOUT VR_SVID_DATAOUT B37 A36 VCC_SEN
<16> DRAM_PWROK VIDSOUT VCC_SENSE VCC_SEN <9>
BC163 .1U-16VY-04-O <9> VR_SVID_ALERT_L VR_SVID_ALERT_L A37 B36 VSS_SEN
VIDALERT# VSS_SENSE VSS_SEN <9>
1 2 GND
CPU_PWROK J40 AB4 VCCIO_SEN
<16> CPU_PWROK UNCOREPWRGOOD VCCIO_SENSE VCCIO_SEN <11>
ER40 2K-1-04 1.1V DRAM_PWROK AJ19 AB3 VSSIO_SEN
SIO_PCIRST2_L CPU_RST_L SM_DRAMPWROK VSSIO_SENSE VSSIO_SEN <11>
<23> SIO_PCIRST2_L 1 2 F36 RESET#
ER39 1K-1-04 BC95 .1U-16VY-04-O L32 VCCAXG_SEN
PM_SYNC VCCAXG_SENSE VSSAXG_SEN VCCAXG_SEN <9>
GND 1 2 1 2 GND <15> PM_SYNC E38 PM_SYNC VSSAXG_SENSE M32 VSSAXG_SEN <9>
<23> PECI PECI J35
CATERR_L PECI H_TDO
E37 CATERR# TDO L39 1 STP31
<9> VR_HOT_L VR_HOT_L H34 L40 H_TDI 1 STP26
CPU_THERMTRIP_L G35 PROCHOT# TDI H_TCK
<15> CPU_THERMTRIP_L THERMTRIP# TCK M40 1 STP27
L38 H_TMS 1 STP29
H_SKTOCC_L TMS H_TRST_L
<9,23> H_SKTOCC_L AJ33 SKTOCC# TRST# J39 1 STP22
PROC_SEL K32 K38 H_PRDY_L 1 STP24
V_1P5_SM <17> PROC_SEL PROC_SEL PRDY# H_PREQ_L
PREQ# K40 1 STP23
DIMM_VREF_CPU AJ22 E39 FP_RST_L
SM_VREF DBR# XDP_H_CLK_DP FP_RST_L <13,16>
CFG H L DESCRIPTION RSVD_001 C40 1 STP4

2
D40 XDP_H_CLK_DN 1 STP3
0 reserved reserved reserved R124 CFG_0 RSVD_002
STP1 1 H36 CFG_0
1 reserved reserved reserved 100-1-04 STP8 1 CFG_1 J36 H40 1 STP15
2 NORMAL REVERSE PEGLANE REVERSAL[0], X16 CFG_2 CFG_1 BPM#_0
STP16 1 J37 CFG_2 BPM#_1 H38 1 STP14

1
3 reserved reserved reserved DIMM_VREF_CPU STP9 1 CFG_3 K36 G38 1 STP13
4 reserved reserved reserved CFG_4 CFG_3 BPM#_2
STP20 1 L36 CFG_4 BPM#_3 G40 1 STP12
5 * * PEOFGSEL[0] STP25 1 CFG_5 N35 G39 1 STP11
CFG_5 BPM#_4

1
6 * * PEOFGSEL[1] STP19 1 CFG_6 L37 F38 1 STP5
7 reserved reserved reserved R125 C47 CFG_7 CFG_6 BPM#_5
STP17 1 M36 CFG_7 BPM#_6 E40 1 STP6
8 reserved reserved reserved 100-1-04 .1U-16VY-04 STP21 1 CFG_8 J38 F40 1 STP10
CFG_8 BPM#_7

2
C 9 reserved reserved reserved STP18 1 CFG_9 L35 C
CFG_9

1
10 reserved reserved reserved STP28 1 CFG_10 M38 B39
11 reserved reserved reserved CFG_11 CFG_10 RSVD_024
STP30 1 N36 CFG_11 RSVD_030 J33
12 reserved reserved reserved GND GND 1 CFG_12 N38 L34
STP33 CFG_12 RSVD_037 V_CPUVTT
13 reserved reserved reserved STP32 1 CFG_13 N39 L33
14 reserved reserved reserved CFG_14 CFG_13 RSVD_036
STP34 1 N37 CFG_14 RSVD_033 K34
15 reserved reserved reserved STP35 1 CFG_15 N40 H_TRST_L RN2 1 2 51-8P4R-06-O
CFG_16 CFG_15 H_TMS
STP7 1 G37 CFG_16 RSVD_040 N33 3 4
CFG_[0..17] HAVE INTERNAL PULL-UPS STP2 1 CFG_17 G36 M34 H_TDI 5 6
CFG_17 RSVD_039 H_TCK 7 8
AT14 RSVD_016 RSVD_018 AV1
change test point for internal PU Jack05/25 RSVD_020 AW2
CFG[5:6]: AY3 GND
11=DEFAULT X16, RSVD_023
PCIE CONFIG SEL0 SEL1 RSVD_038 L9
01=2X8, H7 RSVD_028 RSVD_032 J9 EDS P68/132 has internal PU Jack05/25
* 1 X 16 1 1 10=RESERVED, H8 K9
2X8 0 1 RSVD_029 RSVD_034
00=X8,X4,X4
RSVD_035 L31

J31 V_CPUVTT
RSVD_050
RSVD_053 K31

5 OF 10 RSVD_051 AD34
CATERR_L R93
RSVD_052 AD35 1 2 1K-04-O CATERR_L,
CPU_THERMTRIP_L
VR_HOT_L R157 1 2 51-04 Pull Up Resistor

Power Down Sequencing Circuit SKT_H2_CRB


2010 MoW05 Remove

CPU_PWROK
B B
3VSB BC199 .1U-16VY-04-O
TO VRD FOR S0->S5 1 2
2

VR_EN VR_EN <9>


R117 GND
10K-04
C

2
1

1 2 B QN6 C46 V_1P8_SFR


R123 1K-04 2N3904-S 2.2U-6VY-06-O
C

R132 10K-04 PROC_SEL R141 2 1 2.2K-04


E

SLP3_L 1 2 B QN5
<11,16,22,23> SLP3_L
2N3904-S BC198 2 1 .1U-16VY-04
GND GND FROM VRD
E

GND

DMI/FDI termination voltage:


GND DC coupled: TX/RX to VCC ISF sampled high
DC coupled: TX/RX TO VSS IF sampled low
AC COUPLED: TX set to VCC/2, RX set to VSS regardless of this strap

CPU_PWROK

20100927
2

A Del By Andy lu R212 A


1K-04
1

GND
Elitegroup Computer Systems
Title
CPU - MISC
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 4 of 29
5 4 3 2 1
5 4 3 2 1

Pay Attention to CPUD


CPUC This Part!

M_DATA_A0
BALLMAP_REV=1.4 M_MA_A0 M_DATA_B0
BALLMAP_REV=1.4 M_MA_B0
AJ3 SA_DQ_0 SA_MA_0 AV27 AG7 SB_DQ_0 SB_MA_0 AK24
M_DATA_A1 AJ4 AY24 M_MA_A1 M_DATA_B1 AG8 AM20 M_MA_B1
M_DATA_A2 SA_DQ_1 SA_MA_1 M_MA_A2 M_DATA_B2 SB_DQ_1 SB_MA_1 M_MA_B2
AL3 SA_DQ_2 SA_MA_2 AW24 AJ9 SB_DQ_2 SB_MA_2 AM19
M_DATA_A3 AL4 AW23 M_MA_A3 M_DATA_B3 AJ8 AK18 M_MA_B3
M_DATA_A[0..63] M_DATA_A4 SA_DQ_3 SA_MA_3 M_MA_A4 M_DATA_B4 SB_DQ_3 SB_MA_3 M_MA_B4
D <7> M_DATA_A[0..63] AJ2 SA_DQ_4 SA_MA_4 AV23 AG5 SB_DQ_4 SB_MA_4 AP19 D
M_DATA_A5 AJ1 AT24 M_MA_A5 M_DATA_B5 AG6 AP18 M_MA_B5
M_DQS_A_P[0..7] M_DATA_A6 SA_DQ_5 SA_MA_5 M_MA_A6 M_DATA_B6 SB_DQ_5 SB_MA_5 M_MA_B6
<7> M_DQS_A_P[0..7] AL2 SA_DQ_6 SA_MA_6 AT23 AJ6 SB_DQ_6 SB_MA_6 AM18
M_DATA_A7 AL1 AU22 M_MA_A7 M_DATA_B7 AJ7 AL18 M_MA_B7
M_DQS_A_N[0..7] M_DATA_A8 SA_DQ_7 SA_MA_7 M_MA_A8 M_DATA_B13 SB_DQ_7 SB_MA_7 M_MA_B8
<7> M_DQS_A_N[0..7] AN1 SA_DQ_8 SA_MA_8 AV22 AL7 SB_DQ_8 SB_MA_8 AN18
M_DATA_A9 AN4 AT22 M_MA_A9 M_DATA_B9 AM7 AY17 M_MA_B9
M_MA_A[0..15] M_DATA_A10 SA_DQ_9 SA_MA_9 M_MA_A10 M_DATA_B11 SB_DQ_9 SB_MA_9 M_MA_B10
<7> M_MA_A[0..15] AR3 SA_DQ_10 SA_MA_10 AV28 AM10 SB_DQ_10 SB_MA_10 AN23
M_DATA_A11 AR4 AU21 M_MA_A11 M_DATA_B15 AL10 AU17 M_MA_B11
M_BS_A[0..2] M_DATA_A12 SA_DQ_11 SA_MA_11 M_MA_A12 M_DATA_B12 SB_DQ_11 SB_MA_11 M_MA_B12
<7> M_BS_A[0..2] AN2 SA_DQ_12 SA_MA_12 AT21 AL6 SB_DQ_12 SB_MA_12 AT18
M_DATA_A13 AN3 AW32 M_MA_A13 M_DATA_B8 AM6 AR26 M_MA_B13
M_CS_A_L[0..1] M_DATA_A14 SA_DQ_13 SA_MA_13 M_MA_A14 M_DATA_B14 SB_DQ_13 SB_MA_13 M_MA_B14
<7> M_CS_A_L[0..1] AR2 SA_DQ_14 SA_MA_14 AU20 AL9 SB_DQ_14 SB_MA_14 AY16
M_DATA_A15 AR1 AT20 M_MA_A15 M_DATA_B10 AM9 AV16 M_MA_B15
M_CKE_A[0..1] M_DATA_A16 SA_DQ_15 SA_MA_15 M_DATA_B16 SB_DQ_15 SB_MA_15
<7> M_CKE_A[0..1] AV2 SA_DQ_16 AP7 SB_DQ_16
M_DATA_A17 AW3 M_DATA_B17 AR7
M_ODT_A[0..1] M_DATA_A18 SA_DQ_17 M_WE_A_L M_DATA_B18 SB_DQ_17 M_WE_B_L
<7> M_ODT_A[0..1] AV5 SA_DQ_18 SA_WE# AW29 AP10 SB_DQ_18 SA_CK[2] AR25
M_DATA_A19 AW5 AV30 M_CAS_A_L M_DATA_B19 AR10 AK25 M_CAS_B_L
M_CLK_A_P[0..1] M_DATA_A20 SA_DQ_19 SA_CAS# M_RAS_A_L M_DATA_B20 SB_DQ_19 SA_CK[1] M_RAS_B_L
<7> M_CLK_A_P[0..1] AU2 SA_DQ_20 SA_RAS# AU28 AP6 SB_DQ_20 SA_ODT[2] AP24
M_DATA_A21 AU3 M_DATA_B21 AR6
M_CLK_A_N[0..1] M_DATA_A22 SA_DQ_21 M_DATA_B22 SB_DQ_21
<7> M_CLK_A_N[0..1] AU5 SA_DQ_22 AP9 SB_DQ_22
M_DATA_A23 AY5 AY29 M_BS_A0 M_DATA_B23 AR9 AP23 M_BS_B0
M_DATA_A24 SA_DQ_23 SA_BS_0 M_BS_A1 M_DATA_B24 SB_DQ_23 SB_BS_0 M_BS_B1
AY7 SA_DQ_24 SA_BS_1 AW28 AM12 SB_DQ_24 SB_BS_1 AM24
M_DATA_A25 AU7 AV20 M_BS_A2 M_DATA_B25 AM13 AW17 M_BS_B2
M_DATA_A26 SA_DQ_25 SA_BS_2 M_DATA_B26 SB_DQ_25 SB_BS_2
AV9 SA_DQ_26 AR13 SB_DQ_26
M_WE_A_L M_DATA_A27 AU9 M_DATA_B27 AP13
<7> M_WE_A_L M_CAS_A_L M_DATA_A28 SA_DQ_27 M_DATA_B28 SB_DQ_27
<7> M_CAS_A_L AV7 SA_DQ_28 SA_CS#_0 AU29 AL12 SB_DQ_28 SB_CS#_0 AN25
M_RAS_A_L M_DATA_A29 AW7 AV32 M_DATA_B29 AL13 AN26
<7> M_RAS_A_L M_DATA_A30 SA_DQ_29 SA_CS#_1 M_CS_A_L0 M_DATA_B30 SB_DQ_29 SB_CS#_1 M_CS_B_L0
AW9 SA_DQ_30 SA_CS#_2 AW30 AR12 SB_DQ_30 SB_CS#_2 AL25
M_DATA_A31 AY9 AU33 M_CS_A_L1 M_DATA_B31 AP12 AT26 M_CS_B_L1
M_DATA_A32 SA_DQ_31 SA_CS#_3 M_DATA_B32 SB_DQ_31 SB_CS#_3
DDR3 CH.A M_DATA_A33
AU35 SA_DQ_32 M_DATA_B33
AR28 SB_DQ_32
AW37 SA_DQ_33 AR29 SB_DQ_33
C M_DATA_A34 AU39 M_DATA_B34 AL28 C
DDR3_DRAMRST_L M_DATA_A35 SA_DQ_34 M_DATA_B35 SB_DQ_34
<7,8> DDR3_DRAMRST_L AU36 SA_DQ_35 SA_CKE_0 AV19 AL29 SB_DQ_35 SB_CKE_0 AU16
M_DATA_A36 AW35 AT19 M_DATA_B36 AP28 AY15
M_DATA_A37 SA_DQ_36 SA_CKE_1 M_CKE_A0 M_DATA_B37 SB_DQ_36 SB_CKE_1 M_CKE_B0
AY36 SA_DQ_37 SA_CKE_2 AU18 AP29 SB_DQ_37 SB_CKE_2 AW15
M_DATA_A38 AU38 AV18 M_CKE_A1 M_DATA_B38 AM28 AV15 M_CKE_B1
M_DATA_A39 SA_DQ_38 SA_CKE_3 M_DATA_B39 SB_DQ_38 SB_CKE_3
AU37 SA_DQ_39 AM29 SB_DQ_39
M_DATA_A40 AR40 M_DATA_B40 AP32
M_DATA_B[0..63] M_DATA_A41 SA_DQ_40 M_DATA_B41 SB_DQ_40
<8> M_DATA_B[0..63] AR37 SA_DQ_41 AP31 SB_DQ_41
M_DATA_A42 AN38 AV31 M_DATA_B42 AP35 AL26
M_DQS_B_P[0..7] M_DATA_A43 SA_DQ_42 SA_ODT_0 M_DATA_B43 SB_DQ_42 SB_ODT_0
<8> M_DQS_B_P[0..7] AN37 SA_DQ_43 SA_ODT_1 AU32 AP34 SB_DQ_43 SB_ODT_1 AP26
M_DATA_A44 AR39 AU30 M_ODT_A0 M_DATA_B44 AR32 AM26 M_ODT_B0
M_DQS_B_N[0..7] M_DATA_A45 SA_DQ_44 SA_ODT_2 M_ODT_A1 M_DATA_B45 SB_DQ_44 SB_ODT_2 M_ODT_B1
<8> M_DQS_B_N[0..7] AR38 SA_DQ_45 SA_ODT_3 AW33 AR31 SB_DQ_45 SB_ODT_3 AK26
M_DATA_A46 AN39 M_DATA_B46 AR35
M_MA_B[0..15] SA_DQ_46 SB_DQ_46
<8> M_MA_B[0..15]
M_DATA_A47 AN40 SA_DQ_47 Del DIMM0 for always populate M_DATA_B47 AR34 SB_DQ_47 Del DIMM0 for always populate
M_DATA_A48 AL40 M_DATA_B48 AM32
M_BS_B[0..2] M_DATA_A49 AL37
SA_DQ_48
AY25
DIMM1 first Jack 05/13 M_DATA_B52 AM31
SB_DQ_48
AL21
DIMM1 first Jack 05/13
<8> M_BS_B[0..2] M_DATA_A50 SA_DQ_49 SA_CK_0 M_DATA_B55 SB_DQ_49 SB_CK_0
AJ38 SA_DQ_50 SA_CK#_0 AW25 AL35 SB_DQ_50 SB_CK#_0 AL22
M_CS_B_L[0..1] M_DATA_A51 AJ37 AU24 M_DATA_B51 AL32 AL20
<8> M_CS_B_L[0..1] M_DATA_A52 SA_DQ_51 SA_CK_1 M_DATA_B54 SB_DQ_51 SB_CK_1
AL39 SA_DQ_52 SA_CK#_1 AU25 AM34 SB_DQ_52 SB_CK#_1 AK20
M_CKE_B[0..1] M_DATA_A53 AL38 AW27 M_CLK_A_P0 M_DATA_B49 AL31 AL23 M_CLK_B_P0
<8> M_CKE_B[0..1] M_DATA_A54 SA_DQ_53 SA_CK_2 M_CLK_A_N0 M_DATA_B53 SB_DQ_53 SB_CK_2 M_CLK_B_N0
AJ39 SA_DQ_54 SA_CK#_2 AY27 AM35 SB_DQ_54 SB_CK#_2 AM22
M_ODT_B[0..1] M_DATA_A55 AJ40 AV26 M_CLK_A_P1 M_DATA_B50 AL34 AP21 M_CLK_B_P1
<8> M_ODT_B[0..1] M_DATA_A56 SA_DQ_55 SA_CK_3 M_CLK_A_N1 M_DATA_B56 SB_DQ_55 SB_CK_3 M_CLK_B_N1
AG40 SA_DQ_56 SA_CK#_3 AW26 AH35 SB_DQ_56 SB_CK#_3 AN21
M_CLK_B_P[0..1] M_DATA_A57 AG37 M_DATA_B57 AH34
<8> M_CLK_B_P[0..1] M_DATA_A58 SA_DQ_57 M_DATA_B58 SB_DQ_57
AE38 SA_DQ_58 AE34 SB_DQ_58
M_CLK_B_N[0..1] M_DATA_A59 AE37 M_DATA_B59 AE35
<8> M_CLK_B_N[0..1] M_DATA_A60 SA_DQ_59 DDR3_DRAMRST_L M_DATA_B60 SB_DQ_59
AG39 SA_DQ_60 SM_DRAMRST# AW18 AJ35 SB_DQ_60
M_DATA_A61 AG38 M_DATA_B61 AJ34
M_DATA_A62 SA_DQ_61 M_DATA_B62 SB_DQ_61
AE39 SA_DQ_62 AF33 SB_DQ_62
M_DATA_A63 AE40 M_DATA_B63 AF35
B
M_WE_B_L SA_DQ_63 SB_DQ_63 B
<8> M_WE_B_L SA_DQS_8 AV13 SB_DQS_8 AN16
M_CAS_B_L AV12 AN15
<8> M_CAS_B_L M_RAS_B_L M_DQS_A_P0 SA_DQS#_8 M_DQS_B_P0 SB_DQS#_8
<8> M_RAS_B_L AK3 SA_DQS_0 AH7 SB_DQS_0
M_DQS_A_P1 AP3 M_DQS_B_P1 AM8
M_DQS_A_P2 SA_DQS_1 M_DQS_B_P2 SB_DQS_1
AW4 SA_DQS_2 AR8 SB_DQS_2
DDR3 CH.B M_DQS_A_P3 AV8 M_DQS_B_P3 AN13
M_DQS_A_P4 SA_DQS_3 M_DQS_B_P4 SB_DQS_3
AV37 SA_DQS_4 SA_ECC_CB_0 AU12 AN29 SB_DQS_4 SB_ECC_CB_0 AL16
M_DQS_A_P5 AP38 AU14 M_DQS_B_P5 AP33 AM16
M_DQS_A_P6 SA_DQS_5 SA_ECC_CB_1 M_DQS_B_P6 SB_DQS_5 SB_ECC_CB_1
AK38 SA_DQS_6 SA_ECC_CB_2 AW13 AL33 SB_DQS_6 SB_ECC_CB_2 AP16
M_DQS_A_P7 AF38 AY13 M_DQS_B_P7 AG35 AR16
SA_DQS_7 SA_ECC_CB_3 Desktop dosen't support SB_DQS_7 SB_ECC_CB_3 Desktop dosen't support
SA_ECC_CB_4 AU13 SB_ECC_CB_4 AL15
AU11 ECC AM15 ECC
M_DQS_A_N0 SA_ECC_CB_5 M_DQS_B_N0 SB_ECC_CB_5
AK2 SA_DQS#_0 SA_ECC_CB_6 AY12 AH6 SB_DQS#_0 SB_ECC_CB_6 AR15
M_DQS_A_N1 AP2 AW12 M_DQS_B_N1 AL8 AP15
M_DQS_A_N2 SA_DQS#_1 SA_ECC_CB_7 M_DQS_B_N2 SB_DQS#_1 SB_ECC_CB_7
AV4 SA_DQS#_2 AP8 SB_DQS#_2
M_DQS_A_N3 AW8 M_DQS_B_N3 AN12
M_DQS_A_N4 SA_DQS#_3 SB_DQS#_3
M_DQS_A_N5
AV36 SA_DQS#_4 DDR_0 M_DQS_B_N4
M_DQS_B_N5
AN28 SB_DQS#_4 DDR_1
AP39 SA_DQS#_5 AR33 SB_DQS#_5
M_DQS_A_N6 AK39 M_DQS_B_N6 AM33
M_DQS_A_N7 SA_DQS#_6 M_DQS_B_N7 SB_DQS#_6
AF39 SA_DQS#_7 3 OF 10 AG34 SB_DQS#_7 4 OF 10

SKT_H2_CRB SKT_H2_CRB
DDR3 CH.A DDR3 CH.B

A A

Elitegroup Computer Systems


Title
CPU - DDR3
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 5 of 29
5 4 3 2 1
5 4 3 2 1

1.05V/1.00V 1.5V
MAX 112A MAX 8.5A MAX 4.5A MAX 35A
VCORE CPUF VCORE V_CPUVTT CPUG V_1P5_SM VAXG CPUH CPUI CPUJ
BALLMAP_REV=1.4 BALLMAP_REV=1.4
BALLMAP_REV=1.4 BALLMAP_REV=1.4 VBALLMAP_REV=1.4 A17 VSS_001 VSS_091 AM27 AV11 VSS_181 VSS_271 G8
A12 VCC_001 VCC_082 F32 M13 VCCIO_34 VDDQ_01 AJ13 A23 VSS_002 VSS_092 AM3 AV14 VSS_182 VSS_272 H1
A13 VCC_002 VCC_083 F33 VDDQ_02 AJ14 AB33 VCCAXG_01 A26 VSS_003 VSS_093 AM30 AV17 VSS_183 VSS_273 H17
A14 VCC_003 VCC_084 F34 A11 VCCIO_01 VDDQ_04 AJ23 AB34 VCCAXG_02 A29 VSS_004 VSS_094 AM36 AV3 VSS_184 VSS_274 H2
A15 VCC_004 VCC_085 G15 A7 VCCIO_02 VDDQ_05 AJ24 AB35 VCCAXG_03 A35 VSS_005 VSS_095 AM37 AV35 VSS_185 VSS_275 H20
A16 VCC_005 VCC_086 G16 AA3 VCCIO_03 VDDQ_06 AR20 AB36 VCCAXG_04 AA33 VSS_006 VSS_096 AM38 AV38 VSS_186 VSS_276 H23
A18 VCC_006 VCC_087 G18 AB8 VCCIO_04 VDDQ_07 AR21 AB37 VCCAXG_05 AA34 VSS_007 VSS_097 AM39 AV6 VSS_187 VSS_277 H26
A24 VCC_007 VCC_088 G19 AF8 VCCIO_05 VDDQ_08 AR22 AB38 VCCAXG_06 AA35 VSS_008 VSS_098 AM4 AW10 VSS_188 VSS_278 H29
D A25 VCC_008 VCC_089 G21 AG33 VCCIO_06 VDDQ_09 AR23 AB39 VCCAXG_07 AA36 VSS_009 VSS_099 AM40 AW11 VSS_189 VSS_279 H33 D
A27 VCC_009 VCC_090 G22 AJ16 VCCIO_07 VDDQ_10 AR24 AB40 VCCAXG_08 AA37 VSS_010 VSS_100 AM5 AW14 VSS_190 VSS_280 H35
A28 VCC_010 VCC_091 G24 AJ17 VCCIO_08 VDDQ_11 AU19 AC33 VCCAXG_09 AA38 VSS_011 VSS_101 AN10 AW16 VSS_191 VSS_281 H37
B15 VCC_011 VCC_092 G25 AJ26 VCCIO_09 VDDQ_12 AU23 AC34 VCCAXG_10 AA6 VSS_012 VSS_102 AN11 AW36 VSS_192 VSS_282 H39
B16 VCC_012 VCC_093 G27 AJ28 VCCIO_10 VDDQ_13 AU27 AC35 VCCAXG_11 AB5 VSS_013 VSS_103 AN14 AW6 VSS_193 VSS_283 H5
B18 VCC_013 VCC_094 G28 AJ32 VCCIO_11 VDDQ_14 AU31 AC36 VCCAXG_12 AC1 VSS_014 VSS_104 AN17 AY11 VSS_194 VSS_284 H6
B24 VCC_014 VCC_095 G30 AK15 VCCIO_12 VDDQ_15 AV21 AC37 VCCAXG_13 AC6 VSS_015 VSS_105 AN19 AY14 VSS_195 VSS_285 H9
B25 VCC_015 VCC_096 G31 AK17 VCCIO_13 VDDQ_16 AV24 AC38 VCCAXG_14 AD33 VSS_016 VSS_106 AN22 AY18 VSS_196 VSS_286 J11
B27 VCC_016 VCC_097 G32 AK19 VCCIO_14 VDDQ_17 AV25 AC39 VCCAXG_15 AD36 VSS_017 VSS_107 AN24 AY35 VSS_197 VSS_287 J17
B28 VCC_017 VCC_098 G33 AK21 VCCIO_15 VDDQ_18 AV29 AC40 VCCAXG_16 AD38 VSS_018 VSS_108 AN27 AY4 VSS_198 VSS_288 J20
B30 VCC_018 VCC_099 H13 AK23 VCCIO_16 VDDQ_19 AV33 T33 VCCAXG_17 AD39 VSS_019 VSS_109 AN30 AY6 VSS_199 VSS_289 J23
B31 VCC_019 VCC_100 H14 AK27 VCCIO_17 VDDQ_20 AW31 T34 VCCAXG_18 AD40 VSS_020 VSS_110 AN31 AY8 VSS_200 VSS_290 J26
B33 VCC_020 VCC_101 H15 AK29 VCCIO_18 VDDQ_21 AY23 T35 VCCAXG_19 AD5 VSS_021 VSS_111 AN32 B10 VSS_201 VSS_291 J29
B34 VCC_021 VCC_102 H16 AK30 VCCIO_19 VDDQ_22 AY26 T36 VCCAXG_20 AD8 VSS_022 VSS_112 AN33 B13 VSS_202 VSS_292 J32
C15 VCC_022 VCC_103 H18 B9 VCCIO_20 VDDQ_23 AY28 T37 VCCAXG_21 AE3 VSS_023 VSS_113 AN34 B14 VSS_203 VSS_293 K1
C16 VCC_023 VCC_104 H19 D10 VCCIO_21 T38 VCCAXG_22 AE33 VSS_024 VSS_114 AN35 B17 VSS_204 VSS_294 K12
C18 VCC_024 VCC_105 H21 D6 VCCIO_22 T39 VCCAXG_23 AE36 VSS_025 VSS_115 AN36 B23 VSS_205 VSS_295 K13
C19 VCC_025 VCC_106 H22 E3 VCCIO_23 VDDQ_03 AJ20 T40 VCCAXG_24 AF1 VSS_026 VSS_116 AN5 B26 VSS_206 VSS_296 K14
C21 VCC_026 VCC_107 H24 E4 VCCIO_24 U33 VCCAXG_25 AF34 VSS_027 VSS_117 AN6 B29 VSS_207 VSS_297 K17
C22 VCC_027 VCC_108 H25 G3 VCCIO_25 U34 VCCAXG_26 AF36 VSS_028 VSS_118 AN7 B32 VSS_208 VSS_298 K2
C24 VCC_028 VCC_109 H27 G4 VCCIO_26 U35 VCCAXG_27 AF37 VSS_029 VSS_119 AN8 B35 VSS_209 VSS_299 K20
C25 VCC_029 VCC_110 H28 J3 VCCIO_27 U36 VCCAXG_28 AF40 VSS_030 VSS_120 AN9 B38 VSS_210 VSS_300 K23
C27 VCC_030 VCC_111 H30 J4 VCCIO_28 U37 VCCAXG_29 AF5 VSS_031 VSS_121 AP1 B6 VSS_211 VSS_301 K26
C28 VCC_031 VCC_112 H31 J7 VCCIO_29 U38 VCCAXG_30 AF6 VSS_032 VSS_122 AP11 C11 VSS_212 VSS_302 K29
C30 VCC_032 VCC_113 H32 J8 VCCIO_30 U39 VCCAXG_31 AF7 VSS_033 VSS_123 AP14 C12 VSS_213 VSS_303 K33
C31 VCC_033 VCC_114 J12 L3 VCCIO_31 U40 VCCAXG_32 AG36 VSS_034 VSS_124 AP17 C17 VSS_214 VSS_304 K35
C33 VCC_034 VCC_115 J15 L4 VCCIO_32 W33 VCCAXG_33 AH2 VSS_035 VSS_125 AP22 C20 VSS_215 VSS_305 K37
C34 VCC_035 VCC_116 J16 L7 VCCIO_33 W34 VCCAXG_34 AH3 VSS_036 VSS_126 AP25 C23 VSS_216 VSS_306 K39
C36 VCC_036 VCC_117 J18 N3 VCCIO_35 W35 VCCAXG_35 AH33 VSS_037 VSS_127 AP27 C26 VSS_217 VSS_307 K5
D13 VCC_037 VCC_118 J19 N4 VCCIO_36 W36 VCCAXG_36 AH36 VSS_038 VSS_128 AP30 C29 VSS_218 VSS_308 K6
D14 VCC_038 VCC_119 J21 N7 VCCIO_37 W37 VCCAXG_37 AH37 VSS_039 VSS_129 AP36 C32 VSS_219 VSS_309 L10
D15 VCC_039 VCC_120 J22 R3 VCCIO_38 W38 VCCAXG_38 AH38 VSS_040 VSS_130 AP37 C35 VSS_220 VSS_310 L17
D16 VCC_040 VCC_121 J24 R4 VCCIO_39 Y33 VCCAXG_39 AH39 VSS_041 VSS_131 AP4 C7 VSS_221 VSS_311 L20
D18 VCC_041 VCC_122 J25 R7 VCCIO_40 Y34 VCCAXG_40 AH40 VSS_042 VSS_132 AP40 C8 VSS_222 VSS_312 L23
C
D19 VCC_042 VCC_123 J27 0.925V/0.85V U3 VCCIO_41 Y35 VCCAXG_41 AH5 VSS_043 VSS_133 AP5 D17 VSS_223 VSS_313 L26 C
D21 VCC_043 VCC_124 J28 U4 VCCIO_42 Y36 VCCAXG_42 AH8 VSS_044 VSS_134 AR11 D2 VSS_224 VSS_314 L29
D22 J30 MAX 8.8A U7 Y37 AJ12 AR14 D20 L8
VCC_044 VCC_125 VCCIO_43 VCCAXG_43 VSS_045 VSS_135 VSS_225 VSS_315
D24 VCC_045 VCC_126 K15
V_SA
V8 VCCIO_44 Y38 VCCAXG_44 8 OF 10 AJ15 VSS_046 VSS_136 AR17 D23 VSS_226 VSS_316 M1
D25 VCC_046 VCC_127 K16 W3 VCCIO_45 AJ18 VSS_047 VSS_137 AR18 D26 VSS_227 VSS_317 M17
D27 VCC_047 VCC_128 K18 AJ21 VSS_048 VSS_138 AR19 D29 VSS_228 VSS_318 M2
D28 K19 H10 SKT_H2_CRB AJ25 AR27 D32 M20
VCC_048 VCC_129 VCCSA_01 VSS_049 VSS_139 VSS_229 VSS_319
D30 VCC_049 VCC_130 K21 H11 VCCSA_02 AJ27 VSS_050 VSS_140 AR30 D37 VSS_230 VSS_320 M23
D31 VCC_050 VCC_131 K22 H12 VCCSA_03 AJ36 VSS_051 VSS_141 AR36 D39 VSS_231 VSS_321 M26
D33 VCC_051 VCC_132 K24 J10 VCCSA_04 AJ5 VSS_052 VSS_142 AR5 D4 VSS_232 VSS_322 M29
D34 VCC_052 VCC_133 K25 K10 VCCSA_05 AK1 VSS_053 VSS_143 AT1 D5 VSS_233 VSS_323 M33
D35 VCC_053 VCC_134 K27 K11 VCCSA_06 AK10 VSS_054 VSS_144 AT10 D9 VSS_234 VSS_324 M35
D36 VCC_054 VCC_135 K28 1.8V L11 VCCSA_07 AK13 VSS_055 VSS_145 AT12 E11 VSS_235 VSS_325 M37
E15 VCC_055 VCC_136 K30 L12 VCCSA_08 AK14 VSS_056 VSS_146 AT13 E12 VSS_236 VSS_326 M39
E16 L13 MAX 1A M10 AK16 AT15 E17 M5
VCC_056 VCC_137 VCCSA_09 VSS_057 VSS_147 VSS_237 VSS_327
E18 VCC_057 VCC_138 L14 M11 VCCSA_10 AK22 VSS_058 VSS_148 AT16 E20 VSS_238 VSS_328 M6
E19 L15 V_1P8_SFR M12 AK28 AT17 E23 M9
VCC_058 VCC_139 VCCSA_11 VSS_059 VSS_149 VSS_239 VSS_329
E21 VCC_059 VCC_140 L16 POWER AK31 VSS_060 VSS_150 AT2 E26 VSS_240 VSS_330 N8
E22 VCC_060 VCC_141 L18 AK11 VCCPLL_01 AK32 VSS_061 VSS_151 AT25 E29 VSS_241 VSS_331 P1
E24 VCC_061 VCC_142 L19 AK12 VCCPLL_02 7 OF 10 AK33 VSS_062 VSS_152 AT27 E32 VSS_242 VSS_332 P2
E25 VCC_062 VCC_143 L21 AK34 VSS_063 VSS_153 AT28 E36 VSS_243 VSS_333 P36
E27 VCC_063 VCC_144 L22 AK35 VSS_064 VSS_154 AT29 E7 VSS_244 VSS_334 P38
E28 L24 SKT_H2_CRB AK36 AT3 E8 P40
VCC_064 VCC_145 VSS_065 VSS_155 VSS_245 VSS_335
E30 VCC_065 VCC_146 L25 AK37 VSS_066 VSS_156 AT30 F1 VSS_246 VSS_336 P5
E31 VCC_066 VCC_147 L27 AK4 VSS_067 VSS_157 AT31 F10 VSS_247 VSS_337 P6
E33 VCC_067 VCC_148 L28 AK40 VSS_068 VSS_158 AT32 F13 VSS_248 VSS_338 R33
E34 VCC_068 VCC_149 L30 AK5 VSS_069 VSS_159 AT33 F14 VSS_249 VSS_339 R35
E35 VCC_069 VCC_150 M14 AK6 VSS_070 VSS_160 AT34 F17 VSS_250 VSS_340 R37
F15 VCC_070 VCC_151 M15 AK7 VSS_071 VSS_161 AT35 F2 VSS_251 VSS_341 R39
F16 VCC_071 VCC_152 M16 AK8 VSS_072 VSS_162 AT36 F20 VSS_252 VSS_342 R8
F18 VCC_072 VCC_153 M18 AK9 VSS_073 VSS_163 AT37 F23 VSS_253 VSS_343 T1
F19 VCC_073 VCC_154 M19 AL11 VSS_074 VSS_164 AT38 F26 VSS_254 VSS_344 T5
F21 VCC_074 VCC_155 M21 AL14 VSS_075 VSS_165 AT39 F29 VSS_255 VSS_345 T6
F22 VCC_075 VCC_156 M22 AL17 VSS_076 VSS_166 AT4 F35 VSS_256 VSS_346 U8
F24 VCC_076 VCC_157 M24 AL19 VSS_077 VSS_167 AT40 F37 VSS_257 VSS_347 V1
B F25 VCC_077 VCC_158 M25 AL24 VSS_078 VSS_168 AT5 F39 VSS_258 VSS_348 V2 B
F27 VCC_078 VCC_159 M27 AL27 VSS_079 VSS_169 AT6 F5 VSS_259 VSS_349 V33
F28 VCC_079 VCC_160 M28 AL30 VSS_080 VSS_170 AT7 F6 VSS_260 VSS_350 V34
F30 M30 V_SA V_1P5_SM V_1P8_SFR AL36 AT8 F9 V35
VCC_080 VCC_161 VSS_081 VSS_171 VSS_261 VSS_351
F31 VCC_081 6 OF 10 AL5 VSS_082 VSS_172 AT9 G11 VSS_262 VSS_352 V36
AM1 VSS_083 VSS_173 AU1 G12 VSS_263 VSS_353 V37
2

AM11 VSS_084 VSS_174 AU15 G17 VSS_264 VSS_354 V38


2

1
SKT_H2_CRB MC25 MC47 MC49 MC50 BC138 MC46 AM14 AU26 G20 V39
10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08 .1U-10VX-04 10U-6VX-08 VSS_085 VSS_175 VSS_265 VSS_355
AM17 VSS_086 VSS_176 AU34 G23 VSS_266 VSS_356 V40
1

AM2 VSS_087 VSS_177 AU4 G26 VSS_267 VSS_357 V5


1

2
AM21 VSS_088 VSS_178 AU6 G29 VSS_268 VSS_358 W6
AM23 VSS_089 VSS_179 AU8 G34 VSS_269 VSS_359 Y5
GND AM25 AV10 G7 Y8
GND GND VSS_090 VSS_180 VSS_270 VSS_360
A4 VSS_NCTF_01 AY37 VSS_NCTF_03
AV39 VSS_NCTF_02 9 OF 10 B3 VSS_NCTF_04 10 of 10
VAXG V_CPUVTT
MC34/MC107 move to Vaxg path as vendor 08/04 SKT_H2_CRB SKT_H2_CRB
GND GND GND GND
P
2

MC28
2

MC35
2

MC37
2

MC43
2

SC4
2

SC7
2

MC44
2

MC38
2

MC51
2

MC48
10U-6VX-08 10U-6VX-08-O 10U-6VX-08 10U-6VX-08 10U-6VX-08-O 10U-6VX-08-O SC5 10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08
100U-2V-9M-O
1

1
N

VCORE V_CPUVTT V_CPUVTT


GND 20101021 GND
Add By Andy lu
2

1
MC27 MC40 MC42 MC41 MC33 MC34 MC26 SC8 MC52 SC9 BC90 BC97 BC102 BC86 BC89
10U-6VX-08 10U-6VX-08-O 10U-6VX-08-O 10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08 10U-6VX-08-X-O 10U-6VX-08-O 10U-6VX-08-O .1U-16VY-04 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04
1

2
A VCORE V_CPUVTT V_CPUVTT A
GND GND GND
P

P
2

MC29
2

MC30
2

MC39
2

SC2
2

SC1
2

MC53
2

MC45
1

1
BC88 BC110 BC112 BC85 BC87
10U-6VX-08 10U-6VX-08 10U-10VY-08-O 10U-10VY-08-O 10U-10VY-08-O SC3 10U-6VX-08 10U-6VX-08-O SC6 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04 .1U-16VY-04-O .1U-16VY-04-O
100U-2V-9M-O 100U-2V-9M-O
Elitegroup Computer Systems
1

2
N

20100929 20101014 GND 20101014 GND 20101014 GND 20100929 Title


Change By Andy lu Add By Andy lu Add By Andy lu Add By Andy lu Change By Andy lu CPU - PWR
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Friday, December 03, 2010 Sheet 6 of 29
5 4 3 2 1
A
B
C
D
198 79

0.75V
FREE1 RSVD M_ODT_A1
187 FREE2 ODT1 77

MAX 1A
M_ODT_A0

V_SM_VTT
49 FREE3 ODT0 195
2 1 2 1 48 FREE4

GND
NC/PAR IN 68
240 53 ECC

V_1P5_SM
VTT NC/ERR OUT
120 167

ER95
ER96
VTT NC/TEST4

1K-1-04
1K-1-04

5
5

0.75V
239 VSS CB(0) 39

GND
2 1 235 VSS CB(1) 40

GND
232 VSS CB(2) 45
229 VSS CB(3) 46
226 VSS CB(4) 158
Desktop dosen't support

BC205
223 VSS CB(5) 159
220 VSS CB(6) 164

.1U-10VX-04
217 VSS CB(7) 165
214 VSS
211 7 M_DQS_A_P0
VSS DQS(0) M_DQS_A_N0
208 6

DIMM_VREF_CA_A
VSS DQS*(0)
205 VSS
202 16 M_DQS_A_P1

<5> M_CKE_A[0..1]
<5> M_ODT_A[0..1]
VSS DSQ(1)

<5> M_CLK_A_P[0..1]
<5> M_CS_A_L[0..1]

<5> M_CLK_A_N[0..1]
199 15 M_DQS_A_N1
VSS DSQ*(1)
166 VSS
M_DQS_A_P[0..7]

M_DQS_A_N[0..7]

163 25 M_DQS_A_P2
VSS DSQ(2) M_DQS_A_N2
160 VSS DSQ*(2) 24
1 2 1 2 157 VSS

GND
154 34 M_DQS_A_P3
VSS DSQ(3) M_DQS_A_N3
151 VSS DSQ*(3) 33
148

ER91
ER90
V_1P5_SM
VSS M_DQS_A_P4

1K-1-04
1K-1-04
145 VSS DQS(4) 85
142 84 M_DQS_A_N4
VSS DQS*(4)
2 1 139

M_CKE_A[0..1]
M_ODT_A[0..1]
VSS
M_CS_A_L[0..1]

GND
136 94 M_DQS_A_P5

M_CLK_A_P[0..1]

M_CLK_A_N[0..1]
VSS DQS(5)

DIMM_VREF_CA_A <8>
133 93 M_DQS_A_N5
VSS DQS*(5)
130
M_DQS_A_N[0..7]

VSS

BC195
127 103 M_DQS_A_P6
VSS DSQ(6) M_DQS_A_N6
124 VSS DSQ*(6) 102
M_DQS_A_P[0..7] <5>

<5>

.1U-10VX-04
121

20100929
VSS M_DQS_A_P7
119 VSS DQS(7) 112
116 111 M_DQS_A_N7
VSS DQS*(7)
113 VSS

Short By Andy lu

4
4

110 43

DIMM_VREF_DQ_A
VSS DQS(8)
107 VSS DQS*(8) 42
104 VSS
101 VSS DM0/DQS9 125
98 VSS NC/DQS9* 126
95 VSS
92 VSS DM1/DQS10 134
89 VSS NC/DQS10* 135
86 VSS
83 VSS DM2/DQS11 143
80 VSS NC/DQS11* 144
47 VSS
44 VSS DM3/DQS12 152
DIMM_DQ_CPU_VREF_A 41 VSS NC/DQS12* 153
be tied directly to ground.

38 VSS
35 203
<3>

VSS DM4/DQS13
1.5V

32 VSS NC/DQS13* 204


29 VSS
S3 1.0A

26 VSS DM5/DQS14 212


MAX 15A

23 VSS NC/DQS14* 213


have any DDR3 Data Mask (DM) signals

20
pins of each DDR3 DIMM connector must
for either channel. As a result the DM[8:0]

VSS
The processor memory controller does not

2 1 2 1 17 VSS DM6/DQS15 221


14 VSS NC/DQS15* 222
V_1P5_SM

V_SM_VTT
11 VSS
V_1P5_SM

8 230

MC84
MC88

VSS DM7/DQS16
5 VSS NC/DQS16* 231
2 VSS
10U-6VX-08

197 161

10U-10VY-08
VDD DM8/DQS17
GND

2 1 2 1 194 VDD NC/DQS17* 162

GND
191 VDD M_DATA_A0

Del DIMM1 for always populate DIMM2 first Jack 05/13


189 VDD DQ(0) 3
186 4 M_DATA_A1
CHANNEL A DIMMs

MC79

VDD DQ(1)
BC215

183 9 M_DATA_A2
VDD DQ(2) M_DATA_A3
182 10
<8,16,20,23,26> SMBCLK

3
3

VDD DQ(3)
10U-6VX-08
<8,16,20,23,26> SMBDATA

M_DATA_A4
.1U-16VY-04

179 122
VCC3

VDD DQ(4) M_DATA_A5


2 1 176 VDD DQ(5) 123
173 128 M_DATA_A6
VDD DQ(6) M_DATA_A7
170 VDD DQ(7) 129
78 12 M_DATA_A8
MC86
M_DATA_A[0..63]

VDD DQ(8) M_DATA_A9


75 VDD DQ(9) 13
SMBCLK

72 18 M_DATA_A10
SMBDATA

VDD DQ(10)
10U-6VX-08

69 19 M_DATA_A11
VDD DQ(11) M_DATA_A12
2 1 66 VDD DQ(12) 131
<5> M_BS_A[0..2]

65 132 M_DATA_A13
VDD DQ(13) M_DATA_A14
62 137
DIMM_VREF_CA_A
DIMM_VREF_DQ_A

VDD DQ(14) M_DATA_A15


60 138
MC87

VDD DQ(15) M_DATA_A16


57 VDD DQ(16) 21
54 22 M_DATA_A17
VDD DQ(17)
10U-6VX-08

51 27 M_DATA_A18
VDD DQ(18) M_DATA_A19
CH.A

236 VDDSPD DQ(19) 28


DIMM1

GND

140 M_DATA_A20
DQ(20) M_DATA_A21
67 141
M_DATA_A[0..63] <5>

VREFCA DQ(21)
M_BS_A[0..2]

1 146 M_DATA_A22
SA1

VREFDQ DQ(22) M_DATA_A23


118 SCL DQ(23) 147
238 30 M_DATA_A24
H

SDA DQ(24) M_DATA_A25


237 31
SA0

SA1 DQ(25)
GND

117 36 M_DATA_A26
SA0 DQ(26) M_DATA_A27
DQ(27) 37
2 1 M_BS_A2 52 149 M_DATA_A28
M_BS_A1 BA2 DQ(28) M_DATA_A29
190 BA1 DQ(29) 150
V_1P5_SM

M_BS_A0 71 155 M_DATA_A30


BA0 DQ(30) M_DATA_A31
DQ(31) 156
BC196

M_CKE_A1 169 81 M_DATA_A32


M_CKE_A0 CKE1 DQ(32) M_DATA_A33
50 CKE0 DQ(33) 82
M_DATA_A34
.1U-16VY-04

DQ(34) 87
2 1 M_CS_A_L1 76 88 M_DATA_A35
M_CS_A_L0 193 S1* DQ(35) M_DATA_A36
S0* DQ(36) 200
2
2

201 M_DATA_A37
DQ(37) M_DATA_A38
64 CK1/NU* DQ(38) 206
BC203

63 207 M_DATA_A39
CK1/NU DQ(39) M_DATA_A40
185 CK0* DQ(40) 90
M_DATA_A41
.1U-16VY-04

184 CK0 DQ(41) 91


2 1 96 M_DATA_A42
M_MA_A0 DQ(42) M_DATA_A43
188 A0 DQ(43) 97
M_MA_A1 181 209 M_DATA_A44
M_MA_A2 A1 DQ(44) M_DATA_A45
61 A2 DQ(45) 210
BC209

M_MA_A3 180 215 M_DATA_A46


M_MA_A4 A3 DQ(46) M_DATA_A47
59 A4 DQ(47) 216
M_MA_A5 M_DATA_A48
.1U-16VY-04

58 A5 DQ(48) 99
2 1 M_MA_A6 178 100 M_DATA_A49
M_MA_A7 A6 DQ(49) M_DATA_A50
56 A7 DQ(50) 105
M_MA_A8 177 106 M_DATA_A51
M_MA_A9 A8 DQ(51) M_DATA_A52
175 A9 DQ(52) 218
Title
BC206

Size

M_MA_A10 M_DATA_A53
Date:

70 A10/AP DQ(53) 219


M_MA_A11 M_DATA_A54
Custom

55 A11 DQ(54) 224


M_MA_A12 M_DATA_A55
.1U-16VY-04

174 A12 DQ(55) 225


2 1 M_MA_A13 196 108 M_DATA_A56
A13 DQ(56)
M_CLK_A_P1
M_CLK_A_P0

M_CLK_A_N1
M_CLK_A_N0

M_MA_A14 172 109 M_DATA_A57


M_MA_A[0..15]

M_MA_A15 A14 DQ(57) M_DATA_A58


171 A15 DQ(58) 114
115 M_DATA_A59
MC85

DQ(59) M_DATA_A60
168 RESET* DQ(60) 227
74 228 M_DATA_A61
CAS* DQ(61) M_DATA_A62
.1U-16VY-04

192 233
Document Number

RAS* DQ(62) M_DATA_A63


73 WE* DQ(63) 234
Monday, December 06, 2010

DDR3-240P-GY DDR3_1
M_MA_A[0..15] <5>
M_WE_A_L

M_CAS_A_L
M_RAS_A_L

DDR3_DRAMRST_L

1
1

H61H2-M2
Sheet
7
M_WE_A_L

DDR3 - CH_A_DIMM1
GND

of
M_CAS_A_L <5>
M_RAS_A_L <5>
<5>

DDR3_DRAMRST_L

29
<5,8>

Rev
Elitegroup Computer Systems

1.0
A
B
C
D
A
B
C
D

0.75V
198 FREE1 RSVD 79

MAX 1A
187 77 M_ODT_B1
FREE2 ODT1 M_ODT_B0

V_SM_VTT
49 FREE3 ODT0 195
48 FREE4
NC/PAR IN 68
240 53 ECC
VTT NC/ERR OUT
120 VTT NC/TEST4 167

5
5

239 VSS CB(0) 39

GND
235 VSS CB(1) 40
232 VSS CB(2) 45
229 VSS CB(3) 46
2 1 226 VSS CB(4) 158
Desktop dosen't support

GND
223 VSS CB(5) 159
220 VSS CB(6) 164
217 VSS CB(7) 165

BC214
214 VSS
211 7 M_DQS_B_P0
VSS DQS(0) M_DQS_B_N0

.1U-10VX-04
208 VSS DQS*(0) 6
205 VSS
202 16 M_DQS_B_P1

20100929
<5> M_CKE_B[0..1]
<5> M_ODT_B[0..1]
VSS DSQ(1)

<5> M_CLK_B_P[0..1]
<5> M_CS_B_L[0..1]

<5> M_CLK_B_N[0..1]
199 15 M_DQS_B_N1

DIMM_VREF_CA_B
VSS DSQ*(1)
166 VSS
M_DQS_B_P[0..7]

M_DQS_B_N[0..7]

163 25 M_DQS_B_P2
VSS DSQ(2) M_DQS_B_N2
160 VSS DSQ*(2) 24

Change By Andy lu
157 VSS
154 34 M_DQS_B_P3
VSS DSQ(3) M_DQS_B_N3
151 VSS DSQ*(3) 33
148 VSS
145 85 M_DQS_B_P4
VSS DQS(4) M_DQS_B_N4
142 VSS DQS*(4) 84
139

M_CKE_B[0..1]
M_ODT_B[0..1]
VSS
M_CS_B_L[0..1]
136 94 M_DQS_B_P5

M_CLK_B_P[0..1]

M_CLK_B_N[0..1]
VSS DQS(5) M_DQS_B_N5
133 VSS DQS*(5) 93
130
M_DQS_B_N[0..7]

VSS

DIMM_VREF_CA_A <7>
127 103 M_DQS_B_P6
VSS DSQ(6) M_DQS_B_N6
124 VSS DSQ*(6) 102
M_DQS_B_P[0..7] <5>

<5>

121 VSS
119 112 M_DQS_B_P7
VSS DQS(7) M_DQS_B_N7
116 VSS DQS*(7) 111
113 VSS

4
4

110 VSS DQS(8) 43


107 VSS DQS*(8) 42
104 VSS
101 VSS DM0/DQS9 125
98 VSS NC/DQS9* 126
95 VSS
92 VSS DM1/DQS10 134
89 VSS NC/DQS10* 135
1 2 1 2 86 VSS

GND
83 VSS DM2/DQS11 143
80 VSS NC/DQS11* 144
47

ER97
ER94
V_1P5_SM

VSS

1K-1-04
1K-1-04
44 VSS DM3/DQS12 152
41 VSS NC/DQS12* 153
be tied directly to ground.

2 1 38 VSS

GND
35 VSS DM4/DQS13 203
1.5V

32 VSS NC/DQS13* 204


29 VSS
S3 1.0A

BC208 26 212
VSS DM5/DQS14
MAX 15A

23 VSS NC/DQS14* 213


have any DDR3 Data Mask (DM) signals

.1U-10VX-04
20
20100929
pins of each DDR3 DIMM connector must
for either channel. As a result the DM[8:0]

VSS
The processor memory controller does not

17 VSS DM6/DQS15 221


14 222
DIMM_VREF_DQ_B

VSS NC/DQS15*
11 VSS
Short By Andy lu
V_1P5_SM

8 VSS DM7/DQS16 230


5 VSS NC/DQS16* 231
2 VSS
197 VDD DM8/DQS17 161
GND

194 VDD NC/DQS17* 162


191 VDD
189 3 M_DATA_B0
VDD DQ(0) M_DATA_B1
186 4
CHANNEL B DIMMs

VDD DQ(1) M_DATA_B2


183 VDD DQ(2) 9
182 10 M_DATA_B3
<7,16,20,23,26> SMBCLK

3
3

VDD DQ(3)
<7,16,20,23,26> SMBDATA

179 122 M_DATA_B4


VCC3

VDD DQ(4)
DIMM_DQ_CPU_VREF_B

176 123 M_DATA_B5


VDD DQ(5) M_DATA_B6
173 VDD DQ(6) 128
170 129 M_DATA_B7
<3>

VDD DQ(7) M_DATA_B8


78 12
M_DATA_B[0..63]

VDD DQ(8) M_DATA_B9


75 VDD DQ(9) 13
SMBCLK

72 18 M_DATA_B10
SMBDATA

VDD DQ(10) M_DATA_B11


69 VDD DQ(11) 19
66 131 M_DATA_B12
VDD DQ(12)
<5> M_BS_B[0..2]

65 132 M_DATA_B13
VDD DQ(13) M_DATA_B14
62 137
DIMM_VREF_CA_B
DIMM_VREF_DQ_B

VDD DQ(14) M_DATA_B15

Del DIMM3 for always populate DIMM4 first Jack 05/13


60 VDD DQ(15) 138
57 21 M_DATA_B16
VDD DQ(16) M_DATA_B17
54 VDD DQ(17) 22
2 1 51 27 M_DATA_B18
VDD DQ(18) M_DATA_B19
CH.B

236 VDDSPD DQ(19) 28


DIMM1

M_DATA_B20
V_SM_VTT

DQ(20) 140
67 141 M_DATA_B21
MC89
M_DATA_B[0..63] <5>

VREFCA DQ(21)
M_BS_B[0..2]

1 146 M_DATA_B22
SA1

VREFDQ DQ(22) M_DATA_B23


118 SCL DQ(23) 147
238 30 M_DATA_B24
H

SDA DQ(24) M_DATA_B25


237 31
10U-10VY-08-O
SA0

SA1 DQ(25) M_DATA_B26


2 1 117 SA0 DQ(26) 36
GND

37 M_DATA_B27
M_BS_B2 DQ(27) M_DATA_B28
52 BA2 DQ(28) 149
M_BS_B1 190 150 M_DATA_B29
BA1 DQ(29)
BC204

M_BS_B0 71 155 M_DATA_B30


BA0 DQ(30) M_DATA_B31
DQ(31) 156
M_CKE_B1 169 81 M_DATA_B32
M_CKE_B0 CKE1 DQ(32) M_DATA_B33
.1U-16VY-04-O

50 CKE0 DQ(33) 82
87 M_DATA_B34
M_CS_B_L1 76 DQ(34) M_DATA_B35
S1* DQ(35) 88
M_CS_B_L0 193 200 M_DATA_B36
S0* DQ(36)
2
2

201 M_DATA_B37
DQ(37) M_DATA_B38
2 1 64 CK1/NU* DQ(38) 206
VCC3

GND

63 207 M_DATA_B39
CK1/NU DQ(39) M_DATA_B40
185 CK0* DQ(40) 90
184 91 M_DATA_B41
CK0 DQ(41)
BC207

96 M_DATA_B42
M_MA_B0 DQ(42) M_DATA_B43
188 A0 DQ(43) 97
M_MA_B1 181 209 M_DATA_B44
M_MA_B2 A1 DQ(44) M_DATA_B45
.1U-16VY-04-O

61 A2 DQ(45) 210
M_MA_B3 180 215 M_DATA_B46
20100929

M_MA_B4 A3 DQ(46) M_DATA_B47


59 A4 DQ(47) 216
M_MA_B5 58 99 M_DATA_B48
M_MA_B6 A5 DQ(48) M_DATA_B49
178 A6 DQ(49) 100
M_MA_B7 56 105 M_DATA_B50
A7 DQ(50)
Change By Andy lu

M_MA_B8 177 106 M_DATA_B51


M_MA_B9 A8 DQ(51) M_DATA_B52
175 A9 DQ(52) 218
Title

Size

M_MA_B10 M_DATA_B53
Date:

70 A10/AP DQ(53) 219


M_MA_B11 M_DATA_B54
Custom

55 A11 DQ(54) 224


M_MA_B12 174 225 M_DATA_B55
M_MA_B13 A12 DQ(55) M_DATA_B56
196 A13 DQ(56) 108
M_CLK_B_P1
M_CLK_B_P0

M_CLK_B_N1
M_CLK_B_N0

M_MA_B14 172 109 M_DATA_B57


M_MA_B[0..15]

M_MA_B15 A14 DQ(57) M_DATA_B58


171 A15 DQ(58) 114
115 M_DATA_B59
DQ(59) M_DATA_B60
168 RESET* DQ(60) 227
74 228 M_DATA_B61
CAS* DQ(61) M_DATA_B62
192 233
Document Number

RAS* DQ(62) M_DATA_B63


73 WE* DQ(63) 234
Monday, December 06, 2010

DDR3-240P-GY DDR3_2
M_MA_B[0..15] <5>
M_WE_B_L

M_CAS_B_L
M_RAS_B_L

DDR3_DRAMRST_L

1
1

H61H2-M2
Sheet
8
M_WE_B_L

DDR3 - CH_B_DIMM3

of
M_CAS_B_L <5>
M_RAS_B_L <5>
<5>

DDR3_DRAMRST_L

29
<5,7>

Rev
Elitegroup Computer Systems

1.0
A
B
C
D
5 4 3 2 1

External Connection 5VSB AU1_VBOOTA

VCC_SEN
VCC VCC +V_8859 +V_8859
VCORE VCORE AU1_VBOOT

2
V_CPUVTT V_CPUVTT
R168

10K-04
12V_4P 12V_4P

D
4.7K-04

10K-04

ER61 15.4K-1-04
VCC3 VCC3

1
Q8

5.6P-04
VIN VIN

1
5VSB 5VSB G 2N7002-S RT2

2
RT6 NTC-10K-1-06 +V_8859

S
VR_EN

R164
<4> VR_EN

2
ALERT
Sb

R159

BC153
<4> VR_SVID_ALERT_L

2
VDIO Q9 NTC-10K-1-06 V_CPUVTT
<4> VR_SVID_DATAOUT
VCLK H_SKTOCC_N 2N7002-S R151

ER62 249K-1-04

.1U-10VX-04
D <4> VR_SVID_CK G D
AU1_VRHOT 0-04-O
<4> VR_HOT_L

S
2

1
AU1_PWM[1..4] ER58 0-04

536-1-04

53.6K-1-04
<10> AU1_PWM[1..4]

1
1
MC72 R152 0-04 AU1_DVIDA

.1U-10VX-04
2 1

1
AU1_ISEN1P 1U-10VY-06-O

536-1-04

110-1-04

110-1-04

110-1-04
BC164

.1U-10VX-04
<10> AU1_ISEN1P 1 2

2
AU1_ISEN1N MC61 33P-06-O

ER68
BC162
<10> AU1_ISEN1N

1
1 2

1
AU1_ISEN2P R173 BC172

ER69

BC154
<10> AU1_ISEN2P

2
AU1_ISEN2N 100-04

ER67
<10> AU1_ISEN2N .1U-16VY-04-O

2
ER57 0-04

AU1_IMONFB
AU1_TSENA

2
AU1_DVIDA
AU1_ISEN3P VSSAXG_SEN AU1_DVID

R146

R155

R158
2 1

AU1_TSEN

AU1_IMON

AU1_IBIAS
<10> AU1_ISEN3P

AU1_OFS
<10> AU1_ISEN3N AU1_ISEN3N 20101026

ALERT
MC60 33P-06-O

VCLK
Change By Andy lu

VDIO
AU1_ISEN4P +V_8859 VSS_SEN 1 2
<10> AU1_ISEN4P
<10> AU1_ISEN4N AU1_ISEN4N

1
<4> VCC_SEN VCC_SEN R126 BC134
VSS_SEN PWM2 100-04 .1U-16VY-04-O

45

44

15

16

21

14

56

18

19

20

17

31

12
<4> VSS_SEN

1
+V_8859

2
VR_READY R161 R165 R170 R172 R137 R185 R181 100K-04-O

VDIO
<16> VR_READY

TSEN

TSENA

IMON

IMONFB

IBIAS

OFS

VCLK

ADD

RGNDA

RGND
NC4/DVIDA

ALERT#

1
AU1_VRHOT 46 2 1
AU1_PWMA VRHOT
<10> AU1_PWMA 2

2
R182 0-04
<10> AU1_ISENAP AU1_ISENAP 51K-04 51K-04 51K-04 274K-1-04300K-04 200K-04 AU1_VBOOT 22 53 AU1_PWM1 AU1_OFSA 2 1
AU1_ISENAN VBOOT PWM1
<10> AU1_ISENAN
AU1_VBOOTA 23 54 AU1_PWM2 BC179 .1U-10VX-04-O
VCCAXG_SEN VBOOTA PWM2
<4> VCCAXG_SEN 1 2
<4> VSSAXG_SEN VSSAXG_SEN AU1_TMPMAX 24 52 AU1_PWM3
TMPMAX PWM3
AU1_ICCMAX 25 4 AU1_ISEN1P
ICCMAX ISEN1P BC130 .1U-10VX-04
C AU1_ICCMAXA 26 3 AU1_ISEN1N 2 1 +V_8859 C
ICCMAXA ISEN1N R178 100K-04-O
AU1_QRSET 55 13 AU1_DVID 2 1
H_SKTOCC_N QRSET NC1/DVID
<4,23> H_SKTOCC_L
AU1_QRSETA 36 R179 0-04
QRSETA
1

1
1 AU1_ISEN2P AU1_SR_ADDF 2 1
R162 R166 ER72 ER75 R136 R175 BC175 .1U-16VY-04 ISEN2P BC131 .1U-10VX-04
1 2 2 AU1_ISEN2N 2 1 BC174 .1U-10VX-04-O
GND ISEN2N
1 2
2

2
33K-04 33K-04 200K-04 2 1 AU1_IMONA 28
100K-04 IMONA AU1_SR_ADDF
NC2/SR_ADDF 29
ER80 665K-1-04
40.2K-1-04 36K-1-04 1 2 BC168
.1U-16VY-04-O 5 AU1_ISEN3P +V_8859
VCCAXG_SEN ISEN3P
2 1 AU1_IMONFBA 27 IMONFBA
BC129 .1U-10VX-04 R133 100K-04-O
VCORE AU1_ISEN3N

RT8859M
ER74 22K-1-04 Sa ISEN3N 6 2 1 2 1
2

RT3
R127 NTC-10K-1-06 1 2 AU1_RSET 9 30 AU1_OFSA ER56 0-04
RSET NC3/OFSA
1

BC140 100-04 1 2 AU1_OFS 2 1


.1U-16VY-04-O ER55 76K-1-04
1

ER52 ER54 ER59 AU1_ISEN4P


ISEN4P 8
Sc
2

10K-1-04 13K-1-04 75K-1-04 BC132 .1U-10VX-04 BC144 .1U-10VX-04-O


VCC_SEN 1 2 1 2 1 2 AU1_COMP 10 7 AU1_ISEN4N 2 1 1 2
COMP ISEN4N

TONSETA
VRA_RDY

OCSETA
VR_RDY

TONSET
1

BC133 AU1_FB AU1_PWM4

ISENAN

ISENAP
COMPA
11 51

OCSET
FB PWM4

PWMA
DVDA
.1U-16VY-04-O BC139 R129 R131 BC143

VCC

PAD
FBA
2 1 1 2 1 2 2 1 AU1_DVD 48

EN
DVD
2

VSS_SEN 12V_4P
220P-04 0-04 0-04 33P-04

47

33

32

39

40

41

42

43

AU1_TONSETA 49

50

34

35

37

38

57
B B
1

RT8859MGQWS
R130 R154 Roffset 1K 16 levels for FB mode trigger OVP Jack 08/10
10-04-O 8.2K-04

AU1_TONSET

2AU1_ISENAN
AU1_COMPA

AU1_ISENAP
AU1_OCSETA

AU1_OCSET

AU1_PWMA
VR_READY

+V_8859
VRA_RDY
1 2

2 1

VR_EN
AU1_FBA
2

BC135
470P-04-O R153 BC160
1K-04 .1U-16VX-04
2

2
VAXG

1K-04
10K-04
1

1
ER64 BC181 R186

1
reserve as Vendor 10/11 180K-1-04 1K-04

1
2

RT5 .1U-10VX-04

1
1

BC176 R183 NTC-10K-1-06 BC156

1
.1U-16VY-04-O 100-04 R176 .1U-16VX-04

R187
1 2
2

2 V_CPUVTT RT8859A RT8859M


2

2
VCC +V_8859 ER87 ER88 ER81 ER63

2
R191 2.2-04 13K-1-04 10K-1-04 118K-1-04 182K-1-04 RT8859A RT8859M
Sa

2
2 1 VCCAXG_SEN 1 2 1 2 1 2

1
VCC3 +V_8859
Sb X V
1

2
BC171 R142

1
2

2
.1U-16VY-04-O BC177 R180 R174 BC170 1-04 BC155
Sc 402-1-04 1K-1-04
2

BC147 BC186 2 1 1 2 1 2 2 1 ER78 R140 .1U-16VX-04


2

1
1U-16VX-06 .1U-10VX-04 VSSAXG_SEN RT8 12V_4P 1-04 change 1K for OV
1

220P-04 0-04 0-04 47P-04 9.09K-1-04

1
+V_8859
1

2
1

NTC-10K-1-06-O 1 2 12V_4P
R184
1

1
10-04-O R177 0-04 RT7
NTC-10K-1-06-O ER73
1 2

A ER79 12.1K-1-04 A
BC180 6.2K-1-04 R169 0-04
2

2
470P-04-O 1 2
2

ER71
5.6K-1-04 Elitegroup Computer Systems
reserve as Vendor 10/11 20101206
2

Title
Change By Andy lu
DC/DC VCORE/VAXG RT8859M
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 9 of 29
5 4 3 2 1
5 4 3 2 1

VIN
R55 BC53
External Connection 2.2-06 .1U-16VY-04
12V_4P

D
VCC VCC 1 2 1 2
VCORE

1
VCORE VCORE R44 0-06 MF3 MC13
U12 HG1 1 HG1_R MN252-9MS 4.7U-16VY-08 ATX12V
12V_4P 12V_4P 2 G
VCC3 VCC3 RT9612 1 GND

2
VIN VIN 1 8 HG1 L6 3
BOOT UGATE
+12V

VAXG VAXG PIND-0.3UD 2 GND

1
AU1_PWM1 2 7 PHASE1 PHASE1 1 2 4
PWM PHASE +12V

BC44
ATX-PW-4P2R

2
AU1_PWM[1..4] 3 6 .01U-25VX-04
<9> AU1_PWM[1..4] NC PGND

2
R47 0-06 MF7 R62 SP2 SP5
D D
AU1_ISEN1P 12V_4P 1 2 4 5 LG1 LG1 1 2 LG1_R G MN252-6MS 1-06
<9> AU1_ISEN1P VCC LGATE
AU1_ISEN1N SHORT PAD SHORT PAD
<9> AU1_ISEN1N

2 1
1
R58 2.2-06
AU1_ISEN2P BC50 RT9612BGSS ER50 MC56
<9> AU1_ISEN2P
AU1_ISEN2N .1U-16VY-04 BC56 6.2K-1-04 .1U-X7R-06
<9> AU1_ISEN2N 12V_4P VIN

2
.01U-25VX-04 2 1 2 1

1
AU1_ISEN3P L2 PIND-0.6UD-8X8
<9> AU1_ISEN3P
AU1_ISEN3N AU1_ISEN1P 1 2
<9> AU1_ISEN3N VIN

1
AU1_ISEN4P AU1_ISEN1N EC7 EC13 EC9 EC8
<9> AU1_ISEN4P
<9> AU1_ISEN4N
AU1_ISEN4N R53 BC51 08-413-604322 + + + +
2.2-06 .1U-16VY-04 20101206 Idc=22A

D
1 2 1 2 Change By Andy lu DCR=1.9m ohm

2
1
R43 0-06 MF1 MC10
U11 HG2 1 2 HG2_R G MN252-9MS 4.7U-16VY-08
RT9612 270U-16D-OS 270U-16D-OS

2
<9> AU1_PWMA AU1_PWMA 1 8 HG2 L4 270U-16D-OS 270U-16D-OS
BOOT UGATE PIND-0.3UD
AU1_ISENAP AU1_PWM2 2 7 PHASE2 PHASE2 1 2
<9> AU1_ISENAP PWM PHASE
AU1_ISENAN
<9> AU1_ISENAN

2
3 NC PGND 6
R46 0-06 MF5 R60 SP1 SP7
12V_4P 1 2 4 5 LG2 LG2 1 2 LG2_R G MN252-6MS 1-06
VCC LGATE SHORT PAD SHORT PAD

2 1
1
R56 2.2-06
BC48 RT9612BGSS BC55 ER51 MC57 VCORE
.1U-16VY-04 6.2K-1-04 .1U-X7R-06

2
.01U-25VX-04 2 1 2 1

1
C AU1_ISEN2P C
VIN + EC22 + EC18 + EC19
AU1_ISEN2N 820U-2.5D6-OS 820U-2.5D6-OS 820U-2.5D6-OS
R54 BC52

2
2.2-06 .1U-16VY-04 20101206

D
1 2 1 2 Change By Andy lu

1
R45 0-06 MF2 MC12
U13 HG3 1 2 HG3_R G MN252-9MS 4.7U-16VY-08
RT9612

2
1 8 HG3 L5
BOOT UGATE PIND-0.3UD
AU1_PWM3 2 7 PHASE3 PHASE3 1 2
PWM PHASE
VCORE

2
3 NC PGND 6
R48 0-06 MF6 R59 SP3 SP8
12V_4P 1 2 4 5 LG3 LG3 1 2 LG3_R G MN252-6MS 1-06
VCC LGATE SHORT PAD SHORT PAD

2 1
1

1
R57 2.2-06
BC49 RT9612BGSS ER49 MC55 + EC20 + EC21
.1U-16VY-04 BC54 6.2K-1-04 .1U-X7R-06 820U-2.5D6-OS 820U-2.5D6-OS
2

.01U-25VX-04 2 1 2 1

2
AU1_ISEN3P
VIN
AU1_ISEN3N
R52 BC46
2.2-06 .1U-16VY-04 20101206

D
1 2 1 2 Change By Andy lu

1
R67 0-06 MF8 MC20
U14 HG4 1 2 HG4_R G MN252-9MS 4.7U-16VY-08
B B
RT9612

2
1 8 HG4 L7
BOOT UGATE PIND-0.3UD
AU1_PWM4 2 7 PHASE4 PHASE4 1 2
PWM PHASE

2
3 NC PGND 6
R69 0-06 MF10 R77 SP9 SP10
12V_4P 1 2 4 5 LG4 LG4 1 2 LG4_R G MN252-6MS 1-06
VCC LGATE SHORT PAD SHORT PAD

2 1
1

R68 2.2-06
BC57 RT9612BGSS ER48 MC54
.1U-16VY-04 BC75 6.2K-1-04 .1U-X7R-06 20101206 VAXG
2

.01U-25VX-04 2 1 2 1 Change By Andy lu

1
AU1_ISEN4P

1
AU1_ISEN4N + EC26 + EC25
820U-2.5D6-OS 820U-2.5D6-OS

VIN VAXG

2
R107 BC120
2.2-06 .1U-16VY-04
D

1 2 1 2

1
R89 0-06 MF11 MC9 08-413-564320
U17 UG_GT 1 2 UG_GT_R G MN252-9MS 4.7U-16VY-08 DCR:0.85mOHM
RT9612 L8
S

2
1 8 UG_GT PIND-0.6UD
BOOT UGATE
A AU1_PWMA 2 7 PHASE_GT PHASE_GT 1 2 A
PWM PHASE
D

3 NC PGND 6
R104 0-06 MF12 R96 SP11 SP12
12V_4P 1 2 4 5 LG_GT LG_GT 1 2 LG_GT_R G MN252-6MS 1-06
VCC LGATE SHORT PAD SHORT PAD Elitegroup Computer Systems
S

2 1
1

R116 2.2-06
BC127 RT9612BGSS ER77 MC73
.1U-16VY-04 BC105 7.5K-1-04 .1U-X7R-06 Title
2

.01U-25VX-04 2 1 2 1
DC/DC VCORE/VAXG RT9612
1

AU1_ISENAP Size Document Number Rev

AU1_ISENAN
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 10 of 29
5 4 3 2 1
5 4 3 2 1

External Connection
VCC VCC

3VSB 3VSB Near VTT CHOCK


5VSB 5VSB

2
V_1P05_PCH V_1P05_PCH

1
V_CPUVTT V_CPUVTT BC64 ER32 RT1
.01U-25VX-04-O 10K-1-04 NTC-10K-1-06

1
D D

1
ER31 BC66 10P-04 ER33 1.5K-1-04 V_CPUVTT
4.02K-1-04 2 1 2 1

1 2

1
ER34 BC67 BC68 R76
22K-1-04 3300P-04 1000P-04 0-04 R75
ER30 2 1 2 1 2 1 2 1 100-04
4.02K-1-04

2
20101021 VCCIO_SEN VCCIO_SEN <4>

2
BC63 820P-04 R73 2.2-06-O
Change By Andy lu

1
1 2 1 2 VCC
BC71
5V_8121 1000P-04-O

2
BC70 .01U-25VX-04 R74 2.2-06 VSSIO_SEN VSSIO_SEN <4>
VSSIO_SEN 1 2 SS 1 2 12V_4P

COMP
VCCIO voltage selection

1
ER29 MC16

FB
VTT_SEL V_CPUVTT 30K-1-04 1U-16VX-06

VIN

2
low 1V PWM1

13
2

4
1

1
high 1.05V

ADJ
SS

COMP

FB

VCC12
ER28 BC62 21 R80 BC76 1.05V/1V Max: 17A
2K-1-04 .1U-16VY-04 GND 2.2-06 .1U-16VY-04

D
2
OCSET 11 16 1 2 1 2 R61
2 OCSET BOOT

1
2.2-06 MF4 MC11
1 2 G MN252-9MS 4.7U-16VY-08 V_CPUVTT
<4> VTT_SEL VTT_SEL CPUVTT_VID 18 15 UG_8121 VTT CHOCK
VID UG

2
L3
C V_CPUVTT PIND-1.0U-D C
19 GND
GND PHASE 14 PHASE_8121 1
MAX 28A
2

2
D

1
R78 20 12 LG_8121 R50 R63 SP4 SP6 EC17 EC16
1K-04 GND LG/OCSET 0-06 MF9 1-06

RT8121
+ +
1 2 G MN252-6MS SHORT PAD SHORT PAD
2

2 1
VTT_PWRGD 17 9 VTT_ISEN+
PWRGD ISP

2
R64 BC58

FBRTN
RT/EN
BC47 6.8K-04 .1U-10VX-04

VCC5
OFS

ISN
2 1 2 1

1
RT8121GQWS 820U-2.5D6-OS
VTT_ISEN+ 820U-2.5D6-OS

10
R70 1.3K-1-04 .01U-25VX-04
V_1P05_PCH 36K Set FSW 06/04 1 2 VTT_ISEN- VTT_ISEN-
R65 1K-04-O

1
1 2 CPUVTT_EN 5V_8121 Near RT8121 IC
BC59

OFS
.1U-10VX-04

2
2

R66
C41 R71 1 2
1000P-04 36K-1-04 VSSIO_SEN
1

1K-04-O
1

1
MC14
R72 1U-16VX-06 BC73 R81
240K-04 .1U-16VY-04-O 100-04
2

2
GND GND

2
B B

D9 BAT54A-S
VTT_PWRGD 1
3 +12V
<4,16,22,23> SLP3_L 2

8
VCCSA voltage selection +12V
VCCNS_REF V_CPUVTT 3 +
VID +V_SA 1
2 -
2

0.925V U16A
0
2

ER44 OP358-S

4
0.85V 6.65K-1-04 R97
* 1
D
8

3VSB 4.7K-04 Rds(on) < 14m OHM,


1

VCCSA_COMP 5 MN2 Follow CRB V0.7


1

+
7 G MN252-6MS Rds(on) = 6m OHM
2

6 GND
S

-
1

R110 ER45 ER46 C45 U16B 20100929 07/20


10K-04 27.4K-1-04 3.92K-1-04 1U-16VX-06-O OP358-S
Short By Andy lu
4
1

C 1

R120 100-04
<4> VCCSA_VID 2 1 B QN4 GND GND 0.925V/0.85V
2N3904-S 20100929 GND V_SA
MAX 8.8A
2

A A
By Andy lu
E

R122 2 1
1K-04 R105 100-04
GND
1

GND
R102 0-04 EC23
820U-2.5D6-OS
MC19
10U-10VY-08-O
Elitegroup Computer Systems
<4> VCCSA_SEN 2 1
2

20100929 Title

GND GND
By Andy lu DC/DC V_CPUVTT RT8121 / VCCSA
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 11 of 29
5 4 3 2 1
5 4 3 2 1

5VSB 5VSB +12V DIMM_5VDUAL


20100924 5VSB R238 4.7K-04
Change By Andy lu 1 2
5VSB

2
D16
From 3VSB to 5VSB 3VSB DIMM_5VDUAL BAT54C-S 08-413-604322

C
2
R243 10K-04 MS1 L13 Idc=22A
R98 1 2 B PIND-0.6UD-8X8 DCR=1.9m ohm
4.7K-04-O DUAL_P 4 G2 D2 5 MC94 5VSB 1.5V@TDC 20A, MAX 25A

3
QN10 P 1U-16VX-06 20100929

E
1

1
2N3904-S DIMM_VCC
DDR3
3 S2 D2 6 1 2 Change By Andy lu

1
D14 DIMM_VIN
D <23> -3VSBSW DUAL_N BC216 BAT54C-S D
2 G1 D1 7
+12V

1
.1U-16VY-04-O

2
N D1

1
1 S1 8 +

D
R237 4.7K-04 PWM3 MN7 MC90 EC36

3
5
1 2 NPSO8-S BC224 .1U-16VY-04 MN252-9MS 10U-10VY-08-O 560U-6.3D-OS

2
3 1 DIMM_BOOT 1 2 G

VCC
3VSB GND BOOT
VCC V_1P5_SM

S
R242 10K-04 2 UG_DIMM 1 2 UG_DIMM_R
UGATE R230 0-06 L14 PIND-1.5UD-25A
1 2 B
8 PHASE_DIMM 1 2
QN9 PHASE

D
E

2
2N3904-S VCC 7 1 2 MN6
COMP/OCSET ER100 20K-1-04 MN252-6MS R233
6 4 LG_DIMM 1 2 LG_DIMM_R G 1-06
FB LGATE

1
R240 0-06

1 1
2
BC225 APW7120-S
.1U-16VY-04-O

2
reserve for LG_DIMM refer to VCC Jack 06/22 R239 BC222
4.7K-04-O 4700P-04

2
ER104 4.42K-1-04
<15> GPIO48 2 1

V_1P5_SM
Rvdimm
<16> GPIO15 2 1 ER101 1 2 562-1-04

1
ER102 1.5K-1-04 20101203
VCCNS_REF +12V ER103 Iocset=(40uA*Rocset-0.4V)/Rlowmos_dson=60A + +
1K-1-04
Change By Andy lu EC35 EC31
C Vgs=10V Rdson=3 mOHM C
Ra 1 20101203 1000U-6.3DL 820U-2.5D6-OS

2
1

BC211
Add By Andy lu
1

ER83 .1U-16VY-04-O
2

3.9K-1-04 U19A R160 For Down Voltage of DIMM


D
8

10K-04-O
2

V1.05_REF 3 MN5
2

+
Rb 1 G MN252-20MS
1

2 Refer to page28
For Non-AMT
S

-
ER82 MC74
2.87K-1-04 OP358-S
Sd
3VSB_IO
2

6.2A 2.5A
2

5VSB VCC
V_1P5_SM V_1P5_SM
1U-10VY-06 V_1P05_PCH V_1P05_ME

1
20100929 ER76 475-1-04 SR1 0-08-X-SH 5VSB_ATX
2 1 1 2 0.75V@1A RJ10(1-2)
Change By Andy lu

1
BC223 0-06
U23
1

ER99 .1U-16VY-04-O

2
1

1
Rc + 10K-1-04 1 8
VIN Vcntl

1
EC32 MC58 SC14 2 7 ER41
GND Vcntl

1
<15> GP_V1.05 2 1 1000U-6.3DL 10U-10VY-08 .1U-16VY-04-X-O 3 6 MC92 Rt 100-1-04
REFEN Vcntl
2

4 5 BC226
VOUT Vcntl

C
1

1
ER70 10K-1-04 10U-10VY-08-O .1U-16VY-04 QN2

2
G
ER98 C64 B 2N3904-S
10K-1-04 1000P-04-O APL5336-S 3VSB_IO

9
GP_V1.05:default OD-->1.05V 02-345-312910

E
2

1
Low==>1.1V V_SM_VTT
Rb ER42

1
402-1-04
B B
MC21

2
1U-10VY-06-O

2
1
+ EC34
1000U-6.3DL
Vo=Vin*Rb/(Rt+Rb)-0.7

2
3VSB IO Max=25mA
VCC3

VCCNS_REF VCCNS_REF U3a


VCC3 +12V
R188 150-04
1 2 5VSB U9 3VSB
1

ER84 I O
3.74K-1-04 U19B R167 IN OUT
C

D
8

1
10K-04-O
2
1

D11 1P8_SFR_EN 5 MN4 ER24


2

+
BC182 R 431-S 7 G MN252-70MS A 110-1-04
ADJ
1

.1U-16VY-04-O MC75 6
S
2

2
-
ER85 EC11 + EC15
A

10K-1-04 1U-10VY-06-O OP358-S 100U-16DE ADJ1085-S 100U-16DE


2

1
2

1.6A ER23

V_1P8_SFR
Vo=1.25(1+Rb/Rt) 180-1-04
2

180/110
A A
1

+
EC28
USB3.0 W/S3 ADJ1085-S 02-349-085810 (TO-252)
1000U-6.3DL USB3.0 W/O S3 ADJ1086-S 02-347-086760 (SOT-223) Elitegroup Computer Systems
2

Title
DC/DC VDIMM/DDR_VTT/5VDUAL
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Tuesday, December 14, 2010 Sheet 12 of 29
5 4 3 2 1
5 4 3 2 1

FRONT PANEL DIMM_5VDUAL 5VSB S0


G_LED1 L
S1
B
S3 S4 S5
B L L

External Connection G_LED2 H H L L L

2
VCC3 VCC G GB YB OFF OFF

1
3
5
7
R218 G_LED1X B:Blinking
RN13 4.7K-04 R223

C
2

2
SATA_LED1- 330-8P4R-06 1K-04
<15> SATALED_L

1
R94 R227 G_LED1 1 2 B VCC

2
4
6
8
HWRST_L 1K-04 180-04 SPK
<4,16> FP_RST_L -PWRBTN QN7
<23> FP_PWRBTN_L 1 1

E
1

1
F_PANEL 2N3904-S R121
G_LED1 +HDD_LED 1 2 G_LED1X 5VSB 100-04 3
D <23> G_LED1 G_LED2 SATA_LED1- G_LED2X SPKOUT 3 D
<23> G_LED2 3 4 2 1 4 4
R231 33-04 5 6 PWRBTN_ 1 2 -PWRBTN R119

C
2
HWRST_L 1 2 7 8 1K-04 H4X1-P2E-B

1
PCH_SPKR 9 R109 100-04 R224 G_LED2X PCH_SPKR 2 1 B BC126
<16> PCH_SPKR

1
4.7K-04 R225 .1U-16VY-04-O

C
MC91 BC212 H5X2-P10E-B MC24 1K-04 QN3

E
1

2
1U-10VY-06 .1U-16VY-04-O 1U-10VY-06 G_LED2 1 2 B 2N3904-S

2
QN8

E
20100929 2N3904-S
Add By Andy lu

-12V VCC VCC3 VCC3 VCC +12V 5VSB_ATX VCC


POWER CONNECTOR 20101029 VCC
Add By Andy lu

1
External Connection

1
F_PANEL ATX_POWER + BC219
5VSB_ATX 5VSB_ATX 13 1 VCC EC37 .1U-16VY-04-O
3.3V 3.3V
+HDDLED

+MSGLED
VCC3 VCC3 1 2 14 2 1000U-6.3DL
-12V 3.3V

2
-12V -12V 15 GND GND 3

1
5VSB 5VSB 3 4 -ATX_PSON_SIO 16 4
PS_ON +5V R232
VCC VCC 17 GND GND 5
+12V +12V 5 6 18 6 10K-04 GND
GND +5V 3VSB 5VSB_ATX VCC3 +12V VCC
PWR
RST

19 GND GND 7

2
7 8 20 8 ATX_PWRGD
-5V PWROK
C 21 +5V AUX5V 9 C

1
<23> PSON_L -ATX_PSON_SIO 9 22 10 BC210 BC221 BC218 BC217 BC31
ATX_PWRGD +5V +12V BC220 .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O
<23> ATX_PWRGD 23 +5V +12V 11 20100929
24 12 .1U-16VY-04-O
GND 3.3V Change By Andy lu

2
For EMI.
ATX-PW-24P2R

H3 TH8 H4 TH8 H5 TH8

FAN 20100927
1
2
3
8
7
6
1
2
3
8
7
6
1
2
3
8
7
6
4
+12V Change By Andy lu
External Connection 3 From 100U to 10U
4 5 4 5 4 5

9
+12V +12V 2
+12V VCC3 VCC RJ9(1-2)
VCC VCC

1
4.7K-04 1 MC15
10U-10VY-08
CFAN_PWM1 Top Veiw
<23> CFAN_PWM1
N

2
2

CFAN_TAC1 R199 D13


<23> CFAN_TAC1 4.7K-04 1N4148-S TH8 TH8
H1 H2
CPU_FAN SYS_FAN 1 8 1 8
P

R195 R193 100-04 2 7 2 7


1

27K-04 CFAN_PWM1 1 2 CFAN_PWM1_R 4 3 3 6 3 6


CFAN_TAC1 GPO SENSE
1 2 3 SENSE 2 +12V 4 5 4 5
+12V 2 +12V 1 GND
2

1 GND

9
R194 H3X1-P-W
B B
1

10K-04 H4X1-P-W
EC30 + MC76
1

100U-16DE 1U-16VX-06-O
2

AUGND AUGND

PCB
PCH(104)
CLR_CMOS(1-2) BT(104) Y1(wire)

+
KTS
LITHIUM BATTERY JP-WI-P6.25
ECS CD2032
SMD 64M

JP-R CR2032

20-120-011476
PCB-4layer
A 5series PN:20-120-010851 A
PCB STACK: L1:TOP
L2:PWR
L3:GND Elitegroup Computer Systems
L4:BOTTOM Title
Front Panel,FAN,PowerConn,GND,104
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Thursday, December 09, 2010 Sheet 13 of 29
5 4 3 2 1
5 4 3 2 1

For H61:USB Port 6/7/12/13 is disabled....From 440377 file

PCHA PCHB

BH8 BF15 DMI_TX_N0 D33 BF36 USB_N0 USB_N0 <22>


PAR AD0 <3> DMI_TX_N0 DMI0RXN USBP0N
DEVSEL_L BH9 BF17 DMI_TX_P0 B33 BD36 USB_P0 USB_P0 <22>
DEVSEL# AD1 <3> DMI_TX_P0 DMI0RXP USBP0P
PCI_33M_FB BD15 BT7 DMI_RX_N0 J36 BC33 USB_N1
<15> PCI_33M_FB
1 PCILPCAID_RST_L AV14 CLKIN_PCILOOPBACK AD2
BT13
<3> DMI_RX_N0
DMI_RX_P0 H36
DMI0TXN USBP1N
BA33 USB_P1
USB_N1
USB_P1
<22>
<22>
F_USB2
STP40 PCIRST# AD3 <3> DMI_RX_P0 DMI0TXP USBP1P
IRDY_L BF11 BG12 DMI_TX_N1 A36 BM33 USB_N2 USB_N2 <22>
IRDY# AD4 <3> DMI_TX_N1 DMI1RXN USBP2N
20100910 1 PCH_PME_L AV15 BN11 DMI_TX_P1 B35 BM35 USB_P2 USB_P2 <22>
D STP39 PME# AD5 <3> DMI_TX_P1 DMI1RXP USBP2P D
SERR_L BR6 BJ12 DMI_RX_N1 P38 BT33 USB_N3
Add By Andy lu STOP_L BC12
SERR# AD6
BU9
<3> DMI_RX_N1
DMI_RX_P1 R38
DMI1TXN USBP3N
BU32 USB_P3
USB_N3
USB_P3
<22>
<22>
F_USB1
For Test Point STOP# AD7 <3> DMI_RX_P1 DMI1TXP USBP3P
PLOCK_L BA17 BR12 DMI_TX_N2 B37 BR32 USB_N4 USB_N4 <22>
PLOCK# AD8 <3> DMI_TX_N2 DMI2RXN USBP4N
TRDY_L BC8 BJ3 DMI_TX_P2 C36 BT31 USB_P4 USB_P4 <22>
TRDY# AD9 <3> DMI_TX_P2 DMI2RXP USBP4P
PERR_L BM3 BR9 DMI_RX_N2 H38 BN29 USB_N5
FRAME_L BC11
PERR# AD10
BJ10
<3> DMI_RX_N2
DMI_RX_P2 J38
DMI2TXN USBP5N
BM30 USB_P5
USB_N5
USB_P5
<22>
<22>
USBx2
FRAME# AD11 <3> DMI_RX_P2 DMI2TXP USBP5P
BM8 DMI_TX_N3 E37 BK33
AD12 <3> DMI_TX_N3 DMI3RXN USBP6N
BF3 DMI_TX_P3 F38 BJ33
AD13 <3> DMI_TX_P3 DMI3RXP USBP6P
BN2 DMI_RX_N3 M41 BF31 20100921
AD14 <3> DMI_RX_N3 DMI3TXN USBP7N
GNT0_L BA15 BE4 DMI_RX_P3 P41 BD31
GNT0# AD15 <3> DMI_RX_P3 DMI3TXP USBP7P Changed By Andy lu
TP1 1 GNT1_L AV8 BE6 B31 BN27
GNT2_L GNT1#_GPIO51 AD16 DMI_COMP DMI_IRCOMP USBP8N For USB
TP3 1 BU12 GNT2#_GPIO53 AD17 BG15 V_1P05_PCH 1 2 E31 DMI_ZCOMP USBP8P BR29
TP2 1 GNT3_L BE2 BC6 BR26
GNT3#_GPIO55 AD18 R192 49.9-1-04 USBP9N
AD19 BT11 USBP9P BT27
BA14 CKG_DMI_N P33 BK25 USB_N10 USB_N10 <26>
AD20 CLKIN_DMI_N USBP10N
07/21 AD21 BL2 CKG_DMI_P R33 CLKIN_DMI_P USBP10P BJ25 USB_P10 USB_P10 <26>
REQ0_L BG5 BC4 BJ31 USB_N11
REQ1_L BT5
REQ0# AD22
BL4
USBP11N
BK31 USB_P11
USB_N11
USB_P11
<26>
<26>
USBLAN
REQ2_L REQ1#_GPIO50 AD23 PEX1A_RX_N1 USBP11P
BK8 REQ2#_GPIO52 AD24 BC2 <20> PEX1A_RX_N1 J20 PERN1 USBP12N BF27
REQ3_L AV11 BM13 PEX1A_RX_P1 L20 BD27
REQ3#_GPIO54 AD25 <20> PEX1A_RX_P1 PERP1 USBP12P
BA9 PCIEx1_A PEX1A_TX_N1 F25 BJ27
AD26 <20> PEX1A_TX_N1 PETN1 USBP13N
BF9 PEX1A_TX_P1 F23 BK27
AD27 <20> PEX1A_TX_P1 PETP1 USBP13P
PCHINTA_L BK10 BA8 20100910 P20 3VSB
PCHINTB_L PIRQA# AD28 PERN2 R203 10K-04
20100910 BJ5 PIRQB# AD29 BF8 Del By Andy lu R20 PERP2
PCHINTC_L BM15 AV17 PCI bridge C22 BM43 USB_OC_L0 1 2
Del By Andy lu PCHINTD_L PIRQC# AD30 For PCI Bridge PETN2 OC0#_GPIO59 USB_OC_L1
BP5 PIRQD# AD31 BK12 A22 PETP2 OC1#_GPIO40 BD41
For PCI Slots PCHINTE_L BN9 H17 BG41 USB_OC_L2
PCHINTF_L PIRQE#_GPIO2 PERN3 OC2#_GPIO41 USB_OC_L3
AV9 PIRQF#_GPIO3 C_BE0# BN4 20100921 J17 PERP3 OC3#_GPIO42 BK43
PCHINTG_L BT15 BP7 USB3.0 E21 BP43 USB_OC_L4
PIRQG#_GPIO4 C_BE1# Del By Andy lu PETN3 OC4#_GPIO43
C PCHINTH_L BR4 PIRQH#_GPIO5 C_BE2# BG2 B21 PETP3 OC5#_GPIO9 BJ41 USB_OC_L5 07/21 C
BP13 PEX1B_RX_N4 For USB3.0 P17 BT45 USB_OC_L6
C_BE3# <20> PEX1B_RX_N4 PERN4 OC6#_GPIO10
20100909 PEX1B_RX_P4 M17 BM45 USB_OC_L7
<20> PEX1B_RX_P4 PERP4 OC7#_GPIO14
1 OF 12 Add By Andy lu PCIEx1_B <20> PEX1B_TX_N4
PEX1B_TX_N4 F18 PETN4
PEX1B_TX_P4 E17
<20> PEX1B_TX_P4 PETP4
LAN_RX_N6 N15
<26> LAN_RX_N6 PERN5
U1CPT LAN_RX_P6 M15 BP25 ER86 22.6-1-04
<26> LAN_RX_P6 PERP5 USBRBIAS#
LAN LAN_TX_N6 BC149 1 2 .1U-10VX-04 B17 BM25 USBRBIAS 1 2
<26> LAN_TX_N6 PETN5 USBRBIAS
LAN_TX_P6 BC148 1 2 .1U-10VX-04 C16
<26> LAN_TX_P6 PETP5
J15 BD38 CKG_DOT96_N
PERN6 CLKIN_DOT_96N CKG_DOT96_P GND
L15 PERP6 CLKIN_DOT_96P BF38
A16 PETN6
B15 PETP6
J12 ER89 750-1-04
PERN7 DMI2RBIAS
H12 PERP7 DMI2RBIAS A32 1 2
For H61:PCIE 7/8 is disable....From intel Jasmine F15 PETN7
F13 PETP7
H10 GND
VCC3 PERN8
J10 PERP8
RN4 8.2K-8P4R-06 B13 PETN8
SERR_L 1 2 D13 PETP8 2 OF 12
REQ1_L 3 4 GPIO19:
REQ2_L 5 6 Boot Device Select Strap.
PERR_L 7 8
U1CPT
RN3 8.2K-8P4R-06 R143 1K-04-O GNT0_L:
IRDY_L 1 2 1 2 GNT0_L No More Information in EDS V0.7
STOP_L 3 4
FRAME_L 5 6
REQ3_L 7 8 GNT1_L:
B B
Boot Device Select Strap.
RN5 8.2K-8P4R-06
PLOCK_L 1 2 GND
REQ0_L 3 4 GNT2_L:
TRDY_L 5 6 ESI Strap ( Server Only), 20100929
DEVSEL_L 7 8 DON'T Pull Low in Desktop. Change By Andy lu
RN6 8.2K-8P4R-06 GNT3_L:
PCHINTH_L 1 2 Top-Block Swap Override Mode,
PCHINTF_L 3 4 When Sampled Low.
PCHINTE_L 5 6 Stuff for
PCHINTG_L 7 8 Integrated Clock Mode RN14 10K-8P4R-04
RN7 8.2K-8P4R-06 CKG_DMI_N 7 8
PCHINTA_L 1 2 CKG_DMI_P 5 6
PCHINTC_L 3 4 CKG_DOT96_N 3 4
PCHINTD_L 5 6 CKG_DOT96_P 1 2
PCHINTB_L 7 8
Stuff for
GND
Integrated Clock Mode
GNT[0..3]#
GPIO19
have been internal pull high to +VCC3

Boot Device Select:

A BOOT DEVICE GNT1_L GPIO19 A

LPC 0 0
PCI 1 0
Elitegroup Computer Systems
* SPI 1 1
Title
PCH - DMI/PCI/PE/USB
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 14 of 29
5 4 3 2 1
5 4 3 2 1

For H61:SATA port2/3 is disable....From 440377 file


ONLY SATA PORT0 & PORT1 SUPPORT SATA3.0,
ALSO SUPPORT SATA2.0, SATA1.0.
PCHH MOBILE ONLY,
20100923 20100929 PCHC
Add By Andy lu Short By Andy lu NOT FOR DESKTOP.
AT11 R27 CKG_CPU_N
For LPC Debug R139 22-04 CLKOUT_PCI0 CLKIN_GND1_N CKG_CPU_P PCH_CL_CLK1 SATA_RX_N4
CLKIN_GND1_P P27 STP60 1 BA50 CL_CLK1 SATA0RXN AC56 SATA_RX_N4 <22>
<23> SIO33M 1 2 SIO33M_R AN14 CLKOUT_PCI1 * NON AMT STP63 1 PCH_CL_DATA1 BF50 CL_DATA1 SATA0RXP AB55 SATA_RX_P4
SATA_RX_P4 <22>
W53 CK_PD_N STP59 1 PCH_CL_RST1_L BF49 AE46 SATA_TX_N4
CLKIN_GND0_N CL_RST1# SATA0TXN SATA_TX_N4 <22>
PCI_33M_FB_R AT12 V52 CK_PD_P FROM SIO AE44 SATA_TX_P4
<14> PCI_33M_FB CLKOUT_PCI2 CLKIN_GND0_P SATA0TXP SATA_TX_P4 <22>
R145 22-04 PCH_MEPWROK_R BC46
<16,23> PWRGD APWROK
CK_P_33M_LPC 1 2 CK_P_33M_LPC_R AT17 R52 AA53 SATA_RX_N5
D <23> CK_P_33M_LPC CLKOUT_PCI3 CLKOUT_ITPXDP_N SATA1RXN SATA_RX_N5 <22> D
N52 Connect to PWROK on the PCH if not supporting M3 BN21 AA56 SATA_RX_P5
CLKOUT_ITPXDP_P PWM0 SATA1RXP SATA_RX_P5 <22>
AT14 BT21 AG49 SATA_TX_N5
CLKOUT_PCILOOPBACK PWM1 SATA1TXN SATA_TX_N5 <22>
AE2 BM20 AG47 SATA_TX_P5
CLKOUT_PCIE7N PWM2 SATA1TXP SATA_TX_P5 <22>
PDG 0.7 33 Ω ± 5% for Single-End (except PCI Clocks) CLKOUT_PCIE7P AF1 BN19 PWM3
AT9 CLKOUTFLEX0_GPIO64 SATA2RXN AL50

R138 22-04
BA5
AW5
CLKOUTFLEX1_GPIO65 CLKOUT_DMI_N P31
R31
CK_CPU_100M_N <4> CPU GP17_BOMDET1 BT17
SATA2RXP AL49
AL56 20100916
CLKOUTFLEX2_GPIO66 CLKOUT_DMI_P CK_CPU_100M_P <4> TACH0_GPIO17 SATA2TXN
<23> SIO48M 1 2 SIO48M_R BA2 CLKOUTFLEX3_GPIO67
GP1_BOMDET2 BR19 TACH1_GPIO1 SATA2TXP AL53 Change By Andy lu
N56 GP6_BOMDET3 BA22
CLKOUT_DP_N TACH2_GPIO6 From Ports 2,3 to Ports0,1
ER65 90.9-1-04
CLKOUT_DP_P M55 Jack 08/10 GP7_BOMDET4 BR16 TACH3_GPIO7 SATA3RXN AN46
V_1P05_PCH 1 2 XCLK_RCOMP AL2 XCLK_RCOMP <12> GP_V1.05
GP_V1.05 BU16 TACH4_GPIO68 SATA3RXP AN44
CKG_14M AN8 AE6 20100921 TP10 1 GP_VDIMM BM18 AN56
REFCLK14IN CLKOUT_PCIE0N GPIO70_USBDET3 TACH5_GPIO69 SATA3TXN
IN CLKOUT_PCIE0P AC6 Del By Andy lu For USB3.0 TP4 1
THERMAL_ALERT
BN17 TACH6_GPIO70 SATA3TXP AM55
<23> THERMAL_ALERT BP15 TACH7_GPIO71
Layout Note: AA5 20100910 AN49 SATA_RX_N2
CLKOUT_PCIE1N SATA4RXN SATA_RX_N2 <22>
W5 STP54 1 SST_CTL BC43 AN50 SATA_RX_P2
PCI Clock Max 15000MILS CLKOUT_PCIE1P Del By Andy lu For PCI Bridge SST SATA4RXP SATA_RX_P2 <22>
AT50 SATA_TX_N2
SATA4TXN SATA_TX_N2 <22>
AB12 AT49 SATA_TX_P2
CLKOUT_PCIE2N CK_PE_100M_LAN_L <26> SATA4TXP SATA_TX_P2 <22>
XTAL_25M_PCH_OUT GP22
XTAL_25M_PCH_IN
AJ5
AJ3
XTAL25_OUT CLKOUT_PCIE2P AB14 CK_PE_100M_LAN_H <26> LAN TP16
TP22
1
1 GPIO38_KMDET
BA53
BE54
SCLOCK_GPIO22
ER53 1M-04 XTAL25_IN GPIO39_CASE0 SLOAD_GPIO38 SATA_RX_N3
CLKOUT_PCIE3N AB9 TP17 1 BF55 SDATAOUT0_GPIO39 SATA5RXN AT46 SATA_RX_N3 <22>
1 2 AB8 20100909 GPIO48_CASE1 AW53 AT44 SATA_RX_P3
CLKOUT_PCIE3P <12> GPIO48 SDATAOUT1_GPIO48 SATA5RXP SATA_RX_P3 <22>
AV50 SATA_TX_N3
Add By Andy lu SATA5TXN SATA_TX_N3 <22>
X2 X-25M Y9 20101203 AV49 SATA_TX_P3
CLKOUT_PCIE4N PEX1B_100M_N <20> SATA5TXP SATA_TX_P3 <22>
2 1 CLKOUT_PCIE4P Y8 PEX1B_100M_P <20> PCIEx1_B Add By Andy lu
2

AF3 For Down Voltage of DIMM AF55 CKG_SATA_N


CLKOUT_PCIE5N PEX1A_100M_N <20> CLKIN_SATA_N
3

C49 C48 CKG_SATA_P


27P-04 27P-04
CLKOUT_PCIE5P AG2 PEX1A_100M_P <20> PCIEx1_A V_1P05_PCH CLKIN_SATA_P AG56
1

C AB3 BF57 SATALED_L V_1P05_PCH C


CLKOUT_PCIE6N SATALED# SATALED_L <13>
CLKOUT_PCIE6P AA2 AY20 NC_1 SATAICOMPI AJ55

1
BC184 AJ53 SATA1RCOMP 1 2
GND .1U-16VY-04-O SATAICOMPO
CLKOUT_PEG_A_N AG8 PEX16_100M_N <20>
GPIO21_COM2_DET ER92 37.4-1-04
CLKOUT_PEG_A_P AG9 PEX16_100M_P <20> PCIEx16 SATA0GP_GPIO21 BC54

2
AY52 GPIO19
SATA1GP_GPIO19
8 of 12 CLKOUT_PEG_B_N AE12 SATA2GP_GPIO36 BB55 GPIO36_TCM_PST_L
AE11 GND BG53 GPIO37_TCM
CLKOUT_PEG_B_P SATA3GP_GPIO37 GPIO16
SATA4GP_GPIO16 AU56
BA56 GPIO49
SATA5GP_GPIO49 V_1P05_PCH
STITCHING CAPS. SATA3COMPI AE54
U1CPT AE52 SATA3RCOMP 1 2
SATA3RCOMPO
AE50 PCH_TP16 1 STP58 R214 49.9-1-04
TP16 ER93 750-1-04
20100923
AC52 SATA3RBIAS 1 2
Add By Andy lu SATA3RBIAS
For LPC Debug BB57 A20GATE
VCC3 A20GATE A20GATE <23>
BN56 INIT3_3V_L 1 TP25 GND
SC10 INIT3_3V#
2 1 10P-04-O CK_P_33M_LPC_R RJ8(1-2) 10K-04
RCIN# BG56 KBRST_L KBRST_L <23>
1 SERIRQ AV52 SER_IRQ SER_IRQ <23> 07/21
BC150 2 1 10P-04-O SIO33M_R GP1_BOMDET2 2 3 OF 12 E56 CPU_THERMTRIP_L CPU_THERMTRIP_L <4>
THRMTRIP# PECI_PCH
3 PECI H48 PECI_PCH <4>
BC159 2 1 10P-04-O PCI_33M_FB_R F55 PM_SYNC
PMSYNCH PM_SYNC <4>
Detect USB3.0 control IC
BC157 2 1 10P-04-O SIO48M_R GND

VCC3
U1CPT
GND RJ7(1-2) 10K-04
B B
1 Reserve for
GP17_BOMDET1 2 Default GPI set to Pull Up: BOM Detect.
R210 1 2 10K-04 CK_PD_P 3
GPIO36_TCM_PST_L, GPIO37_TCM:
R209 1 2 10K-04 CK_PD_N TCM Header In Eanble TCM,
GND VCC3 Disable TPM.

R196 1 2 10K-04 CKG_CPU_P RN12 10K-8P4R-06


VCC3 SER_IRQ 1 2 GPIO16, GPIO49:
R198 1 2 10K-04 CKG_CPU_N RJ6(1-2) 10K-04 A20GATE 3 4 Reserve for TPM.
1 KBRST_L 5 6
GP6_BOMDET3 2 7 8
GND 3
R163 10K-04
THERMAL_ALERT 1 2
GND
R144 1 2 10K-04 CKG_14M Stuff for
VCC3 R208 10K-04
Integrated Clock Mode
CKa RJ5(1-2) 10K-04 CKG_SATA_N 1 2 Stuff for
1 R207 10K-04
GND GP7_BOMDET4 CKG_SATA_P
Integrated Clock Mode
2 1 2
3

GND
GND
CLK GEN.
Clock Mode CKa
IDT CV184 Circuit.
Integrated Clock Mode X 20101203
A * V
Add By Andy lu A
Buffer Through Mode V X VCC3

R244 10K-04-O RN15 10K-8P4R-06


GPIO36_TCM_PST_L 1
R245
2
10K-04-O
GPIO21_COM2_DET 1
GPIO49
2 Elitegroup Computer Systems
3 4
GPIO37_TCM 1 2 GPIO19 5 6
GPIO16 7 8 Title

GND PCH - SATA / CLK


Size Document Number Rev
Custom H61H2-M2 1.0
Date: Thursday, December 09, 2010 Sheet 15 of 29
5 4 3 2 1
5 4 3 2 1

Buffer Through Mode /


Integrated Clock Mode
have been changed to F/W Strap. 3VSB
PCHD R219 10K-04
Default: Integrated Clock Mode
Doc. Cougar Point Platform Controller Hub PCH_GP44 1 2
(PCH) Family EDS Update V0.7.1 1 2
STP48 1 LPC_DRQ1_L BA20 AW55 FP_AUD_DETECT R215 10K-04-O
LDRQ1#_GPIO23 BMBUSY#_GPIO0 FP_AUD_DETECT <25>
LPC_AD0 BK15 BC56 CLKRUN_L 1 TP18 R216 1K-04
<23> LPC_AD0 FWH0_LAD0 CLKRUN#_GPIO32
LPC_AD1 BJ17 BC25 HDA_DOCK_EN_L 1 STP49 IGC_EN_L 1 2 JTAG CLK FILTER: GND
<23> LPC_AD1 FWH1_LAD1 HDA_DOCK_EN#_GPIO33
LPC_AD2 BJ20 BL56 PCH_PU_GP34 1 TP11
<23> LPC_AD2 FWH2_LAD2 STP_PCI#_GPIO34
LPC_AD3 BG20 BJ57 TP_GPIO35 1 TP21 PCH_GP44
<23> LPC_AD3 FWH3_LAD3 GPIO35
1 LPC_DRQ0_L BK17 Integrated Clock: GND
STP43 LDRQ0#
LPC_FRAME_L BG17 BP51 IGC_EN_L H Enable
D <23> LPC_FRAME_L FWH4_LFRAME# GPIO8
LAN_PHY_PWR_CTRL_GPIO12 BK50 LAN_DISABLE_L 1 STP61 20101203 IGC_EN_L (internal PU) * D

BA25 LPC_PME_L L Bypass


HDA_DOCK_RST#_GPIO13 LPC_PME_L <23> Add By Andy lu
BM55 TLS_EN H Buffer Through Mode
GPIO15 GPIO15 <12> For Down Voltage of DIMM
HDA_BITCLK BU22 BP53 PCH_SKTOCC_L 1 TP20
<24> HDA_BITCLK HDA_RST_L HDA_BCLK GPIO24_MEM_LED ON_DIE_PLL_EN
BC22 BJ55 1 TP15 L Integrated Clock Mode
<24> HDA_RST_L
<24> HDA_SDIN0
HDA_SDIN0 BD22
HDA_RST#
HDA_SDIN0
GPIO28
SLP_LAN#_GPIO29 BH49 SLP_LAN_L 1 STP62
*
BF22 AV43 PCH_GP20_PU
HDA_SDIN1 PCIECLKRQ2#_GPIO20 PCH_GP44
BK22 HDA_SDIN2 PCIECLKRQ5#_GPIO44 BL54 20100929
BJ22 AV44 PCH_GP45
HDA_SDOUT HDA_SDIN3 PCIECLKRQ6#_GPIO45 PCH_GP46
Short By Andy lu
<24> HDA_SDOUT BT23 HDA_SDO PCIECLKRQ7#_GPIO46 BP55 1 TP8
HDA_SYNC BP23 BT53 GP57_5V_DETECT 1 TP7 PCH_GP46
<24> HDA_SYNC HDA_SYNC GPIO57 PCH_SYSPWROK VR_READY
In Sugar Bay Q series Platform,
SYS_PWROK BJ53 VR_READY <9> Enable TLS for vPro.
SPI_MOSI AU53 BJ48 RI_L
<22> SPI_MOSI SPI_MOSI RI# RI_L <21>
SPI_MISO AT55 BK48 PCH_PLTRST_L TLS_EN
<22> SPI_MISO SPI_MISO PLTRST# PCH_PLTRST_L <23>
SPI_CS_L0 AT57 BC44 PCIE_WAKE_L
<22> SPI_CS_L0 SPI_CS0# WAKE# PCIE_WAKE_L <20,26>
SPI_CLK AR54 BC41 SLPAMT_L 1 TLS Confidentiality: DFX TEST MODE Rings Oscillator:
<22> SPI_CLK SPI_CLK SLP_A# STP51
SPI_CS_L1 AR56 BM53 SLP3_L
SPI_CS1# SLP_S3# SLP3_L <4,11,22,23>
BN52 SLP4_L TLS_EN (internal PD) PCH_GP46 (internal PU)
SLP_S4# SLP4_L <23>
PCH_RTCX1 BR39
PCH_RTCX2 RTCX1 SLP5_L
BN39 BH50 1 STP65 H Enable TLS H Enable
RTCRST_L BT41
RTCX2
RTCRST#
SLP_S5#_GPIO63
SUS_STAT#_GPIO61 BN54 LPCPD_L
LPCPD_L <23> 20101021 *
SRTCRST_L BN37 BA47 SUSCLK 1 STP57 L Disable TLS L Bypass
INTRUDER_L BM38
SRTCRST#
INTRUDER#
SUSCLK_GPIO62
BATLOW#_GPIO72 AV46 GPIO72_BOMDET5 1 STP68
Add By Andy lu
For TPM
*
PWRGD PWRGD BJ38 BP45 SUSACK_L 1 TP5
<15,23> PWRGD PWROK SUSACK#
RSMRST_L BK38 BU46 PCH_GP30
<23> RSMRST_L RSMRST# SUSWARN#/SUSPWRDNACK/GPIO30
1

C51 INTVRMEN BN41 BG46 DRAM_PWROK


INTVRMEN DRAMPWROK DRAM_PWROK <4>
.1U-16VY-04-O DPWROK BT37
DSWODVREN DPWROK PCH_GP27
BR42 DSWVRMEN GPIO27 BJ43
2

BG43 PCH_GP31
GPIO31 SLP_SUS_L PCH_SPKR
C
SLP_SUS# BD43 1 STP53 C
GND SMBALERT_L BN49 BT43 SIO_PWRBTN_L ON_DIE_PLL_EN
SMBALERT#_GPIO11 PWRBTN# SIO_PWRBTN_L <23>
SMBCLK BT47
<7,8,20,23,26> SMBCLK SMBCLK
SMBDATA BR49 No Reboot:
<7,8,20,23,26> SMBDATA SMBDATA
SMLK0ALERT_L BU49 BE52 SYS_RST_L On-Die PLL VR:
SML0ALERT#_GPIO60 SYS_RESET# FP_RST_L <4,13>
SMLK0_LAN_CLK BT51 BE56 PCH_SPKR PCH_SPKR (internal PD)
SML0CLK SPKR PCH_SPKR <13>
SMLK0_LAN_DATA BM50 ON_DIE_PLL_EN (internal PU)
SMLK1ALERT_L SML0DATA
BR46 SML1ALERT#_PCHHOT#_GPIO74
H Enable No Reboot
SMLK1_SIO_CLK BJ46 D53 CPU_PWROK H Enable
<23> SMLK1_SIO_CLK
SMLK1_SIO_DATA BK46
SML1CLK_GPIO58 PROCPWRGD CPU_PWROK <4>
L Disable *
<23> SMLK1_SIO_DATA SML1DATA_GPIO75 * L Disable
BC49 PCH_JTAG_RST_R 1 STP67
TP12 PCH_JTAG_TCK_R
JTAG_TCK BA43 1 STP56
VBAT_IO BC52 PCH_JTAG_TDI 1
JTAG_TDI TP24
R202 390K-04 4 OF 12 BF47 PCH_JTAG_TDO 1 STP66
DSWODVREN JTAG_TDO PCH_JTAG_TMS
1 2 JTAG_TMS BC50 1 STP64
R200 1M-04 VBAT_IO
INTRUDER_L 1 2 R201 390K-04
INTVRMEN 1 2 HDA_SYNC

3VSB U1CPT
RN9 2.2K-8P4R-06 Integrated 1.05V SUS VRM: On-Die PLL VR Source:
SMLK0_LAN_DATA 2 1
SMLK0_LAN_CLK 4 3 INTVRMEN HDA_SYNC_R (internal PD)
SMLK1_SIO_CLK 6 5
SMLK1_SIO_DATA 8 7 PCH_RTCX1 H Enable H 1.5V
R221 1K-04 PCH_RTCX2 *
PCIE_WAKE_L 1 2 L Disable L 1.8V
RN8 8.2K-8P4R-06 1 2 CASE *
PCH_GP30 2 1 R204 10M-04
B B
PCH_GP27 4 3 Y1 X-32.768K 1 INTRUDER_L
PCH_GP31 1
6 5 1 2 2 2
PCH_GP45 8 7
1

R220 10K-04
SMBALERT_L BC193 BC194 H2X1-B
1 2
R206 2.2K-04 18P-04 18P-04 3VSB
2

SMLK0ALERT_L 1 2
R205 10K-04

2
SMLK1ALERT_L 1 2
R171 10K-04 GND R118
LPC_PME_L 1 2 When Deep Sleep not implemented: 1K-04
CLR_CMOS 1.PCH_GP30, PCH_GP27 need to be Pull Up. ME_UNLOCK

1
RN11 2.2K-8P4R-06 2.VCCDSW3_3 should to be connected to +3VSB. ME_UN_PU
RI_L VBAT_IO VBAT_IO_S 1 1 HDA_SDOUT
2 1 3.SLP_SUS_L, SUSACK_L left unconnected.
SMBCLK 2 2
4 3 Width 20 mils 4.SUSWARN_L may be used as GPIO30.(Referance to 1.)
SMBDATA 6 5
LPCPD_L H2X1-B
8 7
3

R197 680-04
RSMRST_L 2 1 D8 R106 MC23 RSMRST_L DPWROK ME Enable/Disable
BC189 .1U-16VY-04-O BAT54C-S 20K-04 1U-10VY-06 ME_UNLOCK
2

1 2 For platform not supporting


1 1

1
2
3

ER43 deep sleep connect directly 1-2 UNLOCK


1

20K-1-04
1
2
3

GND R99 3VSB_IO to RSMRST#. Float LOCK


1

1K-04
V_1P5_SM RTCRST_L SRTCRST_L 20100929
CLR_CMOS
ER66 200-1-04
Short By Andy lu
2

DRAM_PWROK 1 2 H3X1-R
+VBAT
1

A A
p

VCC3 MC31
BT 1U-10VY-06 BC116
2

R213 10K-04 SK-CR2032-D 1U-10VY-06


1

SPI_CS_L1 1 2
Elitegroup Computer Systems
n

R226 10K-04
PCH_GP20_PU 1 2
R222 10K-04-O
1 2 Title

PCH_GP45 1 2
PCH - MISC, Strap Function
R217 10K-04-O Size Document Number Rev
Custom 1.0
GND H61H2-M2
Date: Monday, December 06, 2010 Sheet 16 of 29
5 4 3 2 1
5 4 3 2 1

PCHF PCHE

<21> DDPB_HDP_F DDPB_HDP_F T1 AR4 C_HSYNC R156 2 1 33-04 VGA_HSYNC R211 4.7K-04 M48 AB50
DDPB_HPD CRT_HSYNC C_VSYNC R149 2 VGA_VSYNC PROC_SEL NVR_CLE RESERVED_29 RESERVED_22
N2 DDPC_HPD CRT_VSYNC AR2 1 33-04 <4> PROC_SEL 1 2 R47 DF_TVS RESERVED_21 Y50
M1 DDPD_HPD Y41 RESERVED_6 RESERVED_14 AB49
Add damping 2010/7/27 M50 RESERVED_4 RESERVED_13 AB44
1 DDPB_AUXP R8 M49 U49
STP38 DDPB_AUXP RESERVED_3 RESERVED_12
1 DDPB_AUXN R9 AN6 VGA_RED R150 2 1 150-1-04 U43 R44
STP36 DDPB_AUXN CRT_RED RESERVED_2 RESERVED_11
U14 AN2 VGA_GREEN R147 2 1 150-1-04 J57 U50
DDPC_AUXP CRT_GREEN VGA_BLUE R148 2 RESERVED_1 RESERVED_10
D
U12 DDPC_AUXN CRT_BLUE AM1 1 150-1-04 RESERVED_9 U46 D
N6 DDPD_AUXP RESERVED_8 U44
R6 DDPD_AUXN RESERVED_7 H50
CRT_IRTN AM6 RESERVED_20 K46
DDPB_TX2 R14 L56
<21> DDPB_TX2 DDPB_0P RESERVED_19
DDPB_TX2- R12 J55
<21> DDPB_TX2- DDPB_0N RESERVED_18
DDPB_TX1 M11 AW1 VGA_DDC_DATA GND GND F53
<21> DDPB_TX1 DDPB_1P CRT_DDC_DATA RESERVED_17
DDPB_TX1- M12 AW3 VGA_DDC_CLK H52
<21> DDPB_TX1- DDPB_1N CRT_DDC_CLK RESERVED_16
DDPB_TX0 H8 AT3 DACREFSET 2 1 E52
<21> DDPB_TX0 DDPB_2P DAC_IREF RESERVED_15
DDPB_TX0- K8 ER60 1K-1-04
<21> DDPB_TX0- DDPB_2N
DDPB_TXC L5 091222 Update! K50
<21> DDPB_TXC DDPB_3P RESERVED_28
DDPB_TXC- M3 GND Terminating unused DC NAND interface: K49
<21> DDPB_TXC- DDPB_3N RESERVED_27
L2 DDPC_0P RESERVED_26 AB46
J3 Y18 PCH_TP6 1 If not implemented, the dual channel NAND interface signals, G56
DDPC_0N TP6 STP47 RESERVED_25
G2 Y17 PCH_TP7 1
DDPC_1P TP7 PCH_TP8
STP44 including NV_RCOMP, can be left as No Connect.
G4 DDPC_1N TP8 AB18 1 STP46 RESERVED_24 Y44
F3 AB17 PCH_TP9 1 Note: L53
DDPC_2P TP9 STP42 RESERVED_23
F5 DDPC_2N
E4 DDPC_3P VCCPNAND which power the DC NAND interface must be powered RESERVED_5 R50
E2 DDPC_3N even if dual channel NAND interface is not connected since 5 OF 12
D5 DDPD_0P
B5 it also supplies power to other functions inside PCH.
DDPD_0N
C6 DDPD_1P U1CPT
D7 DDPD_1N
100120 Update!
B7 AL12 DDPC_CTRLCLK 1 428880_428880_Cougar_Point_Desktop_Ballout_Mech_Package_Rev1p0.zip:
DDPD_2P DDPC_CTRLCLK STP41
C9 AL14 DDPC_CTRLDATA 1
DDPD_2N DDPC_CTRLDATA STP45 PCHG
E11 DDPD_3P Renamed NV_WE#_CK[0:1], NV_RE#_WRB[0:1], NV_RCOMP, NV_RB#,
B11 DDPD_3N NV_DQ9 / NV_IO[0:15], NV_DQS[0:1], NV_CE#[0:3], and NV_ALE
AL9 H31 C42 FDI_TX_N0
DDPD_CTRLCLK to Reserved(RSVD). TP21 FDI_RXN0 FDI_TX_N0 <3>
U2 AL8 J31 B43 FDI_TX_P0
SDVO_INTP DDPD_CTRLDATA TP25 FDI_RXP0 FDI_TX_P0 <3>
C T3 SDVO_INTN
Renamed NV_CLE to DF_TVS. C29 TP29 FDI_RXN1 F45 FDI_TX_N1
FDI_TX_N1 <3> C
E29 F43 FDI_TX_P1
TP33 FDI_RXP1 FDI_TX_P1 <3>
AL15 DDPB_CTRLCLK H41 FDI_TX_N2
SDVO_CTRLCLK DDPB_CTRLCLK <21> FDI_RXN2 FDI_TX_N2 <3>
W3 AL17 DDPB_CTRLDATA J27 J41 FDI_TX_P2
SDVO_STALLP SDVO_CTRLDATA DDPB_CTRLDATA <21> TP22 FDI_RXP2 FDI_TX_P2 <3>
U5 L27 C46 FDI_TX_N3
SDVO_STALLN TP26 FDI_RXN3 FDI_TX_N3 <3>
F28 D47 FDI_TX_P3
TP30 FDI_RXP3 FDI_TX_P3 <3>
U8 E27 B45 FDI_TX_N4
SDVO_TVCLKINP TP34 FDI_RXN4 FDI_TX_N4 <3>
U9 A46 FDI_TX_P4
SDVO_TVCLKINN FDI_RXP4 FDI_TX_P4 <3>
6 of 12 FDI_RXN5 B47 FDI_TX_N5
FDI_TX_N5 <3>
J25 C49 FDI_TX_P5
TP23 FDI_RXP5 FDI_TX_P5 <3>
L25 J43 FDI_TX_N6
TP27 FDI_RXN6 FDI_TX_N6 <3>
U1CPT C26 H43 FDI_TX_P6
TP31 FDI_RXP6 FDI_TX_P6 <3>
B27 M43 FDI_TX_N7
TP35 FDI_RXN7 FDI_TX_N7 <3>
P43 FDI_TX_P7
FDI_RXP7 FDI_TX_P7 <3>
L22 B51 FDI_FSYNC0
TP24 FDI_FSYNC0 FDI_LSYNC0 FDI_FSYNC0 <3>
J22 TP28 FDI_LSYNC0 E49 FDI_LSYNC0 <3>
B25 C52 FDI_FSYNC1
TP32 FDI_FSYNC1 FDI_LSYNC1 FDI_FSYNC1 <3>
D25 TP36 FDI_LSYNC1 D51 FDI_LSYNC1 <3>
H46 FDI_INT
VCC3 VCC3 FDI_INT FDI_INT <3>
VCC_DDC VCC_DDC

7 OF 12
2

2
1

1
R12 R23 R11 U1CPT
G

G
R24 Q2 6.8K-04 Q1 6.8K-04
2.2K-04
1

1
2.2K-04
2

2
VGA_DDC_CLK S D DDCCLK VGA_DDC_DATA S D DDCDATA
B B

2N7002-S 2N7002-S
10-007-015410 ESD
VGA VCC_DDC
CONN-15P3R-VGA U2
DDCDATA 1 4 VGA_HSYNC
16
16 2 5
6 DDCCLK 3 6 VGA_VSYNC
FB2 FB80-06-B 6

1
VGA_RED RED GND ESD-6P BC11
1 2 1 RED 1 11 11
7 .1U-16VY-04
FB3 FB80-06-B 7

2
VGA_GREEN GREEN GND DDCDATA
1 2 2 GRN 2 12
SDATA 12
8
FB4 FB80-06-B 8

VGA_BLUE BLUE GND VGA_HSYNC


1 2 3 BLU 3 13
HSYNC 13
9 VCC_DDC
9 U1
VCC VSYNC 14 VGA_VSYNC RED BLUE
4 1 4
1

4 14

10 2 5
ER12 ER13 ER14 BC24 BC25 BC26 BC17 BC16 BC15 10
3 6 GREEN
150-1-04 150-1-04 150-1-04 22P-04-O 22P-04-O 22P-04-O 10P-04-O 10P-04-O 10P-04-O GND DDCCLK
5 GND SCLK 15
2

1
5 15
ESD-6P BC23
2

1
.1U-16VY-04
17
17 BC9 BC21 BC22 BC10

2
20100929 47P-04-O 10P-04-O 10P-04-O 47P-04-O
2

2
Close to Connector Change By Andy lu
A A

Close to Connector
20100929
Change By Andy lu Elitegroup Computer Systems
Title
PCH - DP/VGA/FDI
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 17 of 29
5 4 3 2 1
5 4 3 2 1

VCC VCC3

1.05V 1.05V

1
D10 MAX 6.2A MAX 6.2A
BAT54C-S
V_1P05_PCH V_1P05_PCH
R135 10-04 PCHI

3
1 2
PCHJ F20 VCCIO_024 VCCCORE_001 AC24
1

D
1 Close to BF1 V_1P8_SFR F30 VCCIO_025 VCCCORE_002 AC26 D
BC111 MC71 MAX <1mA V25 AC28
.1U-16VY-04-O 1U-10VY-06 +V_REF5V VCCVRM_A VCCVRM_A VCCIO_026 VCCCORE_003
BF1 V5REF VCCVRM_01 AJ1 V27 VCCIO_027 VCCCORE_004 AC30
2

R2 VCCVRM_B VCCVRM_B V31 AC32


MAX <1mA VCCVRM_04 VCCVRM_C VCCVRM_C VCCIO_028 VCCCORE_005
VCCVRM_03 R54 V33 VCCIO_029 VCCCORE_006 AE24
GND GND +V_REF5V_SUS BT25 R56 Y24 AE28
V5REF_SUS VCCVRM_02 VCCIO_030 VCCCORE_007

1
20100929 V_1P8_SFR Near PCH. Y26 AE30
MC65 VCCIO_031 VCCCORE_008
Change By Andy lu Y30 VCCIO_032 VCCCORE_009 AE32
3VSB MAX 123mA AV28 T55 10U-10VY-08 Y32 AE34
VCCSUSHDA VCCDFTERM_01 VCCIO_033 VCCCORE_010

2
5VSB 3VSB T57 Y34 AE36
VCCDFTERM_02 VCCIO_034 VCCCORE_011

1
Close to T55 AG32
BC197 GND VCCCORE_012
VCC3_3_05 AL38 VCCCORE_013 AG34
VCC3 AU20 AN38 .1U-16VY-04 AJ32
VCC3_3_09 VCC3_3_06 VCCCORE_014

2
2

D12 AV20 AA34 AJ34


BAT54C-S MAX 203mA VCC3_3_10 VCC3 VCCIO_022 VCCCORE_015
AU22 VCC3_3_07 AA36 VCCIO_023 VCCCORE_016 AJ36
BC17 GND AL32
VCC3 3.3V VCC3_3_02 VCCCORE_017
VCC3_3_03 BD17 V22 VCCIO_035 VCCCORE_018 AL34
R189 10-04 MAX 16mA BD20 1.05V/1.00V Y20 AN32 1.05V
VCC3_3_04 VCCIO_036 VCCCORE_019
3

1
1 2 AN52 Close to AF57 Close to A12 Y22 AN34
VCCSPI SC12 BC137 MAX TBD VCCIO_037 VCCCORE_020 MAX 1.8A
VCCCORE_021 AR32
1

Close to BT25 .1U-16VY-04-X-O .1U-16VY-04 V_CPUVTT AR34


VCCCORE_022

2
BC185 MC80 SC11 V_1P05_ME
.1U-16VY-04 1U-10VY-06 4.7U-16VY-08-X-O A12 AMT Only
VCC3_3_08
2

AF57 GND GND B41 AG24


VCC3_3_01 VCCDMI_02 VCCASW_004
E41 VCCDMI_01 VCCASW_005 AG26

1
GND GND GND AG28
VCCASW_006

1
Close to B41, E41 AJ24 SC15 SC13
MC78 VCCASW_007 1U-10VY-06-O 10U-10VY-08-O
VCCSUS3_3_011 BT35 AL40 VCCIO_008 VCCASW_008 AJ26

2
100mA up AV30 3VSB 1U-10VY-06 AN40 AJ28
VCCSUS3_3_002 VCCIO_009 VCCASW_009

2
3VSB +V_3P3_DAC AT1 AV32 AN41 AL24
VCCADAC VCCSUS3_3_003 VCCIO_010 VCCASW_010
C
VCCSUS3_3_004 AY31 VCCASW_011 AL28 C
100mA up AY33 GND AG38 AN22 GND GND
VCCSUS3_3_005 VCCIO_020 VCCASW_012

1
+VCCA_DPLLA AB1 BJ36 Close to BT35 AG40 AN24
VCCADPLLA VCCSUS3_3_006 VCCIO_021 VCCASW_013
1

Close to AV28 BK36 SC17 AG41 AN26 Close to AJ24, AN22


BC202 100mA up VCCSUS3_3_007 .1U-16VY-04-X-O VCCIO_007 VCCASW_014
VCCSUS3_3_008 BM36 100mA up VCCASW_015 AN28

2
.1U-16VY-04 +VCCA_DPLLB AC2 AT40 AR24
VCCADPLLB VCCSUS3_3_009 VCCASW_016
2

USB Classic Filter VCCSUS3_3_010 AU38 U56 VCCAPLLSATA VCCASW_017 AR26


U31 GND AR28
VCCSUS3_3_001 VCCASW_018
100mA up BA38 VCCIO_019 VCCASW_019 AR30
For platform not supporting VCCASW_020 AR36
GND AV40 deep sleep connect directly to +3VSB. B53 AR38
VCCDSW3_3 V_CPUVTT VCCAPLLEXP VCCASW_021
VCCASW_022 AU30
D55 1 +VCCIPL_PLL_PCH C54 AU36
V_PROC_IO TP6 VCCAFDIPLL VCCASW_023
20100929 V_PROC_IO_NCTF B56
V_1P05_PCH 1 +VCCCLK_PLL_PCH AL5
Change By Andy lu STP37 VCCACLK

1
L10 0-08 A39 V_1P1_USB Close to D55
+VCCA_DPLLA DCPSUS_03 PCH_TP24 1 VBAT_IO MC81 BC200
1 2 DCPSUS_01 AA32 STP50 A19 VCCAPLLDMI2 VCCASW_003 AU34
10U-10VY-08 .1U-16VY-04-O AV36
VCCASW_002

2
MAX <1mA
1

Close to AB1 BU42 AU32


MC63 MC69 VCCRTC VCCASW_001
10U-10VY-08 1U-10VY-06-O GND GND
2

DCPRTC BR54 20100929 VCCDIFFCLKN_01 AE15

1
BT56 V_1P5_RTC_INT Close to BU42 AE17
GND GND DCPRTC_NCTF MC77
Change By Andy lu VCCDIFFCLKN_02
VCCDIFFCLKN_03 AG15
L11 0-08 1U-10VY-06 AJ20 +V_1P05_PCH_SRC
VCCCLKDMI

2
1 2 +VCCA_DPLLB AT41 PCH_TP25 1 STP52 AE40
DCPSUS_02 VCCIO_018
10 of 12 VCCSSC_01 AC20
1

Close to AC1 AV41 PCH_TP26 1 STP55 GND AE20


MC64 MC70 DCPSUSBYP VCCSSC_02
10U-10VY-08 1U-10VY-06-O BA46 PCH_DCPSST
DCPSST
2

B B
VCCIO_001 AV24
1

1
Close to BA46 Close to BR54 Close to A39 AV26
GND GND SC19 BC201 BC191 VCCIO_002
U1CPT VCCIO_003 AY25
L9 0-08 .1U-16VY-04-X-O .1U-16VY-04 .1U-16VY-04-O AY27
VCCIO_004
2

2
1 2 +V_1P05_PCH_SRC
1

Close to AJ20 GND GND GND V36


MC62 MC68 VCCIO_013
10U-10VY-08 1U-10VY-06-O Y36
VCCIO_012
2

VCCIO_011 AJ38
GND GND 9 of 12
VCCIO_014 Y28

U1CPT

VCC3 VCC3 V_1P05_PCH


L12 FB120-06
1 2 +V_3P3_DAC
1

1
A A
MC67 C50 SC20 MC66 MC59 MC83 MC82 SC16 SC18
10U-10VY-08-O 1U-10VY-06 .1U-16VY-04-X-O 10U-10VY-08 10U-10VY-08 1U-10VY-06 1U-10VY-06 1U-10VY-06-X-O 1U-10VY-06-X-O
2

2
GND GND
GND GND
Elitegroup Computer Systems
Title
PCH - PWR
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Friday, December 03, 2010 Sheet 18 of 29
5 4 3 2 1
A
B
C
D

5
5

L12 VSS_0231 TP3 L33 BC15 VSS_0125 VSS_0005 A26


L17 VSS_0232 TP13 AE49 BC20 VSS_0126 VSS_0006 A29
L38 VSS_0233 TP17 BA36 BC27 VSS_0127 VSS_0007 A42
L41 VSS_0234 TP18 AY36 BC31 VSS_0128 VSS_0008 A49
L43 VSS_0235 TP19 Y14 BC36 VSS_0129 VSS_0009 A9
M20 VSS_0236 TP20 Y12 BC38 VSS_0130 VSS_0010 AA20
M22 VSS_0237 TP1 P22 BC47 VSS_0131 VSS_0011 AA22
M25 VSS_0238 TP4 M38 BC9 VSS_0132 VSS_0012 AA24
M27 VSS_0239 VSS_0296 P25 BD25 VSS_0133 VSS_0013 AA26
M31 VSS_0240 VSS_0295 R25 BD33 VSS_0134 VSS_0014 AA28
VSS_0294 P36 BF12 VSS_0135 VSS_0015 AA30
VSS_0293 R36 BF20 VSS_0136 VSS_0016 AA38
TP2 L31 BF25 VSS_0137 VSS_0017 AB11
T52 VSS_0260 TP5 L36 BF33 VSS_0138 VSS_0018 AB15
T6 VSS_0261 VSS_0292 AL44 BF41 VSS_0139 VSS_0019 AB40
U11 VSS_0262 VSS_0291 AL43 BF43 VSS_0140 VSS_0020 AB41
U15 VSS_0263 BF46 VSS_0141 VSS_0021 AB43
U17 VSS_0264 BF52 VSS_0142 VSS_0022 AB47
U20 VSS_0265 TP14 AE41 BF6 VSS_0143 VSS_0023 AB52
U22 VSS_0266 TP15 AE43 BG22 VSS_0144 VSS_0024 AB57
U25 VSS_0267 BG25 VSS_0145 VSS_0025 AB6
U27 VSS_0268 BG27 VSS_0146 VSS_0026 AC22
U33 VSS_0269 TP11 BA27 BG31 VSS_0147 VSS_0027 AC34
U36 VSS_0270 BG33 VSS_0148 VSS_0028 AC36
U38 VSS_0271 BG36 VSS_0149 VSS_0029 AC38
U41 VSS_0272 BG38 VSS_0150 VSS_0030 AC4

GND
U47 VSS_0273 BH52 VSS_0151 VSS_0031 AC54
U53 VSS_0274 BH6 VSS_0152 VSS_0032 AE14
V20 VSS_0275 BJ1 VSS_0153 VSS_0033 AE18
V38 VSS_0276 BJ15 VSS_0154 VSS_0034 AE22
V6 VSS_0277 TP10 BM46 BK20 VSS_0155 VSS_0035 AE26

4
4

W1 VSS_0278 BK41 VSS_0156 VSS_0036 AE38


W55 VSS_0279 L_BKLTCTL AG12 BK52 VSS_0157 VSS_0037 AE4
W57 VSS_0280 L_BKLTEN AG18 BK6 VSS_0158 VSS_0038 AE47
Y11 VSS_0281 L_VDD_EN AG17 BM10 VSS_0159 VSS_0039 AE8
Y15 VSS_0282 BM12 VSS_0160 VSS_0040 AE9
Y38 VSS_0283 BM16 VSS_0161 VSS_0041 AF52
Y40 VSS_0284 BM22 VSS_0162 VSS_0042 AF6
Y43 VSS_0285 BM23 VSS_0163 VSS_0043 AG11
Y46 VSS_0286 BM26 VSS_0164 VSS_0044 AG14
Y47 VSS_0287 BM28 VSS_0165 VSS_0045 AG20
Y49 VSS_0288 BM32 VSS_0166 VSS_0046 AG22
Y52 VSS_0289 BM40 VSS_0167 VSS_0047 AG30
Y6 VSS_0290 BM42 VSS_0168 VSS_0048 AG36
BM48 VSS_0169 VSS_0049 AG43
BM5 VSS_0170 VSS_0050 AG44
A4 VSS_NCTF_001 BN31 VSS_0171 VSS_0051 AG46
A6 VSS_NCTF_002 BN47 VSS_0172 VSS_0052 AG5
B2 VSS_NCTF_003 BN6 VSS_0173 VSS_0053 AG50
BM1 VSS_NCTF_004 BP3 VSS_0174 VSS_0054 AG53
BM57 VSS_NCTF_005 BP33 VSS_0175 VSS_0055 AH52
BP1 VSS_NCTF_006 BP35 VSS_0176 VSS_0056 AH6
BP57 VSS_NCTF_007 BR22 VSS_0177 VSS_0057 AJ22
BT2 VSS_NCTF_008 BR52 VSS_0178 VSS_0058 AJ30
BU4 VSS_NCTF_009 BU19 VSS_0179 VSS_0059 AJ57
BU52 VSS_NCTF_010 BU26 VSS_0180 VSS_0060 AK52
BU54 VSS_NCTF_011 BU29 VSS_0181 VSS_0061 AK6
BU6 VSS_NCTF_012 BU36 VSS_0182 VSS_0062 AL11
D1 VSS_NCTF_013 BU39 VSS_0183 VSS_0063 AL18
F1 VSS_NCTF_014 C19 VSS_0184 VSS_0064 AL20
C32 VSS_0185 VSS_0065 AL22
C39 VSS_0186 VSS_0066 AL26
C4 VSS_0187 VSS_0067 AL30
AY22 VSS_0004 D15 VSS_0188 VSS_0068 AL36
C12 D23 AL41

3
3

VSS_0003 VSS_0189 VSS_0069


AE56 VSS_0001 D3 VSS_0190 VSS_0070 AL46
BR36 VSS_0002 D35 VSS_0191 VSS_0071 AL47
AU2 VSSADAC D43 VSS_0192 VSS_0072 AM3
D45 VSS_0193 VSS_0073 AM52
E19 VSS_0194 VSS_0074 AM57
A54 TS_VSS1 E39 VSS_0195 VSS_0075 AN11
A52 TS_VSS2 E54 VSS_0196 VSS_0076 AN12
F57 TS_VSS3 E6 VSS_0197 VSS_0077 AN15
D57 TS_VSS4 E9 VSS_0198 VSS_0078 AN17
GND

12 of 12 F10 VSS_0199 VSS_0079 AN18


F12 VSS_0200 VSS_0080 AN20
F16 VSS_0201 VSS_0081 AN30
F22 VSS_0202 VSS_0082 AN36
PCHL

F26 AN4
U1CPT

VSS_0203 VSS_0083
F32 VSS_0204 VSS_0084 AN43
F33 VSS_0205 VSS_0085 AN47
F35 VSS_0206 VSS_0086 AN54
F36 VSS_0207 VSS_0087 AN9
F40 VSS_0208 VSS_0088 AR20
F42 VSS_0209 VSS_0089 AR22
F46 VSS_0210 VSS_0090 AR52
F48 VSS_0211 VSS_0091 AR6
F50 VSS_0212 VSS_0092 AT15
F8 VSS_0213 VSS_0093 AT18
VSS_0094 AT43
VSS_0095 AT47
AV18 VSS_0104 VSS_0096 AT52
AV22 VSS_0105 VSS_0097 AT6
AV34 VSS_0106 VSS_0098 AT8
AV38 VSS_0107 VSS_0099 AU24
AV47 VSS_0108 VSS_0100 AU26
AV6 VSS_0109 VSS_0101 AU28
AW57 VSS_0110 VSS_0102 AU5
2
2

AY38 VSS_0111 VSS_0103 AV12


AY6 VSS_0112
B23 VSS_0113 VSS_0119 BA49
BA11 VSS_0114 VSS_0120 BB1
BA12 VSS_0115 VSS_0121 BB3
BA31 VSS_0116 VSS_0122 BB52
BA41 VSS_0117 VSS_0123 BB6
BA44 VSS_0118 VSS_0124 BC14

VSS_0241 M33
VSS_0242 M36
G54 VSS_0214 VSS_0243 M46
H15 VSS_0215 VSS_0244 M52
H20 VSS_0216 VSS_0245 M57
H22 VSS_0217 VSS_0246 M6
H25 VSS_0218 VSS_0247 M8
Title

Size

Date:

H27 VSS_0219 VSS_0248 M9


Custom

H33 VSS_0220 VSS_0249 N4


H6 VSS_0221 VSS_0250 N54
J1 VSS_0222 VSS_0251 R11
J33 VSS_0223 VSS_0252 R15
J46 VSS_0224 VSS_0253 R17
J48 VSS_0225 VSS_0254 R22
J5 VSS_0226 VSS_0255 R4
J53 VSS_0227 VSS_0256 R41
K52 R43
Document Number

VSS_0228 VSS_0257
K6 VSS_0229 VSS_0258 R46
K9 VSS_0230 VSS_0259 R49
Friday, December 03, 2010

11 of 12
GND
GND

1
1

PCHK
U1CPT

PCH - GND
H61H2-M2
Sheet
19
of
29
Rev
Elitegroup Computer Systems

1.0
A
B
C
D
5 4 3 2 1

3VSB VCC3 +12V


PCI-E X16 Slot SPEC.: PCI-E X1 Slot SPEC.: +12V +12V

+VCC3/S0/3A +VCC3/S0/3A VCC3 VCC3


+V12/S0/5.5A PCIEX16 +V12/S0/0.5A 3VSB
B1 A1 GND PCIE1
+3VSB/0.375A B2
12V PRSNT1*
A2 +3VSB/0.375A B1 A1
12V 12V 12V_A PRSNT1*
B3 12V 12V A3 B2 12V_B 12V_C A2
B4 GND GND A4 B3 12V_D 12V_E A3
SMBCLK B5 A5 B4 A4
<7,8,16,23,26> SMBCLK SMCLK JTAG2 GND1 GND2
SMBDATA B6 A6 SMBCLK B5 A5
<7,8,16,23,26> SMBDATA SMDAT JTAG3 SMCLK JTAG2
B7 A7 SMBDATA B6 A6
D GND JTAG4 SMDAT JTAG3 D
B8 3.3V JTAG5 A8 B7 GND3 JTAG4 A7
B9 JTAG1 3.3V A9 B8 3.3V_A JTAG5 A8
B10 3.3VAUX 3.3V A10 B9 JTAG1 3.3V_B A9
PCIE_WAKE_L B11 A11 PCIE_RST B10 A10
<16,26> PCIE_WAKE_L WAKE# PWRGD PCIE_WAKE_L 3.3VAUX 3.3V_C PCIE_RST
________ KEY ________ B11 WAKE# PWRGD A11
B12 RSVD_A GND A12 ________ KEY ________
BC81 .22U-16V-04 B13 A13 PEX16_100M_P B12 A12
GND REFCLK_+_H PEX16_100M_P <15> RSVD_A GND4
PEG_TX_P0 2 1 PEG_TX_C_P0 B14 A14 PEX16_100M_N BC82 .1U-10VX-04 B13 A13 PEX1A_100M_P
<3> PEG_TX_P0 HSOP0_H REFCLK_-_L PEX16_100M_N <15> GND5 REFCLK_+_H PEX1A_100M_P <15>
PEG_TX_N0 2 1 PEG_TX_C_N0 B15 A15 <14> PEX1A_TX_P1 PEX1A_TX_P1 2 1PEX1A_TX_C_P1 B14 A14 PEX1A_100M_N
<3> PEG_TX_N0 HSON0_L GND HSOP0_H REFCLK_-_L PEX1A_100M_N <15>
BC78 .22U-16V-04 B16 A16 PEG_RX_P0 <14> PEX1A_TX_N1 PEX1A_TX_N1 2 1PEX1A_TX_C_N1 B15 A15
GND HSIP0_H PEG_RX_N0 PEG_RX_P0 <3> HSON0_L GND6 PEX1A_RX_P1
B17 PRSNT2*_B17 HSIN0_L A17 PEG_RX_N0 <3> B16 GND7 HSIP0_H A16 PEX1A_RX_P1 <14>
B18 A18 BC79 .1U-10VX-04 B17 A17 PEX1A_RX_N1 PEX1A_RX_N1 <14>
BC84 .22U-16V-04 GND GND PRSNT2# HSIN0_L
____________________ B18 GND8 GND9 A18
PEG_TX_P1 2 1 PEG_TX_C_P1 B19 A19
<3> PEG_TX_P1 HSOP1_H RSVD_B
PEG_TX_N1 2 1 PEG_TX_C_N1 B20 A20 PCIEX1-W
<3> PEG_TX_N1 HSON1_L GND
BC91 .22U-16V-04 B21 A21 PEG_RX_P1
BC92 .22U-16V-04 GND HSIP1_H PEG_RX_N1 PEG_RX_P1 <3> GND GND
B22 GND HSIN1_L A22 PEG_RX_N1 <3>
PEG_TX_P2 2 1 PEG_TX_C_P2 B23 A23
<3> PEG_TX_P2 HSOP2_H GND
PEG_TX_N2 2 1 PEG_TX_C_N2 B24 A24 PCI-E X1 A
<3> PEG_TX_N2 HSON2_L GND
BC93 .22U-16V-04 B25 A25 PEG_RX_P2
BC94 .22U-16V-04 GND HSIP2_H PEG_RX_N2 PEG_RX_P2 <3>
B26 GND HSIN2_L A26 PEG_RX_N2 <3>
PEG_TX_P3 2 1 PEG_TX_C_P3 B27 A27
<3> PEG_TX_P3 HSOP3_H GND
PEG_TX_N3 2 1 PEG_TX_C_N3 B28 A28
<3> PEG_TX_N3 HSON3_L GND
BC96 .22U-16V-04 B29 A29 PEG_RX_P3
GND HSIP3_H PEG_RX_N3 PEG_RX_P3 <3>
B30 RSVD_C HSIN3_L A30 PEG_RX_N3 <3>
B31 PRSNT2*_B31 GND A31
B32 GND RSVD_D A32
BC106 .22U-16V-04 ____________________
PEG_TX_P4 2 1 PEG_TX_C_P4 B33 A33
<3> PEG_TX_P4 HSOP4_H RSVD_E
C PEG_TX_N4 2 1 PEG_TX_C_N4 B34 A34 C
<3> PEG_TX_N4 HSON4_L GND
BC108 .22U-16V-04 B35 A35 PEG_RX_P4
BC113 .22U-16V-04 GND HSIP4_H PEG_RX_N4 PEG_RX_P4 <3>
B36 GND HSIN4_L A36 PEG_RX_N4 <3>
PEG_TX_P5 2 1 PEG_TX_C_P5 B37 A37 PCI-E X1 Slot SPEC.: +12V +12V
<3> PEG_TX_P5 HSOP5_H GND
PEG_TX_N5 2 1 PEG_TX_C_N5 B38 A38
<3> PEG_TX_N5
BC114 .22U-16V-04 B39
HSON5_L GND
A39 PEG_RX_P5 +VCC3/S0/3A VCC3 VCC3
GND HSIP5_H PEG_RX_P5 <3>
PEG_TX_P6
BC119 .22U-16V-04
PEG_TX_C_P6
B40 GND HSIN5_L A40 PEG_RX_N5
PEG_RX_N5 <3> +V12/S0/0.5A 3VSB
2 1 B41 A41 PCIE2
<3> PEG_TX_P6
PEG_TX_N6 2 1 PEG_TX_C_N6 B42
HSOP6_H GND
A42 +3VSB/0.375A B1 A1
<3> PEG_TX_N6 HSON6_L GND 12V_A PRSNT1*
BC118 .22U-16V-04 B43 A43 PEG_RX_P6 B2 A2
BC124 .22U-16V-04 GND HSIP6_H PEG_RX_N6 PEG_RX_P6 <3> 12V_B 12V_C
B44 GND HSIN6_L A44 PEG_RX_N6 <3> B3 12V_D 12V_E A3
PEG_TX_P7 2 1 PEG_TX_C_P7 B45 A45 B4 A4
<3> PEG_TX_P7 HSOP7_H GND GND1 GND2
PEG_TX_N7 2 1 PEG_TX_C_N7 B46 A46 SMBCLK B5 A5
<3> PEG_TX_N7 HSON7_L GND SMCLK JTAG2
BC125 .22U-16V-04 B47 A47 PEG_RX_P7 SMBDATA B6 A6
GND HSIP7_H PEG_RX_N7 PEG_RX_P7 <3> SMDAT JTAG3
B48 PRSNT2*_B48 HSIN7_L A48 PEG_RX_N7 <3> B7 GND3 JTAG4 A7
B49 GND GND A49 B8 3.3V_A JTAG5 A8
BC128 .22U-16V-04 ____________________ B9 A9
PEG_TX_P8 PEG_TX_C_P8 JTAG1 3.3V_B
<3> PEG_TX_P8 2 1 B50 HSOP8_H RSVD_F A50 B10 3.3VAUX 3.3V_C A10
PEG_TX_N8 2 1 PEG_TX_C_N8 B51 A51 PCIE_WAKE_L B11 A11 PCIE_RST
<3> PEG_TX_N8 HSON8_L GND WAKE# PWRGD
BC136 .22U-16V-04 B52 A52 PEG_RX_P8 ________ KEY ________
BC141 .22U-16V-04 GND HSIP8_H PEG_RX_N8 PEG_RX_P8 <3>
B53 GND HSIN8_L A53 PEG_RX_N8 <3> B12 RSVD_A GND4 A12
PEG_TX_P9 2 1 PEG_TX_C_P9 B54 A54 BC80 .1U-10VX-04 B13 A13 PEX1B_100M_P
<3> PEG_TX_P9 HSOP9_H GND GND5 REFCLK_+_H PEX1B_100M_P <15>
PEG_TX_N9 2 1 PEG_TX_C_N9 B55 A55 <14> PEX1B_TX_P4 PEX1B_TX_P4 2 1PEX1B_TX_C_P4 B14 A14 PEX1B_100M_N
<3> PEG_TX_N9 HSON9_L GND HSOP0_H REFCLK_-_L PEX1B_100M_N <15>
BC142 .22U-16V-04 B56 A56 PEG_RX_P9 <14> PEX1B_TX_N4 PEX1B_TX_N4 2 1PEX1B_TX_C_N4 B15 A15
BC145 .22U-16V-04 GND HSIP9_H PEG_RX_N9 PEG_RX_P9 <3> HSON0_L GND6 PEX1B_RX_P4
B57 GND HSIN9_L A57 PEG_RX_N9 <3> B16 GND7 HSIP0_H A16 PEX1B_RX_P4 <14>
PEG_TX_P10 2 1 PEG_TX_C_P10 B58 A58 BC83 .1U-10VX-04 B17 A17 PEX1B_RX_N4 PEX1B_RX_N4 <14>
<3> PEG_TX_P10 HSOP10_H GND PRSNT2# HSIN0_L
PEG_TX_N10 2 1 PEG_TX_C_N10 B59 A59 B18 A18
<3> PEG_TX_N10 HSON10_L GND GND8 GND9
BC146 .22U-16V-04 B60 A60 PEG_RX_P10
BC161 .22U-16V-04 GND HSIP10_H PEG_RX_N10 PEG_RX_P10 <3> PCIEX1-W
B61 GND HSIN10_L A61 PEG_RX_N10 <3>
PEG_TX_P11 2 1 PEG_TX_C_P11 B62 A62 20100909
B <3> PEG_TX_P11 HSOP11_H GND B
PEG_TX_N11 2 1 PEG_TX_C_N11 B63 A63 GND GND
<3> PEG_TX_N11 HSON11_L GND Add By Andy lu
BC158 .22U-16V-04 B64 A64 PEG_RX_P11
BC165 .22U-16V-04 GND HSIP11_H PEG_RX_N11 PEG_RX_P11 <3>
B65 GND HSIN11_L A65 PEG_RX_N11 <3> PCI-E X1 B
PEG_TX_P12 2 1 PEG_TX_C_P12 B66 A66
<3> PEG_TX_P12 HSOP12_H GND
PEG_TX_N12 2 1 PEG_TX_C_N12 B67 A67
<3> PEG_TX_N12 HSON12_L GND
BC166 .22U-16V-04 B68 A68 PEG_RX_P12
BC169 .22U-16V-04 GND HSIP12_H PEG_RX_N12 PEG_RX_P12 <3>
B69 GND HSIN12_L A69 PEG_RX_N12 <3>
PEG_TX_P13 2 1 PEG_TX_C_P13 B70 A70
<3> PEG_TX_P13 HSOP13_H GND
PEG_TX_N13 2 1 PEG_TX_C_N13 B71 A71 20100929
<3> PEG_TX_N13 HSON13_L GND
BC173 .22U-16V-04 B72 A72 PEG_RX_P13
BC183 .22U-16V-04 GND HSIP13_H PEG_RX_N13 PEG_RX_P13 <3> Change By Andy lu
B73 GND HSIN13_L A73 PEG_RX_N13 <3>
PEG_TX_P14 2 1 PEG_TX_C_P14 B74 A74
<3> PEG_TX_P14 HSOP14_H GND
PEG_TX_N14 2 1 PEG_TX_C_N14 B75 A75
<3> PEG_TX_N14 HSON14_L GND
BC178 .22U-16V-04 B76 A76 PEG_RX_P14 3VSB VCC3 +12V
BC188 .22U-16V-04 GND HSIP14_H PEG_RX_N14 PEG_RX_P14 <3>
B77 GND HSIN14_L A77 PEG_RX_N14 <3>
PEG_TX_P15 2 1 PEG_TX_C_P15 B78 A78
<3> PEG_TX_P15 HSOP15_H GND
PEG_TX_N15 2 1 PEG_TX_C_N15 B79 A79
<3> PEG_TX_N15 HSON15_L GND

1
BC187 .22U-16V-04 B80 A80 PEG_RX_P15
GND HSIP15_H PEG_RX_N15 PEG_RX_P15 <3> BC72 BC65 BC61
B81 PRSNT2*_B81 HSIN15_L A81 PEG_RX_N15 <3>
CRB V0.7 B82 A82 .1U-16VY-04-O .1U-16VY-04-O .1U-16VY-04-O
RSVD_G GND

2
Change to .22U-X7-04
FROM SIO PCIRST#
PCIEX16-GY PCIE_RST
SIO_PCIRST1_L <23,26>
GND GND GND GND GND

1 BC74
10P-04-O PCI-E X1 A Decoupling Cap.
2

20100929
A +12V VCC3 VCC3 +12V A
Change By Andy lu GND
1

1
1

+ +
EC12
470U-16DE
EC14
1000U-6.3DL
BC69
.1U-16VY-04-O
BC60
.1U-16VY-04-O
Elitegroup Computer Systems
2

Title

GND GND GND GND Slot - PCI-EX16/PCI-EX1


Size Document Number Rev
Between PEX16 & PEX1A Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 20 of 29
5 4 3 2 1
5 4 3 2 1

VCC3 VCC3 DVI

1
26
<17> DDPB_TXC DDPB_TXC 1 2 DDPB_TXC_C 1 2 R30 MC3 R21

G
C18 .1U-10VX-04 ER15 680-1-04 1M-04 1U-10VY-06-O 20K-04

1
<17> DDPB_TXC- DDPB_TXC- 1 2 DDPB_TXC-_C 1 2 DVI_TX0- 17 1 DVI_TX2-

2
C15 .1U-10VX-04 ER10 680-1-04 DDPB_HDP_F S D DDPB_HP DVI_TX1- 9
<17> DDPB_HDP_F
DVI_TX0+ 18 2 DVI_TX2+
DDPB_TX0 DDPB_TX0_C Q6 Q3 BSS138N DVI_TX1+
<17> DDPB_TX0 1 2 1 2 10
C20 .1U-10VX-04 ER17 680-1-04 2N7002-S 19 3
<17> DDPB_TX0- DDPB_TX0- 1 2 DDPB_TX0-_C 1 2 D S 11
D VCC3 VCC3 VCC_DDC D
C26 .1U-10VX-04 ER19 680-1-04 20 4
12
<17> DDPB_TX1 DDPB_TX1 1 2 DDPB_TX1_C 1 2 21 5

2
C19 .1U-10VX-04 ER16 680-1-04 VCC VCC_DDC 13
<17> DDPB_TX1- DDPB_TX1- 1 2 DDPB_TX1-_C 1 2 R32 R16 22 6 DDPB_SCL

G
C16 .1U-10VX-04 ER11 680-1-04 2.2K-04 2.2K-04 14
DVI_TXC+ 23 7 DDPB_SDA

1
<17> DDPB_TX2 DDPB_TX2 1 2 DDPB_TX2_C 1 2 <17> DDPB_CTRLCLK DDPB_CTRLCLK S D DDPB_SCL 15
C22 .1U-10VX-04 ER18 680-1-04 BC18 DVI_TXC- 24 8
<17> DDPB_TX2- DDPB_TX2- 1 2 DDPB_TX2-_C 1 2 Q5 2N7002-S .1U-16VY-04-O DDPB_HP 16

2
C27 .1U-10VX-04 ER20 680-1-04

VCC3 VCC3 VCC_DDC 20100929


Change By Andy lu

2
R31 R22

G
2.2K-04 2.2K-04

DVI

1
DDPB_CTRLDATA S D DDPB_SDA 25
<17> DDPB_CTRLDATA
CMF3 CMF1
0-8P4R-06 0-8P4R-06 Q4 2N7002-S CONN-24P3R-DVI
DDPB_TXC-_C 1 2 DVI_TXC- DDPB_TX1-_C 1 2 DVI_TX1- 10-025-024573
DDPB_TXC_C 3 4 DVI_TXC+ DDPB_TX1_C 3 4 DVI_TX1+
DDPB_TX0_C 5 6 DVI_TX0+ DDPB_TX2_C 5 6 DVI_TX2+
DDPB_TX0-_C 7 8 DVI_TX0- DDPB_TX2-_C 7 8 DVI_TX2- ESD HDMI
U4 HDMI-19P-O 10-083-019691
DDPB_TX1-_C 1 10 DDPB_TX1-_C
DDPB_TX1_C I/O1 NC4 DDPB_TX1_C
2 I/O2 NC3 9
TYPE A
C 8 C
HDMI DDPB_TX2_C 4 I/O3
GND
NC2 7 DDPB_TX2_C HDMI_TX2+ 1 D2+
CMF4 CMF2 DDPB_TX2-_C 5 6 DDPB_TX2-_C 2
0-8P4R-06-O 0-8P4R-06-O I/O4 NC1 HDMI_TX2- GND
3 D2-
DDPB_TXC-_C 1 2 HDMI_TXC- DDPB_TX1-_C 1 2 HDMI_TX1- ESD-10P-USB30 HDMI_TX1+ 4 D1+
DDPB_TXC_C 3 4 HDMI_TXC+ DDPB_TX1_C 3 4 HDMI_TX1+ 03-013-104517 5
DDPB_TX0_C HDMI_TX0+ DDPB_TX2_C HDMI_TX2+ GND HDMI_TX1- GND
5 6 5 6 6 D1-
DDPB_TX0-_C 7 8 HDMI_TX0- DDPB_TX2-_C 7 8 HDMI_TX2- HDMI_TX0+ 7 D0+
8 GND
U5 HDMI_TX0- 9
DDPB_TXC-_C DDPB_TXC-_C HDMI_TXC+ D0-
1 I/O1 NC4 10 10 CK+
DDPB_TXC_C 2 9 DDPB_TXC_C 11
I/O2 NC3 HDMI_TXC- GND
GND 8 12 CK-
DDPB_TX0_C 4 7 DDPB_TX0_C 13
DDPB_TX0-_C I/O3 NC2 DDPB_TX0-_C
CEC
5 I/O4 NC1 6 14 RSVD
VCC VCC_DDC DDPB_SCL 15
F1 D3 ESD-10P-USB30 DDPB_SDA SCL
16 SDA
1 2 P N 17
GND GND
VCC_DDC 18 +5V
20100928 FUSE-1.1A-18 SK24-S DDPB_HP 19
U3 VCC_DDC HPD
Del MC 10UF DDPB_HP 1 4 DDPB_SDA
By Andy lu 2 5 GND
3 6 DDPB_SCL

1
20
ESD-6P BC19 21
.1U-16VY-04 22

2
23

GND
B USBVCC1 USBVCC1 USBVCC1 B
20100929
Change By Andy lu

PS2
1
1
3
5
7

RN1 BC34 COM NRIA RI#


4.7K-8P4R-06 .1U-16VY-04-O NDCDA 1 2 NRXDA
2

NTXDA 3 4 NDTRA Normal -12V High


PSKBM +12V D7 VCC 5 6 NDSRA
2
4
6
8

<23> KDATA KDATA 1 2 1 1N4148-S U15 NRTSA 7 8 NCTSA Active +12V Low RI_L
FB8 0-SH-06-O KBDATA NRIA RI_L <16>
2 NC1 P N 1 12V VCC 20 9
3 GND
FB7 0-SH-06-O 4 -RIA 19 2 NRIA H5X2-P10E-B
KCLK VCC <23> -RIA -DTRA RA1 RY1 NDTRA R83
<23> KCLK 1 2 5 KBCLK <23> -DTRA 15 DA2 DY2 6

C
6 13 -CTSA 18 3 NCTSA 1K-04
FB10 0-SH-06-O NC2 HOLE1 <23> -CTSA TXDA RA2 RY2 NTXDA CN2 180P-8P4C-O NRIA
HOLE2 14 <23> TXDA 13 DA3 DY3 8 1 2 B
<23> MDATA MDATA 1 2 7 15 -RTSA 16 5 NRTSA NRIA 7 8 QN1
MSDATA HOLE3 <23> -RTSA DA1 DY1

1
8 16 RXDA 14 7 NRXDA NCTSA 5 6 2N3904-S
NC3 HOLE4 <23> RXDA RA4 RY4

E
1
9 17 -DSRA 17 4 NDSRA NDSRA 3 4 BC77 R82
FB9 0-SH-06-O GND1 HOLE5 <23> -DSRA -12V -DCDA RA3 RY3 NDCDA NRTSA .1U-16VY-04-O 2.2K-04
10 VCC1 <23> -DCDA 12 RA5 RY5 9 1 2
<23> MCLK MCLK 1 2 11 MSCLK

2
12 N P 10 11 CN3 180P-8P4C-O
NC4 -12V GND NDTRA 7 8
8
6
4
2

PS2-KB-MS D6 NRXDA 5 6
CN1 1N4148-S ST75185CT-S NTXDA 3 4
180P-8P4C NDCDA 1 2
7
5
3
1

A A

Elitegroup Computer Systems


Title
DVI&HDMI CONN&COM&PS2
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Tuesday, December 14, 2010 Sheet 21 of 29
5 4 3 2 1
5 4 3 2 1

5VSB 5VSB
3VSB 3VSB USBVCC1 F_USB1 Power of USB
USBVCC1 USBVCC1 USBX2
USBVCC2 USBVCC2
USBPWR1 USBPWR1
USBPWR2 USBPWR2
USBPWR2 USBPWR2
F_USB1 5VSB VCC USBPWR1
VCC U21
USB 1 2 1 8 F_USB2
USBF2- 1 2 USBF3- 5VCC VOUT
1 5 3 4 2 7
USB USBR4- 2
VCC1
-DATA0
VCC
-DATA1 6 USBR5- USBF2+ 5
3
5
4
6 6 USBF3+ 3
5VSB
GND
VOUT
OC# 6

1
<14> USB_P0 USB_F0+ USBR4+ 3 7 USBR5+ 7 8 4 5 SLP_S3_N
USB_F0- +DATA0 +DATA1 7 8 BC151 EN S3#
D <14> USB_N0 4 GND1 GND 8 10 10 D
<14> USB_P1 USB_F1+ .1U-16VY-04-O UP7536AMA8S

2
<14> USB_N1 USB_F1- G1 G3 H5X2-P9E-W
HOLE2 HOLE USBVCC1
G2 HOLE3 HOLE1 G4
<14> USB_P2 USB_F2+ U7
<14> USB_N2 USB_F2- USBX2 1 8 USBX2
USB_F3+ 5VCC VOUT
<14> USB_P3 2 5VSB VOUT 7
<14> USB_N3 USB_F3- USBPWR2 V_1P5_SM 3 6
BC152 .1U-16VY-04 GND OC# SLP_S3_N
4 EN S3# 5
<14> USB_P4 USB_R4+ AUGND2 AUGND2 1 2
<14> USB_N4 USB_R4- UP7536AMA8S USBVCC2

2
<14> USB_P5 USB_R5+ USBVCC1 U20 U8
<14> USB_N5 USB_R5- BC30 .1U-16VY-04 USBF2- 1 4 USBF3+ R134 1 8 USBLAN
10K-04 5VCC VOUT
20100929 1 2 2 5 2 5VSB VOUT 7
<4,11,16,23> SLP3_L SLP_S3_N USBF3- 3 6 USBF2+ 3 6
Change By Andy lu GND OC#

1
U6 EN_7536 4 5 SLP_S3_N
USB_R4+ USBR4+ USBR5+ USBR4- ESD-6P EN S3#
1 4

2
USB_R4- USBR4- 2 5 UP7536AMA8S
USB_R5+ USBR5+ USBR4+ 3 6 USBR5- MC8
USB_R5- USBR5- 1U-16VX-06 USBPWR2

1
ESD-6P U18
20100929 1 5VCC VOUT 8 F_USB1
AUGND2 2 7
Change By Andy lu 5VSB VOUT
3 GND OC# 6
4 5 SLP_S3_N
USB_F2+ USBF2+ EN S3#
USB_F2- USBF2- UP7536AMA8S
USB_F3+ USBF3+
F_USB2 USB_F3- USBF3-

C C
USBPWR1 USBPWR1
SATA F_USB2
SATA_RX_N[2..5] 1 2
<15> SATA_RX_N[2..5] 1 2
USBF0- 3 4 USBF1-
SATA_RX_P[2..5] USBF0+ 3 4 USBF1+ USBVCC1 USBPWR1
<15> SATA_RX_P[2..5] 5 5 6 6
SATA_TX_N[2..5]
7 7 8 8 80 mils 80 mils
<15> SATA_TX_N[2..5] 10 10

1
SATA_TX_P[2..5] H5X2-P9E-W
<15> SATA_TX_P[2..5]

1
+ EC1 BC33 + EC29 BC192 R190
220U-16DE .1U-16VY-04-O R29 100U-16DE .1U-16VY-04-O 1K-04-O
1K-04

2
USBPWR1
BC190 .1U-16VY-04
Layout Note:
SATA 1 2 AUGND2 AUGND2

SATA2.0 4.5/7.5/15 in 90 Ω ±17.5% U22


USBF0- 1 4 USBF1+ USBVCC2 USBPWR2

SATA2 USBF1-
2 5
USBF0+
80 mils 80 mils
3 6
8 HOLE1

1
1 ESD-6P
GND

1
2 SATA_TX_P2_C C66 1 2 .01U-25VX-04 SATA_TX_P2 20100929 + EC4 BC40 + EC27 BC167
A+ SATA_TX_N2_C C61
A- 3 1 2 .01U-25VX-04 SATA_TX_N2
Change By Andy lu 220U-16DE .1U-16VY-04-O R37 100U-16DE .1U-16VY-04-O R128
GND 4 1K-04 1K-04-O

2
5 SATA_RX_N2_C C57 1 2 .01U-25VX-04 SATA_RX_N2
B- SATA_RX_P2_C C53
B+ 6 1 2 .01U-25VX-04 SATA_RX_P2 USB_F0+ USBF0+
7 USB_F0- USBF0-
B GND USB_F1+ USBF1+ B
9 HOLE2 USB_F1- USBF1-
SATA-7P2R-W

SATA1
8 HOLE1
1
GND
2 SATA_TX_P3_C C65 1 2 .01U-25VX-04 SATA_TX_P3 SPI
A+ SATA_TX_N3_C C60
A- 3 1 2 .01U-25VX-04 SATA_TX_N3 3VSB 3VSB_SPI
GND 4
5 SATA_RX_N3_C C56 1 2 .01U-25VX-04 SATA_RX_N3 1
B- SATA_RX_P3_C C52
B+ 6 1 2 .01U-25VX-04 SATA_RX_P3 3
7 2
GND SPI
1

9 BC213
HOLE2 D15 BAT54C-S .1U-16VY-04
SATA-7P2R-W SMD TYPE <16> SPI_MOSI SPI_MOSI
2

<16> SPI_MISO SPI_MISO


SATA3 SMD TYPE socket: 11-127-008120 <16> SPI_CS_L0 SPI_CS0_N
8 <16> SPI_CLK SPI_CLK
HOLE1 ROM
GND 1
2 SATA_TX_P4_C C67 1 2 .01U-25VX-04 SATA_TX_P4 SPI_CSS 1 8
A+ SATA_TX_N4_C C62 CE# VCC
A- 3 1 2 .01U-25VX-04 SATA_TX_N4 SPI_MOS_OO 2 SO HOLD# 7 SPI_DC
4 SPI_WP_L 3 6 SPI_CLKK
GND SATA_RX_N4_C C58 WP# SCK
B- 5 1 2 .01U-25VX-04 SATA_RX_N4 4 GND SI 5 SPI_MOS_II
6 SATA_RX_P4_C C54 1 2 .01U-25VX-04 SATA_RX_P4
B+ SPI-ROM-S-32M 3VSB_SPI
GND 7
9 R229 1K-04
HOLE2 SPI_DC 2 1
SATA-7P2R-W R228 10K-04
A SPI_DEBUG SPI_WP_L 2 1 A
SATA4 1 2
1 2
8 HOLE1 3 3 4 4
GND 1 5 5 6 6 RN10
2 SATA_TX_P5_C C68 1 2 .01U-25VX-04 SATA_TX_P5 7 8
A+
A- 3 SATA_TX_N5_C C63 1 2 .01U-25VX-04 SATA_TX_N5 7 8 SPI_MOSI
SPI_CLK
7 8 SPI_MOS_II
SPI_CLKK
Elitegroup Computer Systems
GND 4 5 6
5 SATA_RX_N5_C C59 1 2 .01U-25VX-04 SATA_RX_N5 H4X2-B SPI_MISO 3 4 SPI_MOS_OO
B- SATA_RX_P5_C C55 SATA_RX_P5 SPI_CS0_N SPI_CSS
B+ 6 1 2 .01U-25VX-04 FOR DEBUG USE 1 2 Title

9
GND 7
# 若上SMD SPI ROM, MP or A5後不上ROM Socket. 33-8P4R-06 USB/SATA/SPI
HOLE2 Size Document Number Rev
SATA-7P2R-W Custom H61H2-M2 1.0
Date: Thursday, December 09, 2010 Sheet 22 of 29
5 4 3 2 1
5 4 3 2 1

External Connection Thermal Sensing


AVCC_IO MC18 1U-10VY-06-O
3VSB 3VSB
5VSB 5VSB HM_VREF 1 2
VCC3 VCC3
VCC VCC R87 0-04-O
VBAT_IO VBAT_IO HW_VCC 1 2
V_1P5_SM V_1P5_SM ATXPG
V_CPUVTT V_CPUVTT HW_VIN0
VCORE VCORE HW_VIN1
RTS- HW_VIN2 Voltage Sensing
DSR- HM_VREF
LRESET- SOUT-
<16> PCH_PLTRST_L

1
SERIRQ SIN- HW_VCC R90 2 1 7.15K-1-04 VCC
D <15> SER_IRQ D
LFRAME- DTR- R92 R91 2 1 10K-1-04
<16> LPC_FRAME_L
DCD- 10K-1-04 C42 .1U-16VY-04
LAD[0..3] LPC RI-
2 1
<16> LPC_AD[0..3]

2
PCICLK HW_VIN0 ER36 1 2 10K-1-04 VCORE
<15> SIO33M

1
CLK_48M SMLK_SIO_CLK R114 2 1 0-04-O SML1CLK BC99 1 2 .1U-04

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
<15> SIO48M SMLK_SIO_DATA R111 2 SML1DATA
1 0-04-O IO BC104 RT4
3VSBSW- PECI R113 2 1 0-04 SML1CLK .1U-16VY-04-O NTC-10K-1-06-O HW_VIN1 ER37 1 2 10K-1-04 V_1P5_SM
<12> -3VSBSW

GNDD

VIN1(VCC)
RI1#
DCD1#
DTR1#
SIN1
SOUT1
DSR1#
RTS1#

VREF
AVCC3

ATXPG/VIN3
VIN4
VIN5
VIN6

TMPIN1

2
PCIE_RST- BC100 1 2 .1U-04
<20,26> SIO_PCIRST1_L

2
CPU_RST-
<4> SIO_PCIRST2_L
SLP4- HW_VIN2 ER38 2 10K-1-04
<16> SLP4_L
PWSIN- ACPI BC101
1
1 2 .1U-04
VAXG
<13> FP_PWRBTN_L
PWSOUT- CTS- 1 48
<16> SIO_PWRBTN_L CTS1# TMPIN2
<4,11,16,22> SLP3_L SLP3- 3VSB_IO 2 47
PSON- CFAN_TAC1 3VSB TSD- HM_AGND
<13> PSON_L 3 FAN_TAC1 GNDA 46
PWROK CFAN_PWM1 4 45 RSMRST-
<15,16> PWRGD FAN_CTL1 RSMRST#/CIRRX1/GP55

2
RSMRST- BC115 THERMAL_ALERT 5 44 CPU_RST-
<16> RSMRST_L FAN_TAC2/GP52 PCIRST3#/GP10
ATX_PWRGD .1U-16VY-04 6 43 MCLK
<13> ATX_PWRGD FAN_CTL2/GP51 MCLK/GP56
7 42 MDAT 20101201 Andy LPC Pull-ups
GNDD MDAT/GP57

1
<15> KBRST_L
KBRST- 5VSB_CTRL 8 5VSB_CTRL KCLK/GP60 41 KCLK Note: 改成3VSB_IO
GA20 G_LED1 9 40 KDAT Most pull-ups are provided
<15>
<21>
A20GATE
KDATA
KDAT G_LED2 10
GP21
GP20
64-LQFP KDAT/GP61
3VSBSW#/GP40 39 3VSBSW-
Sa

PCHSM_C/PECI/AMDTSI_C
KCLK PWROK 3VSB_IO
<21> KCLK
MDAT KB/MS PCIE_RST-
11
12
CIRTX1 PWRGD3_150ms 38
37 SLP4-
<21> MDATA PCIRST2#/GP11 SUSC#/GP53
MCLK PSON-

PCHSM_D/AMDTSI_D
<21> MCLK 3VSB_IO 13 3VSB PSON#/GP42 36
14 35 PWSIN- 3VSB_IO
LPCPME_L VCORE PANSHW#/GP43 LPCPME_L
<16> LPC_PME_L 15 LRESET PME#/GP54 34

1
G_LED1 BC107 BC117 16 33 PWSOUT- PSON- R103 2 1 4.7K-04
<13> G_LED1 SERIRQ PWRON#/GP44
G_LED2 .1U-16VY-04 22N-04 PWSIN- R108 2 1 4.7K-04
<13> G_LED2

SYS_3VSB
H_SKTOCC_N
C
Other C

LFRAME#
<4,9> H_SKTOCC_L

2
THERMAL_ALERT

PCICLK

SUSB#
<15> THERMAL_ALERT

KRST#

CLKIN
GNDD

VBAT
3VSB
GA20
LAD0
LAD1
LAD2
LAD3
IT8758E/BX

2
CFAN_TAC1 C44
<13> CFAN_TAC1 VCC3
CFAN_PWM1 .1U-16VY-04-X-O
<13> CFAN_PWM1

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SMLK_SIO_DATA
<16> SMLK1_SIO_DATA

1
SMLK_SIO_CLK LRESET- PWROK R100 1 10K-04
<16> SMLK1_SIO_CLK
PECI HM SERIRQ SLP3-
2
<4> PECI
LFRAME- 3VSB
DCD- LAD0 VBAT_IO_S CFAN_TAC1 BC109 1 2 470P-04-O
<21> -DCDA RI- LAD1
<21> -RIA 3VSB_IO
CTS- LAD2 SML1CLK
<21> -CTSA DTR- LAD3 SML1DATA
<21> -DTRA
RTS- COM KBRST-
<21> -RTSA
DSR- GA20
<21> -DSRA SOUT- PCICLK
<21> TXDA

1
SIN- CLK_48M MC32
<21> RXDA 1U-10VY-06
20101207 Andy

2
1

1
MC93 is to change for inrush current
BC121 BC122 EUP
10P-04-O 10P-04-O

2
VCC3 AVCC_IO MC36 BC123
10U-10VY-08 .1U-16VY-04 W/O EUP W EUP
FB14 0-SH-06-O Sb
1 2
3VSB 2 1 3VSB_IO
Sa 2-3 1-2
R115 0-06-O Sb V X
B AVCC_IO B

TPM
TPM 5VSB 1 2 5VSB_ATX Sc X V
CK_P_33M_LPC R241 0-08-O
<15> CK_P_33M_LPC 1 1 2 2
Sd
LFRAME- 3 3
KEY
X V
1

BC103 .1U-16VY-04 PCIE_RST- 5 6 SMBDATA page 11


MC17 BC98 LAD3 5 6 LAD2 SMBDATA <7,8,16,20,26>
1 2 7 7 8 8
10U-10VY-08-O .1U-16VY-04 VCC3 9 10 LAD1
9 10
2

LAD0 11 12 5VSB_ATX 5VSB_ATX


11 12
13 13 14 14
SERIRQ
3VSB 15
17
15 16 16
18
Sc
17 18

1
LPCPD_L 19 20 SMBCLK 5VSB
<16> LPCPD_L 19 20 SMBCLK <7,8,16,20,26> R236 R235 MC93
H10X2-P4E-B 4.7K-04 10K-04 10U-10VY-08 MS2

2
1

C43

2
1 2 4 G2 D2 5
IT8758 Power On Strapping Options 10P-04 P
2

R234 10K-04 3 S2 D2 6

5VSB_CTRL 2 G1 D1 7
VCC3
N D1
1 S1 8
(PIN 60) SOUT- R95 1 2 4.7K-04
VCC VCC3 NPSO8-S
(PIN 23) Pull high in SB Page Level shift
1

R88 R86
Electric Test
PIN NO. Symbol Value Description 10K-04 10K-04
A 5VSB A
2

ATXPG PWROK

1
PIN 60 11 The default value of EC Index 63h/6Bh/73h is 80h (50%) R101
D

D
SOUT- R84 4.7K-04 MN1 B Q7 4.7K-04
10 The default value of EC Index 63h/6Bh/73h is FFh(Fan off ) ATX_PWRGD 1 2 G 2N7002-S 2N3904-S MN3 Elitegroup Computer Systems
2
FAN_CTL_SEL H_SKTOCC_N G 2N7002-S
S

S
1
PIN 23 01 The default value of EC Index 63h/6Bh/73h is 00h(Fan full speed ) MC22 Title

GA20 R85 0-04-O 1U-10VY-06-O SIO-IT8758E


2

00 The default value of EC Index 63h/6Bh/73h is 40h 1 2 Size Document Number Rev
Custom H61H2-M2 1.0
Date: Thursday, December 09, 2010 Sheet 23 of 29
5 4 3 2 1
5 4 3 2 1

External Connection
+5VA 5VSB
R49 0-06
1 2 Cf MIC Bias
5VSB 5VSB
+12V D5 U10 D4 D1
VCC VCC
1N4148-S-O 78L05-D-O 1N4148-S-O
Cc BAT54A-S-O
+12V +12V P N I O N P 1 R3 1 2 3.3K-04-O LINE2_RR
VIN VOUT LINE2_RR <25>
LINE2-VREFO 3
2 R2 1 2 3.3K-04-O LINE2_LL
VCC3 VCC3 Ch

GND
LINE2_LL <25>

1
C40
.1U-16VY-04-O D2
D D
BAT54A-S

G
2
<16> HDA_RST_L AZ_RST- FB13 0-SH-06-O 1 R5 1 2 3.3K-04 MIC2_RR
MIC2_RR <25>

1
1 2 MIC2-VREFO 3

1
<16> HDA_BITCLK AZ_BIT_CLK FB6 0-SH-06-O EC10 C34 2 R4 1 2 3.3K-04 MIC2_LL
MIC2_LL <25>
1 2 100U-16DEL .1U-16VY-04

2
<16> HDA_SYNC AZ_SYNC

2
MIC1_VREFO-R R33 1 2 3.3K-04 MIC1_RR
MIC1_RR <25>
AZ_SDAIN AUGND
<16> HDA_SDIN0
AUGND AUGND MIC1_VREFO-L R34 1 2 3.3K-04 MIC1_LL
MIC1_LL <25>
<16> HDA_SDOUT AZ_SDOUT
Cd

AGND AUGND AUGND C28 2 1 47P-04-O

PORT-F ER21 1 2 20K-1-04 VCAP


Cg
<25> MIC2_JD
* VCC1.5 can remove for non-Intel G4X plateform MIC1_VREFO-R

1
<25> LINE2_JD R36 1 2 39.2K-1-04 F_SENSE LINE2-VREFO
PORT-E MIC2-VREFO EC38
<25> FRONT_L EC2 2 1 10U-25DE VCAP_1705CE 10U-25DE

2
MIC1_VREFO-L

1
<25> FRONT_R EC5 2 1 10U-25DE
C69 AUGND
C24 1 2 10U-6VX-08 10U-10VY-08-O

2
Reserved for SI
+5VA
AUGND AUGND
C C

1
C25 BC35 BC39

CODEC1
10U-10VY-08 .1U-16VY-04 .1U-16VY-04-O

36

35

34

33

32

31

30

29

28

27

26

25

2
PORT-D_R

VrefOut-G
PORT-D_L

SENSE B

VrefOut-D

VrefOut-E

VREF FILT
VrefOut-F

VrefOut-C_L

VrefOut-B_L

AVSS1

AVDD1
AUGND AUGND AUGND AUGND

+5VA 37 24 C4 1 2 10U-6VX-08 LINE1_R LINE1_R <25>


VrefOut-A PORT-C_R
38 23 C5 1 2 10U-6VX-08 LINE1_L LINE1_L <25>
AVDD2 PORT-C_L
Cb 39 22 C2 1 2 10U-6VX-08 MIC1_R
PORT-A_L PORT-B_R MIC1_R <25>
ER22 1 2 5.1K-1-04 JDREF 40 21 C3 1 2 10U-6VX-08 MIC1_L MIC1_L <25>
VrefOut-H PORT-B_L
C33 2 1 47P-04-O 41 20
AUGND PORT-A_R CD-R
42 AVSS3 CD-G 19
Ca
43 PORT-G_L VT1705CE CD-L 18

44 17 C9 1 2 10U-6VX-08 MIC2_R
PORT-G_R PORT-F_R MIC2_R <25>
45 16 C10 1 2 10U-6VX-08 MIC2_L
PORT-H_L PORT-F_L MIC2_L <25>
46 15 EC3 1 2 100U-16DEL LINE2_R
B PORT-H_R PORT-E_R LINE2_R <25> B

47 14 EC6 1 2 100U-16DEL LINE2_L


S/PDIF IN / EAPD PORT-E_L LINE2_L <25>
SPDIFO 48 13 SENSE-A ER25 1 2 5.1K-1-04
<25> SPDIFO S/PDIF-OUT XO / DVDD_IO SENSE A FRONT_JD <25> PORT-D
DVDD_CORE

DVDD_CORE
ER26 1 2 10K-1-04

PC_BEEP
XI / DVSS

LINE1_JD <25> PORT-C

RESET#
SYNC
DVSS

DVSS
ER27 2 20K-1-04

BCLK
1 MIC1_JD <25>
SDO PORT-B

SDI
AUGND

2
C35
BOM Difference
1

10

11

12
47P-04-O 沒用到可直接短路到VCC3

1
VCC3 For Intel G4X HDMI support : 1.5V (pin1-2)
AUGND
Location ALC662 VT1705 VT1705CE
1

BC45 AZ_RST- For Normal link : 3.3V (pin2-3)


.1U-16VY-04
Ca ALC662-VC-GRS VT1705 VT1705CE AZ_SYNC
2

V_HDA_SEL VCC3
Cb 20K-1-04 5.1K-1-04 5.1K-1-04 V_HDA_SEL

1
Cc V X X AZ_SDAIN C39
.1U-16VY-04-O

2
Cd 2.2K-04 3.3K-04 3.3K-04 AZ_SDOUT AZ_BIT_CLK
C38 22P-04-O
Ce 75-04 75-04 75-04 1 2
20100929
Cf X X V Change By Andy lu
A Cg X X V A

Ch V V X

When you change BOM, remember change GPI to inform


BIOS use different Verb-Table.
Elitegroup Computer Systems
Title
AUDIO VT1705/ALC662 (CHIP)
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Friday, December 10, 2010 Sheet 24 of 29
5 4 3 2 1
5 4 3 2 1

External Connection

HDPANEL_DETECT
<16> FP_AUD_DETECT

* HDPANEL_DETECT connect to SIO or SB GPIO


for AC97 Panel support
D D

REAR-AUDIO Non re-tasking for rear panel

<24> LINE1_JD LINE1_JD 3


MIC2_LL
FRONT-AUDIO
4 BLUE <24> MIC2_LL
<24> LINE1_L LINE1_L R28 1 2 1K-04 LINE1_LL 2 <24> MIC2_RR MIC2_RR
VCC3
LINE1_R R25
Line In
<24> LINE1_R 1 2 1K-04 LINE1_RR 5 <24> LINE2_RR LINE2_RR
1 <24> LINE2_LL LINE2_LL

1
AUDIOA

1
C21 C17 AUDIO-3P-HDA R51
20100929 100P-04-O 100P-04-O
Ce 10K-04
F_AUDIO
Change By Andy lu

2
<24> MIC2_L R9 1 2 75-04 1 2
<24> MIC2_R R8 1 2 75-04 3 4 HDPANEL_DETECT
AUGND AUGND <24> LINE2_R R20 1 2 75-04 5 6 MIC2_JD <24>

1
<24> FRONT_JD FRONT_JD 8 7 C36
9 R19 1 2 75-04 9 10 .1U-16VY-04
FRONT_L R7 1 2 75-04 FRONT_LL 7
LIME <24> LINE2_L LINE2_JD <24>
<24> FRONT_L

2
Line Out H5X2-P8E-B
<24> FRONT_R FRONT_R R14 1 2 75-04 FRONT_RR 10 AUGND AUGND

1
6

1
C AUDIOB C
1

1
C7 C8 AUDIO-3P-HDA 20100929 R18 R17 C14 C13 C11 C12
20100929 100P-04-O 100P-04-O 100P-04-O
Change By Andy lu

2
Change By Andy lu
2

AUGND AUGND AUGND AUGND AUGND AUGND


AUGND AUGND 22K-04-O 100P-04-O
22K-04-O 100P-04-O 100P-04-O
<24> MIC1_RR MIC1_RR
<24> MIC1_LL MIC1_LL

MIC1_JD
SPDIF-OUT
<24> MIC1_JD 13
14 PINK
<24> MIC1_L MIC1_L R6 1 2 1K-04 12

MIC1_R R1
Mic In
<24> MIC1_R 1 2 1K-04 15 VCC
11
16 SPDIFO
1

C6 C1 17 1 SPDIFO <24>
20100929 100P-04-O 100P-04-O AUDIOC 2
18

1
AUDIO-3P-HDA C37
Change By Andy lu
2

4 100P-04-O

2
AUGND AUGND AUGND H4X1-P3E-W

B B

Line in

16 17

12 13 11 14 15 Front out

7 8 9 10
1 6
2 3 4 5 Mic in

TOP VIEW
A A

FRONT VIEW
Elitegroup Computer Systems
Title
AUDIO VT1705/ALC662 (PANEL)
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Monday, December 06, 2010 Sheet 25 of 29
5 4 3 2 1
5 4 3 2 1

External 新手提醒: LAN_HSOP/N請接到SB的PCIE RX端 LAN_HSIP/N請接到SB的PCIE TX端 LAN_HSIP/N在SB的PCIE TX端要記得放AC coupling cap
BC32 2 .1U-16VY-04
Connection
USBVCC2 USBVCC2
GND 1 3VSB
LAN1_HSIN
3VSB 3VSB DVDDL LAN1_HSIP ESD1
VCC3 VCC3
AUGND2 AUGND2
Cb LAN_LED0 MDI1_P1 1 4 MDI1_P0
LAN_LED1 CK_LAN1_H 2 5
VDDCT CK_LAN1_L MDI1_N0 3 6 MDI1_N1
PCIE_WAKE_UP- 1.7V L1 IND-2.2U-O
<16,20> PCIE_WAKE_L
<20,23> SIO_PCIRST1_L PCIE_LAN1_RST- 1 2 AVDDL ESD-6P

1
<15> CK_PE_100M_LAN_H CK_LAN1_H
D D
CK_LAN1_L MC6 BC29

40
39
38
37
36
35
34
33
32
31
<15> CK_PE_100M_LAN_L
10U-6VX-08-O .1U-10VX-04-O LAN
Cf

2
<14> LAN_TX_P6 LAN1_HSIP

DVDDL_REG
LX

PERX_N
PERX_P

REFCLK_P
REFCLK_N
LED_1
LED_0

AVDDL

AVDDL
<14> LAN_TX_N6 LAN1_HSIN Closed to pin40
LAN1_HSOP GND BC41 1 2 .1U-16VY-04-O 3VSB
<14> LAN_RX_P6
LAN1_HSON
<14> LAN_RX_N6

3VSB 1 30 HSOP1 C30 1 2 .1U-10VX-04 LAN1_HSOP ESD2


USB_LN0 PCIE_LAN1_RST- VDD33 PETX_P HSON1 C29 LAN1_HSON MDI1_P3 MDI1_P2
<14> USB_N10 2 PERST# PETX_N 29 1 2 .1U-10VX-04 1 4
USB_LP0 PCIE_WAKE_UP- 3 28 2 5
<14> USB_P10
USB_LN1
Closed To Pin1 CKREQ_1 4
WAKE# NC
27 R27 1 2 0-04 MDI1_N2 3 6 MDI1_N3
<14> USB_N11 3VSB CLKREQ#(VDDCT_REG) TETSMODE
USB_LP1 VDDCT 5 26 SMDATA
<14> USB_P11 VDDCT SMDATA SMCLK ESD-6P-O
SMCLK AVDDL L_XTAL1
6
7
AVDDL_REG AR8152-B SMCLK 25
24 DVDDL_G
<7,8,16,20,23> SMBCLK SMDATA L_XTAL2 XTLO DVDDL CKREQ_2 TP
8 23 1
<7,8,16,20,23> SMBDATA XTLI Ca LED_2(CKREQ)

1
9 22 CKREQ1
MC7 BC42 AVDDH LAN1_RSET 10
AVDDH_REG AVDDH
21 MDI1_N3
AVDDH 20100929

AVDDH(LED2)
10U-6VX-08 .1U-10VX-04 RBIAS TRX_N3(NC) Short By Andy lu

TRX_N2(NC)
TRX_P2(NC)

TRX_P3(NC)
AVDDL(NC)

AVDDL(NC)
2

TRX_N0

TRX_N1
ER9 USB_LP0 USBLP_0

TRX_P0

TRX_P1
2.37K-1-04 41 USB_LN0 USBLN_0
GND USB_LP1 USBLP_1

2
USB_LN1 USBLN_1

11
12
13
14
15
16
17
18
19
20
MDI1_P0 MDI1_P3
Ch VDDCT FB5 1 2 0-06 CKREQ_1 MDI1_N0 AVDDL_G
MDI1_N2
R10 1 2 0-04-O AVDDL
Cj
MC5 1 2 1U-10VY-06 AVDDL BC12 1 2 .1U-16VY-04-O GND BC43 1 2 .1U-16VY-04 USBVCC2
C MDI1_P1 MDI1_P2 C
MDI1_N1
AVDDH_G R15 1 2 0-04-O AVDDH ESD3

Ci MDI1_P0
BC13 1 2 .1U-16VY-04-O Ck USBLP_1 1 4 USBLP_0
ER8 1 2 49.9-1-04 BC8 1 2 1000P-04-O 2 5
MDI1_N0 ER7 1 2 49.9-1-04 BC7 1 2 .1U-16VY-04 USBLN_0 3 6 USBLN_1
20100929 R13 1 2 0-04-O 3VSB
MDI1_P1 ER6 1 2 49.9-1-04 BC5 1 2 1000P-04-O Change By Andy lu MC2 1 2 1U-10VY-06-O Cl ESD-6P
L_XTAL2 MDI1_N1 ER5 1 2 49.9-1-04 BC6 1 2 .1U-16VY-04

FB11 0-SH-06-O
R35 1 2 1M-04-O L_XTAL1 AUGND2 1 2
R26 1 2 0-04
X1 X-25M DVDDL_G BC27 1 2 .1U-16VY-04
DVDDL
Cm
1 2 Cg MDI1_P2 ER4 1 2 49.9-1-04-O BC4 1 2 1000P-04-O PIN37 FB1 0-SH-06-O
MDI1_N2 ER3 1 2 49.9-1-04-O BC3 1 2 .1U-16VY-04-O AUGND2 1 2
1

1
3

C32 C31 MDI1_P3 ER2 1 2 49.9-1-04-O BC1 1 2 1000P-04-O


27P-04 27P-04 MDI1_N3 ER1 1 2 49.9-1-04-O BC2 1 2 .1U-16VY-04-O
2

AVDDL BC14 1 2 .1U-16VY-04-O


Close to PIN13
USBVCC2

VDDCT

B HW Strapping Cn B
LED0 : 0 -> OC disable USBLAN

1
1 -> OC enable 5 VCC VCC 1
FB12 USBLN_0 6 2 USBLN_1
LED1 : 0 -> VDDCT_REG enable 0-06 USBLP_0 -DATA1 -DATA0 USBLP_1
7 +DATA1 +DATA0 3
1 -> VDDCT_REG disable 8 4 3VSB
GND GND

2
G3 H_USB3 H_USB1 G1
BOM Difference Cd
AUGND2 G4 H_USB4 H_USB2 G2 AUGND2
AR8151-B AR8152-B AR8161-B LAN_LED0 R42 1 2 330-04 ACTIVE_Y L_TCT 9
1000M 10/100M 1000M
1 MDI1_P0 10
TCT(P01)
19
LAN_LED1 R40 TX1+ GLED(P11)
0 1 2 330-04 LINK_G MDI1_N0 11 TX1- OLED(P12) 20 LINK_G

1
Ca AR8151-B AR8152-B AR8161-B MDI1_P1 12 21 ACTIVE_Y
R41 TX2+ YLED(P13)
1 2 5.1K-04 R38 MDI1_N1 13 TX2- VCC(P14) 22
Cb V X X 0-04 MDI1_P2 14 G5
MDI1_N2 TX3+ H_LAN1
15 TX3- H_LAN2 G6

2
Cc USBX2-LAN-1000 USBX2-LAN-100 USBX2-LAN-1000 MDI1_P3 16 G7
MDI1_N3 TX4+ H_LAN3
17 TX4- H_LAN4 G8
Cd X V X L_RCT 18
Closed To PWR Loading Pin RCT(P10)
Ce 0-04 .01U-25VX-04 0-04 BC38 1 2 .1U-10VX-04 PIN24
Ce USBX2-LAN-100
DVDDL

1
Cf V X V BC36 1 2 .1U-10VX-04 PIN34 R39
AVDDL
.01U-25VX-04
Cc
Cg V X X AVDDL BC37 1 2 .1U-10VX-04 PIN31 AUGND2

2
Ch X V X AVDDH BC20 1 2 .1U-10VX-04 PIN22 Link: Green on
Active: Yellow blinking
Ci V V X VDDCT BC28 1 2 .1U-10VX-04 PIN5
A AUGND2 A
Cj V X V
Ck V X X
Cl X X V
Closed To PWR Source Pin
Cm V V X
Elitegroup Computer Systems
AVDDL MC4 1 2 1U-10VY-06 PIN6 Title
Cn V V X
AVDDH MC1 1 2 1U-10VY-06 PIN9 AR8151-B / AR8152-B
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Tuesday, December 14, 2010 Sheet 26 of 29
5 4 3 2 1
5 4 3 2 1

ATX P/S WITH 1A STBY CURRENT ATX4P


5VSB 5V 3.3V 12V -12V 12V
+/-5% +/-5% +/-5% +/-5% +/-5% Intel Sandy Bridge CPU Fans
+/-5% Vcore:0.65~1.3V 112Amax
Switching VID
RT8859A VCCP 0.25~1.52V 85A(95W) 12V_200mA
Vaxg:0.65~1.3V 35Amax
4 hases VID
VAXG 0.25~1.52V 25A
D
V_CPU_VTT:1.05V 17Amax SPI D
Switching VTT 1.05V(1V) 8.5A
RT8121 Linear VCC_SA:0.925V(0.85V) 8.8Amax VCC3_30mA
1 phase OP358 VCC_SA 0.925V(0.85V) 8.8A

VCCPLL 1.8V 1A
V_DIMM:1.5V 28.5Amax CRT
VCC Switching
5VDUAL RT8105 VDDQ 1.5V 4.5A
5VSB P/N MOS VCC_1A fuse

DDR3 DIMM (4) 1333MHz


LDO HDMI/DP
APL5336
LDO VDDQ 15A_S0
3VSB Intel Cougar Point (TDP 5.5W) VCC3_0.5A fuse x 2
1.0A_S3
DDR_VTT:0.75V V_PROC_IO 1.05V 1mA
V_SM_VTT 1.0A_S0
HDMI L.S.
VccDMI 1.05V 0.057A
Linear PCH_CORE:1.05V 6.2Amax VCC3_180mA
OP358 VccCORE 1.05V 1.6A

VccIO 1.05V 4.07A


Flash/NVM
VccADPLLA 1.05V 0.1A
VCC3 _0.3A
VccADPLLB 1.05V 0.1A
C 1.8V_0.1A C

VccCLKDMI 1.05V 0.02A


Non AMT:
VccASW(ME) short to V1P05_PCH VccSSC 1.05V 0.105A

VccDIFFCLKN 1.05V 0.055A


V_ME:1.05V 1.8Amax
VccASW(ME) 1.05V 1.61A

VccDFTERM 1.8V 0.2A


Linear V_SFR:1.8V 1.6Amax
LM324 VccVRM 1.8V 0.159A

Vcc3_3 3.3V 0.409A

VccADAC 3.3V 0.068A


Not support DSW mode:
VccDSW short to 3VSB VccSPI 3.3V 0.02A

VccDSW3_3 3.3V 0.003A

VccSUS3_3 3.3V 0.097A

VccSUSHDA 3.3V 0.01A


B
Battery B
VccRTC 3.3V 6uA(G3) 3V

V5REF 5V 1mA

V5REF_SUS 5V 1mA

VCC3
NEC_D720200
3VDUAL
3VSB P/N MOS VDD3P3 3.3V TBD
Extrenal from V1P05_PCH
VDD1P05 1V TBD

VCC CTRL1P0 internal LVR Output


5VDUAL
5VSB Switch IC
UP7536
SUPER I/O IT8721
3VSB
3VSB 3.3V TBD
USB_5V
VCC3
VCC3 3.3V TBD

BAT 3.3V 3.3V TBD


X16 PCIE Slot per X1 PCIE Slot per PCI Slot per USB X4 Header USB X4 IO USB3.0
A A
3.3V 3A(S0) 3.3V 3A(S0) 5V 5A(S0) VDD VDD
5VDual AUDIO ALC892
12V 5.5A(S0) 12V 0.5A(S0) 12V 0.5A(S0) 5VDual 5VDual VCC3
2A
3.3Vaux 0.375A 3.3Vaux 0.375A 3.3Vaux 0.375A 2.0A 2.0A DVDD 3.3V 3.3V 23mA
5VSB
3.3V 7.6A(S0)
Total 1 Slot Total 2 Slots AVDD 5V 38mA
Elitegroup Computer Systems
Total 1 Slot
Title
Power Delivery
Size Document Number Rev
C H61H2-M2 1.0
Date: Friday, December 03, 2010 Sheet 27 of 29
5 4 3 2 1
5 4 3 2 1

9 V_1P05_PCH 7 EN

CPUVTT RT8121
D D

10 VTT_PWRGD 17 VCORE

38 EN_VTT VCORE

19 SVDATA
16 VIDSOUT

VCORE RT8859A
40 VR_RDY
18 VR_RDY

Slot:PCIEx16/x1 LAN/PCI Bridge/USB3.0

20 SIO_PCIRST1_L 20 SIO_PCIRST2_L SVDATA(B37) VCCCORE

C C

20 SIO_PCIRST2_L CMOS 1.1V


divide RESET#(F36)

12 PCIRST2# 44 PCIRST3#
Cougar Point Sandy Bridge
19 PLTRST_L SYS_PWROK(BJ53) Desktop Processor
2 FP_PWRBTN_L LRESET 15 PLTRST#(BK48) Socket H2
35 PANSHW#
POWER BUTTON 4 RSMRST_L
RSMRST# 45 RSMRST#(BK38) 15 CPU_PWROK
PROCPWRGD(D53) UNCOREPWRGOOD(J40)
3 3VSB 6 SLP4_L
31 SYS_3VSB SUSC# 37 SLP_S4#(BN52)

7 SLP3_L 14 CPU_BCLK
Super I/O SUSB# 32 SLP_S3#(BM53) CPUCLK(P31/R31) BCLK(W1/W2)
29 3VSB ITE 8728
5 SIO_PWRBTN_L
PWRON# 33 PWRBTN#(BT43)
B B

PWROK DRAMPWROK(BG46)
13 DRAM_PWROK SM_DRAMPWROK(AJ19)
54 ATXPG PWRGD[1..3] 32/18/78
12 PWROK(BJ38)
55 VIN1 36 PSON#

9 8 SYSRST_L
SYS_RESET#(BE52)
+VCC PSON_L
RESET BUTTON

4, 6, [21..23] 16
11 VCC5 PS_ON
ATX_PWRGD
8 PWROK

ATX_POWER
1 3VSB_IO 9 5VSB
A A

Elitegroup Computer Systems


Title
Power Sequence, Reset Diagram
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Friday, December 03, 2010 Sheet 28 of 29
5 4 3 2 1
5 4 3 2 1

CK_DIMM_A_[3:0]_H/L
NOTE: DDR3 Channel A
D

Sugar Bay Platform has two clock mode:


Sandy DDR3
D

1.Integrated Clock Mode (Generate by PCH)


2.Buffer Through Mode (Generate by Clock Gen.)
Bridge CK_DIMM_B_[3:0]_H/L
1333MHz/1066MHz
Desktop Processor
If we choose Integrated Clock Mode, we should Socket H2
DDR3 Channel B
unstuff Clock Gen. circuit.
Please refer to

CK_CPU_100M_P/N
Page.12 PCH - DMI/PCI/PE/USB for CLK IN PD
Page.13 PCH - SATA, SATA CONN for CLK IN PD
Page.14 PCH - MISC, F/W Strap
Page.15 PCH - CLK IO, CKG - CV184 for Option

C C
PEX16_100M_P/N
CKG_CPU_P/N PCI-E X16

PEX1[A..B]_100M_P/N
CKG_DMI_P/N PCI-E X1

CKG_SATA_P/N
CK505
ICS-4180AKLF
Cougar
Point PCH
CKG_DOT96_P/N

B B
TPM:
TPM33M Infinine
CKG_14M
PCI_33M_FB

XTL 14.318M
LDG33M
LPC_DEBUG
SIO33M
SIO:
SIO48M
A
IT8728 A

Elitegroup Computer Systems


Title
XTL 32.768K XTL 25M
Clock Distribution
Size Document Number Rev
Custom H61H2-M2 1.0
Date: Friday, December 03, 2010 Sheet 29 of 29
5 4 3 2 1

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