Data Sheet: TEA6823T TEA6825T

INTEGRATED CIRCUITS
DATA SHEET
TEA6823T; TEA6825T
In Car Entertainment (ICE) car
radio
Preliminary specification 1998 Mar 24
File under Integrated Circuits, IC01
Philips Semiconductors Preliminary specification
In Car Entertainment (ICE) car radio TEA6823T; TEA6825T
FEATURES
General
• FM mixer for conversion from FM-IF1 = 72.2 MHz to
FM-IF2 = 10.7 MHz
• AM mixer for conversion from AM-IF1 = 10.7 MHz to
AM-IF2 = 450 kHz
Stereo decoder
• FM-IF gain stage
• Crystal oscillator providing mixer frequencies and • Adjustment-free PLL VCO
references for IF-count and stereo decoder • Pilot depending mono/stereo switching
• FM quadrature demodulator with automatic centre • Analog control of mono/stereo blend
frequency adjustment and THD compensation • Adjacent channel noise suppression (114 kHz)
• Level, multi-path and noise detectors • Pilot cancelled
• Soft mute • Analog control of de-emphasis
• Stereo noise cancelling and variable de-emphasis • Integrated low-pass filters for 190 kHz adjacent channel
• PLL stereo decoder interferences and signal delay for interference
• Noise blanker absorption circuit.
• AM IF-amplifier and demodulator
• I2C-bus transceiver with interface to enable direct data GENERAL DESCRIPTION
transfer to radio front-end The TEA6823T together with the TEA6811T and the
• IF-count for AM and FM TEA6825T together with the TEA6810T form an AM/FM
electronic tuned car radio in a double conversion receiver
• Reference frequency generation for PLL synthesizer.
concept.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
TEA6823T VSO56 plastic very small outline package; 56 leads SOT190-1
TEA6825T VSO56 plastic very small outline package; 56 leads; face down SOT190-2
1998 Mar 24 2
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VDDA1 analog supply voltage 1 (+5 V; pin 5) note 1 4.5 5.0 5.5 V
operating range 4.75 5.0 5.25 V
IDDA1 analog supply current 1 (pin 5) FM mode 17 21 25 mA
AM mode 14 17 21 mA
I19 + I20 total FM mixer output current 4.8 6.0 7.2 mA
I22 + I23 total AM mixer output current 10 12 14 mA
VDDA2 analog supply voltage 2 (pin 28) note 1 7.0 8.5 10 V
IDDA2 analog supply current 2 (pin 28) FM mode 2.4 3.0 3.6 mA
VDDA3 analog supply voltage 3 (+8.5 V; pin 56) note 1 7.0 8.5 10 V
AM mode 9.5 12 15 mA
VDDD digital supply voltage 1 (+5 V; pin 52) note 1 4.5 5.0 5.5 V
IDDD digital supply current (pin 52) note 1 8 10 12 mA
S+N signal plus noise-to-noise ratio FM mode; 66 75 − dB
-------------- ∆f = 22.5 kHz at
N
pins 43 and 47
AM mode; m = 0.3 54 60 − dB
THD total harmonic distortion FM mode; ∆f = 75 kHz − 0.1 0.35 %
AM mode − 1.5 3 %
αcs channel separation (adjusted) 40 − − dB
Tamb operating ambient temperature −40 − +85 °C
Note
1. IC is operating; specified parameters may deviate from limits which are valid for operating range.
1998 Mar 24 3
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ndbook, full pagewidth

1998 Mar 24
BLOCK DIAGRAM
Philips Semiconductors
In Car Entertainment (ICE) car radio
1 kΩ Vref Vref RDS
TOKO
SFP450 P392BC-1977Z
10 nF 220 kΩ
33 kΩ
1.5 nF
FMSTOP LEVELADJ
L13 3.3 nF 68 pF 220 nF 22 nF
TOKO AMSTOP
100 kΩ
7PSAG-1946D = S 100 kΩ 100 kΩ 62 pF R51 220 nF 82 kΩ 27 kΩ
TR5 R39 R40
33 kΩ
VCC1 68 µF 100 kΩ
100 82 kΩ R41
10.7 MHz 100 nF 4.3 kΩ
nF
22 23 33 34 42 36 38 1 2 39 43 48 47 45 25
SFE10.7
37
FM-LIMITER LOW
AM/FM MPX SOFT PHASE
330 Ω AM-AMPLIFIER AFC PASS VCO
100 nF SWITCH BUFFER MUTE DETECTOR
35 LEVEL FILTER
27 DETECTOR
AM AM DIGITAL
10.7 MHz LOGIC
22 nF DELOG PHASE
24 BLOCK
AMPLIFIER DETECTOR
÷2/÷6 820 kΩ
fref 19 kHz 38 kHz

HIGH 100 nF
IF- LEVEL PILOT PILOT 26
100 nF
28 AMPLIFIER ÷N5 AMPLIFIER
PASS
60 kHz CANCELLER DETECTOR
29
10.7 MHz TEA6823T
19 TEA6825T 6.8 nF
10.7 MHz 31
20
AVERAGE
radio mute
ZS369SCS-2144AJ TR3 20 kHz DETECTOR
13
FM 44
72.2 MHz 56
4
OUTRIGHT
pF 14 MPX- 470 nF
PEAK tuning Vint1 30
BUFFER DECODER
10 nF DETECTOR mute AND
MATRIX 41
8 OUTLEFT
61.5 MHz
ADC AVERAGE
OSCILLATOR ADC
9 MULTI- DETECTOR
PHILIPS LEVEL radio mute
PATH mono 6.8 nF
9922 521 00098 32
or Daiwa AT-49
10 HIGH VCC
PEAK PASS PULSE
REFERENCE IF +8.5 V
fref DETECTOR FILTER FORMER 56 22 µH
11 FREQUENCY COUNTER
100 +8.5 V
47 µF
CURRENT INTERFERENCE nF
DETECTOR Vint1
SWITCH 4
AM Vint2 SUPPLY
TEA6823T; TEA6825T
Vint2
470 nF
6
SDA TEMP THRESHOLD MODULATION NOISE 120 kΩ
7 I2C-BUS COMPEN- 12
CONTROL DETECTOR DETECTOR
SCL SATION
5 VCCA
+5 V
54 53 55 40 50 3 46 16 49 15 17 18 51 21 52 100
10 kΩ 10 kΩ 47 µF
nF
33 µF
Preliminary specification
3.3 MΩ 1 MΩ 12 kΩ
330 Ω 330 Ω RC
10 kΩ 2.2 MΩ 1.2 MΩ
33 kΩ 10 Ω
10 kΩ 100 100
220 nF 220 nF nF nF 100 nF 100 nF
VDDD VCC Vref VDDD MGK693

SCL SDA level +5 V
+5 V 8.5 V
Fig.1 Block diagram.

PINNING
SYMBOL PIN DESCRIPTION SYMBOL PIN DESCRIPTION

QDET1 1 demodulator tank 1 FMIFAMPOUT 29 FM-IF amplifier output
QDET2 2 demodulator tank 2 AFGND 30 AF ground
TSWITCH 3 time switch input DEEMPHR 31 de-emphasis capacitor right
AGND 4 analog ground DEEMPHL 32 de-emphasis capacitor left
VDDA1 5 analog supply voltage 1 (+5 V) AMIF2IN1 33 AM-IF2 input 1
HFBUS1 6 HF bus 1 output; AMIF2IN2 34 AM-IF2 input 2
pull-up to +5 V FMIN2 35 FM limiter input
HFBUS2 7 HF bus 2 output; DCFEED 36 DC feed FM limiter
pull-up to +5 V
FMIN1 37 FM limiter input
XTAL1 8 crystal oscillator 1
LEVELADJ 38 level adjustment input
XTAL2 9 crystal oscillator 2
CAFC 39 AFC capacitor
fref(p) 10 PLL reference frequency
MPBUF 40 multi-path buffer time constant
output (p)
OUTLEFT 41 AF output left
fref(n) 11 PLL reference frequency
output (n) FMSTOP 42 FMSTOP adjustment input
Iref 12 reference current RDS/AMSTOP 43 MPX for RDS/AMSTOP
adjustment input
FMIF1IN1 13 72 MHz FM-IF input 1
OUTRIGHT 44 AF output right
FMIF1IN2 14 72 MHz FM-IF input 2
MPXIN 45 stereo decoder MPX input
TSDR 15 time constant for SDR
THRES 46 threshold
TSDS 16 time constant for SDS
MPXOUT 47 FM demodulator MPX output
VSDS 17 SDS control voltage input
AMAFOUT 48 AM demodulator AF output
VSDR 18 SDR control voltage input
Vmute/AML 49 mute voltage/AM level
FMIF2OUT1 19 FM mixer output 1
LEVELUNWEIG 50 unweighted level output
FMIF2OUT2 20 FM mixer output 2
IACCONTR 51 IAC control voltage
Vref 21 reference voltage output
VDDD 52 digital supply voltage
AMIF2OUT1 22 AM mixer output 1
SDA 53 serial data input/output;
AMIF2OUT2 23 AM mixer output 2
pull-up to +5 V
FMAMDEC 24 FM/AM 10.7 MHz decoupling
SCL 54 serial clock input;
PHASEDET 25 phase detector output pull-up to +5 V
PILDET 26 pilot detector output DGND 55 digital ground
FMAM10.7 27 FM/AM 10.7 MHz input VDDA3 56 analog supply voltage 3
VDDA2 28 analog supply voltage 2 (+8.5 V)
1998 Mar 24 5
handbook, halfpage handbook, halfpage

QDET1 1 56 VDDA3 VDDA3 56 1 QDET1
QDET2 2 55 DGND DGND 55 2 QDET2
TSWITCH 3 54 SCL SCL 54 3 TSWITCH
AGND 4 53 SDA SDA 53 4 AGND
VDDA1 5 52 VDDD VDDD 52 5 VDDA1
HFBUS1 6 51 IACCONTR IACCONTR 51 6 HFBUS1
HFBUS2 7 50 LEVELUNWEIG LEVELUNWEIG 50 7 HFBUS2
XTAL1 8 49 Vmute/AML Vmute/AML 49 8 XTAL1
XTAL2 9 48 AMAFOUT AMAFOUT 48 9 XTAL2
fref(p) 10 47 MPXOUT MPXOUT 47 10 fref(p)
fref(n) 11 46 THRES THRES 46 11 fref(n)
Iref 12 45 MPXIN MPXIN 45 12 Iref
FMIF1IN1 13 44 OUTRIGHT OUTRIGHT 44 13 FMIF1IN1
FMIF1IN2 14 43 RDS/AMSTOP RDS/AMSTOP 43 14 FMIF1IN2

TEA6823T TEA6825T
TSDR 15 42 FMSTOP FMSTOP 42 15 TSDR
TSDS 16 41 OUTLEFT OUTLEFT 41 16 TSDS
VSDS 17 40 MPBUF MPBUF 40 17 VSDS
VSDR 18 39 CAFC CAFC 39 18 VSDR
FMIF2OUT1 19 38 LEVELADJ LEVELADJ 38 19 FMIF2OUT1
FMIF2OUT2 20 37 FMIN1 FMIN1 37 20 FMIF2OUT2
Vref 21 36 DCFEED DCFEED 36 21 Vref
AMIF2OUT1 22 35 FMIN2 FMIN2 35 22 AMIF2OUT1
AMIF2OUT2 23 34 AMIF2IN2 AMIF2IN2 34 23 AMIF2OUT2
FMAMDEC 24 33 AMIF2IN1 AMIF2IN1 33 24 FMAMDEC
PHASEDET 25 32 DEEMPHL DEEMPHL 32 25 PHASEDET
PILDET 26 31 DEEMPHR DEEMPHR 31 26 PILDET
FMAM10.7 27 30 AFGND AFGND 30 27 FMAM10.7
VDDA2 28 29 FMIFAMPOUT FMIFAMPOUT 29 28 VDDA2
MHA700 MHA701
Fig.2 Pin configuration for TEA6823T. Fig.3 Pin configuration for TEA6825T (top view).
FUNCTIONAL DESCRIPTION A 3rd order low-pass filter (fg = 90 kHz) at the MPX input
provides an extra 190 kHz ACI suppression.
Stereo decoder
An interference gate is connected at the MPX demodulator
By changing the value of the input resistor at pin 12 the outputs. For AM the VCO is switched off.
MPX input can be adapted to the level of the FM
demodulator output (see Fig.16).
1998 Mar 24 6
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDDA1 analog supply voltage 1 (pin 5) −0.3 +6.5 V
VDDA2 analog supply voltage 2 (pin 28) −0.3 +12 V
VDDA3 analog supply voltage 3 (pin 56) −0.3 +12 V
VDDD digital supply voltage (pin 52) −0.3 +6.5 V
Tstg storage temperature −55 +150 °C
Tamb operating ambient temperature −40 +85 °C
Ves electrostatic handling note 1
pins 8 and 9 −100 +100 V
all other pins −300 +300 V
Note
1. Charge device model class B: equivalent to discharging a 200 pF capacitor via a 0 Ω series resistor.
CHARACTERISTICS
V56-4 = V28-4 = 8.5 V; V5-4 = V52-55 = 5 V; Tamb = 25 °C; fmod = 1 kHz; deviation = 22.5 kHz; Rg = 50 Ω; V37-35 = 10 mV;
with de-emphasis = 50 µs; coil quality = 15; unless otherwise specified.
Currents
AM mode 14 17 21 mA
IDDA2 analog supply current 2 (pin 28) FM mode 2.4 3.0 3.6 mA
AM mode 9.5 12 15 mA
IDDD digital supply current (pin 52) 8 10 12 mA
I19 + I20 total FM mixer output current 4.8 6.0 7.2 mA
I22 + I23 total AM mixer output current AM mode 10 12 14 mA
FM-IF path; see Fig.4
V19-20 max(p-p) maximum output voltage 12.0 14.0 − V
(peak-to-peak value)
I19; I20 mixer bias current 2.4 3.0 3.6 mA
mixer leakage current in AM position − − 2 µA
I19IF2/V13-14IF1 conversion gain 1.65 1.9 2.2 mS
Ri input resistance (pins 13 to 14) 5 7 − kΩ
Ci input capacitance (pins 13 to 14) − 3 4.5 pF
Ropt optimum generator resistance − 1.2 − kΩ
Ro output resistance (pins 19 to 20) 15 20 − kΩ
Co output capacitance (pins 19 to 4 − 12 14 pF
and pins 20 to 4)
IP3 third order intermodulation 114 124 − dBµV
1998 Mar 24 7

Oscillator
fosc oscillator frequency − 61.5 − MHz
∆fosc oscillator frequency spread − − 250 Hz
∆fosc/∆T temperature dependence of crystal type Philips − 30 × 10−6 − K−1
oscillator frequency 9922 521 00098
R1 crystal motional resistance − − 70 Ω
C0 crystal shunt capacitance − − 5 pF
FM-IF2 amplifier
V27-24 max(rms) maximum input voltage for 1 dB 80 110 − mV
compression point (RMS value)
V29-4 max(rms) maximum output voltage 220 320 − mV
(RMS value)
V29-4/V27-24 amplifier gain RL = 330 Ω; see Fig.5 9 12 15 dB
∆V29-4/V27-24 gain temperature dependence −25 °C < Tamb < +85 °C − 0.1 − dB/K
Ri input resistance (pins 27 to 24) 300 330 360 Ω
Ci input capacitance (pins 27 to 4) − − 5 pF
Ro output resistance (pin 29) 300 330 360 Ω
Co output capacitance (pins 29 to 4) − − 5 pF
FM-IF2 limiter
Vo 1-2(p-p) limiter output voltage 500 700 − mV
V1-2/V37-35 limiter gain see Fig.6 − 80 − dB
Ci input capacitance (pins 37 to 4) − − 5 pF
Ro output resistance (pins 1 to 2) − − 1.0 kΩ
Co output capacitance (pins 1 to 2) 10 15 20 pF
1998 Mar 24 8

FM demodulator
V47-4(rms) MPX output voltage (RMS value) 160 200 240 mV
V43-4(rms) MPX output voltage for RDS 160 200 240 mV
(RMS value)
V37-35(rms) start of limiting voltage (RMS value) αAF = −3 dB − 25 40 µV
V37-35(rms) input voltage for signal plus see Fig.7 for pin 47
noise-to-noise ratio (RMS value) (MPXOUT) and Fig.8 for
pin 43 (RDS/AMSTOP)
S+N − 30 45 µV
-------------- = 26 dB
N
S+N − 70 100 µV
-------------- = 46 dB
N
∆V43DC residual DC-offset voltage ∆Ldemod = typical value
10 µV < V37-35 < 80 µV − 100 1000 mV
80 µV < V37-35 < 800 mV − 10 30 mV
V43FM/V43AM AM suppression ∆f = 22.5 kHz; 50 60 − dB
fmodAM = 1 kHz;
mAM = 30%;
V37-35 = 3 to 300 mV
V47FM/V47AM AM suppression V37-35 = 1 to 300 mV 50 60 − dB
∆V43-44AFCdis demodulator frequency control at 100 kHz detune from 28 32 − dB
/∆V43-44AFCactive voltage (AFC) efficiency exact tuning
Ro output resistance (pin 47) − − 3 kΩ
output resistance (pin 43) − − 1.5 kΩ
AF bandwidth (pin 43) 200 − − kHz
S+N signal plus noise-to-noise ratio 66 75 − dB
--------------
N
THD total harmonic distortion detuning ≤50 kHz;
∆f = 75 kHz; fmod = 1 kHz
without de-emphasis;
Ldemod = typical value
pin 43; − 0.1 0.35 %
V37-35 = 300 µV
to 800 mV
pin 47; − 0.1 0.35 %
V37-35 = 1 to 800 mV
1998 Mar 24 9

Unweighted voltage level
V50-4 unweighted voltage level see Fig.9; V38 = 2.52 V
V37-35 ≤ 2.5 µV 1.6 2.2 3.0 V
V37-35 = 1.0 mV 2.7 3.4 4.7 V
∆V50-4/∆V37-35 slope of unweighted voltage level 100 µV (RMS) ≤ V37-35
< 300 mV
temperature 0.75 0.9 1.05 V/20 dB
compensation off
temperature 0.6 0.75 0.9 V/20 dB
compensation on
∆V50-4/VK temperature dependence V37-35 = 1 mV
temperature − 5.0 − mV/VK
compensation off
temperature − 2.0 − mV/VK
compensation on
I50(max)source maximum output source current 0.3 − − mA
I50(max)sink maximum output sink current −50 − − µA
Ro50 output resistance − − 300 Ω
ADJUSTMENT OF UNWEIGHTED VOLTAGE LEVEL AND Vmute/AML; note 1
∆V50 adjusting range voltage V37-35 = 10 mV (RMS) −1.8 − +1.8 V
V38-4 internal bias voltage − 2.6 − V
∆V50-4/∆V38-4 adjusting gain − −0.9 − −
Ri38 input resistance − 80 − kΩ
MUTING DEPENDENCE ON ADJUST OF LEVEL UNWEIGHTED VOLTAGE; note 2
V43/V47 start of mute V49/V21 = 0.625 1 3 7 dB
∆V 43 ⁄ V 47 mute slope V43/V47 = −6 dB − 25 − dB/V
--------------------------
∆V 49
Soft mute, time constant control, mono/stereo blend and high-cut control; see Fig.22
MUTE VOLTAGE; note 3
V49-4 mute voltage V38 = 2.52 V
V37-35 < 2.5 µV 1.8 2.2 3.2 V
V37-35 = 1.0 mV 2.7 3.4 4.7 V
∆V49-4/∆V37-35 slope of mute voltage 100 µV (RMS) ≤ V37-35 0.75 0.9 1.05 V/20 dB
< 300 mV
∆V49-4/VK temperature dependency V37-35 = 1 mV − 5.0 − mV/VK
1998 Mar 24 10

ATTACK AND DECAY TIME FOR MUTE VOLTAGE
Ich charge current pin 3 connected to GND − 3.5 − µA
pin 3 connected to pin 5 − 150 − µA
Idch discharge current pin 3 connected to GND − −4.0 − µA
pin 3 connected to pin 5 − −170 − µA
∆f muting activated by 60 kHz FM V49 < 3 V; V37-35 = 3 mV;
interference fmod = 60 kHz
pin 3 connected to GND; − 40 − kHz
V43/V47 = 9 dB
pin 3 connected to pin 5; − 40 − kHz
V43/V47 = 6 dB
V43/V47 maximum mute depth by 60 kHz pin 3 connected to GND − 15 − dB
FM interference pin 3 connected to pin 5 − 10 − dB
TIME CONSTANT FOR MONO/STEREO BLEND VOLTAGE; note 4
Ich charge current V37-35 = 3 mV; − 0.6 − µA
pin 3 connected to GND
V37-35 = 3 mV; − 23 − µA
pin 3 connected to pin 5
Idch discharge current V37-35 = 3 mV; − −17 − µA
V37-35 = 3 mV; − −750 − µA
m mono/stereo blend activated V16 < 2 V; V37-35 = 3 mV;
by 20 kHz AM interference RL16 > 50 MΩ;
fmod = 20 kHz;
data byte 2 bit 5 = 0
pin 3 connected to GND − 45 − %
pin 3 connected to pin 5 − 45 − %
data byte 2 bit 5 = 1
∆f mono/stereo blend activated V16 < 2 V; V37-35 = 3 mV;
by 60 kHz FM interference RL16 > 50 MΩ;
fmod = 60 kHz
pin 3 connected to GND − 50 − kHz
pin 3 connected to pin 5 − 50 − kHz
1998 Mar 24 11

TIME CONSTANT FOR HIGH-CUT CONTROL VOLTAGE SDR; note 5
Ich charge current V37-35 = 3 mV; − 0.6 − µA
V37-35 = 3 mV; − 41 − µA
Idch discharge current V37-35 = 3 mV; − −0.7 − µA
V37-35 = 3 mV; − −44 − µA
m high-cut control activated V15 < 2 V; V37-35 = 3 mV;
by 20 kHz AM interference RL15 > 50 MΩ;
fmod = 20 kHz
∆f high-cut control activated V15 < 2 V; V37-35 = 3 mV;
by 60 kHz FM interference RL15 > 50 MΩ;
fmod = 60 kHz
pin 3 connected to GND − 50 − kHz
pin 3 connected to pin 5 − 50 − kHz
MULTI-PATH DETECTOR
fMP multi-path detector band-pass − 20 − kHz
centre frequency
BMP band-pass bandwidth 7.0 − − kHz
Reference voltage
V21-4 output voltage I21 = −1 mA 4.5 5.1 5.7 V
∆V21-4 temperature dependence − 3.3 − mV/VK
I21 output current − − 1 mA
AM-IF path; see Fig.14 and notes 6 and 7
V22-23 max(p-p) maximum output voltage 12 15 − V
I22, I23 mixer bias current 5.0 6.0 7.0 mA
mixer leakage current in FM position − − 2 µA
I22IF2/V27-24IF1 conversion transconductance 2.2 2.7 3.4 mS
R27-24 input resistance 300 330 360 Ω
C27-24 input capacitance − 5 8 pF
R22-23 output resistance 10.0 20.0 − kΩ
C22-23 output capacitance − 5 10 pF
IP3 third order intermodulation − 137 − dBµV
1998 Mar 24 12

AM DETECTOR; notes 8 and 9
V48-4(rms) AF output level (RMS value) RL48 > 500 kΩ; 190 240 290 mV
100 µV ≤ V33-34 ≤ 300 mV
V33-34(rms) sensitivity voltage (RMS value) S+N − 50 75 µV
-------------- = 26 dB
N
S+N − 200 400 µV
-------------- = 46 dB
N
AM-IF2 minimum input voltage THD ≤ 5%; m = 0.8 − − 100 µV
(RMS value)
AM-IF2 maximum input voltage THD ≤ 5%; m = 0.8 800 − − mV
(RMS value)
R33-34 IF2 input resistance 1.8 2.0 2.2 kΩ
C24-23 IF2 input capacitance − 10 15 pF
Ro48 output resistance 27 33 39 kΩ
Co48 output capacitance − − 10 pF
S+N signal plus noise-to-noise ratio 54 60 − dB
--------------
N
THD total harmonic distortion m = 0.8; − 1.5 3.0 %
300 µV ≤ V33-34 ≤ 200 mV
Notes to the characteristics
1. For typical adjusting range see Figs 10 and 13.
2. For typical curve see Fig.11.
3. The static mute voltage follows the unweighted voltage level as function of FM-IF2 voltage and level adjustment
voltage V38-4. It additionally depends on multi-path level, noise (adjacent channel interferences) and the position of
TSWITCH (pin 3). For typical curve for mute voltage dependence see Fig.12.
4. The mono/stereo blend voltage is generated as a function of FM-IF2 voltage, multi-path level, noise and position of
TSWITCH.
5. The high-cut control voltage is generated as a function of FM-IF2 voltage, multi-path level, noise and position of
TSWITCH.
6. fIF1 = 10.7 MHz; fIF2 = 450 kHz for AM mixer.
7. The AM oscillator signal is generated by division of the 61.5 MHz crystal oscillator. Two divider ratios programmable
by the I2C-bus: divide by 6 (AM-IF1 = 10.7 MHz); divide by 2 (AM-IF1 = 30 MHz).
8. For typical AM level curve see Fig.15.
9. For AM detector; fAMIF2 = 450 kHz; fmod = 400 Hz; m = 30%.
1998 Mar 24 13
STEREO DECODER CHARACTERISTICS

Input signal (∆f = 75 kHz) VMPX(p-p) = 1.7 V; fmod = 1 kHz; de-emphasis time constant t = 50 µs; nominal input resistor
(pin 45) Ri = 168 kΩ; Tamb = 25 °C; unless otherwise specified.
V44-4(rms); AF output voltage (RMS value) 800 900 1000 mV
V41-4(rms)
V44-4; V41-4 DC output voltage 3.1 3.6 4.1 V
I44(max); I41(max) maximum output current 150 − − µA
V44-4/V41-4 difference of output voltage −1 − +1 dB
Ro(44); Ro(41) output resistance − − 600 Ω
RLmin minimum load resistor 12 − − kΩ
αcs channel separation (adjusted) 40 − − dB
S+N signal plus noise-to-noise ratio f = 20 Hz to 15 kHz 74 80 − dB
--------------
N
THD total harmonic distortion − 0.1 0.3 %
MPX input overdrive margin THD = 1% 4 − − dB
Carrier and harmonic suppression at the output; note 1
α19 pilot signal f = 19 kHz − 50 − dB
α38 subcarrier f = 38 kHz − 50 − dB
α57 f = 57 kHz − 50 − dB
α76 f = 76 kHz − 60 − dB
α2 intermodulation fmod = 10 kHz; fspur = 1 kHz − 60 − dB
α3 fmod = 13 kHz; fspur = 1 kHz − 58 − dB
α57 traffic radio (ARI) f = 57 kHz − 70 − dB
α67 subsidiary communications f = 67 kHz 70 − − dB
authorization
α114 adjacent channel frequency f = 114 kHz − 80 − dB
α190 f = 190 kHz − 70 − dB
RR ripple rejection at output fr = 100 Hz; Vr = 100 mV (eff.) − 30 − dB
Mono/stereo control
Vi(pil) pilot threshold voltage stereo on − 24 30 mV
mono on 8 20 − mV
∆Vi(pil) switch hysteresis Vi on/Vi off − 2 − dB
External mono/stereo control; note 2
V17 − 0.75V21 control voltage channel separation see Fig.17
V43/V47 = 6 dB − −110 − mV
V43/V47 = 16 dB − −40 − mV
1998 Mar 24 14
Muting functions (mute via I2C-bus)

∆V44, ∆V41 DC offset voltage tune mute −50 − +50 mV
radio mute (in combination −400 − +400 mV
with tune mute)
αmute tune mute 60 − − dB
radio mute (in combination with 80 − − dB
tune mute)
High-cut control; see Fig.18
V18 − 0.75V21 control voltage note 3
tde-emph = 50 µs 0 − − mV
tde-emph = 80 µs −300 − − mV
tde-emph control range of de-emphasis 50 − 80 µs
Voltage controlled oscillator; note 4
fosc oscillator frequency 225 228 231 kHz
Noise blanker
INTERFERENCE DETECTION FULLY INTERNAL FROM LEVEL DETECTOR
tsup interference suppression time 40 50 − µs
TRIGGER THRESHOLD CONTROL
Ich charge current (into +4 V) − 45 − µA
Idch discharge current (from +8.5 V) − −900 − µA
TRIGGER SENSITIVITY MEASUREMENT WITH PULSED MODULATION OF FM-IF2; see Figs 19 and 20
V37-35(p) trigger sensitivity for test signal 1 V38 = 2.52 V; note 5 − − 0.5 mV
(peak value) V38 = 2.52 V; note 6 100 − − mV
trigger sensitivity for test signal 2 V38 = 2.52 V; note 6 5.0 − − mV
(peak value) V38 = 2.52 V; note 6 100 − − mV
V51 trigger threshold variation with V37-35 = 100 mV; ∆f = 0 kHz − 6.4 − V
∆V51 frequency modulation of FM-IF2 V37-35 = 100 mV; ∆f = 40 kHz − 250 − mV
and fmod = 15 kHz (pin 51)
V37th/V37(3dB) shift of threshold for triggering I46 = 0 14 20 26 dB
from MPX signal
∆V37th/∆I46 shift of threshold as function of I46 −0.32 −0.25 −0.16 dB/µA
V46 bias voltage (pin 46) I46 < 0 4.0 4.3 4.7 V
I46 > 0 5.3 5.7 6.1 V
Ioffset gate input offset current at pins 31 − 20 50 nA
and 32 during suppression pulse
duration
1998 Mar 24 15
Notes to the stereo decoder characteristics

1. The following equations give the values for the carrier and harmonic suppression at the output:
V 0 ( signal ) (at 1 kHz)
α 2 = -----------------------------------------------------------------
- f = ( 2 × 10 kHz ) – 19 kHz
V 0 ( spurious ) (at 1 kHz) s

α 3 = -----------------------------------------------------------------
- f = ( 3 × 13 kHz ) – 38 kHz

α 57 (ARI) = ----------------------------------------------------------------------------------------------
-
V 0 ( spurious ) ( at 1 kHz ± 23 Hz )

- f = ( 2 × 38 kHz ) – 67 kHz
α 67 = -----------------------------------------------------------------

- f = 110 kHz – ( 3 × 38 kHz )
α 114 = -----------------------------------------------------------------

α 190 = -----------------------------------------------------------------
- f = 186 kHz – ( 5 × 38 kHz )
2. The stereo decoder can be set to mono via the I2C-bus. Pilot presence indication via the I2C-bus.
3. The nominal de-emphasis value can be changed to 75 µs with C31; C32 = 10 nF.
4. The VCO is adjusted by means of a digital auxiliary PLL.
5. Noise blanker does not trigger.
6. Noise blanker triggers.
1998 Mar 24 16
CHARACTERISTICS FOR ANALOG-TO-DIGITAL CONVERTERS (ADCs) FOR LEVEL AND

MULTI-PATH VOLTAGES

ADC for FM level information; note 1
∆V37-35 analog-to-digital conversion
step size 2 4 8 dB/step
level range 43 56 69 dB
FM STOP
∆Vstop variation of stop level as function of V42-4 − 16 − dB/V
ADC for AM level information; note 2
∆V33-34 analog-to-digital conversion step size 2 4 8 dB/step
∆V33-34 analog-to-digital conversion level range 43 56 69 dB
AM STOP
∆Vstop variation of stop level as function of V43-4 − 16 − dB/V
ADC for multi-path information; note 3
m multi-path conversion step 0 − − 5 %
step 1 − 15 − %
step 2 − 22 − %
step 3 − 28 − %
step 4 − 34 − %
step 5 − 40 − %
step 6 − 46 − %
step 7 − 52 60 %
Notes
1. The FM level information V50-3 is analog-to-digital converted with 4 bits.
2. The AM level information V49-4 is analog-to-digital converted with 4 bits.
3. The multi-path information V40-4 is analog-to-digital converted with 3 bits covering an IF2 amplitude modulation range
m ≤ 0.6; fmod = 20 kHz.
1998 Mar 24 17
handbook, full pagewidth

1:1 +8.5 V
13 19 LOW NOISE
GENERATOR SPECTRUM
TEA6823T 3.5 330 AMPLIFIER
R&S SMPC 2 ANALYZER
TEA6825T 3.5 Ω AVD 704201
Rg = 50 Ω HP8568A
14 20 fIF2 = 10.7 MHz (S/N = 103 dB)
fIF1 = 72.2 MHz
MHA702
Fig.4 Test circuit FM mixer.

PASSIVE 10 nF 10 nF
GENERATOR ATTENUATOR
27 TEA6823T 29 330 OSCILLOSCOPE
R&S SMPC –6 dB
TEA6825T Ω PM3295A
Rg = 50 Ω RIN = 50 Ω
ROUT = 330 Ω 24 4
MHA703
10 nF
Fig.5 Test circuit IF-amplifier.
handbook, full pagewidth 10 nF 10 nF

37 1
GENERATOR
TEA6823T OSCILLOSCOPE
R&S SMPC 50 Ω
TEA6825T PM3295A
Rg = 50 Ω
35 2
10 nF
MHA704
100 nF
Fig.6 Test circuit limiter gain.
1998 Mar 24 18
MHA247
20
V47-4
(dB)
(1)
0
–20
–40
–60
(2)
–80
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
(1) AF: fIF = 10.7 MHz; deviation = 22.5 kHz; fmod = 1 kHz.
(2) Noise: unweighted B = 250 Hz to 15 kHz with de-emphasis 50 µs.
Fig.7 Signal and noise of muted MPX voltage.
MHA248
20
V43-4
(dB)
(1)
0
–20
–40
–60
(2)
–80
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
Fig.8 Signal and noise of unmuted MPX voltage.
1998 Mar 24 19
MHA249
10
V50-4
(V)
(1)
4
(2)
0
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
(1) Temperature compensation off.
(2) Temperature compensation on.
Fig.9 Unweighted voltage level (typical curve).
MHA250
10
V50-4
(V)
0
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
Fig.10 Adjustment range of unweighted voltage level.
1998 Mar 24 20
MHA251
20
V47-4
(dB)
(1)
0
(4) (3) (5)
–20
–40
–60
(4) (2)
(3)
(5)
–80
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
(3) Level adjustment set to α3dB at 0.6 mV.
(4) Level adjustment set to α3dB at 0.4 mV.
(5) Level adjustment set to α3dB at 1 mV.
Fig.11 Muting dependence of unweighted voltage level (typical curve).
1998 Mar 24 21
MHA252
10
V49-4
(V)
0
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
Fig.12 Typical mute voltage as function of FM-IF2 voltage.
MHA213
10
V49-4
(V)
0
10 –3 10 –2 10 –1 1 10 10 2 10 3
V37-35 (mV)
Fig.13 Adjustment range mute voltage.
1998 Mar 24 22
handbook, full pagewidth +8.5 V
GENERATOR 270 Ω 10 nF 27 22 LOW NOISE

SPECTRUM
R&S SMPC TEA6823T 7 AMPLIFIER
20 2.2 ANALYZER
Rg = 50 Ω TEA6825T 7 AVD 704201
kΩ HP8568A
fIF1 = 10.7 MHz 24 23 (S/N = 103 dB)
22
10 nF nF
MHA705
Fig.14 Test circuit AM mixer.
MHA214
20
V48-4
8
(dB)
(1) THD
0
(%)
6
(4)
–20
–40
(2)
–60
(3)
–80
10 –3 10 –2 10 –1 1 10 10 2 10 3
V33-34 (mV)
(1) AF: f = 450 kHz; m = 30%; fmod = 400 Hz.

(2) Noise: unweighted B = 250 Hz to 15 kHz.
(3) THD m = 80%.
(4) AM level voltage.
Fig.15 Signal, noise and distortion of AM AF output voltage and AM voltage level (typical curve).
1998 Mar 24 23
MHA215
4
VI,MPX(p-p)
(V)
0
0 100 200 300
RIN(pin20) (kΩ)
Fig.16 Adaption of MPX input to FM-demodulator output level by variation of the input resistor.
MHA706
40
αcs
(dB)
30
20
10
0
–300 –200 –100 0
control voltage V17 – 0.75V21 (mV)
Fig.17 Channel separation as function of control voltage.
1998 Mar 24 24
MHA707
0
(dB)
–1
–2
–3
–4
–300 –200 –100 0
control voltage V18 – 0.75V21 (mV)
Fig.18 High-cut with fmod = 10 kHz as function of control voltage.
1998 Mar 24 25

V37-35 trep = 1 ms MHA210
t = 5 µs
tr = tf = 0.5 µs
A
0.6 A
fIF = 10.7 MHz
Fig.19 Test signal 1 for interference detection from level detector.

trep = 1 ms MHA211
V37-35
t = 5 µs
tr = tf = 0.5 µs
0.2 A
fIF = 10.7 MHz
Fig.20 Test signal 2 for interference detection from level detector.
1998 Mar 24 26
I2C-BUS AND I2C-BUS CONTROLLED FUNCTIONS Table 1 Structure of the I2C-bus
I2C-bus specification DESCRIPTION SPECIFICATION

The standard I2C-bus specification is expanded by the Bus address of the 1100001X
following definitions. TEA6823T and the
TEA6825T
Structure of the I2C-bus logic: slave transceiver with auto
Subaddress not used
increment and expansion to switch a direct transfer of all
transmissions to an output for the radio front-end IC Hardware (pin) not available
(TEA6810T respectively TEA6811T). programmable
address bits
Subaddresses are not used.
Default settings by data byte 1 bits 4 to 7 are set to
power-on reset logic 0; all other bits are random
DATA TRANSFER FOR THE TEA6823T AND THE TEA6825T
Data sequence: Table 2 Data to be received by the IC for data byte 1
• Address
BIT DESCRIPTION RESULT
• Byte 1
0 switch for mono bit 0 = 1
• Byte 2.
switch for stereo bit 0 = 0
The data transfer may be in this order only. The transfer 1 LSB reference frequency for
direction of the data bytes is defined by the LSB of the synthesizer
address.
2 reference frequency for
The data becomes valid at the output of the internal synthesizer
latches with the acknowledge of each byte. A STOP 3 MSB reference frequency for
condition after any byte can shorten transmission times. synthesizer
When writing to the transceiver by using the STOP 4 tuning mute off bit 4 = 1
condition before completion of the whole transfer: tuning mute on bit 4 = 0
• The remaining bytes will contain the old information 5 SDS/SDR hold off bit 5 = 1
• If the transfer of a byte was not completed, this byte is SDS/SDR hold on bit 5 = 0
lost and the previous information is available. 6 radio mute off bit 6 = 1
radio mute on bit 6 = 0
DATA TRANSFER TO AN OUTPUT OF THE FRONT-END IC
7 I2C-bus to front-end ENABLED bit 7 = 1
A data bit in the transceiver of the TEA6823T or TEA6825T
I2C-bus to front-end DISABLED bit 7 = 0
enables or disables a direct transfer of all transmissions to
an interface stage for the front-end IC.
Table 3 Reference frequency setting in data byte 1;
For a transmission to the front-end IC the address and the see Table 1
data format of the front-end IC has to be used.
BIT 3 BIT 2 BIT 1 FREQUENCY SETTING
Remark: the pull-up resistors for the front-end interface
(pins 6 and 7) should not be connected to the 5 V supply 0 0 0 3 kHz
voltage of the front-end IC, otherwise a bus pull-down 0 0 1 5 kHz
(pin 53) can occur during switching off the front-end supply 0 1 0 10 kHz
when the interface stage is enabled.
0 1 1 15 kHz
DATA TRANSFER TO THE IF IC 1 0 0 25 kHz
1 0 1 50 kHz
Data transfer to the IF IC (TEA6823T or TEA6825T) is
independent of the state of interface stage for the front-end 1 1 0 not defined
IC. 1 1 1 not defined
1998 Mar 24 27
Table 4 Data to be received by the IC for data byte 2 Table 6 Data to be transmitted by the IC for data byte 2
BIT DESCRIPTION RESULT BIT DESCRIPTION
0 AM/FM; AM mode bit 0 = 0 0 LSB of the IF-counter
AM/FM; FM mode bit 0 = 1 1 IF-counter
1 divider for AM mixer; divide by 2 bit 1 = 0 2 IF-counter
divider for AM mixer; divide by 6 bit 1 = 1 3 IF-counter
2 measure time IF-count; 40 ms bit 2 = 0 4 IF-counter
measure time IF-count; 4 ms bit 2 = 1 5 IF-counter
3 SDR off bit 3 = 0 6 IF-counter
SDR on bit 3 = 1 7 MSB of the IF-counter
4 IF-prescaler division rate; bit 4 = 0
divide by 200 REFERENCED FREQUENCY GENERATION
IF-prescaler division rate; bit 4 = 1 Table 7 Division ratios
divide by 25
REFERENCE
5 sensitivity unchanged bit 5 = 0
DIVISION RATIO FREQUENCY
multi-path sensitivity switch; less bit 5 = 1 (kHz)(1)
sensitivity by an offset of ∆m = 10%
20500 3
6 temperature compensation of
unweighted voltage level; 12300 5
temperature coefficient as specified 6150 10
in Chapter “Characteristics” 4100 15
temperature compensation off bit 6 = 0 2460 25
temperature compensation on bit 6 = 1 1230 50
7 noise blanker deactivated by high bit 7 = 0
modulation Note
noise blanker not deactivated bit 7 = 1 1. All specified frequencies are valid for a crystal
oscillator frequency of 61.5 MHz.
Table 5 Data to be transmitted by the IC for data byte 1;
note 1
BIT DESCRIPTION
0 bit 1 level information
1 bit 2 level information
2 MSB (bit 3) level information
3 LSB multi-path information
4 multi-path information
5 MSB multi-path information
6 stereo pilot presence; bit 6 = 1
7 LSB (bit 0) level information
Note
1. The analog-to-digital conversion for multi-path and
level will be done during a transmission of any address
to the I2C-bus.
1998 Mar 24 28
Table 8 Output signal of reference frequency divider

SYMBOL PARAMETER MIN. TYP. MAX. UNIT
V10-11(p-p) differential output voltage (peak-to-peak value) 0.3 0.4 0.5 V
V10-4(p-p); single-ended output voltage (peak-to-peak value) 0.15 0.2 0.3 V
V11-4(p-p)
C10-4; C11-4 output capacitance − − 4 pF
R10-52; R11-52 output resistance 800 1000 1200 Ω
IF-COUNTER
Table 9 IF-counter sensitivity
SYMBOL PARAMETER CONDITIONS MIN. UNIT
V33-34 IF-counter sensitivity AM mode; m = 0 200 µV
V37-35 IF-counter sensitivity FM mode 200 µV
AM counting windows are 4 or 40 ms. FM counting windows are 4 or 40 ms. AM counting resolution is 250 or 25 Hz.
FM counting resolution is 5 kHz, 625 Hz, 50 kHz or 6.25 kHz. AM-IF-prescaler is divisible by 1. FM-IF-prescaler is
divisible by 25 or 200.
handbook, full pagewidth B0 B1 B2 B3 B4 B5 B6 B7
FM IF2
FM IF-PRESCALER
8-BIT BINARY COUNTER
÷ 25 /÷ 200
prescaler setting
MHA205
4 ms/40 ms
AM IF2 counter window
Fig.21 IF-counter structure.
1998 Mar 24 29
IF-counter read out

IF-counter read out as a function of FM or AM position, counter window and prescaler setting
PRESCALER WINDOW fIF RESOLUTION RANGE (kHz)

FM/AM READ OUT
RATIO (ms) (kHz) (Hz/count) MIN. MAX.
FM 200 4 10700 D6H 50000 4300 17050
FM 200 40 10700 5CH 5000 10065 11335
FM 25 4 10700 B0H 6250 9906.25 11493.75
FM(1) 25 40 10700 E0H 625 10620.63 10779.38
AM 1 4 450 08H 250 418.25 481.75
AM(1) 1 40 450 50H 25 446.83 453.18
Note
1. In position FM with a prescaler ratio of 25, counter window of 40 ms and in position AM with 40 ms counter window
ambiguous counting results within the IF filter bandwidth are obtained. The counting range is 127 counts above and
127 counts below the nominal IF of 10.7 MHz for FM and 450 kHz for AM.
The IF-count windows are valid for a crystal oscillator frequency of 61.5 MHz.
The FM/AM switching is carried out by bit 0 of byte 2 of the received data of the IC.
The IF-counter operates continuously.
The IF-counter and window-counter will be reset when the I2C-bus logic detects the address of the IC. This disables
changes in the latches for the IF-count, while reading this value. If the transmission to the front-end IC is disabled after
the synthesizer loop of the TEA6810T/TEA6811T front-end IC has locked for a new frequency, the IF-count will be
available after the set measuring time.
The IF-counter starts at 0. The IF-counter output are the 8 least significant bits of the counting result.
1998 Mar 24 30
INTERNAL CIRCUITRY
Table 10 Equivalent pin circuits and pin voltages
DC VOLTAGE
PIN SYMBOL (V) EQUIVALENT CIRCUIT
AM FM
1 QDET1 open-circuit 4.0
2 QDET2 open-circuit 4.0 1
39
MHA164
3 TSWITCH open-circuit 0.4 to 6.0
MHA165
4 AGND − −
5 VDDA1 5.0 5.0
6 HFBUS1 5.0 5.0
MHA166
7 HFBUS2 5.0 5.0
MHA167
1998 Mar 24 31
DC VOLTAGE
AM FM
8 XTAL1 4.1 4.1
9 XTAL2 4.1 4.1
8 9
MHA168
10 fref(p) 4.9 4.9

11 fref(n) 4.9 4.9
10
11
MHA169
12 Iref 4.3 4.3
12
MHA170
13 FMIF1IN1 2.3 2.3

19 20
14 FMIF1IN2 2.3 2.3
14 13
MHA171
1998 Mar 24 32
DC VOLTAGE
AM FM
15 TSDR 0.7 to 5.5 0.7 to 5.5
15
MHA172
16 TSDS 0.7 to 5.5 0.7 to 5.5
16
MHA173
17 VSDS 3.0 to 5.5 3.0 to 5.5

17
MHA174
18 VSDR 3.0 to 5.5 3.0 to 5.5

18
MHA175
19 FMIF2OUT1 8.5 8.5

19 20
20 FMIF2OUT2 8.5 8.5
14 13
MHA171
1998 Mar 24 33
DC VOLTAGE
AM FM
21 Vref 5.1 5.1
21
MHA176
22 AMIF2OUT1 8.5 8.5

22 23
23 AMIF2OUT2 8.5 8.5
MHA177
24 FMAMDEC 3.0 2.5

24
MHA178
25 PHASEDET 2.8 to 7.2 2.8 to 7.2

25
MHA179
26 PILDET 0.4 0.4 to 7.0

26
MHA180
1998 Mar 24 34
DC VOLTAGE
AM FM
27 FMAM10.7 3.0 2.5
27
MHA181
28 VDDA2 8.5 8.5

29 FMIFAMPOUT 6.0 6.0
29
MHA182
30 AFGND 3.6 3.6
30
MHA183
31 DEEMPHR 2.3 2.3
31
MHA184
32 DEEMPHL 2.3 2.3
32
MHA185
1998 Mar 24 35
DC VOLTAGE
AM FM
33 AMIF2IN1 2.7 0.7
34 AMIF2IN2 2.7 0.7
33
34
MHA186
35 FMIN2 0.7 2.7
35
MHA187
36 DCFEED 2.7 2.7

36
37 FMIN1 0.7 2.7
37
MHA188
38 LEVELADJ 2.6 2.6
38
MHA189
1998 Mar 24 36
DC VOLTAGE
AM FM
39 CAFC 1.0 to 2.2 1.0 to 7.0
1
39
MHA164
40 MPBUF 0.7 to 6.0 0.7 to 6.0
40
MHA190
41 OUTLEFT 3.6 3.6
41
MGK694
42 FMSTOP 0 to 5.2 0 to 5.2
42
MHA192
43 RDS/AMSTOP 0 to 5.2 3.0
43
MHA193
44 OUTRIGHT 3.6 3.6
44
MHA194
1998 Mar 24 37
DC VOLTAGE
AM FM
45 MPXIN 2.8 2.8
45
MHA195
46 THRES 4.3/5.7 4.3/5.7

8.5 V
5V
46 MGK695
47 MPXOUT 0 3.0
47
MHA197
48 AMAFOUT 3.7 4.8
48
MHA198
49 Vmute/AML 1.0 to 5.5 1.0 to 5.5

49
MHA199
50 LEVELUNWEIG 1.0 to 7.0 1.0 to 7.0
50
MHA200
1998 Mar 24 38
DC VOLTAGE
AM FM
51 IACCONTR 0 6.0
51
MHA201
52 VDDD 5.0 5.0

53 SDA 5.0 5.0
53
MHA202
54 SCL 5.0 5.0
54
MHA203
55 DGND 0 0
56 VDDA3 8.5 8.5
1998 Mar 24 39
APPLICATION INFORMATION
handbook, full pagewidth 1 kΩ

VCC1
SFP450 Vref
220 nF 47 Ω VCC 7PSAG-
+8.5 V 68 Ω 1946D = S 1.5 nF FMSTOP LEVELADJ
2.2 MΩ 220
µH 10 2.7
10 pF 33 µH 68 µH 10 nF 1 mH nF 330 Ω 100 k Ω 100 kΩ
kΩ SFE10.7 TR5 R40
6.8 µH 100 nF R39
82 kΩ
100 nF 470 Ω 270 pF 270 pF 47 µF SFE10.7 100 100
220 Ω nF nF
8.2 pF
100 Ω 18 19 BF840 22 23 33 34 42 36 38
22 390 Ω 27 Ω
37
3.3 µH AM/FM BAND- 21
100 nF 26 A
GAP 330 Ω AM/FM FM-LIMITER
BF861A 330 pF 35 SWITCH AM-AMPLIFIER
B
AM - 16 100 nF 27 LEVEL
BAV 26 AM/FM AM DETECTOR
RF AM SFE
99 22 pF
25 15 TR4 10.7 C
100 pF 24
27 22 :2/:6
47 mH 330 nF D
388BN-1211Z 1 µF pF P392BE-
28 LIMITER IF- LEVEL
100 470 Ω AGC 2049AJ = S :N5
33 µF 28 AMPLIFIER AMPLIFIER
pF 29
220 kΩ TEA6810T 22 Ω 100 nF
29 E
330 nH TEA6811T
:N2
5.6 pF 1 µF 33 19
20
6.8 10 pF 2×ZS369SCS- 20 kHz
pF L1 AGC TR2 2144AJ TR3
BB804 11 13 F
1 nF FM FM
30 AM/FM 56 56
pF pF BUFFER
E543SNAS
-04011 31 12 14
47 kΩ 10 pF 10 nF
BUFFER
PIN Philips 9922 521 00098
22 Ω 32 DIODE
10 µF PROGRAMABLE or Daiwa AT - 49 8 ADC ADC
DRIVE 61.5 MHz OSCILLATOR MULTI-
34 DIVIDER 9 LEVEL
ISV 1 nF 1 µF PATH
172 1
47 kΩ BUFFER 6 10
100 nF
22 Ω PHASE REFERENCE IF-
VCC 38 DETECTOR 7 FREQUENCY COUNTER
+8.5 V 22 nF 100 µF 11
E543SNAS 2
-02010 1.8 pF
4 SDA 6
37 AM/FM BUS
1.8 2.7 pF SCL I2C-BUS G
OSCILLATOR CONTROL 5
L7 pF 35 7
10 kΩ 10 kΩ
BB135 9
4 to 10 pF 36 AM/FM 100
8
39 CHARGE LOCK nF
2.2 kΩ 10 kΩ TEA6823T H
100 nF PUMP DETECTOR AM/FM TEA6825T
40
47 pF 3.6 kΩ
3.3 nF 10 17 20 3 14 13 54 53 55 40
12 nF
100 nF 330 330
VCC 10 kΩ Ω Ω
+8.5 V
10 kΩ 220 nF
47 µF
MHA708 VCCD
3.3
IN-LOCK µH VCCA +5 V
+5 V SCL SDA
+8.5 V
Time constant control: slow or fast attack and decay time constants for soft mute, mono/stereo and high-cut control can be chosen by connecting
pin 3 to GND or pin 21.
Fig.22 ICE application diagram (continued in Fig.23).
1998 Mar 24 40
Vref RDS
TOKO 10 nF 220 kΩ
P392BC-1977Z 33 kΩ
AMSTOP 3.3 nF
L13 100 kΩ 68 pF 220 nF 22 nF
R51 220 nF 82 kΩ 27 kΩ
68 µF 33 kΩ 100 kΩ
R41
4.3 kΩ
1 2 39 43 48 47 45 25
A LOW PHASE
AFC MPX MUTE PASS VCO
BUFFER SOFT FILTER DETECTOR
B
AM DIGITAL LOGIC
C DELOG PHASE
DETECTOR BLOCK
AMPLIFIER
D 820 kΩ
PASS f ref 38 kHz
PILOT PILOT 19 kHz
HIGH TEA6823T DETECTOR
60 kHz CANCELLER 26
TEA6825T 100 nF
31
E
6.8 nF
radio
AVERAGE mute
DETECTOR
-
F MPX- + 44 OUTRIGHT
Vint1
PEAK tuning DECODER 470 nF
30
DETECTOR mute
AND
MATRIX + 41
- OUTLEFT
AVERAGE
DETECTOR radio
mono mute
32 6.8 nF
PEAK HIGH PULSE VCC

PASS
DETECTOR FORMER +8.5 V
FILTER 22 µH
+8.5 V
56 100 nF
INTERFERENCE 47 µF
Vint1
CURRENT DETECTOR
G Vint2 SUPPLY
AM SWITCH - 4
470 nF
Vint2 +
12 120 kΩ
TEMPERATURE THRESHOLD
H MODULATION NOISE
COMPENSATION CONTROL VCCA
DETECTOR DETECTOR +5 V
5
50 3 46 16 49 15 17 18 51 21 52
100 nF
12 kΩ 33 µF 47 µF
RC 3.3 MΩ 1 MΩ
2.2 MΩ 1.2 MΩ
100 100 10 Ω
220 nF nF 100 nF 33 kΩ MHA709
nF 100 nF
level Vref VDDD
VCC +5 V
8.5 V
Fig.23 ICE application diagram (continued from Fig.22).
1998 Mar 24 41
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1998 Mar 24
Philips Semiconductors
In Car Entertainment (ICE) car radio
lock VCCD VCC VCCA
detector +5 V +8.5 V +5 V
P392BC-1977Z 22 µH
1 56 +8.5 V
100 µF 22 Ω
4.3 kΩ 100 nF VCC
12 nF 3.3 nF 47 µF +8.5 V
40 1 L13 220 nF
10 kΩ
100 nF SCL
3.6 kΩ 330 Ω
22 nF 100 nF SDA
2.2 kΩ
47 µF 100 nF 330 Ω 10 kΩ 10 kΩ
VCCD
47 pF BB135 1.8 pF 5
+5 V
100 nF
10 kΩ SDA
E543SNAS-02010 SCL
5
L7 10 kΩ 50 LEVEL
2.7 pF
35 100 nF
4 to 10 pF
1 µF 61.5 MHz
10 nF 220 kΩ
1.8 pF
ISV172 47 kΩ 3.3 nF
220 kΩ
SEP 68 pF
10 220 nF 82 kΩ
Fref
1 µF
100 pF 10 pF 1 nF 22 kΩ 100 nF R41 100 kΩ
470 nF RC
BB +8.5 V
330 nH 5.6 pF 804 10 pF 10 S369SCS-2144AJ (2x) 45
L1 TEA6810T
6.8 pF TR2 TR3 120 kΩ
10 pF 30 TEA6811T OUTRIGHT
E543SNAS 56 pF 56 pF
-4011
TEA6823T
RDSMPX
TEA6825T 100 kΩ
33 µF 2.2 MΩ 33 kΩ
47 kΩ 1 nF 47 µF
10 nF
47 Ω 15 AMSTOP
42
220 µH 100 FMSTOP

100 100 kΩ
1 µF nF TR4 3.3 MΩ nF R39 R51
330 pF P392BE- 33 100 OUTLEFT
220 nF 10 pF 220 Ω
100 nF 2049AJ = S kΩ nF 220 nF
40 33 kΩ
6.8 µH 15
3.3 µH 1 MΩ 68 µF Vref
BF861A
330 pF
25 1.2 MΩ R40
100 nF 100 pF 82 kΩ 100 kΩ
100 Ω
12 kΩ LEVELADJ
22 pF SFE10.7
20
47 mH
BAV 388BN-1211Z 8.2 pF 1 mH 100 nF
99 Vref
330
7PSAG-1946D = S Ω
TEA6823T; TEA6825T
2.2 MΩ 470 Ω 35
20 1.5 nF 100 nF
21 100 nF
TR5
470 Ω 22 nF
68 µH 2.7 kΩ 330 Ω
33 µH 10 nF
220 nF 27 kΩ 6.8 nF BF840
25
Preliminary specification
100 100 nF 6.8 nF
270 pF 270 pF 33 µF
nF 22 nF
1 kΩ 390 Ω
470 nF 27 Ω
SFE10.7 820 kΩ
30
100 nF
28 29
SFP450 SFE10.7
MHA710
Fig.24 AM/FM car radio receiver with TEA6810T and TEA6825T or TEA6811T and TEA6823T.
PACKAGE OUTLINES
VSO56: plastic very small outline package; 56 leads SOT190-1
D E A
X
y
HE v M A
56 29
Q
A2 A
A1 (A 3)
pin 1 index θ
Lp
L
detail X
1 28
w M
e bp
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.
0.3 3.0 0.42 0.22 21.65 11.1 15.8 1.6 1.45 0.90
mm 3.3 0.25 0.75 2.25 0.2 0.1 0.1 o
0.1 2.8 0.30 0.14 21.35 11.0 15.2 1.4 1.30 0.55 7
0.012 0.12 0.017 0.0087 0.85 0.44 0.62 0.063 0.057 0.035 0o
inches 0.13 0.01 0.0295 0.089 0.008 0.004 0.004
0.004 0.11 0.012 0.0055 0.84 0.43 0.60 0.055 0.051 0.022
Note
1. Plastic or metal protrusions of 0.3 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION
96-04-02
SOT190-1
97-08-11
1998 Mar 24 43
VSO56: plastic very small outline package; 56 leads; face down SOT190-2
y HE v M A
X
c
D
E A
56 29
L
Lp
θ
A1 (A 3)
A2 A
Q
pin 1 index
detail X
1 28
w M
e bp
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.
0.3 3.0 0.42 0.22 21.65 11.1 15.8 1.6 1.45 0.90
mm 3.3 0.25 0.75 2.25 0.2 0.1 0.1 o
0.1 2.8 0.30 0.14 21.35 11.0 15.2 1.4 1.30 0.55 7
0.012 0.12 0.017 0.0087 0.85 0.44 0.62 0.063 0.057 0.035 0o
inches 0.13 0.01 0.0295 0.089 0.008 0.004 0.004
0.004 0.11 0.012 0.0055 0.84 0.43 0.60 0.055 0.051 0.022
Note
1. Plastic or metal protrusions of 0.3 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION
96-04-02
SOT190-2
97-08-11
1998 Mar 24 44
SOLDERING Wave soldering

Introduction Wave soldering techniques can be used for all VSO
packages if the following conditions are observed:
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when • A double-wave (a turbulent wave with high upward
through-hole and surface mounted components are mixed pressure followed by a smooth laminar wave) soldering
on one printed-circuit board. However, wave soldering is technique should be used.
not always suitable for surface mounted ICs, or for • The longitudinal axis of the package footprint must be
printed-circuits with high population densities. In these parallel to the solder flow.
situations reflow soldering is often used. • The package footprint must incorporate solder thieves at
This text gives a very brief insight to a complex technology. the downstream end.
A more in-depth account of soldering ICs can be found in During placement and before soldering, the package must
our “Data Handbook IC26; Integrated Circuit Packages” be fixed with a droplet of adhesive. The adhesive can be
(order code 9398 652 90011). applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
Reflow soldering adhesive is cured.
Reflow soldering techniques are suitable for all VSO Maximum permissible solder temperature is 260 °C, and
packages. maximum duration of package immersion in solder is
Reflow soldering requires solder paste (a suspension of 10 seconds, if cooled to less than 150 °C within
fine solder particles, flux and binding agent) to be applied 6 seconds. Typical dwell time is 4 seconds at 250 °C.
to the printed-circuit board by screen printing, stencilling or A mildly-activated flux will eliminate the need for removal
pressure-syringe dispensing before package placement. of corrosive residues in most applications.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary Repairing soldered joints
between 50 and 300 seconds depending on heating Fix the component by first soldering two diagonally-
method. Typical reflow temperatures range from opposite end leads. Use only a low voltage soldering iron
215 to 250 °C. (less than 24 V) applied to the flat part of the lead. Contact
Preheating is necessary to dry the paste and evaporate time must be limited to 10 seconds at up to 300 °C. When
the binding agent. Preheating duration: 45 minutes at using a dedicated tool, all other leads can be soldered in
45 °C. one operation within 2 to 5 seconds between
270 and 320 °C.
1998 Mar 24 45
DEFINITIONS
Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1998 Mar 24 46
NOTES
1998 Mar 24 47
Philips Semiconductors – a worldwide company
Argentina: see South America Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +31 40 27 82785, Fax. +31 40 27 88399
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Tel. +64 9 849 4160, Fax. +64 9 849 7811
Fax. +43 160 101 1210 Norway: Box 1, Manglerud 0612, OSLO,
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220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Philippines: Philips Semiconductors Philippines Inc.,
Belgium: see The Netherlands 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Brazil: see South America
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, Tel. +48 22 612 2831, Fax. +48 22 612 2327
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102 Portugal: see Spain
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Romania: see Italy
Tel. +1 800 234 7381 Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
China/Hong Kong: 501 Hong Kong Industrial Technology Centre, Tel. +7 095 755 6918, Fax. +7 095 755 6919
72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +852 2319 7888, Fax. +852 2319 7700 Tel. +65 350 2538, Fax. +65 251 6500
Colombia: see South America Slovakia: see Austria
Czech Republic: see Austria Slovenia: see Italy
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
Tel. +45 32 88 2636, Fax. +45 31 57 0044 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +27 11 470 5911, Fax. +27 11 470 5494
Tel. +358 9 615800, Fax. +358 9 61580920 South America: Al. Vicente Pinzon, 173, 6th floor,
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, 04547-130 SÃO PAULO, SP, Brazil,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Tel. +55 11 821 2333, Fax. +55 11 821 2382
Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Spain: Balmes 22, 08007 BARCELONA,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Tel. +34 3 301 6312, Fax. +34 3 301 4107
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Tel. +46 8 632 2000, Fax. +46 8 632 2745
Hungary: see Austria Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 488 3263
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
Tel. +91 22 493 8541, Fax. +91 22 493 0966 TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Indonesia: see Singapore Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +66 2 745 4090, Fax. +66 2 398 0793
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, Tel. +90 212 279 2770, Fax. +90 212 282 6707
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +1 800 234 7381
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Uruguay: see South America
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880 Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +9-5 800 234 7381 Tel. +381 11 625 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1998 SCA57

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands 545102/1200/01/pp48 Date of release: 1998 Mar 24 Document order number: 9397 750 02316

Data Sheet: TEA6823T TEA6825T

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Data Sheet: TEA6823T TEA6825T

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INTEGRATED CIRCUITS

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ndbook, full pagewidth

fref 19 kHz 38 kHz

VDDD VCC Vref VDDD MGK693

Fig.1 Block diagram.

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PIN DESCRIPTION SYMBOL PIN DESCRIPTION

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

handbook, halfpage handbook, halfpage

QDET2 2 55 DGND DGND 55 2 QDET2

TSWITCH 3 54 SCL SCL 54 3 TSWITCH

AGND 4 53 SDA SDA 53 4 AGND

VDDA1 5 52 VDDD VDDD 52 5 VDDA1

HFBUS1 6 51 IACCONTR IACCONTR 51 6 HFBUS1

HFBUS2 7 50 LEVELUNWEIG LEVELUNWEIG 50 7 HFBUS2

XTAL1 8 49 Vmute/AML Vmute/AML 49 8 XTAL1

XTAL2 9 48 AMAFOUT AMAFOUT 48 9 XTAL2

fref(p) 10 47 MPXOUT MPXOUT 47 10 fref(p)

fref(n) 11 46 THRES THRES 46 11 fref(n)

Iref 12 45 MPXIN MPXIN 45 12 Iref

FMIF1IN1 13 44 OUTRIGHT OUTRIGHT 44 13 FMIF1IN1

FMIF1IN2 14 43 RDS/AMSTOP RDS/AMSTOP 43 14 FMIF1IN2

TSDS 16 41 OUTLEFT OUTLEFT 41 16 TSDS

VSDS 17 40 MPBUF MPBUF 40 17 VSDS

VSDR 18 39 CAFC CAFC 39 18 VSDR

FMIF2OUT1 19 38 LEVELADJ LEVELADJ 38 19 FMIF2OUT1

FMIF2OUT2 20 37 FMIN1 FMIN1 37 20 FMIF2OUT2

Vref 21 36 DCFEED DCFEED 36 21 Vref

AMIF2OUT1 22 35 FMIN2 FMIN2 35 22 AMIF2OUT1

AMIF2OUT2 23 34 AMIF2IN2 AMIF2IN2 34 23 AMIF2OUT2

FMAMDEC 24 33 AMIF2IN1 AMIF2IN1 33 24 FMAMDEC

PHASEDET 25 32 DEEMPHL DEEMPHL 32 25 PHASEDET

PILDET 26 31 DEEMPHR DEEMPHR 31 26 PILDET

FMAM10.7 27 30 AFGND AFGND 30 27 FMAM10.7

VDDA2 28 29 FMIFAMPOUT FMIFAMPOUT 29 28 VDDA2

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

STEREO DECODER CHARACTERISTICS

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Muting functions (mute via I2C-bus)

In Car Entertainment (ICE) car radio TEA6823T; TEA6825T

Notes to the stereo decoder characteristics

V 0 ( signal ) (at 1 kHz)

V 0 ( signal ) (at 1 kHz)

V 0 ( signal ) (at 1 kHz)

V 0 ( signal ) (at 1 kHz)