Computer Architecture Final Term Syllabus

Chapter 4 (Main Memory)

1. Memory Characteristics
2. Memory Location
3. Capacity
4. Unit of Transfer
5. Access Methods
6. Memory Hierarchy
7. Performance
8. Physical Types
9. Physical Characteristics
10. Organisation
11. Semiconductor Memory
12. Memory Cell Operation
13. Semiconductor Memory Types
14. Random Access Memory (RAM)
15. Dynamic RAM
16. Types of DRAM
17. Static RAM
18. SRAM v DRAM
19. Read Only Memory (ROM)
20. Types of ROM
21. Memory Organisation in Detail

Chapter 5(Cache Memory)

1. Cache
2. Mapping
 Direct Mapping
 Associative Mapping
 Set Associative Mapping

3. Replacement Algorithms ( LRU, FIFO, least frequently used , Random)

 In Class LRU discussed in Detail

4. Definitions
  Write policy
 Write Through
 Write back
 Line size
 Multilevel caches
 Unified vs split cache

Chapter 7 (Instruction Set CHARACTERISTICS AND FUNCTIONS)

1. Instruction Set
2. Elements of an Instruction
3. Instruction Cycle State Diagram
4. Instruction Types
5. Instruction Set Design Decisions
6. Operation range
7. Data types
8. Instruction formats
9. Registers
10. Addressing modes
11. RISC v CISC
12. Types of Operand
13. Types of Operation
14. Branch Instruction

Chapter 8 (Instruction Addressing Modes & Formats)

Addressing Modes
1. Immediate
2. Direct
3. Indirect
4. Register
5. Register Indirect
6. Displacement (Indexed)
7. Relative Addressing
8. Base-Register Addressing
9. Indexed Addressing
10. Stack
Chapter 9
1. Pipelining (inorder start in order finish)
2. Without Pipelining
3. Hazards
 Data hazards (RAR, RAW, WAR, WAW)
 Control Hazards (1bit, 2 bit , 3 bit)
 Structural Hazards