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&LUFXLW Design Examples
Chapter 6
Distributed and Microstrip
Impedance Matching

Ali Behagi

Techno Search
Ladera Ranch, CA 92694
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Chapter 6
Distributed and Microstrip
Impedance Matching

Copyright©201byAliA.Behagi
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PublishedinUSA
TechnoSearch
LaderaRanch,CA92694

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Foreword
00 5) DQG Microwave Circuit Design ([DPSOHV is a hands-on step-Ey-
stepVROXWLRQIRUXQLYHUVLW\VWXGHQWVDQGDYDOXDEOHUHVRXUFHIRUDVSLULQJ 5)
and Microwave engineers.

Professor Behagi’s book is valuable in that it marries RF and Microwave

FLUFXLW theory with the practical examples using the ( T X D W L R Q  ( G L W R U  L Q 
W K H  Keysight’s Advanced Design System (ADS) software.

ADS is one of today’s most widely used Electronic Design Automation

(EDA) software used by the world’s leading companies to design ICs, RF
Modules and boards in every smart phone, tablet, WiFi routers as well as
Radar and satellite communication systems.

RF and Microwave FLUFXLW design techniques and ADS are also getting
widespread adoption for baseband, high-speed applications. Knowing the
fundamentals and practical application of RF and Microwave design
with ADS will broaden your potential career opportunities.

Read these books and you’ll have an advantage over others. Master all the
100 examples and additional exercises will help you to write your own
ticket to success.

Joe Civello
Keysight Technologies
ADS Planning and Marketing Manager
1400 Fountaingrove Parkway
Santa Rosa, CA 95403, USA

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 Preface

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 Table of contents

Chapter 1: RF and Microwave Components 1

Example 1-1: Calculate the reactance and inductance of a three LQFK
inch length of AWG #28 copper wire in free spaceat 60 Hz, 5000+z, and
1 GHz 

Example 1:Calculate the inductance ofthe 3 inch Ribbon 100 mils

wide and 2 mils thick, at 60 Hz, 500MHz, and 1 GHz. 4

Example 1: Plot the impedance of a 50 : ideal resistor in A D S

over a frequency range of 0 to 2 GHz. 5

Example 1: Plot the impedance of a leaded resistor in ADS over
a frequency range of 0 to 2 GHz. 6

Example 1: Plot the impedance of 1 k:, 0603 size chip resistor,
manufactured by KOA, from 0 to 3 GHz. 8

Example 1: Calculate a n d p l o t the input impedance of an air

core inductor. 12

Example 1: Create a simple RLC network that gives an equivalent

impedance response similar to responseinExample 1-. 13

Example 1: Calculate the Q factor of the air core inductor shown
in Figure 1-11 14

Example 1: Calculate and plot the inductance and Q factor of the
Coilcraft180nHseries0603CSchipinductorfrom 1 MHz to 1040MHz. 

Example 1-:Design a 550nH inductor using theCarbonyl W core of size

T30. Determine the number of turns and model the inductorin ADS. 17

Example 1-1: Design a single layercapacitor from a dielectric that is 0.010

inchesthick and has a dielectric constant of three. Each plate is cut to 0.040
inches square. 22

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Example 1: Calculate the Q factor versus frequency for the modified
physical model of an 8.2 pF multilayer chip capacitor. 

Example 1: Calculate the Q factor versus frequency for the modified
physical model of an 8.2 pF multilayer chip capacitor. 
Chapter 2: Transmission Line Components 

Example 2-1: For the series RLC elements in Figure 2-1 measure the
reflection coefficients and VSWR from 100 to 1000 MHz. 

Example 2-2: Generate a table showing the return loss, the reflection
coefficient, and the percentage of reflected power as a function of VSWR. 

Example 2: Measure and display the insertion loss of a one inch lengthof
WR112 waveguide from 4 to 8 GHz. 
Example 2: Plot the reactance of a loss less short-circuited transmission
line as a function the electricallength of the line. 
Example 2: Calculate the input impedance of a quarter-wave short-
circuited microstrip transmission OLQH 

Example 2: Plot the reactance of a quarter-wave open-circuited

transmission line. 

Example 2: Calculate the input impedance of a quarter-wave open-

circuited microstrip transmission OLQH 

Example 2: Use high and low impedance microstrip transmission lineto
create layout for a lumped element circuit 

Example2: Design a lumped element bias feed network 

Example 2: Calculate the physical line length of the O g/4 sections of 80
and 20: microstrip lines at a frequency of 2 GHz to create the schematic
of a distributed bias feed network 

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Example 2-1: Design an edge coupled microstrip directional coupler with

a coupling factor of 10 dB at 5 GHz. Use Rogers RO3003 substrate with
relative dielectric constant Hr= 3.0 and 0.020-inch thickness. 


Chapter3:NetworkParametersandtheSmithChart 
Example 3-1: Use ADS to plot the impedance 25 + j25 Ohm on the
VWDQGDUG6PLWKFKDUW 57

Example 3: Measure the amount of reactance require to move the
impedanceZ=25+j25:frompointAtopointBon the SmithChart. 59

Example 3: Continuing with the previous example measure the

susceptancerequired to movefrom point B to point C on the real axis. 61

Example 3: Transform the complex impedance of 25+j25 Ohm to a
pureresistance0fapproximately100Ohm. 62

Example 3: Plot the 0utput VSWR circle on the Smith chart for
VSWRYDOXHRI 

Example 3: Revisiting the 25+j25 : impedance in ADS, calculate the
electrical length of a series transmission line moving the impedance at point
A to point B on the Smith Chart.  

Example 3: Measure the electrical length of a shunt transmission lineor
the amount of shunt capacitance to move the impedance Z = 25 + j25:from
point A to the center of Smith Chart. 68

Chapter 4: Resonant Circuits andFilter Design 73

Example 4-1: Analyze the one port series resonator, with R = 10 : , L =
10 nH, and C =10 pF.


Example 4-2: Analyze the parallel resonator, with R = 10 :,L = 10 nH,

and C =10 pF. 

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Example 4-3: Analyze the parallel resonator that is attached to a
50 2KPsource and
o l aed r sistors 

Example 4: Design a parallel resonator at 100 MHz having 100 2KP
sourceand of 400:load resistors. ϳϵ

Example 4: In Example 4, change the load to 50 :and re-examineWKH

3 dBbandwidth and QL 81

Example 4: In Example 4-, replace the capacitor with capacitors &
DQG C2 0easure the 3 dB bandwidth and loaded QL of the tapped capacitor
network 82

Example 4: Measure the 3 dB bandwidth and QL of the tapped inductor
network 

Example 4: Design a 5GHz half-wavelength open circuit microstrip

resonator. The resonator is realized with a 50 Ohm microstrip line on Roger’s
RO3003 dielectric. Calculate the unloaded Q factor of the resonator. 

Example 4: Use the Smith Chart technique to measure the coupling of
a capacitive coupled half wave microstrip resonator. Plot the insertion loss of
the resonator under different coupling conditions.

Example 4:Design a 145 MHz low pass filter for a satellite link having:
(a) Chebyshev Response with 0.1 dB pass band ripple
(b) A passband cutoff frequency (not the -3 dB frequency) at 160 MHz
(c) At least -40 dB rejections at 435 MHz. 89

Example 4-: Create a physical design for the low pass filter in Example
4-1 and display S11 and S21. 95

Example 4-2: Design a high pass filter that passes frequencies inthe 420
MHz to 450 MHz range having the specifications: 

[
The pass band cutofffrequency(notthe-3 dB) is 420 MHz.
The filter has aChebyshev response with 0.1 dB ripple.
Atleast-60dBrejectionat146MHz. 96

Example 4: Design a lumped element 2.2 GHz Chebyshev response

lowpass filter having 0.1 dB passband ripple and -40 dB rejection at 6 GHz.
Convert all the lumped elements to microstrip transmission lines. 9

Example 4: Using the Transformation Assistance in ADS, transform the
lumped element low pass filter of Example 4- into distributedelements.
Simulate the schematic and display the response. 100

Example 4: PlaceMicrostripStepelementsateachimpedancetransition

in the filter of Example 4-1. Simulate the schematic and display the
response. 104

Example 4-16: Design a band pass filter at 10.5 GHz. The filter is GHVLJQHG RQ
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Chapter5:PowerTransferandImpedanceMatching 
Example5-:UsetheADSlinearsimulationtechniquestodemonstratethe
maximum power transfer condition in a purely resistive system. 112

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Example 5: Design L-networks to match a complex load,ZL =10– j152KP
toa complex source impedance.ZS=15–j20Ω, at 2 GHz.7hird solution. 

,ZL=10– j15Ω,toa
Example 5: Design L-networks to match a complex load
complex source impedance.ZS=15–j20Ω, at 2 GHz.)ourthVROXWLRQ 

Example 5: Design L-networks to match Z0=50: toa complexload, ZL=
7 –j22:,at 1 GHz. First solution. 

Example 5: Design L-networks to match Z0=50: toa complexload,

ZL=7 –j22: , at 1 GHz. Second solution. 

Example 5: Design L-networks to match Z0=50: toa complexload,ZL

=7 –j22: ,at 1 GHz. Third solution. 

Example 5-: Design L-networks to match Z0=50: toa complexload,ZL

=7 –j22:, at 1 GHz. )RXUWK solution. 

([DPSOH'HVLJQ/QHWZRUNVWRPDWFKD2KPORDGWRD2KP VRXUFH
UHVLVWRUDW0+])LUVWVROXWLRQ  

Example 5: Design L-networks tomatch a 10 : loadtoa50:source

resistorat 500 MHz. Second solution. 135

Example 5: A transmitter operates over a frequency range of 835 to 1200
MHz. At 1 GHz the source impedance is ZS = 55 + j10 Ω while the antenna
input impedance is ZL = 20 + j15 Ω. Design a cascade of two L-networks that
PDWFKWKHRXWSXWWRWKHLQSXWLPSHGDQFH 

Example 5: Redesign the Example 5-1 by matching the source and load
impedances to an intermediate resistor of 50 :. CompareIUDFWLRQDO
bandwidth and Q factors of theWZRH[DPSOHV 143

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Example 5-1 Use the ADS Impedance Matching Utility to match a source
impedance of 100 Ω to a load that is comprised of a 500 Ω resistorin parallel
with a 2 pF capacitance. It is required that a 20 dB return loss and greater than
G%LQVHUWLRQORVVDWIUHTXHQFLHVIURP0+]WR0+] 

Example 5 Convert the ideal elements to their physical equivalents by
accounting for the finite Q factor of the capacitors and inductors. Add the Q 157

Chapter 6: Distributed DQG0LFURVWULS,PSHGDQFH

Matching 163
Example 6-1 Design a quarter-wave network intended to match a 50 Ohm
source to a 2 Ohm load at 100 MHz. Calculate the Q factor and the fractional
bandwidths at 3 and 20 dB return loss. Compare the calculations with the
simulation results in ADS 163

Example 6-2 Design a quarter-wave network intended to match a 50 Ohm

source to a 150 Ohm load. The design frequency is 100 MHz. Compare the
calculated Q factor and the fractional bandwidths, at 3 and 20 dB return loss,
with the measurements. 
Example 63:For a 50: source and 2 : load, calculate the fractional
bandwidth power loss from* = 0.1to*= 0.707. 170

Example 6-: For a 50 : source and 150 :  load resistors, calculate the
bandwidth and power lossfrom * = 0.1 to* = 0.707. 

Example 6-: Design a single-stub network to match the load ZL = 2 - j5
Ohmto a resistive source RS = 50 Ohm at 100MHz. Display the response and
measure the fractional bandwidths at 3 and 20 dB return loss. 

Example 6- Design a single-stub network to match the 5 - j25 : load

impedance to 50 :source resistor. Use an open-circuited stub. 

Example 6- Design a single-stub network to match the 5 - j25 : load

impedance to 50 :source resistor. Use a short-circuited stub 

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Example 6-: Design single-stub networks to match a complex load ZL =
10 - j5 Ohm to a complex source ZS = 50 - j15 Ohm at 100 MHz. Calculate the
electrical lengths of the lines and the fractional bandwidths of the matching
network at 3 dB and 20 dB return loss. Display the simulated response and
verify the calculations with simulation in ADS. 

Example, 6-1: Design a three-section quarter-wave transformer network to

match a load resistance RL = 2 : to a resistive 6source RS 50 2KP
DW  0+] 185

Example 6-: Design a broadband quarter-wave network to Match a

complex load, ZL= 10 –j5: to 50 : source impedance at 100 MHz. Calculate
the bandwidth at 20 dB return loss and compare with the bandwidth of a
single-stub matching network. 

Example 6: Design a broadband network to match a complex load, ZL =

150 – j30 to 50 Ohm source impedance at 100 MHz. Display the simulated
response and measure the bandwidth at 20 dB return loss. Compare the results
with the singe-stub matching network. 

Chapter 7: Single Stage Amplifier Design 199

Example 7-1: Measure and display the stability factor, K, the stabilityPHDVXUH
B1, and the maximum gain, Gmax, of the SHF-0189FET transistor IURP
WR

.)[
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QPTTJCMF 

Example7-:Designthe SHF-0189input matching network 

Example 7- Design the SHF-0189 RXWSXW PDWFKLQJ QHWZRUN 

([DPSOH$VVHPEOHVLPXODWHDQGGLVSOD\WKHDPSOLILHUUHVSRQVH 

(xample 7-:Designthephysical amplifier bias feed and the physical PCB

layout for the SHF-0189 maximum gain amplifier. 

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Example 7-: Analyze the stability condition for the RT243 device 216

Example7-: Designtheoutput matching networkfortheRT243transistor

at 2300 MHz. 

Example 7-: Design the input matching network for RT243 transistor
at 2300 MHz.     

Example 7-: Assemble, simulate, and display the response of the specific
gain Amplifier. 

Example7-1:Calculate thestability andnoiseparametersfortheAT 

30511device.

Example 7-: Design the distributed input matching network for the
LNA XVLQJ $7 GHYLFH DW  0+] 22

Example 7- Design a single-stub output matching network for the low
noiseamplifier using AT30511deviceat 432 MHz. 

Example 7-: Assemble, simulate, and display the response of the low
noiseAmplifier. 

Example 7-1 Design a three elements Pi network to match the 50 Ω source

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([DPSOH'HVLJQDWKUHHHOHPHQWV3LQHWZRUNWRPDWFKWKHȍORDG
LPSHGDQFHWRWKHDPSOLILHURXWSXWDW0+] 

Example 7-: Assemble the power amplifier and simulate the response
fromWR0+] 241

&KDSWHU0XOWL6WDJH$PSOLILHU'HVLJQ 247

Example 8-1:Design the first stage input matching network. 248

Example 8-2:Design the inter-stage matching network. 249

Example 8-3: Design the second stage output matchingnetwork. 251

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Example 8-4: Design the interstage matching network between the
SHF- DQG WKH 57 GHYLFHV 252

Example 8-5: Design the second stage output matching network. 254

Example 8-: Assembleandsimulate and display the response 255

Example 8-: Consider a typical Low Noise Amplifier used in the Ku
Band frequency range of 11.7 to 12.2 GHz. To eliminate any interference
from the uplink signal or terrestrial sources a low loss waveguide filter is
placed at the input of the LNA. 

Example 8-: Add an isolator with an insertion loss of 0.1 dB to the block
diagram of Figure 8-16 and plot the LNA cascade insertion loss and
noise ILJXUH IURP  WR  *+] 261

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 267
Appendix A

Straight Wire Parameters for Solid Copper Wire

$SSHQGL[% 269

Appendix B

B-1 Impedance Matching Network Design

One of the important tasks in RF and microwave engineering is the

determination of how an arbitrary complex load impedance, ZL = RL + jXL,
is analytically matched to any complex source impedance, ZS = RS + jXS.
This problem arises mainly in the design of inter-stage matching networks
between active devices or between an antenna and a transmitter where both
impedances are usually complex.

In Figure B-1 the complex load impedance, ZL = RL + j XL, is to be matched

to the source impedance ZS = RS + jXS. The only condition for impedance
matching is that both RS and RL must be nonnegative while XS and XL could
take any real value. In the RF and Microwave Circuit Design textbook it
was proved that the maximum power is transferred from the source to the
load when the load impedance is the conjugate of the source impedance.

In designing impedance matching networks using only 2 lumped elements,

such as L-networks, there are two configurations that can match an arbitrary
load impedance to any arbitrary source impedance. In the first configuration
the first element adjacent to the load is a series element and the second
element is a shunt element. Such configuration is shown in Figure B-1.

Figure B-1 First impedance matching network configuration

In the second configuration the first element adjacent to the load is a shunt
element and the second element is a series element, as shown in Figure B-2.
$SSHQGL[% 270

Figure B-2 Second impedance matching network configuration

B-2 Matching a Complex Load to a Complex Source

Impedance

To match a complex load to any complex source impedance using a single

L-network, either the first or the second configuration may be used. The
choice of configurations depends on the conditions that source and load
impedances dictate. Applying the maximum power transfer condition ZS* =
ZIN to the first matching configuration in Figure B-2 we get:

1
RS  jX S (5-6)
§ 1 ·
jB  ¨¨ ¸
© jX  RL jX L ¸¹

By separating the real and imaginary parts of Equation (5-6) we obtain two
solutions for B and X as follows:

RL X S RL RS ( RS 2  X S 2  RL RS )
B1 (5-7)
RL ( RS 2  X S 2 )

RL X S  RS X L RS  RL
X1  (5-8)
RS B1RS
100 ADS Design Examples 271

And
RL X S  RL RS ( RS 2  X S 2  RL RS )
B2 (5-9)
RL ( RS 2  X S 2 )

RL X S  RS X L RS  RL
X2  (5-10)
RS B2 RS

Similarly, applying the same procedure to the second configuration we

have:

1
RS  jX S jX  (5-11)
§ 1 ·
jB  ¨¨ ¸¸
© RL  jX L ¹

Separating the real and imaginary parts of Equation (5-11), we also get two
sets of solutions for B and X:

RS X L RL RS ( RL 2  X L 2  RL RS )
B3 (5-12)
RS ( RL 2  X L 2 )

RS X L  RL X S RL  RS
X3  (5-13)
RL B3 RL

And
RS X L  RL RS ( RL 2  X L 2  RL RS )
B4 (5-14)
RS ( RL 2  X L 2 )

RS X L  RL X S RL  RS
X4  (5-15)
RL B4 RL

Conditions for the validity of solutions are that the arguments of the square
roots in Equations (5-7), (5-9), (5-12) and (5-14) be positive or zero.
$SSHQGL[% 272

Therefore:

x If RS2 + XS2 – RLRS > 0 and RL2 + XL2 – RLRS < 0, the two solutions in
Equations (5-7) through (5-10) are the only valid solutions.

x If RS2 + XS2 – RLRS < 0 and RL2 + XL2 – RLRS > 0, the two solutions in
Equations (5-12) through (5-15) are the only valid solutions.

x If RS2 + XS2 – RLRS > 0 and RL2 + XL2 – RLRS > 0, all four solutions in
Equations (5-7) through (5-10) and (5-12) through (5-15) are valid.

Once the real values for B and X are calculated, the values of the matching
elements are obtained from the following equations:

If B is positive, the matching element is a capacitor given by:

B
C (5-16)
2S f

If B is negative, the matching element is an inductor given by:

1
L  (5-17)
2S f B

If X is positive, the matching element is an inductor given by:

X
L (5-18)
2S f

If X is negative, the matching element is a capacitor given by:

1
C  (5-19)
2S f X
$SSHQGL[% 273

In the above equations, if the frequency is in Hz, capacitor and inductor

values are in Farad and Henry, respectively.

In practice, we utilize Equations (5-7) through (5-15) to design the matching

L-networks.

B-3 Matching Complex Load to Real Source Impedance

In single stage amplifier design a common matching problem is the

matching of a complex load impedance, ZL = RL + jXL to real source
impedance, ZS = RS. The complex impedance is usually the load and the real
impedance is the characteristic impedance of the transmission line
connected to the source. For the case of real source impedance the matching
configuration of Figure B-1 is redrawn in Figure B-3.

Figure B-3 Matching a resistive source to a complex load impedance

To derive the analytical expressions for B and X we utilize the maximum

power transfer condition and set the conjugate of the source impedance
equal to input impedance of the matching network followed by the load
impedance, as given in Equation (5-20).

1
RS
§ 1 · (5-20)
jB  ¨¨ ¸¸
© jX  R L  jX L ¹

Note that the conjugate of a real source resistor is equal to itself.

$SSHQGL[% 274

The solutions for B and X in Equation (5-20) can easily be obtained by

substituting XS = 0 in Equations (5-7) through (5-10).

 RS  RL
B1 (5-21)
RS RL

X1  RL ( RS  RL )  X L (5-22)
And,
 RS  RL
B2 (5-23)
RS RL

X2  RL ( RS  RL )  X L (5-24)

Note that the solutions given in Equations (5-21) through (5-24) are only
valid if RL < RS. To calculate B and X, when RL > RS, we use the second
matching configuration shown in Figure B-4,

Figure B-4 Matching complex load to resistive source (2nd configuration)

Applying the maximum power condition we have:

1
RS jX  (5-25)
§ 1 ·
jB  ¨¨ ¸¸
R 
© L jX L ¹
$SSHQGL[% 275

The solutions for B and X in Equation (5-25) can be obtained by reusing

Equations (5-12) and (5-14) and substituting XS = 0 in Equations (5-13) and
(5-15).

RS X L RL RS ( RL 2  X L 2  RL RS )
B3 (5-26)
RS ( RL 2  X L 2 )

RS X L RL  RS
X3  (5-27)
RL B3 RL
And
RS X L  RL RS ( RL 2  X L 2  RL RS )
B4 (5-28)
RS ( RL 2  X L 2 )

RS X L RL  RS
X4  (5-29)
RL B4 RL

The conditions for the valid solutions are that the arguments of the square
roots in Equations (5-26) through (5-29) be non-negative. Therefore, the
two solutions obtained from Equations (5-26) through (5-29) are valid only
if RL > RS. The combined conditions are summarized in Table B-1.

Case # First Second Condition # of Equations

Condition Solutions Used

(5-21) to (5-24)
1 RL < RS RL2 + XL2 – RL RS > 0 4
(5-26) to (5-29)

2 RL < RS RL2 + XL2 – RL RS < 0 2 (5-21) to (5-24)

3 RL > RS N/A 2 (5-26) to (5-29)

Table B-1 Impedance matching conditions and the number of solutions

$SSHQGL[% 276

The solutions in Equations (5-26) through (5-29) can be simplified by

normalizing the load impedance with respect to the source resistor.
Therefore, if RS = Z0, the normalized load resistance is:

RL
r (5-30)
Z0
And
XL
x (5-31)
Z0

The simplified equations for matching a complex load to a real source are:

1  r 
B1 r
(5-32)
Z0

X1 Z0 > r 1  r   x @ (5-33)

(1  r )
B2  (5-34)
Z0

X2  Z 0 ª r (1  r )  x º (5-35)
«¬ »¼

x r(r 2  x 2 r)
B3 (5-36)
Z0 (r 2  x 2 )

(r 2  x2 r)
X3 Z0    (5-37)
r
$SSHQGL[% 277

x  r §¨ r 2  x 2  r ·¸
© ¹
B4 (5-38)
Z 0 §¨ r 2  x 2 ·¸
© ¹

§¨ r 2  x 2  r ·¸
© ¹
X4 Z0   (5-39)
r

B-4 Matching a Real Load to a Real Source Impedance

When source and load impedances are both real, the first matching
configuration can be applied.

Figure B-5 First matching configuration with XL = XS =0

To design the matching network, apply the maximum power transfer

condition and require that Z0* = ZIN. Therefore,

1
Z0 (5-40)
§ 1 ·
jB  ¨¨ ¸¸
© jX  RL ¹

RL
Substituting r in Equation (5-40), we get:
Z0
$SSHQGL[% 278

1
Z0 (5-41)
§ 1 ·
jB  ¨¨ ¸¸
© jX  rZ0 ¹

The solutions for B and X can be obtained by using Equations (5-32) and
(5-34) and substituting x = 0 in Equations (5-33) and (5-35).

(1  r ) r
B1 (5-42)
Z0

X1 Z0 r (1  r ) (5-43)

(1  r ) r
B2  (5-44)
Z0

X2  Z0 r (1  r ) (5-45)

Note that the two solutions given by Equations (5-42) through (5-45) are
only valid if r is less than 1 or RL < Z0 .

If r > 1, we use the second matching configuration as in Figure B-6.

Figure B-6 Second matching configuration for resistive load and source

To calculate the B and X values, we require that, Z0* = ZIN, therefore,

$SSHQGL[% 279

1
Z0 jX 
§ 1 ·
jB  ¨¨ ¸¸
© Z0 r ¹ (5-46)

The solutions for B and X in Equation (5-46) can be obtained by

substituting x = 0 in Equations (5-36) through (5-39).

r 1
B3 (5-47)
Z0 r

X3 Z0 r  1    (5-48)

 r 1
B4 (5-49)
Z0 r

X4 Z0 r  1    (5-50)

Note that the two solutions given by Equations (5-47) through (5-50) are
only valid if r is greater than 1 or RL > Z0 .

The combined conditions for the validity of solutions are given below.

Case 1 If r is less than 1 there are two L-networks that match the two
impedances. The two solutions are given by Equations (5-42) through (5-45).

Case 2 If r is greater than 1 there are two L-networks that match the two
impedances. The two solutions are given by Equations (5-47) through (5-
50).
$SSHQGL[& 280

Appendix C
C-1 Analytical Design of the Quarter-Wave Matching Networks

We have shown that the input impedance of a quarter-wave network with

characteristic impedance, Z0, terminated in a resistive load, RL, is given by:

2
Z0
Z IN
RL

This equation can be written as:

ZO RL Z IN (6-1)

We have also shown that the maximum power transfer from a source with
resistance RS to a network terminated in a resistive load RL is achieved only
if the input impedance of the network is equal to the source resistance.

ZIN = RS

Therefore, for maximum power transfer, the characteristic impedance of the

quarter-wave network must satisfy the Equation (6-2).

ZO RS RL (6-2)

90 Degree

ZS=RS Zo RL

Figure C-1 Quarter-wave network terminated in resistor RL

$SSHQGL[& 281

Equation (6-2) states that the characteristic impedance of the quarter-wave

network, matching RL to RS, must be equal to the square root of the product
of source and load resistors.

If we normalize the load resistor RL with respect to RS,

RL
r (6-3)
RS

Equation (6-2) can be written as Equation (6-4).

ZO RS r (6-4)

Notice that for RL > RS, the characteristic impedance Z0 is greater than RS
while for RL < RS, the characteristic impedance Z0 is less than RS.

The fractional bandwidth of a network, FBW, is defined in Equation (6-5)

where fH and fL are the upper and lower frequencies of the bandwidth and
the center frequency f0 is equal to f H f L , respectively.

fH  fL
FBW (6-5)
fH fL

The fractional bandwidth of a quarter-wave matching network is given in

Equation (6-6):

§ ·
2*m r
FBW
4
2  ˜ cos 1 ¸ (6-6)
S ¨ ¸
© 1  *m 1  r ¹
2

Where, *m is the magnitude of the reflection coefficient.

$SSHQGL[& 282

Equation (6-6) shows that the fractional bandwidth of a quarter-wave

matching network depends on the magnitude of the input reflection
coefficient, *m , and the mismatch ratio, r. The solution to Equation (6-6) is
only valid if,

2 *m r
d1
1  *m 2 1  r

At 3 dB return loss the reflection coefficient is *m = 0.707, therefore,

Equation (6-6) reduces to:

4 § 2 r ·
FBW3dB 2 ˜ cos 1 ¨ ¸ (6-7)
S ¨ 1 r ¸
© ¹

At 3 dB return loss Equation (6-7) has valid solutions only if,

2 r
d1 or r 2  6r  1 t 0 (6-8)
1 r

Similarly, if we define the bandwidth at *m = 0.1, corresponding to 20 dB

return loss, as a good matching bandwidth it is insightful to evaluate the
fractional bandwidth associated with this 20 dB return loss. From Equation
(6-6) the fractional bandwidth at *in = 0.1, is:

4 § ·
0.2 r
FBW20 dB 2 ˜ cos 1 ¸
¨ 0.99 1  r ¸ (6-9)
S © ¹

At 20 dB return loss Equation (6-9) has valid solutions only if,

0.2 r
d 1 or 99r 2  202 r  99 t 0 (6-10)
0.99 1  r
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The loaded quality factor, QL, of the quarter-wave matching network is

defined as the inverse of the fractional bandwidth at 3 dB return loss;
therefore, the loaded Q factor can be calculated from Equation (6-11).

1 1
QL = (6-11)
FBW3dB 4 § 2 r ·
1
2  ˜ cos ¸
S ¨ 1 r ¸
© ¹

Equation (6-11) shows that the validity condition in Equation (6-8) for the 3
dB fractional bandwidth is the same for the Q factor except that whenever
the 3 dB fractional bandwidth tends towards infinity the Q factor tends
towards zero. The Q factor given in Equation (6-11) is not to be confused
with the unloaded transmission line Q factor. This is actually an external Q
factor as it relates to the loaded Q of the overall network.

If f is the center (design) frequency, the bandwidth of the circuit is then

calculated from Equation (6-12)
.
BW  f  ˜ FBW  (6-12)

C-2 Analytical Design of the Series Transmission Line

It has been shown in the RF and Microwave Circuit Design textbook that
the input impedance of a lossless transmission line of length d and
characteristic impedance Z0 terminated in an arbitrary load ZL, is given in
the following equation.

Z L  jZ o tan Ed
Z IN Zo
Z o  jZ L tan Ed

Setting Z0 = RS and tan Ed = t, the input admittance of the network in

Figure C-1 can be written as:
$SSHQGL[& 284

1 RS  jZ L t
YIN = GIN  jBIN
Z IN RS ( Z L  jRS t ) (6-13)

Substituting the normalized load impedance, ZL/Rs = r +jx into Equation (6-
13) and separating its real and imaginary parts we get:

r(1 t 2 )
GIN (6-14)
RS (r 2  x 2  t 2  2xt)

And,
xt 2  (r 2  x 2 1)t  x
BIN (6-15)
RS (r 2  x 2  t 2  2xt)

The value of d, which implies t, can be obtained by setting the input

conductance, GIN, equal to source conductance:

r(1 t 2 ) 1
(6-16)
RS (r 2  x 2  t 2  2xt) RS

Equation (6-16) can be rearranged as:

r  1˜ t 2  2 xt  r 2  x 2  r  0 (6-17)

Notice that the quadratic Equation (6-17) has two solutions for t. For a
wider bandwidth and lower loss usually the smaller value of t is selected.
The two solutions for t are Equations (6-180 and (6-19):

x  r (r 2  x 2  2r  1)
t1 (6-18)
r 1
$SSHQGL[& 285

And,
x  r (r 2  x 2  2r  1)
t2 (6-19)
r 1

O
With tan Ed = t, and EO = 2π, we have d tan 1 t and the two solutions
2S
for d are:

O
d1 tan 1 t1 t1 ≥ 0 (6-20)
2S

O
d2 tan 1 t 2 t2 ≥ 0 (6-21)
2S

To specify the lengths of d1 and d2 in electrical degrees, we get:

360
d1 tan 1 t1 t1 ≥ 0 (6-22)
2S

360
d2 tan 1 t 2 t2 ≥ 0 (6-23)
2S

Because at every half wavelength the input impedance of a transmission line

repeats, there are an infinite number of transmission line lengths that
matches the load to source impedance. Usually the shorter length is selected
to improve the matching bandwidth. If t1 or t2 is negative, we add half a
wavelength to each line to get positive d1 and d2.

360(S  tan 1 t1 )
d1 t1 < 0 (6-24)
2S
360 (S  tan 1 t 2 )
d2 t2 < 0 (6-25)
2S
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C-3 Analytical Design of Shunt Stub Matching Networks

To calculate the electrical length of the shunt stub, first substitute t1 and t2 in
Equation (6-15) to determine B1 and B2 .

xt12  (r 2  x 2  1)t1  x
B1 (6-26)
RS (r 2  x 2  t12  2 xt1 )

xt2 2 (r 2  x 2  1)t 2  x
B2 (6-27)
RS (r 2  x 2  t 2 2  2 xt2 )

Then, the electrical lengths of the open circuited stubs are found by setting
the susceptance of the stubs equal to the negative of the input susceptance.

so1

 O tan -1 (RS B1 ) 
(6-28)
2S

so2

 O tan -1 (RS B2 ) 
(6-29)
2S

If either stub length in Equations (6-28) or (6-29) is negative, add one half
wavelength to obtain a positive stub length. For short-circuited stubs, the
two solutions are:

§ § 1 · ·¸
O ¨¨ tan -1 ¨¨ ¸¸
¸
© R B
© S 1 ¹¹
ss1 (6-30)
2S

§ § 1 ··
O ¨¨ tan -1 ¨¨ ¸¸ ¸
¸
© R B
© S 2 ¹¹
ss2 (6-31)
2S
$ERXWWKH$XWKRU 287

About the Author

Ali A. Behagi received the Ph.D. degree in electrical engineering from the

University of Southern California and the MS degree in electrical

engineering from the University of Michigan. He has several years of

industrial experience with Hughes Aircraft and Beckman Instruments. Dr.

Behagi joined Penn State University as an associate professor of electrical

engineering in 1986. He has devoted over 20 years to teaching microwave

engineering courses and directing university research projects. While at

Penn State he received the National Science Foundation grant, to establish

a microwave and RF engineering lab, and the Agilent ADS software grant

to use in teaching high frequency circuit design courses and laboratory

experiments. After retirement from Penn State he has been active as an

educational consultant. Dr. Behagi is a Keysight Certified Expert, a Senior

Member of the Institute of Electrical and Electronics Engineers (IEEE), and

the Microwave Theory and Techniques Society.