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  • CLX Ejemplo M2

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    Kathleen Roldan
    11 views2 pages
    This document contains a function block diagram showing the components and connections of a PID control loop. The diagram shows a process variable input being fed into an enhanced PID function block. The PID block compares the process variable to a setpoint and calculates a controller output value based on proportional, integral and derivative terms. The controller output is then fed through additional function blocks like lead-lag and deadtime before being output to control the process.

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    CLX_Ejemplo_M2

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    This document contains a function block diagram showing the components and connections of a PID control loop. The diagram shows a process variable input being fed into an enhanced PID function block. The PID block compares the process variable to a setpoint and calculates a controller output value based on proportional, integral and derivative terms. The controller output is then fed through additional function blocks like lead-lag and deadtime before being output to control the process.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    11 views2 pages

    CLX Ejemplo M2

    Uploaded by

    Kathleen Roldan
    This document contains a function block diagram showing the components and connections of a PID control loop. The diagram shows a process variable input being fed into an enhanced PID function block. The PID block compares the process variable to a setpoint and calculates a controller output value based on proportional, integral and derivative terms. The controller output is then fed through additional function blocks like lead-lag and deadtime before being output to control the process.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 2

    PIDE - Function Block Diagram Page 1

    CLX_Ejemplo_M2:MainTask:MainProgram 5/14/2020 8:53:59 PM


    1 of 2 total sheets in routine - PIDE C:\Users\IEUser\Desktop\BLENDED\CLX_Ejemplo_M2.ACD

    A B C D E F

    FIC10
    PIDE ...
    0.0 Enhanced PID
    1 FIC10_PV_sim 1
    0.0
    2-E1 PV CVEU FIC10_CV
    0.0 0.0
    FIC10_SP SPProg SP 2-A1
    0
    SPCascade PVHHAlarm
    0
    RatioProg PVHAlarm
    0.0 0
    FIC10_CVm CVProg PVLAlarm
    0
    FF PVLLAlarm
    0
    HandFB PVROCPosAlarm
    1 0
    1 ProgProgReq PVROCNegAlarm
    0
    ProgOperReq DevHHAlarm
    0
    2 ProgCasRatReq DevHAlarm 2
    0 0
    FIC10_Auto ProgAutoReq DevLAlarm
    0
    ProgManualReq DevLLAlarm
    0 0
    FIC10_Man ProgOverrideReq ProgOper
    0
    ProgHandReq CasRat
    0
    Auto
    0
    Manual
    0
    Override
    0
    Hand
    AutotuneTag FIC10_AutoTune
    3 3

    4 4

    A B C D E F

    Logix Designer
    PIDE - Function Block Diagram Page 2
    CLX_Ejemplo_M2:MainTask:MainProgram 5/14/2020 8:54:00 PM
    2 of 2 total sheets in routine - Simulacion C:\Users\IEUser\Desktop\BLENDED\CLX_Ejemplo_M2.ACD

    A B C D E F

    DEDT_01 LDLG_01
    DEDT ... LDLG ... GRT_01
    FIC10_PV_sim
    Deadtime Lead-Lag GRT ...
    1-C1
    0.0 0.0 0.0 Greater Than (A>B)
    1 FIC10_CV In Out In Out 1
    0 SEL_01
    1-E1 Deadtime SourceA Dest
    SEL ...
    StorageArray DeadTimeArray SourceB
    0.25 Select
    0.25
    0 0.0
    0 In1 Out
    In2
    SelectorIn

    2 2

    3 3

    4 4

    A B C D E F

    Logix Designer

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