Gateway MC78 - MD78 - Quanta - AJ2 PDF

5 4 3 2 1
AJ2 BLOCK DIAGRAM (Montevina Platform)

Penryn / Cantiga / ICH9-M X'TAL
14.318MHz
+3V_S5/+5V_S5 PG 39
D CPU Penryn CPU CLK_ 200MHz
D
CPU THERMAL CLOCK GEN CPU CORE POWER

(479 Micro-FCPGA) GMCH CLK_ 200MHz
ICS9LPRS365/RTM875T-606 PG 38
SENSOR ISL6260C+ISL6208
+3.3V DREFCLK_96MHz 64pins
+5V
PG 5 +1.5V
PCIE MCH CLK_100MHz +3.3V
+1.05V_VCCP PG 2
+VCC_CORE PG 3,4
+1.5V & +1.05VCCP
FSB (RT8204) PG 37
SATA ICH CLK_100MHz
PCIE MINICARD CLK_100MHz

PCIE ICH CLK_100MHz
PCIE LAN CLK_100MHz
PCIE NEW CARD CLK_100MHz
PCI OZ126T CLK_33MHz

667/800 MHz LCD Panel
DDR2
VIN_BLIGHT
DDRII-SODIMM1 DDRII 667 MHz +3.3V +1.8V_SUS & +0.9V PG 36
PG 18
DDRII-SODIMM2 NORTH BRIDGE MXM SWITCH
+0.9V_DDR_VTT D/D POWER
+1.8V_SUS Cantiga CRT port
+3.3V 1299 uFCBGA +5_ALW & +3.3V_ALW PG 35
+5V
V_DDR_MCH_REF +1.05V_VCCP
PG 12,13 PG 22 PG 22 +3.3V PG 20
+1.8V_SUS
C
+1.5V CHARGER C
Web Cam +3.3V ISL6251A

USB8 V_DDR_MCH_REF SDVO PARADE HDMI port
PG 34
+5V
PG 6~11 HDMI +3.3V
PG 18 PS8101 RUN POWER SW
+3.3V
+5V PG 19
X'TAL DMI LINK PG 19 & DISCHARGE
Bluetooth 32.768KHz PG 33
USB9
4X PCI-E
+3.3V_SUS PG 29
USB PORT X4 PCI

USB0,1,2,5
USB 2.0
+1.5V
+5V_SUS PG 28 +1.05V_VCCP
+1.25V
+3.3V
ICH9-M PCI-E
+3.3V_ALW 652 BGA
+3.3V_S5
+3.3V_SUS Azalia CARDREADER
+3V_VCCLAN LAN(1000) MINI-PCI-E Card EXPRESS CARD
+5V
CONTROLLER
Marvell 88E8057 X2 (NEW CARD)
B ODD(fixed) +5V_ALW
USB4,USB7
OZ126T B
+5V
SATA +5V_S5 Azalia LANVCC USB3
PG 27 VCCRTC_(1~4) +3.3V_SUS
PG 14~17 Codec LANVCC_L
+2.5V_1.8V_LAN +3.3V +3.3V +3.3V
CX20561-15Z +1.2V_LAN +1.5V +1.5V PG 32 +1.8V PG 23
SATA +3.3V
PG 21 PG 26
Internal HDD PG 24
+5V LPC
+3.3V PG 27
X'TAL
32.768KHz MODEM CONN. X'TAL 4 IN 1
25MHz XD
(MDC)
SD/MMC
+3.3V_SUS PG 25 AMP DMIC/ RJ45 MS/MSPRO
IT8502E TPA6017A2 LightSensor JACK
WIRE +3.3V PG 23
+5V PG 24 +3.3V PG 30 PG 21
+3.3V_ALW LQFP 128PIN
+3.3V
RJ11/USB X 2
RTC_VCC B to B CONN.
PG30 USB2,USB5
+5V_SUS PG 25
A
JACK A
HEADPHONE/SPDIF
INT. DMIC
SWITCH BOARD FAN Touchpad Keyboard SPI FLASH INT. SPEAKERS
+3.3V +5V +5V +3.3V_ALW +3.3V_ALW PROJECT : AJ2
PG 31 PG5 PG 31 PG 31 PG 30 PG 24
Quanta Computer Inc.
Size Document Number Rev
Custom BLOCK DIAGRAM 1A
Date: Tuesday, September 16, 2008 Sheet 1 of 43

5 4 3 2 1
5 4 3 2 1
+3.3V
L51
BLM21PG600SN1D
40 mil CK_VDD_MAIN1 2
9
U9
VDDPCI
VDD48
NC 48
CGCLK_SMB_M
T30
02
22U/6.3V/X5R_8
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
16 64
61
VDDPLL3
VDDREF
CK505 SCLK
SDATA 63 CGDAT_SMB_M CGCLK_SMB_M 12,13,26
CGDAT_SMB_M 12,13,26
C478
C484
C485
C207
C475
C474
C190
39 VDDSRC PCI_STOP# 38 H_STP_PCI# 16
55 VDDCPU CPU_STOP# 37 H_STP_CPU# 16
L52 54
CPUT0 CLK_CPU_BCLK 3
BLM21PG600SN1D 53
1 2
40 mil CK_VDD_MAIN2 12
CPUC0 CLK_CPU_BCLK# 3
D VDD96_IO D
20 VDDPLL3_IO CPUT1_F 51 CLK_MCH_BCLK 6
22U/6.3V/X5R_8
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
26 VDDSRC_IO CPUC1_F 50 CLK_MCH_BCLK# 6
C480
C471
C472
C473
C481
C482
C483
36 VDDSRC_IO CPUT2_ITP/SRCT8 47 CLK_PCIE_NEW_C 32
49 VDDCPU_IO CPUC2_ITP/SRCC8 46 CLK_PCIE_NEW_C# 32
45 VDDSRC_IO
SRCC10 35 CLK_MCH_3GPLL# 7
SRCT10 34 CLK_MCH_3GPLL 7
SATA_CLKREQ# R182 475/F_4 SATACLKREQ#_R 1 33 CLK_3GPLLREQ#_R R176 475/F_4 CLK_3GPLLREQ#
16 SATA_CLKREQ# PCI0/CR#_A SRCT11/CR#_H CLK_3GPLLREQ# 7
32 MINI2CLK_REQ#_R R180 475/F_4 MINI2CLK_REQ# MINI2CLK_REQ# 26
MINI1CLK_REQ# R183 475/F_4 MINI1CLK_REQ#_R SRCC11/CR#_G +3.3V
26 MINI1CLK_REQ# 3 PCI1/CR#_B
SRCT9 30 CLK_PCIE_MINI2 26
PCLK_LPC_DEBUG R185 33_4 PCI2/TME 4 31
26 PCLK_LPC_DEBUG PCI2/TME SRCC9 CLK_PCIE_MINI2# 26
C205 0.1U/16V/X7R_4
OZ126TCLK R192 22_4 PCI3 5 44 NEW-CARD_CLK_REQ#_R R164 475/F_4 NEW-CARD_CLK_REQ# C203 0.1U/16V/X7R_4
23 OZ126TCLK PCI3 SRCT7/CR#_F NEW-CARD_CLK_REQ# 32
43 SRCC7 T32 C174 0.1U/16V/X7R_4
PCI_CLK_8512 R186 33_4 FCTSEL1 SRCC7/CR#_E
30 PCI_CLK_8512 6 PCI4/27_Select
SRCT6 41 CLK_PCIE_ICH 15
CLK_PCI_ICH R188 22_4 PCI_F5/ITP_EN 7 40
15 CLK_PCI_ICH PCI_F5/ITP_EN SRCC6 CLK_PCIE_ICH# 15
SRCT4 27 CLK_PCIE_MINI1 26
CLK_ICH_48M R195 33_4 FSLA 10 28
16 CLK_ICH_48M USB_48MHz/FSLA SRCC4 CLK_PCIE_MINI1# 26
R189 2.2K_4
3,7 CPU_MCH_BSEL0
3,7 CPU_MCH_BSEL1 57 FSLB/TEST_MODE CR#_C/SRC-3 24 CLK_PCIE_LAN 21
SRCC3/CR#_C 25 CLK_PCIE_LAN# 21
R163 10K_4 FSLC 62
3,7 CPU_MCH_BSEL2 REF0/FSLC/TEST_SEL
CLK_ICH_14M R162 33_4 21
16 CLK_ICH_14M SRCT2/SATAT CLK_PCIE_SATA 14
SRCC2/SATAC 22 CLK_PCIE_SATA# 14
C C
C188 27P/50V/NPO_4 XIN 60 17 DREFSSCLK_R
X1 27MHz_NonSS/SRCT1/SE1 DREFSSCLK#_R
27MHz_SS/SRCC1/SE2 18
2
XOUT 59
R151 Y3 X2
SRCT0/DOTT_96 13 MCH_DREFCLK 7
*1M/F_6 14.318MHZ 14
SRCC0/DOTC_96 MCH_DREFCLK# 7
2
1 8 GNDPCI
L23 C189 27P/50V/NPO_4 11 56 CLK_PWRGD 16
GND48 CK_PW RGD/PD#
*LQG15HS5N6S02D 15 GND
19 GND
Modify for RAMP 52 GNDCPU
23 DREFSSCLK_R RP24 3 4 *I@0X2 DREF_SSCLK 7
1
C187 GNDSRC DREFSSCLK#_R

29 GNDSRC 1 2 DREF_SSCLK# 7 To NB
*15P/50V_4 42 GNDSRC
58 GNDREF RP48 3 4 E@0X2 CLK_MXM 22
EC Add in For SA6 EMI ICS9LPRS365BGLFT / RTM875T-606 1 2 To MXM
CLK_MXM# 22
use 080401
+3.3V +3.3V +3.3V

GCLK_SEL = FCTSEL1
FCTSEL1
(PIN6) PIN13 PIN14 PIN17 PIN18
R191 R194 PULL HIGH PULL LOW
10K_4 *4.7K_4 R167
0=UMA DOT96 DOT96# SRC-1/LCDT_100 SRC-1#/LCDT_100 10K_4
2
PCI_F5/ITP_EN ITP/ITP# SRC8/SRC8# Q20
B B
PCI2/TME PCI_F5/ITP_EN
1 = External VGA SRC-0 SRC-0# 27Mout-NSS 27Mout-SS CGDAT_SMB_M 1 3 ICH_SMBDATA 16,32
R196 R423
Overclocking of CPU Overclocking of CPU
*10K_4 4.7K_4
PCI2/TME and SRC not allowed and SRC allowed 2N7002E/CH2507SPT
+3.3V
+3.3V
R193
*10K_4
R170
10K_4
2
+3.3V FCTSEL1 Q19
CPU Clock select MINI2CLK_REQ# R179 10K_4 CGCLK_SMB_M 1 3 ICH_SMBCLK 16,32
FSC FSB FSA CPU SRC PCI CLK_3GPLLREQ# R178 10K_4 R424
SATA_CLKREQ# R181 10K_4 10K_4
1 0 1 100.00 100 33 MINI1CLK_REQ# R190 10K_4 2N7002E/CH2507SPT
NEW-CARD_CLK_REQ# R150 10K_4
0 0 1 133.33 100 33
0 1 1 166.66 100 33
0 1 0 200.00 100 33 PCI3
EMI CAP
0 0 0 266.66 100 33
1 0 0 333.33 100 33 C503 *15P/50V_4 OZ126TCLK R187
A C502 15P/50V_4 CLK_ICH_48M *10K_4 A
1 1 0 400.00 100 33 C181 15P/50V_4 CLK_ICH_14M
C488 15P/50V_4 PCI_CLK_8512
1 1 1 200.00 100 33 C206 15P/50V_4 PCLK_LPC_DEBUG PULL HIGH PULL LOW
C487 15P/50V_4 CLK_PCI_ICH
PROJECT : AJ2
PIN37/38 is **SRC5_EN/PCI-3
PCI3 CPU_STOP/PCI_STOP (Internal Pull Low) Quanta Computer Inc.
PIN37/38 IS SRC5. Size Document Number Rev
Custom CLOCK GENERATOR 1A
5 4 3 2 1
1 2 3 4 5 6 7 8
H_A#[3..16] U18A H_D#[0..63] U18B H_D#[0..63]

6 H_A#[3..16] 6 H_D#[0..63] H_D#[0..63] 6
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 6 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 6 D[1]# D[33]#
H_A#5 H_D#2 H_D#34
03
L4 A[5]# BPRI# G5 H_BPRI# 6 E26 D[2]# D[34]# V24
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# 6 F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 6 D[5]# D[37]#
ADDR GROUP 0
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 6 +1.05V_VCCP D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
A[10]# D[7]# D[39]#
DATA GRP 0
H_A#11 H_D#8 H_D#40
DATA GRP 2
P5 A[11]# BR0# F1 H_BR0# 6 Layout Note: K24 D[8]# D[40]# Y25
H_A#12 P2 R73 56_4 Place R288 H_D#9 G24 W 22 H_D#41
A[12]# D[9]# D[41]#
1
CONTROL
H_A#13 L2 D20 H_IERR#1 2 +1.05V_VCCP H_D#10 J24 Y23 H_D#42
A
H_A#14 A[13]# IERR# R18 close to H_D#11 D[10]# D[42]# H_D#43 A
P4 A[14]# INIT# B3 H_INIT# 14 J23 D[11]# D[43]# W 24
H_A#15 P1 *51/F CPU. H_D#12 H22 W 25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 6 F26 D[13]# D[45]# AA23
M1 R27 0_4 H_D#14 K22 AA24 H_D#46
6 H_ADSTB#0
2
H_REQ#[0..4] ADSTB[0]# H_RESET_R# H_RESET# H_D#15 D[14]# D[46]# H_D#47
6 H_REQ#[0..4] RESET# C1 1 2 H_RESET# 6 H23 D[15]# D[47]# AB25
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 6 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 6 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 6 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 6 H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# 6 H_D#[0..63] H_D#[0..63] 6
G6 H_D#16 N22 AE24 H_D#48
6 H_A#[17..35] HIT# H_HIT# 6 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 6 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 *PAD T3 R23 D[19]# D[51]# AB22
H_A#20 W6 A[20]# BPM[1]# AD3 ITP_BPM#1
*PAD T4 Layout Note: H_D#20 L23 D[20]# D[52]# AB21 H_D#52
H_A#21 U4 AD1 ITP_BPM#2 Place voltage H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# *PAD T95 D[21]# D[53]#
ADDR GROUP 1
XDP/ITP SIGNALS
H_A#22 Y5 AC4 ITP_BPM#3 H_D#22 L22 AD20 H_D#54
A[22]# BPM[3]# *PAD T1 divider within D[22]# D[54]#
DATA GRP 1
H_A#23 ITP_BPM#4 H_D#23 H_D#55
DATA GRP 3
U1 A[23]# PRDY# AC2 *PAD T2 M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 ITP_BPM#5 0.5" of GTLREF H_D#24 P25 AF23 H_D#56
A[24]# PREQ# *PAD T94 D[24]# D[56]#
H_A#25 T5 AC5 ITP_TCK pin H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21
H_A#27 W2 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS +1.05V_VCCP H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# ITP_DBRESET# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 ITP_DBRESET# 16 T25 D[30]# D[62]# AF22
2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# R75 47_4 R382 D[31]# D[63]#
W3 A[32]# 6 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 6
H_A#33 AA4 THERMAL 2 1 +1.05V_VCCP 1K/F_4 M26 AF24
A[33]# 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6
H_A#34 AB2 N24 AC20
A[34]# 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
B H_A#35 AA3 D21 H_PROCHOT# B
*PAD T8
1
A[35]# PROCHOT#
6 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA
H_THERMDA 5
H_GTLREF AD26 GTLREF COMP[0] R26 COMP0 Note:
B25 H_THERMDC CPU_TEST1 C23 MISC COMP[1] U26 COMP1 H_DPRTSTP need to daisy chain
THERMDC H_THERMDC 5 TEST1
2
A6 CPU_TEST2 D25 AA1 COMP2
14 H_A20M# A20M# H_THERMTRIP_R# R29 0_4 CPU_TEST3 TEST2 COMP[2] COMP3
from ICH9 to IMVP6 to CPU.
14 H_FERR# A5 FERR# THERMTRIP# C7 H_THERMTRIP# 7,14 C24 TEST3 COMP[3] Y1
ICH
C4 R377 CPU_TEST4 AF26

14 H_IGNNE# IGNNE# TEST4
R28 *56.2/F_4 +1.05V_VCCP 2K/F_4 CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 7,14,38
D5 H CLK CPU_TEST6 A26 B5
14 H_STPCLK# H_DPSLP# 14
1
STPCLK# CPU_TEST7 TEST6 DPSLP#
14 H_INTR C6 LINT0 C3 TEST7 DPW R# D24 H_DPWR# 6
14 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 2 2,7 CPU_MCH_BSEL0 B22 BSEL[0] PW RGOOD D6 H_PWRGOOD 14
14 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 2 2,7 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6
2,7 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 38
M4 RSVD[01]
N5 C375 Penryn Ball-out Rev 1a
RSVD[02] H_THERMDA H_THERMDC
T2 RSVD[03] 1 2
V3
RESERVED
RSVD[04] *2200P/50V/X7R_4 R82 *1K/F_4

B2 RSVD[05]
C3 1 2 CPU_TEST1 T7
*PADT7
*PAD CPU_TEST3
RSVD[06] R72 *1K/F_4 CPU_TEST5
D2 RSVD[07] *PADT96
*PADT96
D22 1 2 CPU_TEST2
RSVD[08]
D3 RSVD[09] Voltage Level shift C378 *0.1U/16V/X7R_4 For the purpose of testability, route these signals
F6 2 1 CPU_TEST4 through a ground referenced Z0 = 55ohm trace that
RSVD[10] +1.05V_VCCP +3.3V_ALW R76 *0_4
CPU_TEST6
ends in a via that is near a GND via and is
1 2
R30 *0_4 accessible through an oscilloscope connection.
2
Penryn Ball-out Rev 1a 1 2 CPU_TEST7
R390
*2.2K_4
2
C
Q38 1 Place C close to the FSB BCLK BSEL2 BSEL1 BSEL0 C
CPU_TEST4 pin. Make sure
H_PROCHOT# 1 3 IMVP6_PROCHOT# 38 CPU_TEST4 routing is 533 133 0 0 1
Populate ITP700Flex for bringup reference to GND and away 667 166 0 1 1
*2N7002W-7-F from other noisy signal.
+1.05V_VCCP R391 0_4 800 200 0 1 0
1 2
H_RESET# R17 *51/F_4
C17 COMP0
*0.1U/16V/X7R_4 COMP1
COMP2
COMP3
ITP_TMS R22 54.9/F_4
2
ITP700 layout guidelines
R31 R20 R380 R381
Signal Resistor Value Connect To Resistor Placement 54.9/F_4 27.4/F_4 54.9/F_4 27.4/F_4
ITP_TDI R21 54.9/F_4
TDI 150 ohm ± 5% VCCP Place the pull-up near CPU
1
R23 TMS 39 ohm ± 1% VCCP Within 200ps of ITP connector
ITP_TDO *54.9/F_4 Comp0,2 connect with Zo=27.4ohm,Comp1,3
500 to 680 connect with Zo=55ohm, make those traces
ITP_TCK R25 54.9/F_4 TRST# ohm ± 5% GND Place the pull-down near CPU length shorter than 0.5".Trace should be
ITP_TRST# R24 54.9/F_4 Connect to TCK pin of CPU and then at least 25 mils away from any other
connect it to FBO pin of ITP connector toggling signal.
C16 TCK 27 ohm ± 1% GND in daisy chain. Place the pull-down
D *0.1U/16V/X7R_4 D
+3.3V_S5 near TCK0 pin of ITP connector
TDO 51 ohm ± 5% VCCP Place the pull-up near ITP
ITP_DBRESET# R74 10K/F_4
Connect to CPURST# pin of GMCH through
04/17 jack hsu 22.6 ohm ± 1%
C71 series resistor
the series resistor placed within PROJECT : AJ2
RESET# VCCP 200ps of ITP connector. Place the
*0.1U/16V/X7R_4 and pullup 51
ohm ± 1%.
pull-up after the series resistor from
ITP connector.
Custom Penryn Processor (HOST BUS) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+VCC_CORE
All use 22U 10V(+-20%,X5R,1210)Pb-Free.
+VCC_CORE
A7
A9
A10
U18C
VCC[001]
VCC[002]
VCC[068]
VCC[069]
AB20
AB7
AC7
+VCC_CORE
A4
A8
A11
A14
U18D
VSS[001]
VSS[002]
VSS[003]
VSS[082]
VSS[083]
VSS[084]
P6
P21
P24
R2
04
VCC[003] VCC[070] VSS[004] VSS[085]
A12 VCC[004] VCC[071] AC9 A16 VSS[005] VSS[086] R5
1
A17 VCC[007] VCC[074] AC15 AF2 VSS[008] VSS[089] T1
C350 C353 C50 C345 C341 A18 AC17 B6 T4
10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 VCC[008] VCC[075] VSS[009] VSS[090]
A20 AC18 B8 T23
2
2
A VCC[009] VCC[076] VSS[010] VSS[091] A
B7 VCC[010] VCC[077] AD7 B11 VSS[011] VSS[092] T26
B9 VCC[011] VCC[078] AD9 B13 VSS[012] VSS[093] U3
+VCC_CORE B14 AD14 B21 U24
VCC[014] VCC[081] VSS[015] VSS[096]
B15 VCC[015] VCC[082] AD15 B24 VSS[016] VSS[097] V2
B17 VCC[016] VCC[083] AD17 C5 VSS[017] VSS[098] V5
B18 VCC[017] VCC[084] AD18 C8 VSS[018] VSS[099] V22
1
1
B20 VCC[018] VCC[085] AE9 C11 VSS[019] VSS[100] V25
C337 C344 C339 C349 C59 C9 AE10 C14 W1
10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 VCC[019] VCC[086] VSS[020] VSS[101]
C10 AE12 C16 W4
2
2
VCC[020] VCC[087] VSS[021] VSS[102]
C12 VCC[021] VCC[088] AE13 C19 VSS[022] VSS[103] W 23
C13 VCC[022] VCC[089] AE15 C2 VSS[023] VSS[104] W 26
C15 VCC[023] VCC[090] AE17 C22 VSS[024] VSS[105] Y3
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C25 VSS[025] VSS[106] Y6
C18 VCC[025] VCC[092] AE20 D1 VSS[026] VSS[107] Y21
D9 VCC[026] VCC[093] AF9 D4 VSS[027] VSS[108] Y24
+VCC_CORE D10 AF10 D8 AA2
VCC[027] VCC[094] VSS[028] VSS[109]
D12 VCC[028] VCC[095] AF12 D11 VSS[029] VSS[110] AA5
1
1
C340 C33 C45 C38 C354 D18 AF18 D23 AA16
10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 VCC[032] VCC[099] +1.05V_VCCP VSS[033] VSS[114]
E7 AF20 D26 AA19
2
2
VCC[033] VCC[100] VSS[034] VSS[115]
E9 VCC[034] E3 VSS[035] VSS[116] AA22
E10 VCC[035] VCCP[01] G21 E6 VSS[036] VSS[117] AA25
E12 VCC[036] VCCP[02] V6 E8 VSS[037] VSS[118] AB1
1
E13 VCC[037] VCCP[03] J6 E11 VSS[038] VSS[119] AB4
+VCC_CORE E15 K6 + C346 E14 AB8
VCC[038] VCCP[04] 330U/2.5V_7343 VSS[039] VSS[120]
B E17 VCC[039] VCCP[05] M6 E16 VSS[040] VSS[121] AB11 B
E18 J21 E19 AB13
2
VCC[040] VCCP[06] VSS[041] VSS[122]
E20 VCC[041] VCCP[07] K21 E21 VSS[042] VSS[123] AB16
1
1
F7 VCC[042] VCCP[08] M21 E24 VSS[043] VSS[124] AB19
C36 C51 C58 C44 C348 F9 N21 F5 AB23
10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 VCC[043] VCCP[09] VSS[044] VSS[125]
F10 N6 F8 AB26
2
2
VCC[044] VCCP[10] VSS[045] VSS[126]
F12 VCC[045] VCCP[11] R21 F11 VSS[046] VSS[127] AC3
F14 R6 +1.5V F13 AC6
VCC[046] VCCP[12] VSS[047] VSS[128]
F15 VCC[047] VCCP[13] T21 F16 VSS[048] VSS[129] AC8
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F19 VSS[049] VSS[130] AC11
F18 VCC[049] VCCP[15] V21 F2 VSS[050] VSS[131] AC14
F20 VCC[050] VCCP[16] W 21 F22 VSS[051] VSS[132] AC16
AA7 VCC[051] F25 VSS[052] VSS[133] AC19
+VCC_CORE AA9 B26 G4 AC21
VCC[052] VCCA[01] VSS[053] VSS[134]
AA10 VCC[053] VCCA[02] C26 G1 VSS[054] VSS[135] AC24
AA12 VCC[054] G23 VSS[055] VSS[136] AD2
1
AA13 AD6 C72 C73 G26 AD5
VCC[055] VID[0] VID0 38 VSS[056] VSS[137]
1
AA15 AF5 0.01U/25V/X7R_410U/4V/X6S_8 H3 AD8

VCC[056] VID[1] VID1 38 VSS[057] VSS[138]
C29 C57 C26 C27 C60 C31 AA17 AE5 H6 AD11
VID2 38
2
10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 VCC[057] VID[2] VSS[058] VSS[139]
AA18 AF4 VID3 38 H21 AD13
2
VCC[058] VID[3] VSS[059] VSS[140]

AA20 VCC[059] VID[4] AE3 VID4 38 H24 VSS[060] VSS[141] AD16
AB9 VCC[060] VID[5] AF3 VID5 38 J2 VSS[061] VSS[142] AD19
AC10 VCC[061] VID[6] AE2 VID6 38 J5 VSS[062] VSS[143] AD22
6 inside cavity, north side, primary layer. AB10 VCC[062] J22 VSS[063] VSS[144] AD25
AB12 VCC[063]
Layout Note: J25 VSS[064] VSS[145] AE1
AB14 AF7 VCCSENSE Place C424 near PIN K1 AE4
VCC[064] VCCSENSE VCCSENSE 38 VSS[065] VSS[146]
+VCC_CORE AB15 K4 AE8
VCC[065] B26. VSS[066] VSS[147]
AB17 VCC[066] K23 VSS[067] VSS[148] AE11
AB18 AE7 VSSSENSE K26 AE14
VCC[067] VSSSENSE VSSSENSE 38 VSS[068] VSS[149]
L3 VSS[069] VSS[150] AE16
1
C C
Penryn Ball-out Rev 1a L6 AE19
C28 C30 C32 C35 C351 C37 VSS[070] VSS[151]
. L21 VSS[071] VSS[152] AE23
10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 10U/4V/X6S_8 L24 AE26
2
+VCC_CORE VSS[072] VSS[153]

M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
1
M22 VSS[075] VSS[156] AF8
6 inside cavity, south side, primary layer. R350 M25 VSS[076] VSS[157] AF11
100/F_4 N1 AF13
VSS[077] VSS[158]
N4 VSS[078] VSS[159] AF16
N23 AF19
2
VSS[079] VSS[160]
N26 VSS[080] VSS[161] AF21
VCCSENSE P3 A25
VSSSENSE VSS[081] VSS[162]
VSS[163] AF25
+PWR_SRC
1
+1.05V_VCCP Penryn Ball-out Rev 1a
R347 .
1
100/F_4
+ C314
1
*100U/25V
2
C336 C338 C355 C335 C357 C356
2
0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4

2
Route VCCSENSE and VSSSENSE

Layout Note: traces at 27.4ohms and
Layout out: Need to add 100uF cap on PWR_SRC for cap singing. length matched to within 25
Place these inside socket cavity on North side secondary. Place on PWR_SRC near +VCC_CORE. mil. Place PU and PD within
2 inch of CPU.
D D
PROJECT : AJ2
Custom Penryn Processor (POWER) 1A
1 2 3 4 5 6 7 8
5 4 3 2 1
05
CPU Thermal monitor
D +3.3V D
2
Q40 +3.3V
2N7002W-7-F
ABCLK 3 1 THM_CLK 25 mil
30,31 ABCLK
R387 0_6 +3.3V_THM
C382
0.1U/16V/X7R_4
+3.3V R398 R397 R394 R383
TO MMB/ EC 10K_4 10K_4 10K_4 *10K_4
U20
2
Q39 8 1
2N7002W-7-F SCLK VCC H_THERMDA
H_THERMDA 3
ABDATA 3 1 THM_DAT 7 2
30,31 ABDATA SDA DXP
R395 *0_4 6 3 C381
16,22 THERM_ALERT# ALERT# DXN 100P/50V_4
+3.3V 4 5 H_THERMDC
OVERT# GND H_THERMDC 3
2
Q37
2N7002W-7-F G780P81
3 1 6648OVERT# ADDRESS:
35,39 SYS_SHDN#
98H
Layout Note:
C C
Layout Note:Routing 10:10 mils and
away from noise source with ground
gard
+5V 40 mil CN17

CPU FAN 70 mil +5V_FAN
1
2 4
C22 3 5
1U/10V/X5R_6 FAN
U1 C23 C330 Thermistor_CTRL 39
1 8 0.1U/16V/X7R_4 10U/10V/X5R_8
R39 VEN GND C333
2 VIN GND 7
100K_4 +5V_FAN 3 6 1000P/16V/X7R_4
FANSET VO GND
30 PWM_FAN1 1 2 4 SET GND 5
G993P1U
C24
0.1U/16V/X7R_4
+3.3V
1
B B
2 FANSIG
Q32
PDTA124EU
3
30 FANSIG1
R352
100K_4
A A
PROJECT : AJ2
Custom Thermal IC 1A
5 4 3 2 1
1 2 3 4 5 6 7 8
06
U21A H_A#[3..35]
H_D#[0..63] H_A#[3..35] 3
A14 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G8 H_D#_1 H_A#_5 F16 A
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
H_D#4 G2 M16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H6 H_D#_5 H_A#_9 J13
H_D#6 H2 P16 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F6 H_D#_7 H_A#_11 R16
H_D#8 D4 N17 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H3 H_D#_9 H_A#_13 M13
H_D#10 M9 E17 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
M11 H_D#_11 H_A#_15 P17
H_D#12 J1 F17 H_A#16
H_D#13 H_D#_12 H_A#_16 H_A#17
J2 H_D#_13 H_A#_17 G20
H_D#14 N12 B19 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
J6 H_D#_15 H_A#_19 J16
H_D#16 P2 E20 H_A#20
H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H_D#_17 H_A#_21 H16
H_D#18 R2 J20 H_A#22
H_D#19 H_D#_18 H_A#_22 H_A#23
N9 H_D#_19 H_A#_23 L17
H_D#20 L6 A17 H_A#24
H_D#21 H_D#_20 H_A#_24 H_A#25
M5 H_D#_21 H_A#_25 B17
H_D#22 J3 L16 H_A#26
H_D#23 H_D#_22 H_A#_26 H_A#27
N2 H_D#_23 H_A#_27 C21
H_D#24 R1 J17 H_A#28
H_D#25 H_D#_24 H_A#_28 H_A#29
N5 H_D#_25 H_A#_29 H20
+1.05V_VCCP H_D#26 N6 B18 H_A#30
H_D#27 H_D#_26 H_A#_30 H_A#31
P13 H_D#_27 H_A#_31 K17
H_D#28 N8 B20 H_A#32
H_D#29 H_D#_28 H_A#_32 H_A#33
L7 H_D#_29 H_A#_33 F21
1
H_D#30 N10 K21 H_A#34

R392 H_D#31 H_D#_30 H_A#_34 H_A#35
B M3 H_D#_31 H_A#_35 L20 B
221/F H_D#32 Y3
H_D#33 H_D#_32
AD14 H_D#_33 H_ADS# H12 H_ADS# 3
H_D#34 Y6 B16 H_ADSTB#0 3
2
H_SWING H_D#35 H_D#_34 H_ADSTB#_0

Y10 H_D#_35 H_ADSTB#_1 G17 H_ADSTB#1 3
H_D#36 Y12 A9
H_D#_36 H_BNR# H_BNR# 3
1
HOST
H_D#37 Y14 F11
H_D#_37 H_BPRI# H_BPRI# 3
2
R389 H_D#38 Y7 G12

H_D#_38 H_BREQ# H_BR0# 3
100/F_4 C424 <--close pin C5 H_D#39 W2 E9
H_D#_39 H_DEFER# H_DEFER# 3
0.1U/16V/X7R_4 H_D#40 AA8 B10 H_DBSY# 3
1
H_D#41 H_D#_40 H_DBSY#

Y9 AH7 CLK_MCH_BCLK 2
2
H_D#42 H_D#_41 HPLL_CLK

AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# 2 <--CLK
H_D#43 AA9 J11
H_D#_43 H_DPW R# H_DPWR# 3
H_D#44 AA11 F9
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AD11 H9
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AD10 E12
H_D#_46 H_HITM# H_HITM# 3
H_D#47 AD13 H11
H_D#_47 H_LOCK# H_LOCK# 3
H_D#48 AE12 C9
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AE9
H_RCOMP H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8 H_D#_51
1
H_D#52 AA3
R388 H_D#53 H_D#_52
AD3 H_D#_53 H_DINV#_0 J8 H_DINV#0 3
24.9/F_4 H_D#54 AD7 L3
H_D#_54 H_DINV#_1 H_DINV#1 3
H_D#55 AE14 Y13
H_D#_55 H_DINV#_2 H_DINV#2 3
Layout Note: H_D#56 AF3 Y1 H_DINV#3 3
2
H_D#57 H_D#_56 H_DINV#_3

H_RCOMP trace should be AC1 H_D#_57
H_D#58 AE3 L10
10-mil wide with 20-mil H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#0 3
AC3 H_D#_59 H_DSTBN#_1 M7 H_DSTBN#1 3
spacing. H_D#60 AE11 AA5
C H_D#_60 H_DSTBN#_2 H_DSTBN#2 3 C
H_D#61 AE8 AE6
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AG2
H_D#63 H_D#_62
AD6 H_D#_63 H_DSTBP#_0 L9 H_DSTBP#0 3
H_DSTBP#_1 M8 H_DSTBP#1 3
H_DSTBP#_2 AA6 H_DSTBP#2 3
H_SWING C5 AE5
+1.05V_VCCP H_SW ING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP E3 H_RCOMP
H_REQ#_0 B15 H_REQ#0 3
H_REQ#_1 K13 H_REQ#1 3
2
H_REQ#_2 F13 H_REQ#2 3

R400 B13
H_REQ#_3 H_REQ#3 3
1K/F_4 C12 B14
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E11 H_CPUSLP#
B6 H_RS#0 3
1
H_RS#_0
H_RS#_1 F12 H_RS#1 3
H_RS#_2 C8 H_RS#2 3
H_REF A11 H_AVREF
B11 H_DVREF
1
CANTIGA_1p0
1
R401 C435
2K/F_4 0.1U/16V/X7R_4
2
2
Layout Note:
Place the 0.1 uF
D
decoupling capacitor D
within 100 mils from
GMCH pins.
PROJECT : AJ2
Custom Cantiga (HOST) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U21B
M36
RSVD1
N36 AP24
07
RSVD2 SA_CK_0 M_CLK_DDR0 13
CONTROL/COMPENSATION
R33 RSVD3 SA_CK_1 AT21 M_CLK_DDR1 13
pull up/down T33 RSVD4 SB_CK_0 AV24 M_CLK_DDR3 13
+1.8V_SUS AH9 AU20
impedance RSVD5 SB_CK_1 M_CLK_DDR4 13
compensation AH10 RSVD6
1
AH12 AR24 M_CLK_DDR#0 13
RSVD7 SA_CK#_0
For Memory AH13
RSVD8 SA_CK#_1
AR21 M_CLK_DDR#1 13
R141 K12 AU24 IV&EV Dis/Enable setting U21C
RSVD9 SB_CK#_0 M_CLK_DDR#3 13
1K/F_4 AL34 AV20
RSVD10 SB_CK#_1 M_CLK_DDR#4 13
AK34 If LVDS no use,all signal can NC 49.9 ohm for cantiga +VCC_PEG
2
SM_RCOMP_VOH RSVD11
AN35 RSVD12 SA_CKE_0 BC28 DDR_CKE0_DIMMA 12,13
AM35 AY28 L32 R177 49.9/F
RSVD13 SA_CKE_1 DDR_CKE1_DIMMA 12,13 18 L_BKLT_CTRL L_BKLT_CTRL
1
1
C171 C180 T24 AY36 G32 T37 EXP_A_COMPX 1 2
RSVD14 SB_CKE_0 DDR_CKE3_DIMMB 12,13 18 INT_LVDS_BLON L_BKLT_EN PEG_COMPI
0.01U/25V/X7R_42.2U/10V/X5R_8 BB36 R172 *I@10K_4 L_CTRL_CLK M32 T36
SB_CKE_1 DDR_CKE4_DIMMB 12,13 L_CTRL_CLK PEG_COMPO
RSVD
R153 B31 +3.3V
2
3.01K/F_4 RSVD15 R168 *I@10K_4 L_CTRL_DATA

A AJ6 RSVD16 SA_CS#_0 BA17 DDR_CS0_DIMMA# 12,13 M33 L_CTRL_DATA PEG_RXN[15:0] 22 A
M1 AY16 K33 H44 PEG_RXN0
2
RSVD17 SA_CS#_1 DDR_CS1_DIMMA# 12,13 18 INT_LVDS_EDIDCLK L_DDC_CLK PEG_RX#_0

AV16 J33 J46 PEG_RXN1
SB_CS#_0 DDR_CS2_DIMMB# 12,13 18 INT_LVDS_EDIDDATA L_DDC_DATA PEG_RX#_1
SM_RCOMP_VOL AR13 L44 PEG_RXN2
SB_CS#_1 DDR_CS3_DIMMB# 12,13 PEG_RX#_2
AY21 L40 PEG_RXN3
RSVD20 PEG_RX#_3
1
C179 C173 BD17 M29 N41 PEG_RXN4 Can support reversal routing.If CFG9=1, PCI
SA_ODT_0 M_ODT0 12,13 18 INT_LVDS_DIGON L_VDD_EN PEG_RX#_4 Express is normal operation. If CFG9=0,
0.01U/25V/X7R_42.2U/10V/X5R_8 AY17 R418 *I@2.4K/F_4 C44 P48 PEG_RXN5
SA_ODT_1 M_ODT1 12,13 LVDS_IBG PEG_RX#_5 then PEG_TXP0 becomes PEG_TXP15, PEG_TXP1
R158 A47 BF15 B43 N44 PEG_RXN6
2
RSVD21 SB_ODT_0 M_ODT2 12,13 LVDS_VBG PEG_RX#_6 becomes PEG_TXP14, PEG_TXP2 becomes
1K/F_4 BG23 AY13 E37 T43 PEG_RXN7
RSVD22 SB_ODT_1 M_ODT3 12,13 LVDS_VREFH PEG_RX#_7 PEG_TXP13, etc. similarly for PEG_RXP[15:0]
BF23 E38 U43 PEG_RXN8
2
RSVD23 LVDS_VREFL PEG_RX#_8
LVDS
BH18 BG22 SMRCOMPP INT_TXLCLKOUT- C41 Y43 PEG_RXN9 and PEG_RXN[15:0]
RSVD24 SM_RCOMP 22 INT_TXLCLKOUT- LVDSA_CLK# PEG_RX#_9
BF18 BH21 SMRCOMPN 22 INT_TXLCLKOUT+ INT_TXLCLKOUT+ C40 Y48 PEG_RXN10
RSVD25 SM_RCOMP# INT_TXUCLKOUT- LVDSA_CLK PEG_RX#_10 PEG_RXN11
22 INT_TXUCLKOUT- B37 Y36
SM_RCOMP_VOH INT_TXUCLKOUT+ LVDSB_CLK# PEG_RX#_11 PEG_RXN12
BF28 22 INT_TXUCLKOUT+ A37 AA43
SM_RCOMP_VOH SM_RCOMP_VOL LVDSB_CLK PEG_RX#_12 PEG_RXN13
DDR
BH28 AD37
SM_RCOMP_VOL INT_TXLOUT0- PEG_RX#_13 PEG_RXN14
V_DDR_MCH_REF 22 INT_TXLOUT0- H47 LVDSA_DATA#_0 PEG_RX#_14 AC47
AV42 INT_TXLOUT1- E46 AD39 PEG_RXN15
SM_VREF 22 INT_TXLOUT1- LVDSA_DATA#_1 PEG_RX#_15
SM_PWROK AR36 SM_PWROK R175 0_4
22 INT_TXLOUT2-
INT_TXLOUT2- G40 LVDSA_DATA#_2 PEG_RXP[15:0] 22
R108 2 499/F_4 PEG_RXP0
GRAPHICS
SM_REXT BF17 1 A40 LVDSA_DATA#_3 PEG_RX_0 H43
SM_DRAMRST# BC36 SM_DRAMRST# TP3 PEG_RX_1 J44 PEG_RXP1
22 INT_TXLOUT0+ INT_TXLOUT0+ H48 L43 PEG_RXP2
MCH_DREFCLK INT_TXLOUT1+ LVDSA_DATA_0 PEG_RX_2 PEG_RXP3
B38 MCH_DREFCLK 2 22 INT_TXLOUT1+ D45 L41
DPLL_REF_CLK LVDSA_DATA_1 PEG_RX_3
A38 MCH_DREFCLK# MCH_DREFCLK# 2 22 INT_TXLOUT2+
INT_TXLOUT2+ F40 N40 PEG_RXP4
DPLL_REF_CLK# DREF_SSCLK LVDSA_DATA_2 PEG_RX_4 PEG_RXP5
E41 DREF_SSCLK 2 B40 P47
CLK DPLL_REF_SSCLK
DPLL_REF_SSCLK#
F41 DREF_SSCLK#
DREF_SSCLK# 2
INT_TXUOUT0-
LVDSA_DATA_3 PEG_RX_5
PEG_RX_6
N43 PEG_RXP6
PEG_RXP7
22 INT_TXUOUT0- A41 T42
INT_TXUOUT1- LVDSB_DATA#_0 PEG_RX_7 PEG_RXP8
F43 CLK_MCH_3GPLL 2 22 INT_TXUOUT1- H38 U42
PEG_CLK INT_TXUOUT2- LVDSB_DATA#_1 PEG_RX_8 PEG_RXP9
E43 CLK_MCH_3GPLL# 2 22 INT_TXUOUT2- G37 Y42
PEG_CLK# LVDSB_DATA#_2 PEG_RX_9 PEG_RXP10
J37 LVDSB_DATA#_3 PEG_RX_10 W47
Y37 PEG_RXP11
INT_TXUOUT0+ PEG_RX_11 PEG_RXP12
22 INT_TXUOUT0+ B42 LVDSB_DATA_0 PEG_RX_12 AA42
Layout Note: AE41 INT_TXUOUT1+ G38 AD36 PEG_RXP13
DMI_RXN_0 DMI_MRX_ITX_N0 15 22 INT_TXUOUT1+ LVDSB_DATA_1 PEG_RX_13
Location of all MCH_CFG strap AE37 INT_TXUOUT2+ F37 AC48 PEG_RXP14
PCI-EXPRESS
DMI_RXN_1 DMI_MRX_ITX_N1 15 22 INT_TXUOUT2+ LVDSB_DATA_2 PEG_RX_14
AE47 K37 AD40 PEG_RXP15
resistors needs to be close to DMI_RXN_2 DMI_MRX_ITX_N2 15 LVDSB_DATA_3 PEG_RX_15 PEG_TXN[15:0] 22
AH39 DMI_MRX_ITX_N3 15
minmize stub. DMI_RXN_3 C_PEG_TXN0 C367 0.1U/16V/X7R_4 PEG_TXN0 SDVOB_RED-
Layout Note: PEG_TX#_0
J41
AE40 M46 C_PEG_TXN1 C371 0.1U/16V/X7R_4 PEG_TXN1 SDVOB_GREEN-
B T25
DMI_RXP_0
AE38
DMI_MRX_ITX_P0 15 Place 150 ohm R143 E@0_4 F25
PEG_TX#_1
M47 C_PEG_TXN2 C376 0.1U/16V/X7R_4 PEG_TXN2 SDVOB_BLUE- B
2,3 CPU_MCH_BSEL0 CFG_0 DMI_RXP_1 DMI_MRX_ITX_P1 15 TVA_DAC PEG_TX#_2
2,3 CPU_MCH_BSEL1 R25 AE48 DMI_MRX_ITX_P2 15
termination resistors H25 M40 C_PEG_TXN3 C384 0.1U/16V/X7R_4 PEG_TXN3 SDVOB_CLK-
CFG_1 DMI_RXP_2 R139 *I@75/F_4 TVB_DAC PEG_TX#_3 C_PEG_TXN4 C391 E@.1U/16V_4 PEG_TXN4
2,3 CPU_MCH_BSEL2 P25
CFG_2 DMI_RXP_3
AH40 DMI_MRX_ITX_P3 15 close to GMCH. K25
TVC_DAC PEG_TX#_4
M42
TV
MCH_CFG3 P20 R48 C_PEG_TXN5 C403 E@.1U/16V_4 PEG_TXN5
MCH_CFG4 CFG_3 PEG_TX#_5 C_PEG_TXN6 C406 E@.1U/16V_4 PEG_TXN6
P24 CFG_4 DMI_TXN_0 AE35 DMI_MTX_IRX_N0 15 H24 TV_RTN PEG_TX#_6 N38
MCH_CFG5 C25 AE43 R155 E@0_4 HSYNC_G T40 C_PEG_TXN7 C414 E@.1U/16V_4 PEG_TXN7
CFG_5 DMI_TXN_1 DMI_MTX_IRX_N1 15 PEG_TX#_7
MCH_CFG6 N24 AE46 U37 C_PEG_TXN8 C417 E@.1U/16V_4 PEG_TXN8
MCH_CFG7 M24 AH42 R160 E@0_4 VSYNC_G U40 C_PEG_TXN9 C425 E@.1U/16V_4 PEG_TXN9
DMI

MCH_CFG8 E21 C31 Y40 C_PEG_TXN10 C428 E@.1U/16V_4 PEG_TXN10
CFG_8 TV_DCONSEL_0 PEG_TX#_10
CFG
MCH_CFG9 C23 AD35 E32 AA46 C_PEG_TXN11 C431 E@.1U/16V_4 PEG_TXN11

CFG_9 DMI_TXP_0 DMI_MTX_IRX_P0 15 TV_DCONSEL_1 PEG_TX#_11
MCH_CFG10 C24 AE44 R64 *I@150/F_4 INT_CRT_BLU AA37 C_PEG_TXN12 C436 E@.1U/16V_4 PEG_TXN12
CFG_10 DMI_TXP_1 DMI_MTX_IRX_P1 15 PEG_TX#_12
MCH_CFG11 N21 AF46 AA40 C_PEG_TXN13 C440 E@.1U/16V_4 PEG_TXN13
MCH_CFG12 P21 AH43 R68 *I@150/F_4 INT_CRT_GRN AD43 C_PEG_TXN14 C443 E@.1U/16V_4 PEG_TXN14
MCH_CFG13 T21 AC46 C_PEG_TXN15 C446 E@.1U/16V_4 PEG_TXN15
CFG_13 PEG_TX#_15 PEG_TXP[15:0] 22
MCH_CFG14 R20 INTEL FAE Suggest PD for Ext graphics R70 *I@150/F_4 INT_CRT_RED
MCH_CFG15 CFG_14 INT_CRT_BLU E28 C_PEG_TXP0 C364 0.1U/16V/X7R_4 PEG_TXP0 SDVOB_RED+
M20 22 INT_CRT_BLU J42
MCH_CFG16 CFG_15 MCH_DREFCLK R197 E@0_4 CRT_BLUE PEG_TX_0 C_PEG_TXP1 C368 0.1U/16V/X7R_4 PEG_TXP1 SDVOB_GREEN+
L21 L46
MCH_CFG17 CFG_16 MCH_DREFCLK# R198 E@0_4 INT_CRT_GRN G28 PEG_TX_1 C_PEG_TXP2 C372 0.1U/16V/X7R_4 PEG_TXP2 SDVOB_BLUE+
GRAPHICS VID
H21 22 INT_CRT_GRN M48

MCH_CFG18 CFG_17 DREF_SSCLK R199 E@0_4 R159 *I@1K/F_4 CRT_GREEN PEG_TX_2 C_PEG_TXP3 C380 0.1U/16V/X7R_4 PEG_TXP3 SDVOB_CLK+
P29 M39
MCH_CFG19 CFG_18 DREF_SSCLK# R200 E@0_4 INT_CRT_RED J28 PEG_TX_3 C_PEG_TXP4 C386 E@.1U/16V_4 PEG_TXP4
R28 22 INT_CRT_RED M43
CFG_19 CRT_RED PEG_TX_4
VGA
MCH_CFG20 T28 B33 T108 *PAD R47 C_PEG_TXP5 C393 E@.1U/16V_4 PEG_TXP5
CFG_20 GFX_VID_0 R156 E@0_4 CRTIREF PEG_TX_5 C_PEG_TXP6 C404 E@.1U/16V_4 PEG_TXP6
8 MCH_CFG[3..20] B32 T106 *PAD G29 N37
GFX_VID_1 CRT_IRTN PEG_TX_6 C_PEG_TXP7 C407 E@.1U/16V_4 PEG_TXP7
G33 T29 *PAD T39
GFX_VID_2 PEG_TX_7 C_PEG_TXP8 C415 E@.1U/16V_4 PEG_TXP8
GFX_VID_3 F33 T31 *PAD 22 INT_CRT_DDCCLK H32 CRT_DDC_CLK PEG_TX_8 U36
R29 E33 T28 *PAD J32 U39 C_PEG_TXP9 C421 E@.1U/16V_4 PEG_TXP9
16 PM_SYNC# PM_SYNC# GFX_VID_4 22 INT_CRT_DDCDAT CRT_DDC_DATA PEG_TX_9
B7 R154 *I@24.9/F_4 HSYNC_G J29 Y39 C_PEG_TXP10 C426 E@.1U/16V_4 PEG_TXP10
3,14,38 H_DPRSTP# PM_DPRSTP# 22 INT_HSYNC CRT_HSYNC PEG_TX_10
PM_EXTTS#0 N33 CRTIREF E29 Y46 C_PEG_TXP11 C429 E@.1U/16V_4 PEG_TXP11
12,13 PM_EXTTS#0 PM_EXTTS#1 PM_EXT_TS#_0 R157 *I@24.9/F_4 VSYNC_G CRT_TVO_IREF PEG_TX_11 C_PEG_TXP12 C432 E@.1U/16V_4 PEG_TXP12
12 PM_EXTTS#1
P32
PM_EXT_TS#_1 Layout Note: 22 INT_VSYNC L29
CRT_VSYNC PEG_TX_12
AA36
PM
AT40 C34 T107 *PAD AA39 C_PEG_TXP13 C437 E@.1U/16V_4 PEG_TXP13

16,38 DELAY_VR_PG R85 100/F_4 AT11
PWROK GFX_VR_EN HSYNC/VSYNC serial R PEG_TX_13
AD42 C_PEG_TXP14 C441 E@.1U/16V_4 PEG_TXP14
15 PLTRST#_NB RSTIN# PEG_TX_14
3,14 H_THERMTRIP#
H_THERMTRIP# T20 place close to NB AD46 C_PEG_TXP15 C445 E@.1U/16V_4 PEG_TXP15
THERMTRIP# PEG_TX_15
R32
16,38 PM_DPRSLPVR DPRSLPVR
Modify for C-TEST AH37 CANTIGA_1p0
CL_CLK CL_CLK0 16
AH36 CL_DATA0 16
TP_NC1 BG48 CL_DATA
T117 AN36
ME
NC_1 CL_PWROK PWROK 16,30

T113 TP_NC2 BF48 AJ35
NC_2 CL_RST# ICH_CL_RST0# 16
C T118 TP_NC3 BD48 AH34 MCH_CLVREF C
TP_NC4 BC48 NC_3 CL_VREF ACZ_BITCLK_MCH +1.05V_VCCP
T111 NC_4
T109 TP_NC5 BH47 +1.8V_SUS
TP_NC6 BG47 NC_5 R412
T120 NC_6
TP_NC7 BE47 DDPC_CTRLCLK
T114 NC_7 DDPC_CTRLCLK
N28 TP1 *33_4 Non-iAMT
1
T112 TP_NC8 BH46 M28 DDPPC_CTRLDATA
NC_8 DDPC_CTRLDATA TP2
T110 TP_NC9 BF46 G36 SDVO_CTRLCLK R148
NC_9 SDVO_CTRLCLK SDVO_CTRLCLK 19
NC
T116 TP_NC10BG45 E36 SDVO_CTRLDATA 1K/F_4 R134

NC_10 SDVO_CTRLDATA SDVO_CTRLDATA 19
T119 TP_NC11BH44 K36 80.6/F_4
NC_11 CLKREQ# CLK_3GPLLREQ# 2
TP_NC12BH43 C462
MISC
T33 H36 EMC
2
NC_12 ICH_SYNC# MCH_ICH_SYNC# 16
T97 TP_NC13 BH6 *0.1U/16V/X7R_4 MCH_CLVREF SMRCOMPP
NC_13
T99 TP_NC14 BH5
NC_14
R399 56.2/F_4 reserved SMRCOMPN
1
T100 TP_NC15 BG4 B12 MCH_TSATN +1.05V_VCCP
NC_15 TSATN
2
1
T98 TP_NC16 BH3
NC_16
(Near to pin B28) C184 R161
BF3 511/F_4
NC_17 0.1U/16V/X7R_4 R135
BH2
1
+3.3V NC_18 ACZ_BITCLK_MCH 80.6/F_4

BG2 B28
2
NC_19 HDA_BCLK ACZ_BITCLK_MCH 14
BE2 B30 ACZ_RST#_MCH
2
NC_20 HDA_RST# ACZ_RST#_MCH 14
R173 1 2 10K_4 PM_EXTTS#0 BG1 B29 ACZ_SDIN3_MCH R413 0_4 For Memory
HDA
NC_21 HDA_SDI ACZ_SDIN3 14

R169 1 2 10K_4 PM_EXTTS#1 BF1 C29 ACZ_SDOUT_MCH
ACZ_SDOUT_MCH 14 For ME
NC_22 HDA_SDO ACZ_SYNC_MCH install 80.6 for Cantiga.
BD1 A28 ACZ_SYNC_MCH 14 Management Engine
NC_23 HDA_SYNC install 20 for Teenah.
BC1
NC_24
F1
NC_25
CANTIGA_1p0
Modify for C-TEST
D D
PROJECT : AJ2
Custom Cantiga (VGA,DMI) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DDR2
13 DDR_A_D[0..63]
DDR_A_D0
DDR_A_D1
AJ38
AJ41
U21D
SA_DQ_0 SA_BS_0 BD21
BG18
DDR_A_BS0
DDR_A_BS1
DDR_A_BS0 12,13
13 DDR_B_D[0..63]
DDR_B_D0
DDR_B_D1
AK47
AH46
U21E
SB_DQ_0 SB_BS_0 BC16
BB17
DDR_B_BS0
DDR_B_BS1
DDR_B_BS0 12,13
08
SA_DQ_1 SA_BS_1 DDR_A_BS1 12,13 SB_DQ_1 SB_BS_1 DDR_B_BS1 12,13
DDR_A_D2 AN38 AT25 DDR_A_BS2 DDR_B_D2 AP47 BB33 DDR_B_BS2
SA_DQ_2 SA_BS_2 DDR_A_BS2 12,13 SB_DQ_2 SB_BS_2 DDR_B_BS2 12,13
DDR_A_D3 AM38 DDR_B_D3 AP46
DDR_A_D4 SA_DQ_3 DDR_A_RAS# DDR_B_D4 SB_DQ_3
AJ36 SA_DQ_4 SA_RAS# BB20 DDR_A_RAS# 12,13 AJ46 SB_DQ_4
DDR_A_D5 AJ40 BD20 DDR_A_CAS# DDR_B_D5 AJ48 AU17 DDR_B_RAS#
SA_DQ_5 SA_CAS# DDR_A_CAS# 12,13 SB_DQ_5 SB_RAS# DDR_B_RAS# 12,13
DDR_A_D6 AM44 AY20 DDR_A_WE# DDR_B_D6 AM48 BG16 DDR_B_CAS#
SA_DQ_6 SA_W E# DDR_A_WE# 12,13 SB_DQ_6 SB_CAS# DDR_B_CAS# 12,13
DDR_A_D7 AM42 DDR_B_D7 AP48 BF14 DDR_B_WE#
A SA_DQ_7 SB_DQ_7 SB_W E# DDR_B_WE# 12,13 A
DDR_A_D8 AN43 DDR_B_D8 AU47
DDR_A_D9 SA_DQ_8 DDR_B_D9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
DDR_A_D10 AU40 DDR_B_D10 BA48
SA_DQ_10 DDR_A_DM[0..7] 13 SB_DQ_10
DDR_A_D11 AT38 AM37 DDR_A_DM0 DDR_B_D11 AY48
SA_DQ_11 SA_DM_0 SB_DQ_11 DDR_B_DM[0..7] 13
DDR_A_D12 AN41 AT41 DDR_A_DM1 DDR_B_D12 AT47 AM47 DDR_B_DM0
DDR_A_D13 SA_DQ_12 SA_DM_1 DDR_A_DM2 DDR_B_D13 SB_DQ_12 SB_DM_0 DDR_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
DDR_A_D14 AU44 AU39 DDR_A_DM3 DDR_B_D14 BA47 BD40 DDR_B_DM2
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
DDR_A_D16 AV39 AY6 DDR_A_DM5 DDR_B_D16 BC46 BG11 DDR_B_DM4
SA_DQ_16 SA_DM_5 SB_DQ_16 SB_DM_4
A
DDR_A_D17 AY44 AT7 DDR_A_DM6 DDR_B_D17 BC44 BA3 DDR_B_DM5
B
BA40 SA_DQ_18 SA_DM_7 AJ5 BG43 SB_DQ_18 SB_DM_6 AP1
DDR_A_D19 BD43 DDR_B_D19 BF43 AK2 DDR_B_DM7
SA_DQ_19 DDR_A_DQS[0..7] 13 SB_DQ_19 SB_DM_7
DDR_A_D20 AV41 AJ44 DDR_A_DQS0 DDR_B_D20 BE45
SA_DQ_20 SA_DQS_0 SB_DQ_20 DDR_B_DQS[0..7] 13
DDR_A_D21 AY43 AT44 DDR_A_DQS1 DDR_B_D21 BC41 AL47 DDR_B_DQS0
SA_DQ_21 SA_DQS_1 SB_DQ_21 SB_DQS_0
MEMORY
DDR_A_D22 BB41 BA43 DDR_A_DQS2 DDR_B_D22 BF40 AV48 DDR_B_DQS1
MEMORY
DDR_A_D23 SA_DQ_22 SA_DQS_2 DDR_A_DQS3 DDR_B_D23 SB_DQ_22 SB_DQS_1 DDR_B_DQS2
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
DDR_A_D24 AY37 AW 12 DDR_A_DQS4 DDR_B_D24 BG38 BG37 DDR_B_DQS3
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
DDR_A_D26 AV37 AU8 DDR_A_DQS6 DDR_B_D26 BH35 BB2 DDR_B_DQS5
AT36 SA_DQ_27 SA_DQS_7 AM7 DDR_A_DQS#[0..7] 13 BG35 SB_DQ_27 SB_DQS_6 AU1
DDR_A_D28 AY38 AJ43 DDR_A_DQS#0 DDR_B_D28 BH40 AN6 DDR_B_DQS7
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 DDR_B_DQS#[0..7] 13
DDR_A_D29 BB38 AT43 DDR_A_DQS#1 DDR_B_D29 BG39 AL46 DDR_B_DQS#0
DDR_A_D30 SA_DQ_29 SA_DQS#_1 DDR_A_DQS#2 DDR_B_D30 SB_DQ_29 SB_DQS#_0 DDR_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
DDR_A_D31 AW 36 BD37 DDR_A_DQS#3 DDR_B_D31 BH34 BH41 DDR_B_DQS#2
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
DDR_A_D33 AU11 BD8 DDR_A_DQS#5 DDR_B_D33 BG12 BG9 DDR_B_DQS#4
BC11 AU9 BH11 BC2
SYSTEM
BA12 AM8 BG8 AT2
SYSTEM
DDR_A_D36 SA_DQ_35 SA_DQS#_7 DDR_B_D36 SB_DQ_35 SB_DQS#_6 DDR_B_DQS#7
AU13 SA_DQ_36 DDR_A_MA[0..14] 12,13 BH12 SB_DQ_36 SB_DQS#_7 AN5
B DDR_A_D37 AV13 BA21 DDR_A_MA0 DDR_B_D37 BF11 B
SA_DQ_37 SA_MA_0 SB_DQ_37 DDR_B_MA[0..14] 12,13
DDR_A_D38 BD12 BC24 DDR_A_MA1 DDR_B_D38 BF8 AV17 DDR_B_MA0
DDR_A_D39 SA_DQ_38 SA_MA_1 DDR_A_MA2 DDR_B_D39 SB_DQ_38 SB_MA_0 DDR_B_MA1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
DDR_A_D40 BB9 BH24 DDR_A_MA3 DDR_B_D40 BC5 BC25 DDR_B_MA2
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
DDR_A_D42 AU10 BA24 DDR_A_MA5 DDR_B_D42 AY3 AW 25 DDR_B_MA4
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
DDR_A_D44 BA11 BG27 DDR_A_MA7 DDR_B_D44 BF6 AU28 DDR_B_MA6
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW 28
DDR_A_D46 AY8 AW 24 DDR_A_MA9 DDR_B_D46 BA1 AT33 DDR_B_MA8
BA6 BC21 BD3 BD33
DDR

AV5 BG26 AV2 BB16
DDR
AV7 SA_DQ_49 SA_MA_12 BH26 AU3 SB_DQ_49 SB_MA_11 AW 33
DDR_A_D50 AT9 BH17 DDR_A_MA13 DDR_B_D50 AR3 AY33 DDR_B_MA12
AN8 SA_DQ_51 SA_MA_14 AY25 AN2 SB_DQ_51 SB_MA_13 BH15
DDR_A_D52 AU5 DDR_B_D52 AY2 AU33 DDR_B_MA14
DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52 SB_MA_14
AU6 SA_DQ_53 AV1 SB_DQ_53
DDR_A_D54 AT5 DDR_B_D54 AP3
AN10 SA_DQ_55 AR1 SB_DQ_55
DDR_A_D56 AM11 DDR_B_D56 AL1
AM5 SA_DQ_57 AL2 SB_DQ_57
DDR_A_D58 AJ9 DDR_B_D58 AJ1
AJ8 SA_DQ_59 AH1 SB_DQ_59
DDR_A_D60 AN12 DDR_B_D60 AM2
AM13 SA_DQ_61 AM3 SB_DQ_61
DDR_A_D62 AJ11 DDR_B_D62 AH3
AJ12 SA_DQ_63 AJ3 SB_DQ_63
CANTIGA_1p0 CANTIGA_1p0
C C
STRAPPING
MCH_CFG[3..20] 7
Low=DMIx2
CFG5 DMI X2 Select High=DMIx4(Default) *PADT20
*PADT20 MCH_CFG3
*PADT26
*PADT26 MCH_CFG4
Low= Enable R144 2 1 *2.21K/F_4 MCH_CFG5
CFG6 iTPM Host Interface High=Disable(Default) R132 2 1 *2.21K/F_4 MCH_CFG6
R140 2 1 *2.21K/F_4 MCH_CFG7
Low= Intel Management Engine Crypto TLS *PADT22
*PADT22 MCH_CFG8
Intel Management Engine Crypto cipher suite with no Confidentiality R130 2 1 *2.21K/F_4 MCH_CFG9
CFG7 Strap High=Intel Management Engine Crypto TLS R138 2 1 *2.21K/F_4 MCH_CFG10
*PADT25
*PADT25 MCH_CFG11
cipher suite with Confidentiality(Default) R127 2 1 *2.21K/F_4 MCH_CFG12
R133 2 1 *2.21K/F_4 MCH_CFG13
Low= Reveise Lane *PADT21
*PADT21 MCH_CFG14
CFG9 PCI Express Graphic Lane High=Normal operation *PADT19 MCH_CFG15
R131 2 1 *2.21K/F_4 MCH_CFG16
Low= Enable +3.3V MCH_CFG17
*PADT24
*PADT24
CFG10 PCIe Loopback Enable High=Disable(Default) *PADT27
*PADT27 MCH_CFG18
R146 2 1 *4.02K/F MCH_CFG19
Low=Dynamic ODT Disable R145 2 1 2.21K/F MCH_CFG20
CFG16 FSB Dynamic ODT High=Dynamic ODT Enable(default).
Low=Normal(default).
D CFG19 DMI Lane Reversal High=Lane Reversed D
Digital Display Port(SDVO/DP/iHDMI) Low=Only DP or inly PCIe is operational (defaults)

CFG20 and PCIe Concurrent Operation. High=DP and PCIe x1 are operating simultaneously.
00=Reserved. PROJECT : AJ2
10=XOR Mode Enabled.
CFG13 CFG12 XOR / ALLZ / Clock Un-gating 01=All-Z Mode Enabled.
11=Normal Operation (Default).
Custom Cantiga (DDR2,STRAPPING) 1A
1 2 3 4 5 6 7 8
5 4 3 2 1
+1.8V_SUS
AP33
AN33
BH32
BG32
U21G
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
W 28
V28
W 26
V26
+1.05V_AXG
U21F 09
VCC_SM_4 VCC_AXG_NCTF_4
BF32 VCC_SM_5 VCC_AXG_NCTF_5 W 25 AG34 VCC_1
BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25 AC34 VCC_2
BC32 VCC_SM_7 VCC_AXG_NCTF_7 W 24 AB34 VCC_3
BB32 V24 +1.05V_VCCP AA34
VCC_SM_8 VCC_AXG_NCTF_8 VCC_4
BA32 VCC_SM_9 VCC_AXG_NCTF_9 W 23 Y34 VCC_5
D
AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23 V34 VCC_6 D
AW 32 VCC_SM_11 VCC_AXG_NCTF_11 AM21 U34 VCC_7
AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21 AM33 VCC_8
1
AU32 VCC_SM_13 VCC_AXG_NCTF_13 AK21 AK33 VCC_9
1
AT32 W 21 + C77 AJ33
VCC_SM_14 VCC_AXG_NCTF_14 330U/2.5V_7343 C192 C178 C191 C195 VCC_10
AR32 V21 AG33
POWER
VCC_SM_15 VCC_AXG_NCTF_15 22U/4V_8 0.22U/10V 0.22U/10V 0.1U/16V/X7R_4 VCC_11
AP32 U21 AF33
2
AN32 VCC_SM_17 VCC_AXG_NCTF_17 AM20
BH31 AK20 AE33
VCC CORE
BG31 VCC_SM_19 VCC_AXG_NCTF_19 W 20 Layout Note: Layout Note: AC33 VCC_14
BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20 Place close to GMCH. Inside GMCH cavity. AA33 VCC_15
BG30 VCC_SM_21 VCC_AXG_NCTF_21 AM19 Y33 VCC_16
BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19 W 33 VCC_17
BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19 V33 VCC_18
BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19 U33 VCC_19
BD29 AH19 AH28
VCC SM
BC29 VCC_SM_26 VCC_AXG_NCTF_26 AG19 AF28 VCC_21
BB29 VCC_SM_27 VCC_AXG_NCTF_27 AF19 AC28 VCC_22
BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19 AA28 VCC_23
AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19 AJ26 VCC_24
AW 29 VCC_SM_30 VCC_AXG_NCTF_30 AA19 AG26 VCC_25
AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19 AE26 VCC_26
AU29 VCC_SM_32 VCC_AXG_NCTF_32 W 19 AC26 VCC_27
AT29 VCC_SM_33 VCC_AXG_NCTF_33 V19 AH25 VCC_28
AR29 U19 +1.05V_AXG AG25
VCC_SM_34 VCC_AXG_NCTF_34 +1.05V_VCCP VCC_29
AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17 AF25 VCC_30
VCC_AXG_NCTF_36 AK17 AG24 VCC_31
BA36 AH17 AJ23 +1.05V_VCCP
VCC_SM_36/NC VCC_AXG_NCTF_37 R87 *I@0_8 VCC_32
BB24 AG17 AH23
POWER
VCC_SM_37/NC VCC_AXG_NCTF_38 VCC_33
BD16 VCC_SM_38/NC VCC_AXG_NCTF_39 AF17 AF23 VCC_34
C BB21 AE17 R88 *I@0_8 E@0_6 E@0_6 R152 0_4 AM32 C
VCC_SM_39/NC VCC_AXG_NCTF_40 VCC_NCTF_1
AW 16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17 1 2 T32 VCC_35 VCC_NCTF_2 AL32
AW 13 AB17 R91 R93 AK32
VCC_SM_41/NC VCC_AXG_NCTF_42 VCC_NCTF_3
AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17 VCC_NCTF_4 AJ32
VCC_AXG_NCTF_44 W 17 VCC_NCTF_5 AH32
+1.05V_AXG
VCC GFX NCTF
VCC_AXG_NCTF_45 V17 VCC_NCTF_6 AG32

VCC_AXG_NCTF_46 AM16 Cavity Capactors VCC_NCTF_7 AE32
Y26 VCC_AXG_1 VCC_AXG_NCTF_47 AL16 VCC_NCTF_8 AC32
AE25 AK16 +1.05V_AXG AA32
VCC_AXG_2 VCC_AXG_NCTF_48 VCC_NCTF_9
AB25 VCC_AXG_3 VCC_AXG_NCTF_49 AJ16 VCC_NCTF_10 Y32
AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16 VCC_NCTF_11 W 32
AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16 VCC_NCTF_12 U32
AC24 VCC_AXG_6 VCC_AXG_NCTF_52 AF16 VCC_NCTF_13 AM30
1
AA24 VCC_AXG_7 VCC_AXG_NCTF_53 AE16 VCC_NCTF_14 AL30
1
Y24 AC16 + + AK30
VCC_AXG_8 VCC_AXG_NCTF_54 C75 C76 C152 C139 C156 C165 C145 C167 VCC_NCTF_15
AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16 VCC_NCTF_16 AH30
AC23 AA16 *I@330U/2.5V_7343 *I@1U/10V/X5R_6 *I@22U/4V_8 *I@0.1U/16V/X7R_4 AG30
2
VCC_AXG_10 VCC_AXG_NCTF_56 *I@330U/2.5V_7343 *I@0.47U/10V *I@10U/6.3V/X5R_6 *I@0.1U/16V/X7R_4 VCC_NCTF_17
AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16 VCC_NCTF_18 AF30
AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W 16 VCC_NCTF_19 AE30
AJ21 VCC_AXG_13 VCC_AXG_NCTF_59 V16 VCC_NCTF_20 AC30
AG21 VCC_AXG_14 VCC_AXG_NCTF_60 U16 Place close to the MCH VCC_NCTF_21 AB30
AE21 VCC_AXG_15 VCC_NCTF_22 AA30
AC21 VCC_AXG_16 VCC_NCTF_23 Y30
AA21 W 30
VCC NCTF
VCC_AXG_17 VCC_NCTF_24
Y21 VCC_AXG_18 VCC_NCTF_25 V30
AH20 VCC_AXG_19 VCC_NCTF_26 U30
AF20 VCC_AXG_20 VCC_NCTF_27 AL29
AE20 +1.8V_SUS R174 AK29
AC20
VCC_AXG_21 0.002/F VCC_SM VCC_NCTF_28
AJ29
B
AB20 VCC_AXG_23 1 2 VCC_NCTF_30 AH29 B
AA20 VCC_AXG_24 VCC_NCTF_31 AG29
1
T17 VCC_AXG_25 VCC_NCTF_32 AE29
1
1
T16 + AC29
VCC_AXG_26 C196 C198 C186 C185 VCC_NCTF_33
AM15 VCC_AXG_27 VCC_NCTF_34 AA29
AL15 0.1U/16V/X7R_4 330U/6.3V 22U/4V_8 22U/4V_8 Y29
2
2
AE15 VCC_AXG_29 VCC_NCTF_36 W 29
AJ15 VCC_AXG_30 VCC_NCTF_37 V29
AH15 VCC_AXG_31
Layout Note: VCC_NCTF_38 AL28
AG15 VCC_AXG_32 Place C411 where LVDS VCC_NCTF_39 AK28
AF15 VCC_AXG_33 and DDR2 taps. Layout Note: VCC_NCTF_40 AL26
AB15 VCC_AXG_34 Place on the edge. VCC_NCTF_41 AK26
AA15 AK25
VCC GFX
Y15 VCC_AXG_36 VCC_NCTF_43 AK24
V15 VCC_AXG_37 VCC_NCTF_44 AK23
U15 VCC_AXG_38
AN14 VCC_AXG_39
AM14 VCC_AXG_40
U14 AV44 VCCSM_LF1
VCC SM LF
VCC_AXG_41 VCC_SM_LF1 VCCSM_LF2

T14 VCC_AXG_42 VCC_SM_LF2 BA37
AM40 VCCSM_LF3
VCC_SM_LF3 VCCSM_LF4 CANTIGA_1p0
VCC_SM_LF4 AV21
AY5 VCCSM_LF5
VCC_SM_LF5 VCCSM_LF6
VCC_SM_LF6 AM10
BB13 VCCSM_LF7
VCC_SM_LF7
1
AJ14 C130 C123 C104 C157 C201 C197 C202

VCC_AXG_SENSE 0.1U/16V/X7R_4 0.1U/16V/X7R_4
0.22U/10V 0.22U/10V 0.47U/10V 1U/10V/X5R_6 1U/10V/X5R_6
AH14
2
VSS_AXG_SENSE
A A
CANTIGA_1p0 PROJECT : AJ2

Custom Cantiga (VCC,NCTF) 1A

5 4 3 2 1
5 4 3 2 1
+1.05V_VCCP
+VCCA_DPLLA
+3.3V
20 mil
1
L48
2
*I@BLM18PG181SN1_6
C460
73mA
+VCCA_CRTDAC
C459 R411
U21H 852mA +VCCP_GMCH
10 +1.05V_VCCP
20 mil E@0_4 R81 0_8
VTT_1 U13
1
L50 *I@10uH/100MA_8 int int des T13
VTT_2 C399 C387 C74 C392 + C79
B27 VCCA_CRT_DAC_1 VTT_3 U12
1
R419 *I@0.1U/16V/X7R_4 *I@0.01U/16V/X7R_4 A26 T12 .47U/6.3V_4 2.2U/6.3V/X5R_6 4.7U/6.3V_6 4.7U/6.3V_6 330U/2.5V_7343
C497 C479 E@0_4 VCCA_CRT_DAC_2 VTT_4
+ 20 mil 2.68mA U11
2
*I@470U/4V_ESR15_7343 *I@0.1U/16V/X7R_4 VTT_5
D des VTT_6 T11 D
CRT
+3.3V R409 *I@0_6 +VCC_TVBG A25 U10
2
VCCA_DAC_BG VTT_7
B25 VSSA_DAC_BG VTT_8 T10
C454 C455 R408 U9
+VCCA_DPLLB *I@0.01U/16V/X7R_4 E@0_4 VTT_9
20 mil *I@0.1U/16V/X7R_4 VTT_10 T9
int int des VTT_11 U8
L53 *I@10uH/100MA_8 +VCCA_DPLLA F47 T8
VCCA_DPLLA VTT_12
VTT
AB total 64.8mA VTT_13 U7
1
R420 +VCCA_DPLLB L48 T7 20 mil 20 mil

C496 C486 E@0_4 VCCA_DPLLB VTT_14 +VCC_AXF R403 0_6
+
VTT_15 U6 +1.05V_VCCP
PLL
*I@470U/4V_ESR15_7343 *I@0.1U/16V/X7R_4 des 24mA +VCCA_HPLL AD1 T6
VCCA_HPLL VTT_16
U5
2
+VCCA_MPLL VTT_17
139.2mA AE1 VCCA_MPLL VTT_18 T5
V3 C444 C442
VTT_19 1U/6.3V/X5R_4 10U/6.3V/X5R_8
13.2mA VTT_20 U3
+VCC_TX_LVDS J48 V2
VCCA_LVDS VTT_21
A LVDS
VTT_22 U2
For Teenah C492 J47 T2
+1.05V_VCCP *I@1000P/50V/X7R_4 VSSA_LVDS VTT_23 +1.8V_SUS
+VCCA_HPLL R422 *0_6
20 mil VTT_24 V1
20 mil +3.3V VTT_25 U1
+VCC_SM_CK L21 1uH/300mA_8
414uA
L47 BLM11A121S_6 +1.5V R421 0_6 +VCC_PEG_BG AD48 VCCA_PEG_BG
1uH+-20%_300mA
For Cantiga C494
A PEG
C388 C401 0.1U/16V/X7R_4
50mA R107
4.7U/6.3V_6 0.1U/16V/X7R_4 1/F_6
C489 0.1U/16V/X7R_4
+VCCA_PEG_PLL AA48 C158 C148
+1.05V_VCCP VCCA_PEG_PLL 10U/6.3V/X5R_8 0.1U/16V/X7R_4
480mA +VCC_SM_CK_L
+VCCA_MPLL R96 0_6 +V1.05M_A_SM
20 mil 80 mil AR20 VCCA_SM_1 C137
C AP20 VCCA_SM_2
C
L46 BLM11A121S_6 C121 C134 C111 AN20 10U/6.3V/X5R_8
+V1.05M_MCH_PLL R386 0.5/F_6 + C96

10U/6.3V/X5R_8
10U/6.3V/X5R_8
10U/6.3V/X5R_8 AR17
AP17
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
POWER
+1.8V_SUS
AN17 VCCA_SM_6 1uH+-20%_300mA
220U/2.5V_3528 AT16 20 mil
VCCA_SM_7
A SM
C147 C155 C146 AR16 +VCC_TX_LVDS L55
C394 C402 10U/6.3V/X5R_8
4.7U/6.3V_6 1U/6.3V/X5R_4 AP16 VCCA_SM_8
VCCA_SM_9 int
1
10U/6.3V/X5R_8 0.1U/16V/X7R_4 R426 C493 C491 C500 *I@1uH/300mA_8
des E@0_4
2
*I@10U/6.3V/X5R_8
+1.05V_VCCP 24mA *I@1000P/50V/X7R_4 *I@10U/6.3V/X5R_8
R147 0_6 +VCCA_SM_CK AP28 int

VCCA_SM_CK_1
AN28 VCCA_SM_CK_2 VCC_AXF_1 B22
AXF
C153 C164 C170 C176 AP25 B21
2.2U/6.3V/X5R_6
10U/6.3V/X5R_8
10U/6.3V/X5R_8
0.1U/16V/X7R_4 VCCA_SM_CK_3 VCC_AXF_2 +1.05V_VCCP
AN25 VCCA_SM_CK_4 VCC_AXF_3 A21
+1.5V AN24 VCCA_SM_CK_5
2
AM28 VCCA_SM_CK_NCTF_1
A CK
AM26 119.85mA D23
VCCA_SM_CK_NCTF_2
40 mil AM25 VCCA_SM_CK_NCTF_3 CH501H-40PT
15 mil AL25 VCCA_SM_CK_NCTF_4 VCC_SM_CK_1 BF21
SM CK
AM24 BH20
1
R142 0_6 +VCCD_TVDAC_R VCCA_SM_CK_NCTF_5 VCC_SM_CK_2
int 87.78mA AL24 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3 BG20
+3V_VCC_HV +3.3V
20 mil R406 *I@0_6 20 mil AM23 BF20 R417
+3.3V +VCC_TVDACA_R VCCA_SM_CK_NCTF_7 VCC_SM_CK_4 10_4
20 mil C162 C168
AL23 VCCA_SM_CK_NCTF_8
0.1U/16V/X7R_4 118.8mA R416 0_6
0.01U/16V/X7R_4 K47 20 mil
B
C447 C449 R407 VCC_TX_LVDS +3V_VCC_HV B
20 mil L22
*10U/6.3V/X5R_8 *0.1U/16V/X7R_4 E@0_4
B24 VCCA_TV_DAC_1 C477
20 mil A24 C35
TV
+VCCQ_QDAC_R VCCA_TV_DAC_2 VCC_HV_1 0.1U/16V/X7R_4
des VCC_HV_2 B35 105.3mA
HV
50mA VCC_HV_3 A35
BLM18PG181SN1 20 mil
C169 C166 C172 C175 R415 *I@0_6 +VCC_HDA A32 C476
HDA
+1.5V VCC_HDA
.022U/16V_4 1U/6.3V/X5R_4 20 mil int V48 0.1U/16V/X7R_4
0.1U/16V/X7R_4 C469 R414 VCC_PEG_1
VCC_PEG_2 U48
+VCC_PEG
Modify for C-TEST +1.05V_VCCP
PEG
0.01U/16V/X7R_4 *I@0.1U/16V/X7R_4 E@0_4 56.87mA V47
VCC_PEG_3
int des U47 1782mA
D TV/CRT
+VCCD_TVDAC_R M25 VCC_PEG_4 R559 0_12
VCCD_TVDAC VCC_PEG_5 U46
48.363mA 90 mil
1
+VCCQ_QDAC_R L28 VCCD_QDAC +VCC_RXR_DMI
20 mil 157.2mA AH48 + C509
+VCCA_PEG_PLL +V1.05M_MCH_PLL VCC_DMI_1 C490 C499
AF1 VCCD_HPLL VCC_DMI_2 AF48
+1.05V_VCCP
DMI
50mA AH47 4.7U/6.3V_6 220U/2.5V_7343 10U/6.3V/X5R_8
2
C396 +VCCA_PEG_PLL VCC_DMI_3
10mil AA47 VCCD_PEG_PLL VCC_DMI_4 AG47
L54 BLM18PG181SN1 0.1U/16V/X7R_4 20 mil
C495 +1.05V_VCCP
20 mil 20 mil 60.31mA
0.1U/16V/X7R_4 M38 456mA
LVDS
VCCD_LVDS_1 +VTTLF1 R560 0_12
L37 VCCD_LVDS_2 VTTLF1 A8
R425 20 mil L1 +VTTLF2 90 mil
VTTLF
VTTLF2
+V1.05S_PEGPLL_FB
1/F_6 +1.8V_SUS R184 *I@0_6 +VCCD_LVDS AB2 +VTTLF3

VTTLF3
20 mil int
C498 EC C-7 /7 Del L56,L57 Add
R171 0.1U/16V/X7R_4
C200 C204 E@0_4 CANTIGA_1p0 R560,R559 1206 0 ohm.
*I@1U/6.3V/X5R_4 *I@10U/6.3V/X5R_8 des
int int +VTTLF1
A +VTTLF2 A
+VTTLF3
C504
10U/6.3V/X5R_8 C395 C400 C430
.47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 PROJECT : AJ2

Custom Cantiga (POWER) 1A
5 4 3 2 1
5 4 3 2 1
AU48
AR48
U21I
VSS_1 VSS_100 AM36

AE36
BG21
L12
AW 21
U21J
VSS_199
VSS_200
VSS_297
VSS_298
AH8
Y8
L8
11
VSS_2 VSS_101 VSS_201 VSS_299
AL48 VSS_3 VSS_102 P36 AU21 VSS_202 VSS_300 E8
BB47 VSS_4 VSS_103 L36 AP21 VSS_203 VSS_301 B8
AW 47 VSS_5 VSS_104 J36 AN21 VSS_204 VSS_302 AY7
AN47 VSS_6 VSS_105 F36 AH21 VSS_205 VSS_303 AU7
AJ47 VSS_7 VSS_106 B36 AF21 VSS_206 VSS_304 AN7
D
AF47 VSS_8 VSS_107 AH35 AB21 VSS_207 VSS_305 AJ7 D
AD47 VSS_9 VSS_108 AA35 R21 VSS_208 VSS_306 AE7
AB47 VSS_10 VSS_109 Y35 M21 VSS_209 VSS_307 AA7
Y47 VSS_11 VSS_110 U35 J21 VSS_210 VSS_308 N7
T47 VSS_12 VSS_111 T35 G21 VSS_211 VSS_309 J7
N47 VSS_13 VSS_112 BF34 BC20 VSS_212 VSS_310 BG6
L47 VSS_14 VSS_113 AM34 BA20 VSS_213 VSS_311 BD6
G47 VSS_15 VSS_114 AJ34 AW 20 VSS_214 VSS_312 AV6
BD46 VSS_16 VSS_115 AF34 AT20 VSS_215 VSS_313 AT6
BA46 VSS_17 VSS_116 AE34 AJ20 VSS_216 VSS_314 AM6
AY46 VSS_18 VSS_117 W 34 AG20 VSS_217 VSS_315 M6
AV46 VSS_19 VSS_118 B34 Y20 VSS_218 VSS_316 C6
AR46 VSS_20 VSS_119 A34 N20 VSS_219 VSS_317 BA5
AM46 VSS_21 VSS_120 BG33 K20 VSS_220 VSS_318 AH5
V46 VSS_22 VSS_121 BC33 F20 VSS_221 VSS_319 AD5
R46 VSS_23 VSS_122 BA33 C20 VSS_222 VSS_320 Y5
P46 VSS_24 VSS_123 AV33 A20 VSS_223 VSS_321 L5
H46 VSS_25 VSS_124 AR33 BG19 VSS_224 VSS_322 J5
F46 VSS_26 VSS_125 AL33 A18 VSS_225 VSS_323 H5
BF44 VSS_27 VSS_126 AH33 BG17 VSS_226 VSS_324 F5
AH44 VSS_28 VSS_127 AB33 BC17 VSS_227 VSS_325 BE4
AD44 VSS_29 VSS_128 P33 AW 17 VSS_228
AA44 L33 AT17 BC3
Y44
U44
VSS_30
VSS_31
VSS_32
VSS_129
VSS_130
VSS_131
H33
N32
R17
M17
VSS_229
VSS_230
VSS_231
VSS VSS_327
VSS_328
VSS_329
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
F32
C32
C17
VSS_232
VSS_233
VSS_330
VSS_331
VSS_332
P3
F3
BC43 VSS_36 VSS_135 A31 BA16 VSS_235 VSS_333 BA2
AV43 VSS_37 VSS_136 AN29 VSS_334 AW 2
C AU43 VSS_38 VSS_137 T29 AU16 VSS_237 VSS_335 AU2 C
AM43 VSS_39 VSS_138 N29 AN16 VSS_238 VSS_336 AR2
J43 VSS_40 VSS_139 K29 N16 VSS_239 VSS_337 AP2
C43 VSS_41 VSS_140 H29 K16 VSS_240 VSS_338 AJ2
BG42 VSS_42 VSS_141 F29 G16 VSS_241 VSS_339 AH2
AY42 VSS_43 VSS_142 A29 E16 VSS_242 VSS_340 AF2
AT42 VSS_44 VSS_143 BG28 BG15 VSS_243 VSS_341 AE2
AN42 VSS_45 VSS_144 BD28 AC15 VSS_244 VSS_342 AD2
AJ42 VSS_46 VSS_145 BA28 W 15 VSS_245 VSS_343 AC2
AE42 VSS_47 VSS_146 AV28 A15 VSS_246 VSS_344 Y2
N42 VSS_48 VSS_147 AT28 BG14 VSS_247 VSS_345 M2
L42 VSS_49 VSS_148 AR28 AA14 VSS_248 VSS_346 K2
BD41 VSS_50 VSS_149 AJ28 C14 VSS_249 VSS_347 AM1
AU41 VSS_51 VSS_150 AG28 BG13 VSS_250 VSS_348 AA1
AM41 VSS_52 VSS_151 AE28 BC13 VSS_251 VSS_349 P1
AH41 VSS_53 VSS_152 AB28 BA13 VSS_252 VSS_350 H1
AD41 VSS_54 VSS_153 Y28
AA41 VSS_55 VSS_154 P28 VSS_351 U24
Y41 VSS_56 VSS_155 K28 AN13 VSS_255 VSS_352 U28
U41 VSS_57 VSS_156 H28 AJ13 VSS_256 VSS_353 U25
T41 VSS_58 VSS_157 F28 AE13 VSS_257 VSS_354 U29
M41 VSS_59 VSS_158 C28 N13 VSS_258
G41 VSS_60 VSS_159 BF26 L13 VSS_259
B41 VSS_61 VSS_160 AH26 G13 VSS_260 VSS_NCTF_1 AF32
BG40 VSS_62 VSS_161 AF26 E13 VSS_261 VSS_NCTF_2 AB32
BB40 VSS_63 VSS_162 AB26 BF12 VSS_262 VSS_NCTF_3 V32
AV40 VSS_64 VSS_163 AA26 AV12 VSS_263 VSS_NCTF_4 AJ30
AN40 VSS_65 VSS_164 C26 AT12 VSS_264 VSS_NCTF_5 AM29
H40 B26 AM12 AF29
VSS NCTF
VSS_66 VSS_165 VSS_265 VSS_NCTF_6
B
E40 VSS_67 VSS_166 BH25 AA12 VSS_266 VSS_NCTF_7 AB29 B
AT39 VSS_68 VSS_167 BD25 J12 VSS_267 VSS_NCTF_8 U26
AM39 VSS_69 VSS_168 BB25 A12 VSS_268 VSS_NCTF_9 U23
AJ39 VSS_70 VSS_169 AV25 BD11 VSS_269 VSS_NCTF_10 AL20
AE39 VSS_71 VSS_170 AR25 BB11 VSS_270 VSS_NCTF_11 V20
N39 VSS_72 VSS_171 AJ25 AY11 VSS_271 VSS_NCTF_12 AC19
L39 VSS_73 VSS_172 AC25 AN11 VSS_272 VSS_NCTF_13 AL17
B39 VSS_74 VSS_173 Y25 AH11 VSS_273 VSS_NCTF_14 AJ17
BH38 VSS_75 VSS_174 N25 VSS_NCTF_15 AA17
BC38 VSS_76 VSS_175 L25 Y11 VSS_275 VSS_NCTF_16 U17
BA38 VSS_77 VSS_176 J25 N11 VSS_276
AU38 G25 G11 BH48
VSS SCB
VSS_78 VSS_177 VSS_277 VSS_SCB_1
AH38 VSS_79 VSS_178 E25 C11 VSS_278 VSS_SCB_2 BH1
AD38 VSS_80 VSS_179 BF24 BG10 VSS_279 VSS_SCB_3 A48
AA38 VSS_81 VSS_180 AD12 AV10 VSS_280 VSS_SCB_4 C1
Y38 VSS_82 VSS_181 AY24 AT10 VSS_281 VSS_SCB_5 B2
U38 VSS_83 VSS_182 AT24 AJ10 VSS_282 VSS_SCB_6 A3
T38 VSS_84 VSS_183 AJ24 AE10 VSS_283
J38 VSS_85 VSS_184 AH24 AA10 VSS_284 NC_26 E1
F38 VSS_86 VSS_185 AF24 M10 VSS_285 NC_27 D2
C38 VSS_87 VSS_186 AB24 BF9 VSS_286 NC_28 C3
BF37 VSS_88 VSS_187 R24 BC9 VSS_287 NC_29 B4
BB37 VSS_89 VSS_188 L24 AN9 VSS_288 NC_30 A5
AW 37 VSS_90 VSS_189 K24 AM9 VSS_289 NC_31 A6
AT37 VSS_91 VSS_190 J24 AD9 VSS_290 NC_32 A43
AN37 G24 G9 A44
NC
VSS_92 VSS_191 VSS_291 NC_33
AJ37 VSS_93 VSS_192 F24 B9 VSS_292 NC_34 B45
H37 VSS_94 VSS_193 E24 BH8 VSS_293 NC_35 C46
C37 VSS_95 VSS_194 BH23 BB8 VSS_294 NC_36 D47
BG36 VSS_96 VSS_195 AG23 AV8 VSS_295 NC_37 B47
A BD36 VSS_97 VSS_196 Y23 AT8 VSS_296 NC_38 A46 A
AK15 VSS_98 VSS_197 B23 NC_39 F48
AU36 VSS_99 VSS_198 A23 NC_40 E48
NC_41 C48
NC_42 B48
CANTIGA_1p0
CANTIGA_1p0 PROJECT : AJ2

Custom Cantiga (VSS) 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
12
DDR2 Dual channel A/B PU
DDRII A CHANNEL
+0.9V_DDR_VTT Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
C141 C136 C405 C408 C161 C448 C416 C87 C160 C109 C100 C112 C94
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
A A
+0.9V_DDR_VTT
DDRII B CHANNEL
C90 C106 C131 C118 C154 C97 C83 C124 C89 C451 C86 C150 C133
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
+0.9V_DDR_VTT
+0.9V_DDR_VTT 33,36
8,13 DDR_A_MA[0..13] DDR_B_MA[0..13] 8,13
DDR_A_MA11 RP47 1 2 56X2 RP16 1 2 56X2 DDR_B_MA11

DDR_A_MA7 3 4 3 4 DDR_B_MA7
B DDR_A_MA6 RP46 DDR_B_MA6 B

1 2 56X2 RP11 1 2 56X2
SWAP
8,13 DDR_A_BS1 RP44 1 2 56X2 RP5 1 2 56X2 DDR_B_BS1 8,13

8,13 DDR_A_RAS# 3 4 3 4 DDR_B_RAS# 8,13
RP43 1 2 56X2 RP2 1 2 56X2

7,13 M_ODT0 M_ODT2 7,13
8,13 DDR_A_BS2 RP17 1 2 56X2 RP13 1 2 56X2 DDR_B_MA5

Please these resistor DDR_A_MA9 RP15 1 2 56X2 RP14 1 2 56X2 DDR_B_MA9 Please these resistor
closely DIMMA,all closely DIMMB,all
trace length<750 mil. trace length<750 mil.
DDR_A_BS0 RP6 1 2 56X2 RP7 1 2 56X2 DDR_B_MA10

8,13 DDR_A_BS0 DDR_A_MA10 3 4 3 4 DDR_B_BS0 8,13
C C
RP4 1 2 56X2 RP3 1 2 56X2

8,13 DDR_A_WE# DDR_B_WE# 8,13
8,13 DDR_A_CAS# 3 4 3 4 DDR_B_CAS# 8,13
SWAP
R97 56_4 R95 56_4

7,13 M_ODT1 DDR_A_MA1 M_ODT3 7,13
R102 56_4 R105 56_4
DDR_B_BS2 8,13
R396 56_4 R101 56_4
7,13 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 7,13
R100 56_4 R98 56_4
7,13 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 7,13
R123 56_4 R109 56_4
7,13 DDR_CKE0_DIMMA DDR_CKE3_DIMMB 7,13
R405 56_4 R126 56_4
7,13 DDR_CKE1_DIMMA DDR_CKE4_DIMMB 7,13
R404 56_4 R125 56_4
8,13 DDR_A_MA14 DDR_B_MA14 8,13
DDR2 Thermal Sensor SO-DIMM 0 & 1

+3.3V Uninstall
30 mil
+3.3V 2,5,7,8,10,13,14,15,16,17,18,19,20,21,22,23,24,26,27,30,31,32,33
R48 C42
*220_6 *0.1U/16V/X7R_4
U4 20 mil
D D
1
8 1 LM86_3V
2,13,26 CGCLK_SMB_M SCLK VCC DDR_THERMDA *MMBT3904
2
7 2 Q14
2,13,26 CGDAT_SMB_M SDA DXP
3
7,13 PM_EXTTS#0 6 3
ALERT# DXN
R62 *0_4 4 5 DDR_THERMDC PROJECT : AJ2
7 PM_EXTTS#1 OVERT# GND
*LM86CIMM
Custom DDR RES. ARRAY 1A
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
A is required to route to Top

DDR2 Dual channel A/B CONN V_DDR_MCH_REF
13
DDR_A_DM[0..7] 8 DDR_B_DM[0..7] 8
SoDIMM for AMT to DDR_A_D[0..63] 8 DDR_B_D[0..63] 8
V_DDR_MCH_REF +1.8V_SUS
DDR_A_DQS[0..7] 8 V_DDR_MCH_REF 7,36 DDR_B_DQS[0..7] 8
function.This will need to +1.8V_SUS
DDR_A_DQS#[0..7] 8 DDR_B_DQS#[0..7] 8
change for M08 DDR_A_MA[0..13] 8,12 DDR_B_MA[0..13] 8,12
CN23 +1.8V_SUS CN24 +1.8V_SUS
1 2 1 2
VREF VSS46 DDR_A_D5 VREF VSS46 DDR_B_D4 +1.8V_SUS
3 4 3 4
DDR_A_D0 VSS47 DQ4 DDR_A_D1 DDR_B_D0 VSS47 DQ4 DDR_B_D1
5 DQ0 DQ5 6 5 DQ0 DQ5 6 Place these Caps near So-Dimm1.
DDR_A_D4 7 8 DDR_B_D5 7 8
DQ1 VSS15 DDR_A_DM0 DQ1 VSS15 DDR_B_DM0
9 10 9 10
DDR_A_DQS#0 VSS37 DM0 DDR_B_DQS#0 VSS37 DM0
11 12 11 12
DDR_A_DQS0 DQS#0 VSS5 DDR_A_D7 DDR_B_DQS0 DQS#0 VSS5 DDR_B_D7 C144 C103 C101 C113 C122
13 DQS0 DQ6 14 13 DQS0 DQ6 14
15 16 DDR_A_D2 15 16 DDR_B_D6
DDR_A_D6 VSS48 DQ7 DDR_B_D3 VSS48 DQ7
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
17 18 17 18 C182 +
A DDR_A_D3 DQ2 VSS16 DDR_A_D8 DDR_B_D2 DQ2 VSS16 DDR_B_D12 A
19 DQ3 DQ12 20 19 DQ3 DQ12 20
DDR_A_D9 DDR_B_D13
*330U/2.5V_7343
21 VSS38 DQ13 22 21 VSS38 DQ13 22
DDR_A_D12 23 24 DDR_B_D9 23 24
DDR_A_D13 DQ8 VSS17 DDR_A_DM1 DDR_B_D8 DQ8 VSS17 DDR_B_DM1
25 26 25 26
DQ9 DM1 DQ9 DM1
27 28 27 28
DDR_A_DQS#1 VSS49 VSS53 DDR_B_DQS#1 VSS49 VSS53
29 DQS#1 CK0 30 M_CLK_DDR0 7 29 DQS#1 CK0 30 M_CLK_DDR3 7
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32
DQS1 CK0# M_CLK_DDR#0 7 DQS1 CK0# M_CLK_DDR#3 7
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D14 35 36 DDR_A_D15 DDR_B_D10 35 36 DDR_B_D11
DDR_A_D11 DQ10 DQ14 DDR_A_D10 DDR_B_D14 DQ10 DQ14 DDR_B_D15
37 38 37 38
DQ11 DQ15 DQ11 DQ15 +1.8V_SUS
39 VSS50 VSS54 40 39 VSS50 VSS54 40
41 VSS18 VSS20 42 41 VSS18 VSS20 42

DDR_A_D17 DQ16 DQ20 DDR_A_D16 DDR_B_D20 DQ16 DQ20 DDR_B_D16 C127 C95 C151 C107
45 46 45 46
DQ17 DQ21 DQ17 DQ21
47 48 47 48
VSS1 VSS6 VSS1 VSS6
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
DDR_A_DQS#2 49 50 PM_EXTTS#0 DDR_B_DQS#2 49 50
DQS#2 NC3 DQS#2 NC3 PM_EXTTS#0 7,12
DDR_A_DQS2 51 52 DDR_A_DM2 DDR_B_DQS2 51 52 DDR_B_DM2
DQS2 DM2 DQS2 DM2
53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D18 55 DDR_A_D22 DDR_B_D22 DDR_B_D19
PC4800 DDR2 SDRAM
56 55
PC4800 DDR2 SDRAM

56
57 58 57 58
DQ19 DQ23 DQ19 DQ23
59 60 59 60
DDR_A_D28 VSS22 VSS24 DDR_A_D24 DDR_B_D28 VSS22 VSS24 DDR_B_D24
61 DQ24 DQ28 62 61 DQ24 DQ28 62
DQ25 DQ29 DQ25 DQ29
65 66 65 66
DDR_A_DM3 VSS23 VSS25 DDR_A_DQS#3 DDR_B_DM3 VSS23 VSS25 DDR_B_DQS#3
SO-DIMM (200P)
SO-DIMM (200P)
67 DM3 DQS#3 68 67 DM3 DQS#3 68
69 70 DDR_A_DQS3 69 70 DDR_B_DQS3 V_DDR_MCH_REF +3.3V
NC4 DQS3 NC4 DQS3
71 72 71 72
73 DQ26 DQ30 74 73 DQ26 DQ30 74
DQ27 DQ31 DQ27 DQ31 C505 C508 C47 C48
77 78 77 78
VSS4 VSS8 VSS4 VSS8
7,12 DDR_CKE0_DIMMA 79 80 DDR_CKE1_DIMMA 7,12 7,12 DDR_CKE3_DIMMB 79 80 DDR_CKE4_DIMMB 7,12
B CKE0 CKE1 CKE0 CKE1 B
0.1U/16V/X7R_4
0.1U/16V/X7R_4
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 84 83 84
NC1 A15 NC1 A15
8,12 DDR_A_BS2 85 86 DDR_A_MA14 8,12 8,12 DDR_B_BS2 85 86 DDR_B_MA14 8,12
A16_BA2 A14 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7 DDR_B_MA9 A12 A11 DDR_B_MA7
91 92 91 92
93 A8 A6 94 93 A8 A6 94
95 96 95 96
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4
97 A5 A4 98 97 A5 A4 98
DDR_A_MA3 99 100 DDR_A_MA2 DDR_B_MA3 99 100 DDR_B_MA2
101 A1 A0 102 101 A1 A0 102
103 104 103 104
DDR_A_MA10 VDD10 VDD12 DDR_B_MA10 VDD10 VDD12
105 A10/AP BA1 106 DDR_A_BS1 8,12 105 A10/AP BA1 106 DDR_B_BS1 8,12
8,12 DDR_A_BS0 107 108 DDR_A_RAS# 8,12 8,12 DDR_B_BS0 107 108 DDR_B_RAS# 8,12
BA0 RAS# BA0 RAS# +1.8V_SUS
8,12 DDR_A_WE# 109 110 DDR_CS0_DIMMA# 7,12 8,12 DDR_B_WE# 109 110 DDR_CS2_DIMMB# 7,12
WE# S0# WE# S0#
111
VDD2 VDD1
112 111
VDD2 VDD1
112 Place these Caps near So-Dimm2.
8,12 DDR_A_CAS# 113 114 M_ODT0 7,12 8,12 DDR_B_CAS# 113 114 M_ODT2 7,12
CAS# ODT0 DDR_A_MA13 CAS# ODT0 DDR_B_MA13
7,12 DDR_CS1_DIMMA# 115 116 7,12 DDR_CS3_DIMMB# 115 116
S1# A13 S1# A13
117 118 117 118
VDD3 VDD6 VDD3 VDD6 C149 C138 C110 C125 C140
7,12 M_ODT1 119 ODT1 NC2 120 7,12 M_ODT3 119 ODT1 NC2 120
121 122 121 122
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
123 124 123 124
125 126 125 126
DQ33 DQ37 DQ33 DQ37
127 128 127 128
DDR_A_DQS#4 VSS26 VSS28 DDR_A_DM4 DDR_B_DQS#4 VSS26 VSS28 DDR_B_DM4
129 130 129 130
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4
131 132 131 132
DQS4 VSS42 DDR_A_D34 DQS4 VSS42 DDR_B_D39
133 VSS2 DQ38 134 133 VSS2 DQ38 134
DDR_A_D35 DQ34 DQ39 DDR_B_D35 DQ34 DQ39
137 138 137 138
DQ35 VSS55 DDR_A_D44 DQ35 VSS55 DDR_B_D45
139 140 139 140
DDR_A_D41 VSS27 DQ44 DDR_A_D45 DDR_B_D41 VSS27 DQ44 DDR_B_D44
141 142 141 142
DDR_A_D40 DQ40 DQ45 DDR_B_D40 DQ40 DQ45
143 144 143 144
C DQ41 VSS43 DDR_A_DQS#5 DQ41 VSS43 DDR_B_DQS#5 +1.8V_SUS C
145 VSS29 DQS#5 146 145 VSS29 DQS#5 146
DDR_A_DM5 147 148 DDR_A_DQS5 DDR_B_DM5 147 148 DDR_B_DQS5
DM5 DQS5 DM5 DQS5
149 150 149 150
151 DQ42 DQ46 152 151 DQ42 DQ46 152
DDR_A_D47 153 154 DDR_A_D42 DDR_B_D43 153 154 DDR_B_D46 C129 C142 C99 C132
DQ43 DQ47 DQ43 DQ47
155 156 155 156
VSS40 VSS44 VSS40 VSS44
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
159 160 159 160
DQ49 DQ53 DQ49 DQ53
161 162 161 162
VSS52 VSS57 VSS52 VSS57
163 NCTEST CK1 164 M_CLK_DDR1 7 163 NCTEST CK1 164 M_CLK_DDR4 7
165 VSS30 CK1# 166 M_CLK_DDR#1 7 165 VSS30 CK1# 166 M_CLK_DDR#4 7
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168
DDR_A_DQS6 DQS#6 VSS45 DDR_A_DM6 DDR_B_DQS6 DQS#6 VSS45 DDR_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 172 171 172
173 DQ50 DQ54 174 173 DQ50 DQ54 174
DQ51 DQ55 DQ51 DQ55 V_DDR_MCH_REF +3.3V
177 178 177 178
179 180 179 180
181 182 181 182
DQ57 DQ61 DQ57 DQ61
183 184 183 184
DDR_A_DM7 VSS3 VSS7 DDR_A_DQS#7 DDR_B_DM7 VSS3 VSS7 DDR_B_DQS#7 C501 C507 C40 C43
185 186 185 186
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
0.1U/16V/X7R_4
0.1U/16V/X7R_4
DDR_A_D62 DDR_B_D62
2.2U/6.3V/X5R_6
2.2U/6.3V/X5R_6
189 190 189 190
DDR_A_D59 DQ58 VSS36 DDR_A_D58 DDR_B_D63 DQ58 VSS36 DDR_B_D59
191 DQ59 DQ62 192 191 DQ59 DQ62 192
193 194 DDR_A_D63 193 194 DDR_B_D58
CGDAT_SMB_M VSS14 DQ63 CGDAT_SMB_M VSS14 DQ63
195 196 2,12,26 CGDAT_SMB_M 195 196
CGCLK_SMB_M SDA VSS13 CGCLK_SMB_M SDA VSS13
197 198 197 198
GND
SCL SA0 2,12,26 CGCLK_SMB_M SCL SA0

199 200 199 200 R53 10K_4 +3.3V
VDD(SPD) SA1 VDD(SPD) SA1
+3.3V
DIMM1_9.2 DIMM2_5.2
202
+3.3V
R363 R365 R54
10K_4 10K_4 10K_4
D D
CKE 0,1
CKE 2,3
CLOCK 0,1
CLOCK 3,4 SMbus address A4
+1.8V_SUS
SMbus address A0
+3.3V 2,5,7,8,10,12,14,15,16,17,18,19,20,21,22,23,24,26,27,30,31,32,33 PROJECT : AJ2
C119 0.1U/16V/X7R_4
C117 0.1U/16V/X7R_4 Quanta Computer Inc.
Custom DDR SO-DIMM(200P) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V
+RTC_CELL
+RTC_CELL
14
2
+RTC_CELLC535 1U/6.3V/X5R_4 +RTC_CELL
+3.3V_ALW
R214
1
D25 R487 20K/F_4 RTCRST# *1K_4
CH501H-40PT R522
1
VCCRTC_4 R488 20K/F_4 C534 G1 332K/F_4 R523
1
20 mil *SHORT_ PAD1 332K/F ACZ_SDOUT
D26 C536 1U/6.3V/X5R_4
ICH_TP3 16
2
R480 CH501H-40PT LAN100_SLP ICH_INTVRMEN
2
1K/F_4 1U/6.3V/X5R_4
1
R516
R510 *1K_4
A A
BAT ICH_SRTCRST# *0_4 R511
R521 1M/F_4 SM_INTRUDER# *0_4
1
2
1
2
ICH8M Internal VR Enable Strap XOR Chain Entrance Strap

CN31 (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
ICH8-M LAN100_SLP Strap ICH TP3 HDA SDOUT Description
RTC_CON. 20 mil (Internal VR for Low = Internal VR Disabled
+5V_ALW
RTC VccLAN1_05 and ICH_INTVRMEN High = Internal VR Enabled(Default) 0 0 RSVD
VccCL1.05) 0 1 Enter XOR Chain
20 mil Q43
R472 VCCRTC_1 3 1 C281 ICH_RTCX1 1 0 Normal Operation (Default)
18P/50V_4
*2.2K_6 *MMBT3904 Low = Internal VR disable 1 1 Set PCIE port config bit 1
3
4
R476 LAN100_SLP High = Internal VR
2
32.768KHZ R281 enable(Default)

*4.7K/06
Y4
10M_4 SB Strap
VCCRTC_3
2
1
C274 ICH_RTCX2 U25A
R477 18P/50V_4 ICH_RTCX1 C23 K5
RTCX1 FW H0/LAD0 LPC_LAD0 26,30
ICH_RTCX2 C24 K4
RTCX2 FW H1/LAD1 LPC_LAD1 26,30 +1.05V_VCCP
*15K/06 L6
+3.3V FW H2/LAD2 LPC_LAD2 26,30
RTCRST# A25 K2
RTCRST# FW H3/LAD3 LPC_LAD3 26,30
ICH_SRTCRST# F20 SRTCRST#
2
SM_INTRUDER# C22 K3
INTRUDER# FW H4/LFRAME# LPC_LFRAME# 26,30
2
B R439 B
RTC
LPC
ICH_INTVRMEN B22 J3 LDRQ0# *56 R437
INTVRMEN LDRQ0# *PAD T78
C515 R460 LAN100_SLP A22 J1 56_4
LAN100_SLP LDRQ1#/GPIO23 *PAD T58
0.1U/16V/X7R_4 10K/F_4
1
T66 *PAD GLAN_CLK E25 N7 GATEA20
GATEA20 30
1
GLAN_CLK A20GATE H_DPRSTP#
A20M# AJ27 H_A20M# 3
5
C13 LAN_RSTSYNC
2 ICH_SATA_LED# Reserved for DPRSTP# AJ25 H_DPRSTP#
H_DPRSTP# 3,7,38
H_FERR#
4 Intel Nineveh T63 *PAD LAN_RXD0 F14 AE23 H_DPSLP#
31 SATA_LED# LAN_RXD0 DPSLP# H_DPSLP# 3
1 T59 *PAD LAN_RXD1 G13 R438 56_4
design. LAN_RXD2 LAN_RXD1
T69 *PAD D14 AJ26 2 1 H_FERR# H_FERR# 3
LAN / GLAN
U23 LAN_TXD0 LAN_RXD2 FERR#
T68 *PAD
3
*TC7SH08FU LAN_TXD1 D13 AD22 +3.3V

T76 *PAD LAN_TXD0 CPUPW RGD H_PWRGOOD 3
T64 *PAD LAN_TXD2 D12 LAN_TXD1
E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 3
R462 0_4 R517 *10K_4
2
+3.3V_S5 2 1 ENERGY_DET B10 GLAN_DOCK#/GPIO56 INIT# AE22 H_INIT# 3
AG25 R235 R241
CPU
INTR H_INTR 3
R271 24.9/F_4 B28 L3 RCIN# 8.2K_4 10K_4
AZ Interface( MDC, CODEC, HDMI) +1.5V_PCIE_ICH 1 2 GLAN_COMP_SB B27
GLAN_COMPI
GLAN_COMPO
RCIN# RCIN# 30
AF23 H_NMI 3
1
R203 1 NMI
25 ICH_AZ_MDC_BITCLK 2 33_4 ACZ_BIT_CLK ACZ_BIT_CLK AF6 HDA_BIT_CLK SMI# AF24 H_SMI# 3
GATEA20
R210 1 2 33_4 ACZ_SYNC AH4 RCIN#
24 ICH_AZ_CODEC_BITCLK HDA_SYNC
R208 33_4 AH27
7 ACZ_BITCLK_MCH STPCLK# H_STPCLK# 3
R212 33_4 ACZ_RST# AE7 R435 54.9/F_4
22 MXM_BIT_CLK_HDMI HDA_RST#
THRMTRIP# AG26 H_THERMTRIP_R 2 1 H_THERMTRIP# H_THERMTRIP# 3,7
2
24 ICH_AZ_CODEC_SDIN0 AF4 HDA_SDIN0

C209 C215 AG4 AG27
25 ICH_AZ_MDC_SDIN1 HDA_SDIN1 TP9 *PAD T42 +1.05V_VCCP
*27P/50V *27P/50V HDA_SDIN2 AH3
IHDA
1
HDA_SDIN3 HDA_SDIN2
C
AE5 HDA_SDIN3 C
2
R458 1 2 33_4 ACZ_SYNC ACZ_SDOUT AG5 AH11 R428 10K_4
25 ICH_AZ_MDC_SYNC HDA_SDOUT SATA4RXN
R456 1 2 33_4 AJ11 R432 10K_4 R436
24 ICH_AZ_CODEC_SYNC SATA4RXP
R452 33_4 T36 *PAD LAN_DISABLE1# AG7 AG12 SATA_TX4-_C 56_4
7 ACZ_SYNC_MCH HDA_DOCK_EN#/GPIO33 SATA4TXN *PAD T41
R449 33_4 +3.3V R430 2 1 *10K_4 AE8 AF12 SATA_TX4+_C
22 MXM_SYNC_HDMI HDA_DOCK_RST#/GPIO34 SATA4TXP *PAD T45
1
R204 1 2 33_4 ACZ_RST# ICH_SATA_LED# AG8 AH9 R434 10K_4 H_THERMTRIP#
25 ICH_AZ_MDC_RST# SATALED# SATA5RXN
R209 1 2 33_4 AJ9 R433 10K_4
24 ICH_AZ_CODEC_RST# SATA5RXP
R211 33_4 AJ16 AE10 SATA_TX5-_C
7 ACZ_RST#_MCH 27 SATA_RX0- SATA0RXN SATA5TXN *PAD T44
R213 33_4 AH16 AF10 SATA_TX5+_C
HDD
SATA
22 MXM_RST#_HDMI 27 SATA_RX0+ SATA0RXP SATA5TXP *PAD T40
SATA_TX0-_C AF17
R216 1 SATA0TXN
25 ICH_AZ_MDC_SDOUT 2 33_4 ACZ_SDOUT SATA_TX0+_C AG17 SATA0TXP SATA_CLKN AH18 CLK_PCIE_SATA# 2
H_PWRGOOD
R218 1 2 33_4 AJ18
24 ICH_AZ_CODEC_SDOUT SATA_CLKP CLK_PCIE_SATA 2
R217 33_4 AH13 C218
7 ACZ_SDOUT_MCH 27 SATA_RX1- SATA1RXN
R215 33_4 AJ13 AJ7 R429 24.9/F_4 *1000P/16V/X7R_4
22 MXM_SDOUT_HDMI ODD 27 SATA_RX1+
SATA_TX1-_C AG14
SATA1RXP SATARBIAS#
AH7 SATA_BIAS 1 2
HDA_SDIN2 R220 E@0_4 SATA_TX1+_C SATA1TXN SATARBIAS
MXM_SDIN_HDMI 22 AF14 SATA1TXP
HDA_SDIN3 R222 *I@0_4
ACZ_SDIN3 7 Place within 500mils
ICH9M REV 1.0 of ICH9 ball
Place all series terms close to ICH9 except for SDIN input
lines,which should be close to source.Placement of R603, R600,
R607 & R612 should equal distance to the T split trace point as
R604, R599, R606 & R608 respective. Basically,keep the same
distance from T for all series termination resistors.
ACZ_BITCLK_MCH
D AC-TX for SATA C214

D
C212 2 1 0.01U/25V/X7R_4 SATA_TX0-_C EMC *0.1U/16V/X7R_4

27 SATA_TX0-
27 SATA_TX0+
C213 2 1 0.01U/25V/X7R_4 SATA_TX0+_C reserved
C211 2 1 0.01U/25V/X7R_4 SATA_TX1-_C PROJECT : AJ2
27 SATA_TX1-
C210 2 1 0.01U/25V/X7R_4 SATA_TX1+_C
27 SATA_TX1+
Distance between the ICH-9 M and cap on the "P" Size Document Number Rev
signal should be identical distance between the Custom ICH9-M (CPU,IDE,SATA,LPC,AC97,LAN) 1A
ICH-9 M and cap on the "N" signal for same pair. Date: Tuesday, September 16, 2008 Sheet 14 of 43
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
OC# pull up +3.3V_SUS
Place TX DC blocking caps close ICH8.
15
RP49 U25D
USB_OC2# 6 5 N29 V27
26 PCIE_RX1- PERN1 DMI0RXN DMI_MTX_IRX_N0 7
OC9# 7 4 USB_OC3# N28 V26
26 PCIE_RX1+ PERP1 DMI0RXP DMI_MTX_IRX_P0 7
USB_OC5# 8 3 W LAN_RF_OFF# MiniCard-1 (WLAN) 26 C230 0.1U/16V/X7R_4 PCIE_TXN1_C P27 U29
PCIE_TX1- PETN1 DMI0TXN DMI_MRX_ITX_N0 7
USB_OC4# 9 2 USB_OC0# C233 0.1U/16V/X7R_4 PCIE_TXP1_C P26 U28
Direct Media Interface

26 PCIE_TX1+ PETP1 DMI0TXP DMI_MRX_ITX_P0 7
10 1 OC#_NW C
+3.3V_SUS
26 PCIE_RX2- L29 PERN2 DMI1RXN Y27 DMI_MTX_IRX_N1 7
10P8R-10K 26 PCIE_RX2+ L28 PERP2 DMI1RXP Y26 DMI_MTX_IRX_P1 7
MiniCard-2 C237 0.1U/16V/X7R_4 PCIE_TXN2_C M27 W29
26 PCIE_TX2- PETN2 DMI1TXN DMI_MRX_ITX_N1 7
C242 0.1U/16V/X7R_4 PCIE_TXP2_C M26 W28
26 PCIE_TX2+ PETP2 DMI1TXP DMI_MRX_ITX_P1 7
R234 2 1 10K_4 OC10#
+3.3V_SUS R231 10K_4 OC11#
2 1 32 PCIE_RXN3 J29 PERN3 DMI2RXN AB27 DMI_MTX_IRX_N2 7
R238 10K_4 USB_OC7#
PCI-Express
A 2 1 32 PCIE_RXP3 J28 PERP3 DMI2RXP AB26 DMI_MTX_IRX_P2 7 A
R237 2 1 10K_4 USB_OC1# Express Card (NEWCARD)32 C247 0.1U/16V/X7R_4 PCIE_TXN3_C K27 AA29
PCIE_TXN3 PETN3 DMI2TXN DMI_MRX_ITX_N2 7
C262 0.1U/16V/X7R_4 PCIE_TXP3_C K26 AA28
32 PCIE_TXP3 PETP3 DMI2TXP DMI_MRX_ITX_P2 7
SPI_CLK_R
+3.3V G29 AD27
T126 PERN4 DMI3RXN DMI_MTX_IRX_N3 7
20 mil T127 G28 PERP4 DMI3RXP AD26 DMI_MTX_IRX_P3 7
T124 H27 PETN4 DMI3TXN AC29 DMI_MRX_ITX_N3 7
C256 H26 AC28
T56 PETP4 DMI3TXP DMI_MRX_ITX_P3 7
*0.1U/16V/X7R_4 Place within
C257 +3.3V E29 T26
*0.1U/16V/X7R_4 FAI Remove T130
E28
PERN5 DMI_CLKN
T25
CLK_PCIE_ICH# 2 500mils of
T132 PERP5 DMI_CLKP CLK_PCIE_ICH 2
T128 F27 PETN5
ICH9
R251 U10 F26 AF29 R219 24.9/F_4
T62 PETP5 DMI_ZCOMP
*10K/F_4 8 1 SPI_CS#0 R293 *22_4SPI_CS#0_R AF28 DMI_IRCOMP_R2 1
VDD CE# DMI_IRCOMP +1.5V_PCIE_ICH
6 SPI_CLK R252 *22_4SPI_CLK_R R295 C29
SCK 21 PCIE_RX6-/GLAN_RX- PERN6/GLAN_RXN
5 SPI_MOSI R253 *22_4SPI_MOSI_R *10K/F_4 C28 AC5
SI 21 PCIE_RX6+/GLAN_RX+ PERP6/GLAN_RXP USBP0N USBP0- 28
SPI_HOLD# 7 2 SPI_MISO R294 *22_4SPI_MISO_R C268 0.1U/16V/X7R_4 GLAN_TXN_C D27 AC4 USB-0
HOLD# SO 21 PCIE_TX6-/GLAN_TX- PETN6/GLAN_TXN USBP0P USBP0+ 28
C267 0.1U/16V/X7R_4 GLAN_TXP_C D26 AD3
21 PCIE_TX6+/GLAN_TX+ PETP6/GLAN_TXP USBP1N USBP1- 28
4 VSS WP# 3 SPI_W P# USBP1P AD2 USBP1+ 28 USB-1
SPI_CLK_R D23 AC1
SPI_CLK USBP2N USBP2- 28
*MX25L512MC-12G SPI_CS#0_R D24 AC2 TO Board USB-0
SPI_CS0# USBP2P USBP2+ 28
EC B-12 /15 Add U31 for HDCP support. SPI_CS1#_R F23 AA5
SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBP3- 32
USBP3P AA4 USBP3+ 32 NEWCARD
SPI
512K byte SPI ROM SPI_MOSI_R D25 AB2
SPI_MOSI USBP4N USBP4- 26
SPI_MISO_R E23 AB3 MiniCard-1 (WLAN)
SPI_MISO USBP4P USBP4+ 26
USBP5N AA1 USBP5- 28
USB_OC0# N4 AA2 TO Board USB-1
OC0#/GPIO59 USBP5P USBP5+ 28
USB_OC1# N5 W5 USBP6-
28 USB_OC1# OC1#/GPIO40 USBP6N T49
PCI Pullups USB_OC2# N6 W4 USBP6+
B
28 USB_OC2#
USB_OC3# P6
OC2#/GPIO41 USB USBP6P
Y3
T51 B
OC3#/GPIO42 USBP7N USBP7- 26
USB_OC4# M1 Y2 MiniCard-2(reserved)
OC4#/GPIO43 USBP7P USBP7+ 26
+3.3V_S5 USB_OC5# N2 W1
R492 2 1 10K_4 PCI_PME# W LAN_RF_OFF# M4 W2 WEB CAM
26,31 W LAN_RF_OFF# OC6#/GPIO30 USBP8P USBP8+ 18
USB_OC7# M3 V2
+3.3V OC#_NW C N3 V3 BLUETOOTH
32 OC#_NW C OC8#/GPIO44 USBP9P USBP9+ 29
R269 8.2K_4 PCI_FRAME# OC9# N1 U5 ICH_USBP10-
OC10# OC9#/GPIIO45 USBP10N ICH_USBP10+ T54
P5 OC10#/GPIO46 USBP10P U4
+3.3V OC11# P3 U1 ICH_USBP11- T53
RP34 OC11#/GPIO47 USBP11N ICH_USBP11+ T122
USBP11P U2
PCI_IRDY# 6 5 T123
PCI_PLOCK# 7 4 PCI_PERR# R464 22.6/F AG2
PCI_TRDY# PCI_PIRQD# USBRBIAS
8 3 2 1 USB_RBIAS_PN AG1 USBRBIAS#
PCI_PIRQC# 9 2 PCI_STOP#
10 1 PCI_DEVSEL# placed within 500-mils of ICH9M REV 1.0
+3.3V
the ICH9M
10P8R-8.2K
+3.3V
RP50
ICH_GPIO3_PIRQF# 6 5
ICH_GPIO2_PIRQE# 7 4 PCI_PIRQB#
PCI_PIRQA# 8 3 ICH_GPIO4_PIRQG#
PCI_SERR# 9 2 PCI_REQ0#
10 1 ICH_GPIO5_PIRQH#
+3.3V
SPI_CS1#_R Boot BIOS Strap
10P8R-8.2K
PCI_GNT0#
GNT0# SPI_CS1#
2
C C
LPC 11 No stuff No stuff
U25B R259 R260
AD0 D11 F1 PCI_REQ0# *1K_4 *1K_4 PCI 10 No stuff Stuff
AD0 REQ0# PCI_REQ0# 23
AD1 C8 G4 PCI_GNT0#
PCI PCI_GNT0# 23
1
AD2 AD1 GNT0# BOARD_ID1
D9 AD2 REQ1#/GPIO50 B6 BOARD_ID1 16 SPI 01 Stuff No stuff
AD3 E12 A7 PCI_GNT1# T139
AD4 AD3 GNT1#/GPIO51 BOARD_ID2
E9 AD4 REQ2#/GPIO52 F13 BOARD_ID2 16
AD5 C9 F12 PCI_GNT2# T61 PCI_GNT3#
AD6 AD5 GNT2#/GPIO53 BOARD_ID3
E10 AD6 REQ3#/GPIO54 E6 BOARD_ID3 16
2
AD7 B7 F6 PCI_GNT3#
AD8 AD7 GNT3#/GPIO55
C7 AD8 A16 away override strap.
AD9 C5 D8 C/BE0# CLK_PCI_ICH R258
AD9 C/BE0# C/BE0# 23
AD10 G11 B4 C/BE1# Low = A16 swap override enabled. *1K_4
AD10 C/BE1# C/BE1# 23
AD11 F8 D6 C/BE2#
C/BE2# 23 High = Default.
1
AD12 AD11 C/BE2# C/BE3#
F11 AD12 C/BE3# A5 C/BE3# 23
AD13 E7 R273
AD14 AD13 PCI_IRDY# *10_4
A3 AD14 IRDY# D3 PCI_IRDY# 23 Reserved for EMI.
AD15 D2 E3 PCI_PAR
AD16 F10
AD15 PAR
R1
PCI_PAR 23 Place resister and cap
AD16 PCIRST# PCIRST# 20,23
AD17 D5 AD17 DEVSEL# C6 PCI_DEVSEL#
PCI_DEVSEL# 23 close to ICH.
AD18 D10 E4 PCI_PERR# C275
AD19 AD18 PERR# PCI_PLOCK# *10P/50V/COG_4
B3 AD19 PLOCK# C2
AD20 F7 J4 PCI_SERR#
AD21 AD20 SERR# PCI_STOP#
C3 AD21 STOP# A4 PCI_STOP# 23
AD22 F3 F5 PCI_TRDY#
AD22 TRDY# PCI_TRDY# 23
AD23 F4 D7 PCI_FRAME#
AD23 FRAME# PCI_FRAME# 23
AD24 C1
AD25 AD24
G7 AD25 PLTRST# C14 PLTRST#_NB PLTRST#_NB 7
D AD26 H7 D4 CLK_PCI_ICH D
AD26 PCICLK CLK_PCI_ICH 2
AD27 D1 R2 PCI_PME# +3.3V_SUS
AD27 PME# PCI_PME# 23
AD28 G5
AD29 AD28 C288 0.1U/16V/X7R_4
H6 AD29
AD30 G1 AD30
5
23 AD[0..31] AD31 H3 1
AD31
2
4
U11
PLTRST# 7,21,22,26,32 PROJECT : AJ2
PCI_PIRQA# J5
Interrupt I/F H4 ICH_GPIO2_PIRQE# TC7SH08FU(F)
23 PCI_PIRQA# T77
3
PCI_PIRQB# PIRQA# PIRQE#/GPIO2 ICH_GPIO3_PIRQF#

T131 E1 PIRQB# PIRQF#/GPIO3 K6 T71
T57 PCI_PIRQC# J6 F2 ICH_GPIO4_PIRQG# T129 R299
PCI_PIRQD# PIRQC# PIRQG#/GPIO4 ICH_GPIO5_PIRQH# 100K_4 Size Document Number Rev
T79 C4 PIRQD# PIRQH#/GPIO5 G2 T125
A3 ICH9-M (USB,DMI,PCIE,PCI) 1A
ICH9M REV 1.0
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_S5
1
3
RP36
4P2R-2.2K
2
4
ICH_SMBDATA
ICH_SMBCLK
Non-iAMT
+3.3V_S5
3
1
RP35
4
2
ICH_SMLINK0
ICH_SMLINK1
ASF 2.0 +3.3V_S5
R288
R514
R292
2
2
2
1
1
1
10K_4
10K_4
1K_4
ICH_RI#
SWI
ICH_PCIE_WAKE#
Place these close to ICH8.
16
10K-4P2R R512 2 1 10K_4 SCI#
+3.3V R207 2 1 10K_4 RSVD_GPIO7 CLK_ICH_48M
+3.3V
1
ICH_SMBCLK R274 1 ICH_SMLINK0
2 *0_4
2
ICH_SMBDATA R526 1 2 *0_4

ICH_SMLINK1 R473
*10_4
2
A A
R244
8.2K_4
1 2
R442
1
PCI_CLKRUN# 2,32 ICH_SMBCLK 8.2K_4

C526
1
2,32 ICH_SMBDATA
1
U25C *4.7P/50V
2
ICH_SMBCLK G16 AH23
R245 ICH_SMBDATA SMBCLK SATA0GP/GPIO21
A13 SMBDATA SATA1GP/GPIO19 AF19
*10_4 R284 2 1 10K_4 ICH_CL_RST1# E17 AE21
SMB
+3.3V_S5
SATA
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
GPIO
T81 *PAD ICH_SMLINK0 C17 AD20
2
ICH_SMLINK1 SMLINK0 SATA5GP/GPIO37 CLK_ICH_14M

T138 *PAD B18 SMLINK1
H1 CLK_ICH_14M
CLK14 CLK_ICH_14M 2
1
Option to " Disable " ICH_RI# F19 AF3 CLK_ICH_48M
Clocks
RI# CLK48 CLK_ICH_48M 2
clkrun. Pulling it down
T35 *PAD LPC_PD# R4 P1 ICH_SUSCLK R249
will keep the clks SUS_STAT#/LPCPD# SUSCLK *PAD T55
*10_4
3 ITP_DBRESET# G19 SYS_RESET#
running. C16 SLP_S3# R530 100/F_4
SUSB# 30
1 2
SLP_S3# SLP_S4# R246 100/F_4
7 PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 SUSC# 30
G17 SLP_S5# T60
SCI# SLP_S5# C266
30 SCI# A17 SMBALERT#/GPIO11
C10 *4.7P/50V
S4_STAT# 30
2
+3.3V S4_STATE#/GPIO26
LCD_ID 2 H_STP_PCI# A14 STP_PCI#/GPIO15
E19 G20 ICH_PWROK
2 H_STP_CPU# STP_CPU#/GPIO25 PW ROK R495 0_4
SYS GPIO
Power MGT
PCI_CLKRUN# L4 M2 PM_DPRSLPVR_R1 2
23,26,30 PCI_CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 PM_DPRSLPVR 7,38
R500 R513 8.2K_4
10K_4 ICH_PCIE_WAKE# E20 B13 PM_BATLOW#_R 2 1 +3.3V_S5 CLK_PWRGD R232 2 1 *10K_4
21,26,32 ICH_PCIE_WAKE# W AKE# BATLOW #
IRQ_SERIRQ M5
26,30 IRQ_SERIRQ THERM_ALERT# SERIRQ DNBSWON# PM_DPRSLPVR R496 1
5,22 THERM_ALERT# AJ23 THRM# PW RBTN# R3 DNBSWON# 30 2 *100K_4
B B
PCIE_MCARD2_DET# VR_PWRGO_CLKEN D21 D20 RSV_ICH_LAN_RST# RSMRST# R280 2 1 10K_4
18 LCD_ID0 VRMPW RGD LAN_RST# *PAD T82
R498 1K_4 T134 *PAD A20 D22 RSMRST# RSV_ICH_LAN_RST# R277 2 1 0_4
+3.3V TP8 RSMRST# RSMRST# 30
T34 *PAD RSVD_GPIO1 AG19 R5

TACH1/GPIO1 CK_PW RGD CLK_PWRGD 2
18 FPBACK# AH21 TACH2/GPIO6
RSVD_GPIO7 AG21 R6 PWROK
TACH3/GPIO7 CLPW ROK PWROK 7,30
KBSMI# A21
30 KBSMI# GPIO8
R544 SWI C12 B16
30 SWI LANPHYPC/GPIO12 SLP_M# *PAD T141
10K_4 PCIE_MCARD1_DET# C21
BOARD_ID0 ENGDET/GPIO13
AE18 TACH0/GPIO17 CL_CLK0 F24 CL_CLK0 7
PCIE_MCARD2_DET# K1 B19 CL_CLK1
GPIO18 CL_CLK1 CL_CLK1 26 +3.3V_S5
GPIO
GPIO20
Controller Link
T39 *PAD AF8 GPIO20
GPIO22 GPIO22 AJ22 F22
18 LCD_ID1 SCLOCK/GPIO22 CL_DATA0 CL_DATA0 7
BT_ON# A9 C19 CL_DATA1 ME_EC_ALERT R287 2 1 *10K_4
29,31 BT_ON# QRT_STATE0/GPIO27 CL_DATA1 CL_DATA1 26
R561 1K_4 T67 *PAD ICH_GPIO28 D19 QRT_STATE1/GPIO28 CL_VREF0_SB EC_ME_ALERT R291 2
2 SATA_CLKREQ# L1 SATACLKREQ#/GPIO35 CL_VREF0 C25 *PAD T85 1 *10K_4
WPAN_RADIO_DIS_MINI# AE19 A19 CL_VREF1_SB
SLOAD/GPIO38 CL_VREF1 *PAD T142
T115 *PAD RSVD_GPIO48 AG22 SDATAOUT0/GPIO39
AF21 SDATAOUT1/GPIO48 CL_RST0# F21 ICH_CL_RST0# 7
AH24 D18 CL_RST#1
GPIO49 CL_RST1# CL_RST#1 26
A8 GPIO57/CLGPIO5
A16 GPIO24 +3.3V
MEM_LED/GPIO24 T136
ACZ_SPKR M7 SPKR C18 ME_EC_ALERT
24 ACZ_SPKR ALERT#/GPIO10 ME_EC_ALERT 30
R440 2 1 0_4MCH_ICH_SYNC#_R
AJ24 MCH_SYNC# C11 EC_ME_ALERT
7 MCH_ICH_SYNC# NETDETECT/GPIO14 EC_ME_ALERT 30
2
B21 TP3 C20 LAN_WOL_EN
MISC
14 ICH_TP3 W OL_EN/GPIO9 LAN_WOL_EN 30
T37 *PAD ICH_TP9 AH20 TP9
T38 *PAD ICH_TP10 AJ20 TP10 R240
T43 *PAD ICH_TP11 AJ21 TP11 *1K_4
C C
1
ICH9M REV 1.0 ACZ_SPKR
No Reboot strap.
Board ID ID3 ID2 ID1 ID0
Low = Default.
ACZ_SPKR High = No Reboot.
INTEL SENTAROSA 1 1 1 1
+3.3V +3.3V +3.3V +3.3V_S5
INTEL MENTAVIRA 1 1 0 0 Non-iAMT
R286 2 1 *2.2K_4 VR_PWRGO_CLKEN U12 C276 For ME
2
1 5 0.1U/16V/X7R_4
+3.3V AMD 1 0 1 1 2 R272 R524
38 VR_PWRGD_CLKEN#
3 4 VR_PWRGO_CLKEN 3.24K/F_4 3.24K/F_4
R443 2 1 10K_4 THERM_ALERT# NVIDIA 1 0 0 1 NL17SZ14DFT2G R285 100K/F_4
1
R441 2 1 *10K_4 MCH_ICH_SYNC#_R
R236 2 1 10K_4 IRQ_SERIRQ CL_VREF0_SB CL_VREF1_SB
R206 2 1 10K_4 RSVD_GPIO1
+3.3V +3.3V_SUS
1
R205 2 1 10K_4 WPAN_RADIO_DIS_MINI#
1
R444 2 1 10K_4 RSVD_GPIO48 +3.3V +3.3V +3.3V +3.3V C272 R282 C568 R525
R279 1 2 100K_4 PCIE_MCARD1_DET# 0.1U/16V/X7R_4 453/F 0.1U/16V/X7R_4 453/F
Modify for FAI C289 0.1U/16V/X7R_4
2
R501 1 2 100K_4 PCIE_MCARD2_DET# R303
2
R276 R529 R201 R289 GPIO[20]--Integrated 2K/F_4
10K_4
D
*10K_4 *10K_4 1K_4
Pull-Down 20K. 5
U13
Modify for FAI D
+3.3V_S5 2
7,38 DELAY_VR_PG
4 ICH_PWROK
R515 2 1 10K_4 KBSMI# PWROK 1
R486 2 1 10K_4 DNBSWON#
1
R275 R528 R202 R290 TC7SH08FU(F) R278 C612
3
R298 2 1 10K_4 LAN_WOL_EN *10K_4 10K_4 10K_4 *10K_4

R518 10K/F_4 0.1U/16V/X7R_4 PROJECT : AJ2
2
2 1 10K_4 BT_ON# BOARD_ID3
EC B-18
BOARD_ID1
BOARD_ID0
BOARD_ID3 15
BOARD_ID1 15
BOARD_ID2 Size Document Number Rev
BOARD_ID2 15
Custom ICH9-M (PM,GPIO,SMB,CL) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U25E 10 mil U25F
17
AA26 H5 +RTC_CELL A23 A15 +1.05V_VCCP
VSS[001] VSS[107] EC A-04/01 chamge C479,C493 to 1U, VCCRTC VCC1_05[01]
AA27 J23 B15
VSS[002] VSS[108] VCC1_05[02]
2
AA3 J26 R448,R417 to 100 ohm for USB 1.0 can't A6 C15
VSS[003] VSS[109] V5REF VCC1_05[03]
2
AA6 J27 work and meet Intel Spec. C557 C567 D15
VSS[004] VSS[110] 0.1U/16V/X7R_4 0.1U/16V/X7R_4 VCC1_05[04] C234 C223
AB1 AC22 AE1 E15
1
VSS[005] VSS[111] R509 100_4 V5REF_SUS VCC1_05[05] 0.1U/16V/X7R_4 0.1U/16V/X7R_4
AA23 K28 F15
1
VSS[006] VSS[112] VCC1_05[06]
AB28 VSS[007] VSS[113] K29 +5V 1 2 AA24 VCC1_5_B[01] VCC1_05[07] L11
AB29 VSS[008] VSS[114] L13
D27
20 mil AA25 VCC1_5_B[02] VCC1_05[08] L12
AB4 VSS[009] VSS[115] L15 AB24 VCC1_5_B[03] VCC1_05[09] L14
AB5 L2 +3.3V 2 1 +ICH_V5REF_RUN AB25 L16 1uH+-20%_800mA
VSS[010] VSS[116] VCC1_5_B[04] VCC1_05[10] +1.5V
AC17 VSS[011] VSS[117] L26 AC24 VCC1_5_B[05] VCC1_05[11] L17
2
AC26 L27 CH751H-40HPT AC25 L18 L27
VSS[012] VSS[118] C556 VCC1_5_B[06] VCC1_05[12] 1uH_800MA R261 1_4
AC27 VSS[013] VSS[119] L5 AD24 VCC1_5_B[07] VCC1_05[13] M11
A AC3 L7 1U/10V_4 AD25 M18 +1.5V_DMIPLL 2 1+1.5V_DMIPLL_R 2 1 A
1
VSS[014] VSS[120] VCC1_5_B[08] VCC1_05[14]
AD1 VSS[015] VSS[121] M12 AE25 VCC1_5_B[09] VCC1_05[15] P11
CORE
AD10 M13 R478 100_4 AE26 P18
VSS[016] VSS[122] VCC1_5_B[10] VCC1_05[16]
2
AD12 VSS[017] VSS[123] M14 +5V_S5 1 2 AE27 VCC1_5_B[11] VCC1_05[17] T11
AD13 M15 20 mil AE28 T18 C228 C232
VSS[018] VSS[124] D24 VCC1_5_B[12] VCC1_05[18] 0.01U/25V/X7R_4
10U/6.3V/X5R_8
AD14 M16 AE29 U11
1
VSS[019] VSS[125] +ICH_V5REF_SUS VCC1_5_B[13] VCC1_05[19]
AD17 VSS[020] VSS[126] M17 +3.3V_S5 2 1 F25 VCC1_5_B[14] VCC1_05[20] U18
AD18 M23 G25 V11
VSS[021] VSS[127] VCC1_5_B[15] VCC1_05[21]
2
AD21 M28 CH751H-40HPT H24 V12
VSS[022] VSS[128] C527 VCC1_5_B[16] VCC1_05[22]
AD28 M29 H25 V14
VSS[023] VSS[129] 1U/10V_4 VCC1_5_B[17] VCC1_05[23] L25
AD29 N11 J24 V16
1
VSS[024] VSS[130] VCC1_5_B[18] VCC1_05[24]
AD4 VSS[025] VSS[131] N12 J25 VCC1_5_B[19] VCC1_05[25] V17 1 2 +1.05V_VCCP
AD5 N13 K24 V18 BLM21PG331SN1D
VSS[026] VSS[132] VCC1_5_B[20] VCC1_05[26]
2
AD6 VSS[027] VSS[133] N14 K25 VCC1_5_B[21]
AD7 N15 L23 C226
VSS[028] VSS[134] +1.5V VCC1_5_B[22] 4.7U/6.3V_6
AD9 N16 L24 R29
1
VSS[029] VSS[135] VCC1_5_B[23] VCCDMIPLL
VCCA3GP
AE12 N17 L25 +VCC_DMI
VSS[030] VSS[136] VCC1_5_B[24]
AE13 N18 M24 W23
VSS[031] VSS[137] VCC1_5_B[25] VCC_DMI[1]
1
AE14 N26 M25 Y23 +1.05V_VCCP
VSS[032] VSS[138] VCC1_5_B[26] VCC_DMI[2]
AE16 VSS[033] VSS[139] N27 FB_330ohm+-25%_100mHz_ N23 VCC1_5_B[27]
AE17 P12 L26 N24 AB23
AE2
VSS[034] VSS[140]
P13 BLM21PG331SN1D 1.5A_0.09 ohm DC N25
VCC1_5_B[28] V_CPU_IO[1]
AC23
VSS[035] VSS[141] VCC1_5_B[29] V_CPU_IO[2]
AE20 VSS[036] VSS[142] P14 P24 VCC1_5_B[30]
1
AE24 P15 +1.5V_PCIE_ICH P25 AG29 C243 C235 C227
+3.3V
2
VSS[037] VSS[143] VCC1_5_B[31] VCC3_3[01] 0.1U/16V/X7R_4 0.1U/16V/X7R_4 4.7U/10V_8
AE3 P16 R24
VSS[038] VSS[144] VCC1_5_B[32]
AE4 P17 R25 AJ6
2
VSS[039] VSS[145] VCC1_5_B[33] VCC3_3[02]
AE6 P2 R26
VSS[040] VSS[146] VCC1_5_B[34]
1
2
AE9 P23 R27 AC10
VSS[041] VSS[147] VCC1_5_B[35] VCC3_3[07]
2
AF13 P28 + C236 T24 C279 C559
VSS[042] VSS[148] VCC1_5_B[36]
2
AF16 P29 C258 C240 C260 T27 AD19 0.1U/16V/X7R_4 0.1U/16V/X7R_4 Modify for C-TEST EC C-7 /8 only UMA Stuff.
1
VSS[043] VSS[149] VCC1_5_B[37] VCC3_3[03]
VCCP_CORE
B AF18 P4 22U/4V_8 22U/4V_8 2.2U/10V/X5R_8 T28 AF20 C271 B
2
1
VSS[044] VSS[150] 220U/2.5V_7343 VCC1_5_B[38] VCC3_3[04] 0.1U/16V/X7R_4
AF22 P7 T29 AG24
1
VSS[045] VSS[151] VCC1_5_B[39] VCC3_3[05]
AH26 VSS[046] VSS[152] R11 U24 VCC1_5_B[40] VCC3_3[06] AC20
AF26 R12 U25 +3.3V_S5 +1.5V_S5
VSS[047] VSS[153] VCC1_5_B[41] 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 U22
AF27 VSS[048] VSS[154] R13 V24 VCC1_5_B[42] VCC3_3[08] B9 20 mil
AF5 VSS[049] VSS[155] R14 V25 VCC1_5_B[43] VCC3_3[09] F9
C246 C265 C239
20 mil 3 VIN VOUT 4
AF7 R15 U23 G3
VSS[050] VSS[156] VCC1_5_B[44] VCC3_3[10]
2
AF9 R16 W24 G6 R454 E@0_6 +3.3V
VSS[051] VSS[157] +1.5V VCC1_5_B[45] VCC3_3[11] R446
AG13 R17 W25 J2
PCI
VSS[052] VSS[158] VCC1_5_B[46] VCC3_3[12] R447 *I@0_6 *I@22.1K/F_4
AG16 R18 K23 J7 1
+1.5V
R1
1
VSS[053] VSS[159] VCC1_5_B[47] VCC3_3[13] SHDN
2
AG18 R28 Y24 K7 C510
VSS[054] VSS[160] VCC1_5_B[48] VCC3_3[14]
1
AG20 T12 Y25 C517 C514

VSS[055] VSS[161] R427 VCC1_5_B[49] 0.1U/16V/X7R_4 *I@1U/6.3V/X5R_4 *I@1U/6.3V/X5R_4
AG23 T13 AJ4
1
VSS[056] VSS[162] 0_4 +1.5V_APLL VCCHDA
AG3 VSS[057] VSS[163] T14 AJ19 VCCSATAPLL 2 GND SET 5
AG6 T15 +1.5V AJ3 +VCCSUSHDA R455 E@0_6 +3.3V_S5
VSS[058] VSS[164] VCCSUSHDA *I@IC(5P) G913C (SOT23-5)EP
AG9 T16 AC16
1 2
VSS[059] VSS[165] VCC1_5_A[01]
2
AH12 T17 +1.5V_APLL_RR AD15 AC8 TP_VCCSUS1.05_1 T47 *PAD R451 *I@0_6 +1.5V_S5
VSS[060] VSS[166] VCC1_5_A[02] VCCSUS1_05[1]
1
AH14 T23 L58 AD16 F17 TP_VCCSUS1.05_2 C516 R431
AH17
VSS[061] VSS[167]
B26 C506 AE15
VCC1_5_A[03] VCCSUS1_05[2] T65 *PAD 0.1U/16V/X7R_4 20 mil R2 *I@100K/F_4
1
VSS[062] VSS[168] VCC1_5_A[04]
ARX
AH19 U12 10uH/100MA_8 1U/10V/X5R_6 AF15
AH2
VSS[063]
VSS[064]
VSS[169]
VSS[170] U13 10uH+-20%_100mA 2 AG15
VCC1_5_A[05]
VCC1_5_A[06] VCCSUS1_5[1] AD8 TP_VCCSUS1.5_1 T46 *PAD Vout=1.25(1+R1/R2)
AH22 U14 AH15
VSS[065] VSS[171] VCC1_5_A[07] TP_VCCSUS1.5_2
AH25 U15 AJ15 F18
2
VSS[066] VSS[172] +1.5V_APLL VCC1_5_A[08] VCCSUS1_5[2]

AH28 VSS[067] VSS[173] U16
AH5 VSS[068] VSS[174] U17 +1.5V AC11 VCC1_5_A[09] Impact ICH9M VCCHDA and
1
2
AH8 AD23 AD11 A18 C261
1
AJ12 U26 C512 C511 AE11 D16 0.1U/16V/X7R_4 VCCSUSHDA supply 1.5V/3.3V
VCCPSUS
VSS[070] VSS[176] 1U/10V/X5R_6 10U/6.3V/X5R_8 C513 VCC1_5_A[11] VCCSUS3_3[02]
AJ14 U27 AF11 D17
2
1
ATX
AJ17 U3 1U/10V/X5R_6 AG10 E22
2
VSS[072] VSS[178] VCC1_5_A[13] VCCSUS3_3[04] +3.3V_S5

AJ8 V1 AG11 Support INT HDMI HDA
C VSS[073] VSS[179] VCC1_5_A[14] C
B11
VSS[074] VSS[180]
V13 AH10
VCC1_5_A[15] +VCCSUS3_3_0-5
40 mil R467 0_6 interface. These power
B14
VSS[075] VSS[181]
V15 AJ10
VCC1_5_A[16] VCCSUS3_3[05]
AF1 40 mil
B17 V23 only support 1.5V.Device
VSS[076] VSS[182]
B2 V28 +1.5V AC9
VSS[077] VSS[183] VCC1_5_A[17]
2
B20 V29 T1 C521 C518 C278 must to meet.
VSS[078] VSS[184] +1.5V VCCSUS3_3[06] 0.022U/16V 0.022U/16V 0.1U/16V/X7R_4
B23 V4 AC18 T2
B5 V5 AC19 T3
1
B8 VSS[081] VSS[187] W26 VCCSUS3_3[09] T4
C26
VSS[082] VSS[188]
W27 AC21
VCC1_5_A[20] VCCSUS3_3[10]
T5 NOTE:
C27 W3 +1.5V T6 If (G)MCH's HD Audio signals are connected to ICH9M for
VSS[083] VSS[189] VCCSUS3_3[11]
E11 Y1 G10 U6 WWAN Noise - ICH improvements
VCCPUSB
VSS[084] VSS[190] VCC1_5_A[21] VCCSUS3_3[12] iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
2
E14 VSS[085] VSS[191] Y28 G9 VCC1_5_A[22] VCCSUS3_3[13] U7

1
E18 Y29 C259 V6 +VCCSUS3_3_6-19 R484 0_8 only on 1.5V. These power pins on ICH9M can be supplied
VSS[086] VSS[192] 0.1U/16V/X7R_4 VCCSUS3_3[14]
E2 Y4 AC12 V7 with 3.3V if and only if (G)MCH's HDA is not connected to
1
VSS[087] VSS[193] L61 VCC1_5_A[23] VCCSUS3_3[15]

E21 Y5 AC13 W6 ICH9M. Consequently, only 1.5V audio/modem codecs can
1
E24 AG28 1uH_800MA AC14 W7 C224 C222 C225 C531
VSS[089] VSS[195] VCC1_5_A[25] VCCSUS3_3[17] 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 be used on the platform.
E5 AH6 Y6
VSS[090] VSS[196] VCCSUS3_3[18]
E8 AF2 AJ5 Y7
2
2
VSS[091] VSS[197] +1.5V_VCCGLANPLL VCCUSBPLL VCCSUS3_3[19]
F16 VSS[092] VSS[198] B25 +1.5V VCCSUS3_3[20] T7
F28 AA7
VSS[093] VCC1_5_A[26]
2
USB CORE
F29 A1 AB6 G22 TP_VCCCL1.05

VSS[094] VSS_NCTF[01] C576 C575 C208 VCC1_5_A[27] VCCCL1_05
G12 VSS[095] VSS_NCTF[02] A2 AB7 VCC1_5_A[28]
G14 A28 10U/6.3V/X5R_8 2.2U/10V/X5R_8 0.1U/16V/X7R_4 AC6 G23 TP_VCCCL1.5
1
VSS[096] VSS_NCTF[03] VCC1_5_A[29] VCCCL1_5
2
G18 A29 AC7 C264
VSS[097] VSS_NCTF[04] VCC1_5_A[30] 0.1U/16V/X7R_4
G21 AH1
VSS[098] VSS_NCTF[05]
2
G24 AH29 TP_VCCSUSLAN1 A10 A24 +3.3V C263 C252
1
VSS[099] VSS_NCTF[06] T140*PAD TP_VCCSUSLAN2 VCCLAN1_05[1] VCCCL3_3[1] *1U/10V_6 *0.1U/16V/X7R_4
G26 AJ1 A11 B24
VSS[100] VSS_NCTF[07] T137*PAD VCCLAN1_05[2] VCCCL3_3[2]
G27 AJ2 +3.3V
1
VSS[101] VSS_NCTF[08]
G8 AJ28 A12
VSS[102] VSS_NCTF[09] VCCLAN3_3[1]
2
H2 VSS[103] VSS_NCTF[10] AJ29 B12 VCCLAN3_3[2]

D H23 B1 C277 D
VSS[104] VSS_NCTF[11] 0.1U/16V/X7R_4 +1.5V_VCCGLANPLLA27
H28 B29
1
VSS[105] VSS_NCTF[12] VCCGLANPLL

H29
VSS[106]
GLAN POWER
ICH9M REV 1.0 +1.5V_PCIE_ICH

D28
D29
VCCGLAN1_5[1] PROJECT : AJ2
VCCGLAN1_5[2]
E26
E27
VCCGLAN1_5[3]
VCCGLAN1_5[4]
1
C270
4.7U/6.3V_6+3.3V A26 Size Document Number Rev
VCCGLAN3_3 Custom ICH9-M (POWER,GND) 1A
2
ICH9M REV 1.0

1 2 3 4 5 6 7 8
5 4 3 2 1
PANEL VCC CONTROL +3.3V

WEB CAM(Include BACKLIGHT function) 18
+15V_ALW
C322
0.1U/16V/X7R_4
D D
R334
330K_4 Q31
1
2
5
6
+5V_SUS AO6402
3LCDONG
R333 C321 LCDVCC L9 BLM21PG600SN1D
+PWR_SRC VIN_BLIGHT
100K_4 0.022U/25V/X7R_4
4
C19 C18 C20
0.1U/25V/Y5V_6 0.1U/25V/Y5V_6 10U/25V/X6S_1206
2
Q30
PDTC144EU Q29 R330 C319 C320
1
3
2N7002W-7-F 47_8 10U/6.3V/X5R_8 0.1U/16V/X7R_4
LCDDISCHG
R331 *I@0_4 2
7 INT_LVDS_DIGON
R332 E@0_4 Single LVDS 1366*768 Dial LVDS 1920*1080
22 EV_LVDS_VDDEN
3
R329 C318
*I@100K_4 47P/50V/NPO_4 LCDON# Q28
2
2N7002W-7-F LCD_ID0 TBD TBD
<Check list ver:0.8>
1
UMA: 100K pull-down to GND
LCD_ID1 HIGH LOW

C C
LCD CONNECTOR
L43 LCD_CON40P
BLM21PG600SN1D
20 mil
LCDVCC_1 1
LCDVCC 2
20 mil +3.3V
LCD_ID0 3
16 LCD_ID0 4
TXLOUT0+ EDIDCLK
22 TXLOUT0+ 5
TXLOUT0- EDIDDATA
BACKLIGHT CONTROL 22 TXLOUT0-
TXLOUT1+
16 LCD_ID1
LCD_ID1
TXLOUT0-
6
7
22 TXLOUT1+ 8
TXLOUT1- TXLOUT0+
22 TXLOUT1- 9
TXLOUT2+ TXLOUT1- 10
22 TXLOUT2+ 11
+3.3V TXLOUT2- TXLOUT1+
Modify for FAI 22 TXLOUT2- 12
TXLCLKOUT+ TXLOUT2- 13
22 TXLCLKOUT+
22 TXLCLKOUT-
TXLCLKOUT- TXLOUT2+ 14 T
15
22 EV_LVDS_BL_BRGHT
R47 *E@0_4 C41 Close to LCD CONN. CN1 22 TXUOUT0+
TXUOUT0+ TXLCLKOUT- 16 O
0.1U/16V/X7R_4 TXUOUT0- TXLCLKOUT+ 17
22 TXUOUT0- 18
R46 *I@0_4
7 L_BKLT_CTRL
22 TXUOUT1+
TXUOUT1+ TXUOUT0- 19 P
20
5
L11 0_4 PWM_INV_1 1 TXUOUT1- TXUOUT0+

30 PWM_INV
4 PWM_INV_2
22 TXUOUT1- 21 A
FPBACK TXUOUT2+ TXUOUT1- 22
2
B 22
22
TXUOUT2+
TXUOUT2-
TXUOUT2- TXUOUT1+ 23 N B
3
24
1
U2
Modify for C-TEST TC7SH08FU(F) PD18
22 TXUCLKOUT+
TXUCLKOUT+ TXUOUT2- 25 E
C34 TXUCLKOUT- TXUOUT2+ 26
UDZ5V6B-7-F
47P/50V/NPO_4
22 TXUCLKOUT- 27 A
TXUCLKOUT- 28
L
2
TXUCLKOUT+ 29
+5V 30
+3.3V
31
15 USBP8+ 32
15 USBP8- 33
D8 R357 FPBACK_L 34
FPBACK_L PWM_INV_2 35
2 1
2.2K_4
Modify for FAI 36
R356 E@0_4 EDIDDATA 37
SW1010CPT 22 EV_LVDS_DDCDAT 38
R355 *I@0_4 C342 EC17 39 42
7 INT_LVDS_EDIDDATA VIN_BLIGHT 40 41
+3.3V_ALW CN1
47P/50V/NPO_4 *1000P/16V/X7R_4
+3.3V
R348
330K_4
D7
R344 *I@1K_4 FPBACK 2 1 R349
7 INT_LVDS_BLON MXLID# 30
R345 E@1K_4 2.2K_4
22 EV_LVDS_BLON SW1010CPT R353 E@0_4 EDIDCLK
R346 C328 SW2
HALL sensor 22 EV_LVDS_DDCCLK
A *I@100K_4 47P/50V/NPO_4 2 R351 *I@0_4 A
+3.3V_ALW 7 INT_LVDS_EDIDCLK
<Check list ver:0.8> MXLID# 1 C331 EC18
3 47P/50V/NPO_4 *1000P/16V/X7R_4
UMA: 100K pull-down to GND
3
0.1U/16V/X7R_4
C326 ME268-002 C325
16 FPBACK# 2
1
Q3 1000P/50V/X7R_4
PDTC144EU PROJECT : AJ2
1

Custom LVDS/LCD CONN/LID/WEB CAM 1A

5 4 3 2 1
5 4 3 2 1
+3.3V
For UMA HDMI function
19
2
C617 TX2_HDMI+
Level Shift
2
L44 C616 *I@0.1U/16V/X7R_4
D
*I@0_6 *I@0.1U/16V/X7R_4
U17 R
R26
*100_4 HDMI PORT D
1
+3V_LS 2 TX2_HDMI-
1
VCC CN16
11 VCC
15 VCC
C324 C316 C323 C317 21 TX1_HDMI+ 1
VCC D2+
2
*I@0.1U/16V/X7R_4 *I@0.1U/16V/X7R_4 26 2
*I@0.01U/16V/X7R_4 *I@0.01U/16V/X7R_4 VCC R19 D2 Shield
33 VCC 3 D2-
40 VCC POWER G
*100_4 4 D1+
46 VCC 5 D1 Shield
TX1_HDMI- 6 20
1
D1- SHELL1
7 D0+ SHELL2 21
39 22 TXC_HDMI+ TX0_HDMI+ 8
22 INT_HDMITXP3 IN_D1+ OUT_D1+ D0 Shield
2
SDVOB_CLK+- 38 23 TXC_HDMI- 9 22
22 INT_HDMITXN3 IN_D1- OUT_D1- D0- SHELL3
R16 10 23
+3.3V TX0_HDMI+ B CK+ SHELL4
22 INT_HDMITXP0 42 IN_D2+ OUT_D2+ 19 *100_4 11 CK Shield
SDVOB_BLUE+- 41 20 TX0_HDMI- 12
22 INT_HDMITXN0 IN_D2- OUT_D2- CK-
From GMCH TX0_HDMI- 13
2 1
TX1_HDMI+ TXC_HDMI+ CE Remote
22 INT_HDMITXP1 45 IN_D3+ OUT_D3+ 16 14 NC
SDVOB_GREEN+- 44 17 TX1_HDMI- HDMISCL 15
22 INT_HDMITXN1 IN_D3- OUT_D3- DDC CLK
R338 R339 R15 HDMISDA 16
TX2_HDMI+ C F2 FUSE1A6V_POLY DDC DATA
22 INT_HDMITXP2 48 IN_D4+ OUT_D4+ 13 *100_4 17 GND
*I@2K/F_4 *I@2K/F_4 SDVOB_RED+- 47 14 TX2_HDMI- 2 1 +5V_HDMIC 18
22 INT_HDMITXN2 IN_D4- OUT_D4- +5V +5V
TXC_HDMI- 19
1
SDVO_CTRLCLK HDMI_DDCCLK HP DET
7 SDVO_CTRLCLK 9 SCL SCL_SINK 28
C
SDVO_CTRLCLK L42 0_6 C315 C
SDVO_CTRLDATA 8 29 HDMI_DDCDATA HDMI_DET_N 1 2 HDMI_DET_C HDMI_CONN
7 SDVO_CTRLDATA SDA SDA_SINK
SDVO_CTRLDATA *220P/50V_4
HDMI_HPD_CON 7 30 HDMI_HP_A
+3.3V HPD HPD_SINK
PC0 R335 *0_4 R328 *I@4.7K_4 32

PC1 R336 *I@0_4 R340 *I@4.7K_4 PC0 DDC_EN
3 PC0 GND 1
RT_EN# R343 *0_4 R341 *4.7K_4 PC1 4 5 +5V_HDMIC +5V_HDMIC
CFG1 R327 *0_4 R326 *4.7K_4 CFG1 PC1 GND
34 DDCBUF_EN GND 12
CFG0 R325 *0_4 R324 *4.7K_4 CFG0 35 18
OE# R323 *I@0_4 CFG GND
GND 24
GND 27
R342 *4.7K_4 RT_EN# 10 31 C13
OE# RT_EN# GND *0.01U/16V/X7R_4
25 OE# GND 36
R337 *I@499/F_4 REXT 6 37 R13 R12
REXT GND 2K/F_4 2K/F_4
GND GND 43
+3.3V
CONTROL EPAD 49
L6
*I@PS8101 HDMI_DDCCLK R11 33_4 HDMI_SCL_C 1 2 0_6 HDMISCL for EMI request
HDMI_DDCDATA R14 33_4 HDMI_SDA_C 1 2 0_6 HDMISDA
R36 L7
*I@20K/F_4 C15 C14
*10P/50V_4 *10P/50V_4
TMDS_HPD# 22
B B
3
HDMI_HPD_CON 2 R35
Q4 *I@7.5K/F_4
*I@2N7002W -7-F HDMI_HP_A R321 10K/F_4 HDMI_DET_N
1
R34
*I@100K/F_4
+3.3V
BAV99W D22
From MXM 3
1
22 HDMI_TX0P HDMI_TX0P RN1 1 2 E@0_4P2R TX0_HDMI+

HDMI_TX0N TX0_HDMI- 2
22 HDMI_TX0N 3 4
R322
22 HDMI_TX1P HDMI_TX1P RN2 1 2 E@0_4P2R TX1_HDMI+ 20K/F_4
EQUALIZATION SETTING 22 HDMI_TX1N HDMI_TX1N 3 4 TX1_HDMI-
PC1:PC0=0:0 8dB HDMI_TX2P RN3
22 HDMI_TX2P 1 2 E@0_4P2R TX2_HDMI+ Modify for C-TEST
PC1:PC0=0:1 4dB Recommanded 22 HDMI_TX2N HDMI_TX2N 3 4 TX2_HDMI-
PC1:PC0=1:0 12dB
HDMI_CLK+ RN4 1 2 E@0_4P2R TXC_HDMI+
PC1:PC0=1:1 0dB 22 HDMI_CLK+
HDMI_CLK- TXC_HDMI-
22 HDMI_CLK- 3 4
SCLZ/SDAZ Low-level input/output Voltage E@0_4P2R

HDMI_DDCCLK1 3 4 HDMI_DDCCLK
A
CFG1:CFG0=0:0 VIL:<0.4V VOL:0.6V (Default) 22 HDMI_DDCCLK1
HDMI_DDCDATA1 HDMI_DDCDATA A
22 HDMI_DDCDATA1 1 2
CGF1:CGF0=0:1 VIL:<0.36V VOL:0.55V RN18
CGF1:CGF0=1:0 VIL:<0.44V VOL:0.65V
HDMI_HP_A
CGF1:CGF0=1:1 VIL:<0.36V VOL:0.6V 22 HDMI_HP_A
PROJECT : AJ2
MXM DOES NOT NEED LEVEL SHIFT.
BYPASS PATH RESISTERS. Quanta Computer Inc.
Custom HDMI 1A

5 4 3 2 1
5 4 3 2 1
R4 2.2K_4
+3.3V
20
+3.3V
2
22 CRTDCLK 1 3
+5V Q1
2N7002E
D D
22 VSYNC 1 3
DDCCLK
C3 Q26
RHU002N06 CRT_VS_1 ESD PORTECTION
2
0.1U/16V/X7R_4 CRT_HS_1
1 3 CRTVDD_5V +3.3V
22 HSYNC
5
DDCDAT
2 Q27
15,23 PCIRST#
4 RHU002N06
2
1 +3.3V
D20
U16 R320 *2.2K_4 R6 2.2K_4 1 *BC000204Z21
+5V +3.3V
2
TC7SH08FU(F) CRT_R_1
3
22 CRTDDAT 1 3 2
Q2 D21
2N7002E 1 *BC000204Z21
CRT_G_1
3
2
D19
1 *BC000204Z21
CRT_B_1
3
CRTVDD_5V
2
C C
D16
2 1 CRT PORT
EC10QS04
F1 FUSE1A6V_POLY
2 1 CRTVDD2
+5V
C4 CN14
16
0.1U/16V/X7R_4 CRT_CONN
6
VGA_RED L4 CX8LL680001 CRT_R_1 1 11 CRT_SENSE# T93
22 VGA_RED
7
VGA_GRN L5 CX8LL680001 CRT_G_1 2 12
22 VGA_GRN C313
8
VGA_BLU L3 CX8LL680001 CRT_B_1 3 13 *180P/25V_4
22 VGA_BLU T92 D17
9 1
C10 C12 C8 4 14 *BC000204Z21
R9 R10 R8 C7 C11 C9 10 CRT_VS_2
150/F 150/F 150/F *5.6P/50V_4 *5.6P/50V_4 *5.6P/50V_4 3
5 15
5.6P/50V_4 5.6P/50V_4 5.6P/50V_4
2
D18
17
1 *BC000204Z21
CRT_HS_2
3
CRTVDD_5V
B 2 B
D4
1 *BC000204Z21
R5 2.2K_4 DDCCLK_2
DDCCLK 3
DDCDAT 2
D5
R7 2.2K_4 1 *BC000204Z21
DDCCLK L1 CX0HM121008 DDCCLK_2 DDCDAT_2
3
CRT_VS1 L40 CX0HM121008 CRT_VS_2
CRTVDD_5V 2
CRT_HS1 L41 CX0HM121008 CRT_HS_2
DDCDAT L2 CX0HM121008 DDCDAT_2

R317 1K_4
5
C310 C5 C311 C312 C6

0.1U/16V/X7R_4
*33P/50V/NPO_4 *33P/50V/NPO_4
2 4 CRT_VS0 R318 10_4 CRT_VS1 *33P/50V/NPO_4 *33P/50V/NPO_4
U14 Layout Note:

CRT_VS_1 AHCT1G125DCH
Place near U11 <
5
CRT_HS_1 200 mil
A 2 4 CRT_HS0 R319 10_4 CRT_HS1 A
U15
AHCT1G125DCH
PROJECT : AJ2
Custom CRT PORT 1A

5 4 3 2 1
5 4 3 2 1
21
U19 LANVCC
MDI0+
MDI1+
MDI3+
2 MDI2+
MDI0-
MDI1-
4 MDI2-
MDI3-
AVDDH 8
C410 0.1U/16V/X7R_4 PCIE_RXN2_LAN_L 50
15 PCIE_RX6-/GLAN_RX- TX_N
C409 0.1U/16V/X7R_4 PCIE_RXP2_LAN_L 49 1
15 PCIE_RX6+/GLAN_RX+ TX_P VDDO_TTL
2
4
2
4
2
4
15 PCIE_TX6-/GLAN_TX- 53 RX_N VDDO_TTL 40
54 45 RP42 RP41 RP40 RP39
15 PCIE_TX6+/GLAN_TX+ RX_P VDDO_TTL
61 *49.9/F_4P2R *49.9/F_4P2R *49.9/F_4P2R *49.9/F_4P2R
CLK_PCIE_LAN# VDDO_TTL
2 CLK_PCIE_LAN# 56
1
3
1
3
1
3
1
3
CLK_PCIE_LAN REFCLKN
D 2 CLK_PCIE_LAN 55 REFCLKP PD18LDO 4 D
LAN_N1
LAN_N2
AVDD18_OUT 32 +1.8V_LAN
LAN_N3
LAN_N4
35 SPI_DI AVDDL 28
34 19 C68 C363
SPI_DO AVDDL 0.1U/16V/X7R_4 4.7U/6.3V_6
37 SPI_CLK
36 SPI_CS
23 C362 C361 C360 C359
NC
NC 22
43 51 *0.01U/16V/X7R_4 *0.01U/16V/X7R_4 *0.01U/16V/X7R_4 *0.01U/16V/X7R_4
NC NC
NC 52
42 CLKREQn NC 57
NC 64
VPD_DATA 41 VPD_DATA
88E8057 VDD
VDD
2
7
+1.2V_LAN
VPD_CLK 38 13
R385 *0_4 VPD_CLK VDD
30 PM_LAN_RST# VDD 33
VDD 39
R379 0_4 LAN_REST# 5 44
7,15,22,26,32 PLTRST# PERSTn/TSTPT VDD +1.8V_LAN
VDD 48
ICH_PCIE_WAKE# 6 58
16,26,32 ICH_PCIE_WAKE# WAKEn VDD
R71 4.99K/F_4 LAN_RSET CTRL12
16 RSET CTRL12 3
L45 NEW P/N
46 BK1608HS220_6_1A
TESTMODE
NC 29
LANVCC 47 25 GSL5009-1
+3.3V VMAIN_AVLBL NC
24 MDI0+ 12 13 LAN_MX0+
C NC TD4- MX4-
Modify for C-TEST
RJ45 C
12 MDI0- 11 14 LAN_MX0-
R79 NC TD4+ MX4+
EC for 8507 08/04/11 9 NC
2K_4 11 31 MDI3- C352 0.01U/16V/X7R_4 V_DAC10 15 LAN_MCT0 R358 75/F_8 CN18
NC MDIN[3] MDI3+ TCT4 MCT4
MDIP[3] 30
R78 *0_4 LAN_DISABLE# 10 27 MDI2- MDI1+ 9 16 LAN_MX1+ 9
30 LAN_DISABLE#_0 LOM_DISABLEn MDIN[2] TD3- MX3- G1
26 MDI2+
LAN_XIN MDIP[2] MDI1- MDI1- LAN_MX1- LAN_MX0+
15 XTALI MDIN[1] 21 8 TD3+ MX3+ 17 1 0+
20 MDI1+ LAN_MX0- 2
LAN_XOUT MDIP[1] MDI0- C347 0.01U/16V/X7R_4 V_DAC 7 LAN_MCT1 R359 75/F_8 LAN_MX1+ 0-
14 XTALO MDIN[0] 18 TCT3 MCT3 18 3 1+
C69 27P/50V_4 LAN_XIN 17 MDI0+ LAN_MX2+ 4
MDIP[0] MDI2+ LAN_MX2+ LAN_MX2- 2+
LANCT3
6 TD2- MX2- 19 5 2-
1
74 LAN_MX1- 6
Y1 GND10 LAN_ACTLED# MDI2- LAN_MX2- LAN_MX3+ 1-
65 GND1 LED_ACTn 59 *PAD T104 5 TD2+ MX2+ 20 7 3+
25MHZ 66 60 100MBPS# LAN_MX3- 8
GND2 LED_LINK10/100n *PAD T103 3-
67 62 1000MBPS# C343 0.01U/16V/X7R_4 V_DAC 4 21 LAN_MCT2 R360 75/F_8 10
*PAD T101
2
C70 27P/50V_4 LAN_XOUT GND3 LED_LINK1000n 10_1000MBPS# TCT2 MCT2 G2

68 GND4 LED_DUPLEXn 63 *PAD T102
69 MDI3+ 3 22 LAN_MX3+
GND5 TD1- MX1- RJ45-C100F8-100B-8P-L
70 GND6
71 MDI3- 2 23 LAN_MX3- R40
GND7 TD1+ MX1+
72 GND8 75/F_8
73 C358 0.01U/16V/X7R_4 V_DAC 1 24 LAN_MCT3 R362 75/F_8
GND9 TCT1 MCT1
88E8057 U3
GSN5009-1: 1G C66
LANVCC Modify for C-TEST 1000P/3KV/NPO_1808 C25
1000P/3KV/NPO_1808
LAN-AGND Modify for C-TEST

B B
LAN-AGND
R80 R77
*4.7K_4 *4.7K_4
U5
VPD_DATA 5 1
VPD_CLK SDA A0
6 SCL A1 2
3 R354 0_6
A2
7 WP R368 0_6
EEPROM No Use R83 4 8
GND VCC LANVCC
0_4 R367 0_6
VPD_DATA Pull Down *24LC08
LANVCC LANVCC_L LAN-AGND

+1.2V_LAN
C78 10U/10V/X5R_8
L15
1
C397 0.1U/16V/X7R_4 BK1608HS220_6_1A C84 C379
ASM No ASM R84 C390 C411
0.1U/16V/X7R_4
C370 0.1U/16V/X7R_4 C82 *10U/4V/X6S_8 0.1U/16V/X7R_4 0.1U/16V/X7R_4
2
4.7K_4
4.7U/6.3V_6
R90, C373 0.1U/16V/X7R_4

3
Use BIOS R89 Q16

R88,U2 C412 0.1U/16V/X7R_4
E
1 B
C385 0.1U/16V/X7R_4 4
C
C
A R90, C85 C374 C366 C369 C389 C365 A

EEPROM R89 BCP69T1 4.7U/6.3V_6 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4
2
R88,U2
CTRL12
PROJECT : AJ2
Custom LAN(Marvell 88E8057) 1A

5 4 3 2 1
5 4 3 2 1
VIN_MXM CN20A
CN20B
4Amp
1
3
5
7
9
11
13
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
CLK_REQ#
PEX_RST#
125
127 PLTRST#
PLTRST# 7,15,21,26,32
TXUCLKOUT-
TXUCLKOUT+
TXUOUT0-
TXUOUT1-
148
150
172
166
LVDS_UCLK#
LVDS_UCLK
LVDS_UTX0#
DVI_A_CLK#
DVI_A_CLK
DVI_A_TX0#
207
209
225
219
HDMI_CLK-
HDMI_CLK+
HDMI_TX0N
HDMI_TX1N
HDMI_CLK- 19
HDMI_CLK+ 19
HDMI_TX0N 19
22
PWR_SRC LVDS_UTX1# DVI_A_TX1# HDMI_TX1N 19
15 TXUOUT2- 160 213 HDMI_TX2N
PWR_SRC LVDS_UTX2# DVI_A_TX2# HDMI_TX2N 19
121 CLK_MXM# 154
DVI-A
+5V PEX_REFCLK# CLK_MXM# 2 LVDS_UTX3# +3.3V
123 CLK_MXM
PEX_REFCLK CLK_MXM 2
0.5Amp 227 HDMI_TX0P
PEG_RXN[15:0] DVI_A_TX0 HDMI_TX0P 19
18 TXUOUT0+ 174 221 HDMI_TX1P
5VRUN PEG_RXN[15:0] 7 LVDS_UTX0 DVI_A_TX1 HDMI_TX1P 19
D TXUOUT1+ 168 215 HDMI_TX2P D
+3.3V LVDS_UTX1 DVI_A_TX2 HDMI_TX2P 19
115 PEG_RXN0 TXUOUT2+ 162 R37 +3.3V
PEX_RX0# PEG_RXN1 LVDS_UTX2 HDMI_HP_A
PEX_RX1# 109 156 LVDS_UTX3 DVI_A_HPD 205 HDMI_HP_A 19
1.5Amp 226 103 PEG_RXN2 E@4.7K_4
3V3RUN PEX_RX2#
2
228 97 PEG_RXN3
3V3RUN PEX_RX3#
LVDS
230 91 PEG_RXN4 TXLCLKOUT- 178
3V3RUN PEX_RX4# PEG_RXN5 TXLCLKOUT+ LVDS_LCLK# MXM_DDCCK MXM_DDCCK
PEX_RX5# 85 180 LVDS_LCLK DDCB_CLK 220 1 3 HDMI_DDCCLK1 19
+2.5V
DVI
79 PEG_RXN6 218 MXM_DDCDAT
PEX_RX6# PEG_RXN7 DDCB_DAT Q5
0.5Amp PEX_RX7# 73
222 67 PEG_RXN8 TXLOUT0- 202 159 E@RHU002N06
2V5RUN PEX_RX8# PEG_RXN9 TXLOUT1- LVDS_LTX0# DP_AUX#
PEX_RX9# 61 196 LVDS_LTX1# DP_AUX 161
+1.8V 55 PEG_RXN10 TXLOUT2- 190
PEX_RX10# PEG_RXN11 LVDS_LTX2# R38 *0_4
3.5Amp PEX_RX11# 49 184 LVDS_LTX3# DP_L0 177
2 43 PEG_RXN12 179
0C Change power 1V8RUN PEX_RX12# PEG_RXN13 DP_L0#
4 1V8RUN PEX_RX13# 37
name from +1.8V to
DVI-B
6 31 PEG_RXN14 TXLOUT0+ 204
+1.8V_MXM 0108 1V8RUN PEX_RX14# PEG_RXN15 TXLOUT1+ LVDS_LTX0
8 1V8RUN PEX_RX15# 25 198 LVDS_LTX1 DP_L1 201
10 TXLOUT2+ 192 195 +3.3V
1V8RUN PEG_RXP[15:0] LVDS_LTX2 DP_L2
12 1V8RUN PEG_RXP[15:0] 7 186 LVDS_LTX3 DP_L3 189
14 1V8RUN
117 PEG_RXP0 EV_LVDS_VDDEN 212
PEX_RX0 18 EV_LVDS_VDDEN LVDS_PPEN
111 PEG_RXP1 EV_LVDS_BLON 216 203 R41 +3.3V
PEX_RX1 18 EV_LVDS_BLON LVDS_BLEN DP_L1#
17 105 PEG_RXP2 EV_LVDS_BL_BRGHT 214 197
GND PEX_RX2 18 EV_LVDS_BL_BRGHT LVDS_BL_BRGHT DP_L2#
19 99 PEG_RXP3 191 E@4.7K_4
GND PEX_RX3 DP_L3#
2
20 93 PEG_RXP4 EV_LVDS_DDCCLK 210
GND PEX_RX4 18 EV_LVDS_DDCCLK DDCC_CLK
21 87 PEG_RXP5 EV_LVDS_DDCDAT 208 181
GND PEX_RX5 18 EV_LVDS_DDCDAT DDCC_DAT DP_HPD
22 81 PEG_RXP6 MXM_DDCDAT 1 3
GND PEX_RX6 HDMI_DDCDATA1 19
23 75 PEG_RXP7
GND PEX_RX7 PEG_RXP8 Q6
24 GND PEX_RX8 69 RSVD 183
29 63 PEG_RXP9 HSYNC 139 185 E@RHU002N06
GND PEX_RX9 PEG_RXP10 VSYNC VGA_HSYNC RSVD
32 GND PEX_RX10 57 141 VGA_VSYNC
35 51 PEG_RXP11 151
GND PEX_RX11 IGP
CRT
38 45 PEG_RXP12 VGA_RED 136 153 R43 *0_4
GND PEX_RX12 PEG_RXP13 VGA_GRN VGA_RED IGP
41 GND PEX_RX13 39 140 VGA_GREEN IGP 155
44 33 PEG_RXP14 VGA_BLU 144 163
GND PEX_RX14 PEG_RXP15 VGA_BLUE IGP
C 47 GND PEX_RX15 27 IGP 165 C
50 CRTDCLK 143 167
GND CRTDDAT DDCA_CLK IGP
53 GND 145 DDCA_DAT IGP 169
56 GND IGP 171
59 PEG_TXN[15:0] 173 HDA_RST# PIN change from 151 to 134
GND PEG_TXN[15:0] 7 IGP
62 +3.3V
GND PEG_TXN0 SDVOB_RED- 0
65 GND PEX_TX0# 118 128 TV_Y/HDTV_Y/TV_CVBS
68 112 PEG_TXN1 SDVOB_GREEN- 1 129
GND PEX_TX1# HDA_SYNC MXM_SYNC_HDMI 14
TV
71 106 PEG_TXN2 SDVOB_BLUE- 2 124 131
GND PEX_TX2# TV_C/HDTV_Pr HDA_BCLK MXM_BIT_CLK_HDMI 14
74 100 PEG_TXN3 SDVOB_CLK- 3 134 R373 E@0_4 R364
GND PEX_TX3# HDA_RST# MXM_RST#_HDMI 14
77 94 PEG_TXN4 132 147
GND PEX_TX4# TV_CVBS/HDTV_Pb HDA_SDI MXM_SDIN_HDMI 14 +3.3V
80 88 PEG_TXN5 149 *10K_4
GND PEX_TX5# HDA_SDO MXM_SDOUT_HDMI 14
83 82 PEG_TXN6
GND PEX_TX6# PEG_TXN7 MXM_ACIN
86 76 3 1
47K
GND PEX_TX7# PEG_TXN8 R372 E@0_4 THERM# MXM_PWROK R410 E@0_4
89 GND PEX_TX8# 70 5,16 THERM_ALERT# 137 THERM# RUNPWROK 16 PWROK_MXM 30
92 64 PEG_TXN9
10K
GND PEX_TX9# PEG_TXN10 MXMDATA MXM_ACIN R361
95 GND PEX_TX10# 58 133 SMB_DAT AC/BATT# 157
98 52 PEG_TXN11 MXMCLK 135
GND PEX_TX11# PEG_TXN12 SMB_CLK Q34 *10K_4
101 46
2
GND PEX_TX12# PEG_TXN13
104 GND PEX_TX13# 40
107 34 PEG_TXN14 E@MXM CONNECTOR_2 E@DTA114YUA
GND PEX_TX14#
3
110 28 PEG_TXN15
GND PEX_TX15#
113 GND
116 PEG_TXP[15:0]
GND PEG_TXP[15:0] 7
119 GND 2 ACIN 30,34
126 120 PEG_TXP0 SDVOB_RED+ 0
GND PEX_TX0 PEG_TXP1 SDVOB_GREEN+ 1 +3.3V Q33
130 GND PEX_TX1 114
138 108 PEG_TXP2 SDVOB_BLUE+ 2
GND PEX_TX2 PEG_TXP3 SDVOB_CLK+ 3 E@2N7002E
142 102
1
GND PEX_TX3 PEG_TXP4
146 GND PEX_TX4 96
152 90 PEG_TXP5
GND PEX_TX5 PEG_TXP6 R374 R376
164 84
170
GND
GND
PEX_TX6
PEX_TX7 78 PEG_TXP7 Q35 CRT
175 72 PEG_TXP8 E@RHU002N06 E@4.7K_4 E@4.7K_4 VGA_RED R69 *I@0_4
GND PEX_TX8 2 20 VGA_RED INT_CRT_RED 7
176 66 PEG_TXP9
GND PEX_TX9 PEG_TXP10 VGA_GRN R67 *I@0_4
B 182 GND PEX_TX10 60 20 VGA_GRN INT_CRT_GRN 7 B
187 54 PEG_TXP11 30,34 MBCLK 3 1 MXMCLK
GND PEX_TX11 PEG_TXP12 VGA_BLU R63 *I@0_4
188 GND PEX_TX12 48 20 VGA_BLU INT_CRT_BLU 7
193 42 PEG_TXP13
GND PEX_TX13 PEG_TXP14 HSYNC R371 *I@0_4
194 GND PEX_TX14 36 20 HSYNC INT_HSYNC 7
199 30 PEG_TXP15 +3.3V
GND PEX_TX15 VSYNC R370 *I@0_4
200
206
GND TO BAT/EC Q36
20 VSYNC INT_VSYNC 7
GND
2
211 E@RHU002N06 CRTDCLK R369 *I@0_4

GND 20 CRTDCLK INT_CRT_DDCCLK 7
217 GND
223 158 MXM_SPDIF_OUT 30,34 MBDATA 3 1 MXMDATA CRTDDAT R366 *I@0_4
GND SPDIF MXM_SPDIF_OUT 24 20 CRTDDAT INT_CRT_DDCDAT 7
224 GND
229 GND
231 122 EVPRSNT1# R375 E@0_4
GND PRSNT1#
232 26
GND PRSNT2# HDMI
PEG_RXP3 R384 *I@0_4 TMDS_HPD# 19
E@MXM CONNECTOR_2
PEG_TXN2 RN15 1 *I@0_4P2R INT_HDMITXN0
LVDS SDVOB_BLUE+- PEG_TXP2 3
2
4 INT_HDMITXP0
INT_HDMITXN0
INT_HDMITXP0
19
19
TXLCLKOUT+ RN8 1 2 *I@0_4P2R INT_TXLCLKOUT+ INT_TXLCLKOUT+ 7 PEG_TXN1 RN14 1 2 *I@0_4P2R INT_HDMITXN1 INT_HDMITXN1 19
18 TXLCLKOUT+
TXLCLKOUT- 3 4 INT_TXLCLKOUT- INT_TXLCLKOUT- 7 SDVOB_GREEN+- PEG_TXP1 3 4 INT_HDMITXP1 INT_HDMITXP1 19
18 TXLCLKOUT-
PEG_TXN0 RN13 1 2 *I@0_4P2R INT_HDMITXN2
+1.8V INT_HDMITXN2 19
TXLOUT0- RN6 3 4 *I@0_4P2R INT_TXLOUT0- SDVOB_RED+- PEG_TXP0 3 4 INT_HDMITXP2
+2.5V +5V 18 TXLOUT0- INT_TXLOUT0- 7 INT_HDMITXP2 19
TXLOUT0+ 1 2 INT_TXLOUT0+ INT_TXLOUT0+ 7 PEG_TXN3 RN16 1 2 *I@0_4P2R INT_HDMITXN3 INT_HDMITXN3 19
18 TXLOUT0+
L49 SDVOB_CLK+- PEG_TXP3 3 4 INT_HDMITXP3 INT_HDMITXP3 19
Value = E@UPB201212T 200MIL TXLOUT1+ RN5 1 2 *I@0_4P2R INT_TXLOUT1+ INT_TXLOUT1+ 7
18 TXLOUT1+
+ C450 C465 C466 TXLOUT1- 3 4 INT_TXLOUT1-
+PWR_SRC VIN_MXM 18 TXLOUT1- INT_TXLOUT1- 7
C334 C452
E@330U/2.5V_7 E@10U/10V_8 E@.1U/16V_4 TXLOUT2+ RN7 1 2 *I@0_4P2R INT_TXLOUT2+ SDVOB_CLK- 3 SDVOB_CLK+- 3
18 TXLOUT2+ INT_TXLOUT2+ 7
C453 C463 E@1U/10V_4 E@1U/10V_4 TXLOUT2- 3 4 INT_TXLOUT2-
18 TXLOUT2- INT_TXLOUT2- 7
E@0.1U/25V/Y5V_6 E@0.1U/25V/Y5V_6 SDVOB_BLUE- 2 SDVOB_BLUE+- 0
0C Change power name from +1.8V to +1.8V_MXM
0108 SDVOB_GREEN- 1 SDVOB_GREEN+- 1
A TXUCLKOUT+ RN12 1 2 *I@0_4P2R INT_TXUCLKOUT+ A
18 TXUCLKOUT+ INT_TXUCLKOUT+ 7
TXUCLKOUT- 3 4 INT_TXUCLKOUT- SDVOB_RED- 0 SDVOB_RED+- 2
18 TXUCLKOUT- INT_TXUCLKOUT- 7
VIN_MXM +3.3V TXUOUT0+ RN9 1 2 *I@0_4P2R INT_TXUOUT0+ From GM DVO to connector
18 TXUOUT0+ INT_TXUOUT0+ 7
TXUOUT0- 3 4 INT_TXUOUT0-
18 TXUOUT0- INT_TXUOUT0- 7
1
TXUOUT1+ RN10 1 2 *I@0_4P2R INT_TXUOUT1+

18 TXUOUT1+ INT_TXUOUT1+ 7
C458 C456 C457 C468 C461 C467 C470 + PC162 C327 C329 C332 TXUOUT1- 3 4 INT_TXUOUT1-
E@4.7U/25V_8 E@4.7U/25V_8 E@4.7U/25V_8 E@.1U/25V_4 E@.1U/25V_4 E@.1U/25V_4 E@100U/25V E@10U/10V_8 E@.1U/16V_4 *.1U/16V_4 TXUOUT2+ RN11 1 2 *I@0_4P2R INT_TXUOUT2+
18 TXUOUT2+ INT_TXUOUT2+ 7 PROJECT : AJ2
2
TXUOUT2- 3 4 INT_TXUOUT2-
*10U/25V_1206 Modify for RAMP (MXM acoustic issue) Size Document Number Rev
Custom MXM 1A

5 4 3 2 1
5 4 3 2 1
+3.3V
C554
0.1U/16V/X7R_4
C555
0.1U/16V/X7R_4
C543
0.1U/16V/X7R_4
C551
0.1U/16V/X7R_4
C545
4.7U/6.3V/X5R_8
23
+1.8V
+3.3V OZ126T_1.8V R507

*0_6
20 mil
D
C550 C553 C544 C542 D
C570 C589
4.7U/6.3V/X5R_8 0.1U/16V/X7R_4 0.1U/16V/X7R_4 *0.1U/16V/X7R_4
4.7U/6.3V/X5R_8 0.1U/16V/X7R_4
102
103
122
120
125
26
56
75
78
81
14
15
91
92
7
PCI_VCC
PCI_VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
AD31 0_6
19 AD31
AD30 20 R508
AD29 AD30
21 AD29
AD28 22 76 +1.8V_OUT
AD27 AD28 1.8VOUT
23 AD27 1.8VOUT 79
AD26 24 82
AD25 AD26 1.8VOUT NOTE: PLACE R9 - R29 NEAR CONNECTORS
25 AD25
AD24 27
AD23 AD24 SD/MS_CLK R465 33_4 SP15
29 AD23 NC 73
AD22 30 74 SD_D3 R482 33_4 SP16
AD21 AD22 NC SD_D2 R483 33_4 SP17
31 AD21 NC 72
AD20 32 71 SD_D1 R453 33_4 SP18 C528
AD19 AD20 NC SD_D0 R459 33_4 SP19
34 AD19 NC 128 *10P/50VC0G_4
AD18 35 SD_CMD R475 33_4 SP20
AD17 AD18 MC_3V#
36 AD17 MC_3V# 4
AD16 37 113 SD/MS_CLK
AD15 AD16 SD/MS_CLK SD_D3
47 AD15 SD_D3 111
AD14 48 112 SD_D2 MS_D1/XD_D7 R466 33_4 SP0
AD13 AD14 SD_D2 SD_D1 XD_D6 R448 33_4 SP1
49 AD13 SD_D1 107
AD12 50 108 SD_D0 XD_D5 R450 33_4 SP2
AD11 AD12 SD_D0 SD_CMD XD_D4 R457 33_4 SP3
51 AD11 SD_CMD 110
AD10 52 117 SM_WPI#/SD_WP MS_BS/XD_D3 R463 33_4 SP4
AD9 AD10 SM_W PI#/SD_W P SD_CD# MS_D0/XD_D2 R461 33_4 SP5
C 53 AD9 SD_CD# 114 C
AD8 54 MS_D2/XD_D1 R503 33_4 SP6 +5V +3.3V
AD7 AD8 MS_D1/XD_D7 MS_D3/XD_D0 R470 33_4 SP7
57 AD7 MS_D1/XD_D7 95
AD6 58 93 XD_D6 XD_CE# R494 33_4 SP8
AD5 AD6 XD_D6 XD_D5 XD_R/B# R499 33_4 SP9
59 AD5 XD_D5 89
ASSIGN IDSEL AD4 60 87 XD_D4 XD_CLE R493 33_4 SP10
AD25
AD3 AD4 XD_D4 MS_BS/XD_D3 XD_ALE R489 33_4 SP11 R468

61 AD3 MS_BS/XD_D3 88
3
AD2 62 90 MS_D0/XD_D2 XD_WE# R485 33_4 SP12 *10K_4
AD1 AD2 MS_D0/XD_D2 MS_D2/XD_D1 XD_RE# R497 33_4 SP13 Q41
63 AD1 MS_D2/XD_D1 94
AD0 64 96 MS_D3/XD_D0 XD_WP# R479 33_4 SP14 *AP2N7002K 60V 0.5A
AD0 MS_D3/XD_D0 XD_CE# MC_3V 2
15 AD[0..31] XD_CE# 119
28 100 XD_R/B#
15 C/BE3# C/BE3# XD_R/B#
38 118 XD_CLE
15 C/BE2# C/BE2# XD_CLE
3
46 109 XD_ALE
15 C/BE1# C/BE1# XD_ALE
55 105 XD_WE#
15 C/BE0#
1
C/BE0# XD_W E# XD_RE# MC_3V#
XD_RE# 101 2
R519 100_4OZIDSEL5 98 XD_WP# Q42
OZ126TCLK IDSEL XD_W PO# MS_CD#
2 OZ126TCLK 45 PCI_CLK MS_CD# 99
42 97 XD_CD# *PDTC144EU
15 PCI_DEVSEL#
1
DEVSEL# XD_CD#
15 PCI_FRAME# 39 FRAME#
40 9
15
15
PCI_IRDY#
PCI_TRDY# 41
IRDY#
TRDY#
MMC_D4
MMC_D5 10 XD,MMC/SD,MS/MSP
15 PCI_STOP# 43 STOP# MMC_D6 126
44 127 R445 *10K_4
15 PCI_PAR PAR MMC_D7
15 PCI_REQ0# 17 REQ#
18 R474 0_6 20 mil
15 PCI_GNT0# GNT#
1 C529 1U/10V/X5R_6 C523 CARD_3V3_OUT
15,20 PCIRST# PCI_RST# +3.3V
15 PCI_PIRQA# 11 INTA#
3 0.1U/16V/X7R_4
15 PCI_PME# PME# CARD_3V3_OUT
B 16,26,30 PCI_CLKRUN# 6 CLKRUN# 3.3V_IN 65 EC change C477 to B
66
106
3.3V_IN
69 CN27 0.1U and Add 10K.
PME#, CLKRUN# AND INTA# MEDIA_ACTV 3.3V_OUT
3.3V_OUT 70 21 SD-VCC
SP19 31
MUST BE PULLED-UP ON THE MLB. SP18 SD-DAT0
34
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SP17 SD-DAT1
NC
NC
NC
NC
NC
NC
9 SD-DAT2 XD-VCC 38
U28 SP16 11
OZ126T SP15 SD-DAT3 XD_CD#
25 2
12
16
33
67
68
104
115
116
121
123
124
77
80
83
13
86
85
2
8
84
SP20 SD-CLK XD-CD SP9

15 SD-CMD XD-R/B 3
SD_CD# 39 4 SP13
SM_WPI#/SD_WP SD-C/D XD-RE SP8
41 SD-W P XD-CE 5
6 SP10
XD-CLE SP11
19 SD-VSS1 XD-ALE 7
29 8 SP12
OZ126TCLK SD-VSS2 XD-W E SP14
40 SD-GND XD-W P 13
R542 12 23 SP7
SP5 MS-VCC XD-D0 SP6
*33_4 22 MS-DATA0 XD-D1 27
SP0 SP5
EMC SP6
24
20
MS-DATA1 XD-D2 30
32 SP4
MS-DATA2 XD-D3
reserved SP7
SP15
16 MS-DATA3 XD-D4 33 SP3
SP2
14 MS-SCLK XD-D5 35
C590 MS_CD# 18 36 SP1
SP4 MS-INS XD-D6 SP0
*0.1U/16V/X7R_4 26 MS-BS XD-D7 37
10 MS-VSS1 XD-GND1 1
28 MS-VSS2 XD-GND2 17
42 GND1 GND2 43
A A
CARD_READER
PROJECT : AJ2
Custom OZ126T(CARD READER) 1A

5 4 3 2 1
5 4 3 2 1
+3.3V
AUDIO CODEC Int. Stereo Speakers

24
+AVDDA +3.3V +3V_DVDD
+3V_DVDD
L33 BLM21PG600SN1D L60 BLM21PG600SN1D
C308
1U/10V/X5R_6 C574 C594 Modify for C-TEST
+AVDDA C601 10U/6.3V/X5R_8 1U/10V/X5R_6 C583
C309 CN13
C592 C584 C593 0.1U/16V/X7R_4 *10U/6.3V/X5R_8 0.1U/16V/X7R_4 AUD_SPK_L2 L32 BK1608HM241-T AUD_SPK_L-
10U/6.3V/X5R_8 1U/10V/X5R_6 AUD_SPK_L1 L37 BK1608HM241-T AUD_SPK_L+ 1
0.1U/16V/X7R_4 AUD_SPK_R2 L29 BK1608HM241-T AUD_SPK_R- 2
DVDD_1.8V AVEE C597 ADO_GND ADO_GND ADO_GND AUD_SPK_R1 L31 BK1608HM241-T AUD_SPK_R+ 3
1U/10V/X5R_6 4
C569 C603 C605 3800-E04N-00R
C582 C602 C607 10U/10V/X5R_8 C306 C301 C300 C295
E@0_6 R302 10u/10V_8 0.1U/16V/X7R_4 0.1U/16V/X7R_4 10u/10V_8 0.1U/16V/X7R_4
*100P/50V/NPO_4
*100P/50V/NPO_4
*100P/50V/NPO_4
*100P/50V/NPO_4
+3V_DVDD
D *I@0_6 R305 D
+1.5V ADO_GND ADO_GND
C585
44
26
40
36
0.1U/16V/X7R_4
9
4
3
U31
ADO_GNDADO_GNDADO_GNDADO_GND
VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44
AVDD_26
AVDD_40
AVEE
MIC_VREFO
34 AUD_HP_JACK_L
14 ICH_AZ_CODEC_RST# 11
RESET#
PORTA_L
PORTA_R
35 AUD_HP_JACK_R PC BEEP
6 19 BEEP2_R R532 0_4 EXT. Mic in Modify for FAI
14 ICH_AZ_CODEC_BITCLK BIT_CLK MICBIASB
14 ICH_AZ_CODEC_SYNC 10 14 R554
R535 33_4 ACZ_SDIN20561 SYNC PORTB_L 4.7K_4 CN34
14 ICH_AZ_CODEC_SDIN0 8 15
SDATA_IN PORTB_R +3V_DVDD
14 ICH_AZ_CODEC_SDOUT 5 1 7
SDATA_OUT C591 2.2U/6.3V/X5R_6 MIC1_L_1 L34 BK1608HM241-T MIC1_L_J
18 MIC_VREFO 2
MICBIASC MIC1_L MIC1_L_R R549 100_6 MIC1_L_1
16 6
PORTC_L MIC1_R MIC1_R_R MIC1_R_1 MIC1_R_1 L30 BK1608HM241-T MIC1_R_J
43 17 3
DIB_P PORTC_R R550 100_6 C571
42 4
DIB_N C595 2.2U/6.3V/X5R_6 Change to correct size 0603 C299 C307
*0.1U/10V/X5R_4 5 8
27
R546 *10K_4 GPIO1 BEEP PORTD_L 2SJ-R820-S01
12 28
100P/50V/NPO_4
100P/50V/NPO_4
5
PC_BEEP PORTD_R R533
BEEP C587 0.1U/16V_6 BEEP2
1 Normal Close
20 4
R548 *10K_4 GPIO2 SPDIF_OUT MIC_L 0_4
48 21 2
S/PDIF CX20561 MIC_R U30 ACZ_SPKR 16
MIC1_POWER
Change correct footprint to 0402
3
C578 *TC7SH08FU(F)
29 *1000P/16V/X7R_4
GPIO2 MONO AUD_LINE_OUT_L R545 5.11K/F_4
45 30 +AVDDA
R543 0_4 GPIO1 GPIO2 STEREO_L AUD_LINE_OUT_R
22 MXM_SPDIF_OUT 46 31
EAPD# GPIO1 STEREO_R R564 5.11K/F_4 HPSENSE# MIC1_PLG
47
EAPD#/GPIO0
3
+AVDDA
13 SENSEA R547 20K/F_4 MIC1_PLG Q24
SENSEA
2N7002K-T1-E3
DMIC_CLK 1 24 CX20561_VILT 2 10K_4 R310
30 DMIC_CLK DMIC_CLOCK VREF_FILT
30 DMIC0 DMIC0 2
DMIC_1/2 CX20561_FLY_P
39
1
FLY_P CX20561_FLY_N C606 1U/10V_4
37
FLY_N C604
1
C C
2
22 CX20561_RVD22 C600
DVSS_41
AVSS_25
AVSS_38
AVSS_49
VREF_HI
DVSS_7
C581 C588 23 CX20561_RVD23 10u/10V_8 0.1U/16V/X7R_4 C619

*100P/50V/NPO_4 *100P/50V/NPO_4 VREF_LO *Varistor_4
32
RESERVED_32
33
RESERVED_33 C598 C599 C565 0.1U/16V_6
CX20561-15Z R520 0_6
7
41
25
38
49
add pin 49 for QFN 8/21 1U/10V_4 1U/10V_4 ADO_GND C563 0.1U/16V_6
R551 0_6
PC Beep GAIN CONTROL C280 0.1U/16V_6 Headphone out + Spdif Out
GAIN GPIO1 GPIO2 R531 0_6
ADO_GND C586 0.1U/16V_6
R283 0_6
0dB 10K 10K EMC
+15V_ALW
ADO_GND ADO_GND
reserved
-6dB omit omit ADO_GND +5V
R304
-12dB 10K omit 1M_6
3
-18dB omit 10K SPDIF ON 2 Q23
+5V_SPK_AMP 2N7002K-T1-E3
R562
1
AUDIO AMPLIFIER 10K_4
3
Q25
SPDIF JACK EN
2 PDTC144EU SPDIF_VCC
Modify for FAI
1
AUD_SPK_R1 C579 100P/50V/NPO_4
2
AUD_SPK_R2 C564 100P/50V/NPO_4 C292
+5V_SPK_AMP +5V_SPK_AMP AUD_SPK_L1 C294 100P/50V/NPO_4 C613
AUD_SPK_L2 C287 100P/50V/NPO_4 Modify for C-TEST *Varistor_4 0.1U/16V/X7R_4
U29
2
AUD_SPK_R1 SPDIF_OUT R309 33_4 SPDIF_1

6
15
PVDD1 ROUT+
18
14 AUD_SPK_R2 R536 ADO_GND
Modify for FAI
PVDD2 ROUT-
B 16 100K_4 B
VDD AUD_SPK_L1 R308 C298
4
AUD_LINE_OUT_L C286 1U/16V/X7R_12 LIN-1 R297 0_6 LIN- LOUT+ AUD_SPK_L2 *110_6 *100P/50V/NPO_4
5 8
1
AUD_LINE_OUT_R C291 1U/16V/X7R_12 RIN-1 R301 0_6 RIN- LIN- LOUT- CN33
17
RIN- MUTE# HPJACK_R R306 HPSENSE#
19 9
C566 1 SHUTDOWN DRIVE
ADO_GND 2 1U/10V/X5R_6 RIN+ 9 *SW1010CPT D30 *0_4 8
C573 1 LIN+ IC
2 1U/10V/X5R_6 LIN+ 7 12 7
RIN+ NC VOLMUTE#_R R315 56_4
21
AMP_BYPASS EPAD SW1010CPT D29 AUD_HP_JACK_R HP_JACK_R_1 L35 BK1608HM241-T HP_JACK_R_2 HP JACK EN 1
ADO_GND 2 1 10 1 1 2
C560 1U/10V_6 BYPASS GND1 R316 56_4
11 3
GND2
C293
C580
AUDIO_G0 2 13 EAPD# AUD_HP_JACK_L 1 2 HP_JACK_L_1 L36 BK1608HM241-T HP_JACK_L_2 2

AUDIO_G1 GAIN0 GND3 SW1010CPT D28
3 20 4 11
GAIN1 GND4 C305 C304 SPDIF JACK EN 5 10
TPA6017A2/FAN7031/LM4874 R312 R311 6
100P/50V/NPO_4
100P/50V/NPO_4
100P/50V/NPO_4
100P/50V/NPO_4
*20K_4 *20K_4
ADO_GND audio/spdif
Modify for C-TEST Normal Open
VOLMUTE# R527 0_4 VOLMUTE#_R

30 VOLMUTE#
ADO_GND
Modify for FAI
AUDIO JACK
R567 56_4 1 CN35 7
AUD_HP_JACK_L 1 2 AUD_HP_JACK_L_1 L38 BK1608HM241-T JACK_L 2
R568 56_4 6
AUD_HP_JACK_R 1 2 AUD_HP_JACK_R_1 L39 BK1608HM241-T JACK_R 3
4
6017A2 Gain Table Modify for C-TEST ADO HP SENSE 5 8
GAIN0 GAIN1 AV(INV) C302 C303 2SJ-R820-S01

+5V +5V_SPK_AMP +5V R313 R314 Normal Close
100P/50V/NPO_4
100P/50V/NPO_4
0 0 6dB *20K_4 *20K_4
L28 Place close U29 +3.3V HPSENSE#
2 1 0 1 10dB V
3
BLM21PG600SN1D R563
A 1 0 15.6dB R558 10K_4 A
1
C282 C577
10U/10V/X5R_8 C572 C290 .047U/25V_4 4.7K_4 HPSENSE Q46
1 1 21.6dB 2
3
2N7002K-T1-E3
2
0.1U/16V/X7R_4 0.1U/16V/X7R_4
+5V_SPK_AMP
HP JACK EN 2 Q47
1
ADO_GND
R541 *100K/F_4 AUDIO_G0 R540 10K/F_4
Modify for FAI 2N7002K-T1-E3
ADO HP SENSE
1
1
R538 10K/F_4 AUDIO_G1 R537 *10K/F_4

PROJECT : AJ2
1
2

2
C615
*Varistor_4 C614
*Varistor_4 Size Document Number Rev
Custom AUDIO(CX20561)&CONN 1A

5 4 3 2 1
A B C D E
25
4 4
+3.3V_SUS +1.5V
For MDC Module 20 mil 20 mil

R223 R224
E@0_6 *I@0_6
+3.3V_SUS
2
C219
0.1U/16V/X7R_4
1
CN28
1 GND RSV 2
14 ICH_AZ_MDC_SDIN1 ICH_AZ_MDC_SDIN1 R481 33_4 SDIN_MDC ICH_AZ_MDC_SDOUT 3 4
ICH_AZ_MDC_BITCLK R469 0_4 BIT_CLK_MDC AC_SDO RSV
14 ICH_AZ_MDC_BITCLK 5 GND 3.3V 6
ICH_AZ_MDC_SDOUT ICH_AZ_MDC_SYNC 7 8
14 ICH_AZ_MDC_SDOUT AC_SYNC GND
ICH_AZ_MDC_SYNC SDIN_MDC 9 10
14 ICH_AZ_MDC_SYNC AC_SDI GND
ICH_AZ_MDC_RST# ICH_AZ_MDC_RST# 11 12 BIT_CLK_MDC
14 ICH_AZ_MDC_RST# AC_RST# AC_BCLK
MDC R471
C530 *33_4
*10P/50VC0G_4
C525
*10P/50VC0G_4
3 3
Change P/N
RJ11
3
CN19
TIPL
G1
1 C81 MDC_CON.
1
2 *470P/3KV_1808
2 1
2
G2
CN21
RJ11-CON C80
4
2 2
*470P/3KV_1808
RINGL
1 1
PROJECT : AJ2
Custom MODEM(MDC)/RJ11 BOARD 1A

A B C D E
A B C D E
+3.3V_SUS
26
WLAN_LED# D12
WIRELESS_LED# 31
CH501H-40PT
D MiniCard WLAN connector 1(Full) D
+3.3V WWAN_LED# D13 C249 C245
+1.5V 0.1U/16V/X7R_4 10U/6.3V/X5R_8
*CH501H-40PT
CN30
R221 *0_4 51 52
T73 Reserved +3.3V
R225 *0_4 49 50
16 CL_RST#1 Reserved GND
R226 *0_4 47 48
16 CL_DATA1 Reserved +1.5V
R228 *0_4 45 46 R227 *0_4 BT_LED# +1.5V +3.3V_SUS
16 CL_CLK1 Reserved LED_W PAN# BT_LED# 29,31
43 44 WLAN_LED#
T48 Reserved LED_W LAN#
41 42 WWAN_LED# T52 R268 +3.3V_SUS
Reserved LED_W W AN# *10K_4
FAI Add for EMI 39 Reserved GND 40
T50 37 Reserved USB_D+ 38 USBP4+ 15
35 36 USBP4- 15 C229 C269 C221
PCLK_LPC_DEBUG GND USB_D- 0.047U/10V/X7R_4 0.047U/10V/X7R_4 0.1U/16V/X7R_4
15 PCIE_TX1+ 33 PETp0 GND 34
31 32 CGDAT_SMB_M
15 PCIE_TX1- PETn0 SMB_DATA
29 30 CGCLK_SMB_M
R242 GND SMB_CLK
27 GND +1.5V 28
22_4 25 26
15 PCIE_RX1+ PERp0 GND +3.3V_SUS
15 PCIE_RX1- 23 PERn0 +3.3Vaux 24
21 22 PLTRST#
R243 0_4 PCLK_LPC_DEBUG_MINI GND PERST# WLAN_RF_OFF#
2 PCLK_LPC_DEBUG 19 UIM_C4 W _DISABLE# 20
C231 R247 0_4 PLTRST#_MINI 17 18
7,15,21,22,32 PLTRST# UIM_C8 GND C248 C220 C273 C217 C241
22P/50V/NPO_4 +3.3V_SUS FOR SYSTEM DEBUG 15 16 R263 0_4
GND UIM_VPP LPC_LFRAME# 14,30
R264 0_4
0.1U/16V/X7R_4
0.047U/10V/X7R_4
0.1U/16V/X7R_4
0.047U/10V/X7R_4
13 14
4.7U/6.3V/X5R_8
2 CLK_PCIE_MINI1 REFCLK+ UIM_RESET LPC_LAD3 14,30
11 12 R265 0_4
2 CLK_PCIE_MINI1# REFCLK- UIM_CLK LPC_LAD2 14,30
2
9 10 R266 0_4
GND UIM_DATA LPC_LAD1 14,30
MINI1CLK_REQ# 7 8 R267 0_4
2 MINI1CLK_REQ# CLKREQ# UIM_PW R LPC_LAD0 14,30
C 29 COEX2 COEX2 5 6 C
COEX1 COEX2 +1.5V
29 COEX1 3 COEX1 GND 4
ICH_PCIE_WAKE# 3 1 PCIE_WAKE_MINI_1# 1 2
W AKE# +3.3V
PDTC144EU 67910-0002
For ACER LPC Debug USE
Q21
+3.3V_SUS R270 10K_4 MINI1CLK_REQ#
MiniCard connector 2 (half)
+3.3V +3.3V +1.5V

CN32
T88 51 Reserved +3.3V 52
T90 49 Reserved GND 50
47 48 +1.5V +3.3V_SUS +3.3V_SUS
B T91 Reserved +1.5V B
45 46 LED_WPAN#_MINI2 T70
T84 Reserved LED_W PAN#
43 44 WLAN_LED# T74
T80 Reserved LED_W LAN#
41 42 WWAN_LED# T75
Reserved LED_W W AN# R262 + C519
39 Reserved GND 40 +3.3V_SUS
37 38 USBP7+ *10K_4 C250 C255 *330U/6.3V_7343 C238
T72 Reserved USB_D+ USBP7+ 15
35 36 USBP7- 0.047U/10V/X7R_4 33P/50V/NPO_4 0.1U/16V/X7R_4
GND USB_D- USBP7- 15
15 PCIE_TX2+ 33 PETp0 GND 34
15 PCIE_TX2- 31 PETn0 SMB_DATA 32 CGDAT_SMB_M 2,12,13
29 GND SMB_CLK 30 CGCLK_SMB_M 2,12,13
27 GND +1.5V 28
25 26 +3.3V_SUS
15 PCIE_RX2+ PERp0 GND
15 PCIE_RX2- 23 PERn0 +3.3Vaux 24
21 22 PLTRST#
GND PERST# PLTRST# 7,15,21,22,32
PCLK_LPC_DEBUG_MINI 19 20 WLAN_RF_OFF#
UIM_C4 W _DISABLE# WLAN_RF_OFF# 15,31
PLTRST#_MINI 17 18
UIM_C8 GND C253 C216 C561 C254 C562
+3.3V_SUS
33P/50V/NPO_4
33P/50V/NPO_4
0.047U/10V/X7R_4
0.047U/10V/X7R_4
4.7U/10V/X5R_8
15 GND UIM_VPP 16 LPC_LAD0 14,30
2 CLK_PCIE_MINI2 13 REFCLK+ UIM_RESET 14 LPC_LAD1 14,30
2 CLK_PCIE_MINI2# 11 REFCLK- UIM_CLK 12 LPC_LAD2 14,30
2
9 GND UIM_DATA 10 LPC_LAD3 14,30

MINI2CLK_REQ# 7 8
2 MINI2CLK_REQ# CLKREQ# UIM_PW R LPC_LFRAME# 14,30
COEX2 5 6
T86 COEX2 +1.5V
COEX1 3 4
T87 COEX1 GND
3 1 PCIE_WAKE_MINI_2# 1 2
16,21,32 ICH_PCIE_WAKE# W AKE# +3.3V
PDTC144EU 67910-0002
For TAG LPC Debug use
Q22
+3.3V_SUS R300 10K_4 MINI2CLK_REQ#

A A
PROJECT : AJ2
Custom MINI PCI-E Card 1A

A B C D E
5 4 3 2 1
27
SATA CD-ROM
D CN25 D
1 GND1
14 SATA_TX1+ 2 TXP
14 SATA_TX1- 3 TXN
4 GND2
14 SATA_RX1- C163 1 2 0.01U/25V/X7R_4 SATA_RXN1_C 5
C159 1 RXN
14 SATA_RX1+ 2 0.01U/25V/X7R_4 SATA_RXP1_C 6 RXP
7 GND3
R124 1K/F_4
1 2 SATA_DP 8 DP
9 +5V
+5V 10 +5V
11 MD
12 GND
13 GND
14 GND
15 GND
16 GND
17 GND
SATA ODD
80 mils
+5V
10U/6.3V/X5R_8 C135
10U/6.3V/X5R_8C135
0.1U/16V/X7R_4 C108
0.1U/16V/X7R_4C108
0.1U/16V/X7R_4 C126
0.1U/16V/X7R_4C126
0.1U/16V/X7R_4 C115
0.1U/16V/X7R_4C115
0.1U/16V/X7R_4 C120
0.1U/16V/X7R_4C120
C C
SATA CONNECTOR
CN29
B B
GND1 1
TXP 2 SATA_TX0+ 14
TXN 3 SATA_TX0- 14
GND2 4
5 SATA_RXN0_C C2511 2 0.01U/25V/X7R_4
RXN SATA_RX0- 14
6 SATA_RXP0_C 1 2 0.01U/25V/X7R_4
RXP SATA_RX0+ 14
7 C244
GND3 +3.3V
3.3V 8 +3.3V ESD recommend

3.3V 9
10 C537 C533 C532
3.3V
GND 11
12 4.7U/6.3V/X5R_8 0.1U/16V/X7R_4 *470P/50V_4
GND
GND 13
5V 14 +5V
5V 15
5V 16
GND 17
18 SATA_P11 T121
RSVD
GND 19
12V 20 100 mil
12V 21 +5V
12V 22
C522 C520 C524
1000P/16V/X7R_4 0.1U/16V/X7R_4 10U/10V/X5R_8

Serial ATA
A A
PROJECT : AJ2
Custom SATA HDD ODD 1A

5 4 3 2 1
5 4 3 2 1
28
+5V_SUS
D
18,33,36,38,40 +5V_SUS +5V_SUS
TO USB Board C283
*0.1U/16V/X7R_4 D
100 mil 40 mil CN12

90 mil
USB2PWR 1 1
C98 U7 120 mil C549 U27 2
10U/10V/Y5V_8 USB1PWR 10U/10V/Y5V_8 USB2PWR 2
2 IN1 OUT3 8 2 IN1 OUT3 8 3 3
3 7 3 7 USBP2- 4
IN2 OUT2 IN2 OUT2 15 USBP2- 4
6 C102 6 C558 + C552 USBP2+ 5
OUT1 OUT1 15 USBP2+ 5
Modify for C-TEST 4 10U/10V/Y5V_8 Modify for C-TEST 4 10U/10V/Y5V_8 6
EN# EN# 6
1 GND 1 GND 7 7
5 5 *100U/6.3V/TAN_6 USBP5- 8
OC# USB_OC1# 15 OC# USB_OC2# 15 15 USBP5- 8
USBP5+ 9
15 USBP5+ 9
G545A2 G545A2 10 10
Modify for C-TEST 87213-1000G
USB-0
RP23 0X2 USB1PWR
2 1 CN26
4 3
C
4 GND 5 C
3 GND 6
*WCM2012-90 USBP_0- 7
USBP_0- C183 + C464 2 GND
15 USBP0- 4 3 1 GND 8
1 2 USBP_0+ USBP_0+
15 USBP0+
0.1U/16V/X7R_4
100U/6.3V/TAN_6
1
L24 C177 020173MR004S582ZL
2
Varistor_4
1
2
2
C199 C193
Clamp-Diode_4 Clamp-Diode_4
USB1PWR
USB-1
RP10 CN22
2 1
4 3 4 GND 5
3 GND 6
0X2 USBP_1- 7
*WCM2012-90 C423 + C434 2 GND
1 GND 8
4 3 USBP_1- USBP_1+
15 USBP1-
USBP_1+
0.1U/16V/X7R_4
1 2
100U/6.3V/TAN_6
1
15 USBP1+
C422 020173MR004S582ZL
B B
L18
Varistor_4 2
1
2
2
C128 C116
Clamp-Diode_4 Clamp-Diode_4
A A
PROJECT : AJ2
Custom USB CONN 1A
5 4 3 2 1
A B C D E
29
D D
BLUETOOTH CONNECTOR
+15V_ALW +3.3V_SUS V_BT
20 mil CN5
R45 C39 *0.1U/16V/X7R_4
1
3
1M_4
2
15 USBP9+ 3
15 USBP9- 4
BT_ON 2 Q15
T6 5
AO3404 26 COEX2 R52 0_4 BT_BUSY
R51 0_4 WIFI_BUSY 6
V_BT 26 COEX1 7
T5 8
3
1
2 BT_LED# USB_BT_CON.
16,31 BT_ON# Q7 26,31 BT_LED#
C C
2N7002W-7-F
1
R50 R49
C46 C49 *0_4 *0_4
0.1U/16V/X7R_4 10U/6.3V/X5R_8
B B
A A
PROJECT : AJ2
Custom BT 1A

A B C D E
5 4 3 2 1
IT8512_AVCC L16 BLM11A05_6
30
+3.3V_ALW +3.3V
+RTC_CELL
C91 C92 L19 BLM11A05_6 +3.3V_ALW
Q17
POWER SWITCH +3.3V_LED
2
1000P/16V/X7R_4 0.1U/16V/X7R_4 (For PLL Power) 2N7002W-7-F
R402 5,31 ABCLK 1 3 ABCLK_L

0_4 L17 BLM11A05_6 C143
0.1U/16V/X7R_4
+3.3V
IT8512_AGND
TO MMB/ THM
IT8512_VSTBY
RTC_VCC +3.3V_ALW Layout Note: Q18 +3.3V_ALW C2
2
Place all capacitors close to IT8502. 2N7002W-7-F *10U/6.3V/X5R_8 Modify for C-TEST
5,31 ABDATA 1 3 ABDATA_L
R57 R3 R2 R1
C433 C439 C438 C194 C377 C383 C427 NC_TEMP 10K_4 *300_4 *300_4 300_4
D NC_TEMP 39 SW1 D
TP_MD_R 31
NBSWON#
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
0.1U/16V/X7R_4
TP_MD_L 31 1 3
CAPSLED 31 5
LAN_DISABLE#_0 21 ESD recommend C53 C1 2 4
*1000P/16V/X7R_4 Power ON S/W
PWROK_MXM 22
PWROK D3 D2 D1
VOLMUTE# 24
0.1U/16V/X7R_4
PWROK 7,16
T105 C413
+3.3V RTC_VCC *ORANGE LED *ORANGE LED ORANGE LED
RSMRST# 16
Layout Note: *1000P/16V/X7R_4 CLOSE TO SW1
IMVP_VR_ON 38
net "3VPCU" and "RTC_VCC" +3.3V_ALW
LAN_POWER 33
minimum trace width 12mils. MAINON 33,36,37
SUSON 33,36
S5_ON 39
8502_CLKRUN R106
PCI_CLKRUN# 16,23,26
PCI_CLK_8512 R94 *33_4 C93 *0.1U/16V/X7R_4 C420 0_4
+5V +3.3V_ALW
EMC 0.1U/16V/X7R_4
114
121
127
107
reserved U6 ABCLK_L R118 2.2K_4
11
26
50
92
74
84
83
82
56
57
33
19
20
99
98
97
96
95
94
93
3
ABDATA_L R119 2.2K_4
10 110 MBCLK MBCLK R115 4.7K_4
TO BAT/MXM
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
GPE3/ISCLK
GPE2/ISAS
VCC
AVCC
GPE1/ISAD
CLKRUN
KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7
GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
14,26 LPC_LAD0 LAD0 SMCLK0/GPB3 MBCLK 22,34
8
6
4
2
9 111 MBDATA MBDATA R116 4.7K_4
14,26 LPC_LAD1 LAD1 SMDAT0/GPB4 MBDATA 22,34
8 115 ABCLK_L RN17 R103 R104
14,26 LPC_LAD2 LAD2 SMCLK1/GPC1
SM BUS
7 116 ABDATA_L 10K_8P4R 10K_4 10K_4
14,26 LPC_LAD3 LAD3 SMDAT1/GPC2
22 117 GPF6 LPCPD R90 10K_4
18 MXLID# LPCRST#/WUI4/GPD2 SMCLK2/GPF6
PCI_CLK_8512 13 118 R552 *1K_4
2 PCI_CLK_8512 LPCCLK SMDAT2/GPF7 T148
6 The ID is for M/B rev: E, LED behavior +3.3V
7
5
3
1
14,26 LPC_LFRAME# LFRAME#
85 MSCLK
T15 LPCPD PS2CLK0/GPF0 MSDATA
17 LPCPD#/WUI6/GPE6 PS2DAT0/GPF1 86
87 KPCLK VSAT R378 10K_4
PS2CLK1/GPF2 KPDATA
14 GATEA20 126 GA20/GPB5 GPIO PS2DAT1/GPF3 88
PS/2
5 89 TPCLK +3.3V_ALW
16,26 IRQ_SERIRQ SERIRQ PS2CLK2/GPF4 TPCLK 31
C KBSMI#1 15 90 TPDATA C
16 KBSMI# ECSMI#/GPD4 PS2DAT2/GPF5 TPDATA 31
SW1010CPT D10 SCI#1 23 LPC
16 SCI# ECSCI#/GPD3
SW1010CPT D9 WRST_8502# 14 BL/C# R99 100K_4
WRST# BAT_RED_LED# R114 10K_4
14 RCIN# 4 KBRST#/GPB6
16 SWI SWI 16 BAT_GREEN_LED# R113 10K_4
PWUREQ#/GPC7
24 GPC4 R121 *10K_4
PWM0/GPA0 PWRLED1 31
25
+3.3V_ALW
34 D/C# D/C#
CPB2
119
123
GPC0
GPB2
IT8502 PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
PWM_FAN2 T14
LED_ON# 31
PWM_FAN1 5
LAN_WOL_EN 16 Didital Mic & Light Sensor

31 KB_BACKLIGHT
PWM5/GPA5 KB_BACKLIGHT 33
PWM6/GPA6 32 ME_EC_ALERT 16
R92 Note 1 : Since all GPIO belong to VSTBY power domain, and PWM 34 +3.3V
PWM7/GPA7 PWM_INV 18
470K_4 +3.3V_ALW there are some special considerations below:
47 FANSIG1 5
(1) If it is output to external VCC derived power domain TACH0/GPD6
2
WRST_8502# 48 FANSIG2 T11 Modify for F VERSION
circuit, this signal should be isolated by a diode such as TACH1/GPD7 R565
C88 R112 KBRST# and GA20. 120 GPC4 +5V *I@0_4
0.1U/16V/X7R_4 *10K_4 TMR0/WUI2/GPC4 +3.3V_DMIC
(2) If it is input from external VCC derived power domain TMR1/WUI3/GPC6 124 S4_STAT# 16 +3.3V_ALW PU10
Modify for C-TEST
1
circuit, this external circuit must consider not to float the 1 5 +3.3V_DMIC
IT8502_TM GPIO input. VIN VOUT +3.3V +3.3V_DMIC
2
125 NBSWON# C622
PWRSW/GPE4 NBSWON# CN4
E@2.2U/10V/X5R_8
18 R117 2 C54
RI1#/WUI0/GPD0 SUSB# 16 GND
R129 WAKE UP 21 10K_4 0.1U/16V/X7R_4 1
ACIN 22,34
1
100K_4 RI2#/WUI1/GPD1 R44 DMIC0_1 1
Note 2 : 2 2
35 VSAT 3 4 *10K_4 DMIC_CLK_1 3
(1) Each input pin should be driven or pulled. WUI5/GPE5 Board_ID
VSAT 31 EN NC 3
TMKBC Function (2) Each output-drain output pin should be pulled. RING#/PWRFAIL#/LPCRST#/GPB7 112 4 4
E@G9091-330T11U(SOT23-5) 5 5
High Enable 6 6
109 BAT_RED_LED# CPB2 7
TXD/GPB1 BAT_RED_LED# 31 7
Disable UART 108 BAT_GREEN_LED# R42 ABCLK 8
Low RXD/GPB0 BAT_GREEN_LED# 31
*0_4 ABDATA 8
Modify for F VERSION 9 9
24 DMIC0 +3.3V 10 10
B ADC0/GPI0 66 TEMP_MBAT 34 24 DMIC_CLK B
R128 0_4 IT8502_TM 106 67 MBATV 87213-1000G
34 CELL_SLT FLRST#/WUI7/GPG0/TM ADC1/GPI1 MBATV 34
8512_SCK 105 68 NUMLED T12 C62
FLCLK/SCK ADC2/GPI2
2
T18 EC_GPG6 104 69 0.1U/16V/X7R_4
FLAD3/GPG6 ADC3/GPI3 T13
8512_SO 103 FLASH 70 T10 R539 R534
8512_SI FLAD2/SO ADC4/GPI4
102 71
DMIC_CLK_1
FLAD1/SI ADC5/GPI5 T9
8512_SCE# 101 72 R570 0_4 HWPG HWPG 33,35,36,37 100_4 0_4
FLAD0/SCE# ADC6/GPI6
DMIC0_1
16 EC_ME_ALERT 100 A/D D/A 73 SUSC# 16
1
FLFRAME#/GPG2 ADC7/GPI7
MY0 36
R110 MY1 KSO0/PD0
37
*100K_4 MY2
MY3
38
39
KSO1/PD1
KSO2/PD2
76 CC_SET 34
C611 C610 16Mbit (2M Byte), SPI
MY4 KSO3/PD3 DAC0/GPJ0 CV_SET
40 KSO4/PD4 KBMX DAC1/GPJ1 77 T16
MY5 41 78 BL/C# 100P/50V_4 100P/50V_4 +3.3V_ALW
KSO5/PD5 DAC2/GPJ2 BL/C# 34
MY6 42 79
KSO6/PD6 DAC3/GPJ3 PM_LAN_RST# 21
MY7 43 80 DNBSWON_R 1 2
KSO7/PD7 DAC4/GPJ4 DNBSWON# 16
MY8 8502_GPJ5 D11 SW1010CPT
R3444 FLASH TYPE SELECT MY9
44 KSO8/ACK# DAC5/GPJ5 81 T17
45 KSO9/BUSY
LPC/FWH FLASH ROM MY10 46 R149 R166
High MY11 KSO10/PE IT8502_CK32KE 10K_4 10K_4
51 2
KSI3/SLIN#
KSO11/ERR# CK32KE
KSI1/AFD#
KSI0/STB#
KSI2/INIT#
SPI FLASH ROM (Default) MY12 52 CLOCK 128

Low MY13 KSO12/SLCT CK32K
53 KSO13
AVSS
MY14 54
KSI4
KSI5
KSI6
KSI7
8502_WP#
8502_HOLD#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MY15 KSO14
55 KSO15
Y2
31 MY[0..15]
58
59
60
61
62
63
64
65
27
49
91
113
122
75
12
IT8502_CK32K
1 4
IT8512E/DX-L U8
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
2 3 8512_SCE# 1 8
8512_SCK R137 47_4 8512_SCK1 CE# VDD
6 SCK
32.768KHZ 8512_SI R136 47_4 8512_SI1 5 C398
31 MX[0..7] SI
8512_SO R111 15_4 8512_SO1 2 7
IT8512_AGND SO HOLD#
0.1U/16V/X7R_4
C114 C105 3 4
R393 10P/50V/C0G_4 10P/50V/C0G_4 WP# VSS
A R580 C631 C632 *0_4 C419 C418 W25X16VSSIG A
0.1U/16V/X7R_4
*1U/6.3V_4
For IT8502IX 0 OHM Remove Remove

Layout Note: Layout Note:
For IT8502JX Remove 0.1uF Remove
32.768kHz clock lines: Place R226,R205,R210 within 500 mils from SPI Flash.
a. If possible, please avoid using any through-hole.
EC The same as SA6 Add R580,C631,C632 for ITE8502JX use. b. Please make the trace length short, and the trace width wide enough.
c. The spacing to the closest neighbor should be wide enough.
PROJECT : AJ2
Custom KBC-IT8502 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
LED Power
680P/50V/NPO_4
TP_L
C285
R296
C284
1K_4
RV1
TPL
SW3
2
4
1
3 KEYBOARD
For New Keyboard use.
33 LEDPWR
C21
40 mil
CN3
31
0.1U/16V/X7R_4 *VARISTOR_6 NTC031-AA1G-A160T 0.1U/16V/X7R_4
CP6 4
MY12 3
1 2
MY13 2
CN2 3 4 33 LED1 1
SW4 5 6 MY14
TP_R R307 1K_4 TPR 2 1 MX0 7 8 MY15 BL121-04R-4P-L-QT6
24 MX0 30
4 3 MX3 220PX4
23 MX3 30
A MX4 A
22 MX4 30
C296 MY3 CP5 Modify for F VERSION
680P/50V/NPO_4 C297 RV2 21 MX1
MY3 30
1 2 MY8 TO EC/ THM
NTC031-AA1G-A160T 20 MX1 30
0.1U/16V/X7R_4 *VARISTOR_6 MX2 3 4 MY5 CN6
19 MX2 30
MY4 5 6 MY10 5,30 ABCLK ABCLK
18 MY4 30 1
MX5 7 8 MY11 5,30 ABDATA ABDATA
17 MX5 30 2
MX7 220PX4 VSAT
16 MX7 30 30 VSAT 3
MY0 GND
15 MY0 30 4
MY1 CP4
14 MY1 30 5
MX6 1 2 MY2 C620 C621
TOUCHPAD SWITCH CONN 13
12
MY2
MX6
MY2
30
30 3 4 MY9
+3.3V 6
2200P/50V/X7R_4
2200P/50V/X7R_4
MY9 5 6 MY6
11 MY9 30
MY6 7 8 MY7 C67
CN8 10 MY6 30
MY7 220PX4 0.1U/16V/X7R_4 87212-0800L
9 MY7 30
TP_L MY8
12 8 MY8 30
B2 MY5 CP2 MMB (R)
T143 11 7 MY5 30
B3 MY10 1 2 MX1
T144 10 6 MY10 30
B1 MY11 3 4 MX2
T145 9 5 MY11 30
B4 MY12 5 6 MY4 Close to the CN6
T146 8 4 MY12 30
TP_R MY13 7 8 MX5
7 3 MY13 30
MY14 220PX4
6 2 MY15
MY14 30 Add 2200pF for MMB/R Volume down automatically.
5 1 MY15 30
L14 BLM11A05 TPCLK-1 CP1
30 TPCLK L13 BLM11A05 TPDATA-1 4 MX0
30 TPDATA KEYBOARD 1 2
3 MX3
2 3 4
5 6 MX4 CN7
1 MY3
7 8
C55 C56 TOUCH PAD 12P for G372 220PX4 ABCLK 1
*100P-ESD_6 *100P-ESD_6 ABDATA 2
CP3 VSAT 3
MX7 GND 4
1 2
MY0 5
12 MIL C65 0.1U/16V/X7R_4 +3.3V_ALW +3.3V_ALW
3
5
4
6 MY1
+3.3V 6
+5V
RP38 RP37 7 8 MX6
10 1 MY11 10 1 MY1 220PX4 C52
B B
MY12 9 2 MY10 MY2 9 2 MY0 87212-0800L
MY13 8 3 MY5 MY9 8 3 MY4 0.1U/16V/X7R_4
MY14 7 4 MY8 MY6 7 4 MY3 MMB (L)
MY15 6 5 MY7 6 5 +3.3V_ALW
+3.3V_ALW
10KX8 10KX8
MMB
+3.3V_ALW
+5V
CHARGE LED
R571 *300_4 BAT_G_LED# +3.3V_LED
30 mil 3 1
R120
TP module CONNECTOR 30 BAT_GREEN_LED#
30 BAT_RED_LED# R575 *300_4 BAT_R_LED# 4 2

*0_6 30 mil +5V
D15 LED_BLUE/RED R59
47_4
C618 CN11 R555
*0.1U/16V/X7R_4 300_4 R60
1 100K_4
TPDATA 2
3
3
TPCLK
TP_MD_L R256 *0_4 4 LED DIS EN Q9
30 TP_MD_L 2
TP_MD_R R257 *0_4 5 Q10 2N7002W-7-F
30 TP_MD_R 6 R572 2M_4 BAT_G_LED 2 R556
1
3
300_4
Q45 LED_ON#1 2
+3.3V_S5 2N7002E
*87212-0800L 2N7002W-7-F
1
C D33 C608 C
SW1010CPT 0.47U/10V/X7R_6
3
+15V_ALW +3.3V
R574 2M_4 BAT_R_LED 2
Q48
+3.3V_S5 2N7002E
20 mil
1
R61
To LED board
3
D34 C609 1M_6
SW1010CPT 0.47U/10V/X7R_6
LED_ON#1 2
Q12
+3.3V_LED 2N7002E
CN9
3
+3.3V_ALW
1
C61 0.1U/16V/X7R_4 1 1 +3.3V_LED
14 SATA_LED# 2 2 30 LED_ON# 2
3 POWER LED Q13
3 PDTC144EU
4 4
30 CAPSLED 5 R557 *300_4 -PWRLED C63
1
5 C64 0.1U/16V/X7R_4
26 WIRELESS_LED# 6
6 D14 ORANGE LED *Varistor_4
26,29 BT_LED# 7
7
8
8 R573
15,26 WLAN_RF_OFF# 9 9
10 300_4
16,29 BT_ON# 10
88501-1001
3
D D
30 PWRLED1 R553 2M_4 PWRLED 2
Q44
D32 SW1010CPT 2N7002E
+3.3V_S5
1
C596
0.47U/10V/X7R_6
PROJECT : AJ2
Modify for RAMP Size Document Number Rev
Custom TP/KB/LED/MMB 1A

1 2 3 4 5 6 7 8
A B C D E
32
D D
+3.3V
CPUSB# R491 10K_4
CPPE# R490 10K_4
2231_SHDN# R506 10K_4
2231_STBY# R502 10K_4
NEWCARD
U26
2231_STBY# 1 2
STBY# 3.3VIN +3.3V
+3.3V_SUS 17 4
3VAUX AUXIN 3.3VIN
15 AUXOUT
CP_RST# 6 12 40 mil
3V_NEWCARD SYSRST# 1.5VIN +1.5V
CPPE# 10 14
CN10 CPUSB# CPPE# 1.5VIN
9 CPUSB#
60 mil PERST# 8 3 60 mil
1 GND4
2231_SHDN# 20 PERST# 3.3VOUT
SHDN# 3.3VOUT 5
3V_NEWCARD 1.35A need 60 mil
2 T133 *PAD RCLKEN_T R504 *10K_4 RCLKEN 18
15 USBP3- USB_D- RCLKEN
3 OC#_NWC R505 *0_4 OC# 19 11
15 USBP3+
CPUSB# 4
USB_D+
CPUSB#
15 OC#_NWC
7
OC#
GND
1.5VOUT
1.5VOUT 13
1.5V_NEWCARD 0.75A need 30~40 mil 40 mil
5 RESERVED2
6 OZ27C10LN
RESERVED1
C
2,16 ICH_SMBCLK 7 SMB_CLK
C
2,16 ICH_SMBDATA 8 SMB_DATA
40 mil 9 +1.5V2
1.5V_NEWCARD 10 +1.5V1
11 +3.3V_SUS
16,21,26 ICH_PCIE_WAKE# W AKE#
3VAUX 12 +3.3VAUX
PERST# 13 PERST#
14 +3.3V2
15 C548
+3.3V1
2 NEW-CARD_CLK_REQ# 16 CLKREQ#
CPPE# 17 0.1U/16V/X7R_4
CPPE#
2 CLK_PCIE_NEW_C# 18 REFCLK-
2 CLK_PCIE_NEW_C 19 REFCLK+
5
20 GND3 7,15,21,22,26 PLTRST# 1
21 32 4 CP_RST#
15 PCIE_RXN3 PERn0 SHIELD4
22 31 2 U24
15 PCIE_RXP3 PERp0 SHIELD4
23 30 TC7SH08FU(F)
3
GND2 SHIELD4
15 PCIE_TXN3 24 PETn0 SHIELD3 29
15 PCIE_TXP3
25 PETp0 SHIELD2 28
26 GND1 SHIELD1 27
1CX4310C-JM
3V_NEWCARD 3VAUX 1.5V_NEWCARD
C539 C540 C547 C546 C541 C538

B B
0.1U/16V/X7R_4 0.1U/16V/X7R_4 *0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4
A A
PROJECT : AJ2
Custom NEW CARD 1A

A B C D E
1 2 3 4 5
+5V
4.06A +3.3V_SUS
PR161
+5V_ALW +15V_ALW +5V_ALW
8
7
6
PQ41
FDS8884
3
2
1
+5V
+3.3V_ALW
6
PQ39
FDC655BN
1.02A
+3.3V_SUS
33
100K/F_4 PR159 5 PC159 5 4
1M_4 +5V_ALW +15V_ALW 2
0.1U/16V/X7R_4 1
4
MAIND PC158
A A
3
3
0.1U/16V/X7R_4
PC161 PR158 PR160
RUN_ON_5V# 2 +3.3V 100K/F_4 1M_4
PQ44 3.93A
+5V_SUS
2200P/50V/X7R_4
3 PQ36
3
BS870-7-F +3.3V_ALW +3.3V
FDS8884 PC160 5.0A
1
2 +5V_ALW
30,36,37 MAINON
8 3 SUS_ON_5V#2 PQ37 +5V_SUS
PQ45 7 2 PQ42 FDC655BN
2200P/50V/X7R_4
3
PDTC144EU 6 1 6
1
5 PC156 BS870-7-F 5 4
30,36 SUSON 2 2
1
0.1U/16V/X7R_4 1 PC153
4
PQ43
PDTC144EU 0.1U/16V/X7R_4
3
SUS_5V_ENABLE
+1.8V_SUS PQ34 +1.8V

FDS8884
8 3
7 2
6 1
5 PC136 +PW R_SRC LANVCC_L +15V_ALW +3.3V_ALW
0.1U/16V/X7R_4
4
B B
PR63
PR64 1M_4
1
2
5
6
Modify for C-TEST PR70 22_8 PQ6
1M_4 FDC655BN
+5V PL1 LAN_ON 3
10UH+-30% For LED Keyboard Function
2 1 0.8A
3
PQ7
4
PC41 PC42 PD7 2N7002EPT LANVCC_L
Modify for C-TEST 50mA
PU5 SSM14PT
1
4.7U/10V/X5R_6
0.1U/16V/X7R_4
6 1 LED_PW R 2 1 LAN_POW ER_G2 2 PC43

VIN LX LEDPW R 31
5 OVP GND 2 LANVCC_L 21
3
4 3 PC44 2200P/50V/X7R_4
2
EN FB PQ9
LED1 31
2.2U/50V/X7R_12
AT1312AX_GRE 2 2N7002EPT
30 LAN_POW ER
1
PC40
PR71
PQ8 1M_4 0.1U/16V/X7R_4
1
PDTC144EU
30 KB_BACKLIGHT
PR153
5.1/F_6
C +3.3V_SUS C
+5V_ALW PR61
E@100K_4
Modify for C-TEST
PU4
PC33 E@0.1U/50V_6 4 1
Discharge MAINON PR62 E@10K/F_6 2
VPP PGOOD
VEN VO 6
HW PG 30,35,36,37
+2.5V
3 VIN 0.5A
8 GND
ADJ
+3.3V_SUS 9 GND NC 5
PR55 PC31
+1.8V_SUS +5V_SUS +3.3V_SUS PC37 PC35 PC36 E@RT9025-25PSP
R1
7
E@73.2K/F_6 E@10U/10V_8
+5V +3.3V +1.8V +1.5V +0.9V_DDR_VTT E@10U/6.3V_8 E@0.1U/50V_6 *.1U/50V_6
0.8V
PR164 PR163 PR162
22_8 22_8 22_8
PR171 PR166 PR173 PR165 PR168
Vout =0.8(1+R1/R2) PR54
R2
22_8 22_8 22_8 22_8 22_8 =2.5V
3
E@34K/F_6
3
D 2 2 2 D
PQ48 PQ46 PQ47 RUN_ON_5V# 2 2 2 2 2

BS870-7-F BS870-7-F BS870-7-F
PQ54 PQ50 PQ53 PQ49 PQ56
1
BS870-7-F BS870-7-F BS870-7-F BS870-7-F BS870-7-F

PROJECT : AJ2
1
SUS_ON_5V# Quanta Computer Inc.

A3 RUN POW ER SW & DISCHARGER 1A
1 2 3 4 5
1 2 3 4 5
PJ1
DCJK-2DC-G756-X06-5P-H
1 VA_DCJACK1
PF1
LITTLE-7A-1206
2
PL4
UPB201212T
VA
1
PD10
PDS1040-13
3 VA1 1
PR87
RL3720WT-R020
2
VAD
34
2 2 PC66 PC67
3 PL5
1P
2P
PQ2
1
UPB201212T PC68 0.1U/50V_6
0.1U/50V_6 PQ15
EC14 PR1 PC1 PDTA124EU FDD6685_NL
3
*0_4 PQ1 *0.1U/50V_6 PR3
1000P/50V/X7R_4
1 3 1
5
4
2
PC64 PC65 PD11 *IMD2 *200K/F_6
*10U/25V/X6S_12
P4SMAJ20A
0.1U/50V_6 0.1U/50V_6 1 6 PC69
4
A SP@POWER_JACK 1U/25V_8 A
2
2 5 D/C#1 D/C#
2
PR130
3 4 PR7 PR4
90W P/N:DFPJ05MR006 *0_4 *200K/F_6
PR2 10K_6
65W P/N:DFPJ05MR007 *0_4
CSIN
CSIP
ACOK 3 1 CHG_VDD PC70
0.1U/50V_6
PR33 PQ23 +PWR_SRC
10K/F_4 PDTA124EU
PR22 PR21 +PWR_SRC
2
2_6 20_6 PC2

PR9 0.1U/50V_6
22,30 ACIN *33K/F_6 PR6
PC97 PC105 PC101 PL12 PR8 200K/F_6
PR31 0.1U/50V_6 2.2U/10V/X5R_8 4.7U/10V_8 UPB201212T *0_4
15K/F_4
CHG_ACIN PR117
20 CHG_CSIN
19 CHG_CSIP
CHG_VDD
CHG_VDDP
CHG_VIN D/C#1
3
PC96 4.7_6 PR10 PR5
2
1U/25V_8 PC7 PC88 *10K/F_6 100K/F_6
1N4148WS-7-F PC86 PC87 + +
15
1
3
PQ24 2 ACOK# PD3 PQ21 3 1 1
DMN601K-7 PR104 SI4800BDY PQ14
10U/25V_12
10U/25V_12
2200P/50V/X7R_4
0.1U/50V_6
CSIN
VDD
CSIP
VDDP
20_6 PR23 PC15 FDD6685_NL
5
6
7
8
CSOP CHG_CSOP 21 2.2_6 0.22U/25V_6 PQ3
4
PD13 PR108 CSOP *DMN601K-7
16
1
1N4148WS-7-F 1M/F_6 PC17 BOOT

4
0.047U/25V_4 Modify for C-TEST
17 CHG_UGATE
CSON CHG_CSON UGATE PR95
22
1
2
3
CSON PL11 10UH 30% 4.4A RL3720WT-R030
B B
PR105 18 CHG_PHASE CHG_PL13 1 2 BAT+
20_6 PHASE
1P
2P
5
6
7
8
1
14 CHG_LGATE ER4 PC89 PC90 PC91
LGATE
2
ACOK# 23 PU1 PQ16 2.2_6 + +
1N4148WS-7-F ACPRN SI4800BDY
4
10U/25V_1206
10U/25V_1206
0.1U/50V_6
PD4 PR32 ISL6251A 13
1
10_6 PGND CHG_VREF
VA CHG_DCIN 24 12 EC15
1
2
3
DCIN GND
PR128 PR119 PR118
100K/F_4 11 11K/F_6 *514K_6 2200P/50V/X7R_6 CSOP
PC21 CHG_ACIN VADJ
VA 2
0.1U/50V_6 ACSET CSON
10 CHG_VADJ Float = 4.2V / CELL
ACLIM
3
EN
3
PR127 CHG_ACLIM
VCOMP
CHG_EN
ICOMP
CELLS
CHLIM
VRFE
100K/F_4 PR129 ACLIM : 65W/ 3.22A --> 0.629V PR131

ICM
12.4K/F_4 100K/F_4
PR132 ACOK 2
PR133 *514K_6 PQ28
CHG_CELLS 4
CHG_ICOMP 5
CHG_VCOMP6
CHG_VREF 8
29.4K/F_6 DMN601K-7
+3.3V_ALW PD15
CHG_ICM
CC_SET 30 CH501H-40PT
1
CHG_VDD PC108 +PWR_SRC
Modify for C-TEST
PR126 100P/50V_4
20K/F_4 CC-SET : 6 CELLS/ 2.5A --> 1V +3.3V_ALW PR123 +3.3V_ALW
*100/F_6
3
PC110 9 CELLS/ 3A --> 1.212V
PR115 6800P/50V_4 PC113
100K_4 PC107 *0.1U/16V_6 +5V_ALW
*1U/25V_6 2 D/C# 30
ICMNT *1N4148WS-7-F
CELL-SET = Hi --->4S PR136
PR124 PD14 PR122 *10K/F_4 PQ30
5
C CELL-SET = Low --->3S PR125 *100_4 *475K/F_6 DMN601K-7 C
3
10K/F_4 PC114 1 +
1
PC109 *3300P/50V_4 4
100P/50V_4 3 -
30 CELL_SLT 2 PR116 PU8
*0_4 PC115 *G1331 PR135
2
PQ26 0.01U/50V_4 PC112 PR134 0_6
DMN601K-7 *100P/50V_4 *332K/F_6 PR137
*10K/F_4
1
3
2 BL/C# 30
PQ29
*DMN601K-7
1
BAT+
BAT+
+3.3V_ALW
PL8
BAT+ UPB201212T
BAT+
PF2 BAT_CONN
PR152 PR14 PL10 BUS-10A-1206
100K/F_6 10K/F_4 UPB201212T 1 2 BAT_IN
PD16 1
2
30 TEMP_MBAT 3
MBATV
MBATV 30 4
PC4
RB500V-40 5
0.1U/16V/X7R_4 6
PC132 7
PR40 *0_6 8
PR154 0.01U/50V/X7R_6 PR13 PR12 9
D 14K/F_6 Modify for C-TEST 200/F_4 200/F_4 CN15 D
22,30 MBDATA
TO EC/MXM 22,30 MBCLK
1
PD2 PD1
UDZ5V6B-7-F
UDZ5V6B-7-F
Place close to EC,

PROJECT : AJ2
2

Custom CHARGER 1A

1 2 3 4 5
5 4 3 2 1
35
EC C-7 /8 Stuff PC56.
+DC1_PWR_SRC Modify for C-TEST
D D
PL2 UPB201212T
+PWR_SRC
+5V_ALW2
Modify for RAMP PC60 PC63 PC56 PC58
2200P/50V/X7R_4
10U/25V_12
10U/25V_12
0.1U/50V_6
2
PL3 PC47
+PWR_SRC-5 PR176 PD17 4.7U/10V_8
+PWR_SRC
*0_4 ZD5.6V +3.3V_VCC
UPB201212T PC57 PC59 PC62 PC61
2
PC46
1
PC45 PR68
10U/25V_12
10U/25V_12
2200P/50V/X7R_4
1U/10V_6
0.1U/50V_6
PR66 *0_4 PR69
100K_4 0.1U/50V_6 0_4
PR155
5
6
7
8
PC134 0_4
*0.01U/50V_6 PQ11 +3.3V_ALW
35V_ONLDO 4 FDS8884
3V_DH
8
7
6
5
PC133
1
2
3
PQ12 PR67 Modify for C-TEST
8
7
6
5
4
3
2
1
+3.3V_REFIN2
FDS8884 4 5V_DH 200K/F_4 0.1U/16V/X7R_4
PL19
LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF
+5V_ALW 2.5UH+-30% 7.5A
Modify for C-TEST 3V_LX +3.3V_ALW
3
2
1
Modify for C-TEST

C 9 32 PC147 C
BYP REFIN2
5
6
7
8
PL18 10 31 PR72 200K/F_4 PC148 + PC146
2.5UH+-30% 7.5A OUT1 ILIM2 ER1
11 FB1 PU6 OUT2 30
10U/6.3V/X5R_8
+5V_ALW 5V_LX 2.2_6 PR73
0.1U/16V/X7R_4
12 29 4
220U/6.3V/ESR10
PR78 200K/F_4 D/D_PWGD 13 ILIM1 SKIP# D/D_PWGD 0_4
PGOOD1 ISL6237 PGOOD2 28
3V5V_EN 14 27 3V5V_EN
PR75 EN1 EN2
15 26
1
2
3
DH1 DH2
1
8
7
6
5
PC149 *0_4 ER2 16 25 EC11

PC150 + PC151 2.2_6 LX1 LX2
37 PAD
4 5V_DL PC48 36
SECFB
PAD
PGND
10U/10V/X5R_8
2200P/50V/X7R_6
0.1U/16V/X7R_4
BST1
BST2
220U/6.3V/ESR10
GND
VDD
2
PAD
PAD
PAD
+3.3V_BST1
DL1
DL2
PQ13 0.1U/50V_6 PC49
FDS6690AS_NL 0.1U/50V_6 PQ10
+5V_BST1
3
2
1
PR74 EC12 PR83 FDS6690AS_NL
35
34
33
17
18
19
20
21
22
23
24
0_4 PR82 2.2_6
2200P/50V/X7R_6 2.2_6 +3.3V_BST2
+5V_BST2 3V_DL
PR76
*0_4
5V_FB PC50 PR156

+5V_ALW 1 PC51
1U/10V_6
0.1U/16V_6 +5V_ALW2
PD9 *SHORT-1A
+5V_ALW2
3 Modify for C-TEST
BAT54S-7-F
+10V_ALW 2
5,39 SYS_SHDN#
PR81
39K/F_4
PC52
B B
PC53 1 0.1U/16V_6
0.1U/16V_6
PD8 3 3V5V_EN
BAT54S-7-F +3.3V_SUS
2
+15V_ALWP +15V_ALWR
+15V_ALW
PR79
PR86
1
PR85 10K/F_4
22_8 *200K/F_4 PR84
PC54 *39K/F_4 D/D_PWGD
HWPG 30,33,36,37
0.1U/50V_6 PC55 PR80
*1U/25V_8
0_4
2
A A
PROJECT : AJ2
Custom D/D POWER 1A

5 4 3 2 1
5 4 3 2 1
Modify for C-TEST
+1.8V_SUS PL16
36
D D
UPB201212T
+PW R_SRC_DDR +PW R_SRC
25
1
PC39
PC125 PC127 PC128 1 24 PC131 PC38 PC130
GND
*0.1U/16V/X7R_4 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VTTGND VTT PC34 + +
0.1U/50V_6
2200P/50V/X7R_4
2
*4.7U/10V_8 Modify for RAMP
*10U/25V_12
27U/25V_6x5.7 ELEC
5
6
7
8
+0.9V_DDR_VTT +0.9V_DDR_VTT 2 23 PQ32
VTTSNS VLDOIN PC129 FDS8884
PR146 PR151 0.1U/50V_6 4
*0_4 3 22 DDR_VBST 2.2_6
GND VBST
Modify for C-TEST
1
2
3
+1.8V_SUS 4 21 DRVH
MODE DRVH PL17
Modify for C-TEST 1.50UH+-20% 20A
V_DDR_MCH_REF 5 20 DDR_LL +1.8V_SUS +1.8V_SUS
VTTREF LL
Peak Current:9A
C PC122 6 19 DRVL ER5 OCP point is 10A C
.047U/10V_4 COMP DRVL 2.2_6 PR144 PC119 + PC135 + PC138 PC141 PC144
5
6
7
8
5
6
7
8
PQ33 PQ5 *140K/F_4
10U/6.3V/X5R_8
0.1U/16V/X7R_4
7 18 FDS8884 FDS8884
*0.1U/16V/X7R_4
NC PGND
390U/2.5V_6x5.7 ELEC
390U/2.5V_6x5.7 ELEC
4 DRVL 4
EC20
8 VDDQSNS CS_GND 17 Modify for C-TEST
PR142 2200P/50V/X7R_6
1
2
3
1
2
3
0_4
DDR_V5FILT 9 16 DDR_CS PR149 10.7K /F_4
VDDQSET CS PR141
*100K/F_4
PR140 0_4 10 15
30,33,37 MAINON S3 V5IN PR145 Modify for C-TEST
5.6_6
PR139 0_4 11 14 DDR_V5FILT +5V_SUS
30,33 SUSON S5 V5FILT
Modify for C-TEST PC126 PC124
PC120 12 13
NC PGOOD HW PG 30,33,35,37
0.1U/16V/X7R_4
1U/10V_6
1U/10V_6
B B
Modify for C-TEST PU9

TPS51116REGR Modify for C-TEST
PR175
+PW R_SRC_DDR +PW R_SRC_DDR_R
*620K /F_4
PR150
A *SHORT-1A A
PROJECT : AJ2
Custom DDR2_1.8VSUS,0.9V 1A

5 4 3 2 1
5 4 3 2 1
37
D D
VIN_VCCP
+5V_ALW
Modify for C-TEST PC74 1U/10V_6 PL6

PR99 UPB201212T
1M_4 PR11 VIN_VCCP +PWR_SRC
RTBST
20_6 PD12 PC80 PC81 PC76 PC75
RTVDD 1N4148WS-7-F + +
RTVDDP
PC3
2200P/50V/X7R_4
10U/25V_12
10U/25V_12
0.1U/50V_6
1U/10V_6
PC84
PR96 0.1U/50V_6
5
0_6
PU7
13
2
9
PQ19
C 12 RTDH 4 AOL1414 C
VDD
VDDP
BST
RTTON DH
16
Modify for C-TEST TON
1
2
3
4 11 RTLX PL9
30,33,35,36 HWPG PGOOD LX
RT8204 1.5UH/20A-MPO104-1R5
PR92
5 10 +1.05V_VCCP +1.05V_VCCP
LPGOOD OC
MAINON PR98 0_4 RTEN 3.4K/F_4
15 EN/DEM DL 8
VOUT
ER3
LDRI
LEN
5
LFB
17 3 PQ17 2.2_6 PC77 + PC79 PC78
PAD FB RTDL
AOL1412
14
10U/6.3V/X5R_8
0.1U/16V/X7R_4
RTFB
4
390U/2.5V_6x5.7 ELEC
EC16
1
2
3
2200P/50V/X7R_6
PR97 PR93 PR94
0_4 4.02K/F_4 10K/F_4
30,33,36 MAINON
PC83
*100P/50V_04
PC72 +1.8V_SUS
Vo=0.75(R1+R2)/R2
39P/50V_04
RTLDRI
B B
PR157 5 PC143 PC145
6
7
8
100/F_4
10U/6.3V/X5R_8
0.1U/16V/X7R_4
4
PQ35
PC137
1
2
3
0.033U/50V_6 SI4800BDY
+1.5V
+1.5V
PC73 PR89
220P/50V_4 10K/F_4 PC139 PC140
PC142
10U/6.3V/X5R_8
10U/6.3V/X5R_8
0.1U/16V/X7R_4
RTLFB
Vo=0.75(R1+R2)/R2 PR88
10K/F_4
A A
PROJECT : AJ2
Custom +1.5v&1.05V 1A

5 4 3 2 1
A B C D E F G H
Modify for RAMP

6262_VIN1
PC27 PC118 PC25 PC117

UPB201212T
PL15
+PWR_SRC 38
1
+
Modify for C-TEST
27U/25V_6x5.7 ELEC
+ PC116
0.1U/50V_6
*10U/25V_12
2200P/50V/X7R_4
5
100U/25V
2
6262_VIN1 +3.3V_SUS
6262_UG1 4 Maximum Current: 44A
1 1
PR20
OCP:55A
+5V_SUS 10_6 PR121
10_4 PR120 PQ31
TPCA8023-H PL14
1
2
3
1.91K/F_4 0.36UH/+-20%/30A +VCC_CORE
PR103 6262_LX1
10_6
5
PC99
.1U/50V_6 PC111
0.1U/16V/X7R_4 DELAY_VR_PG 7,16 PR39 PC121 PC29 PC92
6262_LG1 4 4 2.2_6 + + +
22
20
48
330U/2V/ESR9
*330U/2V/ESR9
1
*330U/2V/ESR6_NC
VCC
VIN
PGOOD
3V3
PC98 PQ25 PQ27
1U/10V/X5R_4 TPCA8019-H TPCA8019-H PC24
1
2
3
1
2
3
2200P/50V/X7R_6
21 GND UGATE1 35
49 GND_T
50 GND_T BOOT1 36
51 GND_T
52 PR37 PC22
GND_T 0_6 .22U/25V_6
53 GND_T VSUM PR25 3.65K/F_6
PHASE1 34
3 H_PSI# PR38 0_4 PSI#_1 2 PR26 10K/F_4
PSI#
LGATE1 32
PC23 *0.1U/16V/X7R_4
PR36 *4.99K/F_4 PGD_IN 3 PGD_IN PR17 1/F_6
PGND1 33
PR35 147K/F_6 4
2 RBIAS ISEN1 ISEN2 PR18 10K/F_6 2
ISEN1 24
3 IMVP6_PROCHOT# 5 VR_TT#
PR109 PR34 4.42K/F_4 6 PC95
470K_4 NTC NTC .22U/25V_6
+5V_SUS
PC104 7
PC20 0.01U/16V/X7R_4 0.015U/50V_6 SOFT PC106 Modify for RAMP UPB201212T
31 PL7
PVCC 6210_VIN2
37 VID0 +PWR_SRC
4 VID0 Modify for C-TEST 4.7U/25V_8
38 27 6262_UG2
4 VID1 VID1 UGATE2
PU2 PC82
4 VID2 39 VID2
ISL6262A
BOOT2 26 Modify for C-TEST PC6 PC85 PC5
1
27U/25V_6x5.7 ELEC
+
40 PR28 + PC71
4 VID3 VID3 0_6 PC19
0.1U/50V_6
2200P/50V/X7R_4
*10U/25V_12
41 .22U/25V_6 4
100U/25V
4 VID4
2
VID4 6262_LX2
PHASE2 28
4 VID5 42 VID5
30 6262_LG2 Modify for RAMP
LGATE2
4 VID6 43 VID6
29 PQ18
PR47 0_4 PGND2 TPCA8023-H PL13
30 IMVP_VR_ON 44 Modify for C-TEST
1
2
3
VR_ON ISEN2 0.36UH/+-20%/30A
ISEN2 23
7,16 PM_DPRSLPVR PR48 499/F_4 45 DPRSLPVR
5
3,7,14 H_DPRSTP# PR49 0_4 46 PC100
DPRSTP# PC103 .22U/25V_6 PC30 PC26 PC123
PR50 0_4 CLKEN# 47 *1000P/50V/X7R_4 PR16 + + +
16 VR_PWRGD_CLKEN# CLK_EN#
4 4 2.2_6
25
330U/2V/ESR9
330U/2V/ESR9
NC
330U/2V/ESR6_NC
3 PR27 1K/F_4 3
8 PR114 13.3K/F_4
OCSET PQ20 PQ22
13 VDIFF TPCA8019-H TPCA8019-H PC12
1
2
3
1
2
3
PR19 PC18 19 VSUM 2200P/50V/X7R_6
255/F_4 1000P/50V/X7R_4 VSUM
PR29
12 PR24
FB2
1K/F_4 PC93 PR102 2.7K_4
11 .033U/16V_4 11K/F_4
FB
PR15 97.6K/F_4 VSUM PR101 3.65K/F_6

PC16 PR111
PC9 10 .33U/6.3V_4 10K _6 NTC PR100 10K/F_4
470P/50V_4 COMP
18 PR107 1/F_6
PC8 VO
DROOP
220P/50V_4 PR30 6.81K/F_4 9 ISEN1 PR106 10K/F_6

VW
VSEN
RTN
DFB
PR113 PC94
PC13 1K/F_4 .22U/25V_6
15
14
16
17
1000P/50V/X7R_4
PC14 PR110
0.01U/16V_4
3.48K/F_4
PR112
PC102
4 4
ISL6262_VO
*SHORT-1A
180P/50V_4
PC10 PC11
0.01U/16V_4 0.01U/16V/X7R_4
PROJECT : AJ2
VCCSENSE 4
VSSSENSE 4
Custom CPU_CORE POWER 1A

A B C D E F G H
5 4 3 2 1
+5V_ALW
PR170
+5V_S5
PR169
+3.3V_S5
PR174
+15V_ALW
PR167
+3.3V_ALW
39
100K/F_4 22_8 22_8 100K/F_4
1
2
5
6
PQ38
S5_ONG S5_OND_3V 3
FDC655BN
+3.3V_S5
D
+3.3V_S5
0.1A D
3
PC154
4
3
+3.3V_S5 3,14,15,16,17,31
2200P/50V/X7R_4
2 2 2 2 PC152
30 S5_ON
0.1U/16V/X7R_4
PQ55 PQ52 PQ57 PQ51
1
PDTC144EU BS870-7-F BS870-7-F BS870-7-F
1
+15V_ALW
+5V_ALW
PR172
+5V_S5
3
100K/F_4 0.01A
S5_OND_5V 2 +5V_S5
PQ40
3
PC157 BS870-7-F
1
470P/50V_4
+5V_S5 17
S5_ONG 2
PC155
PQ58
BS870-7-F
0.1U/16V/X7R_4
C C
1
Modify for RAMP
+5V_ALW2 +5V_ALW2 +PWR_SRC +PWR_SRC
PD5
RB500V-40
SYS_SHDN# 5,35
PR56 PR51
1.74K/F_4 200K/F_4 PR53
200K/_6
PC32
.1U/50V_6
3
Modify for C-TEST
8
2.469V 3 +
B
1 2 B
5 Thermistor_CTRL Thermistor_CTRL 2 - PQ4
PU3A DMN601K-7
4
LM393 PC28
1
.1U/50V_6
PR52
196K/F_4
+3.3V_ALW
+5V_ALW
PR59
100K/F_6
PR58
10K/F_6 PU3B
PD6
5 +
7 NC_TEMP 30
4.95V 6 -
RB500V-40
LM393
For EC control thermal protection (output 3.3V)
PR57
1M/F_6
A A
Modify for C-TEST PROJECT : AJ2

Custom +3v_5S5/+5V_S5 1A

5 4 3 2 1
5 4 3 2 1
A-Type H-C315D102P2
HOLE2
*H-C315D110P2
HOLE30
*H-C315D110P2
HOLE20
B-Type H-C315D118P2 *12 PCS.
HOLE3 HOLE19 HOLE33 HOLE34 HOLE15 HOLE4 HOLE9 HOLE22 HOLE32

C-Type H-TC315D169P1
CPU SCREW HOLE
40
*H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 *H-C315D118P2 HOLE8 HOLE13 HOLE14 HOLE7
*h-c236d169i209p2 *h-c236d169i209p2 *h-c236d169i209p2 *h-c236d169i209p2
1
1
D D
for MDC NUT*2

for MXM NUT*4 for NB UNT
for wirless wire HOLE11 HOLE12 HOLE16 HOLE17 HOLE28 HOLE24 HOLE23
E@H-C236D142P2 E@H-C236D142P2 E@H-C236D142P2 E@H-C236D142P2 H-C236D142P2 H-C236D142P2 H-TC169BC236D142P2
Add new hole boss
1
HOLE5
*H-C295D295N Modify for C-TEST
HOLE1 HOLE6 HOLE21

1
H-TC169BC236D142P2 H-TC169BC236D142P2 h-c276d118p2

for Mini PCIE NUT*4
HOLE29 HOLE27 HOLE25 HOLE26 HOLE10 HOLE18
1
H-TC160BC236D142P2 H-TC160BC236D142P2
H-TC160BC236D142P2
H-TC160BC236D142P2 E@H-C236D142P2 E@H-C236D142P2
C C
1
1
Full Half
EMI Use MODEM

PAD1
FDBF1006
+5V_SUS +1.05V_VCCP
1
+3.3V_ALW
EC7 0.1U/16V/X7R_4
EC19 0.1U/16V/X7R_4 EC8 0.1U/16V/X7R_4 EC10 0.1U/16V/X7R_4
EC22 0.1U/16V/X7R_4 EC23 0.1U/16V/X7R_4 EC6 0.1U/16V/X7R_4
EC24 0.1U/16V/X7R_4 EC21 0.1U/16V/X7R_4
B B
Modify for C-TEST
+15V_ALW
+PWR_SRC +1.05V_VCCP
Power JACK ESD PAD
EC5 0.1U/25V_4
EC13 0.1U/25V_4 EC1 1000P/50V/X7R_4 PAD2
EC9 0.1U/25V_4 CON1_10
EC4 1000P/50V/X7R_4
1
EC2 1000P/50V/X7R_4
EC3 1000P/50V/X7R_4
A A
PROJECT : AJ2
Custom EMI PAD &Hole 1A

5 4 3 2 1
5 4 3 2 1
A-test to B-test EC list
EC A06 page7 R154,R157 Change HSYNC,VSYNC value form 30.1 to 24.9/F

41
EC A08 page7 R418 Change LVDS_IBG value form 24K/F to 2.4K/F
D EC A07 page7 R159 Change CRTIREF value form 75/F to 1K/F D
EC A03 page9 Modify to*E@0_6 R91,R93 for UMA BOM .

EC A04 page16 Add R544,R561 for LCD GPIO fucction use!.
EC A19.page18 Change R344,345 value from 0 ohm to 1K ohm for lid S/W function .
EC A19.page18 ADD L11 Del R46,R47 for EC Backlight control function .
EC A04 page19 Del R341,D6 for HDMI LEVEL SHIFT use!.
EC A17.page19 Modify to correct net,ADD RN18 for MXM HDMI SCH.
EC A17.page21 Change Value to 75_6 (R40,358,359,360,362) ;C379 change to 10uf/4v.
EC A10 page22 C457,C468 Modify to *E@XX for UMA BOM.
EC A16.page22 Modify to correct net for UMA HDMI SCH.
C C
EC A14.page25 Del C80,C81 CAP. for MDC RJ11 BOM.

EC A01 page28 USB CONN CN22,CN26 PIN define USB +-data swape it.
EC A05 page28 Change C102,C558 value&footprint 10U/10V_0805 (CH6102M9A01)
EC A12 page30 Del R120,R121 FOR Change the SMBus from 117 & 118 to 115 & 116 .
EC A02 page30 Modify LAN_DISABLE#_0 form pin68 to pin56.
EC A11 page31 Modify CN8 SCH. for TUCHPAD G372 PIN Define.
EC A15.page31 Modify MMB(L) CN7.Pin6 net TO GND .
EC A18.page31 Del. T/P module CONNECTOR SCH .
EC A20 page31 Modify LED POWER CONN. CN3 PIN define .
B EC A09 page37 PR93 Change value from 4.7K/F to 4.02K/F for +1.05V use. B
EC A13.page40 Del Hole11,12,16,17 MXM NUT for UMA BOM.
A A
PROJECT : AJ2
Custom EC list 1A

5 4 3 2 1
5 4 3 2 1
B-test to C-test EC list
1.EC page2 _Remove 0 ohm resistance array(RP18,RP19,RP20,RP21,RP29,RP22,RP28,RP27,RP26,RP25).

42
2.EC page7 _Remove R89,R86 and NET(PLTRST#_R).
3.EC page10 _Change L56,L57 to R560,R559.
4.EC page15 _Not stuff U10,C257,R251,R293,R252,R253,R294,R295.
D D
5.EC page17 _Not stuff U22,C510,R446,R431,C514 for MXM.
6.EC page18 _Remove 0 ohm resistance L10.
7.EC page18 _Modify LCD Connector's pin definition(PIN37 from GND to NC).
8.EC page19 _Change R322 value form 100K/F to 20K/F.
9.EC page21 _Not stuff U5,R77,R80 ; stuff R83.
10.EC page21 _Change R358,R359,R360,R362,R40 footprint from 0603 to 0805.
11.EC page21 _Change C25 value from 1500pF to 1000pF(same as C66).
12.EC page24 _Modify SPEAKER Connector's pin definition(mirror).
13.EC page24 _Change C298,C305,C304,C302,C303 footprint from 0603 to 0402.
14.EC page28 _Remove 0 ohm resistance array RP32,RP33.
15.EC page28 _Change C98,C549 value from 22uF to 10uF.
16.EC page30 _Add R552(1k) and R121(*10k) to pull low and pull high.
C C
17.EC page30 _Remove R122(10k) and net EC_GPB7.

18.EC page30 _Change R1,R2(*),R3(*) value from 150 ohm to 300 ohm.
19.EC page31 _Modify MMB Connector's pin definition(mirror:CN6,CN7).
20.EC page31 _Modify LED Display circuit.
21.EC page33 _Change PL1 value from 22UH to 10UH.
22.EC page33 _Remove 0 ohm resistance PR65,PR60.
23.EC page34 _Change PL11's part number to CV01044TZ01.
24.EC page34 _Add PD16 and PR40(*) on BAT CON's pin3 to avoid leakage current.
25.EC page34 _Change PR95 part number to CS+0308FL00.
26.EC page34 _Change PR133 value from 11k/F ohm to 29.4k/F ohm .
27.EC page34 _Change PR119 value from 16k/F(MXM) or 75K/F(UMA) ohm to 11k/F(MXM) or 178K/F(UMA) ohm .
B
28.EC page35 _Change PL19 and PL18 part number to CV-2575TZ04. B
29.EC page35 _Short PU6 pin9 and pin10.

30.EC page35 _Remove 0 ohm resistance PR77.
31.EC page35 _Stuff PC56.
32.EC page36 _Remove 0 ohm resistance PR147,PR148,PR138,PR143.
33.EC page36 _Modify PU9 pin23's net from +1.8V_SUSP to +1.8V_SUS.
34.EC page36 _Add PR175(*) connect to PU9 pin12 and pull high to +PWR_SRC_DDR(buffer).
35.EC page36 _Change PR149 value from 14k/F ohm to 10.7k/F ohm.
36.EC page36 _Change PR151 value from 0 ohm to 2.2 ohm.
37.EC page37 _Remove 0 ohm resistance PR90,PR91.
38.EC page38 _Remove 0 ohm resistance PR40,PR41,PR42,PR43,PR44,PR45,PR46.
39.EC page38 _Change PQ31 and PQ18 part number to BAM80230000.
A 40.EC page38 _Change PQ25,PQ27,PQ20,PQ22 part number to BAM80190000. A
41.EC page38 _Change PC26 part number to CH733RM8874.

42.EC page39 _Stuff PR51,PR52,PR53,PR56,PR57,PR58,PR59,PC28, PC32,PD5, PD6,PQ4,PU3 for EC control thermal protection.
43.EC page40 _Change HOLE23's NUT to FBAJ2003010.
PROJECT : AJ2
44.EC page40 _Add SPRING PAD1 to fix MODEM's cable.
Custom EC list 1A

5 4 3 2 1
5 4 3 2 1
C-test to FAI list

1.EC page2 _Change C188,C189 value form 30P to 27P for RCT timing. 43
2.EC page2 _Change UAM BOM add original RP24 for LVDS spread spectrum clock issue.
3.EC page16 _Change BOARD_ID0 resister to pull low. (remove R201 and add R202).
4.EC page16 _Add C612 0.1uF/16v_4 near R27810/F_4 fix RTC CMOS checksum error.
5.EC page18 _Add PD18 Close to LCD CONN. CN1 fix U2 break down .
D D
6.EC page18 _Del. USB8+- data remove the RP1&L8;Del. R32 0 ohm.
7.EC page18 _Change value C325 from 0.1U/16V/Y5V to 0.1U/16V/X7R .
8.EC page24_ Change GND CN33,34,35 from ADO_GND to Digtal_GND for ESD solution.
9.EC page24_Add *C619 Varistor_0402 near R310 for ESD use.
10.EC page26_Change net CN30,32 name from +3.3v_sus to +3.3v .
11.EC page30_Del. R552 for EC change to"slowly pulse" detect pin use .
12.EC page30_Add +3.3V C54,C62 0.1UF/16V;C610,C611 100P/50V near CN4.
13.EC page30_Move the R539,R534 from 24 page to 30 page.
14.EC page31_Modify BOM to POWER,Charge LED bevhavior "solwly pulse" .
15.EC page26,27,31,32_Del. 0 ohm RP30,RP31,R230,R233,R254,R255,R229,L20,L59,L12,R569,R248 cost doown .
16.EC page22_ ADD PC162 100U/25V.
17.EC page35_ ADD PD17 ;Change value PR67 to 200K/F_4 PR66 to 100K/F_4.
C
18.EC page36_Change value PC130 to 27U/25V . C
19.EC page38_Change value PC118 to 27U/25V .
20.EC page30_ ADD LDO(PU10) circuit to reduce DMIC noise.

21.EC page31_Add 2200pF(C620,C621) for MMB/R Volume down automatically issue.
22.EC page21_Change transformer's PCB footprint.
B B
A A
PROJECT : AJ2
Custom EC list 1A

5 4 3 2 1

Gateway MC78 - MD78 - Quanta - AJ2 PDF

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5 4 3 2 1

AJ2 BLOCK DIAGRAM (Montevina Platform)

CPU THERMAL CLOCK GEN CPU CORE POWER

SATA ICH CLK_100MHz

PCIE MINICARD CLK_100MHz

PCIE LAN CLK_100MHz

PCIE NEW CARD CLK_100MHz

PCI OZ126T CLK_33MHz

Web Cam +3.3V ISL6251A

USB PORT X4 PCI

Date: Tuesday, September 16, 2008 Sheet 1 of 43

C187 GNDSRC DREFSSCLK#_R

+3.3V +3.3V +3.3V

Date: Tuesday, September 16, 2008 Sheet 2 of 43

H_A#[3..16] U18A H_D#[0..63] U18B H_D#[0..63]

C4 R377 CPU_TEST4 AF26

RSVD[04] *2200P/50V/X7R_4 R82 *1K/F_4

ITP_TMS R22 54.9/F_4

Date: Tuesday, September 16, 2008 Sheet 3 of 43

AA15 AF5 0.01U/25V/X7R_410U/4V/X6S_8 H3 AD8

VCC[058] VID[3] VSS[059] VSS[140]

+VCC_CORE VSS[072] VSS[153]

0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4 0.1U/16V/X7R_4

Route VCCSENSE and VSSSENSE

Date: Tuesday, September 16, 2008 Sheet 4 of 43

+5V 40 mil CN17

Date: Tuesday, September 16, 2008 Sheet 5 of 43

H_D#30 N10 K21 H_A#34

H_SWING H_D#35 H_D#_34 H_ADSTB#_0

R389 H_D#38 Y7 G12

H_D#41 H_D#_40 H_DBSY#

H_D#42 H_D#_41 HPLL_CLK

H_D#57 H_D#_56 H_DINV#_3

H_REQ#_2 F13 H_REQ#2 3

Date: Tuesday, September 16, 2008 Sheet 6 of 43

3.01K/F_4 RSVD15 R168 *I@10K_4 L_CTRL_DATA

RSVD17 SA_CS#_1 DDR_CS1_DIMMA# 12,13 18 INT_LVDS_EDIDCLK L_DDC_CLK PEG_RX#_0

RSVD23 LVDS_VREFL PEG_RX#_8

CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 15 PEG_TX#_9

MCH_CFG9 C23 AD35 E32 AA46 C_PEG_TXN11 C431 E@.1U/16V_4 PEG_TXN11

H21 22 INT_CRT_GRN M48

AT40 C34 T107 *PAD AA39 C_PEG_TXP13 C437 E@.1U/16V_4 PEG_TXP13

NC_1 CL_PWROK PWROK 16,30

T116 TP_NC10BG45 E36 SDVO_CTRLDATA 1K/F_4 R134

T33 H36 EMC

+3.3V NC_18 ACZ_BITCLK_MCH 80.6/F_4

NC_21 HDA_SDI ACZ_SDIN3 14

Modify for C-TEST

Date: Tuesday, September 16, 2008 Sheet 7 of 43

DDR_A_D48 SA_DQ_47 SA_MA_10 DDR_A_MA11 DDR_B_D48 SB_DQ_47 SB_MA_9 DDR_B_MA10

Digital Display Port(SDVO/DP/iHDMI) Low=Only DP or inly PCIe is operational (defaults)

Date: Tuesday, September 16, 2008 Sheet 8 of 43

VCC_AXG_NCTF_45 V17 VCC_NCTF_6 AG32

VCC_AXG_41 VCC_SM_LF1 VCCSM_LF2

AJ14 C130 C123 C104 C157 C201 C197 C202

CANTIGA_1p0 PROJECT : AJ2

Date: Tuesday, September 16, 2008 Sheet 9 of 43

R420 +VCCA_DPLLB L48 T7 20 mil 20 mil

+V1.05M_MCH_PLL R386 0.5/F_6 + C96

R147 0_6 +VCCA_SM_CK AP28 int

1/F_6 +1.8V_SUS R184 *I@0_6 +VCCD_LVDS AB2 +VTTLF3

.47U/6.3V_4 .47U/6.3V_4 .47U/6.3V_4 PROJECT : AJ2

Date: Tuesday, September 16, 2008 Sheet 10 of 43

RSVD[04] 2200P/50V/X7R_4 R82 1K/F_4

R298 2 1 10K_4 LAN_WOL_EN 10K_4 10K_4 10K_4 10K_4

PC0 R335 0_4 R328 I@4.7K_4 32