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32pfl4606d PDF
32pfl4606d PDF
L11M1.2L
LA
19090_000_110412.eps
110427
Contents Page
1. Revision List 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 5
4. Mechanical Instructions 9
5. Service Modes, Error Codes, and Fault Finding 13
6. Alignments 19
7. Circuit Descriptions 21
8. IC Data Sheets 28
9. Block Diagrams
Wiring Diagram 32" (Dangerous) 31
Wiring Diagram 40" (Dangerous) 32
Block Diagram Video 33
Block Diagram Audio 34
Block Diagram Control & Clock Signals 35
Block Diagram I2C 36
Supply Lines Overview 37
10. Circuit Diagrams and PWB Layouts
B01 313912365171 38
B02 313912365171 39
B03 313912365171 41
B04 313912365171 42
B05 313912365171 46
B06 313912365171 48
B07 313912365171 51
313912365171 SSB Layout 52
T01 393912365151 54
313912365151 TCON Layout 60
11. Styling Sheets
Styling Sheet Dangerous 32" 61
Styling Sheet Dangerous 40" 62
©
Copyright 2011 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by ER/JY 1164 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 19140
2011-May-06
EN 2 1. L11M1.2L LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
2.1 Technical Specifications You can download this information from the following websites:
http://www.philips.com/support
For on-line product support please use the links in Table 2-1. http://www.p4c.philips.com
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.
2.3 Connections
R L Pr Pb Y
4 5 6 7
8 9 10 11 12
3
R L Pr Pb Y HDMI 1 HDMI 2 VGA
(ARC)
CVI 2 ANTENNA
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Technical Specifications and Connections L11M1.2L LA 2. EN 3
2011-May-06
EN 4 2. L11M1.2L LA Technical Specifications and Connections
11 - Aerial - In
- - F-type Coax, 75 : D
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090127
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Precautions, Notes, and Abbreviation List L11M1.2L LA 3. EN 5
2011-May-06
EN 6 3. L11M1.2L LA Precautions, Notes, and Abbreviation List
The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number “1” algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a “2” (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit
AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g.
AP Asia Pacific
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. AR Aspect Ratio: 4 by 3 or 16 by 9
code, digit 4 refers to the Service version change code, digits 5
ASF Auto Screen Fit: algorithm that adapts
and 6 refer to the production year, and digits 7 and 8 refer to
aspect ratio to remove horizontal black
production week (in example below it is 2010 week 10 / 2010 bars without discarding video
week 17). The 6 last digits contain the serial number.
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
B-TXT Blue TeleteXT
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C Centre channel (audio)
CEC Consumer Electronics Control bus:
Figure 3-1 Serial number (example) remote control bus on HDMI
connections
3.3.7 Board Level Repair (BLR) or Component Level Repair CL Constant Level: audio output to
(CLR) connect with an external amplifier
CLR Component Level Repair
If a board is defective, consult your repair procedure to decide ComPair Computer aided rePair
if the board has to be exchanged or if it should be repaired on CP Connected Planet / Copy Protection
component level. CSM Customer Service Mode
If your repair procedure says the board should be exchanged CTI Color Transient Improvement:
completely, do not solder on the defective board. Otherwise, it manipulates steepness of chroma
cannot be returned to the O.E.M. supplier for back charging! transients
CVBS Composite Video Blanking and
3.3.8 Practical Service Precautions Synchronization
DAC Digital to Analogue Converter
• It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
While some sources are expected to have a possible low frequency amplification
dangerous impact, others of quite high potential are of DCM Data Communication Module. Also
limited current and are sometimes held in less regard. referred to as System Card or
• Always respect voltages. While some may not be Smartcard (for iTV).
dangerous in themselves, they can cause unexpected DDC See “E-DDC”
reactions that are best avoided. Before reaching into a D/K Monochrome TV system. Sound
powered TV set, it is best to test the high voltage insulation. carrier distance is 6.5 MHz
It is easy to do, and is a good service precaution. DFI Dynamic Frame Insertion
2011-May-06
Precautions, Notes, and Abbreviation List L11M1.2L LA 3. EN 7
DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I 2C Inter IC bus software upgrade via RF transmission.
I2D Inter IC Data bus Upgrade software is broadcasted in
I2S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (colour
Telecommunication Union relating to carrier = 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (colour carrier
2011-May-06
EN 8 3. L11M1.2L LA Precautions, Notes, and Abbreviation List
2011-May-06
Mechanical Instructions L11M1.2L LA 4. EN 9
4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Notes:
4.2 Service Positions • Figures below can deviate slightly from the actual situation,
4.3 Assy/Panel Removal due to the different set executions.
4.4 Set Re-assembly
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EN 10 4. L11M1.2L LA Mechanical Instructions
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Mechanical Instructions L11M1.2L LA 4. EN 11
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.
2
3 2
2 2
3 3
3
2
3 2
3 3
1
3 1 1 3 2
2
3
1 1
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EN 12 4. L11M1.2L LA Mechanical Instructions
1 1 1 1
2
1 2
1
C
1
2
1
B
1
2
1 D
F
1 1
A
1
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Thinner blue FFC supporting Proper FFC insertion: Silver line is not
Notes: tape belong to Panel side visible when connector lock is closed
• While re-assembling, make sure that all cables are placed
and connected in their original position. See Figure 4-5 TCON
• Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
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2011-May-06
Service Modes, Error Codes, and Fault Finding L11M1.2L LA 5. EN 13
In the chassis schematics and layout overviews, the test points Software Identification, Version, and Cluster
are mentioned. In the schematics and layouts, test points are The software ID, version, and cluster will be shown in the main
indicated with “Fxxx” or “Ixxx”. menu display of SDM, SAM, and CSM.
As most signals are digital, it will be difficult to measure The screen will show: “AAAAAAB-XX.YY”, where:
waveforms with a standard oscilloscope. Several key ICs are • AAAAAA is the chassis name: L11M12L.
capable of generating test patterns, which can be controlled via • B is the region indication: E= Europe, A= AP/China, U=
ComPair. In this way it is possible to determine which part is NAFTA, L= LATAM.
defective. • XX is the main version number: this is updated with a major
change of specification (incompatible with the previous
Perform measurements under the following conditions: software version). Numbering will go from 01 - 99 and AA -
• Service Default Mode. ZZ.
• Video: Colour bar signal. – If the main version number changes, the new version
• Audio: 3 kHz left, 1 kHz right. number is written in the NVM.
– If the main version number changes, the default
settings are loaded.
5.2 Service Modes • YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous versions)
The Service Mode feature is split into four parts: Numbering will go from 00 - 99.
• Service Default Mode (SDM). – If the sub version number changes, the new version
• Service Alignment Mode (SAM). number is written in the NVM.
• Customer Service Mode (CSM). – If the NVM is fresh, the software identification, version,
• Computer Aided Repair Mode (ComPair). and cluster will be written to NVM.
SDM and SAM offer features, which can be used by the Service Display Option Code Selection
engineer to repair/align a TV set. Some features are: When after an SSB or display exchange, the display option
• A pre-defined situation to ensure measurements can be code is not set properly, it will result in a TV with “no display”.
made under uniform conditions (SDM). Therefore, it is required to set this display option code after
• Activates the blinking LED procedure for error identification such a repair.
when no picture is available (SDM). To do so, press the following key sequence on a standard RC
• The possibility to overrule software protections when SDM transmitter: “062598” directly followed by MENU/HOME and
is entered via the Service pins. “xxx”, where “xxx” is a 3 digit decimal value of the panel type,
• Make alignments (e.g. White Tone), (de)select options, see sticker on the side/bottom of the cabinet. When the value
enter options codes, reset the error buffer (SAM). is accepted and stored in NVM, the set will switch to Stand-by,
• Display information (“SDM” or “SAM” indication in upper to indicate that the process has been completed.
right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).
(CTN Sticker)
ComPair Mode is used for communication between a computer
and a TV on I2C /UART level and can be used by a Service 10000_038_090121.eps
engineer to quickly diagnose the TV set by reading out error 090819
codes, read and write in NVMs, communicate with ICs and the
uP (PWM, registers, etc.), and by making use of a fault finding Figure 5-1 Location of Display Option Code sticker
database. It will also be possible to up and download the
software of the TV set via I2C with help of ComPair. To do this, During this algorithm, the NVM-content must be filtered,
ComPair has to be connected to the TV set via the ComPair because several items in the NVM are TV-related and not SSB-
connector, which will be accessible through the rear of the set related (e.g. Model and Prod. S/N). Therefore, “Model” and
(without removing the rear cover). “Prod. S/N” data is changed into “See Type Plate”.
In case a call centre or consumer reads “See Type Plate” in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.
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EN 14 5. L11M1.2L LA Service Modes, Error Codes, and Fault Finding
Purpose
• To change option settings.
• To display / clear the error code buffer.
• To perform alignments.
Specifications
• Operation hours counter (maximum five digits displayed).
• Software version, error codes, and option settings display.
SDM • Error buffer clearing.
• Option settings.
• Software alignments (White Tone).
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• NVM Editor.
110505 • Set screen mode to full screen (all content is visible).
• Set Smart Picture to “Game”.
Figure 5-2 Service pads (located under heatsink)
How to Activate
On Screen Menu To activate SAM, use one of the following methods:
After activating SDM, the following items are displayed, with • Press the following key sequence on the remote control
“SDM” in the upper right corner of the screen to indicate that the transmitter: “062596” directly followed by the INFO[i+] /OK
television is in Service Default Mode. button. Do not allow the display to time out between entries
Menu items and explanation: while keying the sequence.
• xxxxx: Operating hours (in decimal). • Or via ComPair.
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Service Modes, Error Codes, and Fault Finding L11M1.2L LA 5. EN 15
After entering SAM, the following items are displayed, with • When the TV is switched “off” by a power interrupt while in
“SAM” in the upper right corner of the screen to indicate that the SAM, the TV will show up in “normal operation mode” as
television is in Service Alignment Mode. soon as the power is supplied again. The error buffer will
not be cleared.
Menu items and explanation: • In case the set is in Factory mode by accident (with “F”
1. System Information. displayed on screen), pressing and holding “VOL-“ button
• Op Hour: This represents the life timer. The timer for 5 seconds and then followed by pressing and holding
counts normal operation hours, but does not count the “CH-” button for another 5 seconds should exit the
Stand-by hours. Factory mode.
• MAIN SW ID: See paragraph Software Identification,
Version, and Cluster for the SW name definition. 5.2.4 Customer Service Mode (CSM)
• ERR: Shows all errors detected since the last time the
buffer was erased. Five errors possible. Purpose
• OP1/OP2: Used to read-out the option bytes. See The Customer Service Mode shows error codes and
paragraph 6.6 Option Settings in the Alignments information on the TV’s operation settings. A call centre can
section for a detailed description. Ten codes are instruct the customer (by telephone) to enter CSM in order to
possible. identify the status of the set. This helps them to diagnose
2. Tuner. problems and failures in the TV before making a service call.
• AGC Adjustment: See paragraph 6.3.1 for The CSM is a read-only mode; therefore, modifications are not
instructions. possible in this mode.
• Store: To store the data.
3. Clear. Erases the contents of the error buffer. Select this
Specifications
menu item and press the MENU RIGHT key on the remote
• Ignore “Service unfriendly modes”.
control. The content of the error buffer is cleared.
• Set volume to 25%.
4. Options. To set the option bits. See paragraph 6.6 Option
• Set Smart Picture to “Game”.
Settings in the “Alignments” chapter for a detailed
• Set Smart Sound to “Standard”.
description.
• Line number for every line (to make CSM language
5. RGB Align. To align the White Tone. See White Tone
independent).
Alignment: for a detailed description.
• Set the screen mode to full screen (all contents on screen
6. NVM Editor. To change the NVM data in the television set.
is visible).
See also paragraph 5.6 Fault Finding and Repair Tips.
• After leaving the Customer Service Mode, the original
7. Upload to USB.
settings are restored.
8. Download from USB.
• Possibility to use “CH+” or “CH-” for channel surfing, or
9. Initialise NVM. To initialize a (corrupted) NVM. Be careful,
enter the specific channel number on the RC.
this will erase all settings!
10. Auto ADC. Refer to chapter 6. Alignments for detailed
information. How to Activate
11. Service Data. Virtual Key board for character input entry. To activate CSM, press the following key sequence on a
standard remote control transmitter: “123654” (do not allow the
display to time out between entries while keying the sequence).
How to Navigate
• In the SAM menu, select menu items with the UP/DOWN
After entering the Customer Service Mode, the following items
keys on the remote control transmitter. The selected item
are displayed:
will be indicated. When not all menu items fit on the screen,
use the UP/DOWN keys to display the next / previous
menu items. Menu Explanation CSM1
• With the LEFT/RIGHT keys, it is possible to: 1. Set Type. Type number, e.g. 32PFL3605/78. (*)
– Activate the selected menu item. 2. Production code. Product serial no., e.g.
– Change the value of the selected menu item. BZ1A1008123456 (*). BZ= Production centre, 1= BOM
– Activate the selected sub menu. code, A= Service version change code, 10= Production
• When you press the MENU button twice while in top level year, 08= Production week, 123456= Serial number.
SAM, the set will switch to the normal user menu (with the 3. Installation date. Indicates the date of the first initialization
SAM mode still active in the background). To return to the of the TV. This date is acquired via time extraction.
SAM menu press the MENU button. 4. a - Option Code 1. Option code information (group 1).
• The “INFO[i+]/OK” key from the user remote will toggle the b - Option Code 2. Option code information (group 2).
OSD “on/off” with “SAM” OSD remaining always “on”. 5. SSB. Indication of the SSB factory ID (= 12nc). (*)
6. Display. Indication of the display ID (=12 nc). (*)
• Press the following key sequence on the remote control
7. PSU. Indication of the PSU factory ID (= 12nc).
transmitter: “062596” directly followed by the MENU button
to switch to SDM (do not allow the display to time out
between entries while keying the sequence). (*) If an NVM IC is replaced or initialized, these items must be
re-written to it. ComPair will foresee in a possibility to do this.
Also the NVM editor in the SAM menu can be used.
How to Store SAM Settings
To store the settings changed in SAM mode (except the
OPTIONS and RGB ALIGN settings), leave the top level SAM Menu Explanation CSM2
menu by using the POWER button on the remote control 1. Current Main SW. Shows the main software version.
transmitter or the television set. The mentioned exceptions 2. Standby SW. Shows the Stand-by software version.
must be stored separately via the STORE button. 3. Panel Code. Shows the current display code.
4. Bootloader ID. Shows the Bootloader software ID.
5. NVM Version. The NVM software version no.
How to Exit
Switch the set to STANDBY by pressing the mains button on 6. Flash ID. Shows the flash ID.
the remote control transmitter or the television set, or by
keying-in the “00” sequence on a standard RC-transmitter. Menu Explanation CSM3
1. Signal Quality. Shows the signal quality for RF signals
Note: and other sources (No Tuned/Poor/Average/Good).
2011-May-06
EN 16 5. L11M1.2L LA Service Modes, Error Codes, and Fault Finding
6. not used
7. not used. Optional Power Link/ Mode
Switch Activity I2C RS232 /UART
Optional power
How to Exit HDMI 5V DC
I2C only
To exit CSM, use one of the following methods:
• Press the MENU/HOME button on the remote control
transmitter. 10000_036_090121.eps
091118
• Press the POWER button on the remote control
transmitter. Figure 5-3 ComPair II interface connection
• Press the POWER button on the television set.
Caution: It is compulsory to connect the TV to the PC as
5.3 Service Tools shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
5.3.1 ComPair one connects the TV directly to the PC (via UART), ICs will be
blown!
Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips How to Order
Consumer Electronics products. and offers the following: ComPair II order codes:
1. ComPair helps you to quickly get an understanding on how • ComPair II interface: 3122 785 91020.
to repair the chassis in a short and effective way. • ComPair UART interface cable: 3138 188 75051.
2. ComPair allows very detailed diagnostics and is therefore • Program software can be downloaded from the Philips
capable of accurately indicating problem areas. You do not Service web portal.
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this. Note: For this chassis, “Pgammar” and “T-con NVM”
3. ComPair speeds up the repair time since it can programming (VCOM alignment) are added to ComPair.
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available. Additional cables for VCOM Alignment
4. ComPair features TV software up possibilities. • ComPair/I2C interface cable: 3122 785 90004.
• ComPair/VGA adapter cable: 9965 100 09269.
Specifications
ComPair consists of a Windows based fault finding program
5.4 Error Codes
and an interface box between PC and the (defective) product.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box 5.4.1 Introduction
and the TV communicate via a bi-directional cable via the
service connector(s). Error codes are required to indicate failures in the TV set. In
principle a unique error code is available for every:
How to Connect • Activated (SW) protection.
This is described in the ComPair chassis fault finding database. • Failing I2C device.
• General I2C error.
The last five errors, stored in the NVM, are shown in the
Service menu’s. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code never leads to a
deadlock situation. It must always be diagnosable (e.g. error
buffer via OSD or blinking LED or via ComPair).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.
2011-May-06
Service Modes, Error Codes, and Fault Finding L11M1.2L LA 5. EN 17
2011-May-06
EN 18 5. L11M1.2L LA Service Modes, Error Codes, and Fault Finding
5.6.3 No Picture 3. Execute the command "NVM Copy" > "NVM Copy from
USB" to copy the USB data to NVM (this takes about a
When you have no picture, first make sure you have entered minute to complete).
the correct display code. To write an NVM mask to the TV, ensure that the mask has the
See Display Option Code Selection for the instructions. correct format: "L11M12L_NVM_U2T.MAK" (0x00 to write
protect, 0xFF to overwrite).
5.6.4 Unstable Picture via HDMI input Important: The file must be located in the "/Repair" directory
of the USB stick.
5.7 Software Upgrading Important: The file must be located in the "/Repair" directory
of the USB stick.
5.7.1 Introduction
5.7.5 How to Copy the Channel List to/from USB
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a Write Channel List Data to USB
stand alone set. A description on how to upgrade the main 1. Insert the USB stick into the USB slot while in SAM mode.
software can be found in the DFU or on the Philips website. 2. Execute the command "Channel list Copy to USB", to copy
the channel list data to the USB stick. The filename on the
5.7.2 Main Software Upgrade USB stick will be named "L11M12L_CHTB_T2U.BIN" (this
takes a couple of seconds).
Automatic Software Upgrade
In “normal” conditions, so when there is no major problem with Write Channel List Data to TV
the TV, the main software and the default software upgrade 1. First, ensure (via a PC) that the filename on the USB stick
application can be upgraded with the “autorun.upg” (FUS part has the correct format: "L11M12L_CHTB_U2T.BIN".
in the one-zip file). This can also be done by the consumers 2. Insert the USB stick into the USB slot while in SAM mode.
themselves, but they will have to get their software from the 3. Execute the command "Chanel list Copy from USB" to
commercial Philips website or via the Software Update copy the USB data to the TV (this takes about a minute to
Assistant in the user menu (see DFU). The “autorun.upg” file complete).
must be placed in the root of your USB stick.
Important: The file must be located in the "/Repair" directory
How to upgrade: of the USB stick.
1. Copy the “autorun.upg” file to the root of an USB stick.
2. Insert the USB stick in the side I/O while the set is “on”.
The TV will prompt an upgrade message. Press “Update”
to continue, after which the upgrading process will start. As
soon as the programming is finished, the set must be
restarted.
In the “Setup” menu you can check if the latest software is
running.
2011-May-06
Alignments L11M1.2L LA 6. EN 19
6. Alignments
Index of this chapter: 6.3 Software Alignments
6.1 General Alignment Conditions
6.2 Hardware Alignments
With the software alignments of the Service Alignment Mode
6.3 Software Alignments
(SAM) the Tuner and RGB settings can be aligned.
6.4 ADC gain adjustment
6.6 Option Settings
If you do not have a color analyzer, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).
• Set the RED, GREEN and BLUE default values per
temperature according to the values in the “Tint settings”
table.
• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
2011-May-06
EN 20 6. L11M1.2L LA Alignments
Table 6-2 Tint settings 32" 6.5 TCON Alignment (= VCOM alignment)
Notes:
• After changing the option(s), save them with the STORE
command.
• The new option setting becomes active after the TV is
switched “off” and “on” again with the mains switch (the
EAROM is then read again).
Notes:
1. Peak-to-Peak
2. Black-to-Peak.
6.4.2 PC VGA
2011-May-06
Circuit Descriptions L11M1.2L LA 7. EN 21
7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction
7.2 Power Supply
The LC11M1.2L LA chassis is a digital chassis using a
7.3 Video
Mediatek chipset. It covers screen sizes of 32" to 40" using a
7.3.1 Video: Front-End “Dangerous” styling.
7.4 Audio
7.5 Inputs
Main key components are the Mediatek MT5395 integrated
7.5.1 Inputs: HDMI
7.5.2 Inputs: USB “System On Chip” (SoC) that supports multimedia video/audio
input, and the integrated TCON (Timing Controller) part for the
LCD panel.
Notes:
• Only new circuits (circuits that are not published recently)
are described. System SoC is based on MT5395:
• NAND Flash – 128 Mbyte, NumOnyx/Hynix.
• Figures can deviate slightly from the actual situation, due
• DDR – 128 Mbyte (32 × 16M, 2 pcs), Hynix.
to different set executions.
• For a good understanding of the following circuit • Use internal MT5363 Stand-by micro-controller.
descriptions, please use chapter 9. Block Diagrams and
10. Circuit Diagrams and PWB Layouts. Where necessary, Tuner/Frontend configuration:
you will find a separate drawing for clarification. • Half NIM tuner (VA1E1BF2403) from Sharp.
• Toshiba Channel Decoder (TC90517).
19140_036_110505.eps
110505
Figure 7-1 L11M1.2L LA Architecture (32" sets with TCON embedded in LCD panel)
2011-May-06
EN 22 7. L11M1.2L LA Circuit Descriptions
19140_037_110505.eps
110505
Figure 7-2 L11M1.2L LA Architecture (40" sets with TCON as separate board)
2011-May-06
Circuit Descriptions L11M1.2L LA 7. EN 23
19140_038_110505.eps
110505
2011-May-06
EN 24 7. L11M1.2L LA Circuit Descriptions
DDR
Audio Class-D (TPA3123)
DC/DC 5V
MT5395
HDMI MUX
19140_039_110505.eps
110505
2011-May-06
Circuit Descriptions L11M1.2L LA 7. EN 25
VDISP Switch
(SI4835DDY)
EEPROM (M24C64)
Audio pre-amp
USB Protector
(TPS2041BD
Logic Switch
for Digital Audio
NAND Flash
(1Gbits)
Digital
Demodulator
19140_040_110505.eps
110505
7.2 Power Supply to be generated. The +12Vdisp is the supply to the display
timing controller, while the +3V3_SW is powering the
microprocessor and its flash memory.
The Power Supply Unit (PSU) in this chassis is a buy-in and is
a black-box for Service. When defective, a new panel must be
ordered and the defective panel must be returned for repair, The mains power supply unit distribute the following voltages to
unless the main fuse of the unit is broken. Always replace the the TV system: +3V3STBY, 12VS, +24Vaudio, and +24Vpanel
fuse with one with the correct specifications! This part is for panel with inverter (or) high voltage (HV) for inverterless
commonly available in the regular market. panel. Requirement of the High Voltage depend on the
specification of the LCD panel.
Refer to Figure 7-6 and Figure 7-7 for details
2011-May-06
EN 26 7. L11M1.2L LA Circuit Descriptions
19140_041_110505.eps
110505
18980_203_100402.eps
Figure 7-6 Power distribution overview 100402
7.3 Video
19130_013_110426.eps
110426
2011-May-06
Circuit Descriptions L11M1.2L LA 7. EN 27
The audio profile (optimal setting per screen size and styling) is 7.5.1 Inputs: HDMI
stored at Option 14 (bit 0 to bit 4). Profile 1 for 32 & 40"
Dangerous. Refer to Figure 7-9 for the implementation.
TMDS R3X
DIN-5V R3PWR5V
DRX-HOTPLUG HPD3
DRX-DDC-SCL DSCL3
DRX-DDC-SDA DSDA3
HDMI Side
HDMI_CEC
TMDS R2X
HDMI_CEC
HDMI 1
CRX-DDC-SDA DSDA2
HDMI_CEC
SiI9187B
TMDS R1X
BIN-5V R1PWR5V
BRX-HOTPLUG HPD1
BRX-DDC-SCL DSCL1
SPDIF-OUT-MTK SEL-HDMI-ARC
HDMI 2
BRX-DDC-SDA DSDA1
HDMI_CEC
R
R0PWR5V Buffer & Selection
HPD0 circuit
DSCL0
0X
DSDA0
ARC-eHDMI
19140_042_110505.eps
110505
7300
7C00 +5V_SW
VIN
USB_PWR_EN
GPIO 1 EN_
TPS2041BD
USB OCP
USB_OCP 1D01
GPIO 2 OC_
VOUT 5V USB
connector
MT5395
USB _DM
USB _2P_DM0
USB _DP
USB_2P_ DP0
19140_043_110505.eps
110505
2011-May-06
EN 28 8. L11M1.2L LA IC Data Sheets
8. IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).
Block diagram
LD1117DT
Pinning information
DPAK
F_15710_166.eps
100402
2011-May-06
IC Data Sheets L11M1.2L LA 8. EN 29
Block diagram 1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR
PGNDL 0.68 F
1 F
BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F
PVCCL
AVCC
PVCCR
VCLAMP
Shutdown
SD 1 F
Control
MUTE
GAIN0
} Control
GAIN1
Pinning information
PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR
TERMINAL
24-PIN I/O/P DESCRIPTION
NAME
(PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
SD 2 I
AVCC
RIN 6 I Audio input for right channel
LIN 5 I Audio input for left channel
GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
MUTE 4 I
outputs enabled). TTL logic levels with compliance to AVCC
BSL 21 I/O Bootstrap I/O for left channel
PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
LOUT 22 O Class-D 1/2-H-bridge positive output for left channel
PGNDL 23, 24 P Power ground for left-channel H-bridge
VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors
BSR 16 I/O Bootstrap I/O for right channel
ROUT 15 O Class-D 1/2-H-bridge negative output for right channel
PGNDR 13, 14 P Power ground for right-channel H-bridge.
PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
AGND 9 P Analog ground for digital/analog cells in core
AGND 8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
BYPASS 7 O
external capacitor sizing.
AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properly
Thermal pad Die pad P
secure device to printed wiring board.
18440_302_090303.eps
090318
2011-May-06
EN 30 8. L11M1.2L LA IC Data Sheets
HVS SAWTOOTH
CM1
LOGIC GENERATOR
GM AMPLIFIER
FBB - SLOPE LX1
+ COMPENSATION LX2
VREF BUFFER
CONTROL
Ε
UVLO COMPARATOR LOGIC
-
+
RSENSE
CURRENT PGND1
0.75 VREF AMPLIFIER PGND2
680kHz
FREQ
OSCILLATOR
VL
CDEL AND
CURRENT LIMIT
EN SEQUENCE CONTROLLER THRESHOLD
VL
PVIN1,2 CB
SUPN
LXL1
LXL2
NOUT CONTROL
LOGIC
CURRENT
BUFFER CM2
LIMIT GM AMPLIFIER
COMPARATOR CURRENT AMPLIFIER
FBN - - FBL
+ - Ε +
+
0.2V VREF
CURRENT LIMIT SLOPE
THRESHOLD COMPENSATION
UVLO COMPARATOR
- SAWTOOTH
+ GENERATOR
0.4V
LDO-CTL
0.75 VREF LDO
- CONTROL
+ LOGIC2 LDO-FB
POUT
SUPP
Pinning information
LDO-CTL
LDO-FB
PVIN1
AGND
PROT
LX2
LX1
PGND2
PGND1
TEMP
40 39 38 37 36 35 34 33 32 31
PVIN2 1 30 COMP
CB 2 29 FBB
LXL1 3 28 RSET
LXL2 4 27 HVS
PGND3 5 ISL97653A 26 EN
40 LD 6X6 QFN
PGND4 6 TOP VIEW 25 CDEL
CM2 7 24 CTL
FBL 8 23 DRN
VL 9 22 COM
VREF 10 21 POUT
11 12 13 14 15 16 17 18 19 20
C1P
C2P
C1N
C2N
FBP
FBN
SUPP
SUPN
NOUT
PGND5
18770_307_100217.eps
100217
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 31
9. Block Diagrams
Wiring Diagram 32" (Dangerous)
WIRING DIAGRAM 32" DANGEROUS
8G50
8G51
8319
14P
1M99
MAIN POWER SUPPLY LOUDSPEAKER
TO BACKLIGHT
32 PSLC-P002A (5213)
(1005)
9P
1G51 1G50
1M99
51P 41P
8M99 8M99
9P
11P
1M95
1M99
USB
SSB
8M95 8M95
B 3139 123 6517.x
11P
1M95
(1150)
4P
8P
1M20 1735
TUNER
HDMI
INLET
HDMI HDMI VGA
2P3
1308
N L
IR/LED/CONTROL J1
BOARD (1108) 1M95 (B01) 1M99 (B01) 1M20 (B04c) 1G51 (B04D) 1G50 (B04D)
8P
1. +3V3STDBY 1. +12VDISP 1. LIGHT-SENSOR 1. +VDISP 1. GND
2. STANDBY 2. +12VDISP 2. GND 2. +VDISP |
3. GND 3. GND 3. RC 3. +VDISP 38. +VDISP
4. GND 4. GND 4. LED2 4. +VDISP 39. +VDISP
5. GND 5. BL_ON_OFF 5. +3V3STBY | 40. +VDISP
6. +12VS 6. PWM-DIMMING 6. LED1 51. GND 41. +VDISP
7. +12VS 7. BACKLIGHT-BOOST-A 7. KEYBOARD
8. +12VS 8. Von_Detect 8. +5V_SW
9. +24VAUDIO 9. POWER-OK
1735 (B03)
1. LEFT_SPEAKER
10. GNDSND
2. GNDSND
11. ...
3. GNDSND
19140_030_110504.eps
4. RIGHT_SPEAKER
110504
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 32
TO BACKLIGHT
8316
1KA2 1KA1
80P 80P
LOUDSPEAKER
1319 1316
(5213)
1P3 1P3 TCON
T (1157)
HIGH VOLTAGE
1KZA 1KZB
51P 41P
9P
1M99
IPB 40 PLHE-P986A
(1005)
1G51 1G50
51P 41P
SSB
11P
B 3139 123 6517.x
1M95
(1150)
8M99 9P
1M99
8M95
11P
1M95
TUNER
4P
8P
1M20 1735
USB
HDMI
SPDIF
2P3
1308
N L
1M95 (B01) 1M99 (B01) 1M20 (B04c) 1KA1 (T01F) 1KA2 (T01F)
1. +3V3STDBY 1. +12VDISP 1. LIGHT-SENSOR 1. GND 1. GND
8308 2. STANDBY 2. +12VDISP 2. GND | |
3. GND 3. GND 3. RC 11. VLS_15V6 11. VLS_15V6
INLET 4. GND 4. GND 4. LED2 12. VLS_15V6 12. VLS_15V6
5. GND 5. BL_ON_OFF 5. +3V3STBY | |
6. +12VS 6. PWM-DIMMING 6. LED1 33. VCC_3V3 33. VCC_3V3
7. +12VS 7. BACKLIGHT-BOOST-A 7. KEYBOARD 34. VCC_3V3 34. VCC_3V3
8. +12VS 8. Von_Detect 8. +5V_SW | |
9. +24VAUDIO 9. POWER-OK 78. VGH_35V 78. VGH_35V
10. GNDSND 79. VGL_-6V 79. VGL_-6V
11. ... 1G50 (B04D) 80. GND 80. GND
1G51 (B04D) 1. GND
IR/LED/CONTROL BOARD J1 1. +VDISP-INT |
1735 (B03) 2. +VDISP-INT 38. +VDISP 1KZA (T01A) 1KZB (T01A)
(1112) 8P 1. GND
1. LEFT_SPEAKER 3. +VDISP-INT 39. +VDISP 1. +VDISP-INT
2. GND-AUDIO 4. +VDISP-INT 40. +VDISP |
2. +VDISP-INT
3. GND-AUDIO | 41. +VDISP 48. +VDISP-INT
3. +VDISP-INT
4. RIGHT_SPEAKER 51. GND 49. +VDISP-INT
4. +VDISP-INT
50. +VDISP-INT
|
51. +VDISP-INT
41. GND
19140_031_110504.eps
110504
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 33
5246
8 DEMODULATOR 58 DEMOD_TSVAL V29 B04D HDMI-LVDS INTERFACE
+B CI_MIVAL 51 1 79
TUNER VGL_-6V
59 DEMOS_TSSYNC V30 7KUE 78
10 3284 CI_MISTRT VGH_35V
IF_OUT+ DIF_N TU_FAT_IN2n 29 MAX17079GTL
DEMOD_TSCLK 72
61 U32
3285 CI_MCLKI LEVEL CS(1U-12U)
11 DIF_P TU_FAT_IN2p 30 R1 CS(1-12) 61
IF_OUT- 60 DEMOD_TSDATA0 U30 AE PX1 PX1 SHIFTER
6 CI_MDIO VH
SCL DEMOD_RST
(I2C) 42 U31 50
7
SDA AGCCNTI 9 TO DISPLAY
L_LV 13
9 IF_AGC W30 AO R2 34
IF_AGC AGC_IF PX2 PX2
33
7218 RF_AGC VCC_3V3
3 W29 48
RF_AGC AGC_RF 4 12
3 49 11
VLS_15V6
7217 2 50 10
RF_AGC_SW
B04C RF_AGC_SW 1 51 VL
+VDISP +VDISP-INT
T01D P GAMMA & 2
B06B VIDEO_IO
B06B ANALOG I/O - COMPONENT & COMPOSITE VCOM & NVM 1
1G50 1KZB
1 41 7KQA 1KA2
ISL24837IRZ
SOY0 AL18 81
1C01 SOY0 REF 79
3905 VOLTAGE VL/VH VGL_-6V
12 SC1_G 5902 SY0P AM18 78
Y Y0P R3 GEN VGH_35V
BE PX3 PX3
SC1_B 5901 3904 SPB0P AM19 72
9 PB0P
CVI-1 PB 3925
SC1_CVBS_OUT 5900 SPR0P AK19 61
PR0P VH
7 50
PR TO DISPLAY
2908
SY0N AL19 BO PX4 PX4 R4 R_LV
COM0 13
SOY1 AL16 38 4 34
1C02 SOY1
39 3 33
3914 VCC_3V3
12 SY1P_SC2 5905 SY1P AM16 12
Y Y1P 40 2
3913 41 1 11
PB1P_SC2 5904 SPB1P AK17 +VDISP +VDISP-INT VLS_15V6
9 PB1P 10
CVI-2 PB
PR1P_SC2 5903 3910 SPR1P VL
AJ18
PR1P 2
7
PR 1
3908
SY1N AJ17
COM1
1C03
USB 2.0
MT5395
AR10 USB_DM 2 CONNECTOR SIDE
USB_DM
3 2
4 JPEG
B05A HDMI & MUX 7B01 B06C VGA MP3
1903 SII9187BC 1E01
1 8 1 RP
BRX2+ AM15 RP
2
10
GP AK15
15
3 7
5
BRX2- GP
1
B04C FLASH + CONTROL + EJTAG
2
4 6 3 BP AK13
BRX1+ BP 7700
13 HSYNC AL13
1
6
6
BRX1- 5 HSYNC H27U1G8F2BTR
11
R1 14 VSYNC AM13
7 BRX0+ 4 VSYNC
9 BRX0- 3
18
19
VGA AK14
2A08
10 BRXC+ 2 SOG FLASH
CONNECTOR SOG PDD NAND_PDD(0-7)
HDMI 2 12 BRXC- 1 AL15
1Gb
GN
CONNECTOR HDMI COM
1902
1 CRX2+ 18
SWITCH
B05A HDMI_ETHERNET
3 CRX2- 17
1
2
4 CRX1+ 16 B04B DDR3
6 15
B04B DDR3
CRX1-
R2
7 CRX0+ 14
9 CRX0- 13 RDQ RDQ(0-31)
18
AL9
19
10 62
CRXC+ 12 TXC_P RX_C
63 AM9 7601 7602 7603
HDMI 1 12 CRXC- 11 TXC_N RX_ CB H5TQ1G63DFR H5TQ1G63DFR H5TQ1G63DFR
60 AL10
CONNECTOR TX0_P RX_0
RDQ(0-15)
61 AM10
RDQ(16-31)
RDQ(0-15)B
1
2
4 70 56 AL12
DRX1+ TX2_P RX_2
6 69 57 AM12
DRX1- TX2_N RX_2B
R3
VDD
VDD
VDD
7 DRX0+ 68
A1 A1 A1
18
9 DRX0- 67
19
10 DRXC+ 66 RA RA(0-13)
HDMI SIDE 12 DRXC- 65 +1V5_SW
CONNECTOR
9,27,64
+3V3_SW VCC33
19140_027_110503.eps
110503
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 34
5246
8 DEMODULATOR 58 DEMOD_TSVAL V29 B02B AUDIO_DAC_ADC
+B CI_MIVAL
TUNER 59 DEMOS_TSSYNC V30
10 CI_MISTRT
IF_OUT+ DIF_N 3284 TU_FAT_IN2n 29
61 DEMOD_TSCLK U32
CI_MCLKI 7400
11 DIF_P 3285 TU_FAT_IN2p 30 7302 1735
IF_OUT- 60 DEMOD_TSDATA0 U30 TPA3123D2PWP
6 CI_MDIO AG32 PREAMPL 2 1 AUDIO_LS 5 22 LEFT_SPEAKER 1
SCL DEMOD_RST AL1_ADAC
(I2C) 42 U31
7 SPEAKER
SDA AGCCNTI 9 AG31 PREAMPR 6 7 AUDIO_RS 6 2 LEFT
AR1_ADAC
CLASS D
9 IF_AGC W30
IF_AGC AGC_IF POWER GNDSND 3
1C01
5 CVI1_L AK27 AIN0_L_AADC
AV IN
CVI-1 AUDIO
L/R 3 CVI1_R AK29
AIN0_R_AADC
1C02
5 CVI2_L AL30 AIN1_L_AADC
AV IN
CVI-2 AUDIO B04C CONTROL B05B USB
L/R 3 CVI2_R AL32
AIN1_R_AADC 1D01
1
1
USB 2.0
1C03 AR10 USB_DM 2 CONNECTOR SIDE
USB_DM
3 2
AIN4_L_AADC 4 JPEG
AV IN MP3
CVBS AUDIO
SIDE 8 SAV_R_IN AJ27 AIN4_R_AADC
L/R
MT5395
NAND_PDD(0-7)
1
2
4 BRX1+ 6 1Gb
6 BRX1- 5
R1 B02B AUDIO PREPROCESS
7 BRX0+ 4 7303 +3V3
9 3 1B02 74LVC00
BRX0-
18
2
19
10 2 SPDIF 2 SPDIF_OUT 3 &
BRXC+ 1 SPDIF_OUT-MTK AA31
OUT ASPDIF
HDMI 2 12 BRXC- 1 B04B DRAM
4 B04B DDR3
CONNECTOR HDMI B05 GPIO
8
1901 5 SEL-HDMI-ARC E28 GPIO_12
SWITCH ASPDIF
1 DRX2+ 72 RDQ RDQ(0-31)
3 DRX2- 71
1
2
B05A HDMI_ETHERNET 7601 7602 7603
4 DRX1+ 70 H5TQ1G63DFR H5TQ1G63DFR H5TQ1G63DFR
6 DRX1- 69
RDQ(0-15)
RDQ(16-31)
RDQ(0-15)B
18
9 DRX0- 67
19
1Gb 1Gb 1Gb
10 DRXC+ 66 TXC_P 62 AL9
RX_C
HDMI SIDE 12 DRXC- 65 TXC_N 63 AM9
RX_ CB
CONNECTOR TX0_P 60 AL10
RX_0
VDD
VDD
VDD
TX0_N 61 AM10
9,27,64 RX_0B
+3V3_SW VCC33 AL11 A1 A1 A1
TX1_P 58 RX_1
TX1_N 59 AM11 RA RA(0-13)
1902 RX_1B
TX2_P 56 AL12
1 RX_2 +1V5_SW
CRX2+ 18 AM12
TX2_N 57 RX_2B
3 CRX2- 17 R3
1
2
4 CRX1+ 16
6 CRX1- 15
R2
7 CRX0+ 14
9 CRX0- 13
18
19
10 CRXC+ 12
HDMI 1 12 CRXC- 11
CONNECTOR 14 eHDMI+
19140_028_110503.eps
110503
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 35
B04B DRAM
RDQ RDQ(0-31)
RDQ(0-15)
RDQ(16-31)
RDQ(0-15)B
SDRAM SDRAM SDRAM
1Gb 1Gb 1Gb
MT5395
RA RA(0-13)
B04C GPIO_USB
B04C FLASH + CONTROL + EJTAG B04C FLASH + CONTROL + EJTAG
RF_AGC_SW C32
B02A GPIO22 D30 SYS_EEPROM_WE
GPIO18 B04C
DC_PROTECT AK6
B03 GPIO0 E30 LCD_PWR_ON
GPIO17 B04D
USB_PWR_EN AJ6 AK8 POWER_OK
B06D GPIO1 GPIO5 B01
USB_OCP AK7 E28 INT
B06D GPIO3 GPIO12 B05A
BL_ON_OFF AJ8 AH17 SW_MUTE
B01 GPIO6 ADIN4_SRV B03
K30 SEL-HDMI-ARC
GPIO13 B02B
2701 N27
GPIO9 7700
SDM H27U1G8F2BTR
2700 N28
GPIO10
B04C SERIAL_NAND_
PANEL FLASH
SDIO_SPI
B04C CONTROL PDD NAND_PDD(0-7) 1Gb
VDD
4 ORESET AH13 AL7 USB_DM 2 USB 2.0
VOUT ORESET USB_2P_DM0
3 CONNECTOR
3 2
AM7 USB_DP
USB_2P_DP0 SIDE
4
4
3
19140_044_110505.eps
110505
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 36
7300 +3V3_SW
MT5395AVOJ
B04C MISC
3747
3748
AA29 SDA
OSDA_0
AA30 SCL
OSCL_0
3B19
3B10
3750
3749
5 6 53 54 1E01
10
15
7702 1704
5
47 VGA_SDA 12
D30 SYS_EEPROM_WE 7 3753
GPIO_18 7705 2 7B01 TO
M24C64 15
1
VGA_SCL
6
SII9187BCNU 48 TCON
11
7700 3754 3
H27U1G8F2BTR AIN-5V
EEPROM HDMI
4D18
4D17
MT5395 (NVM) RES MUX VGA
2 1 CONNECTOR
FLASH 1903
ERR
3B01
3B00
NAND 35 ERR
1
PDD
2
1Gb 33 BRX-DDC-SDA 16 7D04
23
PCA9540BDP
BRX-DDC-SCL 15 1G51
MAIN NVM 34
18
4D16
19
SW CIN-5V I2C 7 SDA_VCOM 50
SWITCH TO
HDMI 4D14 SCL_VCOM 49
8 TCON
+3V3STBY CONNECTOR 2
1902
3B03
3B02
1
2
39 CRX-DDC-SDA 16
1701
3758
3757
3769 3756 40 CRX-DDC-SCL 15
AT21 UART_RX
18
3
19
U0_RX UART DIN-5V
3770 UART_TX 3755 SERVICE
AP21 2 HDMI
U0_TX CONNECTOR CONNECTOR 1
1
1901
3B05
3B04
1
2
43 DRX-DDC-SDA 16
+3V3_SW 44 DRX-DDC-SCL 15
18
19
HDMI
CONNECTOR SIDE
37AN
37AO
AB29 SDA_VCOM
AB30 SCL_VCOM
T01A DISPLAY INTERFACE- T01B TCON CONTROL T01D P GAMMA & VCOM & FLASH
LVDS & IR/KETBOARD
+3V3_SW CONNECTOR VCC_3V3
1KZA 1KQB
B02A DEMOD
3281
3280
3KTV
3KTU
3352
3351
B04B DRAM B4B DDR 46 45 E19 E20 12 13
RES
7210 14 FE_SDA 7KAA 7KQA
RDQ RDQ(0-31)
7601 7602 7603 TC90517FG UPD809900F1 ISL24837IRZ
12 FE_SCL DEBUG ONLY
H5TQ1G63DFR H5TQ1G63DFR H5TQ1G63DFR
DEMODULATOR TCON VOLTAGE
RDQ
RDQ
RDQ
CONTROL GENERATOR
3228
3230
1201
VA1E1BF2403
RA MAIN
RA(0-13)
TUNER
ERR
B04A OPCTRL B07 HOSPITALITY (RESERVED) 34
TCON 1E00
AE14 SDA-LCD 3E00 2
OPCTRL0
AG12 SCL-LCD 3E01 3
OPCTRL1
RES
19140_029_110503.eps
110503
2011-May-06
Block Diagrams L11M1.2L LA 9. EN 37
19140_026_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 38
DC-DC
B01 B01
12V/3V3 CONVERSION
7116 1M99
RT8283AHGSP 1 F102
1M99 +12VDISP
5101 I154 2 F103
I105 I144 3102 2103 PIN ON STBY
2 1 3 F104
VIN BOOT 1 12V 0V
1R0 5100 4
33R I145 I117 100n F101 5 3V 0V
7 3 5 F105 3126 68R BL_ON_OFF
EN SW +3V3_SW 6 >1.5V 0V 6 F106 3127 68R PWM-DIMMING
I146 I136 10u
10u
10u
7 1.5V 0V
RES
2102
BACKLIGHT-BOOST-A
2196
2101
3100
150K
2100 100n 8 5 7 F107 3128 68R
10u 16V
SS FB 9 3V 0V 8 F108 Von_Detect
I106
22u
22u
POWER_OK
3105
2126
10 6 F109
2105
9
2104
4K7 1%
VIA COMP
100u 6.3V
GND
GND HS 2041145-9
4
9
SS1_GND
3n3
10R
3103
RES
2107
56K
10n
3101
3104
3106
100K
100p
100p
100p
100p
100p
100p
I118
1K5 1%
10n
10n
2185
2127
2128
2133
2134
2135
10n
12K
RES
2106
470p
3107
SS1_GND SS1_GND SS1_GND
RES 2129
RES 2138 100n
RES 2139 100n
RES 2131
RES 2132
RES 2108
12V/5V CONVERSION SS1_GND +3V3STBY
SS1_GND
F139
7117 +5V5_TUN
1n0
2136
2197
RT8283AHGSP
3129 F138 STANDBY
220u 6.3V
5103 I123 I147 3109 I155 2113 1M95
2 1 1M95 68R
VIN BOOT PIN ON STBY
1R0 5102 1 F113
33R 3108 I150 I148 100n 6100 F127 1 3V3 3V3
1n0
10u
10u
RES
2137
2191
2192
7 3 +5V_SW 2 F114
EN SW 2 0V 3V
1n0
2180
RES
10u 3 F115
100K I120 I149 SS36 6 12V 0V
10u
10u
RES
2112
2111
2110
2109 22n 8 5 4
10u 16V
SS FB 7 12V 0V
5
I122 8 12V 0V
10u
22u
22u
3112
2117
2118
2114
10 6
470R
470R
470R
F118
2115
6 +12VS
VIA COMP
100K 1%
9 25V 0V
100u 6.3V
100u 6.3V
GND 7 F119
RES 2116
SS2_GND GND HS 8 F120
RES 3164
RES 3165
RES 3166
4
9
9 F121 +24VAUDIO
3n3
10R
F100
3110
RES
2120
+12VS 10 F122
GNDSND
11 F123
I119
1-2041145-1
2189
2188
100n
2187
100n
100u 16V
SS2_GND
1n0
1n0
1n0
10n
22K
RES
RES
2119
470p
2141
2142
100n
2143
100n
2144
2140
100n
2145
100n
100n
3111
3114
RES 2198
RES 2199
1M0
RES 2121
RES
3113
18K 1%
12V/1V5 CONVERSION SS2_GND
SS2_GND GNDSND GNDSND
SS2_GND SS2_GND GNDSND
7118
RT8283AHGSP
5105 I104 I135 3115 I156 2166
2 1
VIN BOOT
33R I132 I131 1R0 100n 5104 F128
3116
7 3 +1V5_SW
EN SW
100K I152 I151 3u6
10u
10u
RES
2125
2124
2123
2122 22n 8 5
10u 16V
SS FB
I127
22u
22u
22u
22u
10K
RES
2167
3119
2168
10 6
2169
VIA COMP
100u 6.3V
GND
RES 2170
RES 2171
GND HS
F140
4
9
SS3_GND 5V/3V3 CONVERSION
3163
3n3
10R
3118
RES
2164
SENSE_1V5_DDR
0R
RES
I134
7122
15K
3120
LD1117DT33
RES RES
SS3_GND 6104 I157 6105 F141
10n
8K2
3117
2172
470p
RES
+5V_SW 3 2
IN OUT +3V3_AUD
33R 33R
RES 2165
COM
10n
10u
22u
22u
10n
100n
3121
3122
330K
1
18K 1%
SS3_GND SS3_GND
RES 21AB
RES 21AF
RES 21AA
RES 21AC
RES 21AD
RES 21AE
SS3_GND SS3_GND
6102 I138
10u
10u
10u
2177
2178
2179
100n
6103 I137
1u0
5 6 7 8 3V3/1V2 CONVERSION
2174
2175
100n
100u 16V
+5V5_TUN
RES 2176
RES 2181
4 7113
BAT54 COL
7110 LD1117DT12
I140
1 2 3
5
RT8110A-GSP I125 I126
5111 5110 F129
2u2
2173
VCC 3 2
+3V3_SW IN OUT +1V2_SW
7 8
VIN BOOT 33R 33R
47K
3R3
3R3
3123
3124
3125
I141 COM
2
UGATE
22u
10n
22u
22u
47u
10n
2155
RES
2154
100n
2156
2157
2160
2162
1 +1V1_SW
PHASE
RES 2161
RES 2163
8
5 6 78 3u6
6 4
FB LGATE
4
10u
10R
RES
1 2 3
2182
2183
4101
3137
2147
10 I142
VIA
RES
6101
7121
100u 16V
3133-1 22R
3133-2 22R 7
3133-3 22R 6
3133-4 22R 5
STPS2L30A
1
2
3
4
RES 47u
GND GND_HS SI4778DY
3
9
3146
47K
3132
SENSE_1V1_MT5395
10n
2146
1n0
ROUND 4.02mm SCREW HOLE SLOT SCREW HOLE 4.02X5.0
2184
3162
820R
SS4_GND 1X01
I153 1X02 1X03 1X05 1X04 REF EMC HOLE
REF EMC HOLE REF EMC HOLE REF EMC HOLE EMC HOLE
3130
3131
470K
2K2 1%
F126
SS4_GND
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_001_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 39
22u
1u0
10n
10u
22u
10K
2277
2278
2280
2279
2281
2282
3264
100n
2
I221 RES RES RES RES
3269 I222
RES 4201
RES 4202
3265 I220 1K0 AGND AGND AGND AGND AGND
7217
8
7
6
5
8
7
6
5
BC847BW
10R
10R
10R
10R
1K0
1
2
3
4
1
2
3
4
F213 AGND F250
3282-1
3282-2
3282-3
3282-4
3283-1 RES 10R
3283-2 RES 10R
3283-3 RES 10R
3283-4 RES 10R
3270 RF_AGC
RF_AGC_EX
10K
1201
AGND I254 5222 F235 AGND
15
16
+5V_SW +5VS
MT
2295
47n
22u
RES
2293
2213
1 F201 AGND 7218 10u
ANT_PWR
2 F202 KTK5132E
NC1 100p
3 F203 2283 2284
RF_AGC 22u 10n
4 F204
NC2 AGND AGND
5 F205 AGND 3230
AS
6 F206 FE_SCL
SCL
7 F207
SDA 100R AGND AGND
8 4u7
TUNER
F208 5246
+B
33p
2226
9 F209
IF_AGC
10 A212 RES 5207 30R +5VTUN_DIGITAL
IF_OUT+
11 A213
IF_OUT-
12 A214 2258 100n 3228
IF_OUT_ANALOG AGND
FE_SDA FATn
MT
14
13
AGND 100R AGND AGND
22u
47u
2296
2294
33p
2225
RES
RES
1n0
RES
2297
2285
A225 AGND AGND F246
3261
47p
RES
2240
180p
IF_AGC
AGND 27p
4K7 3262 I257 3284 3278 2287
RES 2286
DIF_N TU_FAT_IN2n
AGND
10n
RES
2262
100p
2263
0R 330R 120R 10n
10n
RES
2237
RES
AGND AGND
DIF_N
33p
33p
10n
RES
5244
330n
330n
2288
2238
RES
DIF_P
10n
RES 5228
2239
RES
RES 2242
3263 3285 3279 2289
DIF_P TU_FAT_IN2p
0R I260 330R 120R 10n
RES 2290
47p
2241
180p
RES
+2V5_SW +1V2_SW
27p
RES 2291
5235 I204 I200 5231 AGND AGND
FATp
30R 30R
Near MT5395
1u0
10n
1u0
Near Tuner
2216
2244
100n
2245
2200
100n
2201
100n
2202
100n
2203
100n
2204
+3V3_SW
5236 AGND AGND AGND I205 I201 DGND DGND DGND DGND DGND 5232
30R 30R
1u0
1u0
2217
2246
100n
2205
100n
2206
100n
2207
100n
2208
100n
2209
+1V2_SW
5237 AGND AGND I206 I202 DGND DGND DGND DGND DGND 5233
2236 10K
1u0
1u0
2218
2247
100n
2210
100n
2211
100n
2212
+2V5_SW
47n 3271
+5V_SW
DGND DGND I203 DGND DGND DGND 5234 10K 7300-6
MT5395
RF_AGC 3272
30R DEMOD_IF
1203 FOR DEVELOPMENT USE 2235 10K
1 3 (TOP side)
F249 W30 R29
IF_AGC PVR_TSCLK
1u0
2214
100n
2215
6201 F248 W29 T28
25.4M 7211 3207 47n RF_AGC PVR_TSVAL
R28
4
2
BC847BW +3V3_SW PVR_TSSYNC
18p
18p
2220
2219
1K0 TUNER_SCL V32 R31
3206 SML-310 TUNER_CLK PVR_TSDATA0
7210 RES TUNER_SDA V31 R32
DGND DGND RES TUNER_DATA PVR_TSDATA1
32
22
20
16
36
56
63
13
35
49
64
34
43
TC90517FG
1K0
I216 VDDC VDDS DEMOD_RST U31 P31
AGND AGND Φ RES RES DEMOD_RST SPI_CLK
19 21 I207 2221 1n5 DEMOD_TSCLK U32 P30
I FIL DEMOD_TSCLK SPI_CLK1
I217 3200 33R AGND DEMOD_TSVAL V29 P28
PLLVDD
X DEMOD_TSVAL SPI_CLE
DR2VDD
I208
DR1VDD 48
18 58 1 2 DEMOD_TSVAL DEMOD_TSSYNC V30 P32
AD_AVDD
AD_DVDD
O PBVAL DGND DEMOD_TSSYNC SPI_DATA
DEMOD_TSDATA0 U30
DEMOD_TSDATA0
3 53 P29
0 RERR CI_INT I263
FATp 2 XSEL U29 AL24 3273 49R9 TU_FAT_IN2p
1 CI_TSCLK ADCINN_DEMOD
DGND 54 T27 AM24 3274 49R9 TU_FAT_IN2n
RLOCK CI_TSVAL ADCINP_DEMOD
2223 1u0 30 RES 3201 33R U28
P CI_TSSYNC I264
1n2
4K7
4K7
RES
RES
I209
5245
2243
100n
3280
3281
2K7
2K7
I223
3213
3212
2232 100n 24 3203 33R
P DEMOD_TSCLK
2233 100n I224 25 AD_VREF 61 I211 1 2 4203
N SRCK
AGND 3204 33R
2234 100n I225 26 60 I212 1 2 DEMOD_TSDATA0
AD_VREF SRDT
AGND 4204
AGND AGND
39 38
DTCLK STSFLG1
DGND
I213 3205 20K
40 9 IF_AGC 4205 4206
+3V3_SW DTMB AGCCNTI
8 10 RES
S_INFO AGCCNTR 3276 4207 4208
3214 10K I226 +3V3_SW
1 51 4K7
DGND 0 STSFLG0
41 TSMD
1 F215 5240 5241
42 DEMOD_RST
3215 I227 SYRSTN
7 I231
AGCI +3V3_SW 30R 30R
10K I228 6
0
11 SLADRS 5
CKI 1
DGND
4K7
2222
100n
3277
10K
10K
3208
3209
TUNER_SDA F219 3217 100R I230 46 TN 14
SDA SDA
VSS
2K7
2K7
AD_AVSS
AD_DVSS
PLLVSS
3210
3211
I214
AGND DGND
4
I215
23
31
17
15
33
37
44
47
50
57
62
39p
39p
RES
2248
2249
RES
F216 FE_SCL
F217 FE_SDA
AGND AGND
7220 DGND DGND
LD1117DT25
DGND DGND
5242 I255 I256 5243 F247
+5V_SW 3 2
IN OUT +2V5_SW
30R 30R
COM
2298
2299
100n
2227
2228
100n
2229
100n
1
47u 16V
100u 16V
DGND DGND DGND DGND DGND DGND
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_002_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 40
Audio preprocess
Audio preprocess
B02B B02B
RES
RES
3300
+3V3_SW
1R0
100n
RES
47u 16V
3338 1K0
+3V3_SW
RES 2301
RES 2300
7300-2 RES
MT5395 3339 1K0 RES
3301
AUDIO_DAC_ADC +3V3_SW
1R0
AM30 AF20
RES
4
AIN0_L_AADC MPXP
13
AM32 AG20 7301
AIN0_R_AADC MPXN
RES
RES
UDA1334BTS 2303
2302
100n
CVI1_L AK27
AIN1_L_AADC
47u 16V
AG29 RES
AR2_ADAC I308 RES 3308 3310 3309
AJ30 RES 3346 20K HPOUTR 14 VOL VOR 16 AUDIO_RS
AR3_ADAC
470R 470R 470R
1u0
1u0
VSSA VSSD VREF-DAC
10n
2334
2335
RES
2307
15
5
12
AOUTL
100n
47u 16V
RES 2305
RES 2306
3311 AUDIO_LS
470R
10n
RES
2308
+3V3-ARC
3322
22K
7303-1
14
74LVC00APW
F305
2324
220p
7
+3V3_SW 1
+12VS 10u
33p
+3V3-ARC
2320
3334
2325
820p
100R
8
+3V3_SW LM833
3335 I312 7302-1
F301 +12VS
47K
3330
+3V3-ARC
1R0
30R
2321
100n
5300
I302
10K
3332
7303-2
47K
14
3325
74LVC00APW 7303-3
14
4 & 74LVC00APW
6 9 & I303
F306 I315 2322 I316 3336 I310 2323 F302
1u0
eHDMI+
2332
SEL-HDMI-ARC 5 8
+3V3_SW 10
100n 180R 100n
7
10u
47K
2327
3326
7
68R
3337
+3V3-ARC 7302-2
7303-4 LM833
8
14
74LVC00APW 5
2331
12 & 7 AUDIO_RS
I313 2337 F303 3327
11 PREAMPR 6
10u
13
4
7
47K
2329
820p
3331
2328
220p
3329
22K
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_003_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 41
5400
5401
220R
220R
3400 F400 GNDSND GNDSND
40
39
38
+24VAUDIO 7400-2
I411 I412 TPA3123D2PWP LEFT_SPEAKER
4R7
22K
22K
22K
22K
VIA
26 37
5
6
7
8
27 36
VIA
2405
2404
220n
2401
2400
220n
2403
2402
220n
28 VIA VIA 35
10u 35V
10n
RES
1K0
1K0
4402
2413
220n
2414
220n
3452
3451
1402
29 34 2419
220u 35V
220u 35V
V_NOM
1735
4
3
2
1
VIA F404 1
GNDSND GNDSND LEFT+
F405 2
GNDSND GNDSND GNDSND
3
30
31
32
33
3405-4
3405-3
3405-2
3405-1
2433 GNDSND
F406 4
GNDSND RIGHT-
100p 7400-1
TPA3123D2PWP 2041145-4
F401 2434
10n
10n
GNDSND
19
20
1
3
10
12
2420
1403
2421
AOUTR
V_NOM
I401
1K0
1K0
3454
3453
47n AVCC L R
2435 PVCC I413 2411
16 5402 2415
BSR I415 I417
6 Φ RIGHT_SPEAKER
100p R CLASS-D 220n RIGHT_SPEAKER
15 25V 220u
F402 2407 IN R 22u
AOUTL I403 5 AUDIO AMP
L OUT
22 5403 2416
47n L I416
4403 18 I418 LEFT_SPEAKER
0 I414 2412
1401
1 BSL 22u
I405 220n
2408 1u0 11
GNDSND 1u0 VCLAMP
2409 7
BYPASS
I406 4
3448 F411 MUTE
MUTE 2
SD
4K7 F412 PGND
A_STBY
22K
22K
22K
22K
AGND L R GND_HS
5
6
7
8
8
9
23
24
13
14
25
2417
220n
2418
220n
1u0
2437
4
3
2
1
DC_PROTECT F418
3406-4
3406-3
3406-2
3406-1
LEFT_SPEAKER F419 3441-2 I444 GNDSND
5 3441-4 4 2 7 7415
BC847BW
100K 100K
1u0
GNDSND
2438
1 3441-1 8
+12VS
100K
RIGHT_SPEAKER 2439
6 3441-3 3 RES FOR HP
GNDSND
100K 10u
GNDSND GNDSND F415
1K0
3418
+5V_SW +12VS I424
F408 3412 F416 RES
I440 3431
4n7
47K
RES
2430
3430
1
6
RES
1K0
7403 47K
7402-1
I435
BC857BS(COL) BC847BW 3 2
RES
6404
F409
BAS316
4401 1 1 7411 RES
2
I425 I433 BC857BW I436 RES
3411 3413 3432
7412
10K
RES
3433
3 2SD2653K
I423 4K7 1K8 2 1K0
4K7
RES
3410
2422
I402 4 HP_LOUT
3449 3426
4n7
47K
RES
2424
3420
470u 16V
BC857BS(COL)
5 7402-2 6402 HP_ROUT
56K 47K
I430
BAT54C 2
I442
3 I429
1 I431
3428
4n7
47K
47K
2431
3434
3450
RES
RES
RES
7406
7404
10K
3419
6401 3 2SD2653K
BC857BW 1K0
F413
+3V3STBY AOUTL RES
BAS316 I437 RES
3435
7413
7405 AOUTR
3416
RES 2SD2653K
100K
RES
3415 BSS84 1K0
RES
3414
100K
I441
1R0
2 3
4n7
47K
2425
3421
RES
1
SW_MUTE F414
3427 I432
+3V3STBY 7407
10K
3417
2SD2653K
2423
100n
1K0
10K
3439
F417 3K0
A_STBY
I445
1u0
22K
3438
2432
7414
BC847BW
6403
1 2011-02-16
BAT54C
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_004_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 42
MTK5395 Power
B04A +1V1_SW
7300-3
B04A
MT5395
CORE_POWER
F500
SENSE_1V1_MT5395
L12 V15 +1V5_SW
VCCK_1 DVSS_51
L14 V16
F504 VCCK_2 DVSS_52
L16 W4
VCCK_3 DVSS_53
M12 W11 7300-5
VCCK_4 DVSS_54
100n
100n
100n
100n
100n
100n
100n
M14 W12 MT5395
VCCK_5 DVSS_55
4u7
4u7
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
2507
N11 W13
VCCK_6 DVSS_56 DDR_POWER
2588
N12 W14
2500
2501
2502
2503
2504
2505
2506
VCCK_7 DVSS_57
220u 6.3V
P11 W15 D4 U3
2582 100n
2580 100n
2573 100n
2571 100n
2564 100n
2562 100n
2586
2585
2584
2583
2581
2579
2578
2577
2576
2575
2574
2572
2570
2569
2568
2567
2566
2565
2563
2561
2560
2587
VCCK_8 DVSS_58 VCC2IO_1 VCC2IO_9
P12 W16 E5 W3
VCCK_9 DVSS_59 VCC2IO_2 VCC2IO_10
T11 Y13 E10 AC4
VCCK_10 DVSS_60 VCC2IO_3 VCC2IO_11
V11 Y14 F6 AE4
VCCK_11 DVSS_61 VCC2IO_4 VCC2IO_12
100n
100n
100n
100n
100n
V12 Y15 F7 AF1
VCCK_12 DVSS_62 VCC2IO_5 VCC2IO_13
Y11 Y16 G7 AF2
VCCK_13 DVSS_63 VCC2IO_6 VCC2IO_14
Y12 AA13 H3 AF3
2510
2511
2512
2513
2514
VCCK_14 DVSS_64 VCC2IO_7 VCC2IO_15
AA11 AA14 L3
VCCK_15 DVSS_65 VCC2IO_8
AA12 AA16
VCCK_16 DVSS_66
AA15 AB4
VCCK_17 DVSS_67
100n
100n
AB13 AB11
VCCK_18 DVSS_68
AB15 AB12
VCCK_19 DVSS_69
AG1 AB14
2508
2509
VCCK_20 DVSS_70
5501
AG2 AB16
F505 VCCK_21 DVSS_71
AG3 AD3
+1V2_SW VCCK_22 DVSS_72 +3V3STBY
AG4 AD4
30R VCCK_23 DVSS_73
AG5 AD5
VCCK_24 DVSS_74
N21 AF8
VCCK_25 DVSS_75
100n
100n
100n
100n
100n
100n
100n
P21 AF16
+3V3_SW VCCK_26 DVSS_76
4u7
2526
T20 F28
VCCK_27 DVSS_77
4K7
4K7
4K7
4K7
10K
T21 L27
2521 100n
2523 100n
2525 1u0
2516
2517
2518
2519
2520
2522
2524
VCCK_28 DVSS_78
U22 M19
4K7
3569
VCCK_29 DVSS_79
Y20 N17
+3V3STBY VCCK_30 DVSS_80
Y21 N18 STANDBY
VCCK_31 DVSS_81
30R
5502
2527 AA17 N19 3
VCCK_32 DVSS_82 3557
3568
3566
3565
3564
1K3
2
3567
P20
DVSS_87
100n
100n
100n
100n
100n
AC_POWER A14 R17
DVSS_1 DVSS_88
4u7
2559
AH16 K6 B14 R18
AVDD10_LDO AVSS12_MEMPLL DVSS_2 DVSS_89
AC17 C14 R19 MUTE
2528
2529
2530
2531
2532
AVSS12_RGB DVSS_3 DVSS_90
J6 AC20 D2 R20 3
AVDD12_MEMPLL AVSS12_PLL DVSS_4 DVSS_91
AK11 AH24 D14 R21
AVDD12_HDMI AVSS12_DEMOD DVSS_5 DVSS_92 3561 I509
AK18 W23 E14 R26 7503 1
AVDD12_RGB AVSS12_COM DVSS_6 DVSS_93 BC847BW
AG19 AF29 F9 R27
AVDD12_PLL AVSS12_REC DVSS_7 DVSS_94 1K0
AK25 F19 F10 T17
AVDD12_DEMOD AVSS12_VB1A DVSS_8 DVSS_95 2
AD30 G24 F14 T18
AVDD12_COM AVSS12_VB1B DVSS_9 DVSS_96
4K7
3570
100n
100n
100n
100n
100n
F22 H4 U17
AVDD12_VB1A DVSS_11 DVSS_98
G26 AC12 H14 U18
+3V3STBY AVDD12_VB1B AVSS33_USB_2P DVSS_12 DVSS_99
E22 AC13 J14 U19
2533
2534
2535
2536
2537
AVDD12_VPLL AVSS33_HDMI DVSS_13 DVSS_100
AC15 K4 U20
5503 30R AVSS33_VGA_STB DVSS_14 DVSS_101
AH6 AC19 L11 U21
2538 1u0 AVDD33_USB_2P AVSS33_VDAC DVSS_15 DVSS_102
AG8 AC21 L13 V17
I504 AVDD33_HDMI AVSS33_CVBS DVSS_16 DVSS_103
2539 100n AK16 AF22 L15 V18
+3V3STBY AVDD33_VGA_STB AVSS33_DEMOD DVSS_17 DVSS_104
AH20 AG23 M11 V19 RESET_AUDIO
+3V3_AUD AVDD33_VDAC AVSS33_XTAL DVSS_18 DVSS_105
AH23 AB22 M13 V20 3
5504 30R
AVDD33_CVBS AVSS33_AADC DVSS_19 DVSS_106 SCL-LCD
4501 AF23 AA22 M15 V21
2540 1u0 AVDD33_IFPGA AVSS33_DAC DVSS_20 DVSS_107 3553 I510
RES AJ24 Y22 M16 W17 7504 1
I505 AVDD33_DEMOD AVSS33_DAC1 DVSS_21 DVSS_108 SDA-LCD
2541 100n AK26 AG28 N4 W18 BC847BW
AVDD33_XTAL_STB AVSS33_COM DVSS_22 DVSS_109 1K0
AJ29 W22 N13 W19
AVDD33_AADC AVSS33_REC DVSS_23 DVSS_110 2
AJ28 V22 N14 W20
AVDD33_DAC AVSS33_LD DVSS_24 DVSS_111
4K7
3571
30R
47R
47R
5507
3572
3573
F23 P16 AA20
AVDD33_LVDSB DVSS_30 DVSS_117 OPCTRL_TCON
R11 AA21
DVSS_31 DVSS_118
AE9 R12 AB20 AE14 F31
VCC3IO_1 DVSS_32 DVSS_119 OPCTRL0 SOE
I506
I507
I508
AE10 R13 AB21 LED2 AG12
VCC3IO_2 DVSS_33 DVSS_120 OPCTRL1
10n
I512
2542
AF9 R14 AD26 POWER_DOWN 3549 100R AJ11 G32
100n
100n
100n
VCC3IO_3 DVSS_34 DVSS_121 I513 OPCTRL2 POL
AF10 R15 AE25 LED1 3550 100R AH12
VCC3IO_4 DVSS_35 DVSS_122 OPCTRL3
4u7
I514
2548
2546
2544
L22 R16 AE26 3551 100R AK12 J32
VCC3IO_5 DVSS_36 DVSS_123 OPCTRL4 VST
47u 16V
47u 16V
L23 T4 AE27 3552 100R I515 AJ12
2547
2545
2543
VCC3IO_6 DVSS_37 DVSS_124 I511 OPCTRL5
M22 T12 AF25 3548 100R AF12 K32
VCC3IO_7 DVSS_38 DVSS_125 OPCTRL6 GCLK1
M23 T13 AF26 L32
VCC3IO_8 DVSS_39 DVSS_126 GCLK2
N23 T14 AF27 3554 100R I516 AF13 J30
VCC3IO_9 DVSS_40 DVSS_127 OPWRSB GCLK3
5508
T15 AF28 K28
F506 DVSS_41 DVSS_128 GCLK4
T16 AG26 CEC AJ10 K29
+3V3_SW DVSS_42 DVSS_129 HDMI_CEC GCLK5
U11 AG27 AK9 G30
30R DVSS_43 DVSS_130 HDMI_SDA GCLK6
U12 AH27 AJ9
DVSS_44 DVSS_131 HDMI_SCL
U13 AH28 AK10 K31
DVSS_45 DVSS_132 HDMI_HPD FLK
100n
100n
100n
100n
100n
100n
100n
U14 AH29
DVSS_46 DVSS_133
4u7
2549
U15 AK30 AG10 M28
DVSS_47 DVSS_134 PWR5V DPM
U16 AK31
2552 100n
2554 100n
2550
2551
2553
2555
2556
2557
2558
DVSS_48 DVSS_135
V13 AK32 AG14 G31
DVSS_49 DVSS_136 VGA_SDA VGH_ODD
V14 AF14 J31
DVSS_50 VGA_SCL VGH_EVEN
+3V3STBY
F507
F502 3535
POWER_DOWN
22K
15K
3534
RES
6500
I501
7501
BZX384-C3V3
BC847BW
STRAPPING OPCTRL5(0) OPCTRL4(0) ASPIF(0)
ICE MODE+27M+Serial Boot 0 0 0
ROM Boot+27M 0 0 1 I502 3543 F503 6501
ICE MODE+54M+Serial Boot 0 1 0 7502 +12VS
BC847BW
ROM Boot+54M 0 1 1 1K0 BZX384-C8V2
1K0
2515
220n
3542
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_005_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 43
DDR
DDR3
B04B B04B
+1V5_SW +1V5_SW +1V5_SW +1V5_SW
100n
100n
100n
100n
+1V5_SW +1V5_SW
2651
2649
2655
2653
1% 3632 1K0
1% 3627 1K0
1% 3625 1K0
1% 3634 1K0
7300-4
MT5395
DDR3
100n
100n
100n
100n
RA(0) N3 M3 RODT 7601
ARA0 ARODT 7602
RA(1) U5 P2 A_RREST_MEM H5TQ1G63BFR-H9C
3628 1K0
3635 1K0
ARA1 ARRESET H5TQ1G63BFR-H9C
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
RA(2) P4
ARA2
2652
2650
2656
2654
1% 3633 1K0
1%
1% 3626 1K0
1%
RA(3) N2 D6 RA0_B
ARA3 BRA0 VDD VDDQ VDD VDDQ
RA(4) U4 C6 RA1_B
ARA4 BRA1
RA(5) R3 A2 RA2_B RA(0) 3644-4 0R N3 RA(0) 3651-4 0R N3
ARA5 BRA2 0 0
RA(6) T6 A1 RA3_B RA(1) 3645-4 0R P7 RA(1) 3653-1 0R P7
ARA6 BRA3 1 1
RA(7) P3 B6 RA4_B RA(2) 3647-2 0R P3 RA(2) 3655-2 0R P3
ARA7 BRA4 2 2
RA(8) T5 B2 RA5_B RA(3) 3644-3 0R N2 RA(3) 3651-3 0R N2
ARA8 BRA5 3 3
RA(9) P1 C5 RA6_B RA(4) 3645-3 0R P8 D7 RDQ(8) RA(4) 3653-2 0R P8 D7 RDQ(24)
ARA9 BRA6 4 0 4 0
RA(10) N6 B3 RA7_B RA(5) 3647-1 0R P2 C3 RDQ(9) RA(5) 3655-1 0R P2 C3 RDQ(25)
ARA10 BRA7 5 1 5 1
RA(11) R5 D5 RA8_B RA(6) 3645-2 0R R8 A C8 RDQ(10) RA(6) 3653-3 0R R8 A C8 RDQ(26)
ARA11 BRA8 6 2 6 2
RA(12) P6 A3 RA9_B RA(7) 3647-3 0R R2 C2 RDQ(11) RA(7) 3655-3 0R R2 C2 RDQ(27)
ARA12 BRA9 7 3 7 3
RA(13) N1 B7 RA10_B RA(8) 3645-1 0R T8 DQU A7 RDQ(12) RA(8) 3653-4 0R T8 DQU A7 RDQ(28)
ARA13 BRA10 8 4 8 4
B4 RA11_B RA(9) 3647-4 0R R3 A2 RDQ(13) RA(9) 3655-4 0R R3 A2 RDQ(29)
BRA11 9 5 9 5
RBA(0) R4 A4 RA12_B RA(10) 3630-4 0R L7 B8 RDQ(14) RA(10) 3652-4 0R L7 B8 RDQ(30)
ARBA0 BRA12 10 6 10 6
RBA(1) P5 C4 RA13_B RA(11) 3646-4 0R R7 A3 RDQ(15) RA(11) 3636-1 0R R7 A3 RDQ(31)
ARBA1 BRA13 11 7 11 7
RBA(2) T3 RA(12) 3646-2 0R N7 RA(12) 3636-3 0R N7
ARBA2 RBA0_B
12 12
B1 RA(13) 3644-2 0R T3 B7 RDQS1n RA(13) 3651-2 0R T3 B7 RDQS3n
BRBA0 13 DQSU1 13 DQSU1
RCASn M4 A6 RBA1_B M7 C7 RDQS1 M7 C7 RDQS3
ARCAS BRBA1 14 DQSU2 14 DQSU2
RRASn T2 C7 RBA2_B
ARRAS BRBA2 BC BC
RCKE M5 F3 RDQS0 F3 RDQS2
ARCKE AP DQSL AP DQSL
RWEn N5 E7 RCASn_B G3 RDQS0n G3 RDQS2n
ARWE BRCAS DQSL DQSL
RCSn T1 E8 RRASn_B
ARCS BRRAS
A7 RCKE_B F602H1 E3 RDQ(0) F601H1 E3 RDQ(16)
BRCKE VREFDQ 0 VREFDQ 0
RCLK0 AE2 D7 RWEn_B F603M8 F7 RDQ(1) F604M8 F7 RDQ(17)
ARCLK0 BRWE 3608 VREFCA 1 VREFCA 1
RCLK0n AE1 C2 RCSn_B 240R F2 RDQ(2) 3668 240R F2 RDQ(18)
ARCLK0 BRCS A_ZQ1 2 A_ZQ2 2
RCLK1 L2 L8 F8 RDQ(3) L8 F8 RDQ(19)
ARCLK1 ZQ 3 ZQ 3
RCLK1n L1 A8 RCLK0_B DQL H3 RDQ(4) DQL H3 RDQ(20)
ARCLK1 BRCLK0 4 4
B8 RCLK0n_B RBA(0) 3648 0R M2 H8 RDQ(5) RBA(0) 3658 0R M2 H8 RDQ(21)
BRCLK0 BA0 5 BA0 5
RDQ(0) V2 RBA(1) 3646-3 0R N8 G2 RDQ(6) RBA(1) 3636-2 0R N8 G2 RDQ(22)
ARDQ0 BA1 6 BA1 6
RDQ(1) AB3 E11 RDQ0_B RBA(2) 3629 0R M3 H7 RDQ(7) RBA(2) 3659 0R M3 H7 RDQ(23)
ARDQ1 BRDQ0 RDQ1_B BA2 7 BA2 7
RDQ(2) V1 D11
ARDQ2 BRDQ1
RDQ(3) AC1 F13 RDQ2_B RRASn 3649 0R J3 RRASn 3660 0R J3
ARDQ3 BRDQ2 RDQ3_B RAS RAS
RDQ(4) U1 D10 RODT 3630-2 0R K1 RODT 3652-2 0R K1
ARDQ4 BRDQ3 ODT ODT
RDQ(5) AC3 E13 RDQ4_B RCASn 3630-3 0R K3 RCASn 3652-3 0R K3
ARDQ5 BRDQ4 CAS CAS
RDQ(6) U2 E9 RDQ5_B RCLK0 3673 0R J7 RCLK1 3671 0R J7
ARDQ6 BRDQ5 RDQ6_B CK CK
RDQ(7) AC2 E12 K7 J1 K7 J1
ARDQ7 BRDQ6 CK CK
RDQ(8) AB6 D9 RDQ7_B K9 J9 K9 J9
ARDQ8 BRDQ7 CKE CKE
RDQ(9) AA5 C8 RDQ8_B L2 L1 L2 L1
ARDQ9 BRDQ8 CS NC CS NC
3656
3650
RDQ9_B L3
100R
B13 L9
100R
RDQ(10) AB5 L3 L9
ARDQ10 BRDQ9 WE WE
RDQ(11) Y4 D8 RDQ10_B T2 T7 T2 T7
ARDQ11 BRDQ10 RCLK0n RESET RESET
RDQ(12) AA3 A13 RDQ11_B 3672 0R RCLK1n 3670 0R
ARDQ12 BRDQ11
RDQ(13) W5 C10 RDQ12_B E7 E7
ARDQ13 BRDQ12 DML DML
RDQ(14) AA4 C13 RDQ13_B RCKE 3646-1 0R D3 RCKE 3636-4 0R D3
ARDQ14 BRDQ13 DMU VSS VSSQ DMU VSS VSSQ
RDQ(15) Y6 C9 RDQ14_B RCSn 3631 0R RCSn 3661 0R
ARDQ15 BRDQ14
F2 D13 RDQ15_B 3630-1 0R
J2
J8
3652-1 0R
J2
J8
T1
T9
F9
T1
T9
F9
A9
B3
E1
P1
P9
B1
B9
E2
E8
A9
B3
E1
P1
P9
B1
B9
E2
E8
D1
D8
D1
D8
G8
G1
G9
G8
G1
G9
M1
M9
M1
M9
ARDQ16 BRDQ15
RDQ(17) J2 A_RREST_MEM 3644-1 0R A_RREST_MEM 3651-1 0R
ARDQ17
RDQ(18) F3 C11 RDQM0_B RDQM(0) RDQM(2)
ARDQ18 BRDQM0
RDQ(19) J1 C12 RDQM1_B RDQM(1) RDQM(3) F600
ARDQ19 BRDQM1 F605
RDQ(20) E4
ARDQ20
RDQ(21) K1 B11 RDQS0_B
ARDQ21 BRDQS0
RDQ(22) E3 A11 RDQS0n_B
ARDQ22 BRDQS0
RDQ(23) K2
ARDQ23 +1V5_SW +1V5_SW
RDQ(24) L4 B10 RDQS1_B
ARDQ24 BRDQS1
RDQ(25) H5 A10 RDQS1n_B
ARDQ25 BRDQS1
RDQ(26) L5
ARDQ26
RDQ(27) G5 C1 RODT_B
ARDQ27 BRODT
RDQ(28) L7 E6 B_RREST_MEM
ARDQ28 BRRESET
100n
100n
RDQ(29) G4 D3 3639 60R
ARDQ29 REXTDN +1V5_SW
RDQ(30) L6
ARDQ30
RDQ(31) H6 D1 RVREF6
ARDQ31 RVREF0
2609
2613
1% 3607 1K0
1% 3613 1K0
U7 RVREF5
RVREF1
RDQM(0) Y3 C3 RVREF_B
ARDQM0 RVREF2
RDQM(1) W1
ARDQM1
RDQM(2) G3
ARDQM2
RDQM(3) F1
ARDQM3
100n
100n
RDQS0 Y2
ARDQS0
Y1 7603
3614 1K0
RDQS0n ARDQS0 H5TQ1G63BFR-H9C
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
2610
2614
1% 3678 1K0
1%
AB2 +1V5_SW +1V5_SW
RDQS1 ARDQS1 VDD VDDQ
RDQS1n AB1
ARDQS1
RA0_B 3677-3 0R N3
0
RDQS2 G2 RA1_B 3617-4 0R P7
ARDQS2 1
RDQS2n G1 RA2_B 3619-3 0R P3
ARDQS2 2
100n
100n
RA3_B 3619-1 0R N2
3
RDQS3 H2 RA4_B 3620-1 0R P8 D7 RDQ8_B
ARDQS3 4 0
RDQS3n H1 RA5_B 3619-2 0R P2 C3 RDQ9_B
ARDQS3 5 1
2657
2659
1% 3640 1K0
1% 3680 1K0
RA6_B 3617-3 0R R8 A C8 RDQ10_B
6 2
RA7_B 3619-4 0R R2 C2 RDQ11_B
7 3
F610 F611 RA8_B 3617-2 0R T8 DQU A7 RDQ12_B
8 4
RA9_B 3677-1 0R R3 A2 RDQ13_B
9 5
RA10_B 3620-3 0R L7 B8 RDQ14_B
10 6
RA11_B 3617-1 0R R7 A3 RDQ15_B
11 7
100n
100n
RA12_B 3618-4 0R N7
12
RA13_B 3677-2 0R T3 B7 RDQS1n_B
3641 1K0
13 DQSU1
M7 C7 RDQS1_B
14 DQSU2
2658
2660
1%
1% 3643 1K0
BC SENSE_1V5_DDR
F3 RDQS0_B
AP DQSL
G3 RDQS0n_B
DQSL
F606H1 E3 RDQ0_B DDR#1 Bottom Side
RES +1V5_SW VREFDQ 0
F608M8 F7 RDQ1_B
VREFCA 1 +1V5_SW +1V5_SW
3667 240R F2 RDQ2_B
A_ZQ3 2
L8 F8 RDQ3_B
ZQ 3 RDQ4_B
DQL H3
4
RBA0_B 3662 0R M2 H8 RDQ5_B
RBA1_B BA0 5 RDQ6_B
3620-2 0R N8 G2
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
BA1 6
1u0
4u7
RES
RES
RBA2_B RDQ7_B
3603
2603
100n
3677-4 0R M3 H7
BA2 7
1K0 1%
10u
2617
2670
2646
47u 16V
RRASn_B
100u 16V
3618-3 0R J3
RAS
2619
2621
2623
2625
2627
2629
2631
2633
2636
2638
2639
2640
2641
2642
2643
2644
2645
2637
RODT_B 3663 0R K1
F612 ODT
RCASn_B 3618-2 0R K3
RVREF_B RVREF6 CAS
RCLK0_B 3675 0R J7
CK +1V5_SW
K7 J1
CK +1V5_SW
K9 J9
CKE Main Chip Bottom Side
L2 L1
CS NC
RES
RES
3604
2604
100n
3666
100R
L3 L9
WE
1K0 1%
T2 T7
RCLK0n_B RESET
3674 0R
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
1u0
4u7
E7
DML
2618
2671
3664 0R VSS
100u 16V
2607
RCSn_B
2620
2622
2624
2626
2628
2630
2632
2661
2663
2664
2665
2666
2667
2668
2669
2662
3618-1 0R
J2
J8
RWEn_B
T1
T9
F9
A9
B3
E1
P1
P9
B1
B9
E2
E8
D1
D8
G8
G1
G9
M1
M9
B_RREST_MEM 3665 0R
RDQM0_B
RDQM1_B
F609
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_006_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 44
4K7
4K7
10K
10K
4K7
4K7
4K7
4K7
10K
10K
10K
10K
7700
12
37
7300-7 H27U1G8F2B
2706
100n
2707
100n
3794
3795
3796
MT5395
VCC
GPIO_USB NAND_PDD(0) 29 1
3722
3719
3718
3717
3728
3727
3726
RES 3725
3707
0
DC_PROTECT 3700 100R I700 AK6 AL7 USB_DP NAND_PDD(1) 30 2
GPIO0 USB_2P_DP0 1
USB_PWR_EN 3701 100R I701 AJ6 AM7 USB_DM 7300-12 NAND_PDD(2) 31 3
GPIO1 USB_2P_DM0 2
USB_OCP 3702 100R I702 AK7 AL6 MT5395 NAND_PDD(3) 32 4
GPIO2 USB_2P_DP1 3 IO
VCOM_SW 3703 100R I703 AH7 AM6 NAND_PDD(4) 41 5
GPIO3 USB_2P_DM1 SERIAL_NAND_ 4
AH10 AH8 I745 3737 5K1 NAND_PDD(5) 42 10
GPIO4 USB_2P_VRT SDIO_SPI 5
POWER_OK 3705 100R I705 AK8 NAND_PDD(6) 43 11
GPIO5 6
BL_ON_OFF 3706 100R I706 AJ8 AG17 37AP 10K N31 AL2 NAND_PDD(0) NAND_PDD(7) 44 14
GPIO6 ADIN0_SRV SD_CMD PDD0 7
AD27 AG16 37AQ 10K N30 AM2 NAND_PDD(1) 15
GPIO7 ADIN1_SRV SD_CLK PDD1
AD28 AF17 I735 3738 100R KEYBOARD N32 AL3 NAND_PDD(2) NAND_PCLE 16 20
GPIO8 ADIN2_SRV SD_D0 PDD2 CLE
3709 100R I709 N27 AF18 I736 3739 100R LIGHT_SENSOR M30 AM3 NAND_PDD(3) NAND_PALE 17 21
GPIO9 ADIN3_SRV SD_D1 PDD3 ALE
F734
3710 100R I710 N28 AH17 I737 3740 100R SW_MUTE L30 AK4 NAND_PDD(4) NAND_POCE I724 9 22
GPIO10 ADIN4_SRV SD_D2 PDD4 CE_
F735
N29 AF19 L31 AJ5 NAND_PDD(5) NAND_POOE 8 23
3711 GPIO11 ADIN5_SRV SD_D3 PDD5 RE
INT RES 100R I711 L29 AK5 NAND_PDD(6) NAND_POWE 18 24
GPIO12 PDD6 WE
SEL-HDMI-ARC 3712 100R I712 K30 E32 AL5 NAND_PDD(7) I725 19 NC 25
GPIO13 LDM_CS PDD7 WP
L28 D31 AL1 NAND_POCE 6 26
GPIO14 LDM_DO POCE0 I727 SE
E29 F30 AM5 NAND_PARB I726 7 27
GPIO15 LDM_DI POCE1 R
D32 E31 AM1 NAND_PARB 28
GPIO16 LDM_CLK PARB B
LCD_PWR_ON 3714 100R I714 E30 F32 AK1 NAND_PALE 33
GPIO17 LDM_VSYNC PAALE
SYS_EEPROM_WE 3715 100R I715 D30 AK2 NAND_PCLE 34
GPIO18 PACLE
C30 AJ4 NAND_POWE 35
GPIO19 POWE
4K7
4K7
I728
D29 +3V3STBY AK3 NAND_POOE 38
GPIO20 POOE
RF_AGC_SW C29 39
GPIO21
C32 40
GPIO22
4K7
RES
3799
C31 45
GPIO23
46
3797
3798
4K7
4K7
47
10u
4u7
4u7
1K0
100n
100n
2708
2709
6702
3763
7701 48
BAS316
BD45292G
PANEL
VDD
RES 37AM VSS
RES
RES SDM
2700
2701
2722
Von_Detect
3708
37AL
I721 1 Φ F714 +3V3_SW
4 ORESET
13
36
100R ER VOUT
+3V3_SW
6703
3764
100K
SUB GND
BAS316
2
3
2710
100n
4K7
4K7
+3V3_SW
F736
SYS_EEPROM_WE
37AN
37AO
5700 VCOM-SCL +3V3_SW
+3V3_SW 30R +3V3_SW
+3V3_SW
VCOM-SDA
F700 2702 100n
4K7
4K7
10K
10K
3744 3742 +3V3_SW
10K
7300-10
8 10K
7 10K
6 10K
5 10K
10K
1K0
3792
RES
+3V3_SW MT5395
4K7
F702 3743 MISC I722 3793
7705 3 BACKLIGHT-BOOST-A
3748
3747
3746
3745
8
RES
1
2
3
4
4K7
1K0
3772
3771-1
3771-2
3771-3
3771-4
(8Kx8)
3773
2711
3788
4
5 F718 JTMS JTMS AH3 AG13 RC
JTMS OIRI
RES
RES
3787
3786
6 F719 JTCK
10p
10p
2703
2704
7 F720 UART_RX 3769 100R I741 AJ13 AM26
3774 F715 U0RX XTALI
8 F721 JTDO UART_TX 3770 100R I742 AH14 AL26
U0TX XTALO
9 AC31 AJ26
33R U1RX LOUTP
27p
10 AC30 AJ25
4K7
4K7
U1TX LOUTN
11
2
1
820K
13 F722
1703
3225
12
+3V3_SW
2720
PWM DIMMING
NC
27M
502382-1170
10K
10K
10K
3777
3776
3775
3
27p
3779
3783
3781
680R
7703
1R0
BC847BW
RES
2721
1K0
3780
RES
I720
BAS316
F706 3782
PWM-DIMMING
+3V3_SW
RES 6704
100R
+3V3_SW
100K
37AC
F732 37AD
LIGHT_SENSOR
100R
1n0
2712
FOR DEBUGGING
4K7
4K7
ONLY
RES
1704
RES 3752
RES 3751
I730 37AE
1 RC
SDA 3753 100R 2
F708 100R
SCL 3754 100R F707 3
4
+3V3STBY
1n0
2713
6 5 1M20
I733 F725
1
BM04B-PASS-TFT F738
2
I731 37AF F726 3
LED2 F727
4
4K7
4K7
3758
3757
+3V3STBY F728
100R 5
1701 6
UART_TX 3755 33R F709 2
7
1n0
3
2714
+5V_SW F730
8
UART_RX F710 1
F729
3756 33R
MSJ-035-29D PPO 2041145-8
I732 37AG
2718
100p
2717
100n
LED1
F731
+3V3STBY 100R
6701
6700
1710
1711
F711
BZX384-C6V8
BZX384-C6V8
1n0
2715
100K
37AA
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_007_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 45
LVDS Display
LVDS Display
B04D +3V3_SW
B04D
RES +VDISP
4D12
RES
4D10
4D11
VCOM-SDA
2D13 ID10 VCOM-SCL LVDS#2
LVDS#1
100n 1G50
7D04 1G51
PCA9540B 3 RES 50 51
FD62
4D00-1
4D00-2
4D00-3
4D00-4
ID11 4D13
VDD SC0 5 60 61 48 49
58 59 46 47
ID12 4D14 FD27
SC1 8 56 57 44 45
RES 54 55 42 43
ID08 ID13 4D15
VGA_SCL 4D17 1 SCL SD0 4 52 53 2D00 10p FD28 41
I2 C 51 2D01 10p FD29 40
INP
ID09 -BUS ID14 FD64
VGA_SDA 4D18 2 SDA FIL SD1 7 4D16 VCOM-SDA 50 2D02 10p FD30 39
CTRL
RES VCOM-SCL 49 2D03 10p FD31 38
4D20 VSS 48 2D04 10p FD32 37
7300-9 FD65
RES
6 47 36
4D22
MT5395 2D05 10p FD33
RES 46 2D06 10p FD34 35
LVDS_EPI 4D19 4D21 45 2D07 10p FD35 34
A22 D15 PX1A+ 44 33
TXP0_VB1 AE0P 43 32
B22 C15 PX1A- PX3A- FD36
TXN0_VB1 AE0N
A23 E16 PX1B+ VCOM_SW FD63 42 PX3A+ FD37 31
TXP1_VB1 AE1P 41 30
B23 E15 PX1B- PX3B- FD38
TXN1_VB1 AE1N 40 29
A24 D17 PX1C+ PX1A- FD01 PX3B+ FD39
TXP2_VB1 AE2P 39 28
B24 C17 PX1C- PX1A+ FD02 PX3C- FD40
TXN2_VB1 AE2N 38 27
A25 D19 PX1D+ FD03 PX3C+ FD41
TXP3_VB1 AE3P 37 26
B25 C19 PX1D- PX1B- FD04
TXN3_VB1 AE3N 36 25
A21 E20 PX1E+ PX1B+ FD05 PX3CLK- FD42
TXPA_EPI AE4P 35 24
B21 E19 PX1E- FD06 PX3CLK+ FD43
TXNA_EPI AE4N 34 23
A26 E18 PX1CLK+ PX1C-
TXPB_EPI AECKP 33 22
B26 E17 PX1CLK- PX1C+ FD07 PX3D- FD44
3D00 TXNB_EPI AECKN 32 21
F21 FD08 PX3D+ FD45
REXT_VB1 31 20
A15 PX2A+ PX1CLK- PX3E- FD46
12K AO0P
D21 B15 PX2A- PX1CLK+ FD09 30 PX3E+ FD47 19
LOCKN AO0N 29 18
C21 A16 PX2B+ FD10
HTPDN AO1P 28 17
B16 PX2B- PX1D- FD11
AO1N 27 16
PX4A+ D23 A17 PX2C+ PX1D+ FD12 PX4A- FD48
BO0P AO2P 26 15
PX4A- C23 B17 PX2C- RES PX4A+ FD49
BO0N AO2N 25 14
PX4B+ E24 A19 PX2D+ PX1E- 2D14 10n FD13 PX4B- FD50
BO1P AO3P 24 13
PX4B- E23 B19 PX2D- PX1E+ FD14 PX4B+ FD51
BO1N AO3N 23 12
PX4C+ D25 A20 PX2E+ FD15 PX4C- FD52
BO2P AO4P 22 11
PX4C- C25 B20 PX2E- FD16 PX4C+ FD53
BO2N AO4N 21 10
PX4D+ D27 A18 PX2CLK+ PX2A- FD17
BO3P AOCKP 20 9
PX4D- C27 B18 PX2CLK- PX2A+ FD18 PX4CLK- FD54
BO3N AOCKN
PX4E+ E28 FD19 19 PX4CLK+ FD55 8
BO4P 18 7
PX4E- E27 A27 PX3A+ PX2B-
BO4N BE0P
PX4CLK+ E25 B27 PX3A- PX2B+ FD20 17 PX4D- FD56 6
BOCKP BE0N 16 5
PX4CLK- E26 A28 PX3B+ FD21 PX4D+ FD57
BOCKN BE1P 15 4
B28 PX3B- PX2C- PX4E- FD58
BE1N 14 3
A29 PX3C+ PX2C+ FD22 PX4E+ FD59
BE2P 13 2
B29 PX3C- FD23
BE2N 12 1
A31 PX3D+ PX2CLK- FD24
BE3P 11
B31 PX3D- PX2CLK+ FD25
BE3N 10
A32 PX3E+ FI-RE41S-HF
BE4P 9
B32 PX3E- PX2D-
BE4N 8
A30 PX3CLK+ PX2D+
BECKP 7
B30 PX3CLK-
BECKN 6
TO DISPLAY
PX2E- F829
PX2E+ 5
+VDISP
4
3
2
1
+5V_SW +12VDISP
100n
2D15
2D16
4D10 Y ---
4D14 Y ---
4D16 Y ---
4D17 Y ---
4D18 Y ---
4D19 Y ---
4D04
4D05
4D06
4D11 --- Y
RES 4D01
RES 4D02
RES 4D03
4D12 --- Y
4D07 RES 4D13 --- Y
4D08 RES 4D15 --- Y
4D09 RES 4D20 --- Y
8 5D00
4D21 --- Y
3 7 30R 4D22 --- Y
ID01 5D01
2 6
ID00 +VDISP
1 5 30R
5D02
30R
1K0
3D10
7D00
SI4835DDY RES
4
3D01
47K
6D00
SML-310
(TOP side)
6D01
BZX384-C6V8
RES
3D02 ID02 2D11
47K
3D03
+3V3STBY
ID05 ID06
3D06
15K
6
3D07
7D02
BC857BW ID07
10K
7D03-1 2 3
3D05 BC847BS ID17 FD61
1K0
1 7D03-2 5 LCD_PWR_ON
10K
BC847BS
3D09
4
1K0
220n
2D12
3D08
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_008_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 46
10u
RES
10K
100n
2B02
2B01
2B04
3B07
1903
2B03
1 BRX2+
RES 1u0
2
220u 16V
FB20
3 BRX2-
4 BRX1+ BIN-5V
5
RES
6 BRX1- FB21 5B01
7 BRX0+ +3V3STBY
8
30R
9 BRX0-
10u
RES
RES
100n
2B05
2B06
10 BRXC+
47K
47K
3B00
3B01
11
12 BRXC-
13 HDMI_CEC
14 7B01 +5V_DC
9
27
64
37
38
15 FB05 BRX-DDC-SCL BRX-DDC-SCL SII9187B
16 FB06 BRX-DDC-SDA BRX-DDC-SDA VCC33 6B05
17
+5V_SW
18 FB27 31
BIN-5V (CBUS) HPD0 BAS316
SBVCC33
19 FB08 BRX-HOTPLUG 32
R0PWR5V
21 20
23 22 29
MICOM_VCC33
DSDA0
10K
10K
3B20
3B21
30 49
DSCL0 R4PWR5V
5.6V
FB09
65 48 VGA_SCL
N DSCL4
RES 6B01
66 R0XC 47 VGA_SDA
P DSDA4
CDS2C05HDMI2
67 51
N CEC_D
HDMI 1 68 R0X0
P
1902 69
N
1 CRX2+ 70 R0X1 7300-8
P
2 MT5395
3 CRX2- 71
N HDMI_ETHERNET
4 CRX1+ 72 R0X2
P
5 BRX-HOTPLUG 57 AM12 AL10 AL10 AF31
CIN-5V N RX_0 TANA_0
6 CRX1- 3B13 100K 35 TX2 56 AL12 AM10 AM10 AF32
3B14 IB02 (CBUS) HPD1 P RX_0B TANA_1
7 CRX0+ 36 AL11 AL11 AE32
BIN-5V R1PWR5V RX_1 TXVP_0
8 2B07 1u0 59 AM11 AM11 AM11 AE31
10R N RX_1B TXVN_0
9 CRX0- BRX-DDC-SDA 33 TX1 58 AL11 AL12 AL12 AD32
DSDA1 P RX_2 TXVP_1
10 CRXC+ BRX-DDC-SCL 34 AM12 AM12 AD31
DSCL1 RX_2B TXVN_1
11 61 AM10 AL9 AL9 AA32
N RX_C REXT
47K
47K
3B02
3B03
12 CRXC- BRXC- 1 TX0 60 AL10 AM9 AM9 AB28
N P RX_CB PHYLED0
13 FB10 HDMI_CEC BRXC+ 2 R1XC AA28
P PHYLED1
14 FB00 ARC-eHDMI+ 63 AM9
N
15 FB25 CRX-DDC-SCL CRX-DDC-SCL BRX0- 3 TXC 62 AL9
N P
16 FB13 CRX-DDC-SDA CRX-DDC-SDA BRX0+ 4 R1X0 3B08 4K7
P
17
18 FB14 CIN-5V BRX1- 5 55 3B09 4K7 RES MICOM-VCC33
N TPWR_CI2CA
19 FB15 CRX-HOTPLUG BRX1+ 6 R1X1 IB03
P
21 20
FB16
23 22 BRX2- 7 50
N CEC_A
BRX2+ 8 R1X2
P
5.6V
CRX-HOTPLUG FB23
3B15 100K 41 52 INT
3B16 IB04 (CBUS) HPD2 INT
RES 6B02
42
CIN-5V R2PWR5V
CDS2C05HDMI2
2B08 1u0
10R
CRX-DDC-SDA 39
DSDA2
CRX-DDC-SCL 40
HDMI SIDE DSCL2
CRXC- 11
N IB07
1901 CRXC+ 12 R2XC 54 3B10 100R SCL
P CSCL
1 DRX2+ 53 IB08 3B19 100R SDA
CSDA
2 CRX0- 13
N
3 DRX2- CRX0+ 14 R2X0
P
4 DRX1+ 10
5 CRX1- 15 RSVDL 28
N
6 DRX1- CRX1+ 16 R2X1
DIN-5V P
7 DRX0+
8 CRX2- 17
N
9 DRX0- CRX2+ 18 R2X2
P
10 DRXC+ DRX-HOTPLUG
11 3B17 100K 45
3B18 IB05 (CBUS) HPD3
12 DRXC- 46 74
DIN-5V R3PWR5V
47K
47K
3B04
3B05
13 HDMI_CEC 75
10R
14 DRX-DDC-SDA 1u0 2B09 43 76
DSDA3
15 FB26 DRX-DDC-SCL DRX-DDC-SCL DRX-DDC-SCL 44 77
DSCL3
16 FB01 DRX-DDC-SDA DRX-DDC-SDA 78
5B02
17 eHDMI+ DRXC- 19 79
FB02 N
18 DRXC+ 20 R3XC 80
DIN-5V 30R P
19 FB03 DRX-HOTPLUG 81
FB04 21 20 ARC-eHDMI+ DRX0- 21 VIA 82
N
23 22 DRX0+ 22 R3X0 83
P
84
5.6V
DRX1- 23 85
N
10p
RES 6B03
87
25 88
CDS2C05HDMI2
DRX2- N
+3V3STBY 26 R3X2 89
DRX2+ P
EPAD
73
7B00
BSH111
RES FB24
+3V3STBY
RB521S-30 3B06
CEC
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_009_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 47
USB
USB
B05B B05B
7C00
TPS2041BD
FC04
6 4 USB_PWR_EN
1 EN_
USB 7 2 OUT 2
1 +5V_SW
1D01
5C00 FC07 IN
1 5V FC01 8 3
FC02 3 2
2 USB_DM 30R
3 USB_DP FC03 5
OC_ 2C14
4 FC00 2C12
100n 100u
GND
6 5 16V
USB-01-PBT-B-30-CU2
10u
1C10
1C11
1C13
6C00
2C11
FC06
FC05 USB_OCP
6C02 BZX384-C6V8
6C01
USB_DM
NUP1301ML3
NUP1301ML3
USB_DP
4p7
15K
4p7
15K
RES
RES
3C10
RES
RES
2C15
2C16
3C09
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_010_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 48
4
7801-2
5 PUMD12
3 HEADPHONE
F809
I809 A_PLOP
A_STBY
HP_LOUT LEFT 1A01
2
6 RIGHT 3
1
1n0
MSJ-035-12D-B-AG-PBT-BRF
RES
RES
RESET_AUDIO
2801
1202
2 7801-1
RES
6800
PUMD12
1
PESD5V0S1BA
F804
HP_ROUT
1n0
RES
2802
1204
RES
6801
RES
PESD5V0S1BA
+3V3_SW
1n0
47p
1u0
22K
RES
3805
2812
2803
2805
PBS_HPR 4800 RES
RES RES
7800 3807
PBS_HPL 4801 RES
TPA6111A2DGN
8
33R
VDD
Φ RES RES
F807 2808 3811 I804 2806 I800 3808 F805
HPOUTL I807 2 AMPLIFIER 1 HP_LOUT
1 1
RES
HPOUTR F808 10u 2809 10K 3813 I805 IN- I803 100u 4V 33R
6
2 VO RES RES
RES I802 I801
A_PLOP 10u 3812 10K I806 2807 3809 F806 HP_ROUT
5 7
SHUTDOWN 2
10K RES 2810 I808 100u 4V 33R
3 10
BYPASS RES
VIA 11
1u0 3810
GND GND_HS
4
9
33R
1n0
47p
22K
3806
2813
2804
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_012_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 49
1n0
1n0
RES
RES
2909
2910
1906
0001
6905
RES
1n0
1n0
PESD5V0S1BA
RES
RES
2901
2902
1920
6900
PESD5V0S1BA
RES
1B01
2
6910
RES
1n0
1n0
RES
3
RES
2917
2918
1911
PESD5V0S1BA
1
I906 3955 I940 2942 I941 3909
CVI2_L
F914
I901 3953 I936 2903 I937 3901 F901 30K 10u 1R0 MSJ-035-29D PPO
CVI1_L
1n0
1n0
RES
I909
RES
RES
2911
2912
6906
1907
DVI_R
CVI2 F913
30K 10u 1R0
1n0
1n0
PESD5V0S1BA
RES
RES
2904
2905
1921
1C02
F906
6911
RES
CVI1 MSP-636V1-01
RES 6901
1n0
1n0
RES
RES
PESD5V0S1BA
2920
2921
1912
1
F907
PESD5V0S1BA
2
1C01 I907 3
F900 3910 5903
1 MSP-636H1-01 SPR1P
2 4
18R 60R F908
3
F902 5
I902 3925 5900
47p
56R
2913
3911
1908
SPR0P 4 SPDIF
60R 6 CON_JACK
18R F916
SPDIF_OUT 2
RES
6907
5 PR1P_SC2 3919 240R 1B02
7
F909 F915
47p
PESD5V0S1BA
56R
1
2906
3902
1922
6 3920 100R
8 MTJ-032-21B-43 NI FE LF
F903 F910 2922 33p
1913
SC1_CVBS_OUT 7
RES 6902
PB1P_SC2
PESD5V0S1BA
33p
2923
9
8
10
F904 F911
47p
56R
RES
2914
3912
6908
1909
SC1_B 9 SY1P_SC2 11
5904
12
3913
PESD5V0S1BA
10 SPB1P
11
F905 18R 60R
47p
56R
RES
2907
3903
6903
1904
SC1_G 12
SOY1
3904 5901
PESD5V0S1BA
SPB0P
SY1P 3914 5905
I903 18R 60R
SOY0 60R
18R
I904 3905 5902
1910
SY0P
47p
56R
2915
3915
6909
RES
60R
18R
3916
PESD5V0S1BA
1905
SY1N
47p
56R
RES
2908
3906
6904
1R0
3907
PESD5V0S1BA
SY0N
1R0
CVBS SIDE
CVBS
F917
1C03-1
I910 3922 2
CVBS_AV3
1R0
SAV_L 1
F921 YELLOW
47p
15p
75R
RES
SAV_R
2924
2925
3921
6913
1914
RES
VIDEO_IO
HSYNC I942 AL13 AL18
HSYNC SOY0
VSYNC I943 AM13 AL16 LEFT
VSYNC SOY1
BP 3950 100R 2958 10n AK13 AM21 I911 2926 I945 1C03-2
BP SY0 3958 3923 F918
SOG 3937 1R0 I920 2945 1n5 AK14 AM22 5
SOG SY1 6
GP 3938 100R I921 2946 10n AK15 AK21 10u
GP SC0 30K 1R0
RP 3939 100R I922 2947 10n AM15 AL22 4
RP SC1 CVBS_GND_1
GN 3940 100R I923 2948 10n AL15 AK23 WHITE
COM CVBS_COM I933 F922
1n0
1n0
MTJ-032-37BAA-432 NI
RES
RES
RES
2927
2928
6914
SPB0P 3941 100R I924 2949 10n AM19 AK24 2957 47n I932 3949 100R CVBS_AV3
PB0P CVBS0P
1915
AK19 AK22
PR0P CVBS2P
SPR0P 3951 100R I925 2951 10n AJ18 AJ22
PR1P BYPASS0
SPR1P 3943 100R I929 2952 10n AM18 AJ21
Y0P BYPASS1 I944
AM16 AJ20
Y1P VDAC_OUT1
SY0P 3944 100R I926 2954 10n AL19 AK20
COM0 VDAC_OUT2
SY1P 3945 100R I930 2953 10n AJ17 AL21
COM1 FS_VDAC
RIGHT
75R
3960
SY0N 3946 100R I927 2955 10n 1C03-3
I912 3959 2929 I946 3924 F919
8
3961
560R
SY1N 3947 100R I931 2956 10n
RES 9
30K 10u 1R0
7
RED
1n0
1n0
RES
RES
2961
2930
6915
1916
MTJ-032-37BAA-432 NI
RES
F920
PESD5V0S1BA
1 2011-02-16
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19140_014_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 50
VGA
VGA
B06C B06C
5A00
RP FA01
60R
47p
75R
RES
2A07
3A16
6A00
1A00
PESD5V0S1BA
5A01
GP FA02
60R
SOG
47p
75R
0001
2A08
3A15
6A01
1A05
RES
3A10
PESD5V0S1BA
GN
1R0
5A02
BP
60R
47p
75R
RES
0001
2A09
3A14
6A02
1A02
PESD5V0S1BA
1E01
1216-02D-15L-2EC
5A06 1
6A06 3A19
+5V_DC 2
FA03 3
60R BAS316 120R
4
5
2u2
1n0
6A05
RES
2A14
2A15
6
7
PESD5V0S1BA
8
FA04 9
5A04 10
HSYNC H_SYNC 11
FA13 12
30R
FA05 13
FA06 14
5p6
2K2
2A12
3A17
6A03
1A03
RES
FA14 15
16 17
PESD5V0S1BA
FA07
5A05
VSYNC Y_SYNC
30R
5p6
2K2
2A13
3A18
6A04
1A04
RES
PESD5V0S1BA
VGA_SDA
VGA_SCL
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_014_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 51
Hospitality
B07 B07
DMMC1 DMMC3
RES RES
1E00 1E02
FE05
1 FE00 RES 5E00 33R +3V3STBY 1 PBS_HPL
2 SDA_CLOCK FE01 RES 3E00 100R SDA-LCD 2 FE06 FE07
3 SCL_CLOCK FE02 RES 3E01 100R SCL-LCD 3 PBS_HPR
4 4 5
5 FE03 RES 5E01 33R
+5V_SW
6 7 FE04 502382-0370
1n0
1n0
RES
2E00
2E01
RES
502382-0570
1 2011-02-16
PCB SB SSB
3139 123 6517
DGR BRZ DIG
19140_018_110502.eps
110502
2011-May-06
Overview top side
1M95 1M99
1X02
1X05
10-8 313912365171 SSB Layout
6905
1906
2910 3908
3954 2909
2941
1920
2197
6401
2900
2942
6402 7405
2189
2409
3955 2911 7407
1907
3427
2422
7403
2411
2425 2424
3421 3420
3448
7406
2903
2412
7412 7413
2405
2904 3953
2400
2403 2401
6907 2123
5903
2415 2416
1908
5403 7118
3911
3910
3645
3653
2913
7D04
2669
1922
2618
3646
3636
6902
1C02
1C01
Circuit Diagrams and PWB Layouts
4D13
4D21
4D16
4D22
4D14
5900
3630
2168
2169
2170
2171
3773
3925
2906
3775
3902
3644
5104
1904
3771
6903 2671
3647
5901
3648
1909
2617
3650
3656
3629
3904
3903
2907 3631
2167
3649
3774
7601
7602
3772
1702
3776
3777 2670
3717 3700
1910
1905
3707 3703
3673
3671
3670
3719 3702
2706
3722 3705 3554
2707
L11M1.2L LA
5701
6904
3558
5902 3566
3906
3905
3565
3675
3552
3568 7503
3662
3663
3551 3619
3561
7603
1G51
10.
1903
3738 3739
2D16
EN 52
3949 2957
3274
2962
3273
2011-May-06
2237
2287
2289
2239
2238
3278
2285
2290
3279
3744
3743
2288
2702
3742
7702
5700
3346
37AM
3344
3345
3343
3784
3785
4300
3272
3275
3280
3281
3709
3710
3711
3712
3714
3715
3783 3746
3747
7B01
2B03
37AL
3745
2704 3750
3789
3788
3341
2235
2236
3728
3727
3725
3726
3326
3330 2333
1X03
7704 2327
1704
3335
2321
4D00
2323 2711
3755 3756
1902
2319
3333
3337 5300
6700 6701 3336 2320
1711
2322 3334 21AB
21AC
6104
1710
21AD
21AA
1701
6105
2302
21AF
21AE
2303
2546
2544
2301
2587
2306
1G50
5103 2112
2111
2156
2110
1201
7117 2147 5107
6101
2182
2183
2115
2114
7113
2258
7121
4203
1E02
2181
5246
5207
2116 5106 7110
2179
2296
3809
3810
3807
3808
2294
2174
2917 2117
1E01
3917
2959
1911
2918 3956
5100
2178
2177
2176
2921 3957
7216
5102 6100
7120
2101
2196
1912
3959
6910 6911
CA00 2A08 3922 2926 3958 2929 2105
2960
2920
2807
2806
1B01
3A10
6A01
2924 2927 2961
2925 3923 3924 2104
3A14
5101 2102
5A02
2C14
2118
6913
6914
6915
3921 2928 2930
2A09
6A02
7116
2126
1914
1915
1916
1X01
1X04
1D01
1A01
1901
1C03
19140_016_110502.eps
110502
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 53
3D02
4D11
3D03
4D01
4D02
4D03
3D01 2D11
ID14 ID12 ID08 ID02
2D13
ID03
ID10
I146 I105
3100 4D19 4D15
I144 I154 FD13
ID09
2D14
2D07
2D05
FD63 ID13 FD61
2100 FD62
2D03
2D01
FD65
FD64
3102 ID11
6D01
FD55 FD54 7D02
FD47 FD46 ID06
FD41 FD40
6D00
I145
2103
3101 FD35 FD33
FD31 FD29
3D09
I106 I117 FD15 FD14
3D05 ID05 3D06
3D10
2107 ID17
3107
FD49 FD48
2108 2D12
3103
I118 FD25 FD24 FD19 FD18 I132
FD34 FD32 FD30 FD28
2165
2164
2122
I136 3121 3D08
FD12 FD11
FD39 FD38
2106
7D03
U2
FD53 FD52 FD45 FD44
I151 5D02 4D09 4D06
3104
3106
3105
FD23 FD22
3122
I127
F829
2D06
2D04
2D02
2D00
I152
FD17 FD16
F140
3120
ID07
FD08
FD07
U12
5D01 4D08 4D05
3D07
FD50
3163
3119
5D00 ID01 4D07 ID00 4D04
I125 F129 FD21 FD20 FD10 FD09
FD04 FD03
F607
FD51
3116
I126
5110
FD06 FD05 FD02 FD01
2163
2160
2161
2157
5111
2154
2155
2162
I135
FD56
F101 I104 2188
3115
3118
2187 F100
FD57 FD58 2166 I156
2172
I131
I134
FD59
I157
I143
I139
F707 F708
F128
3133
2184
7122
3751
3754
3753
3752
F704 F705 F608
I142
I433
3125
3607
2609
F408
F141
2139
F504
F609
2621
I141 3678 I437
3124
F606
3132
2610
2138
F130 F414 3410
I424
2423
3417
2625
F103
2431
3434
3413
3123
3435
2614 3667
2663 I429 I402 I425
3614 I442 3449
I140 I436 I435
3306
3305
2304
3301
3304
3303
3302
F700 2633 2135 F102
3412
3613 F413 I423
F701 2668 3432 3433
2664
F416
2627
3450
3430
2430
3431
F104
2613 F415
2134
2175
FC00
I717 F409
CXXX
3416 3414
I430 3426
I138 I440
2173
7705
2667
3419 3418 3126
4401
3146
I733
2631
F736 2127 F105
F702
I153 I431 I441 I432
6102
2623 2133 3127
2146 4101
3162 3137
2619 F106
3130
3131
U14 2128
F703
7301
I137
F126
1C13
37AN
37AO
2131 F107
3634
2654
3635
2132 3128
3307
2300
3300
3308
3310
I303 F600
2653 F108
F601
6103
2622 2620 2129
3311
I149 3111
3309
2307
F109
2308
7302 2185
2624
2626
I150
2628
3114
1C10 1C11
2121
2120
2109
3113
I302 2328 2324 2661 F138
FC02 FC03 3112 I122 I120 2630
F304
2332
4501
3166
3165
3164
F611
2604
3604
3643
3603 2603
3680 2659
2656 2180
2662
F303 F604 F113
F417
2136
3573 2660 3626
6403
U4
2329 3329
2325 3322
2513
2511
6C02 6C01 FC01
2337 3327
2336 3323
I508 I715
3108
2543 2517 3639 I443 I445 F114
F612
2C11 I123 I738
3C10 3C09 FC06 I313 I311 3765 I411 I412
2137 3129
2607
2632
2629
3668
3625
2655
3438 3437
2C16
2C15
2512 2192
2191
I714
2516
6C00
I739
5C00 2299 3D00 3766
F920
I147
4206 I712 F505
2432 5400 5401
2528
2523
2537
3572
2514
3110 I255
2526 3767
3109
2518
2545 I507 I711 2554 2579 2510
2555 F507
F735 2572
I740
U5
I155
2C12
7414
2556
2576
2571
F115
2229
F734 I709 2578 2577 2570 3439
I506
2547
5507
2548
2558
3659
3658
2574
2503
2569 F120
5243
F402 F401
3660
3661
4500
7C00
5242
2199
5508
2549
F506
2228
I256
2573 2575 2568 2501
2550 3641 F119
F139 2198
F127
FC04 FC05
2586
2567 2658 F610
F508
2437
2435
2433
5502
I406
F249 F118
2580
2581 2583 2566 3640 2145
2665 2641 2640 F602 I401
2565 2657
4208 I403
3338
2542
F248
2500 F121
3271
3339 I405
2559
2408
2584 2643
I314
2642
2585
2564
2563
2562
2561
2582
2560
2533
2650
3628
3627
2649
I734 3342 2504 F411
F724
2140
2143
2529
2536
2522
3787 I744 2521 2551 2502 2639
I254
2506 2636
2141 2144
37AQ
5222 2E00 2E01 3786 I743 2335 2530 2505
2525
2531
F123
2535
37AP
F235
2509 F500 2142
2527
I722 I305 2334 2666 F605
F723
3778
3737 2532
FE05
FE07
F919 2534
2638
FE06 I307
F305
F306
2507
2524
I944
4202
4201
I718
2283
2520 2651
2284
F300 I306
3798
3797
4801
4800
2280 3332 3960
2646
I946 3779 I308 3961 I745
4702
1402
3283
2644
2637
I719 3780 F404
2541
3608
3632
3633
2652
I911 I942
F918 5503 I503
2538
2539
3781
3451
3452
2419 2420
2278 5504
I309
3282
I943
I414
I413
I512 I516
2279 2281
3782
I945
3567
I514 I701
I263
I264
U1
I737 I416 F405
I415
7703
A225
F706
I700
1403
7303
3285
6704 I703 F718 F406
2421
3570
2242 I932 I509 F502
A214 I741
2297
I316
I260 I257
I705
7801
I312
I807
F809
5228 I742 F717
3571
I929 I931 I922
2417
2418
2413
2414
I933 I918
3811
3805
2812
I804
5236
I706
2291 2286 3212 3213
6500 3706
5235
I808 2803 I803 2219
2217 F732 37AD
I418 I417
3770
3769
I800
A213 5245 2245 I510
3708
F716
2808
3263 I927 I919 I930 F721
2246 I727 F720 F725
3406
3405
2722
3535
2810
2243
37AC
F807 2216
7501
I501
2712
3262
5244
F922
A212 2244
2221
3534 F738
I725 I444
2223
2224
2230
2231
2234
2233
2232
I500
F246 I207
I801
2220
1203
I218
I223
I502 F726
3796 F419
2805
2439
7502
I219 I205
3812
5237 I224
7800
F808 3799
I206
37AF
F921 I723
2247
2218
2515
3542
3543
2809
I730
I805 F209
6501
2212 2200 F418 2718
5240 5238
2708 F728
3764
I724
3813
3806
2813
2207 F217 3210
F503
I731
5241
37AG
7701
F215
7700 3795
3277
F216 3211
2709
3276
6703
F710 I732 2719
F731
F806 I231 I726 37AH
5234 6702
2222
3205
F208
2802 2801
I213
1202
I203 F709
1204 F714
2710
I227
3215 3763 F730
37AA
2215
2717
6801 6800
3208 F733
F913
I214
F912
I229
F218
F804
3216 I215
3209
F219
3217 I230
7210 I226
3214
I202
2210
2211 2249 2248 2214
I228
5233 I210
3B16 3B18
I211
F207
3B19
3B10
I209 I208
3B15 3B17
2B06
5B01
IB08 IB07
2206 2202 I212 2201
5B00
2B08 2B09
2208
2209 2204
3200
3202
2B02
F206 IB04 IB05
3204
3203
I200
2B05
FB21 FB23
FB18
3206 3201
5232
2226 2225
3230 3228
I220
7211
3B07
F204 I201
5231
FB19 FB20
2B01
3265
IB03
3207
6201
IB02
7217
F242
3B09
2B04
I221
3264
FB02 F203 4205 3B08
3269
2B07
4207
I222 3B13
F914
F915
3B04
3B05
6B03
I904
3B14
FA14
FA13
FB26 F903 I901 I900
5A06 F904 I934 F901
F202 F711 F905 3914
3A17
2A12
2A13
3A18
I939
F900
FB24
FB01 2293 4204 5905
3E00
3E01
4B00 3B06
5904 I941
F902
2A07
3A16
FB07
2923 3919 I902
I907 F722 I936
6A06 F907
FE01 FE02
3916
3915
2915
2213 7218
FB03 F250 F302 I938
3270
6909 6908
5A00
5A04
5A05
F916 I937 I940
2914 3913
FE03 I935
2A14
3A19
2A15
F908
F911 F910
F201 2295 I903
FB04 FB15
5E01
6B00
FA06
FA07 FB06
FA04
2B12
FB05
3B21
FA03 FA02 3B20
FB27
FB14
F205 F906
3B00
3B02
6B01
3B01
3B03
1A03
1A04
1A05
1A00
6B02
FB10
1A02
1 2011-02-16
19140_017_110502.eps
110502
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 54
100n
2KZA
2KZB
56 57
58 59
100u 16V
60 61
FI-RE51S-HF
LVDS#2
1KZB
FI-RE41S-HF
FKZE
50 51
48 49
46 47
44 45
42 43
41
40
PX4E+
PX4E- 39
38
PX4D+
PX4D- 37
36
35
PX4CLK+
34
PX4CLK-
33
32
PX4C+
31
PX4C-
30
PX4B+
29
PX4B-
28
PX4A+
27
PX4A-
26
RES 25
2KZF 10n
24
PX3E+ FKZF
23
PX3E- FKZG
22
PX3D+ FKZH
21
PX3D- FKZJ
20
1X01 1X02
REF EMC HOLE REF EMC HOLE PX3CLK+ 19
FKZK
PX3CLK- 18
FKZL
17
PX3C+ 16
FKZM
PX3C- 15
FKZN
PX3B+ 14
FKZP
PX3B- 13
FKZR
PX3A+ 12
FKZT
PX3A- 11
FKZU
10
FKZV
9
8
7
6
5
+VDISP-INT
FKZW
4
3
2
1
RES
100n
2KZD
1 2011-01-27
PCB SB
3139 123 6515
TCON SHP 100HZ BRZ
19140_020_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 55
TCON Control
TCON Control
T01B VDD33 SSCG_AVDD mini_AVDD LVDS_AVDD
T01B
VDDQ
10n
10n
10n
10n
10n
10n
10n
100n
100n
100n
100n
100n
100n
100n
100n
100n
2KBJ
2KBF
2KBZ
2KBB
2KBE
2KBY
2KCT
2KBC
2KBD
2KBH
2KCA
2KCB
2KCV
2KBG
2KCC
2KCD
VCC_1V2 VDD12 VCC_3V3 VDD33
10n
10n
10n
10n
100n
100n
100n
100n
100n
100n
100n
2KAT
2KAZ
2KAV
2KAY
2KBA
2KAU
2KCP
2KCN
2KCR
2KCQ
2KAW
30R 30R VDD12
7KAA-3
UPD809900F1-S11-KNB-A
10u
1n0
10u
1n0
10u
1n0
10u
1n0
LVDS_AGND
2KAL
2KAA
2KAB
2KAP
2KAC
2KAD
2KAN
2KAM
VDDQ
POWER
L8
VDD12 M8
FKDB
N8
5KAB FKAB 5KAF FKAF VDD12
R10
LVDS_AVDD VDDQ
D2 R11
60R 30R
W2 R12
1u0
1u0
1u0
1u0
1u0
1u0
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
D21 N15
2KBL
2KBT
2KBK
2KBP
2KBV
2KCZ
2KBN
2KBR
2KBU
2KCY
2KDA
2KDB
2KBQ
2KBM
2KCM
2KBW
2KCW
VDD12
10u
1n0
10u
1n0
D3 H11
2KAF
2KAE
2KAR
2KAQ
LVDS_AGND
5KAH VDDQ
LVDS_AGND W3 H10
D20 L9
60R
W7 M9
5KAC FKAC VDD12
W11 N9
mini_AVDD
W12 P10
60R VDDQ
W16 P11
U19 P12
100R
100R
100R
100R
VDD12
10u
1n0
P19 N14
2KAH
2KAG
5KAJ
MINI_AGND MINI_AGND D16 J12
D7 J11
3KAJ
3KAL
3KAK 100R
3KAH 100R
3KAG
3KAM
60R VDDQ
PX1A+ FKDC V7 J10
5KAD FKAD VDD12
PX1A- FKAK V11 K10
SSCG_AVDD
PX1B+ FKAL V12 N13
60R
PX1B- FKAM V16 M13
PX1C+ FKAN U18 L13
VDDQ VDD12
10u
1n0
P18 K12
2KAJ
FKAP
2KAK
5KAK PX1C-
SSCG_AGND SSCG_AGND PX1D+ FKAQ 7KAA-2 E16 K11
PX1D- FKAR UPD809900F1-S11-KNB-A E7
60R
PX1E+ FKAT D14 mini_AVDD
PX1E- FKAU
INTERFACE U4 D13
VDD33
PX1CLK+ FKAV A21 AB2 L_LVA0+ W6 LVDS_AVDD D10
RA1_P MILVA_P0
PX1CLK- FKAW B21 AA2 L_LVA0- W17 D9
RA1_N MILVA_N0
C20 Y3 L_LVA1+ D17
RB1_P MILVA_P1 VDD33
C21 Y2 L_LVA1- D6 H8 SSCG_AVDD
RB1_N MILVA_N1 SSCG_AVDD
B20 AA3 L_LVA2+ F5
100R
100R
100R
100R
100R
RC1_P MILVA_P2
A20 AB3 L_LVA2- G5 V10 LVDS_AVDD
RC1_N MILVA_N2 MINI_AVDD12
C18 AB4 3KBK V6
RD1_P MILVA_P3
C19 AA4 100R V17 VDD33 V14
3KAT
3KAP
3KAN
3KAR
3KAU
3KAQ 100R
RD1_N MILVA_N3 MINI_AVDD34
PX2A+ B18 Y5 L_LVA3+ K18
RE1_P MILVA_P4
PX2A- A18 Y4 L_LVA3- G18 L4 VDD12
RE1_N MILVA_N4
PX2B+ A19 AB6 L_LVA4+ F18 P4
RCLK1_P MILVA_P5
PX2B- B19 AA6 L_LVA4- E17 M5
RCLK1_N MILVA_N5 VDD33 DVCC
PX2C+ Y7 L_LVA5+ E6 R5
MILVA_P6
PX2C- A16 Y6 L_LVA5- L18 M15 VDD12
RA2_P MILVA_N6
7KAA-1 PX2D+ B16 AA7 3KBL U5 L15
UPD809900F1-S11-KNB-A RA2_N MILVA_P7 DVCC
PX2D- C15 AB7 100R H12
1
RB2_P MILVA_N7
PX2E+ C16 AA5 L_LVCKA+ M14
1KAA
CONTROL RES RB2_N MILVCLKA_P
2 PX2E- B15 AB5 L_LVCKA- L14
3KAF RC2_P MILVCLKA_N DVCC
24M
1M0
F22 P3 A15 P5
3KAA
IN GSLOP GSLOP PX2CLK+ RC2_N
C13 AB9 L_LVB0+ L5
3
EXCLK 2K2 PX2CLK- RD2_P MILVB_P0
3KAB E22 U3 C14 AA9 L_LVB0-
OUT R FKCL GCK_R RD2_N MILVB_N0
VCC_3V3 GCK U2 FKCM GCK_L B13 Y10 L_LVB1+
1K0 L RE2_P MILVB_P1
3KAC 10K J21 A13 Y9 L_LVB1-
100R
100R
100R
100R
100R
GAM_LUT RE2_N MILVB_N1
3KAD 10K J20 DBG T3 FKCN GOE_R A14 AA10 L_LVB2+ 7KAA-4
OS_LUT R RCLK2_P MILVB_P2 UPD809900F1-S11-KNB-A
GCE T2 FKCP GOE_L B14 AB10 L_LVB2-
L RCLK2_N MILVB_N2
SCL-TCON E20 AB11
3KBZ
3KAZ
3KAV
3KAY
3KBA
3KAW 100R
RES SCL MILVB_P3 3KBM GND
E19 SLAVE T1 AA11 100R
100R
SDA-TCON A10
3KCA
SDA 1 FKCQ GSP1 PX3A+ RA3_P MILVB_N3
GPS R1 FKCR GSP2 PX3A- B10 Y12 L_LVB3+ A1 T19
2 RA3_N MILVB_P4
BIT_SDI G19 PX3B+ C9 Y11 L_LVB3- B1 R19
SDI RB3_P MILVB_N4
BIT_SDO F19 V3 FKCT LS_R PX3B- C10 AB13 L_LVB4+ C1 N19
SDO R RB3_N MILVB_P5
RES BIT_SCS F20 BIT LS V2 FKCU LS_L PX3C+ B9 AA13 L_LVB4- D1 M19
SCS L RC3_P MILVB_N5 GND GND
100n
BIT_SCK G20 A9 Y14 L_LVB5+ W1 D19
2KDC
SCK PX3C- RC3_N MILVB_P6
V1 FKCV REV PX3D+ C7 Y13 L_LVB5- Y1 D18
REV RD3_P MILVB_N6
SDI SDI H21 PX3D- C8 AA14 3KBN AA1 D15
SDI RD3_N MILVB_P7
SDO H19 U1 FKCW FS PX3E+ B7 AB14 100R AB1 D12
SDO FS RE3_P MILVB_N7
RES SCS H20 PX3E- A7 AA12 L_LVCKB+ AB8 D11
SCS RE3_N MILVCLKB_P GND GND
100n
J22 R3 G_LBR A8 AB12 L_LVCKB- AB15 D8
2KDD
SCK FKCY PX3CLK+
SCK G_LBR RCLK3_P MILVCLKB_N
R2 FKCZ G_LBR_INV PX3CLK- B8 AB22 D5
3KAE G_LBR_INV RCLK3_N
H3 AB16 R_LVA0+ AA22 E5
VDD33 VPOL MILVC_P0
N1 CS1 A5 AA16 R_LVA0- Y22 H5
10K 1 RA4_P MILVC_N0
P2 N2 CS2 B5 Y17 R_LVA1+ W22 J5
100R
100R
100R
100R
RES READY 2 RA4_N MILVC_P1 GND GND
100R
N3 C4 Y16 R_LVA1- M22 T5
3KCB
3 CS3 RB4_P MILVC_N1
E1 M1 CS4 C5 AA17 R_LVA2+ G22 V5
SSCLK 4 RB4_N MILVC_P2
M2 B4 AB17 R_LVA2- D22 V8
3KBF
3KBB
3KBE
3KBC 100R
3KBD 100R
3KBG
5 CS5 RC4_P MILVC_N2
J2 M3 CS6 PX4A+ FKBY A4 AB18 3KBP C22 V15
H_TOTAL 6 RC4_N MILVC_P3
J1 CS L1 CS7 PX4A- FKBZ C2 AA18 100R B22 V18
VS OUT 7 RD4_P MILVC_N3 GND GND
J3 L2 CS8 PX4B+ FKCA C3 Y19 R_LVA3+ A22 T18
V8 8 RD4_N MILVC_P4
L3 CS9 PX4B- FKCB B2 Y18 R_LVA3- A17 R18
9 RE4_P MILVC_N4
G1 K1 CS10 PX4C+ FKCC A2 AB20 R_LVA4+ A12 N18
DATA 10 RE4_N MILVC_P5
H1 K2 CS11 PX4C- FKCD A3 AA20 R_LVA4- A11 M18
CLK DAC 11 RCLK4_P MILVC_N5
H2 K3 CS12 PX4D+ FKCE B3 Y21 R_LVA5+ A6 J18
LATCH 12 RCLK4_N MILVC_P6 GND GND
PX4D- FKCF Y20 R_LVA5- AA8 H18
MILVC_N6
PX4E+ FKCG G4 AA21 3KBQ AA15 E18
VDD33 TEN MILVC_P7
PX4E- FKCH G3 AB21 100R W21 E15
DMA MILVC_N7
PX4CLK+ FKCJ F3 AA19 R_LVCKA+ M21 E12
TMC1 MILVCLKC_P
PX4CLK- FKCK F4 AB19 R_LVCKA- G21 E11
TMC2 MILVCLKC_N GND GND
F21 E8
G2 V22 R_LVB0+ E21 J8
TRST MILVD_P0
2K2
RES
TEST_L_0 MILVD_N0
E3 U20 R_LVB1+ B12 P8
TEST_L_1 MILVD_P1
9KAA E4 V20 R_LVB1- B11 R8
TEST_L_2 MILVD_N1 GND GND
F1 U21 R_LVB2+ B6 R9
TEST_C MILVD_P2
U22 R_LVB2- Y8 R13
MILVD_N2
F2 T22 3KBR Y15 R14
SS_OUT MILVD_P3
EN H22 T21 100R W20 R15
ROM_ACC MILVD_N3
RESET P1 R20 R_LVB3+ M20 P15
+VDISP RESET MILVD_P4 GND GND
SELLVDS J19 T20 R_LVB3- C17 H15
SELLVDS MILVD_N4
P22 R_LVB4+ C12 H14
MILVD_P5
R_L K22 P21 R_LVB4- C11 J9
HSCAN MILVD_N5
U_D L22 N20 R_LVB5+ C6 K9
FKAX VSCAN MILVD_P6
P20 R_LVB5- D4 P9
MILVD_N6 GND GND
4u7
100K
K21 N21 H4 P13
3KBY
2KCF
TEMP_0 MILVD_P7 3KBT
K20 N22 100R J4 P14
TEMP_1 MILVD_N7
K19 R21 R_LVCKB+ M4 J13
VCC_3V3 TEMP_2 MILVCLKD_P
7KAC R22 R_LVCKB- R4 L10
MILVCLKD_N
MP2301ENE-LF 2 L21 T4 M10
2KCE MODE_0 GND GND
VIN 5KAG L20 V4 N10
2KCJ MODE_1
7 Φ 1 FKDD VCC_1V2 L19 W4 N11
8
EN BS 100n MODE_2
7KAB W5 N12
3KBU 2KCL 10n 4u5
6 3 LM75BDP W8 K13
COMP SW
W9 L11
1K8 4n7 GND GND
22u
+VS
7K5
8 5 7 NC 3 W10 M11
3KBV
2KCG
1% SS FB A0 OS
47u 6.3V
W13 M12
FKAH
1
4
6
SGND2
GND GND_HS VIA 6 1 W14 L12
RES 2KCK
4 9 10 11 A1 SDA
W15
FKAJ
3n3
10K
5 2 W18
2KCH
3KBJ-1
3KBJ-4
3KBJ-3
A2 SCL
cKAA W19
3
15K
GND
V19
3KBW
10K 8
10K 7 3KBJ-2 2
10K 5
E14 K4
4
LVDS_AGND E13 N4
SGND2 SGND2 SGND2
VDD33 E10 LVDS_AGND K5
DGND
E9 N5
K15
SSCG_AGND H9 J15
SSCG_AGND
OS_ON-OFF H13
MINI_AGND DGND
100Hz_120Hz V9 K14
MINI_AGND12
MODE2 J14
V13
MINI_AGND34
1 2011-01-27
PCB SB
3139 123 6515
TCON SHP 100HZ BRZ
19140_021_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 56
TCON DC/DC
10u
10u
2u2
2KFH
47u 25V
10u
10u
10u
10u
2u2
10u
2u2
10u
10u
10n
2K2
39K
RES
RES
RES
RES
RES
RES
100n
100n
2KFA
2KFB
2KFE
3KFE
2KHT
2KFC
2KFD
2KHP
2KFG
2KHN
2KHR
2KHU
2KHQ
2KHG
RES 2KFK
RES 2KFL
RES 2KHK
47u 16V
4 4
RES 3KFA
3KFB
10K
FKFE
RES
100K
VLS_FB
3KFF
1n0
39K
RES
3KFC
2KFM
VLS_15V6
VGL_-6V
2u2
4u7
1n0
3K3
RES
2KGL
3KFD
2KFN
2KGK
SGND1 SGND1
7KFA-1
38
1
19
ISL97653AIRZ
SUPP
Φ PVIN
34
1
LX 35
2KGJ 3KGE 2
30 29
VCC_3V3 COMP FBB
4n7 10K 1% RES 3KFG
27 28
SGND1 SGND1 HVS RSET SGND1 RES
2K2 FKFP 3KFH
26 21
EN POUT VLS_15V6
FKFL 36 20
PROT FBP 2K2
FKFM RES 2KFP 100n
15 23
P DRN SGND1
2KGG 100n 16 C1 22
N COM
2KGH 100n 17 10 2KFQ 220n SGND1
P VREF
18 C2 11
RES N FBN
13 3KFJ 39K 2KGW 100p 6KFC
3KGF NOUT
GSLOP 24 RB550EA
CTL
2KGD 220n 25 2 2KFR 820p 3KFP 240K 1 5
2K2 CDEL CB
3 2
1
2KGE 4u7 9 LXL 4 2KFT 220n 3 4
VL 2
8
FBL 2KGM 5KFD FKFB
2KGF 4n7 7
CM2 VCC_3V3
40 RES 3KFK 2K2 4u5
LDO-CTL VCC_3V3 1u0 FKFK
39 RES 3KFL 2K2
SGND1 LDO-FB VGL_-6V
47u
47u
RES
31
2KHZ
2KHY
PGND TEMP
2K2
SUPN
AGND
GND_HS
2KGT
3KFQ
RES
16V 22u
5
6
1n0
22u
2u2
20K
RES
SGND1 SGND1
RES
RES
SS24
6KFB
3KFM
2KGN
2KGR
2KGU
12
37
32
33
14
41
2KGQ
7KFF
22u 16V
KTA1718D
3
10n
2KGV
1
2u2
13K 0.5%
9KFD
2KGC
SGND1 2 VCC_1V2
cKFA
RES 3KGD
1n0
12K
RES
3KFN
2KGP
2u2
2u2
RES
RES
RES
2KFV
2KFU
2KFW
SGND1
22u 16V
+VDISP
SGND1 SGND1
VLS_15V6_B
7KFA-2
57
56
55
54
ISL97653AIRZ
VIA
42 53
43 52
44 VIA
VIA VIA 51
45 50
FKFG
VGL_FB VIA
46
47
48
49
SGND1
27K
2K2
13K 0.5%
RES
RES
RES
100n
3KFY
2KGA
3KFW
3KGG
FKFH
VGH_FB
100p
750K
1 9KFE-1 8
3KFZ
2KGB
2 9KFE-2 7
6KFF 3 9KFE-3 6
RB550EA 4 9KFE-4 5
1 5
2 RES 7KFB
FKFR 2SB1767 FKFA
3 4 2 3 VGH_35V 1 9KFG-1 8 DISPLAY INTERFACING - VDISP
2 9KFG-2 7
3 9KFG-3 6
4u7
13K
10K
RES
RES
0.5%
RES
100n
2KFZ
3KFT
6KFD
3KFU
2KHW
4 9KFG-4 5
1
PMEG1030EJ
RES 1KFA
T 3.0A 32V
3K6
RES
3KFV
2KGZ
30R
1 2K2 LTST-C190KGKT
FKFN
RES 2KGY
GSLOP
3KGA
VGH_35V
75K
75K
3KGB
FKFJ
RESET 9KFF
16K
RES
100n
1 2011-01-27
2KHH
3KGC
PCB SB
3139 123 6515
TCON SHP 100HZ BRZ
19140_022_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 57
1u0
1u0
10u
22K
2K2
100n
100n
100n
100K 0.5%
2KQF
2KQA
2KQB
3KQA
3KQB
2KQE
2KQC
2KQD
3KQG
FKYM
2K2
2K2
2K0
2K2
2K0
2K0
2K0
RES
RES
RES
RES
3KTV
3KTU
3KYA
3KYB
3KYC
3KYD
3KTW
7KQA
6K2 0.5%
5
21
ISL24837IRZ-T13
3KQC
18K
SDA-TCON
3KQD
FKYL AVDD
29 2 FKLZ VH255 SCL-TCON
VSD OUT1
3 RES 3KQJ 100R FKMD VH127 FKQG 100HZ_120HZ
* OUT2
27 RES 3KQK 100R FKMC VH159 FKQH OS_ON-OFF
INPCOM|DVR_OUT
10K 0.5%
4 9KQA FKQJ SELLVDS
3KQE
FKMB VH191
OUT3
RES 3KQL 100R FKMA VH247 FKQK R_L
1 7 FKQL U_D
REFIN_INN OUT4
RES 3KQM 100R FKMF VH63 FKQM MODE2
8 RES 3KQN 100R FKME VH95
8
7
6
5
OUT5
1n0
1n0
1n0
1n0
1n0
2K2
2K0
2K2
2K2
2K2
RES
3KTZ
3KTY
3KYF
32 9KQB
3KYK
3KYE
REFIN VH127
9 RES 3KQP 100R VH159
INN5
2K2
10R
10R
10R
10R
RES 2KRJ
RES 2HRK
RES 2KRL
RES 2KRM
RES 2KRN
VH191
3KQH-1
3KQH-2
3KQH-3
3KQH-4
3KQF 28 10
1
2
3
4
SET OUT6
3K3 9KQC FKMG VH31
11 RES 3KQR 100R VH63
INN6
SCL-TCON FKQR 13 RES 3KQT 100R VH95
SCL
100n
100n
100n
100n
SDA-TCON FKQT 12 16
2KQJ
2KQK
2KQH
2KQG
SDA OUT7
VCC_3V3 15
INN7
30
NC SET_COMP
18 FKMH VH0
OUT8
31 17
NC V_THERM INN8
10K
2K2
RES
RES
3KTP
3KQU
19 FKMJ VL0
FKQW OUT9
14
BANKSEL
22 9KQD FKMK VL31
OUT10
RES 3KQW 100R FKLX VL63
34 23 RES 3KQY 100R FKYA VL95
OUT11
10K
35
3KTQ
36 24 RES 3KQZ 100R FKYD VL191
OUT12
37 RES 3KRA 100R FKYC VL159
38 VIA 9KQE FKYB VL127
FKYN
5
6
7
8
39 25 OUTCOM RES 3KRB 100R VL63
OUTCOM
40 RES 3KRC 100R VL95
FKYP
10R
10R
10R
10R
41 26 INNCOM
3KRL-4
3KRL-3
3KRL-2
3KRL-1
INNCOM
4
3
2
1
RES
GND
GND_HS DEBUG ONLY 1KQA
6
FKQA 1
20
33
SCK
FKQQ SDO FKQB 2
100n
100n
100n
100n
2KQP
FKQC 3
2KQN
SCS
2KQQ
2KQM
SDI FKQD 4
WP FKQU 5
RES 3KRD 100R FKYE VL247 VCC FKYJ 6
9KQF VL191 7
+VDISP NC
RES 3KRE 100R VL159 8
VCOM BUFFER RES 3KRF 100R VL127 EN FKQE 9
8
7
6
5
11 10
FKYF VL255
FKYV
FKYR 502382-0970
CS_H
cKQB
9KQG-1
9KQG-2
9KQG-3
9KQG-4
1
2
3
4
VREF_15V2 FKYT VCC_3V3
INNCOM CS_L
VREF_15V2
5
6
8
7
68p
RES
10K
2KRB
3KYH
7KQD
2K2
10R
10R
10R
10R
PBSS4540X
3KTR
RES
3KRM-4
3KRM-3
3KRM-1
3KRM-2
OUTCOM 1KQB
4
3
1
2
SDA-TCON 1
10u
10K
10K
RES
RES
SCL-TCON 2
3KYP
2KQY
3KYM
3
VCC_3V3 FKQF
1K0
BYPASS_MODE
100n
100n
100n
100n
OUTCOM 4
0R51
2KQT
3KRH
3KRG
2KQR
2KQU
2KQW
RES
100n
2KRT
6 5
FKLY 3KRJ
VCOM
560R 502382-0470
10K
RES
3KYQ
10K
RES
3KYJ
10K
RES
100n
0R51
3KYN
2KQZ
3KRK
6KQA
22u 16V
MSS1P4
RES 2KRA
7KQC
PBSS5330X SCK
SDO
WP
VCC
4u7 10V
2K2
2K2
2K2
4K7
2K2
RES
RES
RES
3KTL
3KTF
3KTE
3KTK
3KTD
2KRH
EN
7KQB
8 AT25DF321-SU
Φ *
6 (32K) 1 SCS ITEM 32" 40"/46"/52"
SCK CS
FLASH
5 7 3KQA 100K 39K
SI HOLD FKQP
SDI
2 3 3KQC 6K2
SO WP 2K7
4
3KQE 10K 3K9
FKYU
2K2
2K2
2K2
2K2
RES
RES
RES
3KTJ
3KTT
3KTH
3KTM
2K2
RES
3KTG
2K2
RES
3KTN
1 2011-01-27
PCB SB
3139 123 6515
TCON SHP 100HZ BRZ
19140_023_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 58
MPD
MPD
T01E T01E
*
Item 40" 46"/52"
2KUA - 4u7
VCOM 2KUB - 100n
2KUC - RES
100n
2KUV
2KUD - RES
2KUE - RES
VREF_15V2 2KUF - 22u
VREF_15V2
2KUG - RES
+VDISP +VDISP
* * * * 2KUH - 100n
7KUA-1 7KUC-1
4u7
11K 0.5%
100n
MAX9650ATA MAX9650ATA
3KUJ
2KUA
2KUB
3KUA
9
2KUW - 470n
91K 0.5%
9
3KVA CS_L
3 EP 7 EP 3 2KUY - 100n
+ +
V+ V+
FKUP FKUT 10K
* 6 6 2KUZ - RES
*
100n
100n
2KUC
2KWK
4K3 0.5%
3KUB
2 * * 2
3KUK
-
V- * * * V-
-
2KWA - 22u
56K 0.5%
NC NC
RES
2K0
2K0
RES
100n
100n
100n
RES
3KUL
2KUF
2KUT
3KUE
2KWB RES
2KUH
2KUR
2KUG
2KUQ
-
22u 16V
22u 16V
22u 16V
1 5 8 4 4 8 5 1
*
RES 100n
RES 2KUE
3KUA - 91K
*
3KUB 56K
3KUC
-
1n0
1n0
1K0 0.5%
7KUA-2 7KUC-2 3KUC - 1K
MAX9650ATA MAX9650ATA
RES 2KUU
RES 2KUD
* 14 VIA 19 19 VIA 14 3KUD - 39K
13 18 18 13
12 17 17 12 3KUE RES
3KUD
VIA VIA VIA VIA -
39K 0.5%
11 16 16 11
10 15 15 10 3KUM - RES
VREF_15V2 7KUA - MAX9650ATA
+VDISP +VDISP 7KUD - MAX9650ATA
*
3KUF
7KUB-1 7KUD-1 7KUE MAX17079GTL BD8142MUV
MAX9650ATA MAX9650ATA
16K 0.5%
9 9
CS_H 3KUU
3 EP 7 7 EP 3
+ +
V+ V+
10K FKUR FKUU
6 6 +VDISP
25V
470n
2KUW
3KUG
100n
2 V- * * * * V- 2 *
- -
12K 0.5%
NC NC
RES
2K0
2K0
RES
RES 2KUP
RES
RES
100n
100n
100n
100n
2
2KUL
2KUZ
2KUK
2KUY
3KUH
2KUM
3KUM
2KWA
22u 16V
22u 16V
1 5 8 4 4 8 5 1
FKUW
7KUH 1 VREF_15V2
* 2SC5886A
3
1n0
1n0
VCC_3V3 VLS_15V6
2KWB
7KUB-2 7KUD-2
RES 2KUJ
MAX9650ATA MAX9650ATA
13K 0.5%
100n
14 19 19 14 +VDISP
2KWF
3KUW
VIA VIA
13 18 18 13
1R0
12 17 17 12
3KUR
100n
100n
11 16 16 11 NJM2125F 1
2KUN
2KWC
FKUY 3KUT 3KUY
10 15 15 10 4
3
62R 0.5% 33R 0.5%
2
*
11K 0.5%
100n
3KUZ
2KWE
7KUE
22u 16V
38
34
35
18
16
17
36
MAX17079GTL
VCC VH1 VH2 VL2 VL1 VLS
RES 2KWD
32 FKUA CS1U
OA1
VCOM
CS1 1 7KUF
A1
28
ISL24016IRTZ
CS7 2 AVDD
B1
31 FKUB CS2U CS1U 1 32 CS1
OB1 1
CS2 3 CS2U 2 OUT1 31 CS2
A2 2
CS3U 3 30 CS3
3
CS8 4 CS4U 4 OUT2 29 CS4
B2 IN 4
30 FKUC CS3U CS5U 5 27 CS5
OA2 5
CS3 5 CS6U 6 OUT3 26 CS6
A3 6
CS7U 7 25
7
CS9 6 CS8U 8 OUT4
B3
29 FKUD CS4U CS9U 19 10 CS_H
OB2 REFH
CS4 7 CS10U 20 OUT5 11 CS_L
A4 REFL
CS11U 21
CS10 8 CS12U 22 OUT6 13
B4 +
28 FKUE CS5U 23 INA 14
OA3 -
1n0
1n0
CS5 9 24 OUT7 15
A5 +
INB 16
-
10 18
RES 2KWH
CS11
RES 2KWG
B5 OUTA
27 FKUF CS6U 34
OB3
CS6 11 17 35
A6 OUTB
36
CS12 12 9 37
B6 NC
26 FKUG CS7U 38
OA4 VIA
13 39
A7
40
14 41
B7
25 FKUH CS8U 42
OB4
40 24 FKUK CS9U
CH OA5
33
ST|NC
23 FKUL CS10U
FKUV OB5
42
43
44
45 22 FKUM CS11U
OA6
46 32"
47
48
FKUN
49 21 CS12U
OB6
50 VIA
51
5
6
7
8
5
5
8
6
7
8
6
7
52
53 20
OA7
10R
10R
10R
10R
10R
10R
10R
10R
10R
10R
10R
10R
54
3KUP-4
3KUP-3
3KUP-2
3KUP-1
3KUN-4
3KUN-3
3KUN-2
3KUN-1
3KUQ-4
3KUQ-3
3KUQ-2
3KUQ-1
55
4
3
2
1
4
4
3
2
1
3
2
1
56
57 19
OB7
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
2KWP
2KWY
2KWN
2KWR
2KWU
2KWQ
2KWM
2KWW
37
15
41
40" / 46" /52"
1 2011-01-27
PCB SB
3139 123 6515
TCON SHP 100HZ BR
19140_024_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 59
Mini LVDS
Mini LVDS
T01F T01F
G_LBR 9KLA G_LBR RES 3KMJ 2K0
G_LBR_INV 3KLA 2K0 G_LBR_INV
RES 9KLB
SDI RES 3KLM 2K0 1KA1 SDI RES 3KMW 2K0 1KA2
RES RES 3KLN 2K0 81 82 RES RES 3KMZ 2K0 81 82
3KLQ RES 3KLP 2K0 80 3KNB RES 3KNA 2K0 80
79 79
2K0 VGL_-6V 2K0 VGL_-6V
78 78
VGH_35V VGH_35V
GSP2 3KLR-1 1 8 100R 77 GSP2 3KNC-1 1 8 100R 77
GSP1 3KLR-2 2 7 100R 76 GSP1 3KNC-2 2 7 100R 76
GCK_L 3KLR-3 3 6 100R 75 GCK_R 3KNC-3 3 6 100R 75
GOE_L 3KLR-4 4 5 100R 74 GOE_R 3KNC-4 4 5 100R 74
73 73
CS1U 72 CS1U 72
CS2U 71 CS2U 71
CS3U 70 CS3U 70
CS4U 69 CS4U 69
CS5U 68 CS5U 68
CS6U 67 CS6U 67
CS7U 66 CS7U 66
CS8U 65 CS8U 65
CS9U 64 CS9U 64
CS10U 63 CS10U 63
CS11U 62 CS11U 62
CS12U 61 CS12U 61
VCOM 60 VCOM 60
VH255 59 VH255 59
VH247 58 VH247 58
VH191 57 VH191 57
VH159 56 VH159 56
VH127 55 VH127 55
VH95 54 VH95 54
VH63 53 VH63 53
VH31 52 VH31 52
VH0 51 VH0 51
L_LVB5+ FKMU 50 R_LVB5+ FKNZ 50
L_LVB5- FKMV 49 R_LVB5- FKPA 49
L_LVB4+ FKMW 48 R_LVB4+ FKPB 48
L_LVB4- FKLG 47 R_LVB4- FKPC 47
L_LVB3+ FKMY 46 R_LVB3+ FKPD 46
L_LVB3- FKMZ 45 R_LVB3- FKPE 45
44 44
L_LVCKB+ FKNA 43 R_LVCKB+ FKPF 43
L_LVCKB- FKNB 42 R_LVCKB- FKPG 42
41 41
L_LVB2+ FKNC 40 R_LVB2+ FKPH 40
L_LVB2- FKND 39 R_LVB2- FKPJ 39
L_LVB1+ FKNE 38 R_LVB1+ FKPK 38
L_LVB1- FKNF 37 R_LVB1- FKPL 37
L_LVB0+ FKNG 36 R_LVB0+ FKPM 36
L_LVB0- FKNH 35 R_LVB0- FKPN 35
34 34
VCC_3V3 VCC_3V3
33 33
FS 3KLT-2 2 7 100R 32 FS 3KND-2 2 7 100R 32
REV 3KLT-3 3 6 100R 31 REV 3KND-3 3 6 100R 31
LS_L 3KLT-4 4 5 100R 30 LS_R 3KND-4 4 5 100R 30
3KLT-1 1 8 100R 29 3KND-1 1 8 100R 29
L_LVA5+ FKNJ 28 R_LVA5+ FKPP 28
L_LVA5- FKNK 27 R_LVA5- FKPQ 27
L_LVA4+ FKNL 26 R_LVA4+ FKPR 26
L_LVA4- FKNM 25 R_LVA4- FKPT 25
L_LVA3+ FKNN 24 R_LVA3+ FKPU 24
L_LVA3- FKNP 23 R_LVA3- FKPV 23
22 22
L_LVCKA+ FKNQ 21 R_LVCKA+ FKPW 21
L_LVCKA- FKNR 20 R_LVCKA- FKLK 20
19 19
L_LVA2+ FKNT 18 R_LVA2+ FKPY 18
L_LVA2- FKNU 17 R_LVA2- FKPZ 17
L_LVA1+ FKNV 16 R_LVA1+ FKLA 16
L_LVA1- FKNW 15 R_LVA1- FKLB 15
L_LVA0+ FKLH 14 R_LVA0+ FKLE 14
L_LVA0- FKNY 13 R_LVA0- FKLF 13
12 12
VLS_15V6 VLS_15V6
11 11
VL0 10 VL0 10
VL31 9 VL31 9
VL63 8 VL63 8
VL95 7 VL95 7
VL127 6 VL127 6
VL159 5 VL159 5
VL191 4 VL191 4
VL247 3 VL247 3
VL255 2 VL255 2
1 1
501559-8093 501559-8093
2KLD
47u 25V
22n
RES 3KLW 2K0
2KLA
2KLB
RES 3KNG 2K0
FKLC
47u 25V
SDO RES 3KLY 2K0 SDO RES 3KNH 2K0
RES RES 3KLZ 2K0 RES RES 3KNJ 2K0
3KMA RES 3KMB 2K0 3KNL RES 3KNK 2K0
2K0 2K0
1 2011-01-27
PCB SB
3139 123 6515
TCON SHP 100HZ BRZ
19140_025_110503.eps
110503
2011-May-06
Circuit Diagrams and PWB Layouts L11M1.2L LA 10. EN 60
FKNW FKNU FKNM FKNK FKNH FKNF FKMZ FKLG FKLB FKPZ FKPT FKPQ FKPN FKPL FKPE FKPC FKUL FKUG FKUD
3KLL
3KLK
3KLN
3KLQ
3KLM
FKQB
3KLT 3KND
3KLJ
FKNY FKMV FKLF FKPA
3KLP
3KLB
FKUM FKUH FKUF FKUC
FKFK
3KLZ
3KLY
3KLV
3KLU
3KLW
3KMB
3KMA
FKLH FKMU FKLE FKNZ
3KLF
3KLE
3KLH
3KLD
3KLC
3KLG
FKNV FKNT FKNL FKNJ FKNG FKNE FKMY FKMW FKLA FKPY FKPR FKPP FKPM FKPK FKPD FKPB FKFA
3KME FKUN FKUK FKUE FKUB
9KLA
3KLA
3KLR
FKLC
3KMH
1KA2 1KA1 3KMG
FKNR FKNQ FKNP FKNN FKNC FKND FKNA FKNB FKLK FKPW FKPV FKPU FKPH FKPJ FKPF FKPG
FKUA
FKLZ
3KMD
FKQC
3KMC
FKMB
3KMF 3KNP
3KNN
3KNR
9KLB
3KMJ
3KNC
3KML
3KMK
3KMP
3KMQ
3KNV
2KLE
3KMR
3KMM
2KLB
3KMN 3KNF
3KNE
3KNH
3KNQ
3KNM
3KNJ FKCZ
3KNA
3KMZ
3KMV
3KMU
FKCL
3KQF
3KQB
2KQC
3KQD
3KYN
FKCT
3KNL 3KNG
3KNB FKCY
3KNK FKCN
3KRJ
3KMT
2KQA
2KRA
3KMW
3KYM
3KRK
3KQA
2KLD
3KRG
3KYQ
3KYP
2KLA 2KQY 7KQD 7KQC CKQB
FKYK
2KQJ
3KQC FKME
2KQZ
2KQR 2KQT
2KQB
2KRT
3KRH
3KQE
2KRB
3KRM
2KQH 2KQK
2KQU 2KQW
FKYN
9KQA 3KQL FKMA
3KTR
2KQD
2KQG 3KQH
3KBL
3KBN
FKQQ
3KBK
3KQP 3KQM
3KBM
3KBP
FKCM FKMG
2KAZ
2KCR
7KQA
2KCQ
3KRD
6KFC
2KAY
FKMJ
5KAJ
3KFY
3KRE FKFR 2KCN 2KBB FKYE FKMH
3KQT 9KQC FKUT
3KFQ
2KAW
FKCU
2KQQ 7KFB 6KFD 3KFU 2KUT 2KUW FKQW
2KBC
FKCP FKAB
FKYA
2KAU
2KGB
9KFD
2KGA
2KGH
3KGD
2KGG
3KFZ
2KFT
3KQU
2KGK
2KGT
2KGC
2KQP FKCW
FKCR 2KCT 2KUU 3KUL FKMK
FKCV
3KRL
2KGW
2KCP
3KFP
2KUR
2KBD
2KCV
2KCD
2KCC
2KGU
FKUU
2KGR
2KGQ
6KFF
3KTP
3KTQ
3KQY
3KRC
9KQD
3KQW
3KBR
3KFJ
FKFG
FKFH 3KAF
2KAF
FKQK
7KUC 7KUD 2KWA
2KCZ
2KCY
2KBR
7KFC
3KFT
FKLX
2KAE
2KQN
2KQM
2KBQ
2KHH FKAA 2KAT 3KYG 2KRN 3KUJ 3KVA
3KRB
3KRA
3KQZ
9KQE
2KGE 3KGC 9KFF 2KAD 2KBU 2KCM
3KBT
FKAH FKQM 2KUZ
2KFQ
3KFH 2KAM 2KWB
3KGG 2KDB
2KBH
3KYF 3KYD
2KWH
2KWG
FKFP
FKYC
2KFP 3KFN
2KHW FKQH
5KAB
2KBV
3KGF
3KTZ
3KYA
2KDA
2HRK
FKLY
2KBT 2KRL
2KGP 3KFM
2KAB
2KUV
2KUY
2KUQ
FKYR
2KHZ
2KAL
2KFZ 3KYK
2KRJ
2KGF 2KGN
3KTY
3KYC
3KTW
2KGD 3KFG
FKQG
2KRM FKFE
FKAD 2KCW
5KAA
2KAA
2KAC
cKFA
3KTH 2KFN 3KFD
7KFA 2KGM 2KAK 3KAC
5KAF
5KAE
5KFD
3KCA
3KCB
6KQA 2KHY
2KBL
2KBZ
2KBY
2KBM
2KGL FKDB
2KFL
3KUQ
2KAJ 5KAD
3KTL
3KTT
3KTK
3KTN
2KAG 5KAC
3KTM
2KDC
2KDD
2KAP
2KAN
3KFK
2KAQ
3KAA
2KAR
2KBA
9KAA
3KBH
2KBG
9KFC
2KBF
2KCA
3KFB
3KFA
3KFC
2KFC
2KFM
3KGE
2KFA
3KUP
3KAB
7KUE FKFD
2KGV
2KWQ 2KWP 2KFW 2KFK FKQA
2KGJ
7KFD
2KFH
2KWM 2KWN
FKUV
2KFV
3KUN
3KTV 3KTU
2KHG 2KUA
2KWD
2KFE FKYU
3KTE
7KFE
3KBC
FKDD
3KAM
2KUJ
FKQE
3KUB 3KUC
3KTJ
2KRH
2KUH
2KUN
2KUM
2KWC
2KUL
3KUH
3KAL
3KBD
3KUD
7KQB
3KTG 2KUC
3KAK
3KBB
7KUH
3KAG 3KAJ 3KAH 3KAU 3KAR 3KAQ 3KBA 3KAY 3KBZ 3KBG 3KBF 3KBE
6KFA 3KTF FKQP FKYJ
2KWE
FKUR
3KAT 3KAN 3KAP 3KAZ 3KAV 3KAW
5KFA 2KUK 7KUB 7KUA FKUP
9KFB
FKUW
2KFD
2KHN
2KUF 3KUT
2KHT
FKFC
2KHP
2KHR
2KHQ
3KUR
1KQA
3KUU 2KUP
3KUY
3KUF 3KUG
3KUZ
FKCC FKCD FKZF FKZG FKZK FKZL FKZ6 FKZ5 FKAT FKAU FKAV FKAW
FKZE
2KCJ
2KUD 3KUE
2KCF
3KBY
2KUG
FKUZ
3KFR
2KGZ
9KFG FKZD
6KFE FKYV
FKQF
FKQR
FKCF FKCK FKCB FKBZ FKZJ FKZN FKZR FKZ9 FKZ7 FKZ3 FKZ1 FKAR FKAP FKAM
2KHU FKZW
2KCK
2KWF
3KUW
1KQB
2KZA 1KFA 2KGY
3KBV 3KBW CKAA
FKCG
FKCE FKCJ FKCA FKBY FKZH FKZM FKZP
FKZT FKZV FKZC
FKZA FKZ8 FKZ4 FKZ2 FKAQ FKAN FKAL
FKDC
2KZF 2KZC
5KAG
5KFB
5KFC
2KCG
1KZA 1KZB 1KFB
1 2011-05-03
TCON Layout
3104 123 6515
19140_019_110503.eps
110503
2011-May-06
Styling Sheets L11M1.2L LA 11. EN 61
DANGEROUS 32"
1150
0021
5213
0024
0012
0154
1005
0260
19140_011_110502.eps
110502
2011-May-06
Styling Sheets L11M1.2L LA 11. EN 62
DANGEROUS 40"
1157
5213
0024 1150
0021
0012
0154
1005
0260
19140_013_110502.eps
110503
2011-May-06