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Fifth Semester B.E. Degree Examination, Dec.2017/Jan.20;8
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Fundamentals of CMOS VLSI /6 v "


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Time: 3 hrs. Max. Marks: 100
ote: 1. Answer any FfVEfull questions, selecting at least TWO questi1msjrom each part.

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2. Draw Neat diagr m.
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'<..~ PART-A ,(00J

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1 a. Describe with neat diag~l~s, the P-well fabrication proc~'5s. (08 Marks)
b. Explain the DC transf~cb~r~cteristics of CMOS inverter and mark all the regions of
operation with necessary expres ions for VOU! in each re Ion. (08 Marks)

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c. Compare CMOS and Bipolar Technology. r:
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2 a. Explain Transmission gate and Tristate inverter operations with neat diagram. (06 Marks)
b. Give the A.-based design rules for different layer, p and n MOSFETS and contact cuts.

c.
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Obtain the stick diagram and layout of two way selector with enable.
(08 Marks)
(06 Marks)
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3 a. What are the features of CMOS Domino Iogic'z Explain with neat diagram. (06 Marks)
b. In the following circuit find VI, V2, V3 and VIf., (06 M~rks)
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(08 Marks)

4 a. Define she t Resi tance and standard unit of capacitance DCg. (06 Marks)
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b. Explain cascaded inverter to drive large capacitance loads? Obtain an equation to find the
number of stages. (08 Marks)
c. Calculate the total capacitance in terms ofDCg for the following Fig.Q4(c) \. (06 Marks)
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Fig Q4(c)
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5 a. What are the proGhrtje)s of nMOS and PMOS switches? How . d is


useful. (06 Marks)
b. Explain the structure des.,ign of a parity generation with netC$rpry diagrams and also write
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stick diagrams. f' vor (08 Marks)
c. Obtain the logic implemenf~tion of 4-way multiplexer: (Selector) using nMOS switches with
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necessary d iagrarns. -' ,; (06 Marks)

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6 a. Explain nMOS and CMOS non-inverting dynamic storage cell and draw the 4-bit shift

b.

c.
register using nMOS.

help of logic expression.


Explain 4x4 Barrel shifter with neat diagram.
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How to implement arithmetic and logi operation with a standard adder? Explain with the
(06 Marks)
(07 Marks)
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7 a. What are system timing consideration? (05 Marks)
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b. Explain Read/write operation of one T dynamic memory cell (one transistor). (05 Marks)
c. Discuss Baugh Worley method, ~sed for Two' /~olJlplement multiplication with neat
diagrams. r: ( (10 Marks)

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8 a. Write a note on Testa99i1~'afrd Testing. (06 Marks)


b. What are different types 9~I10 pads? (06 Marks)
c. Write short notes on.: ,I
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i) Built in self'fest (BIST)


ii) Scan des(gn Technic. (08 Marks)
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