2018 International Conference on Computing, Power and Communication Technologies (GUCON)
Galgotias University, Greater Noida, UP, India. Sep 28-29, 2018
Analysis of Total Harmonic Distortion in 5-level
Inverter fed Induction Motor
Reddy Sudharshana K
Research Scholar, EEE,
SET, Jain University,
Bangalore, India
email: reddy3690@gmail.com
A Ramachandran,
Professor, ECE
Vemana Institute of Technology
Bangalore, India
email: arama1947@gmail.com
Abstract- The squirrel cage induction motor is widely used
in medium and high voltage variable frequency drive
applications, it is known as a constant speed motor. The motor
speed can be varied with certain conditions using digital
control techniques, by maintaining voltage to frequency ratio
constant. The author reports that some harmonic frequencies
present at the neutral point of the load, results in a voltage that
exists at the neutral point with reference to common point of
supply. The inverter output is not sinusoidal but it is a stepped
square wave output waveform. A basic two level inverter used
to run the motor. As the number of levels increases the
harmonic distortion is minimized. In order to reduce the
voltage total harmonic distortion a multilevel inverter concept
is used with space vector modulation. Due to the some
frequencies component present in inverter output produces
high temperature results in heat, which fails the insulation of
windings and the mechanical output is lowered. The authors
discuss the experimental measurement of harmonic
components in inverter fed squirrel cage IM uses
microcontroller. The test setup is fabricated, designed, tested
and measures the phase voltages and currents using 500MHz
Digital storage oscilloscope. The FFT analysis is carried out
using MATLAB for simulation and used Origin software for
test results. The test results of five level inverter compared
with two level, three level inverter from published results of
same authors and are tabulated.
Keywords- Voltage Source Inverter VSI, Total Harmonic
Distortion THD, Induction Motor IM, Pulse Width Modulation
PWM, Space Vector Modulation SVM.
I. INTRODUCTION
The inverters are used to control the speed of variable
frequency drives (VFD) such as induction motor (IM). The
sum of three phase voltages at any instant of time is not zero
in inverter fed VFD. The potential difference that exists at
neutral point of the load produces a voltage [1], which results
in harmonic components and does not induces a useful drive
torque. B Muralidhara[1] reported the existence of Voltage
harmonics in PWM operated inverters. Voltage harmonics
that The potential at the common point exists in an inverter
fed VFD system induces a voltage at shaft and results in the
flow of current through ball bearing of motor, in the year
1924 by P Alger [2]. In 2006 A Ramachandran [3][11]
discussed the minimization of electromagnetic interference
and radiation in inverter fed IM drive. Gary L. Skibinski
[4][5] discussed the unsymmetrical flux at the neutral point
of the load produced by inverter induces harmonic distortion.
978-1-5386-4491-1/18/$31.00 ©2018 IEEE
V Muralidhara,
Associate Director, EEE,
SET, Jain University,
Bangalore, India
email:v.muralidhara.1952@gmail.com
R Srinivasan
Professor, ECE
Vemana Institute of Technology
Bangalore, India
email: rsrini47@gmail.com
This causes Electromagnetic Interference (EMI) in nearby
communication devices and electronic circuits [6].
The inverter output is fed to the three phase IM uses
space vector modulation method. The output of the inverter
is non-sinusoidal. It contains an unbalanced voltage at the
neutral point of the load and supply neutral. In order to lower
the voltage at the neutral point and harmonic distortion a
multi-level inverter [7] concept is used.
The experimental circuit used a five level inverter which
is interfaced with driver circuits with opto-isolation and to
drive the IM.
II. SPACE VECTOR MODULATION
In SVM method, generally each state switching
generates the three phase voltages at definite time interval.
The three adjacent vectors produce the voltage output shown
in Fig. (1-2). A voltage vector shifts from sector one to
adjacent sector, produces a resultant vector output with
changes. At any instant it is essential to know the switching
state time and its switching patterns with respect to a voltage
vector of reference. The three phase voltages are
VR = Vm sinωt (a)
0
VY = Vm sin(ωt-120 ) (b)
VB = Vm sin(ωt-2400) (c)
TABLE I. FIVE LEVEL INVERTER SWITCHING STATES
For minimal THDV, space vector modulation is used for
generating the inverter output(~sinusoidal waveform) which
produces a more inverter voltage output to IM compared to
sinusoidal pulse width modulation. Fig.(1, 3) and Fig.4
shows the switching vector states for two, three and five
level inverters. Five level switching states are shown in Table
I.
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Fig.1. Two level inverter Switching states in SVM.
Fig. 2. A reference voltage vector in sector-1
Fig. 3. Three level inverter switching states in SVM
Fig. 4. Five level switching states in SVM
III. THE EXPERIMENTAL WORK
The five-level NPC inverter is designed and implemented
with 24 MOSFET switches, to run the squirrel cage IM. The
test set up measures the inverter output phase voltages and
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currents using Agilent make 500MHz DSO. The DC link
capacitors, with electronic components interfaced with opt
isolation circuits and MOSFET’s are used in five level
inverter. In SVM technique the signals to MOSFET gates
can be interfaced with necessary electronic circuits and
programmed using 16F877 pic microcontroller. The losses of
switching are less, well utilization of dc bus with low THD
[9][10]
In SVM method, the voltage output ~15% more than the
sinusoidal pulse width modulation (SPWM). The THD of
voltage is calculated using equation.
(d)
Fig. 5. Five level Inverter simulation circuit.
Fig. 6. Five level Inverter Experimental Circuit
IV. TEST SETUP
The five-level NPC inverter is designed shown in Fig.5
simulation circuit and Fig.6 an experimental circuit with 24
MOSFETs as switching devices, with Line impedance
stabilization network and necessary electronic circuits. The
SVM implemented using pic microcontroller 16F877 with
proper isolation, electronic circuit output fed to gate of the
switches. The gate pulses generated using the microcontroller
with SVM method shown in Fig.7 at 50Hz. The FFT analysis
is done using MATLAB/Simulink for simulation and
‘Origin’ signal analysis software is used for the experimental
results. The Phase Voltages are recorded and analyzed for 3-
different frequencies to evaluate the THD in Voltage. The
results of THD and Harmonic frequency for 2-level, 3-level
inverters are from the published results [12] of same authors.
 V. SIMULATION AND EXPERIMENTAL RESULTS
Fig. 8 shows the simulated waveforms Figs.(9a-b,10a-
b,11a-b) shows the experimental waveforms. The phase
current, output voltages of phase and line are measured using
500MHz Mixed Signal Oscilloscope. The Fig.(11a,11c)
shows the measured line currents of IM without load and
Fig.(11b,11d) shows the line currents of IM with load.

Fig. 11. IM without/with load in Test setup to measure line current

Fig. 11a Fig.11b

Experimental Inverter line currents Waveforms IM with/without load
(30Hz) Ch1, Ch3, Ch4: Line current 1:1, Ch2: Phase Voltage 200:1
Fig. 7. Gate pulses generated using Pic Microcontroller [16F877]

Fig. 11c Fig.11d

Experimental Inverter line currents Waveforms IM with/without load
(40Hz) Ch1, Ch3, Ch4: Line current 1:1, Ch2: Phase Voltage 200:1

Fig. 8. Five level inverter output waveforms (simulation)

Ch1, Ch2 and Ch3; Phase voltages, Ch4; Line current

Fig. 11e Fig.11f

Experimental Inverter line currents Waveforms IM with/without load
(50Hz) Ch1, Ch3, Ch4: Line current 1:1, Ch2: Phase Voltage 200:1

Fig. 9a-40Hz Fig.9b-40Hz

Experimental 5 level inverter output waveforms, Ch1: Line voltage
200:1, Ch2: Phase Voltage 200:1, Ch3, Ch4: Line current

Fig. 12. Test setup to measure line current IM with load

The harmonics present in the output are only odd

harmonics of order 5th,7th, 11th,13th, etc. the triple’s
harmonics 3rd ,6th,9th order are multiple of 3 cancel out each
other does not result in winding insulation heating. Due to
Fig. 10a-30Hz Fig.10b-50Hz
Fig.(9b,10a-b) Experimental inverter output waveforms
symmetry in the output waveform, the even harmonics are
Ch1, Ch3, Ch4: Phase voltages 200:1 zero. Some harmonic components induce unusable torque,
which opposes the driving torque of the IM. The FFT

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analysis of phase voltages shown in Figs.(12,14,16) for level inverter. The voltage harmonics at steady conditions in
simulation and Figs (13,15,17) for Experimental work. The the experimental work and MAT Lab/Simulink are ~
harmonic components results in motor insulation stress and identical of order 5th, 7th, 11th 13th etc., as the harmonics
its life span decreases, to minimize this multilevel inverter frequency increases the magnitudes of voltage harmonics are
concept is used. decreased.
FFT ANALYSIS

Fig.12. Simulation (30Hz, 5-level) FFT of Phase Voltage Fig.16. Simulation, (5-level, 50Hz) FFT of Phase Voltage
90 140
80
120
70
100
Amplitude in Volts

60

Amplitude in Volts
50 80

40
60
30
40
20

10 20

0 0
100 200 300 400 500 600 700 800 900 1000 0 100 200 300 400 500 600 700 800 900 1000
Frequency (Hz) Frequency (Hz)

Fig.13. Exptl. (30Hz, 5-level) FFT of Phase Voltage Fig. 17. Exptl., (50Hz, 5-level) FFT of Phase Voltage

TABLE II. THE COMPARISON OF %THD OF PHASE VOLTAGE

WITH IM
Two level inverter with 6 switches[12]
Phase voltage / Frequency 30Hz 40Hz 50Hz

% THDV(Simulation) 12 10 9

% THDV (Exptl.) 10 9 7.7

Three level inverter with 9 switches[12]

Fig. 14 Simulation (5-level, 40Hz) FFT of Phase Voltage Phase voltage / Frequency 30Hz 40Hz 50Hz
120
% THDV(Simulation) 10 9 8
100
% THDV (Exptl.) 8 6.2 5.9
Amplitude in volts

80
Five level inverter with 24 switches
60

Phase voltage / Frequency 30Hz 40Hz 50Hz

40

% THDV(Simulation) 8.96 7.41 6.90

20

0
% THDV (Exptl.) 7.2 6.0 5.6
0 100 200 300 400 500 600 700 800 900 1000
Frequency (Hz)
Table II shows the THD of phase voltage and Table-III
Fig. 15. Exptl., (5-level, 40Hz) FFT of Phase Voltage
shows the magnitude of line current of IM without load and
VI. CONCLUSION with load at different frequencies. The magnitude of line
The three phase five level neutral diode clamped inverter current increase with the load sequentially. The FFT
is designed, fabricated and tested with IM drive system. The analysis of the Phase Voltage simulation and experimental
phase voltage, line current is measured using Agilent make work shows as the frequency increases the harmonics
oscilloscope 500MHz MSO. The harmonic components of magnitude lowers, results in low stresses on IM winding
the output phase voltages analyzed in Table II for different insulation.
frequencies for two level, three level inverter [12] and five

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 TABLE-III. COMPARISON OF THE RESULTS FIVE LEVEL Dr. A Ramachandran obtained his Bachelor’s, Master’s and doctoral
INVERTER WITH/WITHOUT LOAD Degree in Electrical Engineering from Bangalore
University, Bangalore, India. He was with National
Five level with 24-switches Aerospace Laboratories Bangalore, India, as scientist in
various capacities, and was working in the areas of
Frequency (Hz) 30Hz 40Hz 50Hz Power Electronics & drives for the past 41years. He was
heading the Instrumentation & controls group of
Line current amplitude without load 120mA 122.5mA 112.5mA Propulsion Division, and guided many Bachelors and
Masters Degree students for their dissertation work. He
Line current amplitude with load 130mA 132.5mA 122.4mA has also guided Ph.D., for the dissertation work and earlier worked has
principal, after superannuation and at present professor ECE department,
Vemana I.T.Bangalore-34, having number of papers to his credit both in the
ACKNOWLEDGEMENT national/international Journals / conferences.
(email:arama1947@gmail.com).
The authors are grateful to Karnataka Reddy Jana Sangha
Management, The Principal, Dean, Head of Department, Dr.V Muralidhara obtained his B.E, and M.E degrees
ECE, Vemana Institute of Technology, Koramangala, from University of Mysore and earned Ph.D. from
Bengaluru, and Thank Prof. M. Channa Reddy for their Kuvempu University. He has a teaching experience of
over 40 years inclusive of research as a par at of his
constant motivation, support, thankful to all the mechanical Ph.D. Started his teaching career at PES College of
and electronics staff for their cooperation and support to Engineering Mandya, served there for 6 years and
carrying out the experimental work. served for 31 years at Bangalore Institute of
Technology [BIT], Bengaluru and retired from there as Prof. & Head of
EEE. Presently working has an Associate Director at Jain University. His
REFERENCES area of interest is Power Systems and HV Engineering. In his credit he has
[1] B Muralidhara, A. Ramachandran, R. Srinivasan, and M. Channa 13 papers published in reputed International conferences and one paper in a
Reddy, "Experimental Measurement and Comparison of Common Journal. At Present he is guiding five doctorate scholar.
Mode Voltage, Shaft Voltage and the Bearing Current in Two-level email:v.muralidhara.1952@gmail.com.
and Multilevel Inverter Fed Induction Motor," International Journal of
Information and Electronics Engineering vol. 1, no. 3, pp. 245-250, Dr. R Srinivasan obtained his Bachelor’s, Master’s
2011. and doctoral Degree in Electrical Engineering from
[2] P. Alger and H. Samson “Shaft currents in Electric machines” in Indian Institute of Science, Bangalore, India. He was
Proceeding AIRE Conf. Feb, 1924. with National Aerospace Laboratory as Scientist and
[3] A.Ramachandran, M.Channa Reddy “Novel method of mitigation of served as Professor at Indian institute of Astro-
conducted EMI in PWM inverter fed induction motor Adjustable Physics. After superannuation, currently he is
speed drives” IEEE international conference on industrial professor in the ECE department at the Vemana
Technology,ICIT- Dec.,15-17,2006 held at Mumbai, India. Institute of Technology, Bengaluru India. He has guided many Bachelor’s,
[4] ABB automation Inc., IEEE industry applications Magazine, Master’s and Ph.D. Students for the dissertation work. He has also
July,Aug. 1999. published number of papers in the national/international conferences and
[5] Gary L. Skibinski, Russel J. Kerkman and Dave Schlegel (Rockwell Journals. (email:rsrini47@gmail.com).
Automation): EMI Emissions of modern PWM AC drives. IEEE
Trans. Ind. Application. Nov/Dec.1999. pp-47-81
[6] A. Ramachandran, “Novel Method of Minimization of EMI Noise
From PWM Fed Speed Control of Induction Motor In Aerospace
Application”, Ph.D thesis, Bangalore University, 2008, India.
[7] B. Muralidhara, “An Experimental Evaluation of Two level and
multilevel inverter used for speed control of Induction Motor and
study of Common Mode Voltage in both cases”, JNTU, Ph.D thesis
Aug 2013.
[8] Pic microcontroller Manual.
[9] G. Narayanan, and V.T. Ranganathan, “Synchronised PWM strategies
based on space vector approach : Principles of waveform
generation”, IEEE Proceedings- Electric Power Applications, vol 146
No.3, May1999, pp. 267-275.
[10] Nashiren F. Mailah,Senan M. Bashi, Ishak Aris, Norman Mariun
“Neutral-Point-Clamped Multilevel Inverter Using Space Vector
Modulation” European Journal of Scientific Research, Vol.28 No.1
(2009), pp.82-91.
[11] C. R. Paul, “Introduction to Electromagnetic Compatibility Wiley
Series in Microwave and Optical Engineering” John Wiley &
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[12] Reddy Sudharshana K, A Ramachandran, V Muralidhara and R
Srinivasan, “Simulation with Experimental Measurement of Voltage
Total Harmonic Distortion and Harmonic Frequency in Three-Phase
Induction Motor fed from Inverter”, in WCE proceedings, London,
U.K July 2017, pp.317-322.

Mr.Reddy Sudharshana K received the B E, and M. E degree in

Electrical engineering from Bangalore University,
Bangalore .He is working as an Assistant Professor,
Vemana I. T., Bangalore- 560034. India. He has guided
many Undergraduate students in Power Electronics field.
At present pursing for Ph.D. Degree (Research Scholar)
with Jain University, Bangalore, India. He is the member
of ISTE, IEEE and Branch counselor, IEEE Student
Branch at Vemana I.T. In his credit he has 5 papers published in reputed
International conferences / Journal. (email:reddy3690@gmail.com).

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