Design and Implementation of Three Level
CHB Inverter with Phase Shifted SPWM
using TMS320F24PQ
Mr.Darshan Patel Dr.R.Saravanakumar
Abstract--Multilevel inverter is emerging as a new breed of
power inverter for high power applications, especially in FACTS
controllers. This can develop high voltage with reduce harmonics
through its own circuit topology. The power levels of the inverter
are largely controlled by carrier frequency. For an air cooled
design, the frequency is practically limited to 3 to 5 KHz. It is
proposed to operate two inverters in parallel with phase shifted
carrier due to difficulties in large power handling with a single
inverter. Hence carrier frequency can be doubled and the output
harmonics will be reduced. This paper proposes a phase-shifted
SPWM (PS-SPWM) switching scheme in three level inverter.
This can eliminate the bulky and weighty transformers and
reduce power loss in STATCOM. This paper propose a design
and hardware implementation of three phase three level
cascaded H-bridge inverter with Phase Shifted SPWM. The
simulation is carried out with PSIM.The Simulated results have
been obtained for proposed circuits and THD components of
these modulation techniques have been observed .A Hardware
set up is also developed for the proposed topology by using DSP
TMS320F24PQ based firing circuit. The results and analysis are
discussed in the following subsection.
Index Terms--Cascaded H bridge inverter, Multilevel inverter,
Phase Shifted-Pulse Width Modulation.
I. INTRODUCTION
T he developments in power electronics and semiconductor
technology have lead improvements in operation and
performances of power electronic devices. Hence, different
circuit configurations namely multilevel inverters have
became popular. Considerable interest shown by researcher in
developing new circuit configuration for different application.
The multilevel inverter in one such configuration, collectively
converters the several levels of dc voltage to a desired ac
voltage. Multilevel inverter incorporates various pulse-width
Mr. Darshan Patel, Assistant Professor is with Sankalchand Patel College
of Engineering, Gujarat, India (e-mail: darshu268@gmail.com) .
Dr. R.SaravanaKumar , Associate Professor is with the School of
Electrical Engineering , VIT University ,Vellore , Tamilnadu -632 014 ,India
(e-mail: rsaravanakumar@vit.ac.in ).
Dr. K.K.Ray , Senior Professor , Associate Professor is with the School of
Electrical Engineering , VIT University ,Vellore , Tamilnadu -632 014 ,India
(e-mail: kkray@vit.ac.in ).
Mr.Ramesh .R Manager (R & D), is with the Veeral Control Pvt Ltd,
Gandhinagar-382024, India. (e-mail: ramesh@veeral.com )
Dr.K.K.Ray Mr.Ramesh .R
modulation Strategies. The unique structure of multilevel
inverters allows the output to reach nearer to sinusoidal i.e.
with low harmonics. As the number of voltage levels
increases, the harmonic content of the output voltage
waveform decreases. The increase of voltage levels with low
ratings of individual devices can increase the power rating. To
produce a high-power, high-voltage inverter with multilevel
structure is easy, as the device voltage stresses are
controlled/reduced in the structure. The use of a high-voltage
inverter makes possible for the direct connection to the high-
voltage distribution system, eliminating the distribution
transformers. An inverter can produce a controlled reactive
current and operates as a Static VAR Compensation in steady
state operation. The common applications of multilevel
inverters include Reactive power compensation, Back-to-Back
inter-tie &Variable speed drives etc. The multilevel inverters
(MLI) are classified as Diode clamped MLI, flying capacitor
MLI & cascaded MLI. These topologies of multilevel
inverters are discussed a new cascaded multilevel inverter
topology is proposed. The main objective of this paper is to
design a three phase three level CHB inverter with Phase
Shifted SPWM techniques. The THD components of these
modulation techniques have been observed. PSIM software is
used for simulation and analyze of the proposed technique. In
Hardware, DSP based firing circuit is used to implement the
PS-PWM technique.
II.CASCADED INVERTER STRUCTURE
Multilevel power conversion technology is a very rapidly
growing area of power electronics with good potential for
further development. The most attractive applications of this
technology are in the medium- to high-voltage range (2-13
kV), and include motor drives, power distribution, power
quality and power conditioning applications. There are
different types of multi level circuits involved. The first
topology introduced was the series H-bridge design. This was
followed by the diode clamped converter, which utilized a
bank of series capacitors. A later invention detailed the flying
capacitor design in which the capacitors were floating rather
than series-connected. Another multilevel design involves
parallel connection of inverter through inter-phase reactors. In
this design, the semiconductors block the entire dc voltage,
but share the load current. Several combinational designs have
also emerged. Some involving cascading the fundamental
topologies. These designs can create higher power quality for adjustable amplitude and frequency is used. The gate signals
a given number of semiconductor devices than the are generated by comparing the modulating wave with the
fundamental topologies due to a multiplying effect of the carrier waves.
number of levels.
As the name suggests, the cascaded H-bridge multilevel
inverter uses multiple units of H-bridge power cells connected
in a series chain to produce high ac voltages.

III.SIMULATION OF THREE PHASE THREE LEVEL INVERTER

WITH PHASE SHIFTED SPWM
Three-level inverter needs both a carrier and a reference in
this case the number of triangular wave carriers is equal to m-
1, where m is the number of voltage levels. For a three-phase
three-level inverter this means that two triangular carriers and
one sinusoidal reference are needed. Phase shifting on any two
adjacent carrier waves is given by
Øcr = 360°/(m – 1)
= 360/(3-1)
= 360/2
= 180°
In three-phase three-level inverter 12 power electronic
devices (IGBT) is used for each inverter. One phase of
cascaded H bridge inverter consists of (3 -1) / 2 = 2/2 = 1
identical H Bridges. The structure of the three level H bridge
inverter is shown in Fig.1.

Fig. 2 PSIM simulation diagram of Three Level cascaded H-bridge inverter.

IV.SIMULATION RESULTS
In order to validate proposed inverter system, the
simulation using PSIM is carried out with the main
parameters, modulating frequency=50Hz, carrier frequency
fC=2.1 KHz, Vdc=325V, L=2mH.

Fig: 1 Three Level cascaded H –Bridge Inverter

The PSIM Schematic diagram for simulation of a three

level inverter is shown in fig.2. The DC link voltage is 325V;
the carrier frequency is considered 2.1 KHz. The phase shift
between carrier waves is considered as 180° and due to this
high frequency; IGBTs are used as switching devices. The
modulating signal usually a three-phase sinusoidal wave with
Fig.3 (a) Line to line Voltage waveforms
Fig-3 (a) and (b) shows the Line to Line voltage waveforms
and Fig.4 show the frequency spectrum of the inverter output
voltage. Fig.5. shows the phase current waveforms of the
inverter output
Fig. 3 (b) Line to line Voltage waveforms (VAB )
Fig.4 FFT Output of line to line voltage VAB
Fig. 5 Phase Currents waveforms
V.HARDWARE IMPLEMENTATION
The block diagram of the proposed inverter scheme is show
in Fig.6.The Design of three-level inverter is divided into two
parts. One is hardware design and other is software design.
Hardware design include component-rating selection, control
card and power circuit. Software design includes the Core
algorithms for three-level cascaded H-bridge (CHB) inverter
operations.
Fig.7 shows the hard-ware circuit with separate D.C.
source for each H- bridge inverter along with power circuit.
and control circuit. For the Power circuit, 12 IGBTs of
Infineon make IKW40T120 has been used as a power
switches. The DSP control circuit TMS320F24PQ is used to
generate the phase shifted PWM (PS-PWM).
Fig. 7 Snapshot of three level inverter Power Circuit.
The main heart of the control signal board is DSP
‘TMS320F24PQ’.The block diagram of the control signal
Board is shown in Fig. 8. This card has been used to control
the various operations of three-level inverter.
A programme is written with DSP kit to generate the PWM
signals [7] which is transferred to the GATE driver card
through FRC connector board as shown in Fig.9 for the firing
of the IGBT. The power supply to the DSP ‘TMS320F24PQ’
is provided through SMPS. The programming for the DSP
‘TMS320F24PQ’is done in the Code Composer Studio. The
program is written in the ‘Assembly Language’. The program
is transferred from PC to DSP ‘TMS320F24PQ’from an
‘Emulator’ through a ‘JTAG’.

Fig. 8 Block Diagram of Control circuit

Fig. 9 Snapshot of DSP ‘TMS320F24PQ’Hardware circuit

VI.SOFTWARE IMPLEMENTATION
Software algorithm is the heart of three-level
inverter control algorithm [12]. The time required to execute the
core algorithm should be less than the sampling time set for
the ADC. The Software algorithm is depicted in the flowchart
as shown in fig. 10.
Fig.10 Software algorithm of PWM generation
VI.HARDWARE RESULTS
The Power testing of the three-level inverter has been
carried out and the results shown in Fig.11 -15. Various
quantities and waveforms have been observed and recorded
for the further analysis. The proposed scheme is tested with
300V D.C. along with 0.7 Modulation Index. The 3-level PS-
PWM scheme is used for the PWM signal generation.
 Fig. 11 DSP control card results of PWM gate pulses for
complimentary switches.
Fig. 12 Results of Line to Neutral voltages for Van, Vbn
Fig. 13 Results of Line to Neutral voltages for Vcn
Fig. 14 Line to Line voltages for Vab ,Vbc
Fig. 15 Line to Line voltages for Vca
VII.CONCLUSIONS
From experimental result, it is concluded that Cascaded
H bridge topology can be used for three-level inverter. It has
not problem of DC-link capacitor voltage balancing as it
happens in Neutral Point clamed (NPC) topology. The only
one disadvantage is that for each H Bridge module separate
DC source is needed. From the waveform, it is concluded that,
the Cascaded H Bridge (CHB) topology is the optimum
solution for three level inverter. Three-level inverter can be
used for medium voltage drive, FACTs Controller etc. This
Modulation scheme effectively increases output frequency.
Which helps in reducing power loss of the individual inverter.
When two inverters are operated in parallel for achieving
higher switching power, the open loop PS-PWM scheme
should provide stable operation for three level CHB inverter.
The THD in line voltage is less in three-level inverter in two-
level inverter. The future scope for the above prototype
inverter can be used as STATCOM. Where, with this type of
modulation scheme helps to eliminate the Bulky transformer
used in STATCOM.
VIII. ACKNOWLEDGMENT
The authors wish to thank the management of Vellore
Institute of Technology (VIT) University, Vellore -632 014,
India for encouragement & Management of the Veeral
controls Private Limited-Gandhinagar, Gujarat, for their
support to implement the Hardware.
IX.REFERENCES
[1] Zhou Jing-hua, Zhan Xiong, Su Yan-ming, The development of multi-
module-cascade high-power inverter, Proceedings of the IEEE–IECON
Conference, 2003: 2645
[2] Cascade multilevel inverter with Phase-Shift SPWMand its application
in STATCOM Xianglian Xu, Yunping Zou, Kai Ding, and Fei Liu
Proceedings of the The 30th Annual Conference of the IEEE Industrial
Electronics Society, November 2 - 6,2004, Busan, Korea.
[3] Research on cascaded multilevel inverter and its application in
STATCOM by XU Xiang-lian, ZOU Yun-ping, DING Kai, WANG
Cheng-zhi, JIN Hong-yuan fromFront. Electr. Electron. Eng. China
(2006) 4: 390395.
[4] Fang Zheng-peng, Lai Jih-sheng, McKeever J. W. A multilevel voltage-
source inverter with separate DC sources for static VAr generation,
IEEE Transactions on Industry Applications, 1996, 32(5): 11301138
[5] Liang Yi-qiao, Nwankpa C. O., A new type of STATCOM based on
cascading voltage-source inverters with phase-shifted unipolar SPWM,
IEEE Transactions on Industry Application,1999, 35(5): 11181123
[6] “High-Power Converters and AC Drives” Authored by Bin wu in IEEE
Press publication.

X. BIOGRAPHIES

Darshan Patel received his Bachelor of

Engineering from Charotar Institute of
Technology-Chnaga, Gujarat & M.Tech.in
Power Electronics and Drives from VIT
University, Vellore,Tamilnadu, India in 2010.
Now he is with the Sankalchand Patel
College of Engineering, Visnagar, Gujarat,
India.His present research interests are
Multilevel Converters, Control system &
Fuzzy logic and neural networks.

Dr. R.SaravanaKumar received his B.E.

Degree in Electrical and Electronics
Engineering from Thiyagarajar College of
Engineering, Madurai,Tamilnadu India in
1996.He obtained M.E., in Power Electronics
and Drives from College of Engineering
Guindy, Tamilnadu, India in 1998. He received
his PhD degree from the VIT University
Vellore, Tamilnadu, India in 2010. Since 1999,
He is with the Vellore Institute of Technology
(VIT) University Tamilnadu, India working in
the School of Electrical Science. Presently he is working as an
Associate Professor in the School of Electrical Engineering at the
VIT University, Vellore. His present research interests are
Condition Monitoring of Industrial Drives, Real Time control of
Electrical systems using LabVIEW & Matlab /dSPACE, Modeling
and simulation of Electrical system, Multilevel Inverter, Matrix
converter, Special machines, Application of Soft computing
Technique, Power Quality.

Dr. K.K.Ray received his B.E. Degree in

Electrical Engineering from Jabalpur
University, Calcutta India in 1967.He
obtained M.Tech from Indian Institute of
Technology Kanpur, Kanpur ,India ,in 1977.
From 1967 to 2002, Dr Ray was with the
Indian School of Mines University, Dhanbad
(Jharkhand), India working in the
Department of Engineering and Mining. He
received his PhD degree from the Indian
Institute of Technology Delhi, New Delhi, India in 1991. Since
2003 he is with the School of Electrical Engineering, VIT
University, Vellore, and Tamilnadu, India. His present research
interests are Power Electronics and Drives, Instrumentation and
machines, Reactive Power Compensation, Switchgear Protection.

Mr.Ramesh R received his bachlor degree in Electrical engineering

from Birla Visvkarma Mahavidhyalay,Vallabhvidhya nagarhe has been
working with R & D department of Veeral controls Private Limited.he
has experience of 15 years in R & D for Power Elecronics ,AC & DC
Drives,STATCOM,High Voltage Power Supplys.