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Birla Institute of Technology & Science, Pilani

Work Integrated Learning Programmes Division


Digital Electronics and Microprocessors

Sample Questions Midsem 2020

Section A 6 X 1 = 6 Marks

1 What is the equivalent BCD code for the decimal number 8723.

2 Write the canonical SOP expression for the following function


F = пM(0,3,5,7,8,9). пD(1,6,11,14).

3. How many unique timing signals can be generated from a 5 bit Johnson counter.

4. A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is ________

5. The propagation delay for a 1 bit full adder is 20 ns. What is the min delay encountered
in a 5 bit ripple carry adder .

6. How many 1 bit full adders are required to construct a 5bit serial full adder.

Section B 6 X 2= 12 Marks.

7. The contents of the 4 bit register are initially 1011. The register is shifted six times to the
right with the serial input being 101111 with lsb shifted in first. List the contents in the
register after each shift .

8. Implement a 2 input Nor Gate using 1:2 decoder.

9. Perform the following operations , and indicate whether overflow or an underflow


occurs if any using 10 bit binary for the following signed numbers
a) -266 + 502 , b) -300 – 408 (subtraction of 408 from -300)

10. Realize a JK FF from a T FF .

11. A bank vault has 3 locks with a different key for each lock. Each key is owned by
different person. In order to open the door , at least two people must insert their
keys into the assigned locks. The signal lines A, B, C are 1 if the right key is inserted
into locks1,2,3 respectively. Write an equation for the variable Z which is 1 if the door
should open.
12. Find the minimum POS expression for the following function
F= пM(0,2,4,6,8). пD(1,9,12,15)

Section C 3 X 4 = 12 Marks.

13. A digital system has a clock generator that produces pulses at a frequency of 80 Mhz.
Design a circuit that provides a clock with a cycle time of 50ns.

14. The sequential circuit has 2 JK FF A and B , two inputs x and y and one output z.
The flip flop input equations and circuit output equations are
Ja= Bx + B’y’ Jb= A’x Ka= B’xy’ Kb=A+xy’ z= Ax’y’ + Bx’y’
a) draw the logic diagram of the circuit.
b) realize the state equations for A and B.
c) tabulate the state table

15. Convert a 4 bit Gray code into an equivalent 4 bit Binary code, and realize the
minimum sop form for each output variable.

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