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5 4 3 2 1

TERESA20 Main BD. R2.0 BLOCK DIAGRAM


BATTERY CLOCK GEN.
1 TYPE ICS9LPR363CGLF-T
3 X 2 PAGE 5

D D

Merom CPU FAN + Thermal sensor


PAGE 4

478B uFCPGA
PAGE 2,3 DISCHARGER CIRCUIT
PAGE 37
FSB 800 MHz
LVDS
Power On Sequence
PAGE 12
PAGE 40

CRT CRESTLINE DDRII


DDR2 667MHz DC/BATT IN
PAGE 13
965GM SO-DIMM X 2 PAGE 41
PAGE 14,15,16
1299 FCBGA
CPU VCORE
PAGE 6,7,8,9,10,11
C C

DMI *4 MiniCard PAGE 80

WLAN Conn. SYSTEM PWR


PCIE *4 PAGE 26
SPEAK Azalia PAGE 81
MDC
PAGE 22
PAGE 35 ICH8-M New Card
AUDIO AMP
Conn
PAGE 25

ALC660 POWER
G1420
PCI*2
PAGE 22 PAGE 21 LPC 10/100 LAN
RTL8100CL VCORE
652 BGA PAGE 80
PAGE 34,35

Head EXT PAGE 17,18,19,20


SYSTEM
MIC PAGE 81
Phone Card
B PAGE 22 PAGE 22 CardBus Reader IO_1.5VS_1.05VS B

RICOH R5C847 PAGE 33 PAGE 82


PAGE 43, 44
SATA Bus

IO_DDR_VTT
IDE Bus

PAGE 83
CardBus
T/P IO_1.25VS
PAGE 44 PAGE 84
USB2.0 Bus USB X3
PAGE 30 SHUTDOWN
PAGE 87
KB EC PAGE 36
PAGE 29 CHARGER
INSTANT KEY
ITE8511 PAGE 88

PAGE 38 SATA DETECT


PAGE 90
LED Control HDD
PAGE 30,38
PAGE 28 LOAD SWITCH
PAGE 91
PAGE 29,30
A A
ODD
PROTECT
ISA ROM Slave PAGE 92
<Variant Name>

PAGE 24 PAGE 28 Title : BLOCK DIAGRAM


ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 1 of 66
5 4 3 2 1
5 4 3 2 1

H_D#[63:0]
6 H_D#[63:0]

H_A#[35:3]
6 H_A#[35:3]
D D
H_REQ#[4:0]
6 H_REQ#[4:0]

1 T0218 TPC26T
1 T0219 TPC26T

U0201A U0201B
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 6 D[0]# D[32]#

ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 6 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 6 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#

DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 6 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 6 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 6 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 F1 H_BR0# 6 K24 Y25

DATA GRP 2
H_A#12 A[11]# BR0# H_D#9 D[8]# D[40]# H_D#41
P2 G24 W22
A[12]# D[9]# D[41]#

CONTROL
H_A#13 L2 D20 H_IERR# R0209 56Ohm +VCCP_CPU H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 B3 H_INIT# 17 J23 W24
H_A#15 A[14]# INIT# H_D#12 D[11]# D[43]# H_D#44
P1 H22 W25
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 H4 H_LOCK# 6 F26 AA23
A[16]# LOCK# H_D#14 D[13]# D[45]# H_D#46
6 H_ADSTB#0 M1 K22 AA24
ADSTB[0]# H_D#15 D[14]# D[46]# H_D#47
C1 H_CPURST# 6 H23 AB25
H_REQ#0 RESET# D[15]# D[47]#
K3 F3 H_RS#0 6 6 H_DSTBN#0 J26 Y26 H_DSTBN#2 6
H_REQ#1 REQ[0]# RS[0]# DSTBN[0]# DSTBN[2]#
H2 F4 H_RS#1 6 6 H_DSTBP#0 H26 AA26 H_DSTBP#2 6
H_REQ#2 REQ[1]# RS[1]# DSTBP[0]# DSTBP[2]#
K2 G3 H_RS#2 6 6 H_DINV#0 H25 U22 H_DINV#2 6
H_REQ#3 REQ[2]# RS[2]# DINV[0]# DINV[2]#
J3 G2 H_TRDY# 6
H_REQ#4 REQ[3]# TRDY#
C L1 C
REQ[4]# H_D#16 H_D#48
G6 H_HIT# 6 N22 AE24
H_A#17 HIT# H_D#17 D[16]# D[48]# H_D#49
Y2 E4 H_HITM# 6 K25 AD24
H_A#18 A[17]# HITM# H_D#18 D[17]# D[49]# H_D#50
U5 P26 AA21
H_A#19 A[18]# T0222 TPC26T H_D#19 D[18]# D[50]# H_D#51
R3 AD4 1 R23 AB22
A[19]# BPM[0]# D[19]# D[51]#
ADDR GROUP 1

H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L23 AB21 H_D#52


A[20]# BPM[1]# D[20]# D[52]#

DATA GRP 1
H_A#21 U4 AD1 1 T0223 TPC26T H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# D[21]# D[53]#
XDP/ITP SIGNALS

H_A#22 Y5 AC4 1 T0224 TPC26T H_D#22 L22 AD20 H_D#54


H_A#23 A[22]# BPM[3]# T0225 TPC26T H_D#23 D[22]# D[54]# H_D#55
U1 AC2 1 M23 AE22
H_A#24 A[23]# PRDY# H_PREQ# H_D#24 D[23]# D[55]# H_D#56
R4 AC1 P25 AF23
H_A#25 A[24]# PREQ# H_TCK T0233 TPC26T H_D#25 D[24]# D[56]# H_D#57
T5 AC5 1 P23 AC25
H_A#26 A[25]# TCK H_TDI T0232 TPC26T +VCCP_CPU H_D#26 D[25]# D[57]# H_D#58 Comp0,2 connect with Zo=27.4 ohm,
T3 AA6 1 P22 AE21

DATA GRP 3
H_A#27 A[26]# TDI H_TDO T0231 TPC26T H_D#27 D[26]# D[58]# H_D#59 make trace length shorter than 0.5".
W2 AB3 1 T24 AD21
H_A#28 A[27]# TDO H_TMS T0230 TPC26T H_D#28 D[27]# D[59]# H_D#60
W5 AB5 1 R24 AC22 Comp 1,3 connect with Z0=55 ohm,
H_A#29 A[28]# TMS H_TRST# T0229 TPC26T H_D#29 D[28]# D[60]# H_D#61
Y4 AB6 1 L25 AD23 make trace length shorter than 0.5".
A[29]# TRST# D[29]# D[61]#

2
H_A#30 U2 C20 CPU_DBR# H_D#30 T25 AF22 H_D#62
H_A#31 A[30]# DBR# R0215 H_D#31 D[30]# D[62]# H_D#63
V4 N25 AC23
H_A#32 A[31]# 1KOhm D[31]# D[63]#
W3 6 H_DSTBN#1 L26 AE25 H_DSTBN#3 6
H_A#33 A[32]# 1% DSTBN[1]# DSTBN[3]#
AA4
A[33]#
THERMAL 6 H_DSTBP#1 M26
DSTBP[1]# DSTBP[3]#
AF24 H_DSTBP#3 6
H_A#34 AB2 N24 AC20
6 H_DINV#1 H_DINV#3 6

1
H_A#35 A[34]# H_PROCHOT_S# DINV[1]# DINV[3]#
AA3 D21
A[35]# PROCHOT# GTL_REF H_COMP0 R0211 27.4Ohm 1%
6 H_ADSTB#1 V1 A24 CPU_THRM_DA 4 AD26 R26 1 2
T0220 ADSTB[1]# THRMDA R0217 2 @ 1% 1 1KOhm test1 GTLREF COMP[0] H_COMP1 R0212 54.9Ohm 1%
1
THRMDC
B25 CPU_THRM_DC 4 C23
TEST1 MISC COMP[1]
U26 1 2

2
TPC26T A6 R0218 2 @ 1% 1 1KOhm test2 D25 AA1 H_COMP2 R0213 1 2 27.4Ohm 1%
17 H_A20M# A20M# TEST2 COMP[2]
1
ICH

A5 C7 C0201 R0216 TPC26T T0228 1 C24 Y1 H_COMP3 R0214 1 2 54.9Ohm 1%


17 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 4,17 TEST3 COMP[3]
C4 0.1UF/10V 2KOhm TPC26T T0205 1 AF26
17 H_IGNNE# IGNNE# TEST4
T0221 1 X7R 1% TPC26T T0206 1 AF1 E5 H_DPRSTP# 7,17,50
2

T0226 TPC26T TPC26T T0238 TEST5 DPRSTP# GND


17 H_STPCLK# TPC26T D5 1 1 A26 B5 H_DPSLP# 17

1
STPCLK# TEST6 DPSLP#
17 H_INTR C6
LINT0
H CLK DPWR#
D24 H_DPWR# 6
17 H_NMI B4 A22 CLK_CPU_BCLK 5 5 CPU_BSEL0 B22 D6 H_PWRGD 17
B LINT1 BCLK[0] GND GND GND BSEL[0] PWRGOOD B
17 H_SMI# A3 A21 CLK_CPU_BCLK# 5 5 CPU_BSEL1 B23 D7 H_CPUSLP# 6
SMI# BCLK[1] BSEL[1] SLP#
5 CPU_BSEL2 C21 AE6 PM_PSI# 50
TPC26T T0208 BSEL[2] PSI#
1 M4
TPC26T T0209 RSVD1 T0227 TPC26T Zo=55 ohm, 0.5" max SOCKET478B
1 N5 1
TPC26T T0210 RSVD2 for GTLREF TPC26T T0239 test1
1 T2 1
TPC26T T0211 RSVD3 TPC26T T0240 test2
1 V3 1
RSVD4
RESERVED

TPC26T T0212 1 B2 H_COMP0 1 T0234 TPC26T


TPC26T T0213 RSVD5 H_COMP1 T0235 TPC26T
1 C3
RSVD6 07/03/26 Add test point T0228 on TEST3---Feng 1
TPC26T T0214 1 D2 H_COMP2 1 T0236 TPC26T
TPC26T T0215 RSVD7 H_COMP3 T0237 TPC26T
1 D22 1
TPC26T T0216 RSVD8
1 D3
TPC26T T0217 RSVD9
1 F6 Default Strapping When Not Used
RSVD10
+VCCP_CPU
+VCCP_CPU
SOCKET478B
XDP_BPM#1 R0201 1 @ 2 54.9Ohm 1%
H_PREQ# R0202 1 2 54.9Ohm 1% R0210
H_TDI R0203 1 2 150Ohm 1% 68Ohm
H_TDO R0204 1 @ 2 54.9Ohm 1%

H_TMS R0205 1 2 39Ohm 5%


29 H_PROCHOT_S#
CPU_DBR# R0206 1 @ 2 1KOhm 1%
+3VS
H_TCK R0207 1 2 27.4Ohm 1%
H_TRST# R0208 1 2 649Ohm 1%

A GND A

<Variant Name>

Title : MEROM CPU (1)


ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 2 of 66

2 1
5 4 3 2 1

Decoupling guide from INTEL Schematic Decoupling guide from INTEL


Design Checklist Rev 1.6 Layout Checklist Rev 2.0

VCORE 22uF/10V * 32pcs VCCP 0.1uF * 6pcs


330uF/2V * 6pcs 220uF * 1pcs

D D

+VCORE +VCORE U0201D


+VCORE A4
VSS1 VSS82
P6
U0201C A8 P21
(CPU core power) VSS2 VSS83
A7 AB20 A11 P24
VCC1 VCC68 Max: 44000mA VSS3 VSS84
A9 AB7 A14 R2
VCC2 VCC69 VSS4 VSS85
A10 AC7 A16 R5
VCC3 VCC70 VSS5 VSS86
A12 AC9 A19 R22
VCC4 VCC71 VSS6 VSS87
A13 AC12 A23 R25
VCC5 VCC72 VSS7 VSS88
A15 AC13 AF2 T1
VCC6 VCC73 VSS8 VSS89 +VCCP +VCCP_CPU
A17 AC15 B6 T4
VCC7 VCC74 VSS9 VSS90
A18 AC17 B8 T23
VCC8 VCC75 VSS10 VSS91 JP0301
A20 AC18 B11 T26
VCC9 VCC76 VSS11 VSS92
B7 AD7 B13 U3 1 2
VCC10 VCC77 VSS12 VSS93
B9 AD9 B16 U6
VCC11 VCC78 VSS13 VSS94 SHORT_PIN
B10 AD10 B19 U21
VCC12 VCC79 VSS14 VSS95

1
B12 AD12 B21 U24 @ C0323 C0324 C0325 C0326 C0327 C0328 +
VCC13 VCC80 VSS15 VSS96 c0402 c0402 c0402 c0402 c0402 c0402 CE0302
B14 AD14 B24 V2
VCC14 VCC81 VSS16 VSS97 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 100UF/2.5V
B15 AD15 C5 V5

2
VCC15 VCC82 VSS17 VSS98
B17 AD17 C8 V22

2
VCC16 VCC83 VSS18 VSS99
B18 AD18 C11 V25 Place at CPU side
VCC17 VCC84 VSS19 VSS100
B20 AE9 C14 W1
VCC18 VCC85 VSS20 VSS101 +VCORE of FSB Plane fill.
C9 AE10 C16 W4 Place inside the cpu center cavity in 2 rows.
VCC19 VCC86 VSS21 VSS102
C10 AE12 C19 W23
VCC20 VCC87 VSS22 VSS103 GND
C12 AE13 C2 W26
VCC21 VCC88 VSS23 VSS104
C13 AE15 C22 Y3
VCC22 VCC89 VSS24 VSS105
C15 AE17 C25 Y6
VCC23 VCC90 VSS25 VSS106
C17
VCC24 VCC91
AE18 D1
VSS26 VSS107
Y21 1215---PWR comp

1
C C18
VCC25 VCC92
AE20 D4
VSS27 VSS108
Y24 + Place the cap on North C
D9 AF9 D8 AA2 CE0301
VCC26 VCC93 VSS28 VSS109 of Secondary side
D10 AF10 D11 AA5 220UF/4V
VCC27 VCC94 VSS29 VSS110
D12 AF12 D13 AA8 @

2
VCC28 VCC95 VSS30 VSS111
D14 AF14 D16 AA11
VCC29 VCC96 VSS31 VSS112
D15
VCC30 VCC97
AF15 +VCCP_CPU D19
VSS32 VSS113
AA14
D17 AF17 D23 AA16 GND
VCC31 VCC98 (CPU AGTL+ power) VSS33 VSS114
D18 AF18 D26 AA19
VCC32 VCC99 Max: 2500mA VSS34 VSS115
E7 AF20 E3 AA22
VCC33 VCC100 VSS35 VSS116
E9 E6 AA25
VCC34 VSS36 VSS117
E10
VCC35 VCCP1
G21 +VCCP_CPU E8
VSS37 VSS118
AB1 Place these upper side inside socket cavity on top
E12 V6 E11 AB4
VCC36 VCCP2 VSS38 VSS119
E13 J6 E14 AB8
VCC37 VCCP3 VSS39 VSS120
E15
VCC38 VCCP4
K6 +VCCA_CPU E16
VSS40 VSS121
AB11

1
E17 M6 E19 AB13 C0302 C0303 C0304 C0305 C0306 C0307
VCC39 VCCP5 (CPU PLL power) VSS41 VSS122
E18 J21 E21 AB16
VCC40 VCCP6 Max: 130mA VSS42 VSS123 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V
E20 K21 E24 AB19

2
VCC41 VCCP7 +1.5VS VSS43 VSS124
F7 M21 F5 AB23
VCC42 VCCP8 VSS44 VSS125
F9 N21 F8 AB26
VCC43 VCCP9 VSS45 VSS126
F10 N6 F11 AC3 GND GND GND GND GND GND
VCC44 VCCP10 +VCCA_CPU R0301 VSS46 VSS127
F12 R21 1 2 0Ohm F13 AC6
VCC45 VCCP11 r0603_h24 VSS47 VSS128
F14
VCC46 VCCP12
R6 F16
VSS48 VSS129
AC8 Place these lower side inside socket cavity on top
2

F15 T21 C7009 C7010 F19 AC11


VCC47 VCCP13 10UF/6.3V VSS49 VSS130
F17 T6 F2 AC14
VCC48 VCCP14 0.1UF/16V X5R VSS50 VSS131
F18 V21 F22 AC16
1

VCC49 VCCP15 VSS51 VSS132

1
F20 W21 F25 AC19 C0309 C0311 C0308 C0310 C0312 C0313
VCC50 VCCP16 VSS52 VSS133
AA7 G4 AC21
VCC51 VSS53 VSS134 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V
AA9 B26 G1 AC24

2
VCC52 VCCA1 GND GND VSS54 VSS135
AA10 C26 G23 AD2
VCC53 VCCA2 M1102 VSS55 VSS136
AA12 G26 AD5
B VCC54 H_VID0 RNX0301B VSS56 VSS137 B
AA13 AD6 3 0Ohm 4 VR_VID0 50 H3 AD8 GND GND GND GND GND GND
VCC55 VID[0] H_VID1 RNX0302C VSS57 VSS138
AA15 AF5 5 0Ohm 6 VR_VID1 50 H6 AD11
VCC56 VID[1] H_VID2 RNX0302B VSS58 VSS139
AA17 AE5 3 0Ohm 4 VR_VID2 50 H21 AD13
VCC57 VID[2] H_VID3 RNX0302A VSS59 VSS140
AA18
VCC58 VID[3]
AF4 1 0Ohm 2 VR_VID3 50 H24
VSS60 VSS141
AD16 Place these upper side inside socket cavity on bottom
AA20 AE3 H_VID4 1 2 RNX0301A J2 AD19
VCC59 VID[4] 0Ohm VR_VID4 50 VSS61 VSS142
AB9 AF3 H_VID5 7 8 RNX0301D J5 AD22
VCC60 VID[5] 0Ohm VR_VID5 50 VSS62 VSS143
AC10 AE2 H_VID6 5 6 RNX0301C J22 AD25
VCC61 VID[6] 0Ohm VR_VID6 50 VSS63 VSS144

1
AB10 7 0Ohm 8 RNX0302D J25 AE1 C0314 C0315 C0316 C0317
VCC62 VSS64 VSS145
AB12 K1 AE4
VCC63 R0302 VSS65 VSS146
AB14 AF7 1 2 100Ohm 1% +VCORE K4 AE8 10UF/10V 10UF/10V 10UF/10V 10UF/10V

2
VCC64 VCCSENSE YAGEO/RC0402FR-07100RL <G> VSS66 VSS147
AB15 K23 AE11
VCC65 VSS67 VSS148
AB17 VCCSENSE 50 K26 AE14
VCC66 VSS68 VSS149
AB18 AE7 VSSSENSE 50 L3 AE16 GND GND GND GND
VCC67 VSSSENSE VSS69 VSS150
L6 AE19
VSS70 VSS151
1

SOCKET478B L21 AE23 Place these lower side inside socket cavity on bottom
VSS71 VSS152
L24 AE26
R0303 VSS72 VSS153
VCCSENSE, VSSSENSE trace at 27.4 M2
VSS73 VSS154
A2
100Ohm M5 AF6
ohm with 50 mils spacing. Place PU VSS74 VSS155

1
YAGEO/RC0402FR-07100RL <G> M22 AF8 C0319 C0320 C0321 C0322
2

1% and PD within 1" of CPU. VSS75 VSS156


M25 AF11
VSS76 VSS157 10UF/10V 10UF/10V 10UF/10V 10UF/10V
N1 AF13

2
VSS77 VSS158
N4 AF16
GND VSS78 VSS159
N23 AF19
VSS79 VSS160
N26 AF21 GND GND GND GND
VSS80 VSS161
P3 A25
H_VID0 T0301 TPC26T VSS81 VSS162
1 AF25
H_VID1 T0302 TPC26T VSS163
1
H_VID2 1 T0303 TPC26T SOCKET478B
H_VID3 1 T0304 TPC26T GND
A H_VID4 1 T0305 TPC26T GND A
H_VID5 1 T0306 TPC26T
H_VID6 1 T0307 TPC26T

<Variant Name>
07/05/04 To add test point on VID[0:6] signals. --- iverson

Title : MEROM CPU (2)


ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 3 of 66
2 1
5 4 3 2 1

Fan Speed Control +5VS


+3VS
+3VA
+5VS
+3VS
+3VA
13,19,20,21,22,28,29,30,34,37,38,50,61
2,5,7,10,11,12,13,14,15,19,20,21,22,25,26,27,28,29,30,33,37,43,50,61,62
12,19,29,37,38,41,51,63

+5VS

07/04/06 Remove the CE0401


and D0401 --- Iverson
D D
KBC will issue a +3VS
analog ( a voltage

1
C0408 C0402
level ) signal. 0.1UF/10V
10UF/10V

2
2
SW: FAN_DA1 must R0402
be low during S3 10KOhm

GND GND

1
WtoB_CON_4P
6
NC2
4
FAN_PWM 4
29 FAN_PWM 3
3
2
2
1

1
+3VS C0403 1
5
100PF/50V NC1
@ CON0401

2
2
R0403 GND
10KOhm
GND

1
GND
FAN0_TACH
29 FAN0_TACH
C C

1
C0401

2
2200PF/50V

GND

T0403
Do Not Stuff

THERMAL PROTECTION
1

+3VA
PLACE UNDER CPU
2

R0411
14.7KOhm
(85 DEGREE C) +3VA
1

1
07/04/06 105 -> 85, R411 need to be tuned
maybe R411=14.7K Ohm(10G213147213010) --- Iverson R0405
+3VS 10KOhm
r0402
@

2
1
VSUS_ON
VSUS_ON 25,29,51,63
1

R0412 R0413 R0414 R0415 1


R0416 07/05/16 Don't stuff R0415, but stuff R0416 ---Feng R0406

3
T0402 1MOhm 3
1

1
B D B
Do Not Stuff @ @ @ Q0401
2

2N7002

2
100KOhm 100KOhm 100KOhm 100KOhm 100KOhm VSUS_ON_G 11
1

C0407 G

1
2 1 Q0402 3 C0404 2 S

2
R0407 C 0.22UF/6.3V
0.01UF/50V 1 2 TRIP_R 1 B
2,17 PM_THRMTRIP#

2
U0402 330Ohm E GND
1 5 GND
@ 1 R0417 2 PMBS3904 2 GND
NC VCC 7 GMCH_THRMTRIP#
2 0Ohm
SUB
3 4 FORCE_OFF# 29,38,41,51,62
GND VOUT GND
PST9013NR
1

+3VS +3VS_THM
Route H_THERMDA and H_THERMDC
on the same layer GND Do Not Stuff R0408 Standby Mode: 3uA(Max. 10uA)
T0401 1 2 +3VS_THM Full Active: 0.5 mA(Max. 1mA)
1

0Ohm C0405
------------------OTHER SIGNALS r0402 0.1UF/10V
12 mils c0402
2

+3VS_THM
===============GND
10 mils
=========H_THERMDA(10 mils) U0401 4"-8" CPU_THRM_DA 2
10 mils 29 SMB1_CLK
SMB1_CLK 8 1

1
SMB1_DAT SCLK VDD CPU_THRM_DA C0406
A 29 SMB1_DAT 7 2 A
=========H_THERMDC(10 mils) SMBALERT# 6
SDATA D+
3 CPU_THRM_DC 2200PF/50V
ALERT# D-
10 mils 5 4

2
GND THERM#
+3VS 1 2 CPU_THRM_DC 2
1

=========GND G781P8F 4"-8" <Variant Name>


R0410 06G023048021 R0418
12 mils 4.7KOhm GND 10KOhm
1 1
---------------------OTHER SIGNALS Title : THER-SENSOR,FAN
G
2 S

2 3 3 EC_RST_SW# 29,38,41,51,62
2

D
ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Avoid BPSB,Power
Q0404 2N7002 Size Project Name Rev
@ Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 4 of 66
3 2 1
5 4 3 2 1

+3VS_VDDPCI L0502
120Ohm/100Mhz
1 2 +3VS

1
C0511 C0512 C0516 C0513
L0501 0.1UF/10V 0.1UF/10V 10uF/10V 0.1UF/10V

2
120Ohm/100Mhz

7
1 2 +3VS_CLK U0501
+3VS
GND GND GND R0501 GND

VDDPCI1

VDDPCI2
1

1
0Ohm
C0514 C0503 C0504 C0505 21 11 +3VS_VDD48
VDDPCIEX1 VDD48 +3VS_VDDPCI
0.1UF/10V 10uF/10V0.1UF/10V 0.1UF/10V 28
2

1
42 VDDPCIEX2 56 +3VS_VDDREF
VDDPCIEX3 VDDREF C0501 C0502 R0502
D GND GND GND GND T0501 1 34 63 0.1UF/10V D
10uF/10V

2
PWRSAVE#* PCI/PCIEX_STOP# STP_PCI# 19 0Ohm
TPC26T
R0503 50 62
VDDCPU CPU_STOP# STP_CPU# 19
0Ohm GND GND 0 = Enable control PCIEX4/2

1
+3VS_VDDA 45 PEREQ#3
+3VS VDDA through I2C
49 CLK_CPU RX0508 1 2 33Ohm C0506
CPUT_L1F CLK_CPU_BCLK 2
46 10uF/10V 1 = Disable PCIEX4/2 Controlled

2
GND GNDA
1

1 C0510 48 CLK_CPU# RX0509 1 2 33Ohm CLK_CPU_BCLK# 2


C0515 C0507 C0508 CK505_X1 CPUC_L1F
GND 1 2 58 0 = Enable control PCIEX7/5/3
0.1UF/10V X1
10uF/10V0.1UF/10V GND PEREQ#4
2

52 CLK_MCH RX0505 1 2 33Ohm through I2C

2
27PF/50V CPUT_L0 CLK_MCH_BCLK 6
X0501 1 = Disable PCIEX7/5/3 Controlled
GND GND GND 14.318Mhz 51 CLK_MCH# RX0506 1 2 33Ohm
CPUC_L0 CLK_MCH_BCLK# 6
C0509

1
1 2 CK505_X2 57
GND X2
+/-30ppm/20PF 44
CPUITPT_L2/PCIeT_L8
07/05/15 To change the C0510/C0511 27PF/50V
from 33pF into 27pF. --- Iverson 43
CPUITPC_L2/PCIeC_L8 R0559 2 1 10KOhm +3VS
RX0528 2 1 33Ohm LCD_SSCG 17 41 PEREQ#1 R0561 1 2 0Ohm @
7 CLK_LCD_SSCG 27FIX/LCD_SSCGT/PCIeT_L0 PEREQ1#/PCIeT_L7 CLK_NEWCARD_REQ# 25
C0517 1 @ 210PF/50V 40 PEREQ#2 2 R0562 1 10KOhm
GND PEREQ2#/PCIeC_L7 GND

39 CLK_PCIE5 RX0523 1 2 33Ohm


PCIeT_L6 CLK_PCIE_NEWCARD 25
RX0537 2 1 33Ohm LCD_SSCG# 18
7 CLK_LCD_SSCG# 27SS/LCD_SSCGC/PCIeC_L0
38 CLK_PCIE5# RX0525 1 2 33Ohm
Latched Input Select
PCIeC_L6 CLK_PCIE_NEWCARD# 25
C0518 1 @ 2 10PF/50V GND
36
PCIeT_L5
C FSLA RX0501 1 2 2.2KOhm USB48 12 35 0 = SRC CLK
Decide pin 0 = LCDCLK C
FSLA/USB_48MHz PCIeC_L5 Decide pin
43.44
19 CLK_USB48
RX504 2 33Ohm 1
30 CLK_PCIE4 RX0516 1 2 33Ohm
1 = CPU_ITP CLK 1 = PCIEX 17.18
PCIeT_L4 CLK_MCH_3GPLL 7
07/03/28 Change the C0519 1 2 10PF/50V REQ_SEL SELPCIE0_LCD#
GND
RX504 from 15 Ohm to 31 CLK_PCIE4# RX0518 1 2 33Ohm 33PCIF0 2 1 33PCI3 1 2
PCIeC_L4 CLK_MCH_3GPLL# 7
M1228 FSLB 16 R0535 10KOhm R0518 10KOhm
33 Ohm---Feng FSLB/TEST_MODE
24 CLK_PCIE3 RX0526 1 2 33Ohm GND GND
PCIeT_L3 CLK_PCIE_MINICARD 26
25 CLK_PCIE3# RX0527 1 2 33Ohm
PCIeC_L3 CLK_PCIE_MINICARD# 26
M1227
RX0507 2 1 33Ohm 33PCI3 5 SELLCD_27# =0,
34 CLK_LAN_PCI *SELPCIEX0_LCD#PCICLK3
22 CLK_PCIE2 RX0529 1 2 33Ohm 0 = PCIECLK
Decide pin
PCIeT_L2 CLK_PCIE_ICH 18 Decide pin pin#14/15=PCIEX_9L;
C0520 1 2 10PF/50V GND
pin#17/18=27FIX/27SS,
17.18
PCIeC_L2
23 CLK_PCIE2# RX0530 1 2 33Ohm CLK_PCIE_ICH# 18 1 = PEREQ# 40.41
2 1 +3VS
43 CLK_CBPCI
RX0532 2 1 33Ohm 33PCI2 4 19 R0529 10KOhm SELLCD_27# =1 ,
PCICLK2 PCIeT_L1
07/04/10 To add the R0529 10K Ohm --- Iverson pin#14/15=DOT_96MHzL;
C0521 1 2 10PF/50V 20 REQ_SEL
GND PCIeC_L1 pin#17/18=LCD_SSCG/PCIe_L0.
33PCI0 2 1
R0527 @ 10KOhm
26 CLK_SATA RX0536 1 2 33Ohm INS80914434 2 1
SATACLKT_L CLK_PCIE_SATA 17 +3VS
RX0502 2 1 33Ohm 33PCI1 3 R0537 10KOhm
26 CLK_FWHPCI PCICLK1
27 CLK_SATA# RX0539 1 2 33Ohm GND
SATACLKC_L CLK_PCIE_SATA# 17
C0522 1 2 10PF/50V 33PCIF1 2 1
GND
R0536 @ 10KOhm
14 CLK_PCIE9 RX0541 1 2 33Ohm
PCIeT_L9/DOTT_96MHzL CLK_UMA_96M 7
RX0511 2 1 33Ohm 33PCI0 64 15 CLK_PCIE9# RX0543 1 2 33Ohm GND
29 CLK_ECPCI PCICLK0/REQ_SEL** PCIeC_L9/DOTC_96MHzL CLK_UMA_96M# 7
B C0523 1 @ 2 10PF/50V B
GND

Reserved for R1.0 Debug M1215


32 PEREQ#3 RX0544 1 2 0Ohm
*PEREQ3# MCH_CLK_REQ# 7
33PCIF1 9 07/04/10 To add the R0537 10K Ohm --- Iverson
*SELLCD_27#/PCICLK_F5 PEREQ#4 RX0545 2 0Ohm
33 1 CLK_MINICARD_REQ# 26
PEREQ4#*
R0563 2 1 10KOhm +3VS
10 CLK_PWRGD 19
VttPWR_GD/PD# +VCCP
07/04/10 To add the R0563 10K Ohm --- Iverson
RX0517 2 1 33Ohm 33PCIF0 8
18 CLK_ICHPCI ITP_EN/PCICLK_F4
1

C0525 54
14,15,19,26 SMB_CLK_S SCLK

1
10PF/50V 61 REF1 RX0531 1 2 10KOhm FSLC
REF1/FSLC/TEST_SEL REF0 RX0515
14,15,19,26 SMB_DAT_S 55 60 1 2 33Ohm CLK_ICH14 19
R0516 R0517 R0532
2

+3VS SDATA REF0 @ 1KOhm @ 1KOhm @ 1KOhm


ICS_VREF 47
GND VREF

2
2

C0526 RX0519 1 2 0Ohm FSLA RX0520 1 2 1KOhm


2 CPU_BSEL0 MCH_BSEL0 7
R0505 5PF/50V RX0521 1 2 0Ohm FSLB RX0522 1 2 1KOhm
2 CPU_BSEL1 MCH_BSEL1 7
1KOhm RX0597 1 2 0Ohm FSLC RX0524 1 2 1KOhm
2

2 CPU_BSEL2 MCH_BSEL2 7

1
2
1

GND1 R0525 R526 R528


6
GND2 GND
13 0Ohm 0Ohm 0Ohm
2

GND3 @ @ @
07/06/30 R0505 change to RES 1K 29
GND4
R0514 37 FSB C FSB B FSB A
OHM 1/16W (0402) 1%. ---IVERSON

2
GND7
300Ohm 53
GND6 07/06/28 To add the C0526 5pF on BCLK FSB (BSEL2) (BSEL1) (BSEL0)
59 CLK_ICH14 signal.---iverson 07/04/06 Change the R0525 from
GND5 GND GND GND
1K Ohm to 0 Ohm.---Iverson CPU Driven / / /
1

ICS9LPR363DGLF-T

A
133 533 0 0 1 A
GND
GND 166 667 0 1 1
07/07/02 To change the R0514 from ICS9LPR363DGLF-T
390 Ohm into 300 Ohm. ---IVERSON *: INT-PU, 200 800 0 1 0
**: INT-PD resistor value is 120K ohm.
<Variant Name>

Title : CLK GEN


ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 5 of 66
3 2 1
5 4 3 2 1

D D

RCOMP
U0601A
H_A#[35:3] 2
For Calibrating the FSB I/O Buffer J13 H_A#3
2 H_D#[63:0] H_A#_3
H_D#0 E2 B11 H_A#4
H_RCOMP H_D#1 H_D#_0 H_A#_4 H_A#5
G2 C11
H_D#2 H_D#_1 H_A#_5 H_A#6
G7 M11
H_D#_2 H_A#_6
1

T 10mils/S 20mils H_D#3 M6 C15 H_A#7


R0601 H_D#4 H_D#_3 H_A#_7 H_A#8
H7 F16
24.9Ohm H_D#5 H_D#_4 H_A#_8 H_A#9
H3 L13
1% H_D#6 H_D#_5 H_A#_9 H_A#10
G4 G17
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 C14
2

H_D#8 H_D#_7 H_A#_11 H_A#12


N8 K16
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 B13
H_D#10 H_D#_9 H_A#_13 H_A#14
M10 L16
H_D#11 H_D#_10 H_A#_14 H_A#15
GND N12 J17
H_D#12 H_D#_11 H_A#_15 H_A#16
N9 B14
H_D#13 H_D#_12 H_A#_16 H_A#17
H5 K19
H_D#14 H_D#_13 H_A#_17 H_A#18
P13 P15
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 R17
H_D#16 H_D#_15 H_A#_19 H_A#20
M2 B16
SCOMP H_D#17 W10
H_D#_16 H_A#_20
H20 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 L19
H_D#19 H_D#_18 H_A#_22 H_A#23
For Slew Rate Compenssation on the FSB V4
H_D#_19 H_A#_23
D17
H_D#20 M3 M17 H_A#24
+VCCP +VCCP H_D#21 H_D#_20 H_A#_24 H_A#25
J1 N16
H_D#22 H_D#_21 H_A#_25 H_A#26
N5 J19
H_D#23 H_D#_22 H_A#_26 H_A#27
N3 B18
H_D#_23 H_A#_27
1

H_D#24 W6 E19 H_A#28


R0602 R0603 H_D#25 H_D#_24 H_A#_28 H_A#29
W9 B17
C
54.9Ohm 54.9Ohm H_D#26 H_D#_25 H_A#_29 H_A#30 C
N2 B15
1% 1% H_D#27 H_D#_26 H_A#_30 H_A#31
Y7 E17
H_D#28 H_D#_27 H_A#_31 H_A#32
Y9 C18
2

H_SCOMP H_SCOMP# H_D#29 H_D#_28 H_A#_32 H_A#33


P4 A19
H_D#30 H_D#_29 H_A#_33 H_A#34
W3 B19
H_D#31 H_D#_30 H_A#_34 H_A#35
N1 N19
H_D#32 H_D#_31 H_A#_35
AD12
H_D#33 H_D#_32
AE3 G12 H_ADS# 2
H_D#34 H_D#_33 H_ADS#
Voltage Swing AD9 H17

HOST
H_D#_34 H_ADSTB#_0 H_ADSTB#0 2
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 2
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 2
For Providing a Reference Voltage to The FSB RCOMP circuits H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 2
H_D#38 AD11 F12
+VCCP H_D#_38 H_BREQ# H_BR0# 2
H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 2
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 2
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 5
1

H_D#42 AB1 AM7


H_D#43 H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 5
R0604 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 2
221Ohm H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 2
1% H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 2
H_D#46 AC5 C6 H_HITM# 2
2

H_D#47 H_D#_46 H_HITM#


AG3 G10 H_LOCK# 2
H_SWING H_D#48 H_D#_47 H_LOCK#
AJ9 B7 H_TRDY# 2
H_D#49 H_D#_48 H_TRDY#
AH8
H_D#_49
1

H_D#50 AJ14
H_D#_50
1

R0605 C0601 H_D#51 AE9


100Ohm 0.1UF/10V H_D#52 H_D#_51
AE11
1% X7R H_D#53 H_D#_52
AH12 K5 H_DINV#0 2
2

H_D#54 H_D#_53 H_DINV#_0


AJ5 L2 H_DINV#1 2
2

H_D#55 H_D#_54 H_DINV#_1


AH5 AD13 H_DINV#2 2
H_D#56 H_D#_55 H_DINV#_2
B AJ6 AE13 H_DINV#3 2
B
H_D#57 H_D#_56 H_DINV#_3
GND GND AE7
H_D#58 H_D#_57
AJ7 M7 H_DSTBN#0 2
H_D#59 H_D#_58 H_DSTBN#_0
AJ2 K3 H_DSTBN#1 2
H_D#60 H_D#_59 H_DSTBN#_1
AE5 AD2 H_DSTBN#2 2
H_D#61 H_D#_60 H_DSTBN#_2
AJ3 AH11 H_DSTBN#3 2
+VCCP H_D#62 H_D#_61 H_DSTBN#_3
AH2
H_D#63 H_D#_62
AH13 L7 H_DSTBP#0 2
H_D#_63 H_DSTBP#_0
K2 H_DSTBP#1 2
H_DSTBP#_1
1

AC2 H_DSTBP#2 2
R0606 H_SWING H_DSTBP#_2
B3 AJ10 H_DSTBP#3 2
1KOhm H_RCOMP H_SWING H_DSTBP#_3
C2 H_REQ#[4:0] 2
1% T 10mils/L 500mils/S 25mils H_RCOMP H_REQ#0
M14
H_SCOMP H_REQ#_0 H_REQ#1
W1 E13
2

H_AVREF R0608 0Ohm H_DVREF H_SCOMP# H_SCOMP H_REQ#_1 H_REQ#2


1 2 W2 A11
H_SCOMP# H_REQ#_2 H_REQ#3
H13
H_REQ#_3
1

B6 B12 H_REQ#4
2 H_CPURST# H_CPURST# H_REQ#_4
1

R0607 C0602 E5
2 H_CPUSLP# H_CPUSLP#
2KOhm 0.1UF/10V E12
H_RS#_0 H_RS#0 2
1% X7R D7 H_RS#1 2
2

H_RS#_1
D8 H_RS#2 2
2

H_AVREF H_RS#_2
B9
H_DVREF H_AVREF
A9
H_DVREF
GND GND
CRESTLINE_965GM

A A

<Variant Name>

Title : NB-965GM (HOST)


ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 6 of 66
2 1
5 4 3 2 1

+3VS +3VS U0601B

+3VS P36
RSVD1

1
P37 AV29 M_CLK_DDR0 14
R0732 R0731 RSVD2 SM_CK_0
R35 BB23 M_CLK_DDR1 14
R0709 2.2KOhm EDID_CLK 10KOhm 10KOhm RSVD3 SM_CK_1
2 1 N35 BA25 M_CLK_DDR2 15
r0402 r0402 RSVD4 SM_CK_3
AR12 AV23 M_CLK_DDR3 15
R0710 2.2KOhm EDID_DAT RSVD5 SM_CK_4
2 1 AR13

2
L_CTRL_CLK RSVD6
AM12 AW30 M_CLK_DDR#0 14
L_CTRL_DATA RSVD7 SM_CK#_0
AN13 BA23 M_CLK_DDR#1 14
R7006 2.37KOhm LVDS_IBG L_BKLTEN RSVD8 SM_CK#_1
1 2 J12 AW25 M_CLK_DDR#2 15
RSVD9 SM_CK#_3

RSVD
1% TPC26T T0719 1 AR37 AW23
RSVD10 SM_CK#_4 M_CLK_DDR#3 15

2
TPC26T T0720 1 AM36
R0733 TPC26T T0721 RSVD11
1 AL36 BE29 M_CKE0 14,16
GND 100KOhm TPC26T T0722 RSVD12 SM_CKE_0
D 1 AM37 AY32 M_CKE1 14,16
D
1% RSVD13 SM_CKE_1
07/03/28 To add the D20
RSVD14 SM_CKE_3
BD39 M_CKE2 15,16
R0731, R0732 and BG37 M_CKE3 15,16

1
SM_CKE_4
R0733.---Feng

1
C0702 BG20
SM_CS#_0 M_CS#0 14,16
GND 0.1UF/10V BK16
SM_CS#_1 M_CS#1 14,16
X7R BG16 M_CS#2 15,16

2
SM_CS#_2
H10
RSVD20 SM_CS#_3
BE13 M_CS#3 15,16
For Calero 20 Ohm
+VCCP B51 For Crestline 80.6 Ohm
U0601C RSVD21
BJ20 BH18

MUXING
RSVD22 SM_ODT_0 M_ODT0 14,16
GND BK22 BJ15
RSVD23 SM_ODT_1 M_ODT1 14,16
12 L_BKLTCTL J40 R0708 BF19 BJ14
L_BKLT_CTRL RSVD24 SM_ODT_2 M_ODT2 15,16 +1.8V
12 L_BKLTEN H39 N43 PEG_COMP 1 2 24.9Ohm BH20 BE16 M_ODT3 15,16
L_CTRL_CLK E39 L_BKLT_EN PEG_COMPI 1% RSVD25 SM_ODT_3
M43 BK18
L_CTRL_DATA E40 L_CTRL_CLK PEG_COMPO RSVD26 M_RCOMP R0729 1
BJ18 BL15 2 1% 20Ohm
EDID_CLK L_CTRL_DATA RSVD27 SM_RCOMP M_RCOMP# R0730 1
12 EDID_CLK C37 BF23 BK14 2 1% 20Ohm
EDID_DAT L_DDC_CLK RSVD28 SM_RCOMP#
12 EDID_DAT D35 J51 BG23
L_DDC_DATA PEG_RX#_0 RSVD29 SM_RCOMP_VOH
12 L_VDDEN K40 L51 BC23 BK31
L_VDD_EN PEG_RX#_1 RSVD30 SM_RCOMP_VOH SM_RCOMP_VOL M_VREF_MCH
N47 BD24 BL31 GND
LVDS_IBG PEG_RX#_2 RSVD31 SM_RCOMP_VOL
L41 T45 BJ29

DDR
LVDS_IBG PEG_RX#_3 14,16 M_A_A14 RSVD32
L43 T50 15,16 M_B_A14 BE24 AR49
LVDS_VBG PEG_RX#_4 RSVD33 SM_VREF_0
GND N41 U40 BH39 AW4
LVDS_VREFH PEG_RX#_5 RSVD34 SM_VREF_1

1
N40 Y44 AW20
LVDS_VREFL PEG_RX#_6 RSVD35 C0708 C0709
12 LVDS_LCLKN D46 Y40 BK20
LVDSA_CLK# PEG_RX#_7 RSVD36 2.2UF/6.3V 0.01UF/16V
12 LVDS_LCLKP C45 AB51 C48

2
LVDSA_CLK PEG_RX#_8 RSVD37
D44 W49 D47 B42 CLK_UMA_96M 5
LVDSB_CLK# PEG_RX#_9 RSVD38 DPLL_REF_CLK
E42 AD44 B44 C42 CLK_UMA_96M# 5
LVDSB_CLK PEG_RX#_10 RSVD39 DPLL_REF_CLK#

LVDS
AD40 C44 H48 CLK_LCD_SSCG 5
PEG_RX#_11 PM_EXTTS#0 RSVD40 DPLL_REF_SSCLK
12 LVDS_L0N G51 AG46 14 PM_EXTTS#0 A35 H47 CLK_LCD_SSCG# 5
LVDSA_DATA#_0 PEG_RX#_12 PM_EXTTS#1 RSVD41 DPLL_REF_SSCLK# GND
12 LVDS_L1N E51 AH49 15 PM_EXTTS#1 B37
LVDSA_DATA#_1 PEG_RX#_13 RSVD42
12 LVDS_L2N F49 AG45 B36 K44 CLK_MCH_3GPLL 5
C LVDSA_DATA#_2 PEG_RX#_14 RSVD43 PEG_CLK C
AG41 B34 K45 CLK_MCH_3GPLL# 5

CLK
PEG_RX#_15 RSVD44 PEG_CLK#
C34

GRAPHICS
RSVD45
12 LVDS_L0P G50 J50
LVDSA_DATA_0 PEG_RX_0
12 LVDS_L1P E50 L50 DMI_TXN[3:0] 18
LVDSA_DATA_1 PEG_RX_1 DMI_TXN0
12 LVDS_L2P F48 M47 AN47
LVDSA_DATA_2 PEG_RX_2 DMI_RXN_0 DMI_TXN1
U44 AJ38
PEG_RX_3 DMI_RXN_1 DMI_TXN2
T49 AN42
PEG_RX_4 DMI_RXN_2 DMI_TXN3
G44 T41 AN46
LVDSB_DATA#_0 PEG_RX_5 DMI_RXN_3
B47 W45 DMI_TXP[0..3] 18
LVDSB_DATA#_1 PEG_RX_6 DMI_TXP0
B45 W41 AM47
LVDSB_DATA#_2 PEG_RX_7 DMI_RXP_0 DMI_TXP1
07/04/02 Add R0734/R0735/R0736 PEG_RX_8
AB50 5 MCH_BSEL0 P27
CFG_0 DMI_RXP_1
AJ39
75 ohms resistor to GND on Y48 N27 AN41 DMI_TXP2
PEG_RX_9 5 MCH_BSEL1 CFG_1 DMI_RXP_2
E44 AC45 N24 AN45 DMI_TXP3
TVA_DAC/TVB_DAC/TVC_DAC LVDSB_DATA_0 PEG_RX_10 5 MCH_BSEL2 CFG_2 DMI_RXP_3
A47 AC41 07/04/03 To add the CFG7 1 TPC26T T0702 C21 DMI_RXN[0..3] 18
signal.--- Iverson LVDSB_DATA_1 PEG_RX_11 CFG_3
A45 AH47 strapping on CFG_7 1 TPC26T T0730 1 TPC26T T0703 C23 AJ46 DMI_RXN0
LVDSB_DATA_2 PEG_RX_12 MCH_CFG_5 CFG_4 DMI_TXN_0 DMI_RXN1
AG49 F23 AJ41
PCI-EXPRESS

PEG_RX_13 signal --- Iverson 11 MCH_CFG_5 CFG_5 DMI_TXN_1


AH45 1 TPC26T T0704 N23 AM40 DMI_RXN2
PEG_RX_14 CFG_6 DMI_TXN_2 DMI_RXN3
AG42 11 MCH_CFG_7 G23 AM44
PEG_RX_15 CFG_7 DMI_TXN_3
11 MCH_CFG_8 J20 DMI_RXP[0..3] 18
CFG_8

CFG
5% 1 R0734 2 75OHM E27 N45 MCH_CFG_9 C20 AJ47 DMI_RXP0

DMI
TVA_DAC PEG_TX#_0 11 MCH_CFG_9 CFG_9 DMI_TXP_0
5% 1 R0735 2 75OHM G27 U39 1 TPC26T T0706 R24 AJ42 DMI_RXP1
TVB_DAC PEG_TX#_1 CFG_10 DMI_TXP_1
1 R0736 2 75OHM K27 U47 TPC26T T0723 1 1 TPC26T T0707 L23 AM39 DMI_RXP2
TVC_DAC PEG_TX#_2 CFG_11 DMI_TXP_2
TV

N51 MCH_CFG_12 J23 AM43 DMI_RXP3


PEG_TX#_3 11 MCH_CFG_12 CFG_12 DMI_TXP_3 +1.25VS
F27 R50 MCH_CFG_13 E23
TVA_RTN PEG_TX#_4 11 MCH_CFG_13 CFG_13
J27 T42 1 TPC26T T0708 E20
TVB_RTN PEG_TX#_5 CFG_14
L27 Y43 1 TPC26T T0709 K23
TVC_RTN PEG_TX#_6 CFG_15

2
W46 MCH_CFG_16 M20
PEG_TX#_7 11 MCH_CFG_16 CFG_16
M35 W38 1 TPC26T T0710 M24
TV_DCONSEL_0 PEG_TX#_8 CFG_17

GRAPHICS VID
GND P33 AD39 1 TPC26T T0711 L32 R0712
TV_DCONSEL_1 PEG_TX#_9 MCH_CFG_19 CFG_18 1KOhm
AC46 11 MCH_CFG_19 N33
PEG_TX#_10 MCH_CFG_20 CFG_19 1%
B AC49 11 MCH_CFG_20 L35 B

1
PEG_TX#_11 CFG_20 MCH_CLVREF
AC42
PEG_TX#_12 T0701
AH39
PEG_TX#_13

2
AE49 TPC26T E35

1
PEG_TX#_14 GFX_VID_0

1
AH44 G41 A39 R0717 C0701
PEG_TX#_15 19 PM_BMBUSY# PM_BM_BUSY# GFX_VID_1
RX0701 2 1 0Ohm DPRSTP# L39 C38 392Ohm 0.1UF/10V
2,17,50 H_DPRSTP# PM_DPRSTP# GFX_VID_2
13 CRT_BLUE CRT_BLUE H32 M45 R0714 2 1 10KOhm PM_EXTTS#0 L36 B39 1%
+3VS

2
CRT_BLUE PEG_TX_0 PM_EXT_TS#_0 GFX_VID_3

PM
G32 T38 R0715 2 1 10KOhm PM_EXTTS#1 J36 E36

1
CRT_GREEN CRT_BLUE# PEG_TX_1 R0728 PM_EXT_TS#_1 GFX_VR_EN
13 CRT_GREEN K29 T46 19,29 ICH_PWROK 1 2 0Ohm AW49
CRT_GREEN PEG_TX_2 RX0704 1 PWROK
J29 N50 18,25,26,28,29 PLT_RST# 2 100Ohm RST_IN_MCH# AV20
CRT_RED CRT_GREEN# PEG_TX_3 RSTIN# GND GND
13 CRT_RED F29 R51 4 GMCH_THRMTRIP# N20
CRT_RED PEG_TX_4 THERMTRIP#
VGA

E29 U43 RX0702 1 2 0Ohm DPRSLPVR G36


GND CRT_RED# PEG_TX_5 19,50 PM_DPRSLPVR DPRSLPVR
W42
PEG_TX_6
Y47 AM49 CL_CLK0 19
PEG_TX_7 CL_CLK R0718
13 CRT_DDC_CLK K33 Y39 AK50 CL_DATA0 19
CRT_DDC_CLK PEG_TX_8 CL_DATA CL_PWROK ICH_PWROK
13 CRT_DDC_DATA G35 AC38 BJ51 AT43 1 2
CRT_DDC_DATA PEG_TX_9 NC_1 CL_PWROK
1 R7007 2 DAC_HSYNC_BUF 0Ohm

ME
28 DAC_HSYNC_GM F33 AD47 BK51 AN49 CL_RST#0 19
30.1Ohm CRT_TVO_IREF CRT_HSYNC PEG_TX_10 +1.8V NC_2 CL_RST# MCH_CLVREF
C32 AC50 BK50 AM50
CRT_TVO_IREF PEG_TX_11 NC_3 CL_VREF
28 DAC_VSYNC_GM 1 R7008 2 DAC_VSYNC_BUF E33 AD43 BL50
30.1Ohm CRT_VSYNC PEG_TX_12 NC_4
AG39 BL49
PEG_TX_13 NC_5
2

AE50 BL3
PEG_TX_14 R0719 NC_6
07/04/04 To modify net name AH43 BL2
PEG_TX_15 NC_7

NC
DAC_HSYNC_GM/DAC_VSYNC_GM into 1KOhm BK1
1% NC_8 T0712 1 TPC26T r0402
DAC_HSYNC_BUF/DAC_VSYNC_BUF--- Feng BJ1 H35
CRESTLINE_965GM NC_9 SDVO_CTRL_CLK T0713 1 TPC26T R0713 1 10KOhm 2
E1 K36

MISC
+3VS
1

SM_RCOMP_VOH NC_10 SDVO_CTRL_DATA


A5 G39 MCH_CLK_REQ# 5
NC_11 CLK_REQ#
C51 G40 MCH_ICH_SYNC# 19
NC_12 ICH_SYNC#
2

R7009 1 2 150Ohm 1% CRT_BLUE C0703 C0704 B50


R0722 1UF/10V NC_13
A50
R7010 NC_14
1 2 150Ohm 1% CRT_GREEN 3.01KOhm 0.01UF/16V A49 A37 R0723 1 2 0Ohm
2

1% NC_15 TEST_1 R0724


BK2 R32 1 2 22kOhm
A
R7011 150Ohm 1% CRT_RED NC_16 TEST_2 A
1 2
1

GND GND CRESTLINE_965GM


R7012 1 2 1.3KOhm CRT_TVO_IREF GND
SM_RCOMP_VOL
<Variant Name>
2

GND R0727 C0706 C0707


1KOhm
1%
1UF/10V
0.01UF/16V
Title : 965GM(DMI & PEG)
2

Engineer: Julian Kuo


1

ASUSALPHATeK COMPUTER INC.


Size Project Name Rev
GND GND GND Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 7 of 66
2 1
5 4 3 2 1

D D
U0601D
14 M_A_DQ[63:0]
M_A_DQ0 AR43 BB19 U0601E
SA_DQ_0 SA_BS_0 M_A_BS0 14,16 15 M_B_DQ[63:0]
M_A_DQ1 AW44 BK19 M_B_DQ0 AP49 AY17
SA_DQ_1 SA_BS_1 M_A_BS1 14,16 SB_DQ_0 SB_BS_0 M_B_BS0 15,16
M_A_DQ2 BA45 BF29 M_B_DQ1 AR51 BG18
SA_DQ_2 SA_BS_2 M_A_BS2 14,16 SB_DQ_1 SB_BS_1 M_B_BS1 15,16
M_A_DQ3 AY46 M_B_DQ2 AW50 BG36
SA_DQ_3 SB_DQ_2 SB_BS_2 M_B_BS2 15,16
M_A_DQ4 AR41 BL17 M_B_DQ3 AW51
SA_DQ_4 SA_CAS# M_A_CAS# 14,16 SB_DQ_3
M_A_DQ5 AR45 M_B_DQ4 AN51 BE17
M_A_DQ6 SA_DQ_5 M_A_DM0 M_A_DM[7:0] 14 M_B_DQ5 SB_DQ_4 SB_CAS# M_B_CAS# 15,16
AT42 AT45 AN50 M_B_DM[7:0] 15
M_A_DQ7 SA_DQ_6 SA_DM_0 M_A_DM1 M_B_DQ6 SB_DQ_5 M_B_DM0
AW47 BD44 AV50 AR50
M_A_DQ8 SA_DQ_7 SA_DM_1 M_A_DM2 M_B_DQ7 SB_DQ_6 SB_DM_0 M_B_DM1
BB45 BD42 AV49 BD49
M_A_DQ9 SA_DQ_8 SA_DM_2 M_A_DM3 M_B_DQ8 SB_DQ_7 SB_DM_1 M_B_DM2
BF48 AW38 BA50 BK45
M_A_DQ10 SA_DQ_9 SA_DM_3 M_A_DM4 M_B_DQ9 SB_DQ_8 SB_DM_2 M_B_DM3
BG47 AW13 BB50 BL39
M_A_DQ11 SA_DQ_10 SA_DM_4 M_A_DM5 M_B_DQ10 SB_DQ_9 SB_DM_3 M_B_DM4
BJ45 BG8 BA49 BH12
M_A_DQ12 SA_DQ_11 SA_DM_5 M_A_DM6 M_B_DQ11 SB_DQ_10 SB_DM_4 M_B_DM5
BB47 AY5 BE50 BJ7
M_A_DQ13 SA_DQ_12 SA_DM_6 M_A_DM7 M_B_DQ12 SB_DQ_11 SB_DM_5 M_B_DM6
BG50 AN6 BA51 BF3
M_A_DQ14 SA_DQ_13 SA_DM_7 M_B_DQ13 SB_DQ_12 SB_DM_6 M_B_DM7
BH49 M_A_DQS[7:0] 14 AY49 AW2
M_A_DQ15 SA_DQ_14 M_A_DQS0 M_B_DQ14 SB_DQ_13 SB_DM_7
BE45 AT46 BF50 M_B_DQS[7:0] 15
M_A_DQ16 SA_DQ_15 SA_DQS_0 M_A_DQS1 M_B_DQ15 SB_DQ_14 M_B_DQS0
AW43 BE48 BF49 AT50

A
SA_DQ_16 SA_DQS_1 SB_DQ_15 SB_DQS_0

B
M_A_DQ17 BE44 BB43 M_A_DQS2 M_B_DQ16 BJ50 BD50 M_B_DQS1
M_A_DQ18 SA_DQ_17 SA_DQS_2 M_A_DQS3 M_B_DQ17 SB_DQ_16 SB_DQS_1 M_B_DQS2
BG42 BC37 BJ44 BK46
M_A_DQ19 SA_DQ_18 SA_DQS_3 M_A_DQS4 M_B_DQ18 SB_DQ_17 SB_DQS_2 M_B_DQS3
BE40 BB16 BJ43 BK39
M_A_DQ20 SA_DQ_19 SA_DQS_4 M_A_DQS5 M_B_DQ19 SB_DQ_18 SB_DQS_3 M_B_DQS4
BF44 BH6 BL43 BJ12
SA_DQ_20 SA_DQS_5 SB_DQ_19 SB_DQS_4

MEMORY
M_A_DQ21 BH45 BB2 M_A_DQS6 M_B_DQ20 BK47 BL7 M_B_DQS5
SA_DQ_21 SA_DQS_6 SB_DQ_20 SB_DQS_5

MEMORY
M_A_DQ22 BG40 AP3 M_A_DQS7 M_B_DQ21 BK49 BE2 M_B_DQS6
SA_DQ_22 SA_DQS_7 M_A_DQS#[7:0] 14 SB_DQ_21 SB_DQS_6
M_A_DQ23 BF40 AT47 M_A_DQS#0 M_B_DQ22 BK43 AV2 M_B_DQS7
SA_DQ_23 SA_DQS#_0 SB_DQ_22 SB_DQS_7 M_B_DQS#[7:0] 15
M_A_DQ24 AR40 BD47 M_A_DQS#1 M_B_DQ23 BK42 AU50 M_B_DQS#0
M_A_DQ25 SA_DQ_24 SA_DQS#_1 M_A_DQS#2 M_B_DQ24 SB_DQ_23 SB_DQS#_0 M_B_DQS#1
AW40 BC41 BJ41 BC50
M_A_DQ26 SA_DQ_25 SA_DQS#_2 M_A_DQS#3 M_B_DQ25 SB_DQ_24 SB_DQS#_1 M_B_DQS#2
AT39 BA37 BL41 BL45
M_A_DQ27 SA_DQ_26 SA_DQS#_3 M_A_DQS#4 M_B_DQ26 SB_DQ_25 SB_DQS#_2 M_B_DQS#3
AW36 BA16 BJ37 BK38
M_A_DQ28 SA_DQ_27 SA_DQS#_4 M_A_DQS#5 M_B_DQ27 SB_DQ_26 SB_DQS#_3 M_B_DQS#4
AW41 BH7 BJ36 BK12
C
M_A_DQ29 SA_DQ_28 SA_DQS#_5 M_A_DQS#6 M_B_DQ28 SB_DQ_27 SB_DQS#_4 M_B_DQS#5 C
AY41 BC1 BK41 BK7
M_A_DQ30 SA_DQ_29 SA_DQS#_6 M_A_DQS#7 M_B_DQ29 SB_DQ_28 SB_DQS#_5 M_B_DQS#6
AV38 AP2 BJ40 BF2
M_A_DQ31 SA_DQ_30 SA_DQS#_7 M_B_DQ30 SB_DQ_29 SB_DQS#_6 M_B_DQS#7
AT38 M_A_A[13:0] 14,16 BL35 AV3
M_A_DQ32 SA_DQ_31 M_A_A0 M_B_DQ31 SB_DQ_30 SB_DQS#_7
AV13 BJ19 BK37 M_B_A[13:0] 15,16
M_A_DQ33 SA_DQ_32 SA_MA_0 M_A_A1 M_B_DQ32 SB_DQ_31 M_B_A0
AT13 BD20 BK13 BC18
SYSTEM

M_A_DQ34 SA_DQ_33 SA_MA_1 M_A_A2 M_B_DQ33 SB_DQ_32 SB_MA_0 M_B_A1


AW11 BK27 BE11 BG28
SA_DQ_34 SA_MA_2 SB_DQ_33 SB_MA_1

SYSTEM
M_A_DQ35 AV11 BH28 M_A_A3 M_B_DQ34 BK11 BG25 M_B_A2
M_A_DQ36 SA_DQ_35 SA_MA_3 M_A_A4 M_B_DQ35 SB_DQ_34 SB_MA_2 M_B_A3
AU15 BL24 BC11 AW17
M_A_DQ37 SA_DQ_36 SA_MA_4 M_A_A5 M_B_DQ36 SB_DQ_35 SB_MA_3 M_B_A4
AT11 BK28 BC13 BF25
M_A_DQ38 SA_DQ_37 SA_MA_5 M_A_A6 M_B_DQ37 SB_DQ_36 SB_MA_4 M_B_A5
BA13 BJ27 BE12 BE25
M_A_DQ39 SA_DQ_38 SA_MA_6 M_A_A7 M_B_DQ38 SB_DQ_37 SB_MA_5 M_B_A6
BA11 BJ25 BC12 BA29
M_A_DQ40 SA_DQ_39 SA_MA_7 M_A_A8 M_B_DQ39 SB_DQ_38 SB_MA_6 M_B_A7
BE10 BL28 BG12 BC28
M_A_DQ41 SA_DQ_40 SA_MA_8 M_A_A9 M_B_DQ40 SB_DQ_39 SB_MA_7 M_B_A8
BD10 BA28 BJ10 AY28
M_A_DQ42 SA_DQ_41 SA_MA_9 M_A_A10 M_B_DQ41 SB_DQ_40 SB_MA_8 M_B_A9
BD8 BC19 BL9 BD37
M_A_DQ43 SA_DQ_42 SA_MA_10 M_A_A11 M_B_DQ42 SB_DQ_41 SB_MA_9 M_B_A10
AY9 BE28 BK5 BG17
M_A_DQ44 SA_DQ_43 SA_MA_11 M_A_A12 M_B_DQ43 SB_DQ_42 SB_MA_10 M_B_A11
BG10 BG30 BL5 BE37
M_A_DQ45 SA_DQ_44 SA_MA_12 M_A_A13 M_B_DQ44 SB_DQ_43 SB_MA_11 M_B_A12
AW9 BJ16 BK9 BA39
SA_DQ_45 SA_MA_13 SB_DQ_44 SB_MA_12
DDR

M_A_DQ46 BD7 M_B_DQ45 BK10 BG13 M_B_A13


M_A_DQ47 SA_DQ_46 M_B_DQ46 SB_DQ_45 SB_MA_13
BB9 BJ8
SA_DQ_47 SB_DQ_46

DDR
M_A_DQ48 BB5 BE18 M_B_DQ47 BJ6 AV16
SA_DQ_48 SA_RAS# M_A_RAS# 14,16 SB_DQ_47 SB_RAS# M_B_RAS# 15,16
M_A_DQ49 AY7 AY20 M_B_DQ48 BF4 AY18
M_A_DQ50 SA_DQ_49 SA_RCVEN# TPC26T T0801 M_B_DQ49 SB_DQ_48 SB_RCVEN# TPC26T T0802
AT5 1 BH5 1
M_A_DQ51 SA_DQ_50 M_B_DQ50 SB_DQ_49
AT7 BA19 M_A_WE# 14,16 BG1 BC17 M_B_WE# 15,16
M_A_DQ52 SA_DQ_51 SA_WE# M_B_DQ51 SB_DQ_50 SB_WE#
AY6 BC2
M_A_DQ53 SA_DQ_52 M_B_DQ52 SB_DQ_51
BB7 BK3
M_A_DQ54 SA_DQ_53 M_B_DQ53 SB_DQ_52
AR5 BE4
M_A_DQ55 SA_DQ_54 M_B_DQ54 SB_DQ_53
AR8 BD3
M_A_DQ56 SA_DQ_55 M_B_DQ55 SB_DQ_54
AR9 BJ2
M_A_DQ57 SA_DQ_56 M_B_DQ56 SB_DQ_55
AN3 BA3
M_A_DQ58 SA_DQ_57 M_B_DQ57 SB_DQ_56
AM8 BB3
M_A_DQ59 SA_DQ_58 M_B_DQ58 SB_DQ_57
B AN10 AR1 B
M_A_DQ60 SA_DQ_59 M_B_DQ59 SB_DQ_58
AT9 AT3
M_A_DQ61 SA_DQ_60 M_B_DQ60 SB_DQ_59
AN9 AY2
M_A_DQ62 SA_DQ_61 M_B_DQ61 SB_DQ_60
AM9 AY3
M_A_DQ63 SA_DQ_62 M_B_DQ62 SB_DQ_61
AN11 AU2
SA_DQ_63 M_B_DQ63 SB_DQ_62
AT2
CRESTLINE_965GM SB_DQ_63
CRESTLINE_965GM

A A

<Variant Name>

Title : 965GM(DDR2)
ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 8 of 66
2 1
5 4 3 2 1

+VCCP
+VCCP
VCC (Core Power) U0601G +VCCP
Max: 1573mA U0601F
AT35
VCC_1 VCC_AXG VCC (Core Power)
AT34 T17 (Graphics Core Power)
VCC_2 VCC_AXG_NCTF_1
1

C0901 AH28 T18 AB33


0.1UF/10V VCC_3 VCC_AXG_NCTF_2 Max: 7700mA VCC_NCTF_1
AC32 T19 AB36
VCC_5 VCC_AXG_NCTF_3 VCC_NCTF_2

1
AC31 T21 + + AB37
2

VCC_4 VCC_AXG_NCTF_4 CE0901 CE0902 VCC_NCTF_3


AK32
VCC_6 VCC_AXG_NCTF_5
T22 370 mils from the Edge AC33
VCC_NCTF_4 VSS_NCTF_1
T27
D AJ31 T23 100UF/2.5V 100UF/2.5V AC35 T37 D
GND VCC_7 VCC_AXG_NCTF_6 VCC_NCTF_5 VSS_NCTF_2
AJ28 T25 AC36 U24

2
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_6 VSS_NCTF_3
AH32 U15 AD35 U28
VCC_9 VCC_AXG_NCTF_8 VCC_NCTF_7 VSS_NCTF_4

VCC CORE
AH31 U16 AD36 V31
VCC_10 VCC_AXG_NCTF_9 VCC_NCTF_8 VSS_NCTF_5
1

C0902 AH29 U17 GND GND AF33 V35


0.1UF/10V VCC_11 VCC_AXG_NCTF_10 VCC_NCTF_9 VSS_NCTF_6
AF32 U19 AF36 AA19
VCC_12 VCC_AXG_NCTF_11 VCC_NCTF_10 VSS_NCTF_7
U20 AH33 AB17
2

R0901 VCC_AXG_NCTF_12 VCC_NCTF_11 VSS_NCTF_8

VSS NCTF
U21 AH35 AB35
VCC_AXG_NCTF_13 VCC_NCTF_12 VSS_NCTF_9

1
0Ohm U23 In Cavity C0903 C0904 AH36 AD19
GND VCC_AXG_NCTF_14 10UF/10V 10UF/10V VCC_NCTF_13 VSS_NCTF_10
1 2 R30 U26 AH37 AD37
VCC_13 VCC_AXG_NCTF_15 @ VCC_NCTF_14 VSS_NCTF_11
V16 AJ33 AF17

2
VCC_AXG_NCTF_16 VCC_NCTF_15 VSS_NCTF_12
At Package VCC VCC_AXG_NCTF_17
V17 AJ35
VCC_NCTF_16 VSS_NCTF_13
AF35
V19 AK33 AK17
Edge 22 uF * 1
VCC_AXG_NCTF_18
V20 GND GND AK35
VCC_NCTF_17 VSS_NCTF_14
AM17
VCC_AXG_NCTF_19 VCC_NCTF_18 VSS_NCTF_15
0.22 uF * 2 V21 AK36 AM24
VCC_AXG_NCTF_20 VCC_NCTF_19 VSS_NCTF_16
V23 AK37 AP26
0.1 uF * 1 VCC_AXG_NCTF_21 VCC_NCTF_20 VSS_NCTF_17
VCC_AXG_NCTF_22
V24 VCC_AXG AD33
VCC_NCTF_21 VSS_NCTF_18
AP28

1
+1.8V Y15 At Edge Pin C0905 AJ36 AR15
POWER VCC_AXG_NCTF_23 1UF/10V VCC_NCTF_22 VSS_NCTF_19

VCC NCTF
VCC_AXG_NCTF_24
Y16 0.1 uF * 2 Location AM35
VCC_NCTF_23 VSS_NCTF_20
AR19
Max: 3138mA Y17 22 uF * 1 AL33 AR28

2
VCC_AXG_NCTF_25 VCC_NCTF_24 VSS_NCTF_21
AU32 Y19 AL35
VCC_SM_1 VCC_AXG_NCTF_26 0.47 uF * 1 VCC_NCTF_25
VCC_SM AU33
VCC_SM_2 VCC_AXG_NCTF_27
Y20 AA33
VCC_NCTF_26
1

C0906 C0907 AU35


VCC_SM_3 VCC_AXG_NCTF_28
Y21 1 uF *1 GND AA35
VCC_NCTF_27
22 uF * 2 1UF/10V 1UF/10V AV33 Y23 10 uF * 1 AA36
VCC_SM_4 VCC_AXG_NCTF_29 VCC_NCTF_28
0.1 uF * 3 AW33 Y24 AP35
220uF * 2
2

VCC_SM_5 VCC_AXG_NCTF_30 VCC_NCTF_29


AW35 Y26 AP36
0.47 uF * 1 VCC_SM_6 VCC_AXG_NCTF_31 VCC_NCTF_30

1
AY35 Y28 At Package C0908 AR35
VCC_SM_7 VCC_AXG_NCTF_32 VCC_NCTF_31
0.22 uF * 2 GND GND BA32 Y29 0.1UF/10V AR36
BA33
VCC_SM_8 VCC_AXG_NCTF_33
AA16 Edge Y32
VCC_NCTF_32

2
VCC_SM_9 VCC_AXG_NCTF_34 VCC_NCTF_33
BA35 AA17 Y33
VCC_SM_10 VCC_AXG_NCTF_35 VCC_NCTF_34
POWER
1

C0909 C0910 BB33 AB16 Y35


C
1UF/10V 1UF/10V VCC_SM_11 VCC_AXG_NCTF_36 GND VCC_NCTF_35 C
BC32 AB19 Y36
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_36
BC33 AC16 Y37 A3
2

VCC_SM_13 VCC_AXG_NCTF_38 VCC_NCTF_37 VSS_SCB1


BC35 AC17 T30 B2
VCC_SM_14 VCC_AXG_NCTF_39 VCC_NCTF_38 VSS_SCB2
VCC SM

VSS SCB
BD32 AC19 T34 C1
GND GND VCC_SM_15 VCC_AXG_NCTF_40 VCC_NCTF_39 VSS_SCB3
BD35 AD15 T35 BL1
VCC_SM_16 VCC_AXG_NCTF_41 VCC_NCTF_40 VSS_SCB4
BE32 AD16 U29 BL51
VCC_SM_17 VCC_AXG_NCTF_42 VCC_NCTF_41 VSS_SCB5
BE33 AD17 U31 A51
VCC_SM_18 VCC_AXG_NCTF_43 VCC_NCTF_42 VSS_SCB6
1

C0911 BE35 AF16 U32


VCC GFX NCTF

10UF/10V VCC_SM_19 VCC_AXG_NCTF_44 VCC_NCTF_43


BF33 AF19 U33
VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_44 GND
BF34 AH15 U35
2

VCC_SM_21 VCC_AXG_NCTF_46 VCC_NCTF_45


BG32 AH16 U36
VCC_SM_22 VCC_AXG_NCTF_47 VCC_NCTF_46
Place on BG33
VCC_SM_23 VCC_AXG_NCTF_48
AH17 V32
VCC_NCTF_47
GND BG35 AH19 V33
the Edge BH32
VCC_SM_24 VCC_AXG_NCTF_49
AJ16 V36
VCC_NCTF_48 +VCCP
VCC_SM_25 VCC_AXG_NCTF_50 VCC_NCTF_49
BH34 AJ17 V37
VCC_SM_26 VCC_AXG_NCTF_51 VCC_NCTF_50
1

C0912 BH35 AJ19


10UF/10V VCC_SM_27 VCC_AXG_NCTF_52
BJ32 AK16 AT33
VCC_SM_28 VCC_AXG_NCTF_53 VCC_AXM_1
BJ33 AK19 AT31
2

VCC_SM_29 VCC_AXG_NCTF_54 +VCCP VCC_AXM_2

VCC AXM
BJ34
VCC_SM_30 VCC_AXG_NCTF_55
AL16
VCC_AXM_3
AK29 VCC_AXM (Controller Link)
BK32 AL17 AK24 Max: 1573mA
GND VCC_SM_31 VCC_AXG_NCTF_56 VCC_AXM_4
BK33 AL19 AK23
VCC_SM_32 VCC_AXG_NCTF_57 VCC_AXM_5
BK34 AL20 AL24 AJ26
VCC_SM_33 VCC_AXG_NCTF_58 VCC_AXM_NCTF_1 VCC_AXM_6
BK35 AL21 AL26 AJ23
VCC_SM_34 VCC_AXG_NCTF_59 VCC_AXM_NCTF_2 VCC_AXM_7
BL33
VCC_SM_35 VCC_AXG_NCTF_60
AL23 VCC_AXM (Controller Link) AL28
VCC_AXM_NCTF_3

1
AU30 AM15 AM26 C0913 C0914
VCC_SM_36 VCC_AXG_NCTF_61 VCC_AXM_NCTF_4 10UF/10V 0.1UF/10V
AM16 AM28

VCC AXM NCTF


VCC_AXG_NCTF_62 VCC_AXM_NCTF_5
AM19 AM29

2
+VCCP VCC_AXG_NCTF_63 VCC_AXM_NCTF_6
AM20 AM31
VCC_AXG_NCTF_64 VCC_AXM_NCTF_7
AM21 AM32
VCC_AXG_NCTF_65 VCC_AXM_NCTF_8 GND GND
R20 AM23 AM33
VCC_AXG_1 VCC_AXG_NCTF_66 VCC_AXM_NCTF_9
B T14 AP15 AP29 B
VCC_AXG_2 VCC_AXG_NCTF_67 VCC_AXM_NCTF_10
W13 AP16 AP31
VCC_AXG_3 VCC_AXG_NCTF_68 VCC_AXM_NCTF_11
VCC_AXG W14
VCC_AXG_4 VCC_AXG_NCTF_69
AP17 AP32
VCC_AXM_NCTF_12 VCC_AXM
(Graphics Core Power) Y12 AP19 AP33
VCC_AXG_5 VCC_AXG_NCTF_70 VCC_AXM_NCTF_13

1
AA20 AP20 C0915 C0916 C0917 AL29 0.1 uF * 3
VCC_AXG_6 VCC_AXG_NCTF_71 10UF/10V 0.1UF/10V 1UF/10V VCC_AXM_NCTF_14
AA23 AP21 AL31 0.22 uF * 2
VCC_AXG_7 VCC_AXG_NCTF_72 VCC_AXM_NCTF_15
AA26 AP23 AL32

2
VCC_AXG_8 VCC_AXG_NCTF_73 VCC_AXM_NCTF_16 22 uF * 1
AA28 AP24 AR31
VCC_AXG_9 VCC_AXG_NCTF_74 VCC_AXM_NCTF_17
AB21 AR20 AR32
VCC_AXG_10 VCC_AXG_NCTF_75 GND GND GND VCC_AXM_NCTF_18
AB24 AR21 AR33
VCC_AXG_11 VCC_AXG_NCTF_76 VCC_AXM_NCTF_19
AB29 AR23
VCC_AXG_12 VCC_AXG_NCTF_77
AC20 AR24
VCC_AXG_13 VCC_AXG_NCTF_78
VCC GFX

AC21 AR26
VCC_AXG_14 VCC_AXG_NCTF_79
AC23 V26
VCC_AXG_15 VCC_AXG_NCTF_80 CRESTLINE_965GM
AC24 V28
VCC_AXG_16 VCC_AXG_NCTF_81
AC26 V29
VCC_AXG_17 VCC_AXG_NCTF_82
AC28 Y31
VCC_AXG_18 VCC_AXG_NCTF_83
AC29
VCC_AXG_19
AD20
VCC_AXG_20
AD23
VCC_AXG_21
AD24 AW45
VCC_AXG_22 VCC_SM_LF1
AD28 BC39
VCC_AXG_23 VCC_SM_LF2
VCC SM LF

AF21 BE39
VCC_AXG_24 VCC_SM_LF3
AF26 BD17
VCC_AXG_25 VCC_SM_LF4
AA31 BD4
VCC_AXG_26 VCC_SM_LF5
AH20 AW8
VCC_AXG_27 VCC_SM_LF6
AH21 AT6
VCC_AXG_28 VCC_SM_LF7
AH23
VCC_AXG_29
1

AH24 C0918 C0919 C0920 C0921 C0923 C0924


VCC_AXG_30 0.1UF/10V 0.1UF/10V 0.22UF/10V 0.22UF/10V C0922 1UF/10V 1UF/10V
AH26
VCC_AXG_31 0.47UF/16V
AD31
2

A VCC_AXG_32 A
AJ20
VCC_AXG_33
AN14
VCC_AXG_34 GND GND GND GND GND GND GND

<Variant Name>

CRESTLINE_965GM
Title : 965GM(PWR)
ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 9 of 66
2 1
5 4 3 2 1

+1.25VS
+3VS_DAC VCCA_DPLLA
L1002 +3VS +VCCP
L1001 1 2 +VCCA_DPLLA 0.1 uF * 1
+VCCA_CRT_DAC D1001
1 2 220 uF * 2

1
120Ohm/100Mhz + Max: 10mA L1003 10Ohm 1

1
120Ohm/100Mhz Max: 80mA Irat=600mA CE1001 C1002 10 uH @ 390-m Ohm 1 2 3
1

1
C1001 Irat=600mA 100UF/2.5V 0.1UF/10V r0603_h24 2

1
10UF/6.3V C1003 C1004

2
c0805_h57 0.1UF/10V Max: 80mA BAT54C
2

2
0.1UF/10V

2
L1004 GND GND
1 2 +VCCA_DPLLB VCCA_DPLLB VCCSYNC
GND GND GND Max: 850mA +VCCP

1
D + 0.1 uF * 1 0.1 uF * 1 U0601H D

1
120Ohm/100Mhz CE1002 C1005 On the Edge
+1.5VS Irat=600mA 100UF/2.5V 0.1UF/10V
220 uF * 2
J32
VCCSYNC VTT_1
U13 VTT
10 uH @ 390-m Ohm U12

2
VTT_2

1
L1005 A33 U11 + 4.7 uF * 2
VCCA_CRT_DAC_1 VTT_3

1
1 2 +VCCD_QDAC +VCCA_CRT_DAC B33 U9 C1006 C1007 CE1003
GND GND VCCA_CRT_DAC_2 VTT_4 10UF/6.3V 10UF/6.3V 100UF/2.5V
2.2 uF * 1
U8
VTT_5 0.47 uF * 1

CRT
120Ohm/100Mhz Max: 5mA +1.25VS U7

2
VTT_6
1

Irat=600mA C1008 Max: 50mA A30 U5


0.1UF/10V L1006 VCCA_DAC_BG VTT_7
VCCA_HPLL VTT_8
U3
1 2 +VCCA_HPLL B32 U2 GND GND GND
GND
2

VSSA_DAC_BG VTT_9
0.1 uF * 1 VTT_10
U1

1
120Ohm/100Mhz C1009 C1010 T13
22 uF * 1 VTT_11

VTT
Irat=600mA 10UF/6.3V 0.1UF/10V +VCCA_DPLLA B49 T11
VCCA_DPLLA VTT_12

1
GND 120 @ 100MHz T10 C1011 C1012 C1013

2
+VCCA_DPLLB VTT_13 0.1UF/10V 1UF/10V 10UF/6.3V
500m Ohm * 1 H49 T9
VCCA_DPLLB VTT_14
T7

2
VTT_15

PLL
GND GND Max: 150mA +VCCA_HPLL AL2 T6
L1007 VCCA_HPLL VTT_16
VCCD_QDAC VTT_17
T5
VCCA_MPLL 1 2 +VCCA_MPLL +VCCA_MPLL AM2 T3 GND GND GND
VCCA_MPLL VTT_18
0.1 uF * 1 VTT_19
T2

1
0.1 uF * 1 120Ohm/100Mhz C1014 C1015 R3 In Cavity
1 uF *1 Irat=600mA 10UF/6.3V 0.1UF/10V +3VS +VCCA_LVDS VTT_20

A LVDS
22 uF * 1 A41 R2
0.01 uF * 1 VCCA_LVDS VTT_21 +1.25VS
R1

2
VTT_22
120 Ohm @ VCCA_PEG_BG GND B41
VSSA_LVDS
100MHz * 1 Max: 515mA VCC_AXD

1
GND GND 0.1 uF * 1 C1016 AT23
VCC_AXD_1
500-milli Ohm * 1 Max: 0.4mA VCC_AXD_2
AU28 1 uF *1

1
0.1UF/10V K50 AU24 C1017 C1018

2
VCCA_PEG_BG VCC_AXD_3

AXD
+1.25VS AT29 1UF/10V 10UF/6.3V
VCC_AXD_4
Max:100mA K49 AT25

2
C VSSA_PEG_BG VCC_AXD_5 C

A PEG
L1008 AT30 VCCAXF
+VCCA_PEG_PLL VCC_AXD_6
1 2
GND +VCCA_PEG_PLL U51 AR29 GND GND +1.25VS 1 uF *1
120Ohm/100Mhz VCCA_PEG_PLL VCC_AXD_NCTF
VCCA_PEG_PLL VCC_DMI
1

1
Irat=600mA Max: 495mA
C1019 C1020 C1021 +VCCA_SM
0.1 uF * 1
0.1 uF * 1 AW18
VCCA_SM_1 VCC_AXF_1
B23
10UF/6.3V 0.1UF/10V 0.1UF/10V AV19 B21 +1.25VS
10 uF * 2
POWER
2

2
VCCA_SM_2 VCC_AXF_2

1
AXF
AU19 A21 C1022 C1023
1 Ohm * 1 VCCA_SM_3 VCC_AXF_3 1UF/10V 10UF/6.3V
AU18
VCCA_SM_4 Max: 100mA
FB 220@100M Hz * 1 AU17 AJ50

2
GND GND GND VCCA_SM_5 VCC_DMI

1
A SM
AT22 C1024
VCCA_SM_7 GND GND +1.8V 0.1UF/10V
AT21 BK24
VCCA_SM_8 VCC_SM_CK_1

SM CK
VCCA_TVA_DAC/VCCA_TVB_DAC/VCCA_TVC_DAC AT19 BK23

2
VCCA_SM_9 VCC_SM_CK_2
AT18
VCCA_SM_10 VCC_SM_CK_3
BJ24 Max: 200mA
0.01 uF * 1 AT17
VCCA_SM_11 VCC_SM_CK_4
BJ23
AR17 GND
0.1 uF * 1 VCCA_SM_NCTF_1

1
+1.25VS AR16 C1025 C1026
+1.5VS VCCA_SM_NCTF_2 10UF/6.3V 0.1UF/10V
L1009 Max:640mA Max: 60mA A43 +VCC_TX_LVDS VCC_SM_CK

2
VCC_TX_LVDS

A CK
1 2 +VCCA_SM +VCCA_SM_CK BC29 +3VS
VCCA_SM_CK_1
VCCA_SM BB29
VCCA_SM_CK_2 0.1 uF * 1
1

+ 80Ohm/100Mhz C40 GND GND


VCC_HV_1 22 uF * 1
1

1
CE1004 Irat=2A C1028 C1029 4.7 uF * 1 VCCD_TVDAC/VCCD_CRT C1030 C1031 C25 B40
VCCA_TVA_DAC_1 VCC_HV_2

HV
100UF/2.5V C1027 1UF/10V 0.1UF/10V 10UF/6.3V 0.1UF/10V B25 VCC_HV 10 uF or 22 uF * 1
1 uF * 1 VCCA_TVA_DAC_2

1
10UF/6.3V 0.01 uF * 1 +VCCA_CRT_DAC C27 +VCCP C1032
2

2
22 uF * 1 VCCA_TVB_DAC_1 0.1UF/10V
0.1 uF * 1 B27
VCCA_TVB_DAC_2 VCC_PEG_1
AD51 0.1 uF * 1 1.0 uH * 1

TV
B28 W50 Max: 1260mA 1 Ohm * 1

2
VCCA_TVC_DAC_1 VCC_PEG_2

PEG
A28 W51
GND GND GND GND GND GND VCCA_TVC_DAC_2 VCC_PEG_3
V49
VCC_PEG_4 GND +VCCP
B V50 B
VCC_PEG_5

D TV/CRT
M32
+1.25VS VCCD_CRT L1013
L29
VCCD_TVDAC Max: 260mA
AH50 1 2
VCC_RXR_DMI_1

DMI
L1010 Max:35mA +1.25VS +VCCD_QDAC N28 AH51
+VCCA_SM_CK VCCD_QDAC VCC_RXR_DMI_2 120Ohm/100Mhz
1 2
Max: 250mA AN2 Irat=600mA
VCCD_HPLL

1
120Ohm/100Mhz VCCA_SM_CK A7 C1046 C1047
VTTLF1
1

VTTLF
Irat=600mA C1033 C1034 VCCD_PEG_PLL +1.8V +VCCA_PEG_PLL U48 F2 0.1UF/10V
10UF/6.3V 0.1UF/10V VCCD_PEG_PLL VTTLF2
0.1 uF * 1 AH1

2
VTTLF3 1UF/10V
22 uF * 1 0.1 uF * 1 J41
2

VCCD_LVDS_1

LVDS
Max: 150mA H42
VCCD_LVDS_2
1

2
C1037 C1038 C1039
C1035 C1036 0.47UF/16V 0.47UF/16V 0.47UF/16V
+1.8V GND GND 0.1UF/10V 0.1UF/10V VCCD_LVDS c0603 c0603 c0603
2

1
CRESTLINE_965GM
L1011 Max:10mA 1.0 uF * 1
1 2 +VCCA_LVDS GND GND
GND GND GND GND GND
120Ohm/100Mhz
1

Irat=600mA C1040 C1041 VCCA_LVDS +3VS VCC_RXR & VCC_PEG


1UF/10V 0.1UF/10V VTT_LF
1.0 nF * 1 10 uF * 1
2

0.47 uF * 3 220 uF * 5
R1001
91nH * 1
+1.8V GND GND 10KOhm
+3VS_DAC
2

L1012 Max:100mA +5V


1 2 +VCC_TX_LVDS U1001 M0212
VCCTX_LVDS MAX8863
A A
120Ohm/100Mhz 1 4 1 T1001
SHDN# OUT
1

Irat=600mA C1044 C1045 1.0 nF * 1 2 R1002 TPC26T


10UF/6.3V 0.1UF/10V GND 3VS_DAC_ADJ 1
220 uF * 1 3 5 2
IN SET
2

1 uH at 78m Ohm * 1 35.7KOhm


<Variant Name>
1

1
C1049 MAX8863TEUK
C1048 C1050
GND GND 0.1UF/50V 4.7UF/16V Title : 965GM(PWR2)
2

20KOhm R1003 0.1UF/50V

Engineer: Julian Kuo


1

ASUSALPHATeK COMPUTER INC.


Size Project Name Rev
GND GND GND GND GND Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 10 of 66
2 1
5 4 3 2 1

U0601I

A13 AW24
VSS_1 VSS_100
A15 AW29
VSS_2 VSS_101
A17 AW32
VSS_3 VSS_102
A24 AW5
VSS_4 VSS_103
AA21 AW7
VSS_5 VSS_104 U0601J
AA24 AY10
VSS_6 VSS_105
AA29 AY24 C46 W11
VSS_7 VSS_106 VSS_199 VSS_287
D AB20 AY37 C50 W39 D
VSS_8 VSS_107 VSS_200 VSS_288
AB23 AY42 C7 W43
VSS_9 VSS_108 VSS_201 VSS_289
AB26 AY43 D13 W47
VSS_10 VSS_109 VSS_202 VSS_290
AB28 AY45 D24 W5
VSS_11 VSS_110 VSS_203 VSS_291
AB31 AY47 D3 W7
VSS_12 VSS_111 VSS_204 VSS_292
AC10 AY50 D32 Y13
VSS_13 VSS_112 VSS_205 VSS_293
AC13 B10 D39 Y2
VSS_14 VSS_113 VSS_206 VSS_294
AC3 B20 D45 Y41
VSS_15 VSS_114 VSS_207 VSS_295
AC39 B24 D49 Y45
VSS_16 VSS_115 VSS_208 VSS_296
AC43 B29 E10 Y49
VSS_17 VSS_116 VSS_209 VSS_297
AC47 B30 E16 Y5
VSS_18 VSS_117 VSS_210 VSS_298
AD1 B35 E24 Y50
VSS_19 VSS_118 VSS_211 VSS_299
AD21 B38 E28 Y11
VSS_20 VSS_119 VSS_212 VSS_300
AD26 B43 E32 P29
VSS_21 VSS_120 VSS_213 VSS_301
AD29 B46 E47 T29
VSS_22 VSS_121 VSS_214 VSS_302
AD3 B5 F19 T31
VSS_23 VSS_122 VSS_215 VSS_303
AD41 B8 F36 T33
VSS_24 VSS_123 VSS_216 VSS_304
AD45 BA1 F4 R28
VSS_25 VSS_124 VSS_217 VSS_305
AD49 BA17 F40
VSS_26 VSS_125 VSS_218
AD5 BA18 F50
VSS_27 VSS_126 VSS_219
AD50 BA2 G1
VSS_28 VSS_127 VSS_220
AD8 BA24 G13 AA32
VSS_29 VSS_128 VSS_221 VSS_306
AE10 BB12 G16 AB32
VSS_30 VSS_129 VSS_222 VSS_307
AE14 BB25 G19 AD32
VSS_31 VSS_130 VSS_223 VSS_308
AE6 BB40 G24 AF28
VSS_32 VSS_131 VSS_224 VSS_309
AF20 BB44 G28 AF29
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
G29
G33
VSS_225
VSS_226
VSS_227
VSS_310
VSS_311
VSS_312
AT27
AV25
AF31 BC16 G42 H50
VSS_36 VSS_135 VSS_228 VSS_313
AG2 BC24 G45
VSS_37 VSS_136 VSS_229
AG38 BC25 G48
C VSS_38 VSS_137 VSS_230 C
AG43 BC36 G8
VSS_39 VSS_138 VSS_231 GND
AG47 BC40 H24
VSS_40 VSS_139 VSS_232
AG50
VSS_41 VSS_140
BC51 H28
VSS_233
07/04/03 To change name from Partial CLK
AH3 BD13 H4 Gating Disable into Reserved --- Iverson
VSS_42 VSS_141 VSS_234
AH40 BD2 H45 GMCH Strapping
VSS_43 VSS_142 VSS_235
AH41 BD28 J11
VSS_44 VSS_143 VSS_236
AH7 BD45 J16
VSS_45 VSS_144 VSS_237
AH9 BD48 J2
VSS_46 VSS_145 VSS_238
AJ11
VSS_47 VSS_146
BD5 J24
VSS_239 CFG5 : DMI Strap CFG19 : DMI Lane Reversal CFG[13:12] : GMCH Test Mode
AJ13 BE1 J28
VSS_48 VSS_147 VSS_240
AJ21 BE19 J33
AJ24
AJ29
VSS_49
VSS_50
VSS_51
VSS_148
VSS_149
VSS_150
BE23
BE30
J35
J39
VSS_241
VSS_242
VSS_243
VSS 0 = DMI x2 0 = Normal Operation (D) 00= Reserved
AJ32
VSS_52 VSS_151
BE42 1 = DMI x4 (D) 1 = Lanes Reversed +3VS
01 = XOR Mode Enable
AJ43 BE51 K12
VSS_53 VSS_152 VSS_245 R1120 R1126
AJ45
VSS_54 VSS_153
BE8 K47
VSS_246 10 = All Z Mode Enable
AJ49 BF12 K8 7 MCH_CFG_5 1 2 7 MCH_CFG_19 1 2
VSS_55 VSS_154 VSS_247
AK20
VSS_56 VSS_155
BF16 L1
VSS_248 11 = Normal Operation (D)
AK21 BF36 L17 4.02KOHM 4.02KOHM
VSS_57 VSS_156 VSS_249 @ GND @ R1108
AK26 BG19 L20
VSS_58 VSS_157 VSS_250
AK28 BG2 L24 7 MCH_CFG_12 1 2
VSS_59 VSS_158 VSS_251
AK31
VSS_60 VSS_159
BG24 L28
VSS_252 CFG8 : Low Power PCI-E CFG20 : Concurrent SDVO / PCIe
4.02KOHM
AK51 BG29 L3
VSS_61 VSS_160 VSS_253 @
AL1 BG39 L33
VSS_62 VSS_161 VSS_254
AM11
VSS_63 VSS_162
BG48 L49
VSS_255 0 = Normal mode 0 = Only one is operational (D)
AM13 BG5 M28 R1110
VSS_64 VSS_163 VSS_256
AM3
VSS_65 VSS_164
BG51 M42
VSS_257 1 = Low Power Mode (D) 1 = operate simultaneous +3VS 7 MCH_CFG_13 1 2
AM4 BH17 M46
VSS_66 VSS_165 VSS_258 R1125 R1116 4.02KOHM
AM41 BH30 M49
VSS_67 VSS_166 VSS_259 @
AM45 BH44 M5 7 MCH_CFG_8 1 2 7 MCH_CFG_20 1 2
VSS_68 VSS_167 VSS_260
B AN1 BH46 M50 B
VSS_69 VSS_168 VSS_261 4.02KOHM 4.02KOHM GND
AN38 BH8 M9
VSS_70 VSS_169 VSS_262 @ GND @
AN39 BJ11 N11
VSS_71 VSS_170 VSS_263
AN43 BJ13 N14
VSS_72 VSS_171 VSS_264
AN5
VSS_73 VSS_172
BJ38 N17
VSS_265 CFG9 : PCIE Graphic Lane
AN7 BJ4 N29
VSS_74 VSS_173 VSS_266
AP4 BJ42 N32
VSS_75 VSS_174 VSS_267
AP48
VSS_76 VSS_175
BJ46 N36
VSS_268 0 = Reverse Lane PCI-E (SDVO) 0 = IntelR Management Engine
AP50 BK15 N39
AR11
VSS_77 VSS_176
BK17 N44
VSS_269
1 = Normal Operation (D) Crypto Transport Layer Security
VSS_78 VSS_177 VSS_270 (TLS) cipher suite with no
AR2 BK25 N49
VSS_79 VSS_178 VSS_271 R1109
AR39 BK29 N7 confidentiality
VSS_80 VSS_179 VSS_272
AR44 BK36 P19 7 MCH_CFG_9 1 2
VSS_81 VSS_180 VSS_273
AR47 BK40 P2
VSS_82 VSS_181 VSS_274 4.02KOHM
AR7
VSS_83 VSS_182
BK44 P23
VSS_275 1= Intel Management Engine
AT10 BK6 P3 @ GND
AT14
VSS_84 VSS_183
BK8 P50
VSS_276 Crypto TLS Cipher Suite with
VSS_85 VSS_184 VSS_277 confidentiality (D)
AT41 BL11 R49 CFG16 : FSB Dynamic ODT
VSS_86 VSS_185 VSS_278
AT49 BL13 T39
VSS_87 VSS_186 VSS_279
AU1 BL19 T43
VSS_88 VSS_187 VSS_280
AU23
VSS_89 VSS_188
BL22 T47
VSS_281 0 = Dynamic ODT Disable
AU29 BL37 U41
VSS_90 VSS_189 VSS_282 R1127
AU3
VSS_91 VSS_190
BL47 U45
VSS_283 1 = Dynamic ODT Enable (D)
AU36 C12 U50 7 MCH_CFG_7 1 2 07/04/03 To add the R1127
VSS_92 VSS_191 VSS_284 R1121
AU49 C16 V2 to pull down on CFG_7
VSS_93 VSS_192 VSS_285 4.02KOHM
AU51 C19 V3 7 MCH_CFG_16 1 2 Signal.--- Iverson
VSS_94 VSS_193 VSS_286 @ GND
AV39 C28
VSS_95 VSS_194 4.02KOHM
AV48 C29
VSS_96 VSS_195 CRESTLINE_965GM @ GND
AW1 C33
VSS_97 VSS_196
AW12 C36
VSS_98 VSS_197
AW16 C41
A VSS_99 VSS_198 GND
A

CRESTLINE_965GM

<Variant Name>
GND GND

Title : 965GM(GND)
ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 11 of 66
2 1
5 4 3 2 1

3~3.6V
Full Active: 410 mA(Max. 500 mA)
3~3.6V
S0-S1 M: 410 mA(Max. 500 mA)
LCD Panel Power +3VS

+3V +12VS

1
D C1202 C1203 D

1
0.1UF/10V 0.01UF/25V

2
R1202 R1203
100KOhm 22kOhm Q1201
1 6 L1202 +3VS_LCD
2 D 5 80Ohm/100Mhz GND

2
+3VSLCD_G 3 S 4 +3VSLCD 1 2
3 G

1
Q1202 3 3 C1204 SI3456BDV C1201 C1205 C1206 C1207
D D
2N7002

2
Q1203 1UF/25V 0.1UF/10V 10UF/10V 1UF/10V 0.1UF/10V

2
11 11 2N7002 R1206
7 L_VDDEN
G G 120Ohm
1

2 S 2 S GND
2

2
R1204 GND GND

1
100KOhm
GND GND

3
3
2

D
Q1204
GND +3VSLCD_DG 11 2N7002
G
2 S

2
GND

C C

LCD Backlight Control


Inverter Board
BIOS
LCD_BACKOFF#
built in 15.4W
When user push "Fn+F7" button LCD Panel
BIOS active this pin to turn On/Off backlight

EC
INVTER_DA:
EC output D/A signal ( adjust voltage level) to
adjust backlight +3VS AC_BAT_SYS_INV +3VA

07/04/10 To change net name from PCI_RST# into SUSB_EC# --- Iverson
LCD LVDS & INVERTER Interface
1

1
D1204 RB717F R1205 L1207 L1208
LCD_BACKOFF# 1 10KOhm l0805_h43 l0805_h43
29 LCD_BACKOFF#
3 BL_EN_L r0402 80Ohm/100Mhz 80Ohm/100Mhz
2

2
SUSB_EC# 2
29,40 SUSB_EC#
2

L_BKLTEN 1 70/04/19 To add the D1206 ---iverson CON1202


B 7 L_BKLTEN B
3 32
LID_SW# AC_INV SIDE2
29 LID_SW# 2 1 2 LVDS_L0N 7
L1209 1 2
3 4 LVDS_L0P 7
2

D1201 RB717F 3 4
7 L_BKLTCTL 1 2 5 6
120Ohm/100Mhz D1206 +3VS_LVDS 5 6
7 8 LVDS_L1N 7
N/AL1211 L1210 GND 7 8
0603-050E101NP-LF 9 10 LVDS_L1P 7
9 10
29 INVTER_DA 1 2 1KOhm 11 12
120Ohm/100Mhz L1212 11 12
13 14 LVDS_L2N 7
1

@ 120Ohm/100Mhz 13 14
15 16 LVDS_L2P 7
1

L1213 LID_SW#_CON 15 16
1 2 17 18
1 2 ADJ_BL_CON 17 18
29 BRIGHT_PWM 19 20 LVDS_LCLKN 7
120Ohm/100Mhz BL_EN_CON 19 20
1 2 21 22 LVDS_LCLKP 7
@ +3VA_CON 21 22 L1204 33Ohm
23 24
L1206 23 24 EDID_CLK_LCD
25 26 1 2 EDID_CLK 7
80Ohm/100Mhz 25 26 EDID_DAT_LCD
27 28

1
27 28
+3VS 1 2 29 30 +3VS_LCD
29 30 C1209
31
1

1
C1214 C1215 C1216 C1217 C1218 C1219 L1203 SIDE1

2
0.1UF/10V 80Ohm/100Mhz C1208 WTOB_CON_30P 47PF/50V
+3VA_EC 1000PF/50V 1000PF/50V 0.1UF/25V 1UF/25V 1000PF/50V 0.1UF GND N/A
2

2
c0402 GND c0402
close to LVDS connector GND L1205 33Ohm
1 2 EDID_DAT 7
GND

1
D1205
2 GND C1210
+3VS_LCD
3 LID_SW#_CON

2
47PF/50V
1 N/A
A c0402 A
BAV99

GND

GND

Title : LVDS & INVERTER


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 12 of 66
2 1
5 4 3 2 1

CRT OUT
07/07/02 To add the L1307 L1308 L1309. Remove the Pi-type filter---IVERSON
+5VS_CRT
checklist suggests 47ohm/100MHz
07/03/26 Modify Jump type---Feng

2
JP1301 L1304
1 2 CRT_R 1 2 CRT_R_CON F1302
D 7 CRT_RED D
1A/32V

2
@ SHORT_PIN 0.082uH @ C1308

2
R1301 C1309

1
4

3
150Ohm 10PF/50V

1
r0402 10PF/50V L1307 @

1
@

1
90Ohm/100Mhz

2
GND

1
GND C1317
0.1UF/10V

2
GND
JP1302 L1305
1 2 CRT_G 1 2 CRT_G_CON
7 CRT_GREEN
GND

2
@ SHORT_PIN 0.082uH @ C1310

2
R1305 C1311

3
150Ohm 10PF/50V

1
r0402 10PF/50V L1308 @

1
@

1
90Ohm/100Mhz

2
GND

GND CON1302

16
GND
JP1303 L1306
1 2 CRT_B 1 2 CRT_B_CON 6
7 CRT_BLUE
CRT_R_CON 1 11

2
C SHORT_PIN 0.082uH @ C1312 7 C

2
@ R1306 C1301 CRT_G_CON 2 12 DDC_DAT_CON

3
150Ohm 10PF/50V 8

1
r0402 10PF/50V L1309 @ CRT_B_CON 3 13 HSYNC_CON

1
@ 9

1
90Ohm/100Mhz GND VSYNC_CON
4 14

2
10
5 15 DDC_CLK_CON
GND

GND
D_SUB_15P

17
28 CRT_HSYNC
HSYNC_5 1 R1307 2 HSYNC_CON
30.1Ohm

2
C1313

22PF/50V GND 07/06/26 To change the CON1302 P/N from 12G10111015M

1
into 12G10111215TTB --- iverson
D1309
2 GND
+3VS
3 CRT_R_CON
070507 To add the R1315 0Ohm --- iverson. 1

BAV99 VSYNC_5 1 R1308 2 VSYNC_CON


28 CRT_VSYNC
1 R1315 2 30.1Ohm

2
0Ohm @ GND C1314
D1307 07/03/26 Modify into
D1306 2 07/05/17 To remove the 22PF/50V
+3VS 30.1 Ohm---Feng

1
B B
1 2 3 CRT_G_CON
+5VS +5VS_CRT Q1302 and Q1304 --- iverson
1
1N4148W
BAV99 GND
GND

D1308 Q1301
2 2N7002
+3VS
0705/23 To change the R1309/R1310/R1311/R1312 from 3 CRT_B_CON R1313

S 2
DDC2BD_5 DDC_DAT_CON

D
2.2KOhm into 2KOhm --- iverson. 1 7 CRT_DDC_DATA 2 3 1 2
+5VS_CRT

2
BAV99 0Ohm C1315

G
1
47PF/50V

1
R1309 1 2KOhm 2 DDC2BD_5 GND c0402

1
R1310 1 2KOhm 2 DDC2BC_5
D1305
+12VS
2 GND
+3VS +3VS
3 HSYNC_CON
1
1

R1311 1 2KOhm 2 CRT_DDC_DATA BAV99


1
G

R1314
R1312 1 2KOhm CRT_DDC_CLK GND DDC2BC_5 DDC_CLK_CON
2 S

2 7 CRT_DDC_CLK 2 3 1 2
D

D1301

2
2 0Ohm C1316
+3VS
3 VSYNC_CON 2N7002 47PF/50V
1 Q1303 c0402

1
A BAV99 A
GND
GND

07/03/30 To change net name from


VSYNC_5/HSYNC_5 into
VSYNC_CON/HSYNC_CON---Feng
Title : CRT
ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 13 of 66
3 2 1
5 4 3 2 1

+1.8V
CON1401B
Layout Note: Place these Caps near SO DIMM 0
112 18
VDD1 VSS16
111 24
VDD2 VSS17
117 41
VDD3 VSS18
96 53
VDD4 VSS19
95 42
VDD5 VSS20

1
M_A_DQ[0..63] 8 118 54
M_CLK_DDR0 C1402 C1403 C1404 C1405 VDD6 VSS21
8,16 M_A_A[0..13] 81 59
CON1401A 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VDD7 VSS22
82 65

2
M_A_A0 M_A_DQ58 VDD8 VSS23
102 5 87 60
A0 DQ0 VDD9 VSS24
2

D D
C1406 M_A_A1 101 7 M_A_DQ57 103 66
PLACE NEAR SO-DIMM_1 M_A_A2 A1 DQ1 M_A_DQ60 VDD10 VSS25
100 17 88 127
10PF/50V M_A_A3 A2 DQ2 M_A_DQ56 +3VS GND VDD11 VSS26
99 19 104 139
1

@ M_A_A4 A3 DQ3 M_A_DQ61 SWAP VDD12 VSS27


98 4 128
M_CLK_DDR#0 M_A_A5 A4 DQ4 M_A_DQ63 VSS28
97 6 199 145
M_A_A6 A5 DQ5 M_A_DQ59 VDDSPD VSS29
94 14 165
A6 DQ6 VSS30

1
M_A_A7 92 16 M_A_DQ62 @ 83 171
M_A_A8 A7 DQ7 M_A_DQ51 C1424 C1407 NC1 VSS31
93 23 120 172
M_CLK_DDR1 M_A_A9 A8 DQ8 M_A_DQ55 2.2UF/6.3V NC2 VSS32
91 25 0.1UF/16V 2 R1401 1 50 177

2
A9 DQ9 7 PM_EXTTS#0 NC3 VSS33
M_A_A10 105 35 M_A_DQ49 0Ohm 69 187
M_A_A11 A10/AP DQ10 M_A_DQ53 M_VREF_MCH @ NC4 VSS34
90 37 163 178
A11 DQ11 NCTEST VSS35
2

C1408 M_A_A12 89 20 M_A_DQ54 SWAP GND GND 190


PLACE NEAR SO-DIMM_1 M_A_A13 A12 DQ12 M_A_DQ50 VSS36
116 22 1 9
10PF/50V A13 DQ13 M_A_DQ48 VREF VSS37
86 36 21
1

7,16 M_A_A14 A14 DQ14 VSS38

1
@ 84 38 M_A_DQ52 07/04/01 To add the C1424 2.2uF on C1409 201 33
M_CLK_DDR#1 A15 DQ15 M_A_DQ42 2.2UF/6.3V C1410 GND0 VSS39
8,16 M_A_BS2 85 43 VDDSPD signal. --- Iverson 202 155
A16_BA2 DQ16 M_A_DQ45 GND1 VSS40
45 0.1UF/16V 34

2
DQ17 M_A_DQ40 VREF -> 10/10 mils VSS41
8,16 M_A_BS0 107 55 203 132
BA0 DQ18 M_A_DQ41 NP_NC1 VSS42
07/04/04 To swap CLK0 and CLK1 8,16 M_A_BS1 106
BA1 DQ19
57 204
NP_NC2 VSS43
144
by lauot request---Feng 110 44 M_A_DQ43 GND GND 156
7,16 M_CS#0 S0# DQ20 VSS44
115 46 M_A_DQ46 47 168
7,16 M_CS#1 S1# DQ21 VSS1 VSS45
30 56 M_A_DQ44 133 2
7 M_CLK_DDR1 CK0 DQ22 VSS2 VSS46
32 58 M_A_DQ47 183 3
7 M_CLK_DDR#1 CK0# DQ23 +1.8V +1.8V VSS3 VSS47
164 61 M_A_DQ39 77 15
7 M_CLK_DDR0 CK1 DQ24 VSS4 VSS48
166 63 M_A_DQ32 12 27
7 M_CLK_DDR#0 CK1# DQ25 VSS5 VSS49
79 73 M_A_DQ33 48 39
7,16 M_CKE0 CKE0 DQ26 VSS6 VSS50
80 75 M_A_DQ36 184 149
7,16 M_CKE1 CKE1 DQ27 VSS7 VSS51

1
113 62 M_A_DQ38 + + 78 161
C SMBus Slave Address:A0H 8,16 M_A_CAS# CAS# DQ28 M_A_DQ34 CE1401 CE1402 VSS8 VSS52
C
8,16 M_A_RAS# 108 64 71 28
RAS# DQ29 M_A_DQ37 150UF/4V 150UF/4V VSS9 VSS53
8,16 M_A_WE# 109 74 72 40
WE# DQ30 M_A_DQ35 @ @ VSS10 VSS54
198 76 121 138

2
SA0 DQ31 M_A_DQ31 VSS11 VSS55
200 123 122 150
SA1 DQ32 M_A_DQ27 VSS12 VSS56
5,15,19,26 SMB_CLK_S 197 125 196 162
SCL DQ33 M_A_DQ29 GND GND VSS13 VSS57
5,15,19,26 SMB_DAT_S 195 135 193
SDA DQ34 M_A_DQ25 VSS14
137 8
DQ35 M_A_DQ30 SWAP VSS15
7,16 M_ODT0 114 124
ODT0 DQ36 M_A_DQ26
7,16 M_ODT1 119 126 DDR_DIMM_200P
ODT1 DQ37 M_A_DQ24
8 M_A_DM[0..7] 134
M_A_DM7 DQ38 M_A_DQ28 GND GND
10 136
M_A_DM6 DM0 DQ39 M_A_DQ16
26 141
GND M_A_DM5 DM1 DQ40 M_A_DQ19
52 143
M_A_DM4 DM2 DQ41 M_A_DQ22
67 151
M_A_DM3 DM3 DQ42 M_A_DQ17
130 153
M_A_DM2 DM4 DQ43 M_A_DQ23 SWAP
147 140
M_A_DM1 DM5 DQ44 M_A_DQ18
170 142
M_A_DM0 DM6 DQ45 M_A_DQ20 +1.8V
185 152
DM7 DQ46 M_A_DQ21
8 M_A_DQS[0..7] 154
M_A_DQS7 DQ47 M_A_DQ13
13 157
M_A_DQS6 DQS0 DQ48 M_A_DQ11
31 159
DQS1 DQ49

1
M_A_DQS5 51 173 M_A_DQ8 C1411 C1412 C1401 C1413 C1414
M_A_DQS4 DQS2 DQ50 M_A_DQ12
70 175
M_A_DQS3 DQS3 DQ51 M_A_DQ15 SWAP 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
131 158

2
M_A_DQS2 DQS4 DQ52 M_A_DQ9
148 160
M_A_DQS1 DQS5 DQ53 M_A_DQ14
169 174
M_A_DQS0 DQS6 DQ54 M_A_DQ10
8 M_A_DQS#[0..7] 188 176
B
M_A_DQS#7 DQS7 DQ55 M_A_DQ2 GND B
11 179
M_A_DQS#6 DQS#0 DQ56 M_A_DQ3
29 181
M_A_DQS#5 DQS#1 DQ57 M_A_DQ0
49 189
M_A_DQS#4 DQS#2 DQ58 M_A_DQ4
68 191
M_A_DQS#3 DQS#3 DQ59 M_A_DQ7 SWAP
129 180
M_A_DQS#2 DQS#4 DQ60 M_A_DQ1
146 182
M_A_DQS#1 DQS#5 DQ61 M_A_DQ5
167 192
M_A_DQS#0 DQS#6 DQ62 M_A_DQ6
186 194
DQS#7 DQ63 +1.8V
DDR_DIMM_200P Layout Note: Place these Caps near SO DIMM 0

1
C1419 C1420 C1421 C1422 C1423
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2
GND GND GND GND GND

SO-DIMM 0 is placed nearly from the


GMCH than SO-DIMM 1
A A

<Variant Name>

Title : DDR2 SO-DIMM0


ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 14 of 66
2 1
5 4 3 2 1

Address reference +1.8V, add four +1.8V


0.1uF decoupling CAP. CON1501B
112 18
VDD1 VSS16
111 24
VDD2 VSS17
117 41
VDD3 VSS18

1
96 53
C1502 C1503 C1504 C1505 VDD4 VSS19
95 42
D
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VDD5 VSS20 D
118 54

2
c0402 c0402 c0402 c0402 VDD6 VSS21
81 59
VDD7 VSS22
82 65
VDD8 VSS23
07/04/01 To add the C1523 2.2uF on GND GND GND GND 87
VDD9 VSS24
60
VDDSPD signal. --- Iverson 103 66
VDD10 VSS25
SMBus Slave Address:A4H 88
VDD11 VSS26
127
+3VS 104 139
VDD12 VSS27
128
M_B_DQ[0..63] VSS28
8 M_B_DQ[0..63] 199 145
VDDSPD VSS29
165
@ VSS30
83 171
NC1 VSS31

1
M_CLK_DDR2 C1523 C1506 120 172
8,16 M_B_A[0..13] NC2 VSS32
7 PM_EXTTS#1 2 R1502 1 50 177
2.2UF/6.3V 0.1UF/16V 0Ohm NC3 VSS33
69 187

2
CON1501A NC4 VSS34
2

C1507 PLACE NEAR SO-DIMM_0 VREF -> 10/10 mils M_VREF_MCH @ 163 178
M_B_A0 M_B_DQ63 NCTEST VSS35
102 5 190
10PF/50V M_B_A1 A0 DQ0 M_B_DQ58 GND GND VSS36
101 7 1 9
1

@ M_B_A2 A1 DQ1 M_B_DQ56 VREF VSS37


100 17 21
A2 DQ2 VSS38

1
M_CLK_DDR#2 M_B_A3 99 19 M_B_DQ60 C1508 C1501 201 33
M_B_A4 A3 DQ3 M_B_DQ59 GND0 VSS39
98
A4 DQ4
4 SWAP 202
GND1 VSS40
155
M_B_A5 97 6 M_B_DQ62 1UF/6.3V 0.1UF/16V 34

2
M_B_A6 A5 DQ5 M_B_DQ61 VSS41
94 14 203 132
M_CLK_DDR3 M_B_A7 A6 DQ6 M_B_DQ57 NP_NC1 VSS42
92 16 204 144
M_B_A8 A7 DQ7 M_B_DQ54 NP_NC2 VSS43
93 23 156
M_B_A9 A8 DQ8 M_B_DQ53 GND VSS44
91 25 47 168
A9 DQ9 VSS1 VSS45
2

C1509 PLACE NEAR SO-DIMM_0 M_B_A10 105 35 M_B_DQ50 133 2


M_B_A11 A10/AP DQ10 M_B_DQ55 VSS2 VSS46
90 37 183 3
10PF/50V M_B_A12 A11 DQ11 M_B_DQ48 VSS3 VSS47
89 20 77 15
1

@ M_B_A13 A12 DQ12 M_B_DQ51 VSS4 VSS48


116 22 12 27
M_CLK_DDR#3 A13 DQ13 M_B_DQ49 VSS5 VSS49
C
7,16 M_B_A14 86 36 48 39 C
A14 DQ14 M_B_DQ52 VSS6 VSS50
84 38 184 149
A15 DQ15 M_B_DQ42 VSS7 VSS51
8,16 M_B_BS2 85 43 78 161
A16_BA2 DQ16 M_B_DQ44 VSS8 VSS52
45 71 28
DQ17 M_B_DQ47 VSS9 VSS53
8,16 M_B_BS0 107 55 72 40
BA0 DQ18 M_B_DQ43 VSS10 VSS54
8,16 M_B_BS1 106 57 121 138
BA1 DQ19 M_B_DQ40 VSS11 VSS55
7,16 M_CS#2 110 44 122 150
S0# DQ20 M_B_DQ45 VSS12 VSS56
7,16 M_CS#3 115 46 196 162
S1# DQ21 M_B_DQ41 VSS13 VSS57
7 M_CLK_DDR3 30 56 193
CK0 DQ22 M_B_DQ46 VSS14
7 M_CLK_DDR#3 32 58 8
CK0# DQ23 M_B_DQ35 VSS15
7 M_CLK_DDR2 164 61
CK1 DQ24 M_B_DQ38
7 M_CLK_DDR#2 166 63 DDR_DIMM_200P
CK1# DQ25 M_B_DQ34
7,16 M_CKE2 79 73
CKE0 DQ26
1

GND 80 75 M_B_DQ39 GND GND


7,16 M_CKE3 CKE1 DQ27
+3VS R1504 0Ohm 113 62 M_B_DQ36
8,16 M_B_CAS# CAS# DQ28
108 64 M_B_DQ32
8,16 M_B_RAS# RAS# DQ29
+3VS @ 8,16 109 74 M_B_DQ37
M_B_WE# WE# DQ30
1 R1501 2 +3VS_SET 198 76 M_B_DQ33
2

SA0 DQ31
1 R1506 2 10KOhm 200 123 M_B_DQ30
SA1 DQ32
1

10KOhm M_B_DQ31 +1.8V


5,14,19,26 SMB_CLK_S 197
SCL DQ33
125 Layout Note: Place these Caps near SO DIMM 0
@ 195 135 M_B_DQ24
5,14,19,26 SMB_DAT_S SDA DQ34
R1503 137 M_B_DQ27
0Ohm DQ35 M_B_DQ25
7,16 M_ODT2 114
ODT0 DQ36
124 SWAP

1
119 126 M_B_DQ26 C1510 C1511 C1512 C1513
7,16 M_ODT3
2

ODT1 DQ37 M_B_DQ29


8 M_B_DM[0..7] 134
M_B_DM7 DQ38 M_B_DQ28 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
10 136

2
M_B_DM6 DM0 DQ39 M_B_DQ22
26 141
GND M_B_DM5 DM1 DQ40 M_B_DQ18
52 143
M_B_DM4 DM2 DQ41 M_B_DQ17
67 151
M_B_DM3 DM3 DQ42 M_B_DQ20 GND
130 153
B
M_B_DM2 DM4 DQ43 M_B_DQ23 B
147 140
M_B_DM1 DM5 DQ44 M_B_DQ19
07/05/04 To add the R1504、R1506、R1503 to 170
DM6 DQ45
142
M_B_DM0 185 152 M_B_DQ16
configure memory. --- iverson DM7 DQ46 M_B_DQ21
8 M_B_DQS[0..7] 154
M_B_DQS7 DQ47 M_B_DQ15 +1.8V
13
DQS0 DQ48
157 Layout Note: Place these High-Freq decoupling Caps near the GMCH
M_B_DQS6 31 159 M_B_DQ9
M_B_DQS5 DQS1 DQ49 M_B_DQ13
51 173
DQS2 DQ50

1
M_B_DQS4 70 175 M_B_DQ12
M_B_DQS3 DQS3 DQ51 M_B_DQ10 C1514 C1515 C1516 C1517
131 158 SWAP
M_B_DQS2 DQS4 DQ52 M_B_DQ11 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
148 160

2
M_B_DQS1 DQS5 DQ53 M_B_DQ14 c0402 c0402 c0402 c0402
169 174
M_B_DQS0 DQS6 DQ54 M_B_DQ8
8 M_B_DQS#[0..7] 188 176
M_B_DQS#7 DQS7 DQ55 M_B_DQ3 GND GND GND GND
11 179
M_B_DQS#6 DQS#0 DQ56 M_B_DQ2
29 181
M_B_DQS#5 DQS#1 DQ57 M_B_DQ1
49 189
M_B_DQS#4 DQS#2 DQ58 M_B_DQ4
68 191
M_B_DQS#3 DQS#3 DQ59 M_B_DQ7
129 180
M_B_DQS#2 DQS#4 DQ60 M_B_DQ6
146 182
M_B_DQS#1 DQS#5 DQ61 M_B_DQ5 +1.8V
167
DQS#6 DQ62
192 Layout Note: Place these CAPs near the GMCH
M_B_DQS#0 186 194 M_B_DQ0
DQS#7 DQ63
1

1
DDR_DIMM_200P
C1518 C1519 C1520 C1521 C1522
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V
2

2
07/06/27 modify the CON1501 pcb footprint---iverson
GND GND GND GND GND

A A

<Variant Name>

Title : DDR2 SO-DIMM1


ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 15 of 66
2 1
5 4 3 2 1

+0.9VS M_VREF_MCH M_VREF_MCH 7,14,15


M_A_A[0..14] 7,8,14 +0.9VS +0.9VS 37,53

M_A_BS[0..2] 8,14
D 1 16 RN1602A M_CKE3 D
56Ohm M_A_CAS# 8,14
2 15 RN1602B M_CKE2
56Ohm M_A_RAS# 8,14
3 14 RN1602C M_B_A14
56Ohm M_A_WE# 8,14
4 13 RN1602D M_B_A8
56Ohm
5 12 RN1602E M_B_A5
56Ohm
6 11 RN1602F M_B_A1
56Ohm +5V
7 10 RN1602G M_B_BS2
56Ohm
8 9 RN1602H M_B_A9
56Ohm
M_B_A[0..14] 7,8,15 +1.8V
1 16 RN1603A M_B_A12
56Ohm
2 15 RN1603B M_B_A7 07/05/16 To change U1601 PCB footprint
56Ohm M_B_BS[0..2] 8,15

1
3 14 RN1603C M_B_A11 C1627
56Ohm
RN1603D M_B_A3
from sot23_s5_rd1 to nb_sot23_s5_t ---Feng
4 56Ohm 13 M_B_CAS# 8,15

2
5 12 RN1603E M_B_A2 R1601 0.1UF/16V
56Ohm M_B_RAS# 8,15

2
6 11 RN1603F M_B_A0
56Ohm M_B_WE# 8,15
7 10 RN1603G M_B_A10
56Ohm 10KOhm M_VREF_MCH
8 9 RN1603H M_B_BS0 T1601
56Ohm

5
U1601 GND

1
1 16 RN1604A M_B_RAS# 1 V+
56Ohm

1
+
2 15 RN1604B M_B_A4 4
56Ohm

2
3 14 RN1604C M_B_BS1 @ 3
56Ohm -

1
4 13 RN1604D M_B_CAS# C1628 R1602 V-
56Ohm M_CS#[0..3] 7,14,15

1
C 5 12 RN1604E M_B_WE# @ LMV321IDBVR C1629 C
56Ohm

2
6 11 RN1604F M_B_A13 0.01UF/50V
56Ohm M_ODT[0..3] 7,14,15

2
7 10 RN1604G M_B_A6 10KOhm 1UF/10V
56Ohm

2
8 9 RN1604H M_CS#2 N/A c0603
56Ohm M_CKE[0..3] 7,14,15
@ GND
1 2 RN1605A M_CS#3 @
56Ohm
3 4 RN1605B M_ODT2
56Ohm
5 6 RN1605C GND GND
56Ohm
7 8 RN1605D M_ODT3
56Ohm
R1603 1 2 0Ohm
53 0.9V_VTT_REF
1 16 RN1606A M_CKE0
56Ohm
2 15 RN1606B M_CKE1
56Ohm
3 14 RN1606C M_A_A12
56Ohm
4 13 RN1606D M_A_BS2
56Ohm +0.9VS
5 12 RN1606E M_A_A14
56Ohm
6 11 RN1606F M_A_BS1
56Ohm
7 10 RN1606G M_A_A7
56Ohm
8 9 RN1606H M_A_A0
56Ohm
1 16 RN1607A
56Ohm
1

1
2 15 RN1607B M_A_A11 C1602 C1603 C1604 C1605 C1606 C1607 C1608 C1609 C1610 C1611 C1612 C1601 C1613
56Ohm
3 14 RN1607C M_A_A6 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
56Ohm
4 13 RN1607D M_A_A3 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
B 56Ohm B
2

2
5 12 RN1607E M_A_A4
56Ohm
6 11 RN1607F M_A_A2
56Ohm
7 10 RN1607G M_A_BS0
56Ohm
8 9 RN1607H M_A_A10
56Ohm
1 56Ohm 16 RN1608A M_A_A1 Layout note: GND
2 15 RN1608B M_A_A9 +0.9VS
3
56Ohm
56Ohm 14 RN1608C M_A_A8 Place one cap close to every 2 pull-up resistors terminated to +0.9VS
4 13 RN1608D M_A_A5
56Ohm
5 12 RN1608E M_A_A13
56Ohm
6 11 RN1608F M_A_RAS#
56Ohm
7 10 RN1608G M_A_WE#
56Ohm
1

1
8 9 RN1608H M_A_CAS# C1614 C1615 C1616 C1617 C1618 C1619 C1620 C1621 C1622 C1623 C1624 C1625 C1626
56Ohm
c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402 c0402
1 2 RN1609A M_ODT0 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
56Ohm
2

2
3 4 RN1609B M_CS#0
56Ohm
5 6 RN1609C M_CS#1
56Ohm
7 8 RN1609D M_ODT1
56Ohm

GND
A A
<Variant Name>

Title : DDR2 TERM


ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 16 of 66
2 1
5 4 3 2 1

+VCC_RTC C1707
2 1 RTC_X1 LPC_AD0_ICH R1733 1 2 33Ohm LPC_AD0
R7013 LPC_AD0 26,29
2 1 RTCRST# 10PF/50V X1702

2
1 LPC_AD1_ICH R7015 1 2 33Ohm LPC_AD1
LPC_AD1 26,29

1
20KOhm 1 R7014
3
SIDE 10MOhm
2
JRST1 2 LPC_AD2_ICH R1723 LPC_AD2
1 2 33Ohm

2
C1708 LPC_AD2 26,29
C1706 1 2

1
1UF/16V 1 2
D 2 1 32.768KHZ RTC_X2 D
@
07/03/23 Feng 10PF/50V LPC_AD3_ICH R1725 1 2 33Ohm LPC_AD3
LPC_AD3 26,29
GND Change ref name(JRST2)
GND

07/05/15 To change the C1707/C1708 from 18pF into 10pF. --- Iverson LPC_FRAME#_ICH R1727 1 2 33Ohm LPC_FRAME#
LPC_FRAME# 26,29

U1701A
RTC_X1 AG25 E5 LPC_AD0_ICH
RTC_X2 RTCX1 FWH0/LAD0 LPC_AD1_ICH
AF24 F5
RTCX2 FWH1/LAD1 LPC_AD2_ICH
G8
RTCRST# FWH2/LAD2 LPC_AD3_ICH
AF23 F6
RTCRST# FWH3/LAD3
R1702 1 2 1MOhm AD22 C4 LPC_FRAME#_ICH
+VCC_RTC INTRUDER# FWH4/LFRAME#

RTC
LPC
R1703 1 2 332KOhm AF25 G9 1 T1714 TPC26T
R1721 1 INTVRMEN LDRQ0# +VCCP
2 332KOhm AD21 E6 1 T1715 TPC26T
LAN100_SLP LDRQ1#/GPIO23
B24 AF13 A20GATE 29

2
GLAN_CLK A20GATE
AG26 H_A20M# 2
A20M# R1704
D22
LAN_RSTSYNC RX1705 1
C AF26 2 0Ohm H_DPRSTP# 2,7,50
56Ohm C
DPRSTP#
C21 AE26 H_DPSLP# 2
LAN_RXD0 DPSLP#
B21

1
LAN_RXD1
C22 AD24 H_FERR# 2
LAN_RXD2 FERR#

LAN / GLAN
D21 AG29 H_PWRGD 2
LAN_TXD0 CPUPWRGD/GPIO49
E20
LAN_TXD1
C20 AF27 H_IGNNE# 2
RX1717 39Ohm R7016 LAN_TXD2 IGNNE# T1712
21 ACZ_BCLK_AUD 1 2 1
RX1718 1 2 39Ohm 24.9Ohm AH21 AE24 TPC26T +VCCP
21 ACZ_SYNC_AUD GLAN_DOCK#/GPIO13 INIT# H_INIT# 2
RX1719 1 2 39Ohm 1% AC20
21,22 ACZ_RST#_AUD INTR H_INTR 2

CPU
RX1720 1 2 39Ohm 1 2 D25 AH14
21 ACZ_SDOUT_AUD +1.5VS GLAN_COMPI RCIN# RCIN# 29

2
C25 T1713 1
GLAN_COMPO R1709
AD23 TPC26T H_NMI 2
RX1706 1 ACZ_BCLK NMI
35 ACZ_BCLK_MDC 2 39Ohm AJ16 AG28 H_SMI# 2
56Ohm
RX1707 1 ACZ_SYNC HDA_BIT_CLK SMI#
35 ACZ_SYNC_MDC 2 39Ohm AJ15 1 RX1711
HDA_SYNC T1711 24.9Ohm
AA24

1
STPCLK# H_STPCLK# 2
RX1708 1 2 39Ohm ACZ_RST# AE14 TPC26T 1%
35 ACZ_RST#_MDC HDA_RST#
AE27 1 2 PM_THRMTRIP# 2,4
THRMTRIP#
21 ACZ_SDIN0 AJ17
HDA_SDIN0 T1704
35 ACZ_SDIN1 AH17 AA23 1
TPC26T T1703 HDA_SDIN1 TP8
1 AH15 TPC26T
TPC26T T1705 HDA_SDIN2 IDE_PDD0

IHDA
1 AD13 V1
HDA_SDIN3 DD0 IDE_PDD1
U2
RX1710 1 ACZ_SDOUT AE13 DD1 IDE_PDD2
35 ACZ_SDOUT_MDC 2 39Ohm V3
HDA_SDOUT DD2 IDE_PDD3
T1
TPC26T T1716 DD3 IDE_PDD4
1 AE10 V4
TPC26T T1706 HDA_DOCK_EN#/GPIO33 DD4 IDE_PDD5
1 AG14 T5
HDA_DOCK_RST#/GPIO34 DD5 IDE_PDD6
B AB2 B
DD6 IDE_PDD7
30 SATA_LED# AF10 T6
SATALED# DD7 IDE_PDD8
T3
DD8 IDE_PDD9
28 SATA_RXN0 AF6 R2
SATA0RXN DD9 IDE_PDD10
28 SATA_RXP0 AF5 T4
CX1706 2 SATA_TXN0_ICH AH5 SATA0RXP DD10 IDE_PDD11
28 SATA_TXN0 1 3900PF/25V V6
CX1707 2 SATA_TXP0_ICH AH6 SATA0TXN DD11 IDE_PDD12
28 SATA_TXP0 1 3900PF/25V V5
SATA0TXP DD12 IDE_PDD13
U1
DD13 IDE_PDD14 IDE_PDD[0..15]
GND AG3 V2 IDE_PDD[0..15] 28
SATA1RXN DD14 IDE_PDD15
AG4 U6
SATA1RXP DD15

IDE
AJ4
SATA1TXN
AJ3 AA4 IDE_PDA0 28
SATA1TXP DA0
AA1 IDE_PDA1 28
DA1

SATA
GND AF2 AB3 IDE_PDA2 28
SATA2RXN DA2
AF1
SATA2RXP
AE4 Y6 IDE_PDCS1# 28
SATA2TXN DCS1#
AE3 Y5 IDE_PDCS3# 28
SATA2TXP DCS3#

5 CLK_PCIE_SATA# AB7 W4 IDE_PDIOR# 28


SATA_CLKN DIOR#
5 CLK_PCIE_SATA AC6 W3 IDE_PDIOW# 28
SATA_CLKP DIOW#
Y2 IDE_PDDACK# 28
SATARBIAS# DDACK#
AG1 Y3 INT_IRQ14 19,28
SATARBIAS# IDEIRQ
AG2 Y1 IDE_PIORDY 28
SATARBIAS IORDY
W5 IDE_PDDREQ 28
DDREQ
1

ICH8-M
R1712
SATA if it non-used, 24.9Ohm
1%
A 1)SATA[0:3]RXpn SATABIAS,SATABIAS# and SATA_CLKpn should be PD. A
2

2)SATA[0:3]TXpn and SATALED# NO connect.


<Variant Name>
GND

Title : ICH8-M(1)
ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 17 of 66
2 1
5 4 3 2 1

PCI_AD[0..31]
34,43 PCI_AD[0..31]

U1701B
PCI_AD0 D20 A4
AD0 REQ0# PCI_REQ#0 19 U1701D
PCI_AD1 T1804 TPC26T
PCI_AD2
E19
D19
AD1 PCI GNT0#
D7
E18
1
P27 V27
AD2 REQ1#/GPIO50 PCI_REQ#1 19,43 PERN1 DMI0RXN DMI_RXN0 7
PCI_AD3 A20 C18 P26 V26
AD3 GNT1#/GPIO51 PCI_GNT#1 43 PERP1 DMI0RXP DMI_RXP0 7
PCI_AD4 D17 B19 N29 U29
AD4 REQ2#/GPIO52 PCI_REQ#2 19,34 PETN1 DMI0TXN DMI_TXN0 7
D PCI_AD5 A21 F18 N28 U28 D

Direct Media Interface


AD5 GNT2#/GPIO53 PCI_GNT#2 34 PETP1 DMI0TXP DMI_TXP0 7
PCI_AD6 A19 A11
AD6 REQ3#/GPIO54 PCI_REQ#3 19
PCI_AD7 C19 C10 1 T1803 TPC26T M27 Y27
AD7 GNT3#/GPIO55 26 PCIE_RXN2_MINICARD PERN2 DMI1RXN DMI_RXN1 7
PCI_AD8 A18 M26 Y26
AD8 26 PCIE_RXP2_MINICARD PERP2 DMI1RXP DMI_RXP1 7
PCI_AD9 B16 C17 CX1803 1 2 0.1UF/10V PE_TN2 L29 W29
AD9 C/BE0# PCI_C/BE#0 34,43 26 PCIE_TXN2_MINICARD PETN2 DMI1TXN DMI_TXN1 7
PCI_AD10 A12 E15 CX1804 1 2 0.1UF/10V PE_TP2 L28 W28
AD10 C/BE1# PCI_C/BE#1 34,43 26 PCIE_TXP2_MINICARD PETP2 DMI1TXP DMI_TXP1 7
PCI_AD11 E16 F16
AD11 C/BE2# PCI_C/BE#2 34,43

PCI-Express
PCI_AD12 A14 E17 K27 AB26
AD12 C/BE3# PCI_C/BE#3 34,43 25 PCIE_RXN3_NEWCARD PERN3 DMI2RXN DMI_RXN2 7
PCI_AD13 G16 K26 AB25
AD13 25 PCIE_RXP3_NEWCARD PERP3 DMI2RXP DMI_RXP2 7
PCI_AD14 A15 C8 CX1805 1 2 0.1UF/10V PE_TN3 J29 AA29
AD14 IRDY# PCI_IRDY# 19,34,43 25 PCIE_TXN3_NEWCARD PETN3 DMI2TXN DMI_TXN2 7
PCI_AD15 B6 D9 CX1806 1 2 0.1UF/10V PE_TP3 J28 AA28
AD15 PAR PCI_PAR 34,43 25 PCIE_TXP3_NEWCARD PETP3 DMI2TXP DMI_TXP2 7
PCI_AD16 C11 G6 1 0Ohm 2PCI_RST#_ICH
PCI_AD17 AD16 PCIRST# R1803
A9 D16 PCI_DEVSEL# 19,34,43 H27 AD27 DMI_RXN3 7
PCI_AD18 AD17 DEVSEL# PERN4 DMI3RXN
D11 A7 PCI_PERR# 19,34,43 H26 AD26 DMI_RXP3 7
PCI_AD19 AD18 PERR# PERP4 DMI3RXP
B12 B7 PCI_LOCK# 19 G29 AC29 DMI_TXN3 7
PCI_AD20 AD19 PLOCK# PETN4 DMI3TXN
C12 F10 PCI_SERR# 19,34,43 G28 AC28 DMI_TXP3 7
PCI_AD21 AD20 SERR# PETP4 DMI3TXP
D10 C16 PCI_STOP# 19,34,43
PCI_AD22 AD21 STOP#
C7 C9 PCI_TRDY# 19,34,43 F27 T26 CLK_PCIE_ICH# 5
PCI_AD23 AD22 TRDY# PERN5 DMI_CLKN
F13 A17 PCI_FRAME# 19,34,43 F26 T25 CLK_PCIE_ICH 5
PCI_AD24 AD23 FRAME# PERP5 DMI_CLKP
E11 E29
PCI_AD25 AD24 R1804 1 0Ohm PLT_RST#_SB PETN5 DMIRCOMP 1%
E13 AG24 2 E28 Y23 2 1 +1.5VS
PCI_AD26 AD25 PLTRST# PETP5 DMI_ZCOMP R1801 24.9Ohm
E12 B10 CLK_ICHPCI 5 Y24
PCI_AD27 AD26 PCICLK DMI_IRCOMP
D8 G7 PCI_PME# 34,43 D27
PCI_AD28 AD27 PME# PERN6/GLAN_RXN
A6 D26 G3 USB_PN0 36
PCI_AD29 AD28 PERP6/GLAN_RXP USBP0N
E8 C29 G2 USB_PP0 36
PCI_AD30 AD29 PETN6/GLAN_TXN USBP0P USB_PN1 1 T1820 TPC26T
D6 C28 H5
PCI_AD31 AD30 PETP6/GLAN_TXP USBP1N USB_PP1 1 T1821 TPC26T
A3 H4
AD31 TPC26T T1809 SB_SPICLK USBP1P
1 C23 H2 USB_PN2 36
TPC26T T1810 SB_SPICS0# SPI_CLK USBP2N
C
F9
Interrupt I/F F8 TPC26T T1811
1
1 SB_SPICS1#
B23
E22
SPI_CS0# USBP2P
H1
J3
USB_PP2 36 C
19,34 PCI_INTA# PIRQA# PIRQE#/GPIO2 PCI_INTE# 19 SPI_CS1# USBP3N USB_PN3 36

SPI
19,43 PCI_INTB# B5 G11 PCI_INTF# 19 J2 USB_PP3 36
PIRQB# PIRQF#/GPIO3 TPC26T T1812 USBP3P USB_PN4 T1819 TPC26T
19,43 PCI_INTC# C5 F12 PCI_INTG# 19 1 D23 K5 1
PIRQC# PIRQG#/GPIO4 TPC26T T1813 SPI_MOSI USBP4N USB_PP4 T1818 TPC26T
19,43 PCI_INTD# A10 B3 PCI_INTH# 19 1 F21 K4 1
PIRQD# PIRQH#/GPIO5 SPI_MISO USBP4P USB_PN5 T1816 TPC26T
K2 1
ICH8-M USB_CON_OC0# USBP5N USB_PP5 T1817 TPC26T
36 USB_CON_OC0# AJ19 K1 1
USB_OC_14# AG16 OC0# USBP5P
L3 USB_PN6 25
USB_CON_OC23# AG15 OC1#/GPIO40 USBP6N
PCI Device 36 USB_CON_OC23#
AE15
OC2#/GPIO41 USB USBP6P
L2
M5 USB_PN7 USB_PP6 25
USB_OC_14# AF15 OC3#/GPIO42 USBP7N USB_PP7 USB_PN7 26
M4 USB_PP7 26
USB_OC_5# AG17 OC4#/GPIO43 USBP7P USB_PN8 T1806 TPC26T
M2 1
NEWCARD_OC# AD12 OC5#/GPIO29 USBP8N USB_PP8 T1808 TPC26T
Device IDSEL# REQ#/GNT# Interrupts 25 NEWCARD_OC# M1 1
USB_OC_7# AJ18 OC6#/GPIO30 USBP8P USB_PN9 T1805 TPC26T
N3 1
USB_OC#8 OC7#/GPIO31 USBP9N USB_PP9 T1807 TPC26T
AD14 N2 1
CardBus AD17 REQ1#/GNT1# B, C, D USB_OC#9 OC8# USBP9P
AH18
OC9# USBRBIAS_PN 1
F2 2 GND
USBRBIAS# R1802 22.6Ohm
LAN AD23 REQ2#/GNT2# A USBRBIAS
F3
1%
ICH8-M

Place within 500 mils of ICH

+3V

U1803
1 A VCC 5
B B
2 B +3VSUS
ICH8 Boot BIOS select
3 GND 4
Y USB_CON_OC0# RP1801A 1 5
+3V 8.2KOHM
SN74AUP1G08DCKR 10 GNT#0 CS#1
GND @ USB_CON_OC23# RP1801B 2 5 LPC 11 1 1 (default)
8.2KOHM PCI 10 1 0
10
U1804 USB_OC_14# RP1801C 3 5 SPI 01 0 1
8.2KOHM
1 A VCC 5 10
NEWCARD_OC# RP1801D 4 5
2 B
8.2KOHM
10 USB Devices
USB_OC_5# RP1801H 9 5
8.2KOHM
3 GND 4 10 Port 0 CON3602
Y USB_OC_7# RP1801E 6 5
8.2KOHM
GND
SN74AUP1G08DCKR
@ USB_OC#8 RP1801G 8
10 Port 1 Unused
5
8.2KOHM
10 Port 2 CON3601
USB_OC#9 RP1801F 7 5
8.2KOHM
10 Port 3 CON3601
Port 4 Unused
PCI_PME# R1807 1 2 10KOhm
R1808
Port 5 Unused
PCI_RST#_ICH 1 2 PCI_RST# 34,43 Port 6 NewCard
07/04/03 To change name from UNUSED
0Ohm into MINI Card --- Iverson Port 7 MINICard
A
Port 8 Unused A
Port 9 Unused
R1809
PLT_RST#_SB 1 2 PLT_RST# 7,25,26,28,29 <Variant Name>
0Ohm
Title : ICH8-M(2)
ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 18 of 66
2 1
5 4 3 2 1

+3VSUS U1701C
SCL_3A AJ26 AJ12 GPIO21 +3VS
SDA_3A SMBCLK SATA0GP/GPIO21 NEWCARD_DET#
AD19 AJ10 NEWCARD_DET# 25
LINKALERT# SMBDATA SATA1GP/GPIO19 GPIO36 T1918

SATA
AG21 AF11 1

GPIO
2
LINKALERT# SATA2GP/GPIO36

SMB
SM_LINK0 AC17 AG11 PCB_ID0 TPC26T RP1902A 1 5
SMLINK0 SATA3GP/GPIO37 18,34,43 PCI_PERR# 8.2KOHM
R1901 SM_LINK1 AE19 10
10KOhm SMLINK1 RP1902B
AG9 CLK_ICH14 5 18,34,43 PCI_IRDY# 2 5
8.2KOHM
CLK14

Clocks
PM_RI# AF17 G5 10
RI# CLK48 CLK_USB48 5
RP1902C 3 5

1
18,34,43 PCI_STOP# 8.2KOHM
TPC26T T1930 1 F4 D3 SUS_CLK 1 T1919 TPC26T 10
SYS_RST# SUS_STAT#/LPCPD# SUSCLK RP1902D
AD15 18,34 PCI_REQ#2 4 5
8.2KOHM
D SYS_RESET# D
AG23 PM_SUSB# 29 10
SLP_S3# RP1902E
7 PM_BMBUSY# AG12 AF21 PM_SUSC# 29,36 18,34,43 PCI_DEVSEL# 6 5
8.2KOHM
BMBUSY#/GPIO0 SLP_S4# T1908
AD18 1 10
R1902 1 SLP_S5#
+3VSUS 2 10KOhm AG22 TPC26T 18,34,43 PCI_SERR#
RP1902F 7 5
8.2KOHM
SMBALERT#/GPIO11 PM_S4_STATE# T1921 TPC26T
AH27 1 10
S4_STATE#/GPIO26

GPIO
AE20 07/04/06 To change the RX1935 from RP1902G 8 5
5 STP_PCI# STP_PCI#/GPIO15 18,34 PCI_INTA# 8.2KOHM

SYS
AG18 AE23 PM_PWROK_R 10
5 STP_CPU# STP_CPU#/GPIO25 PWROK 100 Ohm to 499 Ohm --- Iverson
RP1902H 9 5
18,43 PCI_INTD# 8.2KOHM
34,43 PM_CLKRUN# AH11 AJ14 RX1935 1 2 499Ohm PM_DPRSLPVR 7,50 10
CLKRUN#/GPIO32 DPRSLPVR/GPIO16

Power MGT
WAKE# AE17 AE21 PM_BATLOW# T1923
1 07/04/06 To change the RX1927 from
WAKE# BATLOW#
29,43 INT_SERIRQ AF12 TPC26T 0 Ohm to 8.2K Ohm --- Iverson
SERIRQ RX1925 1 PM_CLKRUN#
29 PM_THERM# AC13 C2 2 0Ohm PM_PWRBTN# 29
RP1903A 1 5
8.2KOHM
THRM# PWRBTN#
10
VR_PWRGD_CLKEN AJ20 AH20 RX1927 1 2 8.2KOhm RP1903B 2 5
VRMPWRGD LAN_RST# 18 PCI_REQ#0 8.2KOHM
10
07/04/10 To change WLAN_LED# TPC26T T1901 1 AJ22 AG27 RP1903C 3 5
TP7 RSMRST# PM_RSMRST# 29 18,43 PCI_REQ#1 8.2KOHM
from GPIO7 into GPIO22 --- Iverson GND 10
TPC26T T1924 1 AJ8 E1 RX1923 1 2 0Ohm RP1903D 4 5
TACH1/GPIO1 CK_PWRGD CLK_PWRGD 5 18,34,43 PCI_FRAME# 8.2KOHM
TPC26T T1911 1 AJ9 10
TPC26T T1912 TACH2/GPIO6 RX1924 1
1 AH9 E3 2 0Ohm PM_PWROK_R 18 PCI_REQ#3
RP1903E 6 5
8.2KOHM
TACH3/GPIO7 CLPWROK
29 EXTSMI# AE16 10
GPIO8 PM_SLP_M# 1 T1922 RP1903F
29 KB_SCI# AC19 AJ25 7 5
8.2KOHM
GPIO12 SLP_M#
25 NEWCARD_OFF# AG8 TPC26T 10
BTO_DEV0 TACH0/GPIO17 CL_CLK0_R 1 RX1907 2 0Ohm RP1903G 8
AH12 F23 CL_CLK0 7 5
BTO_DEV1 GPIO18 CL_CLK0 8.2KOHM
AE11 AE18 1 10

Controller Link
GPIO20 CL_CLK1

GPIO
AG10 T1903 TPC26T 07/04/06 To add the test point T1903 on CL_CLK1 --- Iverson RP1903H 9 5
30 WLAN_LED# BAT_LOW_1HZ SCLOCK/GPIO22 CL_DATA0_R1 RX1908 2 0Ohm 18 PCI_LOCK# 8.2KOHM
T1913 1 AH25 F22 10
QRT_STATE0/GPIO27 CL_DATA0 CL_DATA0 7
C
43 CB_SD# AD16 AF19 1 C
BTO_DEV2 QRT_STATE1/GPIO28 CL_DATA1 T1902 TPC26T 07/04/06 RP1904A
AG13
SATACLKREQ#/GPIO35
To add the test point T1902 on CL_DATA1 --- Iverson 18,43 PCI_INTB# 1 5
8.2KOHM
07/04/09 support PCB_ID1 AF9 D24 CL_VREF0 10
PCB_ID2 SLOAD/GPIO38 CL_VREF0 CL_VREF1 RP1904B
BATLow beep ---Iverson AJ11 AH23 18,43 PCI_INTC# 2 5
8.2KOHM
TPC26T T1914 SDATAOUT0/GPIO39 CL_VREF1
1 AD10 10
SDATAOUT1/GPIO48
AJ23 RX1909 1 2 0Ohm CL_RST#0 7 18 PCI_INTE#
RP1904C 3 5
8.2KOHM
CL_RST#
21 SB_SPKR AD9 10
SPKR PS_CPPE# 1 T1920 TPC26T RP1904D
AJ27 18,34,43 PCI_TRDY# 4 5
8.2KOHM
MISC CLGPIO0/GPIO24 WLAN_SW#_ICH +3VA +3VS
7 MCH_ICH_SYNC# AJ13 AJ24 10
MCH_SYNC# CLGPIO1/GPIO10 T1906 TPC26T RP1904E
AF22 1 6 5
8.2KOHM
T1907 CLGPIO2/GPIO14 T1905 TPC26T 18 PCI_INTF#
070426 To change the BAT_LOW_1HZ 1 AJ21
TP3 WOL_EN/GPIO9
AG19 1 10
into test point. ---iverson TPC26T 18 PCI_INTG# RP1904F 7 5
8.2KOHM

2
ICH8-M 07/03/23 Change Net 10
name(SMB_CLK,SMB_DAT)---Feng R1911 R1910 RP1904G 8 5
18 PCI_INTH# 8.2KOHM
3.24KOhm 3.24KOhm 10
Q1903 @
SCL_3A 25
S 2

WLAN_SW#_ICH 1 R1922 3SCL_3A


D
2 2

1
WLAN_SW# 27,29,30 5,14,15,26 SMB_CLK_S
0Ohm 3 CL_VREF1 CL_VREF0 RP1904H 9 5
8.2KOHM
2N7002
G

10

2
1 1

1
+3VSUS R1912 RP1901A 1 5
+5VS 8.2KOHM
07/04/10 To change the R190110K Ohm C1901 453Ohm C1902 R1926 10
1

PM_RI# RP1905A1 0.1UF/10V @ 0.1UF/10V 453Ohm INT_SERIRQ RP1901B


1

5 into RP1905 8.2K Ohm ---Iverson 2 5

2
8.2KOHM 8.2KOHM
G

10 Q1904 @ 10

1
SM_LINK0 RP1905B2 3SDA_3A SDA_3A 25 STP_CPU# RP1901C
2 S

8.2KOHM5 5,14,15,26 SMB_DAT_S 2 3 5


8.2KOHM
D

10 10
RP1905C3 5 07/04/10 To change the R1905 10K 2N7002 GPIO21 RP1901D 4 5
8.2KOHM 8.2KOHM
10 GND GND 10
EXTSMI# RP1905D4
Ohm into RP1905H on KB_SCI# GND GND NEWCARD_DET# RP1901E
B 8.2KOHM5 07/04/03 Change net name from GPIO19 6 5
8.2KOHM B
10 signal ---Iverson 10
RP1905E6
29,40 SUSC_EC# to newcard_det# ---Iverson GPIO36 RP1901F
8.2KOHM5 7 5
8.2KOHM
10 07/04/10 To change the R1903 10K +3V PM_PWROK_R RX1930 1 2 0Ohm 10
ICH_PWROK 7,29
SM_LINK1 RP1905F7 5 PCIE Wake PM_THERM# RP1901G 8 5
8.2KOHM Ohm into RP1905D on EXTSMI# 8.2KOHM
10 10
signal ---Iverson system
1

2
RP1905G8 5 RP1901H 9 5
8.2KOHM 17,28 INT_IRQ14 8.2KOHM
10 R1933 function 10
KB_SCI# RP1905H9 5 8.2KOhm @ R1931
8.2KOHM
1

10KOhm M1107
1

10
G

SCL_3A R1920 1 2 2.2KOhm


2

1
SDA_3A R1921 1 2 2.2KOhm PCIE_WAKE# WAKE# +3VSUS
2 S

25 PCIE_WAKE# 2 3
D

WAKE# R1906 1 2 1KOhm


LINKALERT# R1934 1 2 10KOhm 2N7002 GND

1
PM_BATLOW#R1904 1 @ 2 10KOhm 07/04/10 Move the INT_SERIRQ
Q1902
07/04/10 To change the R1904 8.2K 07/04/13 To change the R1949/R1952/R1954 from 10K Ohm into 0 Ohm --- Iverson R1932 Net to RP1901B ---Iverson
10KOhm
PM_RSMRST# R1919 1
Ohm into 10K Ohm on
2 10KOhm @
@ PM_BATLOW# signal---Iverson

2
+3VS +3VS +3VS 07/07/02 R1950,R1951,R1953
GND VR_PWRGD_CLKEN RX1933 1 2 0Ohm
+3VS +3VS +3VS
change from 1% to 5%. ---IVERSON EC_CLK_EN 29

3
3
D
2

2
07/04/03 Remove R1917 ---Iverson Q1901
2

R1950 R1951 R1953 R1955 2N7002


R1913 R1914 R1917 10KOhm 10KOhm 10KOhm 100KOhm 11
@
CLK_EN# 50
10KOhm 10KOhm 10KOhm BTO DEVICES G
S 2
@ @
1

2
PCB_ID3 : PROJECT CODE BTO_DEV0 BTO_DEV0: NEWCARD
1

A PCB_ID0 BTO_DEV1 A
PCB_ID1 BTO_DEV2 BTO_DEV1: PCMCIA
PCB_ID 0 1 2
PCB_ID2 BTO_DEV2: MEDIA CARD
2

MB V1.0 0 0 0 GND GND


<Variant Name>
R1949 R1952 R1954 (0:Existence 1: Nonexistence)
MB V1.1 1 0 0
2

0Ohm 0Ohm 0Ohm 07/04/06 To add R1955 100 K Ohm


R1915
10KOhm
R1916
10KOhm
R1918
10KOhm
MB V1.2 0 1 0 on VRMPWRGD signal --- Iverson Title : ICH8-M(3)
MB V2.0 0 0 1
1

@ Engineer: Julian Kuo


ASUSALPHATeK COMPUTER INC.
1

Size Project Name Rev


GND Custom TERESA20 2.0
GND Date: Thursday, July 05, 2007 Sheet 19 of 66
5 4 3 2 1
5 4 3 2 1

07/05/17 To add the C2050 1uF on VccRTC +VCC_RTC U1701F


the +5VREF_ICH signal--- iverson 1.0 uF * 1

1
U1701E
0.1 uF * 2 AD25 A13 +VCCP
C2010 C2011 VCCRTC VCC1_05[01]
A23 K7 B13
VSS[001] VSS[099] R2002 0.1UF/10V 0.1UF/10V VCC1_05[02]
A5 L1 A16 C13

1
VSS[002] VSS[100] 100Ohm V5REF[1] VCC1_05[03] C2003 C2004 +RTC_PWR
AA2 L13 T7 C14
VSS[003] VSS[101] +V5REF_ICH V5REF[2] VCC1_05[04]
AA7 L15 +5VS 1 2 D14
VSS[004] VSS[102] GND GND +5VREFSUS G4 VCC1_05[05] 1UF/6.3V 0.1UF/10V
A25 L26 E14

1
VSS[005] VSS[103] V5REF_SUS VCC1_05[06] D2003
AB1 L27 F14

1
VSS[006] VSS[104] C2050 VCC1_05[07] +VCC_RTC
AB24 L4 2 AA25 G14

1
VSS[007] VSS[105] C2001 1UF/10V C2002 VCC1_5_B[01] VCC1_05[08] GND GND T2004 T2003
AC11 L5 AA26 L11
VSS[008] VSS[106] D2001 0.1UF/10V VCC1_5_B[02] VCC1_05[09] 1SS355
AC14 M12 +3VS 3 AA27 L12

1
VSS[009] VSS[107] BAT54A VCC1_5_B[03] VCC1_05[10]
AC25 M13 AB27 L14

1
D VSS[010] VSS[108] 0.1UF/10V VCC1_5_B[04] VCC1_05[11] RTC_BAT D
AC26
VSS[011] VSS[109]
M14 1 AB28
VCC1_5_B[05] VCC1_05[12]
L16 VCC1_05 2 1
AC27 M15 GNDGND AB29 L17

1
VSS[012] VSS[110] GND VCC1_5_B[06] VCC1_05[13] R2013
AD17 M16 V5REF D28 L18 0.1 uF * 2

1
VSS[013] VSS[111] VCC1_5_B[07] VCC1_05[14] 1.3KOhm C2043
AD20
VSS[014] VSS[112]
M17 V5REF_Sus D29
VCC1_5_B[08] VCC1_05[15]
M11

CORE
AD28 M23 0.1 uF * 1 E25 M18 BATT_2P 1UF/6.3V

2
VSS[015] VSS[113] VCC1_5_B[09] VCC1_05[16] BAT1
AD29
VSS[016] VSS[114]
M28 0.1 uF * 1 E26
VCC1_5_B[10] VCC1_05[17]
P11 X5R
AD3 M29 E27 P18

2
VSS[017] VSS[115] VCC1_5_B[11] VCC1_05[18]
AD4
VSS[018] VSS[116]
M3 F24
VCC1_5_B[12] VCC1_05[19]
T11 PANASONIC ML1220-F1BE 07G016021220
AD6 N1 1 2 +1.5VS_PCIE_ICH F25 T18
AE1
VSS[019] VSS[117]
N11
+1.5VS
G24
VCC1_5_B[13] VCC1_05[20]
U11 GND MAXELL ML1220T10 07G016031220
VSS[020] VSS[118] VCC1_5_B[14] VCC1_05[21]

1
AE12 N12 L2004 + H23 U18 07/03/26 Add For RTC charge circuit. ---Feng
VSS[021] VSS[119] 80Ohm/100Mhz CE2001 C2005 C2006 C2007 C2008 VCC1_5_B[15] VCC1_05[22]
AE2 N13 H24 V11
VSS[022] VSS[120] 220UF/2V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V VCC1_5_B[16] VCC1_05[23] +VCCDMIPLL_ICH
AE22 N14 J23 V12 1 2 VccDMIPLL

2
VSS[023] VSS[121] VCC1_5_B[17] VCC1_05[24] +1.5VS
AD1 N15 J24 V14 0.01 uF * 1

1
VSS[024] VSS[122] VCC1_5_B[18] VCC1_05[25] L2003
AE25 N16 K24 V16 10 uF * 1
VSS[025] VSS[123] VCC1_5_B[19] VCC1_05[26] C2012 C2013 80Ohm/100Mhz
AE5 N17 K25 V17
VSS[026] VSS[124] VCC1_5_B[20] VCC1_05[27] 10UF/6.3V 0.01UF/16V 1.0 uH * 1
AE6 N18 Vcc1_5_B L23 V18

2
VSS[027] VSS[125] GND VCC1_5_B[21] VCC1_05[28] 1.0 Ohm * 1
AE9 N26 L24
VSS[028] VSS[126] VCC1_5_B[22]

VCCA3GP
AF14
VSS[029] VSS[127]
N27 2.2 uF * 1 L25
VCC1_5_B[23] VCCDMIPLL
R29
AF16 N4 22 uF * 2 M24 GND GND
VSS[030] VSS[128] +3VSUS VCC1_5_B[24] +VCCDMI_ICH
AF18 N5 M25 AE28 1 2 +1.25VS
AF3
VSS[031] VSS[129]
N6 220 uF * 1 N23
VCC1_5_B[25] VCC_DMI[1]
AE29

1
VSS[032] VSS[130] 0.5uH * 1 VCC1_5_B[26] VCC_DMI[2] R2005
AF4 P12 N24

3
VSS[033] VSS[131] D2002 VCC1_5_B[27] C2014 0Ohm
AG5
VSS[034] VSS[132]
P13 N25
VCC1_5_B[28] V_CPU_IO[1]
AC23 +VCCP Vcc_DMI
AG6 P14 BAT54A P24 AC24 10UF/6.3V

2
1

1
VSS[035] VSS[133] VCC1_5_B[29] V_CPU_IO[2]
AH10
VSS[036] VSS[134]
P15 P25
VCC1_5_B[30]
22 uF * 1
AH13 P16 R24 AF29 C2015 C2016 C2017
VSS[037] VSS[135] VCC1_5_B[31] VCC3_3[01] 10UF/6.3V 0.01UF/16V 0.01UF/16V GND
AH16 P17 R25

2
VSS[038] VSS[136] VCC1_5_B[32]
C AH19 P23 R26 AD2 C

2
VSS[039] VSS[137] +5VREFSUS VCC1_5_B[33] VCC3_3[02]
AH2 P28 +5VSUS 1 R2003 2 R27 V_CPU_IO
VSS[040] VSS[138] 10Ohm VCC1_5_B[34] GND GND GND
AF28 P29 T23 AC8
VSS[041] VSS[139] VCC1_5_B[35] VCC3_3[03]
AH22
VSS[042] VSS[140]
R11 T24
VCC1_5_B[36] VCC3_3[04]
AD8 4.7 uF * 1

VCCP_CORE
AH24 R12 T27 AE8 0.1 uF * 2
VSS[043] VSS[141] L2001 VCC1_5_B[37] VCC3_3[05]
AH26 R13 T28 AF8
VSS[044] VSS[142] 120Ohm/100Mhz VCC1_5_B[38] VCC3_3[06]
AH3 R14 T29
VSS[045] VSS[143] +VCCSATAPLL_ICH VCC1_5_B[39]
AH4 R15 +1.5VS 1 2 U24 AA3
VSS[046] VSS[144] VCC1_5_B[40] VCC3_3[07]
AH8 R16 U25 U7

1
VSS[047] VSS[145] VCC1_5_B[41] VCC3_3[08] +VCC3_3_ICH
AJ5 R17 V23 V7 1 2 +3VS
VSS[048] VSS[146] C2021 C2022 VCC1_5_B[42] VCC3_3[09]
B11 R18 VccSATAPLL V24 W1

1
VSS[049] VSS[147] 10UF/6.3V 0.01UF/16V VCC1_5_B[43] VCC3_3[10] R2006
B14 R28 V25 W6

2
VSS[050] VSS[148] VCC1_5_B[44] VCC3_3[11]

IDE
B17 R4 1.0 uF * 1 W25 W7 C2019 C2018 C2020 0Ohm
VSS[051] VSS[149] VCC1_5_B[45] VCC3_3[12] 0.01UF/16V 0.01UF/16V 0.01UF/16V
B2 T12 10 uF * 1 Y25 Y7 Vcc3_3

2
VSS[052] VSS[150] GND GND VCC1_5_B[46] VCC3_3[13]
B20 T13
B22
VSS[053] VSS[151]
T14 10uH * 1 AJ6 A8 0.1 uF * 1
VSS[054] VSS[152] 0 Ohm * 1 VCCSATAPLL VCC3_3[14] GND GND GND
B8 T15 B15
VSS[055] VSS[153] +VCC1_5_ICH VCC3_3[15]
C24 T16 +1.5VS 1 2 AE7 B18
VSS[056] VSS[154] VCC1_5_A[01] VCC3_3[16]
C26 T17 AF7 B4
1

1
VSS[057] VSS[155] VCC1_5_A[02] VCC3_3[17]

ARX
C27 T2 R2007 AG7 B9 Vcc3_3
VSS[058] VSS[156] 0Ohm C2028 C2024 VCC1_5_A[03] VCC3_3[18] C2023 C2025 C2026 C2027
C6
VSS[059] VSS[157]
U12 Vcc1_5_A AH7
VCC1_5_A[04] VCC3_3[19]
C15
D12 U13 1UF/6.3V 1UF/6.3V AJ7 D13 0.01UF/16V 0.01UF/16V 0.01UF/16V 0.01UF/16V 0.1 uF * 1
2

2
VSS[060] VSS[158] VCC1_5_A[05] VCC3_3[20]

PCI
D15
VSS[061] VSS[159]
U14 1.0 uF * 1 VCC3_3[21]
D5
D18 U15 AC1 E10
VSS[062] VSS[160] GND GND VCC1_5_A[06] VCC3_3[22] GND GND GND GND
D2 U16 AC2 E7
VSS[063] VSS[161] VCC1_5_A[07] VCC3_3[23]

ATX
D4 U17 AC3 F11 R2008
VSS[064] VSS[162] VCC1_5_A[08] VCC3_3[24] 0Ohm
E21 U23 AC4
VSS[065] VSS[163] VCC1_5_A[09] +VCCHDA_ICH
E24 U26 AC5 AC12 1 2 +3VS
VSS[066] VSS[164] VCC1_5_A[10] VCCHDA
B E4 U27 B

1
VSS[067] VSS[165] +VCCSUSHDA_ICH
E9 U3 AC10 AD11 1 2 +3VSUS
VSS[068] VSS[166] VCC1_5_A[11] VCCSUSHDA C2029
F15 U5 AC9

1
VSS[069] VSS[167] VCC1_5_A[12] R2009 0.01UF/16V
E23 V13 J6

2
VSS[070] VSS[168] VCCSUS1_05[1] C2039 1
F28 V15 AA5 AF20 2 0.1UF/10V GND
C2030 0Ohm VccSusHDA
VSS[071] VSS[169] VCC1_5_A[13] VCCSUS1_05[2] 0.01UF/16V
F29 V28 AA6 0.1uF * 1 VccHDA

2
VSS[072] VSS[170] VCC1_5_A[14] GND
F7 V29 AC16
VSS[073] VSS[171] VCCSUS1_5[1]
G1
VSS[074] VSS[172]
W2 G12
VCC1_5_A[15] 0.1uF * 1
E2 W26 G17 J7 C2040 1 2 0.1UF/10V GND
VSS[075] VSS[173] VCC1_5_A[16] VCCSUS1_5[2] GND
G10
VSS[076] VSS[174]
W27 VccUSBPLL Vcc1_5_A H7
VCC1_5_A[17]
G13 Y28 C3 +3VSUS_ICH 1 2
VSS[077] VSS[175] VCCSUS3_3[01] +3VSUS
G19
VSS[078] VSS[176]
Y29 0.1 uF * 1 0.1 uF * 1 AC7
VCC1_5_A[18]
G23 Y4 AD7 AC18 R2010

1
VSS[079] VSS[177] VCC1_5_A[19] VCCSUS3_3[02] 0Ohm
G25 AB4 AC21
VSS[080] VSS[178] +VCCUSBPLL_ICH VCCSUS3_3[03] C2031 C2032 C2034
G26 AB23 +1.5VS 1 2 D1 AC22
VSS[081] VSS[179] VCCUSBPLL VCCSUS3_3[04]

VCCPSUS
G27 AB5 AG20 0.01UF/16V 0.01UF/16V 10UF/6.3V

2
1

VSS[082] VSS[180] R2011 VCCSUS3_3[05]


H25
VSS[083] VSS[181]
AB6 VccGLANPLL F1
VCC1_5_A[20] VCCSUS3_3[06]
AH28

USB CORE
H28 AD5 0Ohm C2009 C2033 L6
VSS[084] VSS[182] 0.1UF/10V 0.1UF/10V VCC1_5_A[21] GND GND GND
H29 U4 2.2 uF * 1 L7 P6
2

VSS[085] VSS[183] VCC1_5_A[22] VCCSUS3_3[07]


H3 W24 10 uF * 1 M6 P7
VSS[086] VSS[184] VCC1_5_A[23] VCCSUS3_3[08]
H6
VSS[087]
07/04/03 Add net name M7
VCC1_5_A[24] VCCSUS3_3[09]
C1
J1 A1 1.0 uH * 1 GND GND N7 VccSus3_3
VSS[088] VSS_NCTF[01] +VCC1_5_ICH ---Feng VCCSUS3_3[10]
J25
VSS[089] VSS_NCTF[02]
A2 1.0 Ohm * 1 +VCC1_5_ICH W23
VCC1_5_A[25] VCCSUS3_3[11]
P1
J26
VSS[090] VSS_NCTF[03]
A28 +3VS 1 2
VCCSUS3_3[12]
P2 4.7 uF * 1
J27 A29 T2001 1 F17 P3
1

VSS[091] VSS_NCTF[04] VCCLAN1_05[1] VCCSUS3_3[13]


VCCPUSB

J4 AH1 R2012 T2002


TPC26T 1 G18 P4
VSS[092] VSS_NCTF[05] 0Ohm C2035 VCCLAN1_05[2] VCCSUS3_3[14]
J5
VSS[093] VSS_NCTF[06]
AH29 VccLAN3_3 TPC26T VCCSUS3_3[15]
P5
K23 AJ1 0.1uF * 1 0.1UF/10V F19 R1
2

VSS[094] VSS_NCTF[07] +VCCLAN3_3_ICH VCCLAN3_3[1] VCCSUS3_3[16]


K28 AJ2 G20 R3
A VSS[095] VSS_NCTF[08] VCCLAN3_3[2] VCCSUS3_3[17] A
K29 AJ28 R5
VSS[096] VSS_NCTF[09] GND +VCCGLANPLL_ICH VCCSUS3_3[18]
K3 AJ29 +1.5VS 1 2 A24 R6
VSS[097] VSS_NCTF[10] +VCCGLAN1_5_ICH VCCGLANPLL VCCSUS3_3[19]
K6 B1
1

VSS[098] VSS_NCTF[11]
GLAN POWER

B29 L2002 A26 G22 C2042 1 2 0.1UF/10V GND<Variant Name>


1

VSS_NCTF[12] 120Ohm/100Mhz C2036 C2037 VCCGLAN1_5[1] VCCCL1_05


A27
ICH8-M 10UF/6.3V 1UF/6.3V C2038 VCCGLAN1_5[2]
B26 A22 C2041 1 2 0.1UF/10V
2

VCCGLAN1_5[3] VCCCL1_5 GND


GND GND R2001 10UF/6.3V B27 Title : ICH8-M(4)
2

0Ohm VCCGLAN1_5[4]
B28 F20 +3VS
GND GND VCCGLAN1_5[5] VCCCL3_3[1]
VccGLAN1_5 1 2
VCCCL3_3[2]
G21
ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
4.7 uF * 1 1 2 +VCCGLAN3_3_ICH GND B25
+3VS VCCGLAN3_3
220 uF * 1 Size Project Name Rev
0.5 uH * 1
R2004
0Ohm
ICH8-M Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 20 of 66
5 4 3 2 1
5 4 3 2 1

AUDIO POWER
+5V_AUDIO
+5VS
U2102 G913CF
+5VS
1 5 1 2
SHDN# SET C2125 2200PF/50V
2
GND
D

CODEC ALC660 REV:D 3


IN OUT
4
1 R2106
100KOhm
2
D

2
Vref=1.25V

1
C2118 C2117 C2119
0.1UF/10V 10UF/10V R2108 C2120 C2121

2
34.8KOhm 0.1UF/10V 0.1UF/16V 10UF/10V

2
c0402

1
Realtek Recommand for GND_AUDIO
EAPD
vista classic driver pop 22 EAPD
R2103
1 2 GND GND_AUDIO
Vout=1.25*(1+(100K/34.8K)= 4.84V
20KOhm
ACZ_BCLK_AUD 1% GND_AUDIO +5V_AUDIO

JDVREF
Digital
1

C2102

1
22PF/50V
c0603 YAGEO/CC0603JRNPO9BN220 <G> C2108 C2109
2

@ 10UF/6.3V 0.1UF/16V

2
c0805 c0402

GND
GND_AUDIO

+3VS
FRONT_R 22
L2101

48
47
46
45
44
43
42
41
40
39
38
37
C
1 2 FRONT_L 22 C

LFE(PORT-G-R)
CENTER(PORT-G-L)

SURR-R(PORT-A-R)

SURR-L(PORT-A-L)
EAPD
SPDIFO

NC3
NC2

AVSS2

AVDD2
NC1
JDREF
1

120Ohm/100Mhz
C2110 C2111 C2103
0.1UF/16V 0.1UF/16V 10UF/10V
2

c0402 c0402 c0805

+3VS_CODEC

GND
1 36
660_D_MUTE# DVDD1 FRONT-R(PORT-D-R)
22 660_D_MUTE# 2 35
GPIO0 FRONT-L(PORT-D-L) Sense_B
3 34 1 R2132 2 HP_DET
HP_DET 22
GPIO1 SenseB
4 33 1 R2133 2 39.2KOhm +5V_AUDIO
ACZ_SDOUT_AUD DVSS1 NC4 10KOhm @ 1%
17 ACZ_SDOUT_AUD 5 32
ACZ_BCLK_AUD SDATA-OUT MIC1-VREFO-R
17 ACZ_BCLK_AUD 6
BCLK LINE2-VREFO
31 070507 To add the R2133 10KOhm,But not stuff --- iverson.
R2104 7 30
ACZ_SDIN0_R DVSS2 MIC2-VREFO
FROM ICH 17 ACZ_SDIN0 1 2 8
SDATA-IN NC5
29 M0207
33Ohm 9 28 MIC_VREFOUT_R
DVDD_IO MIC1-VREFO-L MIC_VREFOUT_R 23
ACZ_SYNC_AUD 10 27 VREF_CODEC TPC26T 1 T2101
17 ACZ_SYNC_AUD SYNC VREF
17,22 ACZ_RST#_AUD
ACZ_RST#_AUD 11
RESET# AVSS1
26

PC BEEP

1
PC_BEEP 12 25 +5V_AUDIO
PCBEEP AVDD1 C2113 C2114
10UF/10V 10UF/10V
Reserve for Cardbus
LINE2-R(PORT-E-R)

LINE1-R(PORT-C-R)

2
1

1
LINE2-L(PORT-E-L)

LINE1-L(PORT-C-L)
MIC1-R(PORT-B-R)

controllor that has


MIC2-R(PORT-F-R)

c0805 c0805
MIC1-L(PORT-B-L)
MIC2-L(PORT-F-L)

C2115 C2116
GND 10UF/6.3V 0.1UF/16V PCMCIA function. IF NO PCMCIA,UNMOUNT.
2

2
c0805 c0402
CD-GND

FROM PCMCIA
SenseA

C2123 D2101
CD-R
CD-L

GND_AUDIO GND_AUDIO 0.1UF/16V C2112


B GND_AUDIO 1 2 CB_SPKR_C 1 0.1UF/16V B
43 CB_SPKR
ALC660-VD-GR 3 PC_BEEP_C 1 2 PC_BEEP
13
14
15
16
17
18
19
20
21
22
23
24

U2101 1 2 SB_SPKR_C 2
19 SB_SPKR
R2130 (070129,EMI)Add three 0ohm resisters
MIC_DET# 2 1 Sense_A C2124 DAN202K
23 MIC_DET# R2127, R2128, R2129
20KOhm 1% FROM ICH 0.1UF/16V

2
R2121 1 2 0Ohm

1
HEADPHONE_L 1 R2131 2 R2101
22 HEADPHONE_L
0Ohm R2127 1 2 0Ohm C2127
HEADPHONE_R 20KOhm
22 HEADPHONE_R 1 R2111 2 R2105 R2109 100PF/50V

2
0Ohm R2128 1%
1 2 0Ohm 20KOhm 20KOhm

1
M0213 1% 1% @

1
R2129 1 2 0Ohm

GND GND GND

07/04/17 To change
GND GND_AUDIO R2115 from 0 Ohm to
MIC_JACK_R C2106 2 1 1UF/10V
23 MIC_JACK_R
C2128
100K Ohm---Feng D2102
C2107
Bottom side
2 1 1UF/10V 0.1UF/16V 1N4148W
28 BAT_LOW_BEEP 1 2 1 R2115 2 1 2
100KOhm

1
C2101
Input impedence:64K ohm(Typical) R2114
(070129,EMI)Mount R2120, R2123, R2124, R2125 20KOhm 0.01UF/25V

2
1% @

1
R2107 1 2 0Ohm 07/04/17 To add
C2131 but don't
R2120 1 2 0Ohm GND GND stuff---Feng
A A

R2123 1 2 0Ohm

R2124 1 2 0Ohm <Variant Name>

R2125 1 2 0Ohm
Title : CODEC ALC660(D)
ASUSTeK COMPUTER INC. NB1 Engineer: Feng
Size Project Name Rev
GND GND_AUDIO
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 21 of 66
Top side
5 4 3 2 1
5 4 3 2 1

07/05/17 To change the R2201/R2202


R2202 1 1% 2 11KOhm
from 13K Ohm into 11K Ohm--- iverson

C2202 1 2 68PF/50V

07/04/10 Remove the HP circuit ---Iverson


SE/BTL & MUTE CONTROL
07/05/17 To change the R2206/R2214
VDD_AMP
from 10K Ohm into 12K Ohm--- iverson

2
070511 To modify HP_DET circuit---Feng
D
C2206 0.47UF/16V R2206 12KOHM R2243 D
1 2 1 2 VDD_AMP 10KOhm
21 FRONT_R +5VS
U2201

1
2
21 22 INTSPKR+
RLINEIN ROUT+ SE/BTL#

1
20 15 INTSPKR- VDD_AMP L2203 R2217
RHPIN ROUT- 80Ohm/100Mhz R2253 100KOhm

3
C2209 2 1 1UF/10V 19 18 1 2 100KOhm 1N4148W 3
+5VS D

1
X7R RBYPASS RVDD
D2210

2
2
R2210 C2213 C2214 C2215 JACK_IN# 2 1 11
2 10KOhm C2211 0.1UF/16V 1UF/16V 1UF/16V G Q2202

2
TJ @ c0805_h57 c0805_h57 2 S 2N7002
11

2
1UF/10V

3
MUTE IN SE/BTL# 3
14 1 2 D

2
SE/BTL# R2244
9
MUTE OUT GND_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO 0Ohm @
16
HP/LINE#
8 11
SHUTDOWN Q2207
LVDD
7 07/05/14 To add the R2244 G
6 2 S 2N7002
0Ohm, but not stuff. ---iverson

2
LBYPASS GND_AUDIO
17
GND_AUDIO NC1
23
NC2 GND_AUDIO +12V
GND_AUDIO
5 3 INTSPKL+ +3VS

2
LHPIN LOUT+
4 10 INTSPKL- +3VSUS R2219
LLINEIN LOUT- D2209 2.2MOhm
C2217 0.47UF/16V

THERMAL
GND/HS1
GND/HS2

GND/HS3
GND/HS4

2
21 FRONT_L 1 2 1 R2214 2 R2249

1
12KOHM 0Ohm
SE/BTL# HP_DET 1 2 D2206 R2223 R2220 2 R2222 1 MUTE_POP#
C 21 660_D_MUTE# C
BAT54AW 100KOhm 100KOhm 100KOhm

3
G1420F31UF R2241

1N4148W
1 3
1
12
T1
13
24

1
D
0Ohm 3

1
29 OP_SD# 1 2 2
11 C2228
GND_AUDIO
HP Mode H L G Q2204 0.1UF/16V

2
3
3 2 S 2N7002
D

2
R2242 @ D2207
SPK Mode L X 0Ohm BAT54AW @
21 EAPD 1 2 1 11
3 G Q2208
1 2 2 2 S 2N7002

2
17,21 ACZ_RST#_AUD
C2219 1 2 68PF/50V R2252

1
0Ohm
Fix POP of the internal speaker C2250
R2201 1 1% 2 11KOhm 1UF/16V
when power-on

2
M1101 c0805_h57 GND

GND
HP JACK
070426 To the C2250 and D2209, but the D2209 not stuf.---iverson
R2235 1 2 0Ohm HEADPHONE_R 21
2

S 2 PHONE_JACK_6P
G
1 Q2203 1 R2237 2 0Ohm 10
1 NP_NC2
2N7002 070507 To add the R2207/R2208 9
NP_NC1
Q2206 2N7002 07/04/06 To change net name from 8
10K Ohm Pull-down--- iverson. P_GND2
D
JACK_IN into JACK_IN# --- Iverson 7
3
EAR_R CE2202 P_GND1
2 S

3 2 5
D
3

330UF/6.3V R2221 33Ohm 5


3

4
B @ AOUTR_C AJK_R HP_JACK_R 4 B
1 2 1 2 1 2 3
G

R2208 10KOhm L2204 1KOhm/100Mhz 3


11

6
MUTE_POP# HP_JACK_L 6
2
AOUTL_C AJK_L 2
1 2 1 2 1 2 1
11

L2205 1KOhm/100Mhz 1
+

1
CE2201 R2224 33Ohm CON2202
G

1
EAR_L 3 2 330UF/6.3V R2225 R2226 C2220 C2221 L2201
3

S 2
3

3 R2207 JACK_IN#
D

D 1 2
@ 10KOhm 1KOhm 1KOhm
1

1
Q2205 Q2209 2N7002 1KOhm/100Mhz C2223

2
11 2N7002 1 R2238 2 0Ohm 100PF/50V 100PF/50V GND_JACK
G GND_AUDIO 100PF/50V

2
2 S R2236 1 2 0Ohm HEADPHONE_L 21
2

07/06/07 To add Q2206 and Q2209 to solve


GND_AUDIO GND_JACK
the pop noise ,But not stuff--- iverson GND_JACK
07/06/07 To add the R2237 and (070130,EMI)Add 4 Varistors(D2202~D2205)
R2238 0 Ohm--- iverson 070511 To modify HP_DET circuit---Feng

HP_DET 21

GND
1

3
3
D
D2202 D2203 D2204 D2205
(070129,EMI)Change 0ohm resisters into beads SE/BTL# 11
G Q2201
1 R2240 2 0Ohm 2 S 2N7002
2

2
To Internal Speaker Connector
A CON2203 1 R2233 2 0Ohm A
INTSPKL+ R2228 1 2 120Ohm/100Mhz @ @ @ @ 4 6
INTSPKL- R2229 1 120Ohm/100Mhz 4 SIDE2
2 3
INTSPKR+ R2231 1 120Ohm/100Mhz 3
2 2 HP JACK SENCE
INTSPKR- R2232 1 120Ohm/100Mhz 2
2 1 5
1 SIDE1 GND GND_JACK GND_AUDIO
1

C2226 C2227 C2224 C2225 WtoB_CON_4P


c0402 c0402 c0402 c0402 L2238 1 2 120Ohm/100Mhz
1000PF/50V 1000PF/50V 1000PF/50V 1000PF/50V
Title : AUDIO AMP
2

L2239 1 2 120Ohm/100Mhz
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
GND GND GND GND
GND GND_AUDIO GND_JACK
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 22 of 66
3 2 1
5 4 3 2 1

070511 To modify MIC_DET circuit---Feng

D
C2308
MICROPHONE IN D

2 1 L2304
21 MIC_VREFOUT_R
1 2 MIC_DET#
MIC_DET# 21
1UF/10V

2
@ 120Ohm/100Mhz

1
@ R2309 GND_AUDIO C2307
2.2KOhm 1000PF/16V
CON2301 c0402
MIC SENCE

2
1
L2303 1
21 MIC_JACK_R 1 2 120Ohm/100Mhz MIC_VREFOUT_CON 2
2
6
3 6
3
(070205,EMI)Mount C2306 4
4
GND_JACK
+5V_AUDIO 5
5

1
C2306 7
P_GND1
(070129,EMI)Add a 120ohm bead and a 1000PF capacitor
1000PF/16V 8
c0402 P_GND2
9

2
NP_NC1
1

10
R2310 NP_NC2
2.2KOhm PHONE_JACK_6P
2

C C
MIC1_VREF 1 R2313 2 GND_JACK
2.2KOhm
1

R2311 GND_JACK
1

2.2KOhm
C2309 C2310
0.1UF/16V 1UF/10V
2

c0402 @

GND_AUDIO GND_AUDIO 07/06/07 To add the T filter to solve


Reserved the external MIC pop noise of the MIC --- iverson
bias(T filter).

07/06/07 To add the C2310 1UF , But do not stuff. --- iverson

B B

A A

Title : MIC JACK


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 23 of 66
5 4 3 2 1
5 4 3 2 1

+3VA_EC +3VA_EC
D D

1
C2401 C2402
@
1UF/10V 1UF/10V

2
Note:
GND GND
If you use 8M bits ROM, you need FD0 1 T2401 TPC26T
FD1 1 T2402 TPC26T
to connect FA19 to EC side. FD2 T2403 TPC26T
1
FD3 1 T2404 TPC26T
For 8M bits ISA ROM FD4 1 T2405 TPC26T
8M TSOP FD5 1 T2406 TPC26T
FD6 1 T2407 TPC26T
FD7 1 T2408 TPC26T
U2401 FA0 1 T2409 TPC26T
25 29 FA1 1 T2410 TPC26T
29 FA1 A0 DQ0 FD0 29
24 31 FA2/ BADDR0 1 T2411 TPC26T
29,30 FA2/ BADDR0 A1 DQ1 FD1 29
23 33 FA3/ BADDR1 1 T2412 TPC26T
29,30 FA3/ BADDR1 A2 DQ2 FD2 29
22 35 FA4/ PPEN 1 T2413 TPC26T
29,30 FA4/ PPEN A3 DQ3 FD3 29
C 21 38 FA5/ SHBM 1 T2414 TPC26T C
29,30 FA5/ SHBM A4 DQ4 FD4 29
20 40 FA6 1 T2415 TPC26T
29 FA6 A5 DQ5 FD5 29
19 42 FA7 1 T2416 TPC26T
29 FA7 A6 DQ6 FD6 29
18 44 FA8 1 T2417 TPC26T
29 FA8 A7 DQ7 FD7 29
8 30 FA9 1 T2418 TPC26T
29 FA9 A8 DQ8
7 32 FA10 1 T2419 TPC26T
29 FA10 A9 DQ9
6 34 FA11 1 T2420 TPC26T
29 FA11 A10 DQ10
5 36 FA12 1 T2421 TPC26T
29 FA12 A11 DQ11
4 39 FA13 1 T2422 TPC26T
29 FA13 A12 DQ12
3 41 FA14 1 T2423 TPC26T
29 FA14 A13 DQ13
2 43 FA15 1 T2424 TPC26T
29 FA15 A14 DQ14
1 45 FA16 1 T2425 TPC26T
29 FA16 A15 DQ15/A-1 FA0 29
48 FA17 1 T2426 TPC26T
29 FA17 A16
17 26 FA18 1 T2427 TPC26T
29 FA18 A17 CE# FCS# 29
16 28 FA19 1 T2428 TPC26T
29 FA19 A18 OE# FRD# 29
11 FCS# 1 T2429 TPC26T
WE# FWR# 29
9 12 FRD# 1 T2430 TPC26T
NC0 RESET# EC_RST# 29
10 15 FWR# 1 T2431 TPC26T
+3VA_EC NC1 RY/BY# BYTE# EC_RST# T2432 TPC26T
13 47 1
NC2 BYTE# BYTE# T2433 TPC26T
14 1
NC3 T2435 TPC26T +3VA_EC T2434 TPC26T
27 1 1
Vss1

2
B T2436 TPC26T B
37 46 1
Vcc Vss2
MX29LV800CTTC R2401
10KOhm 070507 To add test point on the ISA ROM --- iverson.

1
GND GND

07/04/13 To change the U2401 from pn:05G001014110 into 05G001204043 --- Iverson

A A

Title : ISA ROM


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 24 of 66
3 2 1
5 4 3 2 1

NewCard Header
R2501 +3VSUS_PE
0Ohm
1 2
L2501 @
D 90Ohm/100Mhz USB_P6- !! ExpressCard Standard 1.0: D
18 USB_PN6
CON2501
Change Pin7 from RESERVED to SMBCLK

3
1 27
Change Pin8 from SMBCLK to SMBDATA USB_P6- 1 NP_NC1
2 28
2 NP_NC2

11
USB_P6+ 3 29
Change Pin9 from SMBDATA to +1.5V CPUSB# 3 NP_NC3

G
4 30
1

2
USB_P6+ PCIE_WAKE#_C 4 NP_NC4
3 2 5

S 2
18 USB_PP6 19 PCIE_WAKE# 5
6 31

D
6 P_GND1

1
19 SCL_3A 7 32
2N7002 7 P_GND2
1 2 19 SDA_3A 8 33
8 P_GND3
D2502 D2501 Q2503 07/05/04 To connect the SCL_3A +1.5VS_PE 9
9 P_GND4
34
0Ohm 10
R2502 EGA10603V05A1 EGA10603V05A1
and SDA_3A signals---iverson PCIE_WAKE#_C 10
11 35
@ @ 11 SIDE1
+3VSUS_PE 12 36

2
PERST# 12 SIDE2
Co-Layout 13
13
+3VS_PE 14
14
15
15
GND GND 16
CPPE#_CON 16
17
17
5 CLK_PCIE_NEWCARD# 18
18
5 CLK_PCIE_NEWCARD 19 GND
19
20
20
18 PCIE_RXN3_NEWCARD 21
21
18 PCIE_RXP3_NEWCARD 22
22
23
23
18 PCIE_TXN3_NEWCARD 24
24
18 PCIE_TXP3_NEWCARD 25
25
26
26
07/04/10 Add R2504 0 Ohm ---Iverson
NEW_CARD_HEADER_26P
C 19 NEWCARD_OFF# C
R2504
2 1 NEWCARD_DET# 19

11
0Ohm @ GND
U2501

G
17 15 3 2 CPPE#_CON 07/06/26 Modify CON2501 PCB footprint ---iverson

S 2
+3VSUS AUX_IN AUX_OUT +3VSUS_PE
2 3

D
+3VS 3.3VIN_1 3.3VOUT_1 +3VS_PE
4 5
3.3VIN_2 3.3VOUT_2 Q2502 @
+1.5VS 12 11 +1.5VS_PE
1.5VIN_2 1.5VOUT_1 2N7002
14 13
1.5VIN_1 1.5VOUT_2
R2505
CLK_NEWCARD_REQ# 5
2 1 20 8 PERST# R2503
4,29,51,63 VSUS_ON SHDN# PERST#
0Ohm 1 10 CPPE# 2 1
34,37,40,61,62 SUSB# STBY# CPPE#
6 9 CPUSB#
7,18,26,28,29 PLT_RST# SYSRST# CPUSB#

3
19 0Ohm 3
OC# NEWCARD_OC# 18 D
16 21
NC GND2 REFCLK_EN @
7 18 11
GND1 RCLKEN G Q2501
R5538D001 2 S 2N7002

2
GND
GND

B B

+3VSUS +3VS +1.5VS


1

C2502 C2503 C2504 C2505 C2506


0.1UF/10V 10UF/10V 0.1UF/10V 1UF/10V 0.1UF/10V
2

GND GND GND GND GND


3.0V~3.6V
3.0V~3.6V Ave= 1000mA 1.35V~1.65V
+3VSUS_PE Ave= 200mA +3VS_PE Max= 1300 +1.5VS_PE Ave= 500 mA
Max= 275 mA Max= 650 mA
mA
1

C2507 C2508 C2509 C2510 C2501


0.1UF/10V 10UF/10V 0.1UF/10V 10UF/10V 0.1UF/10V
2

A A

GND GND GND GND GND

<Variant Name>

Title : NEWCARD
ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 25 of 66
2 1
5 4 3 2 1

07/04/09 Remove the PCIE Wake


system function ---Iverson

MINI CARD CONNECTOR


+1.5VS

+3VS
D D
Open Drain
07/0409 Remove netname ( CON2602
1 2 +3V
MINI_WAKE# ) --- Iverson WAKE# 3.3V_1
3 4
Reserved1 GND7
5 6
CLK_MINICARD_REQ# Reserved2 1.5V_1
5 CLK_MINICARD_REQ# 7 8

1
CLKREQ# UIM_PWR C2602
9 10
CLK_PCIE_MINICARD# GND1 UIM_DATA 0.1UF/10V
5 CLK_PCIE_MINICARD# 11 12
CLK_PCIE_MINICARD REFCLK- UIM_CLK c0402
5 CLK_PCIE_MINICARD 13 14

2
REFCLK+ UIM_RESET
15 16
GND2 UIM_VPP
GND
17 18
Reserved/UIM_C8 GND8 MINCARD_WLAN_ON/OFF#
19 20 MINCARD_WLAN_ON/OFF# 27
Reserved/UIM_C4W_DISABLE#
21 22 PLT_RST# 7,18,25,28,29
GND3 PERST#
18 PCIE_RXN2_MINICARD 23 24
PERn0 +3.3Vaux
18 PCIE_RXP2_MINICARD 25 26
PERp0 GND9 R2606 0Ohm @ +1.5VS
27 28
GND4 1.5V_2 MC_CLK
29 30 2 1 SMB_CLK_S 5,14,15,19
GND5 SMB_CLK MC_DATA 2
18 PCIE_TXN2_MINICARD 31 32 1 SMB_DAT_S 5,14,15,19
PETn0 SMB_DATA R2607 0Ohm @
18 PCIE_TXP2_MINICARD 33 34
PETp0 GND10
35 36 USB_PN7 18

1
GND6 USB_D- C2605 C2606 C2607 C2608
37 38 USB_PP7 18
Reserved3 USB_D+
5 CLK_FWHPCI 1 0OHM 2 RN2601A @ 39 40 c0805_h57 c0402 c0402 c0402
Reserved4 GND11 10UF/10V 0.1UF/10V 0.1UF/10V 0.01UF/50V
41 42

2
RN2601B @ Reserved5 LED_WWAN# MC_LED# T2601 @ @ @ @
17,29 LPC_FRAME# 3 0OHM 4 43 44 1
RN2602A @ Reserved6 LED_WLAN#
17,29 LPC_AD3 1 0OHM 2 45 46
RN2602B @ Reserved7 LED_WPAN#
17,29 LPC_AD2 3 0OHM 4 47 48
C RN2603A @ Reserved8 1.5V_3 C
17,29 LPC_AD1 1 0OHM 2 49 50
RN2603B @ Reserved9 GND12 +3VS
17,29 LPC_AD0 3 0OHM 4 51 52 GND
Reserved10 3.3V_2

53 56
1

C2601 GND13 NP_NC2


54 55

1
GND14 NP_NC1 C2609 C2610 C2612 C2613
10PF/50V
@ MINI_CARD_LATCH_52P 10UF/10V c0402 c0402 c0402
2

c0805_h57 0.1UF/10V 0.01UF/50V 0.01UF/50V

2
FOR DEDUG CARD USED GND

GND
GND

Power consumption of WLAN SPEC:

Instead of Mini-PCIE latch Vendor ASKEY ASKEY ASKEY Realtek


connecter.For cost down. Debug Card CON
B Chip Name XB61 XB62 XB63 RTL8187 B

WLL3140 WLL4080 WLL3141 WN6301L


H2601 H2602 Transmit Mode 550mA +3V
11.a
HT-G4068M20TCU HT-G4068M20TCU FPC_CON_12P
11.b 525mA 560mA 2330mW 445mA
1
LPC_AD0 1
11.g 560mA 550mA 2155mW 450mA 2
2 SIDE1
13
3
LPC_AD1 3
4
11.n 5
4
GND GND LPC_AD2 5
11.a 280mA 6
6
Receive Mode 7
7
430mA 270mA 1089mW 310mA LPC_AD3 8
11.b 9
8
LPC_FRAME# 9
11.g 460mA 280mA 1122mW 330mA 10
10
11 14
CLK_FWHPCI 11 SIDE2
12
11.n 12
CON2603
Sleep Mode Current 220mA 20mA 325mA GND

MIN 3.0V 3.0V 3.0V 3.3V-5%


Supplied Voltage(VCC) TYP 3.3V 3.3V 3.3V 3.3V
MAX 3.6V 3.6V 3.6V 3.3V+5%

A A

Title : MINI PCIEX/DEBUG CON


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 26 of 66
2 1
5 4 3 2 1

For Side SW

D
WLAN ON/OFF Control D

+3VS

1
R2703
10KOhm
r0402
@

2
26 MINCARD_WLAN_ON/OFF#

3
Q2702
D

19,29,30 WLAN_SW# 2 G

3
QN7002-T1B-AT 3

1
D
Q2701
C C
2N7002
29 WLAN_ON# 11
G
2 S

2
GND

070426 To add the ehanced ESD transistor. Q2702 --- IVERSON


GND

B B

A A

Title : WLAN CONTROL


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 27 of 66
2 1
5 4 3 2 1

+5VS
07/0409 To change netname from DAC_HSYNC_BUF
into DAC_HSYNC_GM --- Iverson

14
U2801C
9 VCC
8 CRT_HSYNC 13
7 DAC_HSYNC_GM 10
CON2802 GND
25 1 74ACT08SCX_NL

7
NP_NC3 1 +5VS
2 SATA_TXP0 17
2
23 3 SATA_TXN0 17
NP_NC1 3
4
4

2
D 5 SATA_RXN0_CON 1 2 C2802 3900PF/50V MLCC/+/-10% C1803 D
5 SATA_RXN0 17 +5VS
6 SATA_RXP0_CON 1 2 C2801 3900PF/50V MLCC/+/-10%
6 SATA_RXP0 17
7 0.1UF/10V

1
7

14
U2801D
12 VCC
8 +3VS 11 CRT_VSYNC 13
8
9 7 DAC_VSYNC_GM 13
9 GND
10
10 74ACT08SCX_NL
11

7
11
12
12
13
13 07/0409 To change netname from DAC_VSYNC_BUF
14 into DAC_VSYNC_GM --- Iverson
14
15
15 +5VS
16 +5VS
16
17
17 TPC26T T2801
18 1
18

1
19 C2803 C2804

14
19 0.1UF/10V 10UF/10V U2801B
24 20
NP_NC2 20 VCC
21 29 EC_BATLOW_BEEP 4

2
21
26 22 6 BAT_LOW_BEEP 21
NP_NC4 22
29 EC_PWM_DL 5
SATA_CON_22P GND GND GND
74ACT08SCX_NL

7
GND 07/05/17 To move the C2803 and C2804 from the +3Vs into the +5Vs --- iverson
GND

C
07/04/17 To use U2801 to gate EC_BATLOW_BEEP---Feng C
+5VS

14
U2801A
1 VCC

SATA HDD 2
GND
74ACT08SCX_NL
3

7
GND

1 2 IDE_RST#
7,18,25,26,29 PLT_RST#
R3022 0Ohm
@

+5VS
17 IDE_PDD[15:0]
CD-ROM

GND1
NC1
51NC3
B B
CD_CSEL : Pull-Up, CDROM as Slave,

53

55
CON2803
Pull-Down, CDROM as Master +3VS 1 2
3 4
R2806 1 2 470Ohm CD_CSEL IDE_RST# 5 6 IDE_PDD8
r0402_h16 R2805 2 1 4.7KOhm IDE_PIORDY IDE_PDD7 7 8 IDE_PDD9
@ IDE_PDD6 9 10 IDE_PDD10
IDE_PDD5 11 12 IDE_PDD11
R2807 1 2 470Ohm R2804 1 2 8.2KOhm INT_IRQ14 IDE_PDD4 13 14 IDE_PDD12
r0402_h16 IDE_PDD3 15 16 IDE_PDD13
IDE_PDD2 17 18 IDE_PDD14
IDE_PDD1 19 20 IDE_PDD15
GND IDE_PDD0 21 22 IDE_PDDREQ
IDE_PDDREQ 17
23 24 IDE_PDIOR#
IDE_PDIOR# 17 +5VS
IDE_PDIOW# 25 26
17 IDE_PDIOW#
IDE_PIORDY 27 28 IDE_PDDACK#
17 IDE_PIORDY INT_IRQ14 IDE_PDDACK# 17
17,19 INT_IRQ14 29 30
IDE_PDA1 31 32 IDE_DIAG 10KOhm 2 1 R2802 @
17 IDE_PDA1
IDE_PDA0 33 34 IDE_PDA2
17 IDE_PDA0 IDE_PDA2 17
+5VS IDE_PDCS1# 35 36 IDE_PDCS3#
17 IDE_PDCS1# IDE_PDCS3# 17
IDE_PDASP# 37 38
30 IDE_PDASP#
39 40
41 42
43 44
45 46
1

1
C2808 CD_CSEL 47 48 C2809 +
0.1UF 49 50 CE2803
c0402 10UF/10V
2

2
BTOB_CON_50P 100UF/16V
54
52

56

2
A A
GND2
NC2
NC4

GND GND @
GND

GND GND
07/05/11 To Change the ODD Part and Symbol. --- Iverson
symbol:nb_btob_50p_8hd_f_ra_lf2=>nb_btob_50p_6hd_f_ra_lf2 Title : PATA-SATA & ODD
part:BTOB_CON_50P_8HOLD_OCTEK=>BTOB_CON_50P_6HOLD_OCTEK
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 28 of 66
2 1
5 4 3 2 1

+5VS 07/04/10 Remove the RN2902 ---Iverson


+3VA_EC +3VS +3VA +3VA_EC D2901
JP2901 TYPE JP UK US

C2903
CLK_ECPCI RN2902A 1@ EXT_PS2_CLK 1N4148W
+3VPLL 8.2KOHM 2
1 2 RN2902B 3@ EXT_PS2_DAT @
8.2KOHM 4
KID0 H H L

2
C2902 1 2 @ RN2902C 5@ PS2CLK1 LID_EC#
8.2KOHM 6 1 2 LID_SW# 12
1

1
C2904 C2905 C2906 @ 1MM_OPEN_5MIL RN2902D 7@ PS2DAT1
8.2KOHM 8
0.1UF/10V +3VA_EC +3VS +3VACC KID1 L H L

1
+3VS

10PF/50V
10UF/10V 0.1UF/10V 0.1UF/10V 1 2 R2916
2

2
1 0Ohm 2
R2921 RN2903A 1 2 TPAD_CLK r0402
4.7KOHM TPAD_CLK 30
GND GND 0Ohm EC_AGND RN2903B 3 4 TPAD_DAT
4.7KOHM TPAD_DAT 30

123
136
157
166

161
GND RN2903C 5 SMB1_DAT

34
45

16

95
4.7KOHM 6
U2901 GND RN2903D 7 8 SMB1_CLK Follow Z94 Keyboard
4.7KOHM
LPC_AD0 15 163 SMCLK_BAT

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6

VBAT
VCC

AVCC
17,26 LPC_AD0 LAD0 SMCLK0/GPB3 SMCLK_BAT 41
D LPC_AD1 14 164 SMDATA_BAT to Battery CON2901 D
17,26 LPC_AD1 LAD1 SMDAT0/GPB4 SMDATA_BAT 41

SMBus
LPC_AD2 13 169 SMB1_CLK +3VS
17,26 LPC_AD2 LAD2 SMCLK1/GPC1 SMB1_CLK 4
LPC_AD3 SMB1_DAT
17,26 LPC_AD3 10
LAD3 SMDAT1/GPC2
170 SMB1_DAT 4 to Thermal SIDE1
29
CLK_ECPCI 18 RN2904A 1 2 RCIN# 1 KSO7
5 CLK_ECPCI LPCCLK 8.2KOHM +3VA_EC +3VPLL 1
LPC_FRAME# 9 81 1 T2907 RN2904B 3 4 A20GATE 2 KSO0
17,26 LPC_FRAME# LFRAME# ADC0/GPK0 8.2KOHM 2
PLT_RST# 30 82 EC_ADC1 1 T2902 RN2904C 5 6 KB_ID0 3 KSI1
7,18,25,26,28 PLT_RST# LPCRST#/WUI4/GPD2 ADC1/GPK1 8.2KOHM 3
INT_SERIRQ T2908 RN2904D 7 KB_ID1 R2912 KSI7

ADC
19,43 INT_SERIRQ 7 83 1 8.2KOHM 8 4
SERIRQ ADC2/GPK2 4

LPC
EXTSMI# 22 84 EC_ADC3 1 T2903 1 0Ohm 2 5 KSO9
19 EXTSMI# ECSMI#/GPM0 ADC3/GPK3 5
ECSCI# 31 93 KB_ID0 6 KSI6
ECSCI#/GPD3 ADC8/GPK4 6

1
A20GATE 5 94 KB_ID1 07/04/20 To add the R2965 0Ohm---iverson +3VACC 7 KSI5
17 A20GATE GA20/GPB5 ADC9/GPK5 +3VA_EC 7
RCIN# 6 C2907 R2913 C2908 8 KSO3
17 RCIN# KBRST#/GPB6 8
EC_RST# 19 99 10UF/10V 1 0Ohm 2 0.1UF/10V 9 KSI4
24 EC_RST# CHG_FULL_LED#_EC 30

2
PWUREQ# WRST# DAC0/GPJ0 EC_DAC1 1 T2904 R2902 9
1 10KOhm 2 BAT_IN_OC# KSI2

DAC
1 23 100 10
PWUREQ#/GPM1 DAC1/GPJ1 10

1
T2905 101 INVTER_DA 11 KSO1
DAC2/GPJ2 INVTER_DA 12 11
FRD# 150 102 BATSEL_2P# R2903 1 10KOhm 2 ACIN_OC# GND C2909 12 KSI3
24 FRD# FRD# DAC3/GPJ3 BATSEL_2P# 58 12
FWR# 151 0.1UF/10V GND 13 KSI0
24 FWR# BRIGHT_PWM 12

2
FCS# FWR# BRIGHT_PWM 13
24 FCS# 173 32 1 R2965 2 EC_PWM_DL 28
R2901 1 3.3KOhm 2 SMCLK_BAT 14 KSO13
FD0 FCS# PWM0/GPA0 FAN_PWM @ 0Ohm 14 KSO5
24 FD0 138 33 FAN_PWM 4 15
FD1 FD0 PWM1/GPA1 EC_PWM_2S T2931 R2904 15
24 FD1 139 36 1 1 3.3KOhm 2 SMDATA_BAT GND 16 KSO2
FD2 FD1 PWM2/GPA2 BAT_LOW_BEEP 16 KSO4
24 FD2 140
FD2 PWM3/GPA3
37 EC_BATLOW_BEEP 28 07/05/14 To change the R2901/R2904 from 17
17
FD3 141 38 CHG_LED_UP# +3VA_EC 18 KSO8
24 FD3
FD4 FD3 PWM4/GPA4 PWR_LED_UP#
CHG_LED_UP# 30 4.7K Ohm into 3.3K Ohm --- iverson 18 KSO6
24 FD4 144 39 PWR_LED_UP# 30 19
FD5 FD4 PWM5/GPA5 BATSEL_3S# R2906 1 10KOhm 2 LID_EC# 19 KSO11
24 FD5 145 40 BATSEL_3S# 58 20
FD6 FD5 PWM6/GPA6 LCD_BACKOFF# 20 KSO10
24 FD6 146 43 LCD_BACKOFF# 12 21
FD6 PWM7/GPA7 21

1
FLASH ROM
FD7 147 R2907 2 100KOhm1 PWRLMT# 22 KSO12
24 FD7 FD7 22
FA0 124 153 NUM_LED R2914 23 KSO14
24 FA0 FA0 RXD/GPB0 NUM_LED 38 23
FA1 125 154 CAP_LED 07/04/10 To change the R2925 from 8.2K Ohm into 10K Ohm --- Iverson 10KOhm 24 KSO15
24 FA1 FA1 TXD/GPB1 CAP_LED 38 24
FA2/ BADDR0 126 162 SCRL_LED 07/04/10 To change the 10K Ohm from R2909 into R2905C --- Iverson r0402 25
24,30 FA2/ BADDR0 FA2/BADDR0 GPB2 SCRL_LED 38 25
FA3/ BADDR1 127 165 THRO_CPU 07/04/17 To add signal EC_PWM_2S to 26 KB_ID0
24,30 FA3/ BADDR1

2
FA4/ PPEN FA3/BADDR1 RING#/PWRFAIL#/LPCRST#/GPB7 AC_APR_UC# 26
24,30 FA4/ PPEN 128 control EC_BATLOW_BEEP---Feng 27
FA5/ SHBM FA4/PPEN T2910 27 KB_ID1
C
24,30 FA5/ SHBM 131 47 1 28 C
FA5/SHBM CLKOUT/GPC0 28

3
FA6 132 171 PWRLMT# 1 T2911 +3VSUS 3 30
24 FA6 FA6 GPC3 D SIDE2
FA7 133 172 ACIN_OC#
24 FA7 FA7 TMRI0/WUI2/GPC4 ACIN_OC# 60
FA8 143 175 OP_SD# Q2901
24 FA8 FA8 GPC5 OP_SD# 22
FA9 142 176 BAT_IN_OC# 1 10KOhm 2 R2908 EXTSMI# 2N7002 11 FPC_CON_28P
24 FA9 FA9 TMRI1/WUI3/GPC6 BAT_IN_OC# 60 AC_APR_UC 58
FA10 135 1 1 T2912 G
24 FA10 FA10 CK32KOUT/GPC7 S 2
FA11 134 5 6 RN2905C PM_PWRBTN#
24 FA11 10KOhm

2
FA12 FA11 PM_SUSB# GND
24 FA12 130 26 PM_SUSB# 19
FA13 FA12 RI1#/WUI0/GPD0 PM_SUSC#
24 FA13 129 29 PM_SUSC# 19,36 7 10KOhm 8 RN2905D WLAN_ON#
FA14 FA13 RI2#/WUI1/GPD1 EC_GPD4 1 T2923 GND
24 FA14 121 41
FA15 FA14 GPD4 EC_GPD5 1 T2913
24 FA15 120 42
FA16 FA15 GINT/GPD5 FAN0_TACH SUSB_EC# RN2907A 1
24 FA16 113
FA16/GPG0 TACH0/GPD6
62 FAN0_TACH 4 4.7KOHM 2 07/04/10 Add RN2907 4.7K Ohm to pull down on
FA17 112 63 EC_GPD7 1 T2914 SUSB_EC0# RN2907B 3 4
24 FA17
FA18 FA17/GPG1 TACH1/GPD7 SUSB_EC2# RN2907C 5
4.7KOHM SUSB_EC#/SUSB_EC0#/SUSB_EC2#/SUSC_EC# +3VA_EC
24 FA18 104 4.7KOHM 6
FA19 103
FA18/GPG2
87 WLAN_SW#_EC R2927 1 0Ohm 2@ SUSC_EC# RN2907D 7 8 ---Iverson
24 FA19 FA19/GPG3 ADC4/GPE0 WLAN_SW# 19,27,30 4.7KOHM
88 INTERNET#1 T2917
GPIO

KSI0 ADC5/GPE1 MARATHON# T2925 PM_SUSB#


71 89 1 1 10KOhm 2 RN2905A
KSI1 KSI0/STB# ADC6/GPE2 DISTP# T2915
72 90 1
KSI1/AFD# ADC7/GPE3

2
KSI2 73 2 PWRSW#_EC PM_SUSC# 3 4 RN2905B
KSI2/INIT# PWRSW/GPE4 PWRSW#_EC 38 10KOhm
KSI3 74 44 EC_GPE5 1 T2918 R2918 D2904
KSI4 KSI3/SLIN# WUI5/GPE5 ME_ALERT#1 T2943
77 24 100KOhm 1N4148W
KSI5 KSI4 LPCPD#/WUI6/GPE6 GPE7 T2924
78 25 1 r0402_h16
KSI6 KSI5 CLKRUN#/WUI7/GPE7
79 C2917

1
KSI7 KSI6 TPAD_CLK
80 116
KSO0 KSI7 PS2CLK2/GPF4 TPAD_DAT GND
49 117 2 1 GND
KSO0/PD0 PS2DAT2/GPF5
KBMX

KSO1 50 118 1 T2940


KSO2 KSO1/PD1 PS2CLK3/GPF6 DJ_SW# T2920 D2903
51 119 1 1UF/6.3V
KSO3 KSO2/PD2 PS2DAT3/GPF7
52 2 1
KSO4 KSO3/PD3 LID_EC#
53 3
KSO5 KSO4/PD4 FA20/GPG4 EC_GPG5 1 T2921 R2930 1N4148W
56 4
KSO6 KSO5/PD5 FA21/GPG5 PM_THERM#_EC +3VA_EC
B 57 27 1 0Ohm 2 PM_THERM# 19
U2902 B
KSO7 KSO6/PD6 LPC80HL/GPG6 AC_APR_UC# r0402 EC_RST_SW# EC_RST#
58 28 4,38,41,51,62 EC_RST_SW# 5 1
KSO8 KSO7/PD7 LPC80LL/GPG7 @ CD RST/OUT
59
KSO8/ACK#

1
KSO9 60 48 VSUS_ON_EC R2915 1 100Ohm 2 2
KSO9/BUSY GPH0 VSUS_ON 4,25,51,63 VCC/VDD
KSO10 61 54 C2910
KSO10/PE GPH1 SUS_PWRGD 51,62

1
KSO11 64 55 Do Not Stuff 4 3 C2912
CPU_PWRGD 40 4,38,41,51,62 FORCE_OFF#

2
KSO12 KSO11/ERR# GPH2 PM_PWRBTN# @ NC GND 0.1UF/10V
65 69 PM_PWRBTN# 19
KSO13 KSO12/SLCT GPH3 SUSC_EC# RN5VD27CA @
66 70 SUSC_EC# 19,40

2
KSO14 KSO13 GPH4 SUSB_EC0# R2923 1 0Ohm GND @
67 75 2
KSO15 KSO14 GPH5 CPU_VRON @ GND
68 76 CPU_VRON 50
KSO15 GPH6 PM_RSMRST#
105 2 1 1SS355 PM_RSMRST# 19
GND
EC_XIN GPH7 D2906
158
EC_XOUT CK32K ICH_PWROK_EC D2907 2
160 148 1 1SS355 ICH_PWROK
ICH_PWROK 7,19 Change threshold = 2.9V
CK32KE GPI0
PS/2

149 ALL_SYSTEM_PWRGD 43,62


EXT_PS2_CLK GPI1 EC_GPI2 1 T2922 R2917 1 0Ohm
110 152 2 tD = 0.69*10^6*CD ps = 6.9 ms
KSO16/GPM2
KSO17/GPM3

EXT_PS2_DAT PS2CLK0/GPF0 GPI2 CHG_EN# @ +3VS


111 155
CRX/GPM5

CHG_EN# 58
CTX/GPM4

PS2CLK1 PS2DAT0/GPF1 GPI3 PRECHG


114
PS2CLK1/GPF2 GPI4
156 PRECHG 58 07/04/03 Change net
PS2DAT1 115 168 EC_CLK_EN
PS2DAT1/GPF3 GPI5 EC_CLK_EN 19 name from BAT_LL# to

2
AVSS
GPL0
GPL1
GPL2
GPL3
GPL4

GPL5
GPL6
GPL7

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
GPJ4
GPJ5

174 BAT_LEARN
GPI7

GPI6 BAT_LEARN 58 EC_CLK_EN ---Iverson

3
R2926 3
D +3VA_EC +3VSUS
10KOhm
IT8511TE
8
11
12
20
21
85
86
91
92
97
98
106
107
108
109

17
35
46
122
137
159
167

96

R2922 11 Q2904

3 1
close to EC ECSCI# 2 1 KB_SCI# G 2N7002 1 2 RN2906A WLAN_SW# 1 2 C2913 0.1UF/10V
KB_SCI# 19 10KOhm
C2911 3 2 S 3 4 RN2906B INTERNET# 1 2 C2914 0.1UF/10V
10KOhm

2
D
EC_XIN 0Ohm RN2906C DISTP# C2901 0.1UF/10V
EC_PWM_16S

1 2 5 10KOhm 6 1 2
7 8 RN2906D MARATHON# 1 2 C2916 0.1UF/10V
X2901 10KOhm
15PF/50V GND EC_AGND PM_THERM#_EC 11 Q2903
1

GND 1 SUSB_EC2# G 2N7002 GND Layout Note:


1 R2919 @ SUSB_EC# 2 S GND
3 SUSB_EC# 12,40 07/06/26 Reserve for auto on issue --- Iverson Close to Switch

2
SIDE 10MOhm T2928
2 1
A 2 CLK32 T2929 A
1 070424 To add the EC_PWM_16S net name H_PROCHOT_S# 2
GND 1 T2930
to control BAT_LOW_BEEP---Iverson
2

32.768KHZ C2915 R2920 1 R2966 2 EC_PWM_DL +3VSUS GND

3
1 2 2 1 EC_XOUT 0Ohm 3
GPM5 36 D
R2924 @
GPM4 36 D2905 Q2902 <Variant Name>
15PF/50V 0Ohm ID_EC 1 0Ohm 2 ID 41
GND 1 T2935 R2928 1 10KOhm 2 PM_RSMRST# 1 THRO_CPU 11 2N7002

Cload=12.5PF
1
1
T2936
T2937 07/05/17 To add two GPIO net ( GPM4/GPM5 R2931 1 10KOhm 2 ICH_PWROK 2
3 SUS_PWRGD 51,62 G
2 S
Title : EC IT8511TE

2
WLAN_ON# 1 T2938 Feng Lin
27 WLAN_ON#
T2939
) to control the USB POWER SW--- iverson
BAT54C@
ASUSALPHATeK COMPUTER INC. Engineer:
1
Size Project Name Rev
GND Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 29 of 66
3 2 1
5 4 3 2 1

(070131,EMI)New addition for EMI


LED Board Interface (070205)mount
S tra p v a lu e s a m p le d a fte r 07/04/10 Remove the Adaptor --- Iverson

EC Hardware Strap V S T B Y p o w e r u p re s e t

1
GND
D3009
+3VA_EC +3VA_EC 0603-050E101NP-LF
PNPCFG base address set by +5V
+5VSUS
SWCBAHR/SWCBALR

2
1

1
@ CON3001

1
D HDD_LED# L3024 1 D
R3002 @ R3003 2120Ohm/100Mhz 12
10KOhm 10KOhm C3008 C3007 L3025 1 12
2120Ohm/100Mhz 11 14
r0402 r0402 0.01UF/25V 0.1UF/10V 802_LED#_R L3026 1 11 SIDE2
2120Ohm/100Mhz 10

2
CHG_LED#_R L3027 1 10
2120Ohm/100Mhz 9
2

2
FA2/ BADDR0 FA3/ BADDR1 PWR_LED#_R L3028 1 9
FA2/ BADDR0 24,29 FA3/ BADDR1 24,29 2120Ohm/100Mhz 8
+5VS +5VS_TP GND L3029 1 8
2120Ohm/100Mhz 7
1

1
SUSPEND_LED# L3030 1 7
2120Ohm/100Mhz 6
R3006 R3007 @ L3002 GND 6
5
10KOhm 10KOhm 5
BADDR[1:0] 2 1
WLAN_SW#
4
4
r0402 r0402 L3031 1 2120Ohm/100Mhz 3
19,27,29 WLAN_SW# 3
No pull up: The register pair to access PNPCFG is 80Ohm/100Mhz CHG_FULL_LED# L3032 1 2120Ohm/100Mhz 2 13
2

2
2 SIDE1
1
002Eh and 002Fh. 1

1
Ext 10K up on BADDR0: The register pair to access PNPCFG is FPC_CON_12P
GND GND 004Eh and 004Fh. C3006
0.1UF/10V

2
Ext 10K up on BADDR1: The register pair to access PNPCFG is
determined by EC domain registers
07/04/10 Remove the Adaptor --- Iverson GND
SWCBALR and SWCBAHR.
GND

+3VA_EC +3VA_EC
Touchpad Board Interface
Share Memory
1

R3010 R3001 @
10KOhm 10KOhm +5VS_TP
r0402 r0402
C C
2

FA5/ SHBM FA4/ PPEN CON3002


FA5/ SHBM 24,29 FA4/ PPEN 24,29
6 8
1

6 SIDE2
5
R3013 @ R3014 5
29 TPAD_DAT 4
10KOhm 10KOhm 4
SHBM PPEN 29 TPAD_CLK 3
3
r0402 r0402 2

1
2
No pull up: Disable shared memory No pull up: Normal 1 7
2

C3009 1 SIDE1
with host BIOS Ext 10K up: KBS interface pins are switched 0.1UF/10V FPC_CON_6P

1
GND Ext 10K up: Enable shared memory GND to parallel port interface for C3011 C3012
with host BIOS in-system programming.
100PF/50V 100PF/50V

2
GND

GND
GNDGND
(070129,EMI)add two 100PF capacitors
CHARGE LED POWER LED
HDD LED 070426 To remove the D3006, and To add the Q3011. --- IVERSON
+5V
+5VSUS PWR_LED#_R

GREEN

3
CHG_LED#_R Q3008
2

+3VS +5VS ORANGE R3017 D


R3015 10KOhm

3
10KOhm Q3003
2

D
WLAN LED

1
R3019 R3020 2 G
1

10KOhm 10KOhm +5VS

3
B @ T3001 3 802_LED#_R B
D
1 2 G S
1

D3005 QN7002-T1B-AT

1
3

2
1 3 11 Q3011
17 SATA_LED# D 37 SUSB

3
3 HDD_LED# S G 2N7002 R3016 Q3009
2 QN7002-T1B-AT 2 S 10KOhm D
28 IDE_PDASP#
1

2
11 Q3001
29 CHG_LED_UP#

3
DAP202K G 2N7002 3 GND
D

1
@ 07/04/09 Remove Solution 1 ---Iverson 2 S
2

GND 2 G
D3008

3
11 Q3002 3
29 PWR_LED_UP# D
2 1 GND GND G 2N7002
CHG_FULL_LED# 2 S S

2
GREEN 11 Q3004 QN7002-T1B-AT
19 WLAN_LED#

1
1N4148W 2N7002
G
3

Q3005 ORANGE 2 S

2
D GND
SUSPEND_LED#

GND
2 G GND

3
Q3010
S D 070426 To add the ehanced ESD transistor.
QN7002-T1B-AT
Q3003.Q3005.Q3008.Q3009.Q3010 --- IVERSON
1

2 G

GND S
QN7002-T1B-AT
1

A 2 R3023 1 A
+5VSUS
3

3 10KOhm
D
GND
2N7002
29 CHG_FULL_LED#_EC 11
G Q3007
2 S
Title : EC IT8511/LED&TP CON.
2

ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou


GND
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 30 of 66
2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A <Doc> <RevCode>

Date: Thursday, July 05, 2007 Sheet 31 of 66


2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A <Doc> <RevCode>

Date: Thursday, July 05, 2007 Sheet 32 of 66


2 1
5 4 3 2 1

2 0Ohm 1
R3310 Name Drive Name Drive
Q3309 @ 2N7002 MDIO00 I - PU MDIO10 I/O - PU
MDIO11_SD/MS/XDDAT1 3 2 SD_DAT1 MDIO01 I - PU MDIO11 I/O - PU

2 S
D
3
MDIO02 O - PU MDIO12 I/O - PU

G
2 0Ohm

11
1
R3309 MDIO03 I - PU MDIO13 I/O - PU
Q3310 @ 2N7002 MDIO04 O - 3V MDIO14 I/O - PU
MDIO12_SD/MS/XDDAT2 3 2 SD_DAT2 MDIO05 O - 3V MDIO15 I/O - PU

2 S
D
D D

3
1 0Ohm 2 MDIO06 O - 3V MDIO16 I/O - PU

G
R3311

11
07/0409 Remove R3301 --- Iverson MDIO07 I - 3V MDIO17 I/O - PU
3 2 MDIO08 I/O - PU MDIO18 I/O - PU

2 S
D
+MC_VCC +XD_VCC

3
2 1 SD_CD Q3311 MDIO09 I/O - PU MDIO19 I/O - PU

G
+12VS
R3301 10KOhm 2N7002

11
2 1@ XD_CD @
R3302 10KOhm
@

3
3 3
D D
Q3312 Q3313
2N7002 2N7002
MDIO00_SDCD#_XDCD# 11 @ XD_CD# 11 @
G G
2 S 2 S

2
GND GND

07/04/06 Add R3310 0 Ohm between MDIO11_SD/MS/XDDAT1 and SD_DAT1.


Add R3311 0 Ohm between MDIO12_SD/MS/XDDAT2 and SD_DAT2.
Remove Q3309 Q3310 Q3312 --- Iverson

+3VS
C C

close to card reader

2
07/06/30 To Remove the R3306 Q3306 Q3307. ---IVERSON

1
C3309 R3306

2
10UF/10V 2
S
N/A 10KOhm

2
Card Detect Table c0805_h57 Q3307

1
11
G SI2301BDS_T1_E3 +MC_VCC
MDIO00 MDIO01 3 D
GND @

3
3
XD Low Low 3 @
D
Q3306
SD Low High
43
2N7002
11

2
MDIO04_SD/MS/XDPWR Place as close to
MS High Low G
S

1
2 @ C3310 C3307 C3308 R3307 card reader socket

2
1UF/16V 0.1UF/16V 0.1UF/16V 150KOhm
as possible

2
GND

1
MEDIA CARD SLOT 1
U3301
5
GND
2 R3312 1
+3VS

OUT OC#
2
GND 10KOhm
3 4
+MC_VCC IN EN
CON3301 G5250H1T1U
MDIO03_SDWP_XDR/B# 1 GND
B MDIO09_SD/MSCLK_XDRE# XD-R/B B
2
MDIO02_XDCE# XD-RE D3303
3
MDIO18_XDCLE XD-CE MDIO00_SDCD#_XDCD#
4
XD-CLE
2 07/06/28 To add the C3310 1UF and the U3301 and R3312 10KOhm.---Iverson
MDIO19_XDALE 5 3 XD_CD#
MDIO08_SDCMD_MSBS_XDWE# XD-ALE MDIO01_MSCD#_XDCD#
6 1
MDIO05_XDWP# 7 XD-WE
MDIO10_SD/MS/XDDAT0 XD-WP
8
MDIO11_SD/MS/XDDAT1 XD-DATA0 DAN202K
9
SD_DAT2 10 XD-DATA1
MDIO13_SD/MS/XDDAT3 SD-DATA2 +3VS
11
MDIO08_SDCMD_MSBS_XDWE# SD-DAT3
12
SD-CMD
13
GND1
14
MS-VCC

1
MDIO09_SD/MSCLK_XDRE# 15
MDIO13_SD/MS/XDDAT3 MS-SCLK R3308
16
MDIO01_MSCD#_XDCD# 17 MS-DATA3 MDIO17_XDDAT7
43 MDIO17_XDDAT7 249Ohm
MDIO12_SD/MS/XDDAT2 MS-INS MDIO16_XDDAT6
18 43 MDIO16_XDDAT6
MDIO10_SD/MS/XDDAT0 MS-DATA2 MDIO15_XDDAT5
19

2
MS-DATA0 43 MDIO15_XDDAT5
MDIO11_SD/MS/XDDAT1 20 MDIO14_XDDAT4
MS-DATA1 43 MDIO14_XDDAT4
MDIO08_SDCMD_MSBS_XDWE# 21 MDIO13_SD/MS/XDDAT3
MS-BS 43 MDIO13_SD/MS/XDDAT3

1
22 MDIO12_SD/MS/XDDAT2
43 MDIO12_SD/MS/XDDAT2

1
GND2 MDIO11_SD/MS/XDDAT1 D3304 LED3301
23

+
SD-VCC 43 MDIO11_SD/MS/XDDAT1
MDIO09_SD/MSCLK_XDRE# 24 MDIO10_SD/MS/XDDAT0 GREEN
SD-CLK 43 MDIO10_SD/MS/XDDAT0
MDIO10_SD/MS/XDDAT0 25
MDIO12_SD/MS/XDDAT2 SD-DATA0
26
MDIO13_SD/MS/XDDAT3 XD-DATA2 MDIO05_XDWP# 0603-050E101NP-LF
27 43 MDIO05_XDWP#

2
MDIO14_XDDAT4 XD-DATA3 MDIO08_SDCMD_MSBS_XDWE#
28

2
XD-DATA4 43 MDIO08_SDCMD_MSBS_XDWE#

1
SD_DAT1 29 MDIO19_XDALE
SD-DATA1 43 MDIO19_XDALE MEDIACARD_LED 43
MDIO15_XDDAT5 30 MDIO18_XDCLE D3305
+XD_VCC XD-DATA5 43 MDIO18_XDCLE
MDIO16_XDDAT6 31 MDIO02_XDCE# @
XD-DATA6 43 MDIO02_XDCE#
MDIO17_XDDAT7 32
XD-DATA7 0603-050E101NP-LF
33
A XD_CD# XD-VCC MDIO03_SDWP_XDR/B# A
34

2
XD-CD 43 MDIO03_SDWP_XDR/B#
MDIO03_SDWP_XDR/B# 35
MDIO00_SDCD#_XDCD# SD-WP-SW MDIO00_SDCD#_XDCD#
MDIO01_MSCD#_XDCD# XDWP/GND1
36
SD-CD-SW 43 MDIO00_SDCD#_XDCD#
@
(070129)add two Varistors
37
XDD0/GND2 SIDE1 MDIO01_MSCD#_XDCD#
38 43 MDIO01_MSCD#_XDCD#
SIDE2
39 GND
1

NP_NC1
40 GND
C3304 C3305 C3306 NP_NC2
41
NP_NC3
270PF/50V 270PF/50V 3300PF/50V MDIO09_SD/MSCLK_XDRE#
Title : MEDIA CARD SLOT
2

43 MDIO09_SD/MSCLK_XDRE#
@ @ CARD_READER_36P
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
07/06/26 Modify CON3301 PCB footprint ---iverson
GND Size Project Name Rev
GND Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 33 of 66
3 2 1
5 4 3 2 1

Support Wake On LAN GND

1
=>Adapter In mode: S3, S4 and S5 R3412
0Ohm
Battery mode: S3 @ PCI_AD[0..31] 18,19,20,22,25,29,40,43,51

2
DVDD
PCI_C/BE#0
18,43 PCI_C/BE#0
+3VSUS PCI_C/BE#1
PCI_C/BE#1 18,43
PCI_PAR
PCI_PAR 18,43
PCI_SERR# Layout Note:
PCI_SERR# 18,19,43
PCI_PERR#
PCI_PERR# 18,19,43 L_TDP, L_TDN termination resistors

PCI_AD10
PCI_AD11
PCI_AD12

PCI_AD13
PCI_AD14

PCI_AD15
PCI_STOP#

PCI_AD2

PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6

PCI_AD7

PCI_AD8
PCI_AD9
D PCI_STOP# 18,19,43 D
PCI_DEVSEL# should be near chip
PCI_DEVSEL# 18,19,43
PCI_TRDY#
PCI_TRDY# 18,19,43 C3402
CLKRUN 1 2 1 2 LAN_C_T R3403
1 2 49.9Ohm 1% L_TDP
PM_CLKRUN# 19,43 L_TDP 35
@ r0402_h16
R3402 @ 0.1UF R3404
1 2 49.9Ohm 1% L_TDN
L_TDN 35
0Ohm r0402 c0402 @ r0402_h16
+3VSUS @

102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
GND C3403
U3401
1 2 LAN_C_R R3405
1 2 49.9Ohm 1% L_RDP

AD2
GND12
GND11
VDD25_3
AD3
AD4
AD5
AD6
VDD33_5
AD7
CBEB0
GND10
AD8
AD9
NC18
AD10
AD11
AD12
VDD33_4
AD13
AD14
GND9
GND8
AD15
VDD25_2
CBEB1
PAR
SERRB
NC17
NC16
NC15
VDD33_3
PERRB
STOPB
DEVSELB
TRDYB
GND7
CLKRUNB
L_RDP 35
PCI_AD1 103 64 @ r0402_h16
PCI_AD0 AD1 NC14 PCI_IRDY# 0.1UF R3401
104 63 PCI_IRDY# 18,19,43 1 2 49.9Ohm 1% L_RDN
L_RDN 35
AD0 IRDYB c0402 @ r0402_h16
105 62
EECS LANWAKE NC13 PCI_FRAME# @
106
EECS FRAMEB
61 PCI_FRAME# 18,19,43 Layout Note:
107 60 PCI_C/BE#2 GND
VDD33_6 CBEB2 PCI_C/BE#2 18,43 L_RDP, L_RDN termination resistors
EEDO 108 59 PCI_AD16
EEDI/AUX EEDO AD16 PCI_AD17
109
AUX/EEDI AD17
58 should be near transformer
110 57 PCI_AD18
EESK NC19 AD18
111 56 +3VSUS
EESK VDD33_2 PCI_AD19
112
NC20 AD19
55 07/06/29 To change the C3402/C3403 from 0.01uF into 0.1uF.---iverson
113 54 DVDD
NC21 VDD25_1 PCI_AD20
114 53
LED2 AD20 +3VSUS
115 52
LED1 GND6
116 51
NC22 GND5 PCI_AD21
117 50

1
LED0 AD21 PCI_AD22
118 49
NC23 AD22 R3406
119 48
C GND13 NC12 PCI_AD23 R3407 33Ohm 3.6KOhm +3VSUS C
120 47
XTAL1 NC24 AD23 LAN_IDSEL PCI_AD23 r0402_h16
121 46 1 2
XTAL2 XTAL1 IDSEL U3402 T3405 TPC26T
122 45 1

2
XTAL2 NC11 PCI_C/BE#3 EECS T3406 TPC26T
123 44 PCI_C/BE#3 18,43 1 8 1
GND14 CBEB3 PCI_AD24 EESK CS VCC
R3408 need close to LAN chip 124 43 2 7

1
GND15 AD24 PCI_AD25 EEDI/AUX SK DC C3404
125 42 3 6
R3408 NC25 AD25 EEDO DI ORG 0.1UF/10V
126 41 4 5
NC26 VDD33_1 DO GND
AVDD33_0

AVDD33_1

AVDD33_2

ISOLATEB
1 2 LAN_RSET 127 40 PCI_AD26 c0402

VDD33_0
PCIRSTB

VDD25_0

2
RSET AD26
AVDD25
CTRL25

PCI_AD27 AT93C46

PCICLK
128 39
INTAB
GND16 AD27

REQB
PMEB
GND0

GND1

GND2

GNTB

GND3

GND4
5.6KOhm NC10

AD31
AD30

AD29
AD28
NC0
NC1
NC2

NC3
NC4
NC5
NC6

NC7
NC8

NC9
RX+
TX+

RX-
TX-

1% GND GND
GND
GND 070507 To add test point on LAN 1 T3407 TPC26T
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
RTL8100CL GND EEPROM signals.---IVERSON EECS 1 T3401 TPC26T
EESK 1 T3402 TPC26T
EEDI/AUX 1 T3403 TPC26T
X3401 EEDO 1 T3404 TPC26T
DVDD 1 2
XTAL1 XTAL2
AVDDL +3VSUS
1

L_TDP C3405 25Mhz


L_TDN 0.1UF/10V
L_RDP c0402 PCI_AD28
2

1
L_RDN GND PCI_AD29
CTRL25 PCI_AD30 C3406 C3407
GND PCI_AD31 27PF/50V 27PF/50V

2
PCI_INTA# PCI_PME#
18,19 PCI_INTA# PCI_PME# 18,43
PCI_RST# PCI_REQ#2
18,43 PCI_RST# PCI_REQ#2 18,19
CLK_LAN_PCI PCI_GNT#2
B 5 CLK_LAN_PCI PCI_GNT#2 18 B
GND
1

C3408 @ R3410
10PF/50V 2 1 +5VS 07/05/16 To change the C3407/C3406 from 30pF into 27pF. --- Iverson
c0402
2

1KOhm
1%
1

GND
R3409 R3411
0Ohm 15KOhm +3VSUS +3VSUS
@ 1%
30 mil 30 mil
2

SUSB#
25,37,40,61,62 SUSB#
@ @ @ @

1
GND C3409 C3410 C3401 C3411 C3412 C3413
c0402 10UF/10V c0402 c0402 c0402 c0402
0.1UF/10V c0805_h57 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
+3VSUS
CTRL25 AVDDL
+3VSUS L3401 GND GND
Q3401 DVDD 120Ohm/100Mhz
20 mil
1 B

MW772M3L 1 2
07G003231011
30 mil
1

1
3
E

C
2

C3414 C3415 C3416


c0402 c0402 c0402
A A
1

C3417 C3418 C3419 C3420 C3421 0.1UF/10V 0.1UF/10V 0.1UF/10V


2

10UF/10V c0402 c0402 c0402 c0402


c0805_h57 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2

GND
Title : LAN_RTL8100CL
GND ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 34 of 66
3 2 1
5 4 3 2 1

LAN PORT
07/04/10 To change the L3504/L3503 from 1K Ohm/100M Hz
into 600 Ohm/100M Hz by EMI request. --- Iverson
WTOB_CON_2P
D D
4
SIDE2 RJ11_RING_CON L3504
2 1 2 600Ohm/100Mhz RJ11_RING
2 RJ11_TIP_CON L3503 RJ11_TIP
1 1 2 600Ohm/100Mhz
1
3
TRANSFORMER 10/100MB SIDE1
CON3502

1
07/05/14 To add the R3510/R3511 49.9 Ohm C3502 C3503
and C3512 close to the transformer. ---iverson
U3501 1000PF/3KV1000PF/3KV
RJ11&RJ45

2
1 16 LAN_RDP
34 L_RDP RD+ RX+
2 15 LAN_RDN
34 L_RDN RD- RX-
3 14 RXCT CHASIS_GND CON3501
RDCT RXCT
RDCT 9 P_GND1 11
6 11 TXCT 10
2

PTCT/TDCT
TXCT LAN_TDP GND
34 L_TDP 7 10
R3511 R3510 TD+ TX+ LAN_TDN
34 L_TDN 8 9
49.9Ohm 49.9Ohm TD- TX- LAN_TXP 1

1
r0402_h16 r0402_h16 C3504 4 12 LAN_TXN 2
1% 1% c0402 NC1 NC3 LAN_RXP
5 13 3
1

2
0.1UF/10V NC2 NC4 LAN_CON8/9 4

2
R3513 R3512 LFE8423 5
49.9Ohm 49.9Ohm LAN_RXN 6
LAN_T_R r0402_h16 r0402_h16 LAN_CON5/6 7
2

1% 1% GND RN3502A 8 12
1

1
P_GND2
C C3512 RXCT 1 2 GND_LAN C
75Ohm CHASIS_GND
0.1UF 07/06/26 To add the R3512/R3513 49.9 Ohm and C3513 MODULAR_JACK_10P
1

LAN_T_T LAN_CON5/6 3 4 RN3502B


c0402 close to the transformer,But do not stuff. ---iverson 75Ohm
2

GND C3513 LAN_CON8/9 5 6 RN3502C


75Ohm
0.1UF
1

RN3503B TXCT 7 8 RN3502D


c0402 75Ohm
3 0OHM 4
GND

1
07/06/29 To change the C3512/C3513 from 0.01uF into 0.1uF.---iverson C3501
1000PF/2KV
LAN_RDN LAN_RXN

2
1

L3501 GND
90Ohm/100Mhz
4

LAN_RDP @ LAN_RXP

1 0OHM 2
MDC CONNECTOR 07/04/06 Remove R3506 0 ohm--- Iverson

RN3503A Support Wake On Ring on S3 +3V


B:MDC NUT
B Co-Layout B

07/04/11Remove the R3507 0 Ohm --- Iverson


H3501

RN3504B
3 0OHM 4
TRSA_MDC_NUT_M2

13
15
17
19
CON4102

1
C3505

GND1
GND3
GND5
NP_NC1
LAN_TDN LAN_TXN 1 2 0.1UF

2
1 2 H3502
3 4 c0402
17 ACZ_SDOUT_MDC
1

3 4
5 6
L3502 5 6 GND
17 ACZ_SYNC_MDC 7 8
7 8

NP_NC2
R3505 1 2 0Ohm 9 10
90Ohm/100Mhz 17 ACZ_SDIN1 9 10

GND2
GND4
GND6
11 12
4

@ 17 ACZ_RST#_MDC 11 12 ACZ_BCLK_MDC 17
LAN_TDP LAN_TXP TRSA_MDC_NUT_M2

1
C3506
BTOB_CON_12P

14
16
18
20
1 2 22PF/50V

2
0OHM
c0402
RN3504A @ GND

A A
Co-Layout GND GND GND

07/06/26 Modify the CON4102 PCB footprint --- iverson

Title : RJ45/RJ11/MDC
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 35 of 66
5 4 3 2 1
5 4 3 2 1

RN3602B RN3603B
3 4 RN3601A 3 4
0OHM 0OHM
1 0OHM 2

USB_P3-
18 USB_PN3
USB_P2+ USB_P0+
18 USB_PP2 18 USB_PP0

2
L3604
L3601 L3605
90Ohm/100Mhz

3
D
@ USB_P3+ 90Ohm/100Mhz 90Ohm/100Mhz D
18 USB_PP3

3
@ USB_P2- @ USB_P0-
18 USB_PN2 18 USB_PN0

1
1 0OHM 2 1 0OHM 2
D3607 D3608 3 0OHM 4
RN3602A D3601 D3606 RN3603A D3602 D3603
EGA10603V05A1 EGA10603V05A1 RN3601B
Co-Layout EGA10603V05A1 EGA10603V05A1 EGA10603V05A1 EGA10603V05A1

2
Co-Layout

2
Co-Layout

GND GND
GND GND GND GND

C C

+3VSUS
2

R3609 07/06/28 To add the R3609/R3610 4.7KOhm ---iverson CON3601


4.7KOhm
+5VSUS 10 12
1

GND4 GND6
1

29 GPM4 8
R3602 R3605 USB_P2+ GND2
7
@ USB_P2- 0P+
0Ohm 6
100KOhm 0P-
07/05/18 To change the R3604 from 10K Ohm into 0 Ohm. --- iverson 5
VCC2
2

+5V 4
U3602 USB_P3+ GND1
3
USBSW_EN# 1P+
4 5 1 R3604 2 USB_CON_OC23# 18
USB_P3- 2
EN#/EN FLG 1P-

1
3 6 0Ohm C3601 1
IN_2 OUT_3 0.1UF/10V VCC1
2
IN_1 OUT_2
7
GND3 GND5 07/05/04 To change the USB CON P/N from
3

3 1 8 C3605
D 12G13111108F into 12G13111108STB---iverson

2
GND OUT_1
1

C3607 0.01UF/25V USB_CON_2X4P


Q3602 @ 9 11
2

B 11 1UF/10V G528P1UF B
19,29 PM_SUSC#
2

G 2N7002 GND
2 S
2

GND L3603
+5VUSB_23 1 2 +5VUSB_23CON
GND GND
80Ohm/100Mhz GND
1

1
+3VSUS CE3602 C3602
150UF/6.3V 0.1UF/10V
2

2
2

R3610
4.7KOhm
07/05/17 To add the R3605/R3606/R3607 0 Ohm. --- iverson GND GND
1

29 GPM5
R3606
0Ohm 07/05/18 To change the R3603 from
@ CON3602
10K Ohm into 0 Ohm. --- iverson L3602
8
1

+5VUSB_0 +5VUSB_0CON P_GND2


1 2 1 6
+5V USB_P0- 1 GND2
2
U3601 USB_P0+ 2
80Ohm/100Mhz 3
USBSW_EN# 10Ohm 3
2 4 5 1 R3603 2 USB_CON_OC0# 18 4 5
EN#/EN FLG 4 GND1
1

R3607 3 6 0Ohm + 7
IN_2 OUT_3 P_GND1
1

2 7 CE3605 C3603
IN_1 OUT_2
1

1 8 C3604 150UF/6.3V 0.1UF/10V USB_CON_1X4P


A GND OUT_1 A
1

C3616 C3615 C3606


2

10UF/10V 0.01UF/25V GND


2

22UF/10V @ 1UF/10V G528P1UF @


2

@
GND GND GND

GND 07/07/02To change the CE3605 from


GND
100 uF into 150 uF ---iverson. Title : USB CONN x3
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
07/06/30 To add the C3616 22 uF and C3615 10uF. ---IVERSON
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 36 of 66
5 4 3 2 1
5 4 3 2 1

+12V +5V +3V +1.8V

1
D R3702 R3703 R3701 R3704 D
2.2KOhm 330Ohm 330Ohm 330Ohm
r0402_h16 @

2
+12V_R +5V_R +3V_R +1.8V_R

3
3 3 3 3
+3VA D D D D
Q3702 Q3703 Q3704 Q3705
11 11 11 11

1
G 2N7002 G 2N7002 G 2N7002 G 2N7002
R3705 2 S 2 S 2 S 2 S @

2
10KOhm
r0402
GND GND GND GND

2
3
3
D
Q3706
40,61 SUSC# 11
C G 2N7002 C
2 S
2

GND

07/04/06 Remove +2.5Vs --- Iverson

+12VS +5VS +3VS +1.5VS +0.9VS


1

1
R3706 R3707 R3708 R3710 R3711
2.2KOhm 330Ohm 330Ohm 330Ohm 330Ohm
@ @ @ @
2

2
+12VS_R +5VS_R +3VS_R +1.5VS_R +0.9VS_R
3

3
3 3 3 3 3
B +3VA D D D D D B
Q3707 Q3708 Q3709 Q3711 Q3712
11 11 11 11 11
1

G 2N7002 G 2N7002 G 2N7002 G 2N7002 G 2N7002


R3712 2 S @ 2 S 2 S @ 2 S @ 2 S @
2

2
10KOhm
r0402
GND GND GND GND GND
2
3

3
D
Q3713 SUSB 30
25,34,40,61,62 SUSB# 11
G 2N7002
2 S
2

GND

A A

Title : Discharge Circuit


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 37 of 66
2 1
5 4 3 2 1

Main Board SW & LED


+3VA

Power Switch

1
R3802
D D
100KOhm
r0402

2
R3803
1 2 PWRSW#
29 PWRSW#_EC
070507 To add test point on power switch --- iverson.
330Ohm
SW3801
1 2 1 T3801 TPC26T
1 2

1
C3803
3 4 1 T3802 TPC26T
0.1UF/50V 3 4
5

2
5

TACT_SWITCH_5P
12G091030050
GND
GND

C C

NUMBER LOCK LED CAPS LOCK LED SCROLL LOCK LED


+5VS +5VS +5VS
Reset Switch
B B
2

2
R3805 R3806
R3807
620OHM 620OHM 620OHM
1

1
FORCE_OFF#
4,29,41,51,62 FORCE_OFF#
1

1
SW3804
LED3810 LED3811 LED3812 1 2
+

+
1 2
GREEN GREEN GREEN
3 4
3 4
5
5
2

2
NUM_LED# CAP_LED# SCR_LED
3

3
D
3
D 3
3
D
Q3803 Q3801 Q3802 GND
A
29 NUM_LED 11 29 CAP_LED 11 29 SCRL_LED 11 A
G 2N7002 G 2N7002 G 2N7002
2 S 2 S 2 S
2

Title : SW/LED
GND GND GND Engineer: Horng Chou
ASUSALPHATeK COMPUTER INC.
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 38 of 66
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A <Doc> <RevCode>

Date: Thursday, July 05, 2007 Sheet 39 of 66


2 1
5 4 3 2 1

R4002
19,29 SUSC_EC# 1 2 SUSC# 37,61
0Ohm
r0402
D D

R4003
12,29 SUSB_EC# 1 2 SUSB# 25,34,37,61,62
0Ohm
r0402

+3VSUS

1
R4005
C 100KOhm C

2
CPU_PWRGD 29

3
@
3
D
Q4001
2N7002
50,62 VRM_PWRGD 11
G
2 S

2
1
C4001
0.22UF/10V
@ @

2
R4001
VRM_PWRGD 2 1

0Ohm
r0402

B B

A <Variant Name> A

Title : POWER-ON SEQ.


ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 40 of 66
2 1
5 4 3 2 1

DC Power Jack
+V_DCJACK
A/D_DOCK_IN_F
A/D_DOCK_IN
Without Battery & Pull out Adapter
C4102
WTOB_CON_4P 0.1UF/25V T4102
4 DC_GND 1 2 1 AC_BAT_SYS 07/03/27 To remove EMI ten capacitors. C4110~C4119---Feng
3 L4102 1 2 80Ohm/100Mhz
D 2 DC_GND D
1 L4103 1 2 80Ohm/100Mhz 1 2

2
CON4101 F4101

1
1 T4103 D4101 C4103 C4104 8A/125V
2 SS0540 0.1UF/25V 0.1UF/25V

2
07/04/13 To Change F4101 10A into

2
R4101 R4102 1 T4101 8A --- Iverson

1
0OHM 0OHM
R4507
1 T4115 GND GND GND 100KOhm
1

1
C4511
(070129,EMI)Mount C4103, C4104

2
1 T4116 2 1 1 2

07/05/11 To add two test point on the DC IN CON ---iverson 1000PF/50V R4508
GND 20KOhm
R2.0 must be remove GND
T4111 T4112 T4113 T4114 T4118 U4501
BAT_CON 1 5 T4519
NC VCC TPC26T
2
1

1
SUB
07/05/17 To Change F4102 10A into 12A(PN=07G012121101TB ) --- Iverson 3
GND VOUT
4 FORCE_OFF# 4,29,38,51,62
1 2 07/04/13 To add the D4105 and D4104 --- Iverson PST9013NR
C C
F4102 (070129,EMI)add three Varistors GND
07/04/10 To change CON1 from P/N 12A/65V
12G200010912 into 12G200010916TB
---Iverson 1

1
GND T4105 T4106 T4104
CON1
D4105 D4104 D4103

1
13 @
NP_NC2 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF
11
P_GND2
2

2
9 GND
9 GND
8
8 SMCLK_BAT_L L4106 1
7 2 1KOhm/100Mhz SMCLK_BAT 29
7 L4107 1
6 SMDATA_BAT_L 2 1KOhm/100Mhz SMDATA_BAT 29
6 TS#_L L4101 1
5 2 1KOhm/100Mhz TS# 58,60
5 B/I
4
4
3
3 ID_BAT
D4106
(detect BATTERY IN)
2 BATT+
2 BATT+
1 1 5
1
1

10 C4108 C4106 C4105


P_GND1 100PF/50V 100PF/50V 0.1UF/25V
12 2
1

NP_NC1 C4107
B B
2

0.1UF/25V 3 4
2

BATT_CON_9P
GND GND GND DF5A6.8FU
@
1

C4101 GND
T4117 T4107 T4108 T4109 T4110
0.1UF/25V
2

+3VA
1

07/06/25 Reserve this varistor ---Iverson


1

07/05/11 To add test point on R4104


the BATT CON ---iverson 100KOhm
@
2

GND @ L4105
ID_BAT 1 2 ID 29
120Ohm/100Mhz
1

(070129,EMI)change 0ohm resister into 120ohm bead


1

C4109
D4102 100PF/50V
A A
@
2

0603-050E101NP-LF (070205,EMI)Changed to 100pF


@
2

GND
Title : DC/ BATT IN
GND Engineer: Horng Chou
ASUSALPHATeK COMPUTER INC.
(070129,EMI)add Varistor Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 41 of 66
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A <Doc> <RevCode>

Date: Thursday, July 05, 2007 Sheet 42 of 66


2 1
5 4 3 2 1

+3VS +3V

1
5mA C4302 C4315 C4312 C4305 8mA
10UF/10V 0.01UF/25V 0.01UF/25V 0.01UF/25V

1
C4309
C4326 C4327 C4328 C4329 C4330
0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 10UF/10V U4301B

2
External 1.8V source GND
C1 J18 AD19/A25 44
NC1 CADR25
71mA CADR24
J15 AD17/A24 44
+3V 2 R4302 1 VCC_RIN_CB D1 K16 CFRAME#/A23 44
GND NC2 CADR23
L16 CTRDY#/A22 44
1

1
D
0Ohm C4306 C4307 C4317 C4316 CADR22 D
E1 L18 CDEVSEL#/A21 44
NC3 CADR21
M16 CSTOP#/A20 44
10UF/10V 0.1UF/10V 0.01UF/25V 0.01UF/25V CADR20
C2 N19 CBLOCK#/A19 44
2

2
NC4 CADR19
GND N16 RFU/A18 44
U4301A CADR18
D2 P16 AD16/A17 44
VCC_ROUT_CB NC5 CADR17
W3 F5 L19 CCLK/A16_R 1 R4303 2 CCLK/A16 44
VCC_PCI3V_1 VCC_3V1 CADR16 22Ohm
R11 J19 E2 K15 CIRDY#/A15 44
VCC_PCI3V_2 VCC_3V2 NC6 CADR15
1

C4301 C4314 C4310 C4311 R12 K19 N18 SHIELD GND


VCC_PCI3V_3 VCC_3V3 CADR14 CPERR#/A14 44

1
G5 E4 N15 C4313
VCC_3V4 NC7 CADR13 CPAR/A13 44
0.47UF/16V 0.47UF/16V 0.01UF/25V 0.01UF/25V K18 5PF/50V
2

CADR12 CBE2#/A12 44
R6 R18 AD12/A11 44 L.C.A

2
VCC_RIN1 CADR11
E13 U19 AD9/A10 44
VCC_RIN2 +3V CADR10
L1 R19 AD14/A9 44
VCC_ROUT1 CADR9 GND
E14 P15
GND VCC_ROUT2 CADR8 CBE1#/A8 44
18,34 PCI_AD[31:0] J16 AD18/A7 44
CADR7

2
H15 AD20/A6 44
PCI_AD31 R4314 CADR6
M2 H18 AD21/A5 44
PCI_AD30 AD31 100KOhm CADR5
M1 A4 G15 AD22/A4 44
PCI_AD29 AD30 VCC_MD3V CADR4
N5 G18 AD23/A3 44
PCI_AD28 AD29 CADR3
N4 F15 AD24/A2 44

1
PCI_AD27 AD28 CADR2
N2 J1 F18 AD25/A1 44
PCI_AD26 AD27 GND1 CB_SPKR CADR1
N1 J5 E16 AD26/A0 44
PCI_AD25 AD26 GND2 CADR0
P5 K5
AD25 GND3

2
PCI_AD24 P4 E9 U18
AD24 GND4 CDATA15 AD8/D15 44
PCI_AD23 R4 R10 R4306 W18
AD23 GND5 CDATA14 RFU/D14 44
PCI_AD22 R2 T10 100KOhm V17
AD22 GND6 CDATA13 AD6/D13 44
PCI_AD21 R1 V10 V16
AD21 GND7 CDATA12 AD4/D12 44
PCI_AD20 T2 W10 @ V15 AD2/D11 44

1
PCI_AD19 AD20 GND8 CDATA11
T1 L15 B19 AD31/D10 44
C PCI_AD18 AD19 GND9 CDATA10 C
U2 M19 C18 AD30/D9 44
PCI_AD17 AD18 GND10 GND CDATA9
U1 A9 D18 AD28/D8 44
PCI_AD16 AD17 AGND1 CDATA8
V1 B9 W17 AD7/D7 44
PCI_AD15 AD16 AGND2 CDATA7
T7 D9 W16 AD5/D6 44
PCI_AD14 AD15 AGND3 CDATA6
Open Drain : V7
AD14 AGND4
D14
CDATA5
W15 AD3/D5 44
PCI_AD13 W7 A15 T15
PME#, PCI_AD12 AD13 AGND5 +3V CDATA4 AD1/D4 44
R8 B15 R14 AD0/D3 44
SERR#, PCI_AD11 T8
AD12 AGND6
E8
CDATA3
C19
AD11 33 MDIO19_XDALE MDIO19 CDATA2 RFU/D2 44
INTn# PCI_AD10 V8 F4 D19 AD29/D1 44
AD10 TEST1 CDATA1

2
PCI_AD9 W8 R7 E19
AD9 TEST2 CDATA0 AD27/D0 44
PCI_AD8 R9 R4301 D8
AD8 33 MDIO18_XDCLE MDIO18
PCI_AD7 V9 10KOhm T19
AD7 OE# AD11/OE# 44
PCI_AD6 W9 GND D4301 M15
AD6 WE# CGNT#/WE# 44 C4320
PCI_AD5 T11 1N4148W B8 T18 0.01UF/25V
33 MDIO17_XDDAT7 AD10/CE2# 44

1
PCI_AD4 AD5 CB_HWSPND# MDIO17 CE2#
V11 F2 1 2 CB_SD# 19 33 MDIO16_XDDAT6 A8 V19 1 2 GND
PCI_AD3 AD4 HWSPND# MDIO16 CE1# CBE0#/CE1# 44
W11 33 MDIO15_XDDAT5 E7 F16 CBE3#/REG# 44
PCI_AD2 AD3 CB_SPKR MDIO15 REG#
T12 F1 CB_SPKR 21 33 MDIO14_XDDAT4 D7 H19 CRST#/RESET 44
PCI_AD1 AD2 SPKROUT# MDIO14 RESET
V12 33 MDIO13_SD/MS/XDDAT3 B7 G16 CSERR#/WAIT# 44
PCI_AD0 AD1 MDIO13 WAIT#
W12 33 MDIO12_SD/MS/XDDAT2 A7 A18 CCLKRUN#/IOIS16# 44
AD0 MDIO12 WP/IOIS16#
18,34 PCI_PAR V6
PAR 07/05/14 To change the R4307 33 MDIO11_SD/MS/XDDAT1 E6
MDIO11 RDY/IREQ#
M18 CINT#/IREQ# 44
PCI_C/BE#3 P2 D6 F19
PCI_C/BE#2 C/BE3# CB_UDIO5 T4302
from 0Ohm into 10Ohm.---iverson 33 MDIO10_SD/MS/XDDAT0 MDIO10 BVD2 CAUDIO/SPKR_IN#/BVD2 44
W2
C/BE2# UDIO5
G1 1 L.C.A BVD1
E18 CSTSCHG/STSCHG#/BVD1 44
PCI_C/BE#1 W6 1 R4307 2 MDIO09 B6 H16
C/BE1# 33 MDIO09_SD/MSCLK_XDRE# MDIO09 VS2# CVS2 44
PCI_C/BE#0 T9 H5 1394_SDA R4316 2 10KOhm 1 +3V SHIELD GND 10Ohm R16
C/BE0# UDIO4 VS1# CVS1 44
IDSEL_CB P1 A6 D15
IDSEL 33 MDIO08_SDCMD_MSBS_XDWE# MDIO08 CD2# CCD2# 44
H4 1394_SCL R4317 2 10KOhm 1 T14
18,34 PCI_C/BE#[3:0] UDIO3 CD1# CCD1# 44
M4 GND SHIELD GND R4308 2 0Ohm 1 MDIO07 D5 G19
18,19 PCI_REQ#1 REQ# MDIO07 INPACK# CREQ#/INPACK# 44
M5 H2 CB_UDIO2 1 T4303
18 PCI_GNT#1 GNT# UDIO2
V3 MEDIACARD_LED B5
18,19,34 PCI_FRAME# FRAME# 33 MEDIACARD_LED MDIO06
V4 H1 CB_UDIO1 1 T4304 P18
B 18,19,34 PCI_IRDY# IRDY# UDIO1 IORD# AD13/IORD# 44 B
18,19,34 PCI_TRDY# W4 33 MDIO05_XDWP# A5 P19 AD15/IOWR# 44
TRDY# INT_SERIRQ MDIO05 IOWR#
18,19,34 PCI_DEVSEL# T5 J4 INT_SERIRQ 19,29
DEVSEL# UDIO0/SRIRQ#
18,19,34 PCI_STOP# V5
STOP# 33 MDIO04_SD/MS/XDPWR B4
MDIO04 90 ohm
W5 07/04/03 Change net V14 CB_USBDP 1 T4305 +3V
18,19,34 PCI_PERR# PERR# USBDP
T6 name from MDIO06 to B3 W14 CB_USBDM 1 T4306
18,19,34 PCI_SERR# SERR# 33 MDIO03_SDWP_XDR/B# MDIO03 USBDM
J2 PCI_INTB# MEDIACARD_LED
INTA# PCI_INTB# 18,19
CB_GBREST# G2 A3
GBRST# ---Iverson 33 MDIO02_XDCE# MDIO02
L4 K4 PCI_INTC# 2 1
18,34 PCI_RST# PCIRST# INTB# PCI_INTC# 18,19
K1 A2 R4309 100KOhm
5 CLK_CBPCI PCICLK 33 MDIO01_MSCD#_XDCD# MDIO01
K2 PCI_INTD# W13
INTC# PCI_INTD# 18,19 VPPEN1 AVPP1 44
19,34 PM_CLKRUN# L5 33 MDIO00_SDCD#_XDCD# B1 V13 AVPP0 44
CLKRUN# MDIO00 VPPEN0
18,34 PCI_PME# G4 L2 T13 VCC3_EN# 44
RI_OUT#/PME# NC0 VCC3EN#
R13 VCC5_EN# 44
VCC5EN#
2

R5C847-CSP208Q

2
R4315 R5C847-CSP208Q
1

100KOhm C4321 C4322 RICOH R5C847 : R4311


100KOhm
@ 5PF/50V 5PF/50V INT A#--> CARDBUS @ +VCCCB
1

L.C.A L.C.A INT B#--> 1394

1
INT C#--> CARD READER

2
GND GND GND GND R4310
MDIO00--> SD Card Detect 100KOhm
MDIO01--> MS Card Detect Not mount:
MDIO02--> XD Card Enable R4306

1
VCC_3V POWER : PCI_AD17 1 2 IDSEL_CB MDIO03--> SD Write Protect XD Card Ready/Busy# CCLKRUN#/IOIS16#
PME#, SPKROUT, RI_OUT# R4312 100Ohm MDIO04--> SD/MS/XD Card Power0 Control R4311 UDIO03 H : Enable SD
+3V ==> CB_GBRST# MDIO05--> XD Card Write Protect R4313
HWSUSP#, GBRST#, IRQn MDIO06--> SD/MSXD LED UDIO04 H : Enable MS
CCD1#, CCD2#, VS1# , VS2# 1ms < T < 100ms R4315
A MDIO07--> SD/MS External Clock VPPEN0 H : Enable XD A
TEST, VCC5EN#, VCC3EN# MDIO08--> SD Command/MS Bus State /XD Card Write Enable C4323
R4313 @ MDIO09--> SD/MS Clock /XD Card Read Enable
VPPEN0, VPPEN1, SD/MS I/F CB_GBREST#
2 1 100KOhm +3V MDIO10--> SD/MS/XD Data 0
29,62 ALL_SYSTEM_PWRGD 1 R4318 2 MDIO11--> SD/MS/XD Data 1 GBRST# POWER SEQ <Variant Name>
VCCPCI POWER : 0Ohm 2 1 0.1UF/10V GND MDIO12--> SD/MS/XD Data 2 +3V ==> (GBRST#/CB_HWSUSP#) ==>PCIRST#
PCI BUS MDIO13--> SD/MS/XD Data 3
C4323 @ MDIO14-->
MDIO15-->
XD Data 4
XD Data 5 H/W SUSPEND# POWER SEQ :
Title : RICOH R5C847
VCC_SLOT POWER : 07/04/04 To add R4318 ---Feng MDIO16--> XD Data 6 SUSPEND : CB_HWSUSP# LO=> PCIRST# LO=> +3VS OFF Engineer: Feng Lin
ASUSALPHATeK COMPUTER INC.
CARD_BUS, MDIO17--> XD Data 7 RESUME : +3VS ON => PCIRST# HI=> CB_HWSUSP# HI
CAUDIO , CSTSCHG MDIO18--> XD Card Command Latch Size Project Name Rev
MDIO19--> XD Card Address Latch Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 43 of 66
3 2 1
5 4 3 2 1

PCMCIA SOCKET
+AVCC_PHY_CB +3V
CCD1# CCD2#
U4301C L4401
+AVCC_PHY_CB
L L 16bit
2 1
OTHER 32bit

1
T4415 1 CPS D11 E10 C4406 C4405 C4404 C4403 C4402 120Ohm/100Mhz
CPS AVCC_PHY3V_1
E11
AVCC_PHY3V_2 1000PF/50V 0.1UF/10V 1000PF/50V 0.1UF/10V 10UF/10V
A17

2
AVCC_PHY3V_3 J4401
B17
D
AVCC_PHY3V_4 D
1 35
1 35 CCD1#
43 AD0/D3 2 36 CCD1# 43
TPBIAS0 T4422 2 36
D12 1 43 AD1/D4 3 37 AD2/D11 43
TPBIAS0 GND 3 37
43 AD3/D5 4 38 AD4/D12 43
T4416 XIN 4 38
1 A16 43 AD5/D6 5 39 AD6/D13 43
XI 5 39
43 AD7/D7 6 40 RFU/D14 43
6 40
43 CBE0#/CE1# 7 41 AD8/D15 43
7 41
A13 43 AD9/A10 8 42 AD10/CE2# 43
TPBN0 8 42
43 AD11/OE# 9 43 CVS1 43
+VCCCB +VPPCB 9 43
B13 43 AD12/A11 10 44 AD13/IORD# 43
T4414 XOUT TPBP0 10 44
1 B16 43 AD14/A9 11 45 AD15/IOWR# 43
XO 11 45
43 CBE1#/A8 12 46 AD16/A17 43
12 46
43 CPAR/A13 13 47 RFU/A18 43
GND TPAN0 T4423 13 47
A12 1 43 CPERR#/A14 14 48 CBLOCK#/A19 43
TPAN0 14 48

2
C4408 C4409 C4410 C4411 15 49
43 CGNT#/WE# 15 49 CSTOP#/A20 43
T4413 1 FIL A14 B12 TPAP0 1 T4421 16 50
FIL0 TPAP0 43 CINT#/IREQ# 16 50 CDEVSEL#/A21 43
0.1UF/10V 10UF/10V 10UF/10V 0.1UF/10V 17 51
+VCCCB +VCCCB

1
17 51
+VPPCB 18 52 +VPPCB
T4419 REXT CCLK/A16 18 52
1 B14 43 CCLK/A16 19 53 CTRDY#/A22 43
REXT @ 19 53
43 CIRDY#/A15 20 54 CFRAME#/A23 43
20 54
43 CBE2#/A12 21 55 AD17/A24 43
T4417 VREF 21 55
1 D13 43 AD18/A7 22 56 AD19/A25 43
VREF GND 22 56
43 AD20/A6 23 57 CVS2 43
GND 23 57 CRST#/RESET
43 AD21/A5 24 58 CRST#/RESET 43
24 58
E12 43 AD22/A4 25 59 CSERR#/WAIT# 43
NC8 25 59
43 AD23/A3 26 60 CREQ#/INPACK# 43
26 60
43 AD24/A2 27 61 CBE3#/REG# 43
CCD1# 27 61
43 AD25/A1 28 62 CAUDIO/SPKR_IN#/BVD2 43
CCLK/A16 28 62
43 AD26/A0 29 63 CSTSCHG/STSCHG#/BVD1 43
29 63
43 AD27/D0 30 64 AD28/D8 43
C 30 64 C

1
C4415 31 65
43 AD29/D1 31 65 AD30/D9 43

1
5PF/50V C4413 32 66
43 RFU/D2 32 66 AD31/D10 43
c0402 33 67
43 CCLKRUN#/IOIS16# CCD2# 43

2
270PF/50V 33 67
34 68

2
34 68
D10
NC9

1
69 71 C4414
GND P_GND1 NP_NC3 c0402
70 72
P_GND2 NP_NC4 270PF/50V

2
GND 73
P_GND3
A11 74
NC10 P_GND4
B11 GND
NC11 GND PCMCIA_68P

A10 GND
NC12
B10
NC13 CINT#/IREQ# T4402
1
CSERR#/WAIT# 1 T4403
CREQ#/INPACK# 1 T4404
CAUDIO/SPKR_IN#/BVD2 1 T4405

CSTOP#/A20 1 T4406
CDEVSEL#/A21 1 T4407
CTRDY#/A22 1 T4408
CIRDY#/A15 1 T4409

CSTSCHG/STSCHG#/BVD1 1 T4401
CBLOCK#/A19 1 T4410
B R5C847-CSP208Q CPERR#/A14 1 T4411 B
CCLKRUN#/IOIS16# 1 T4412

R4401 10KOhm +5V


VCC5_EN# 1 2
43 VCC5_EN# +3V
r0603
1

r0603 +VCCCB C4416 C4417


R4404 c0402
1 2 VCC3EN# U4401 10UF/10V 0.1UF/10V
43 VCC3_EN#
2

10KOhm 1 16 c0805_h57
VCC5_EN GND
2 15
AVPP0 VCC3_EN VCC5IN2 +3V
43 AVPP0 3 14
AVPP1 EN0 VCCOUT3 GND
43 AVPP1 4 13
EN1 VCC5IN1
5 12
FLG VCCOUT2
6 11
NC1 VCC3IN
7 10
NC2 NC3
1

8 9 C4418 C4419
+VPPCB VPPOUT VCCOUT1
T4418 1 AVPP1 c0402
R5531V002 10UF/10V 0.1UF/10V
2

1
2

c0805_h57
2

C4420 C4401 C4421


0.1UF/10V c0402 c0402
1

0.1UF/10V 0.1UF/10V GND


1

GND
A A
GND

Title : CARDBUS SOCKET


ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 44 of 66
2 1
5 4 3 2 1

A:CPU BKT B:MDC NUT C:TOP TO BTM D:FIX MB E:TOP TO BTM G:FIX MB
PN:s01756 PN:S01912 PN:s01769 PN:S01911 PN:s01783

H4514 @
MDC NUT put on page35 H4508
(H3501, H3502) H4512
1
CT272CB276D138 1
H4524 H4510 NP_NC
1 2 5
H4515 @ NP_NC GND1 GND4
D 2 5 3 4 D
GND1 GND4 GND2 GND3
1 1 1 10 3 4
NP_NC NP_NC1GND8 GND2 GND3
CT272CB276D138 2 5 2 9
GND1 GND4 NP_NC2GND7
3 4 3 8
H4516 @ GND2 GND3 GND1 GND6 @
4 7 CR295X325D98N
GND2 GND5 @
1 5 6
CT272CB276D138 F:MINI CARD NUT @
GND3 GND4
2DRILL_D98N_D98N
RT276X461BD106N

CT276RB335X364D106N
H4517 @
1 @
CT272CB276D138 MINI CARD NUT put on
H4518 @ page26(H2601, H2602) GND GND GND GND
1
CT272CB276D138
H4519 @
1 07/04/03 Add CPU BKT. H4518 ~ H4520 ---Iverson
CT272CB276D138
H4520 @
1
CT272CB276D138

C C
GND

H:SYS BOSS I:MB TO IO BKT J:SYS BOSS K:MB TO IO BKT L:TOP TO BTM M:SYS BOSS N:TOP TO BTM
PN:S01914 PN:S01913 PN:S01915 PN:S01705 PN:S01916 PN:s01917 PN:S01851
H4509 H4506 H4503 H4527 H4504 H4501 H4507

1 1 1 1 1 1 1
NP_NC NP_NC NP_NC NP_NC NP_NC NP_NC NP_NC
2 5 2 5 2 5 2 5 2 5 2 5 2 5
GND1 GND4 GND1 GND4 GND1 GND4 GND1 GND4 GND1 GND4 GND1 GND4 GND1 GND4
3 4 3 4 3 4 3 4 3 4 3 4 3 4
GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3 GND2 GND3

@ RT496X472D106N @ RT335X276D106N @ RT276x346BD106N @ CT197B220x232D98N @ RT276X354BD106N @ RT276x335RBD106N @ RT335X276RBD98N

07/04/04 To add 2 pcs


U4508/U4509 EMI spring---Feng
B GND U4508 B
1
1
07/04/03 Remove the T:NB SINK NUT --- Iverson
O:ALIGNMENT HOLE EMI SPRING EMI_SPRING_PAD
U4509
PN:temp_5262_gh15 PN:13G021034050 1
U:TOP TO BTM V:TOP TO BTM W:TOP TO BTM U4502
1
EMI_SPRING_PAD
H4528 @ PN:S01854 PN:S01857 PN:S01918 1
1 U4504
1
C98D98N EMI_SPRING_PAD 1
1
H4511 H4505 H4513
EMI_SPRING_PAD
U4503
1 1 1 1 U4505
NP_NC NP_NC NP_NC 1
2 5 2 5 2 5 1
GND1 GND4 GND1 GND4 GND1 GND4 1
3 4 3 4 3 4 EMI_SPRING_PAD
GND2 GND3 GND2 GND3 GND2 GND3
EMI_SPRING_PAD
U4507 U4506
P:ALIGNMENT HOLE EMI NUT
for LVDS cable
@ CT256RB256X244D98N @ CT256B276X295D98N @ RT276x457RBD106N 1
1
1
1
PN:s01724 PN:13G021029050 EMI_SPRING_PAD EMI_SPRING_PAD
A A
GND GND
H4529 @
H4533
1
O138x98DO138x98N
GND Title : SCREW HOLE
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
A40M20-64AS Size Project Name Rev

GND
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 45 of 66
2 1
5 4 3 2 1

R1.0 to R1.1 R1.1 to R1.2


Page Action
Page Action
43 To add the varistor, but do not stuff. D4302~D4308
25 To connect the SCL_3A and SDA_3A signals.
27 To add the ehanced ESD transistor.Q2702
36 To change the USB CON P/N from 12G13111108F into 12G13111108STB
30 To add the ehanced ESD transistor.Q3003.Q3005.Q3008.Q3009.Q3010
3 To add test point on VID[0:6] signals.
D D
19 To change the BAT_LOW_1HZ into test point
15 To add the R1504、R1506、R1503 to configure memory
12 To add the D1206
34 To add test point on LAN EEPROM signals.
30 To remove the D3006, and To add the Q3011.
21 To add the R2133 10KOhm,But do not stuff
22 To add the C2250 and D2209, but the D2209 do not stuff
22 To add the R2207/R2208 0Ohm Pull-down
28 To Change the ODD Part andSymbol.
13 To add the R1315 0Ohm
29 To add the EC_PWM_16S net name to control BAT_LOW_BEEP
13 To change the R1309/R1310/R1311/R1312 from 2.2KOhm into 2KOhm
28 To use U2801 to gate EC_BATLOW_BEEP
38 To add test point on power switch
29 To add the R2965 0Ohm
24 To add test point on the ISA ROM
21 To change codec from ADI1986 to ALC660.
22 To modify HP_DET circuit
22 To modify codec depop circuit.
C
23 To modify MIC_DET circuit C

23 To modify codec MIC peripheral circuit.


41 To add two test point on the DC IN CON
98 To add the ESD diode( D4302~D4308 ).
41 To add test point on the BATT CON
R1.2 to R2.0
22 To add the R2244 0Ohm, but do not stuff.
Page Action Reason
43 To change the R4307 from 0Ohm into 10 Ohm.
22 To add Q2206 and Q2209 to solve the pop noise ,But do not stuff. To solve pop noise of the codec
29 To change the R2901/R2904 from 4.7K Ohm into 3.3K Ohm
23 To add the T filter to solve pop noise of the MIC To solve pop noise of the MIC
To change the CON1302 P/N from 12G10111015M into 35 To add the R3510/R3511 49.9 Ohm and C3512 close to transformer.
13
12G10111215TTB
36 To change the R3603/R3604 from 10K Ohm into 0 Ohm.
29 Reserve for auto on issue
36 To add the R3605/R3606/R3607 0 Ohm
To add the R3512/R3513 49.9 Ohm and C3513 close to the
35 For RD verify
transformer,But do not stuff. 13 To remove the Q1302 and Q1304
B 35 Modify the CON4102 PCB footprint Slove SMT issue 20 To add the C2050 1uF on the +5VREF_ICH signal B

25 Modify CON2501 PCB footprint 22 To change the R2201/R2202 from 13K Ohm into 11K Ohm
33 Modify CON3301 PCB footprint 22 To change the R2206/R2214 from 10K Ohm into 12K Ohm
15 Modify the CON1501 pcb footprint. 29 To add two GPIO net ( GPM4/GPM5 ) to control the USB POWER SW
05 To add the C0526 5pF on CLK_ICH14 signal. 28 To move the C2803 and C2804 from the +3Vs into the +5Vs
33 To add the C3310 1UF and the U3301 and R3312 10KOhm 41 To Change F4102 10A into 12A(PN=07G012121101TB )
34 To change the C3402/C3403 from 0.01uF into 0.1uF 34 To change the C3407/C3406 from 30pF into 27pF
35 To change the C3512/C3513 from 0.01uF into 0.1uF 5 To change the C0510/C0511 from 33pF into 27pF.
36 To add the C3616 22 uF and C3615 10uF. 17 To change the C1707/C1708 from 18pF into 10pF
33 To Remove the R3306 Q3306 Q3307. 4 Don't stuff R0415, but stuff R0416
A
19 R1950,R1951,R1953 change from 1% to 5%. 16 To change U1601 PCB footprint from sot23_s5_rd1 to nb_sot23_s5_t A

05 R0505 change to RES 1K OHM 1/16W (0402) 1%.


<Variant Name>

05 To change the R0514 from 390 Ohm into 300 Ohm.


Title : HISTORY
36 To change the CE3605 from 100 uF into 150 uF ASUSALPHATeK COMPUTER INC. Engineer: Feng Lin
Size Project Name Rev
13 To add the L1307 L1308 L1309. Remove the Pi-type filter. Custom TERESA20 2.0
Date: Friday, July 06, 2007 Sheet 46 of 66
5 4 3 2 1
5 4 3 2 1

Reset 6 Power On
PWRSW#_EC
SWITCH
IC

D D

2
+5VA 9
AC_BAT_SYS 1 7 PM_PWRBTN# SLP_S3#
+3VA_EC
+3VA EC
+3VA_EC 5 PM_RSMRST# ICH8 SLP_S4# 8
IT8511E
3 VSUS_ON
VRMPWRGD
EC_CLK_EN
CL_PWROK
15 PWROK
+3VSUS 4 VSUS_GD#
+5VSUS

SUSC_EC#
SUSB_EC#
+12VSUS

PLT_RST#

H_PWRGD
C C
10 18

ALL_SYSTEM_PWRGD
18
SUSC_EC#
+1.8V
+3V
+5V
+12V 19

CPU_PWRGD
H_CPURST#
12 17 965GM Merom
CL_PWROK
ICH_PWROK
PWROK
14
+0.9VS
B
+1.5VS 16 B
+1.25VS
CLK_PWRGD
+2.5VS CLK
11 +3VS Gen.
+5VS CLK_PWRGD asserted when both
SUSB_EC1#
+12VS PM_SUSB# and VRM_PWRGD are
high.

Delay 13 CPU_VRON Power On Sequence


99ms
+VCORE
1 19
A A

<Variant Name>

Title : PowerOn sequence


ASUSALPHATeK COMPUTER INC. Engineer: Julian Kuo
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 47 of 66
2 1
5 4 3 2 1

EC GPIO SETTING ICH8-M GPIO SETTING


Pin Pin Name Signal Name Type Pin Pin Name Signal Name Type Pin Pin Name Signal Name Type
PCI Device IDSEL# REQ/GNT# Interrupts
32 PWM 0/GPA0 BRIGHT_PWM O 48 GPH0 VSUS_ON_EC O AG12 GPIO00/BM _BUSY# PM _BM BUSY# I
10/100 RTL8100CL AD23 2 A
33 PWM 1/GPA1 FAN_PWM O 54 GPH1 SUS_PWRGD I AJ8 GPIO01/TACH1 / I
CARDBUS AD17 1 B
36 PWM 2/GPA2 / O 55 GPH2 CPU_PWRGD I F8 GPIO02/PIRQE# PCI_INTE# I
1394 AD17 1 C
37 PWM 3/GPA3 BAT_LOW_BEEP O 69 GPH3 PM _PWRBTN# O G11 GPIO03/PIRQF# PCI_INTF# I
CARD READER AD17 1 D
D
38 PWM 4/GPA4 CHG_LED_UP# O 70 GPH4 SUSC_EC# O F12 GPIO04/PIRQG# PCI_INTG# I D

39 PWM 5/GPA5 PWR_LED_UP# O 75 GPH5 SUSB_EC0# O B3 GPIO05/PIRQH# PCI_INTH# I


40 PWM 6/GPA6 BATSEL_3S# O 76 GPH6 CPU_VRON O AC21 GPIO06 / I/O
43 PWM 7/GPA7 LCD_BACKOFF# O 105 GPH7 PM _RSM RST# O AH9 GPIO07 / I
153 RXD/GPB0 NUM _LED O 148 GPI0 ICH_PWROK_EC O AE16 GPIO08 EXTSM I# I
PCIE Device Bus
154 TXD/GPB1 CAP_LED O 149 GPI1 ALL_SYSTEM _PWRGD O AG19 GPIO09 / I
MINI_CARD PE(T/R)(p/n)2
162 GPB2 SCRL_LED O 152 GPI2 / AJ24 GPIO10 WLAN_SW#_ICH I
NEWCARD PE(T/R)(p/n)3
163 SM CLK0/GPB3 SM CLK_BAT I/0 155 GPI3 CHG_EN# O AG22 SM BALERT#/GPIO11 / I
164 SM DAT0GPB4 SM DATA_BAT I/0 156 GPI4 PRECHG O AC19 GPIO12 KBC_SCI# I
5 GA20/GPB5 A20GATE O 168 GPI5 EC_CLK_EN O AH21 GPIO13 / I
6 KBRST#/GPB6 RCIN# O 174 GPI6 BAT_LEARN O AF22 GPIO14 / I
165 GPB7 THRO_CPU O 109 GPI7 SUSB_EC2# AE20 GPIO15 STP_PCI# O
47 CLKOUT/GPC0 / O 99 DAC0/GPJ0 CHG_FULL_LED#_EC O AJ14 GPIO16 PM _DPRSLPVR O SM-Bus Device SM-Bus Address
169 SM CLK1/GPC1 SM B1_CLK I/0 100 DAC1/GPJ1 / AG8 GPIO17 NEWCARD_OFF# O Clock Generator 1101001x ( D2 )
170 SM DAT1/GPC2 SM B1_DAT I/0 101 DAC2/GPJ2 INVTER_DA O AH12 GPIO18 BTO_DEV0 O SO-DIMM 0 1010000x ( A0 )
171 GPC3 / I 102 DAC3/GPJ3 BATSEL_2P# O AJ10 GPIO19/SATA1GP NEWCARD_DET# I SO-DIMM 1 1010001x ( A2 )
C
172 TM RI0/WUI2/GPC4 ACIN_OC# I 97 GPJ4 EC_PWM _16S AE11 GPIO20 BTO_DEV1 O Thermal Sensor 1001100x ( 98 ) C

175 GPC5 OP_SD# O 98 GPJ5 / AJ12 GPIO21/SATA0GP / I


176 TM RI1/WUI3/GPC6 BAT_IN_OC# I AG10 REQ4#/GPIO22 WLAN_LED# I
1 CK32KOUT/GPC7 / O E6 LDRQ1#/GPIO23 /
26 RI1#/WUI0/GPD0 PM _SUSB# I 81 ADC0/GPK0 / I AJ27 GPIO24 /
29 RI2#/WUI1/GPD1 PM _SUSC# I 82 ADC1/GPK1 / AG18 GPIO25 STP_CPU# O
30 LPCRST#/WUI4//GPD2 PLT_RST# I 83 ADC2/GPK2 / I AH27 GPIO26 /
31 ECSCI#/GPD3 ECSCI# O 84 ADC3/GPK3 / AH25 GPIO27 BAT_LOW_1HZ I
41 GPD4 / 93 ADC8/GPK4 KB_ID0 I AD16 GPIO28 CB_SD# O
42 GINT/GPD5 / 94 ADC9/GPK5 KB_ID1 I AG17 GPIO29/OC#5 USB_OC_5# I
62 TACH0/GPD6 FAN0_TACH I AD12 GPIO30/OC#6 NEWCARD_OC# I
63 TACH1/GPD7 / O AJ18 GPIO31/OC#7 USB_OC_7# I
87 ADC4/GPE0 WLAN_SW#_EC(Reserved) I 8 GPL0 WLAN_ON# O AH11 GPIO32/CLKRUN# PM _CLKRUN# I/O
88 ADC5/GPE1 / I 11 GPL1 / O AE10 GPIO33/AZ_DOCK_EN# / I
89 ADC6/GPE2 / I 12 GPL2 / I AG14 GPIO34/AZ_DOCK_RST# / I
90 ADC7/GPE3 / I 20 GPL3 / O AG13 GPIO35 BTO_DEV2 O

B
2 PWRSW/GPE4 PWRSW#_EC I 21 GPL4 / AF11 GPIO36/SATA2GP / B

44 WUI5/GPE5 / 106 GPL5 / AG11 GPIO37/SATA3GP PCB_ID0 I


24 LPCPD#/WUI6/GPE6 / I 107 GPL6 / AF9 GPIO38 PCB_ID1 I
25 CLKRUN#/WUI7/GPE7 / O 108 GPL7 SUSB_EC# AJ11 GPIO39 PCB_ID2 I
110 PS2CLK0/GPF0 / 22 ECSM I#/GPM 0 EXTSM I# O AD10 GNT4#/GPIO48 / O
111 PS2DAT0/GPF1 / 23 PWUREQ#/GPM 1 / AG29 GPIO49/CPUPWRGD H_PWRGD O
114 PS2CLK1/GPF2 / I/0 85 KSO16/GPM 2 /
115 PS2DAT1/GPF3 / I/0 86 KSO17/GPM 3 ID_EC (Reserved) I
116 PS2CLK2/GPF4 TPAD_CLK 91 CTX/GPM 4 GPM 4
117 PS2DAT2/GPF5 TPAD_DAT 92 CRX/GPM 5 GPM 5
Indigo: the same as T12EG
118 PS2CLK3/GPF6 /
Pink: different from T12EG
119 PS2DAT3/GPF7 / I
113 FA16/GPG0 FA16
112 FA17/GPG1 FA17
104 FA18/GPG2 FA18
103 FA19/GPG3 FA19

A
3 FA20/GPG4 LID_EC# I A

4 FA21/GPG5 /
27 LPC80HL/GPG6 PM _THERM #_EC(Reserved) O
28 LPC80LL/GPG7 AC_APR_UC# I <Variant Name>

Title : GPIO Setting


ASUSALPHATeK COMPUTER INC. Engineer: Iverson Qiu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 48 of 66
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title
<Title>

Size Document Number Rev


A <Doc> <RevCode>

Date: Thursday, July 05, 2007 Sheet 49 of 66


2 1
5 4 3 2 1

TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8037 T8039 T8034 T8038 T8043 T8042 T8040
+1.05VO

1
1 2 AC_BAT_SYS
3 VR_VID0
R8037 47KOhm r0402_h16 @
1 2 AC_BAT_SYS
3 VR_VID1 R8021 47KOhm r0402_h16 @
1 2
3 VR_VID2 R8018 47KOhm r0402_h16 @

C8014 1000PF/50V

1UF/25V
MLCC/+80%-20%
c0805_h57
1 2
3 VR_VID3

1
R8011 47KOhm r0402_h16 @

CE8005

CE8003
+ +

15UF/25V

15UF/25V
MLCC/+/-10%
1

1
1 2
3 VR_VID4 R8003 47KOhm r0402_h16 @

5
D 1 2 D D D

2
3 VR_VID5

C8006
R8033 47KOhm r0402_h16 @
3 VR_VID6 1 2
R8006 47KOhm r0402_h16 @ 4 4
G S G S
63 CPU_VRON_PWR
2 R8039 1 100KOhm PCPU_GND1

1
2
3

1
2
3
29 CPU_VRON Q8007 Q8000
1 R8028 2 499Ohm 1% SI4392DY SI4392DY
7,19 PM_DPRSLPVR

2
2,7,17 H_DPRSTP# 1 R8017 2 0Ohm r0402_h16 C8009
(44A)
0.047UF/16V
19 CLK_EN# 1 R8035 2 0Ohm r0402_h16 @ TPC28T L8001 +VCORE

1
T8016 0.36UH
Irat=32A
40,62 VRM_PWRGD
1 2

1
2 PM_PSI#

PANASONIC/EEFSX0D331XE

PANASONIC/EEFSX0D331XE
+3VS

SI4336DY_T1_E3

SI4336DY_T1_E3
5

330UF/2V

330UF/2V
D D

1
Q8001

Q8005
R8010

1
C8020 R8045 10KOhm R8004 R8059

EC31QS04
+ +

D8000
1UF/6.3V 4 4 3.65KOhm 1% 1Ohm 10KOhm

1
MLCC/+/-20% G S G S 1% 1% 1%

1
1

2
1

CE8006

CE8004
R8019

1
2
3

1
2
3

1
C8012 0Ohm

VR_VID6
VR_VID5
VR_VID4
VR_VID3
VR_VID2
VR_VID1
VR_VID0
2 1
0.1UF/25V r0402_h16
2

2
2

MLCC/+/-10% PCPU_GND1 C8001

ISEN2
1

VSUM
R8024 0.22UF/10V

ISEN1

VCC_PRM
2

C8019 4.22KOhm MLCC/+/-10%


C C
1

0.015uF/50V @ R8001
1

MLCC/+/-10% 0Ohm U8000 for current


1

R8042 R8044 r0402_h16 ISL6262ACRZ-T 1 2 2 1

49
48
47
46
45
44
43
42
41
40
39
38
37
balence
2

147KOhm 4.99KOhm
2

Close to Phase 1 1% 1% R8012 C8026 AC_BAT_SYS

DPRSLPVR
VR_ON
GND2
3V3
CLK_EN#
DPRSTP#

VID6
VID5
VID4
VID3
VID2
VID1
VID0
2

R8007 2.7Ohm 0.22UF/25V


2

Low_side MOSFET 20KOhm MLCC/+/-5%


@ VR_PWRGD 1 36 c0805_h37

C8015 1000PF/25V
R8000 PSI# PGOOD BOOT1
2 35

1UF/25V
MLCC/+80%-20%
1

499Ohm PSI# UGATE1 Q8004 Q8003


3 34

MLCC/+/-5%
PMON PHASE1

1
CE8001

CE8002
1% @ 4 33 SI4392DY SI4392DY + +

15UF/25V

15UF/25V
RBIAS PGND1

1
+3VS 1 2 5 32
VR_TT# LGATE1 D D
6 31 PVCC 1 2
NTC PVCC +5VS

C8023
7 30

2
VCC_PRM SOFT LGATE2 R8049
2 1 8 29 4 4
OCSET PGND2 1Ohm G S G S
9 28
VW PHASE2
1%

R8031 10 27
13.7KOhm COMP UGATE2 PCPU_GND2
2 1 11 26
C8022 1000PF/50V

1
2
3

1
2
3
1% FB BOOT2
R8005 6.81KOhm

12 25
FB2 NC
2

C8013 TPC28T L8000


DROOP
MLCC/+/-10%
1

1
VSUM

ISEN2
ISEN1
VDIFF
VSEN

220PF/50V T8014 0.36UH


GND1
2 1 VDD
RTN

DFB
1

VIN

MLCC/+/-5% C8024 Irat=32A


VO

C8028 C8004 R8015 R8056 R8009 R8046 4.7UF/6.3V 1 2 2 1 1 2


2

1
0.1UF/25V 470PF/50V 255Ohm 0Ohm 1KOhm 1KOhm MLCC/+/-10%

PANASONIC/EEFSX0D331XE
1

13
14
15
16
17
18
19
20
21
22
23
24

MLCC/+/-10% MLCC/+/-10% 1% r0402 1% 1% R8041 C8002

PANASONIC/EEFSX0D331XE
1

@ 2 1 @ 2.7Ohm 0.22UF/25V
1

2
MLCC/+/-5%

MLCC/+/-10%
1

1
ISEN1

CE8000
TPC28T R8027 2 1 c0805_h37 R8029 + +

330UF/2V
SI4336DY_T1_E3

SI4336DY_T1_E3

0.1UF/25V
5

1
T8041 97.6KOhm 10KOhm R8030 R8058

CE8007

C8027
EC31QS04

330UF/2V
D D

2
Q8006

Q8002

D8001
1% R8016 C8011 ISEN2 1% 1Ohm 10KOhm
B 0Ohm 1000PF/50V R8026 1% 1% B
1

2
1 r0402 2 MLCC/+/-10% R8002 4 4 3.65KOhm 2 1
3 VCCSENSE

2
10Ohm G S G S 1%

1
R8014 r0805_h24 C8008
0.01UF/50V
MLCC/+80%-20%

MLCC/+80%-20%

1
1

100Ohm 2 1 0.22UF/10V
0.01UF/50V

VCC_PRM
+5VS

1
2
3

1
2
3
1
C8007

C8010

+VCORE 1 @ 2 MLCC/+/-10%
1

ISEN2
C8003

VSUM

ISEN1
2

TPC28T 2.2UF/6.3V
2

T8036 MLCC/+80%-20% PCPU_GND2


2

1 2 R8008 for current


3 VSSSENSE
1

10Ohm
MLCC/+80%-20%

R8022 r0805_h24 balence


0.01UF/50V
2

0Ohm
C8016

2 1 AC_BAT_SYS
r0402 R8032
100Ohm
2

@ R8036 for C8005


0.1UF/25V
load line
1

MLCC/+/-10% TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
1

T8005 T8030 T8006 T8004 T8009 T8001 T8019 T8011 T8025 T8015 T8028 T8012 T8026 T8007 T8017 T8027
1

2 1
C8000 Close to Pin 18
1

1
2

C8017 0.33UF/16V +VCORE


2

180PF/50V R8036 MLCC/+80%-20%


MLCC/+/-5% 3.24KOhm
1%
R8020 1%
1

VCC_PRM 1 1KOhm 2 TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T


T8008 T8024 T8010 T8032 T8003 T8013 T8018 T8022 T8020 T8023 T8029 T8031 T8000 T8002 T8021 T8033
VCC_PRM R8013
11KOhm
1

1
A A
1 1% 2
0.22UF/10V
0.022UF/25V
MLCC/+/-5%

MLCC/+/-10%
1

1
C8021

C8018

R8038
2.61KOhm
1 2 1 1% 2
2

<Variant Name>
VSUM R8043
10KOHM

C8021 & C8018 for transient


3% Close to Phase 1 Title : POWER_VCORE
response Inductor ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 50 of 66
2 1
5 4 3 2 1

AC_BAT_SYS

1 2 AC_BAT_SYS

MLCC/+80/-20%
1
R8118

MLCC/+/-10%
1

1
0Ohm +

1UF/25V

0.1UF/50V
1
C8125
C8126 r0805_h24

CE8100
C8115

27UF/25V
2
6800PF/50V

2
2
(070522) MLCC/+/-10%

2
5
6
7
8
D R8134 D
For +5VO voltage

2
49.9KOhm Q8100

D
1% R8123 SI4800BDY
52,53,54,61,63 SUSB#_PWR

2
330Ohm

SHORT_PIN
S
1

JP8106
1%
R8126

4
3
2
1
0Ohm
TPC28T
+5VO
1 2
T8122

1
2

C8118 R8119 L8100


R8117 1500PF/50V 1.8KOhm 3.8UH JP8104
(6A)

1
AC_BAT_SYS 0Ohm MLCC/+/-10% 1% 2 1 2 1
r0402_h16 C8112 2 1 +5VSUS
1 2 1 2

5
6
7
8

PL EL 100UF/6.3V(7343/D) 20%

PL EL 100UF/6.3V(7343/D) 20%
R8131 0.1UF/50V Irat=6A 1MM_OPEN_5MIL
(0.02A)
1

2
10KOhm MLCC/+/-10%

D
1

@
1% C8123 U8101 D8100

G
R8122 1 2 4700PF/50V 1 30 1 2 Q8101 FS1J4TP

100UF/6.3V
S
INV1 VBST1

1
0Ohm MLCC/+/-10% SI4800BDY

CE8101

CE8105
2 29 + +

100UF/6.3V

MLCC/+80%-20%
COMP1 OUT1_U

1
C8113
r0402_h16 1 2 3 28

1UF/10V
4
3
2
1

1
SSTRT1 LL1
4 27
2

SKIP# OUT1_D
5 26

2
VO1_VDDQ OUTGND1
6 25 1 2
DDR# TRIP1 R8135 17.4KOhm 1% @
7 24
T8121 GND VIN
1 8 23 1 2
TPC28T REF_X TRIP2 R8125 17.4KOhm 1% @ +5VAO AC_BAT_SYS
9 22 +5VAO
ENBL ENBL1 VREG5
10 21

MLCC/+/-10%
ENBL2 REG5_IN +5VO
11 20

0.1UF/50V
VO2 OUTGND2

1
R8129 +

C8105
29,62 SUS_PWRGD 12 19
PGOOD OUT2_D

CE8102
1 2 13 18 0Ohm

27UF/25V
SSTRT2 LL2
2 1 1 2 14 17 2 1

2
C8122 COMP2 OUT2_U
15 16 1 2

2
C INV2 VBST2 C
1

0.01UF/50V C8127 R8136 Q8103

5
6
7
8
R8132 MLCC/+/-10% 3300PF/50V 1.2KOhm TPS51020 C8104 SI4800BDY
0Ohm MLCC/+/-10% 1% 0.1UF/50V

D
1
r0402_h16 F=450KHz MLCC/+/-10%
@ C8121

G
+3VO

S
2

Vref=0.85V 4.7UF/16V TPC28T

2
1 2 MLCC/+80-20% T8102

4
3
2
1
R8128 L8101 JP8103
(6A)

1
1

1
10KOhm 1 2 2 1 +3VSUS
2 1
2

1
1% R8120 R8133
R8127 C8128 18KOhm 18KOhm C8129 3.8UH 1MM_OPEN_5MIL

5
6
7
8

PANASONIC/EEFCX0G151R

PANASONIC/EEFCX0G151R
@
330Ohm 270PF/50V 1% 1% 270PF/50V Irat=6A (0.7A)
2

2
2

2
1% MLCC/+/-10% MLCC/+/-10% Q8102

MLCC/+80%-20%
2

2
R8124 @ @ SI4800BDY

SHORT_PIN
1

1
G
30.1KOhm D8102 + +

1UF/10V
150UF/4V

150UF/4V
S

1
JP8105

C8100
1% FS1J4TP

CE8104

CE8103
(070522) For +5VO
1

4
3
2
1

1
1

C8124
OCP=7.4A, +3VO OCP=7.2A

2
6800PF/50V
MLCC/+/-10%
2

B
+3VAO TPC28TTPC28TTPC28TTPC28T
T8134 T8132 T8133 T8125
TPC28TTPC28TTPC28T
T8123 T8128 T8127 TPC28TTPC28TTPC28TTPC28T
TPC28TTPC28TTPC28T
T8117 T8107 T8109 B
+5VAO T8110 T8103 T8114 T8100
+5VSUS +3VSUS +3VO
1

1
U8102 +5VO

1
1
VIN
5 +3VAO
VOUT TPC28TTPC28TTPC28TTPC28T
2
GND T8136 T8135 T8129 T8131 TPC28TTPC28TTPC28TTPC28T
4 1 2
FB TPC28TTPC28TTPC28T T8104 T8108 T8116 T8113 TPC28TTPC28TTPC28T
3
SD#
2

R8121 T8130 T8126 T8124 T8112 T8119 T8101


1

1
2

SI9183DT 174KOhm C8120 D8104

1
1

R8130 1% 4.7UF/6.3V UDZS5.1B

1
C8119 100KOhm MLCC/+/-10% @
2

1UF/16V Vref=1.215V r0402


2

MLCC/+/-20% 1%
1

VSUS_ON
TPC28T TPC28T
T8118 T8106
JP8100
1
TPC28T
100KOhm
r0402
R8106

T8137 +5VAO 1 2 +5VA

1
1 2
+12VSUS TPC28T
T8120
D8103 1 1MM_OPEN_5MIL
2

2 1 ENBL
4,29,38,41,62 FORCE_OFF#
AC_BAT_SYS TPC28T TPC28T
1

+12VSUS RB751V-40 T8105 T8115


JP8101
C8117
0.1UF/25V Imax=100mA 1 2 5 +3VAO 1 2 +3VA
+5VAO

1
1 2
2

@
MLCC/+80%-20% U8100
4

1 2 1 5 R8114 R8116 Q8105B 1MM_OPEN_5MIL


A IN OUT 845KOhm 100KOhm UM6K1N
A
1000PF/25V
MLCC/+/-5%
1

C8102

2 1% r0402
GND C8111
1

3 4 1UF/25V 2 Q8105A
4,25,29,63 VSUS_ON
2

EN NC or ADJ MLCC/+80%-20% UM6K1N


<Variant Name>
1
2

MIC5235YM5
100KOhm
r0402
R8101

R8104

ENBL
FB=1.24V 95.3KOhm
1%
Title : POWER_SYSTEM
Engineer: Amos_Yu
1

ASUSALPHATeK COMPUTER INC.


Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 51 of 66
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS

+5VO

1
+

MLCC/+/-10%
2

1
C8212

CE8202
27UF/25V
0.1UF/50V
5
Q8200 R8217
D
D R8209 D8202 10Ohm D

2
1 8 4.7Ohm RB717F

1
D1_1 G1
+ 4 +1.05VO

MLCC/+/-10%

1
1
CE8203

C8206
2 7 G S

27UF/25V

0.1UF/50V
D1_2 S1/D2_3
Q8201
3 6 SI4800BDY JP8203

1
2
3
2
G2 S1/D2_2
1 2
1 2

1
4 5 C8211
S2 S1/D2_1
C8213 R8206 0.1UF/50V TPC28T 3MM_OPEN_5MIL

2
SI4914DY 4.7UF/6.3V 0Ohm MLCC/+/-10% T8216 L8201

0Ohm
MLCC/+/-10%

2
1
C8210
MLCC/+/-10% 1.8UH
(7A) JP8202

0.1UF/50V

1
TPC28T 1 2 1 2 1 2
+1.5VO +VCCP

1
T8209 1 2

PANASONIC/EEFCD0E101R
CE8200 @
PANASONIC/EEFCD0D151ER
R8220
Irat=9.5A 3MM_OPEN_5MIL

1
U8200

MLCC/+/-10%
1

1
CE8201
28 1 + +

150UF/2V

100UF/2.5V

0.1UF/25V
VCC GND

1
C8201
27 2 D
LGATE2 LGATE1

2
JP8201 (4A) L8200 26 3

Q8202 SI4894DY
PGND2 PGND1
+1.5VS 1 2 PANASONIC/EEFCD0E101R 1 2 25 4

2
1 2 PHASE2 PHASE1
24 5 4
UGATE2 UGATE1

2
3MM_OPEN_5MIL 3.8UH R8205 23 6 R8201 G S D8201

100UF/2.5V

SHORT_PIN
BOOT2 BOOT1
1

1
CE8204

JP8200
CE8205
+ + Irat=6A 1 2 22 7 1 2 FS1J4TP

1
ISEN2 ISEN1
100UF/2.5V
1

2
C8202 R8211 0Ohm @ 21 8 2.61KOhm

1
2
3
0.1UF/25V 2KOhm EN2 EN1
2 1 20 9
MLCC/+/-10% VOUT2 VOUT1
1 2 19 10
2

R8215 VSEN2 VSEN1


18 11
@

1
6.65KOhm 1% OCSET2 OCSET1
17 12
SOFT2 SOFT1
PANASONIC/EEFCD0E101R

16 13
SHORT_PIN
1
PG2/REF DDR
JP8204

15 14
PG1 VIN

0Ohm

130KOhm
1 2 2 1

0.01UF/50V
C8208 0.01UF/50V
C C

1
MLCC/+/-10% ISL6227CAZ_T C8200 R8204 18.7KOhm R8212

130KOhm
MLCC/+/-10%
2

2
0.1UF/50V 1% 0Ohm

MLCC/+/-10%
1
MLCC/+/-10% 1 2 @

2
R8203

R8200
VREF = 0.9V

1
R8218

C8205
9.76KOhm

C8207

R8214
1% C8209 0.01UF/50V
1

1
2 1

0.01UF/50V
1
MLCC/+/-10%

1
(070522)
R8216
For +1.5VO OPC=5.2A 0Ohm
62 1.05V_1.5V_PWRGD
R8213
110KOhm

2
1%

TPC28T TPC28T TPC28T TPC28T


T8225 T8223 T8218 T8220

1
+1.5VS
D8200
1SS355
2 1

TPC28T TPC28T TPC28T TPC28T


R8210 T8219 T8204 T8202 T8208
B 10KOhm B

51,53,54,61,63 SUSB#_PWR 2 1

1
+VCCP
1

C8203
0.1UF/25V
MLCC/+/-10%
2

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


T8210 T8221 T8213 T8224 T8214 T8222 T8206 T8201

1
+1.5VO +1.05VO

(070522) Mount TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8203 T8217 T8215 T8200 T8212 T8207 T8205 T8211

D8203

1
1SS355
2 1

R8208
10KOhm
A
2 1 A
1

C8204
0.22UF/25V
<Variant Name>
2

MLCC/+/-10%

Title : I/O_1.5VS & 1.05VS


ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 52 of 66
5 4 3 2 1
5 4 3 2 1

+5VO

2
D D
R8330
10Ohm

1
R8328 R8320
0Ohm 0Ohm
SUSB#_PWR 1 2 2 @ 1 AC_BAT_SYS

MLCC/+/-10%

MLCC/+/-10%
1

1
C8325
+

1UF/25V

0.1UF/50V
5

CE8300
C8310

27UF/25V
D

2
D8301

2
1SS355 4 +1.8VO
2 1 G S
Q8300
SI4800BDY

1
2
3
1 2 JP8302
61,63 SUSC#_PWR

1
1 2

MLCC/+/-20%
4.7UF/6.3V
1 2
1

1
C8324
R8317 C8302 D8302
10KOhm 0.047UF/16V RB751V-40 TPC28T 3MM_OPEN_5MIL
1% MLCC/+/-10% T8326
(7A)
2

2
2

2
@ JP8301

29
28
27
26
25
24
23
22

2
R8324 R8321 1 2 1 2 1 2 1 2 +1.8V

1
0Ohm 0Ohm 1 2

AVDD

VDD
TPO
GND2

SHDN#

SKIP#
GND1
PGND1

2
R8323 R8312 C8301 L8300 3MM_OPEN_5MIL
0Ohm 0Ohm 0.1UF/50V R8327 1UH
(6A)

PANASONIC/EEFSX0D221ER <G>
1

PANASONIC/EEFCD0D151ER
R8319 R8326 2 @ 1 1 21 MLCC/+/-10% 10Ohm Irat=18A
C TON DL C

2
0Ohm 120KOhm REF=2V 2 20 @

MLCC/+/-10%
OVP/UVP BST D

1
+1.8VO 1 @ 2 1%

CE8302

CE8301
2 1 3 19 + +

150UF/2V

220UF/2V
Q8301 SI4894DY

0.1UF/25V
1
REF LX

1
C8313
4 U8300 18 D8303
ILIM MAX8632ETI DH FS1J4TP
For foldback 5
POK1 VIN
17 4
1

1
current limit 6 16 G S C8319

2
POK2 OUT
1

R8322 C8317 7 15 1000PF/50V

PGND2
STBY# FB

2
REFIN
100KOhm 0.22UF/10V C8320 MLCC/+/-10%

VTTR
VTTS

SHORT_PIN
VTTI

1
2
3

2
VTT
1% MLCC/+/-10% 1UF/25V @

SS
2

JP8303
MLCC/+/-10%
2

2
F=300KHz

8
9
10
11
12
13
14
TPC28T
62 DDR_PWRGD
T8327 R8329

1
+-18mA 10Ohm
16 0.9V_VTT_REF 2 1
1

D8300
4700PF/50V

FB=0.7V
MLCC/+/-10%

MLCC/+/-10%
1

2
1SS355 1 2
1UF/16V

2 1 C8318
51,52,54,61,63 SUSB#_PWR

2
R8318
C8321

C8323

0.1UF/25V
2

1
MLCC/+/-10% R8325 15.8KOhm
1 2 10KOhm 1% @
1% @ 2 1
1

R8305 C8315

1
47KOhm 0.033UF/16V C8316
1% MLCC/+/-10% 4700PF/50V @
2

MLCC/+/-10%

(80mil) (80mil)
B B
+0.9VO
(2A)
JP8300
+0.9VS 1 2
1 2
1

3MM_OPEN_5MIL C8312 C8311 C8308 C8305 C8322


0.1UF/25V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% MLCC/+/-10%

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8301 T8302 T8303 T8304 T8305 T8306 T8307 T8308 T8309 T8310 T8311 T8312

1
+0.9VO +0.9VS +1.8VO

TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8313 T8314 T8325 T8316 T8317 T8300 T8318 T8319 T8320 T8321 T8322 T8323
1

1
+1.8V

A A

<Variant Name>

Title : I/O_DDR & VTT


ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 53 of 66
3 2 1
5 4 3 2 1

D
+1.25VS D

+5VO +2.5VREF
TPC28T TPC28T
T8400 T8403

2
Q8400
SI2304BDS R8401

1
U8400 20KOhm TPC28T
3 2 1 8 1% T8404

2 S
D
+1.8V VIN PGND

3
2 7

1
VFB AGND
3 6

1
TPC28T JP8400 VOUT0 VCCA

11
4 5

GND
T8401 2MM_OPEN_5MIL VOUT1 REFEN

+12V 1 2
+1.25VS 1 2 CM8562GISTR

MLCC/+80-20%

MLCC/+/-10%
1

9
1 2

2
R8403 R8402

10UF/10V

0.033UF/16V
1

1
C8403

C8400
100KOhm 10KOhm (1A) R8404

PANASONIC/EEFCX0G151R
+5VAO 1 r0402 2 20KOhm

1
+ 1%

MLCC/+80-20%

2
1

CE8400
TPC28T

10UF/10V

150UF/4V

1
3

C8404
T8402
Q8401B @

2
D8400 5 +1.25VO

1
1SS355 @ UM6K1N

1
2 1

6
C8401
0.1UF/25V

2
2 1 2 Q8401A MLCC/+/-10%
51,52,53,61,63 SUSB#_PWR UM6K1N

1
1

R8400
C C
0Ohm C8402
0.1UF/25V
2

MLCC/+/-10%
@

B
+RTC_PWR B

+5VAO

U8401
1 3.086V
VIN
5 +RTC_PWR
VOUT
2
GND
4 1 2
FB
3
SD# R8406
2

1
SI9183DT 154KOhm C8405
1

R8405 1% 4.7UF/6.3V
C8406 100KOhm MLCC/+/-10%

2
1UF/16V Vref=1.215V r0402_h16
2

MLCC/+/-20% 1%
1

A A

<Variant Name>

Title : POWER_I/O_1.25VS & RTC_PWR

ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu


Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 54 of 66
2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_Empty
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
C TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 55 of 66
2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_Empty
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
B TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 56 of 66
5 4 3 2 1
5 4 3 2 1

R1.1 to R1.2
Page Action
81 To modify +5VO output voltage, modify R8134 to 49.9K Ohm,
D D
81 To modify +5VO and +3VO OCP, un-mount C8128, C8129 and modify R8120, R8133 to 18K Ohm
82 To modify +1.5VO OCP, modify R8200 to 130K Ohm
82 To modify +1.05VO Disable timing, mount D8203
88 Modify component, CE8800, CE8801
91 To modify +3VS timing, modify R9108 to 20K Ohm

C C

B B

A A

<Variant Name>

Title : POWER_HISTORY
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
B TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 56 of 66
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_Empty
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 57 of 66
2 1
5 4 3 2 1
T8816
TPC28T JP8804 SHORT_PIN
1 1 2 CSSP

T8814
POWER PATH & BAT_LEARN TPC28T JP8800 SHORT_PIN
1 1 2 CSSN

T8820 T8804 T8815 T8817 T8812 T8803 T8813 T8810 T8802 T8809
41,60 A/D_DOCK_IN 8 1 1 8
TPC28TTPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T

1
7 2 2 7 1 2
A/D_DOCK_IN AC_BAT_SYS

D
S
D

MLCC/+/-10%
0.047UF/50V
6 3 3 6 R8802 2 1

1
C8810
(070625) 10mOhm Q8800 TPC8107
5 4 4 5 r1508 1% 1 8 L8803 TPC28T TPC28T TPC28T TPC28T

G
For ICT

G
BAT
150Ohm/100Mhz T8800 T8808 T8801 T8807

2
D D

1
Q8801 Q8811 (070416) 2 7 Irat=5A l1812_h67
TPC8107 TPC8107 BAT 2 1 BAT_CON

D
For 75W adapter

1
C8817 3 6

2
0.01UF/50V TPC28T L8801
1 2 MLCC/+/-10% 4 5 T8805 150Ohm/100Mhz

G
Irat=5A l1812_h67

2
R8823 BAT_S 1 2

1
D8803 6.8KOhm CHG_PDL
1SS355 R8822 1% L8800
18KOhm 1KOhm/100Mhz
1% Irat=100mA

1
CHG_PDS

JP8805
SHORT_PIN
CSSP 1 2
AC_BAT_SYS AC_BAT_SYS_INV
CSSN

MLCC/+80%-20%

MLCC/+80%-20%
AC_BAT_SYS_INV to Inverter connect,

0.1UF/25V

0.1UF/25V
Power trace =60mil(min),

1
C8813

C8811
Put JP8805 close to Q8800
TPC28T

2
T8818
AC_IN Threshold 2.048Vmax A/D_DOCK_IN
> 17.44V active CHG_PDS

1
AC_BAT_SYS
Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF]
Rsense(ADin)=0.010ohm CHG_PDL

1
VCLS=2.112V (070516)
=> Iin(max)=3.75A C8806

MLCC/+/-10%
=> Constant Power = 19 * 3.75 = 71.25W 1UF/25V

1
0.1UF/25V
=> R8805=20K,R8819=20K MLCC/+80%-20% +

2
C8808

CE8800
27UF/25V
Charge Current Ichg = [0.075V/Rsense(CHG)]*[VICTL/3.6V] TPC28T TPC28T

2
C Rsense(CHG)=0.025 ohm A/D_DOCK_IN A/D_DOCK_IN MAX8725_LDO T8806 T8819 C
VICTL= 3.349V => Ichg = 3A(Max) T8811
TPC28T

1
1
CHG_GND MAX8725_LDO CHG_GND

4
3
2
1
Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] }

1
1
VCTL= 1.594V C8816 Q8802 1.SI4431BDY-> 07G005140011

S
2

G
=> Vbatt = 4.2V R8817 1UF/25V 2.FDS6609A -> 07G005923010
2

R8812 D8802 100KOhm MLCC/+/-10% R8800 SI4431BDY


3.SI9435BDY-> 07G005921010

D
Mode pin : Vmode > 2.8V (trie to LDO pin) ----> 4 Cells 100KOhm 1SS355 33Ohm 4.FDS9435A -> 07G005720010 (070131)

29
28
27
26
25
24
23
22
1 2
2.0 > Vmode > 1.6V (floating) ----> 3 Cells 1% MAX8725_REF C8812
2 For EMI issue

5
6
7
8
0.8 > Vmode (trie to GND) ----> Learning mode LDO : 5.4V 1UF/25V R8803

PDS
CSSP

DHIV
CSSN
SRC
DHI
GND2
PDL

1
MLCC/+80%-20% 20mOHM
1

REF : 4.2235V 1 21 1 2 L8802 r1508 1% (070516)


VICTL< 0.8V or DCIN < 7V -->Charger Disable 2 DCIN DLOV 20 1 2 1 2
LDO DLO BAT
3 19
MAX8725_REF ACIN PGND 10UH
4 18
REF CSIP
C8800 4.7UF/25V

Precgarge current=232mA 5 17 Irat=4.4A


2

MLCC/+80%-20% GND/PKPRES# CSIN

MLCC/+80%-20%
MLCC/+/-20%

6 16 Q8807
ACOK BATT
1

5
6
7
8

2
C8801

C8814
1UF/10V

1UF/10V

VCTL
R8818 7 15 SI4800BDY

ICTL

CCV
CCS
IINP
CLS
2

2
MODE GND1

CCI

100PF/50V

100PF/50V
MLCC/+/-10%

MLCC/+/-5%

MLCC/+/-5%
SHORT_PIN
13.3KOhm

0.1UF/25V
SHORT_PIN
1% R8805 R8809 R8813 D8801 +
2

1
C8820

C8819

C8818
JP8802

JP8803

CE8801
27UF/25V
G
(070416) For 75W adapter 20KOhm 20KOhm 16.5KOhm U8800 FS1J4TP

S
1

8
9
10
11
CHG_CCI 12
13
14
1% 1% 1% MAX8725ETI

1
1

4
3
2
1

2
(070419) Charge current=3A(max) CHG_CCS

1
Pre-charge current=232mA
1.594V

2
CHG_GND

10KOhm
R8815
1.341V 0.223V 2.682V

1 r0402
MLCC/+/-10%
2.112V
2

0.01UF/50V

1
C8803
AD_IINP

CHG_CCV
R8816 C8815
2

12.7KOhm 0.047UF/50V
MLCC/+/-10%

1% @ R8820 MLCC/+/-10%

2
2

MLCC/+/-10%
0.1UF/25V

1.15KOhm
1

1
R8807

C8805
20KOhm

0.1UF/25V
1% R8819 R8806 R8801

1
B
20KOhm 34.8KOhm 10KOhm C8809 B
1
3

1 1%

3 1% 1% 1%
2

D
1

Q8808 2
11 2N7002
29 BATSEL_2P#
G @
2 S
2

T8823 3 PKPRES#
D
TPC28T Q8805 MAX8725_LDO
1

2N7002 C8807
1

11 1UF/10V
29 PRECHG
G MLCC/+80%-20%
2

2
2 S T8822 MAX8725_LDO
2

3 R8814 PKPRES#
D 100KOhm
TPC28T
1

3
Q8803 R8808 @ 1% 3 Q8810
D
11 100KOhm 2N7002

1
29 CHG_EN# 2N7002
G
S 2 1
T8821 R8804 2 11
2

100KOhm G
TPC28T 1 2 R8828 2 S
MAX8725_LDO
1

2
100KOhm
Q8813 @
29 AC_APR_UC
2 1

3
4

C
E

3 Q8804
D
47K

2N7002
B

1
11 C8802
BATSEL_3S# 29 41,60 TS#
2

0.22UF/10V
B

47K

G
10K

47K

2 S MLCC/+/-10%

2
E

1
6

2
3

3 UMC4N R8829
D
Q8809 @ 470KOhm
2N7002
11 @
1

A
29 BAT_LEARN A
G
2

S
2
3

3
D
Q8806 R8821
2N7002 470KOhm
11
1

G
S 2
2

<Variant Name>

Title : POWER_CHARGER
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
C TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 58 of 66
2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : POWER_Empty
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 59 of 66
2 1
5 4 3 2 1

BATTERY IN DETECT +5VO +5VAO ADAPTER IN DETECT


TPC28T
T9002

BAT_IN_OC# 29

1
1
D A/D_DOCK_IN D

1
R9002
100KOhm TPC28T

2
R9001 r0402 T9003

2
100KOhm Q9000B R9004
r0402 5 243KOhm
29 ACIN_OC#

1
UM6K1N 1%

4
3

1
C

6
B 1
Q9000A

2
2 UM6K1N Q9001 E
41,58 TS#

2
PMBS3904 2 R9003 C9002

1
10.2KOhm 0.1UF/25V
1% MLCC/+80%-20%

1
1

1
C9003
1000PF/50V

2
MLCC/+/-10%

C C

+2.5VREF

B B

+5VO

TPC28T
T9000
1
1

R9000 C9001
TPC28T 1KOhm 1UF/10V
T9001 MLCC/+/-10%
+2.5VREF
2
2
1

U9001
1

C9000 MM1431ANRE
1UF/10V 3 @
MLCC/+/-10% U9000 3 4
2

LM4040BIM3 CATHODE REFERENCE


2
2

SUB
1 5
NC ANODE

A A

U9000 & U9001 colay <Variant Name>

Title : POWER_DETECT
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 60 of 66
2 1
5 4 3 2 1

SUSC#_PWR POWER

(070626)
D
For ICT D
TPC28T TPC28T TPC28T TPC28T TPC28T
T9111 T9133 Q9103 T9126 T9108 T9122
PMN45EN
+3VO +3V

1
(3A)

6
5
S 4
R9109 0Ohm

1
2 1 C9106
0.1UF/25V

1
C9110 MLCC/+/-10%

2
D
0.033UF/16V TPC28T

G
MLCC/+/-10% T9131 R9105

1
2
3

2
1KOhm
(070626) 25,34,37,40,62 SUSB# 1 2

1
TPC28T
TPC28TTPC28T
For ICT T9135
T9117 T9132 TPC28T TPC28T TPC28T
T9124 T9113 T9136
51,52,53,54,63 SUSB#_PWR

1
+5VO (3.2A)
1

DRAIN_1 DRAIN_2 +5V

1
1 8
SOURCE_1 SOURCE_3 R9110 0Ohm TPC28T
2 7 2 1 T9121 R9104
N

1
3 6 C9113 1KOhm
SOURCE_2 SOURCE_4 0.1UF/25V 1 2
37,40 SUSC#

1
1
4 5 C9105 MLCC/+/-10% TPC28T

2
GATE_1 GATE_2 0.033UF/16V T9134
Q9101 FDW2501NZ_NL MLCC/+/-10%

2
53,63 SUSC#_PWR

1
C C

1
R9106
TPC28T 22KOhm TPC28T
T9120 1% T9112
UMC4N

2
1

1
+12VSUS
+12V
TPC28T
C

4
3

T9119

100KOhm
47K

1%
B

SUSC#_PWR
1

B
47K

10K
47K

R9103
2
1

Q9107

SUSB#_PWR POWER

(070625)
B B
TPC28T TPC28T
For ICT
T9104 T9118 Q9108
DRAIN_1 FDW2501NZ_NL DRAIN_2 TPC28T TPC28T TPC28T
1 8 (070522) T9109 T9114 T9116
+3VO
1

SOURCE_1 SOURCE_3 For timing issue


2 7 +3VS (5A)
1 1

1
N

3 6
SOURCE_2 SOURCE_4 C9102
4 5 0.1UF/25V
GATE_1 GATE_2 R9108 20KOhm MLCC/+/-10%
2

2 1 (070625)
TPC28T TPC28T
For ICT
1

T9105 T9115 C9104


0.1UF/25V
Q9106 MLCC/+/-10% TPC28T TPC28T TPC28T
DRAIN_1 DRAIN_2
1

+5VO 1 FDW2501NZ_NL 8 T9101 T9127 T9130


SOURCE_1 SOURCE_3
2 7 (4A)
+5VS
1 1

1
N

3 6
SOURCE_2 SOURCE_4 C9107
4 5 0.1UF/25V
GATE_1 GATE_2 R9107 0Ohm MLCC/+/-10%
2

2 1
1

C9109
0.033UF/16V
TPC28T
MLCC/+/-10% R9112 TPC28T
T9128
2

47KOhm T9102
UMC4N 1%
2
1

+12VSUS
1

A +12VS A
TPC28T
C

4
3

T9129
47K

1
B

SUSB#_PWR
1

R9102
2

<Variant Name>
B
47K

10K

100KOhm
47K

1%
Title : LOAD SWITCH
2
1

Q9105
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 61 of 66
2 1
5 4 3 2 1

D D

POWER GOOD DETECTER

+3VO +3VS
EC
SUSB#
ALL_SYSTEM_PWRGD 29,43

@
100KOhm

100KOhm
1

1
r0402

r0402
R9200

R9205
100KOhm
r0402
R9206
25,34,37,40,61 SUSB#

FORCE_OFF# 4,29,38,41,51
2

1
D9200 R9201
1 2 1SS355 560KOhm
C 53 DDR_PWRGD +3VO C
T9202 R9202

3
TPC28T 0Ohm T9201

2
r0402_h16 U9200 T9200 TPC28T Q9200B
2 1 1 A 5 TPC28T 5
29,51 SUS_PWRGD
1

1
VCC UM6K1N

4
6
D9201 2 B

1
1SS355 UM6K1N
52 1.05V_1.5V_PWRGD 1 2 3 GND 4 2

1
R9203 Y Q9200A

1
0Ohm NC7SZ08P5X C9200
r0402_h16 4.7UF/6.3V

2
MLCC/+/-10%

+3VS
1

R9207
100KOhm
r0402
2

B B
40,50 VRM_PWRGD

A A

<Variant Name>

Title : POWER_PROTECT
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 62 of 66
2 1
5 4 3 2 1

AC_BAT_SYS
AC_BAT_SYS 41,50,51,52,53,58

BAT BAT 58

BAT_CON BAT_CON 41,58


D D
FOR POWER TEST
+2.5VREF +2.5VREF 54,60

+3VA +3VA 4,12,19,29,37,38,41,51

+5VAO +5VAO 51,54,60


JP9300
+5VO +5VO 51,52,53,54,60,61
+3VA 1 2 CPU_VRON_PWR 50
1 2
+5VSUS +5VSUS 20,30,36,51
SGL_JUMP
+5V
+5V 10,16,30,36,37,44,61
JP9301
+5VS +5VS 4,13,19,20,21,22,28,29,30,34,37,38,50,61
1 2 SUSB#_PWR
1 2 SUSB#_PWR 51,52,53,54,61
+3VO +3VO 51,61,62
SGL_JUMP
+3VSUS +3VSUS 18,19,20,22,25,29,34,40,51
+3V
+3V 12,18,19,26,35,37,43,44,61 JP9302
1 2 SUSC#_PWR
+3VS +3VS 2,4,5,7,10,11,12,13,14,15,19,20,21,22,25,26,27,28,29,30,33,37,43,50,61,62 1 2 SUSC#_PWR 53,61
SGL_JUMP

+12VSUS +12VSUS 51,61 JP9303


+12V 1 2 VSUS_ON
C +12V 22,37,54,61 1 2 VSUS_ON 4,25,29,51 C

+12VS SGL_JUMP
+12VS 12,13,33,37,61

+1.8VO +1.8VO 53

+1.8V +1.8V 7,9,10,14,15,16,37,53,54

+0.9VS +0.9VS 16,37,53

+0.9VO +0.9VO 53

+1.05VO +1.05VO 50,52

+VCCP +VCCP 3,5,6,7,9,10,17,20,52

+1.5VO +1.5VO 52

+1.5VS +1.5VS 3,10,17,18,20,25,26,37,52

+VCORE
+VCORE 3,50

B B

+1.25VS +1.25VS 7,10,20,54

A A

<Variant Name>

Title : POWER_SIGNAL
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 63 of 66
5 4 3 2 1
5 4 3 2 1

UMC4N +12V
SUSC#_PWR (SWITCH) (10mA)
AC_BAT_SYS +12VSUS
(100mA) UMC4N +12VS (10mA)
MIC5235 SUSB#_PWR (SWITCH)
VSUS_ON
D D

+3VSUS (0.7A)

SUSC_PWR (3A)
PMN45EN +3V

+3VO SUSB#_PWR FDW2501 (5A)


+3VS
LM4040BIM
(Regulator) +2.5VREF (10mA)
+5VSUS (0.02A)
+5VO SUSC_PWR
FDW2501 (3.2A)
+5V
TPS51020
SUSB#_PWR
FDW2501 +5VS (4A)
VSUS_ON
+5VAO
+5VA ( ? A)
FORCE_OFF# SI9183DT +3VAO
(Regulator) +3VA
C
( ? A) C

3V_5V_PWRGD

+1.5VO
+1.5VS (4A)
+5VO ISL6227 +1.05VO
SUSB#_PWR +VCCP (7A)
1.05V_1.5V_PWRGD

SUSB#_PWR
CM8562 +1.25VS (1A)
(Regulator)

+1.8VO
SUSC#_PWR +1.8V (7A)

+5VO MAX8632 +0.9VO


SUSB#_PWR +0.9VS (2A)
B B
DDR_PWRGD

+5VS
ISL6262A +VCORE (44A)
CPU_VRON
VR_VID0~VR_VID6, H_DPRSTP#, VRM_PWRGD,CLK_EN#
MCH_OK, PM_DPRSLPVR,PM_PSI#,
VCCSENSE,VSSSENSE,STP_CPU#

A A

<Variant Name>

Title : POWER_FLOW
ASUSALPHATeK COMPUTER INC. Engineer: Amos_Yu
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 64 of 66
2 1
5 4 3 2 1

+5V_LED_BD +5VSUS_LED_BD
LEFT & RIGHT Button remove to TP BOARD
(070201)change into 80.6ohm

1
+5V_LED_BD (R2.0)changed to 475 Ohm
R7005 R7004
150Ohm 150Ohm +5VS_HD_LED

1
R7001

2
D D

1
680Ohm
R7002
Changed to AMBER & GREEN LED Changed to AMBER & GREEN LED 475Ohm

2
(070117)change LED PWR CHG

1
Change to AMBER LED Change to Green LED
LED7002 LED7003
HDD

1
ORANGE&GREEN ORANGE&GREEN

ORANGE

ORANGE
GREEN

GREEN

1
LED7004

+
WLAN LED7001

+
GREEN
ORANGE

2
2
(R2.0)changed to 07G015700721TB

2
2nd: 07G015200341TB

PWR_LED#_LB SUSPEND_LED#_LB CHG_FULL_LED#_LB CHG_LED#_LB


New added SW for Teresa
SW7001 C7007 C7002 Removed WLAN_LED#_LB HDD_LED#_LB
3
3 C7004 C7006 Removed
5
WLAN_SW#_LB NP_NC2
2 C7008 Removed

1
2
4

1
NP_NC1 C7004 C7006 C7007 C7002 C7001
1
C 1 @ @ @ C7008 C

2
SLIDE_SWITCH_3P @ 1000PF/50V 1000PF/50V
C7001 Removed

2
1000PF/50V
1000PF/50V 1000PF/50V 1000PF/50V @
@
LED_BD_GND LED_BD_GND LED_BD_GND LED_BD_GND LED_BD_GND
LED_BD_GND LED_BD_GND

IR receive module removed


CON to T/P remove to TP BOARD
070115 Change pin define
+5VS_HD_LED +5VSUS_LED_BD
+5V_LED_BD

CON7001
HDD_LED#_LB 1
1
2 13
WLAN_LED#_LB 2 SIDE1
3
CHG_LED#_LB 3
4
PWR_LED#_LB 4
5
5
6
SUSPEND_LED#_LB 7 6
7
8
8
9
WLAN_SW#_LB 9
10
CHG_FULL_LED#_LB 11 10 CHG_FULL_LED#_LB
14
11 SIDE2
12
B
12 WLAN_SW#_LB B
1

C7003 C7005 FPC_CON_12P SUSPEND_LED#_LB


2

0.1UF/10V 0.1UF/10V PWR_LED#_LB


@ @ TO M/B
CHG_LED#_LB

WLAN_LED#_LB
LED_BD_GND
LED_BD_GND HDD_LED#_LB

1
D4302 D4303 D4304 D4305 D4306 D4307 D4308

@ @ @ @ @ @ @

0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF 0603-050E101NP-LF

2
H7001
H7002
1
NP_NC LED_BD_GND
2 5 1 6
GND1 GND4 NP_NC1 GND5
3 4 2 5
GND2 GND3 NP_NC2 GND4
3 4
GND2 GND3

CR276X295D91N
D91N&D98N
A A

LED_BD_GND
LED_BD_GND
DETAIL: Q DETAIL: S
Title : LED Board
ASUSALPHATeK COMPUTER INC. Engineer: Potter_Huang
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 65 of 66
2 1
5 4 3 2 1

TERESA20 SCHEMATIC V2.0


PAGE Content PAGE Content
SYSTEM PAGE REF.
D D

66 CONTENT 46 HISTORY
1 BLOCK DIAGRAM 47 POWER ON FLOWCHART
2 MEROM CPU (1) 48 GPIO SETTING
3 MEROM CPU (2)
4 THERMAL SENSOR & FAN
5 CLOCK GENERATOR
6 CRESTLINE HOST (1)
7 CRESTLINE DMI&PEG (2) POWER PAGE REF.
8 CRESTLINE DDR2 (3)
9 CRESTLINE POWER (4) 50 POWER_VCORE
10 CRESTLINE POWER2 (5) 51 POWER_SYSTEM
11 CRESTLINE GND (6) 52 POWER_I/O_1.5VS & 1.05VS
12 LVDS & INVERTER CONNECTOR 53 POWER_I/O_DDR & VTT
13 CRT CONNECTOR 54 POWER_I/O_+1.25VS & RTC_PWR
C
14 DDR2 SO-DIMM0 56 POWER_HISTORY C

15 DDR2 SO-DIMM1 58 POWER_CHARGER


16 DDR2 ADDRESS TERMINATION 60 POWER_DETECT
17 ICH8-M (1/4) LPC/IDE/CPU IF 61 POWER_LOAD SWITCH
18 ICH8-M (2/4) PCI/USB/DMI 62 POWER_PROTECT
19 ICH8-M (3/4) PM/GPIOs 63 POWER_SIGNAL
20 ICH8-M (4/4) Power 64 POWER_FLOWCHART
21 AUDIO CODEC-ALC660
22 AUDIO AMP
23 MIC JACK
24 ISA ROM DAUGHTER BOARD
25 NEWCARD
65 LED BOARD
26 MINI CARD
27 WLAN CONTROL
28 SATA HDD & ODD
B B
29 EC IT8511TE-1
30 EC IT8511TE-2/LED&TP CON.
33 MEDIA CARD SLOT
34 LAN_RTL8100CL
35 RJ45/RJ11/MDC
36 USB CONN x3
37 DISCHARGE CIRCUIT
38 SWITCH/LED
40 POWER-ON SEQUENCE
41 DC IN & BATT IN
43 PCI CARDBUS RICOH R5C847
44 R5C847/PCMCIA SOCKET
45 SCREW HOLE

A A

NC

Title : Content & History


ASUSALPHATeK COMPUTER INC. Engineer: IVERSON QIU
Size Project Name Rev
Custom TERESA20 2.0
Date: Thursday, July 05, 2007 Sheet 66 of 66
2 1

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