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5 4 3 2 1

D
W37 Block Diagram 04241-SA

PCB Layer Stackup D

L1: Signal 1
200-PIN DDR SODIMM
L2: GND
CLK GEN AMD CPU L3: Inner Signal 2
IDT CV137 DDR 333/400 DDR x2
ICS951419 Sempron K8 L4: Inner Signal 3
8,9,10
CY28RS480 L5: VCC
3 4,5,6,7
L6: Signal 4
SVIDEO/COMP
HyperTransport TV OUT16
6.4GB/S 16b/8b Battery Charger 48
MAX1909ETI
INPUTS OUTPUTS

ATI LVDS
LCD 17
AD+
BAT+
DCBATOUT

RS480M
C C

SYSTEM DC/DC 44
AGTL+ CPU I/F + UMA ISL6227
11,12,13,14
PCI Express x16 ATI M26 RGB CRT INPUT OUTPUT
MXM CRT
15 16 DCBATOUT 2D5V_S3 ,
1D8V_S5
PCI-Express SYSTEM DC/DC
x2 TPS 5130 45,46

10/100Mb
PCI LAN INPUT OUTPUT
DCBATOUT 5V_S5
Reltek USB x 4 3D3V_S5
RJ45 TXFM PCI Bus / 33MHz 6xUSB 2.0 CODEC 1D2V_S0
RTL8100CL PCI 24
30 30 100/10 ALC655 Line In
AC97 MIC In 33
6-CH 32
29 AC97 2.2 CPU V_CORE 42,43
Line Out
B
ATI MODEM RJ11
OP AMP INPUT
ISL6559CR
OUTPUT B
SB400 MDC Card CONN 33
ACPI 2.0 24 30
G1421 33 DCBATOUT VCC_CORE_S0
Mini-PCI
Int. SPKR
802.11a/b/g 33 SYSTEM POWER 47
31
LP2951ACM/APL5331KAC-TR

LPC Bus / 33MHz INPUT OUTPUT


LPC I/F
PWR SW
PCMCIA TI ATA 133 18,19,20,21,22 2D5V_S3 1D25V_S3
TPS2210A DCBATOUT 5V_AUX_S5
One Slot PCI 7411
TI 27
Cardbus
1394
PCMCIA I/F Thermal
28 SD/MS/MMC KBC
& Fan
KB 3910 SF
G792 23 34
1394
SIDE
PIDE
SATA

A A
Conn
28
DVD/ Wistron Corporation
SD/MS HDD
CD-RW
Touch Int. ISA ROM Debug(GF) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Card Slot Pad KB
25 25 35 35 36 37 Title
3 in 1 28 26,27 BLOCK DIAGRAM

Size Document Number Rev


A3 W 37 SB

Date: Monday, March 14, 2005 Sheet 1 of 51


5 4 3 2 1
5 4 3 2 1

-1 ver will change

CPU(62.10055.091) U70
D NB(71.RS48M.B0U) U16 D

SB(71.SB400.D0U) U34
CLK GEN(71.00137.B0W) U15
DDR cnt.(62.10017.311) DIM2
KBC (71.03910.B0G)U35
Remove SKT1(21.H0080.001)
Hole3(34.46i15.001)
Hole4(34.46i12.001)
Hole8(34.46i14.001)
Hole25(34.4B301.001)
Hole26(34.46i14.001)
GND20(34.4B312.001)
C C

B B

1/27
Revise:
support @D5V_S0 for AVDD (Page 13) --CRT ripple

ADD GND8~GND20 --EMI


change power of MDC form 3D3V_S0 to 3D3V_S5 --spec
issue
improve power on sequence (1.8/S5 to 3.3/S5)
C158-->0.01u;C156-->1u
Add 1u at 3D3V_S0/inverter (C809)

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CHANGE HISTORY

Size Document Number Rev


A3 W 37 SB

Date: Friday, March 25, 2005 Sheet 2 of 51


5 4 3 2 1
A B C D E

DY
CLK_PCIE_PEG# 1 2 R108 49D9R2F
3D3V_CLK_VDDA
CLK_PCIE_PEG 1 2 R109 49D9R2F

3D3V_S0 3D3V_CLK_VDD DY
U15 RN7 SRN33-2-U2
R131
2 3 SBLINK_CLK# 13 Do not populate
1 2 3D3VDD48_S0 3 33 SRC_CLK0# 1 4
39
VDD_48 SRCC0
34 SRC_CLK0
SBLINK_CLK 13 when using UMA
VDDA SRCT0

1
32 25 SRC_CLK3# 1 4 SBSRC_CLK# 18
0R0603-PAD C137 VDD_SRC SRCC3 SRC_CLK3
4
SRCT3 24 2 3 SBSRC_CLK 18 4
SC2D2U16V5ZY 21 23
VDD_SRC SRCC4

2
14 22 RN9 SRN33-2-U2 SBLINK_CLK# 1 2 R104 49D9R2F
VDD_SRC SRCT4
35 VDD_SRC SRCC5 19
18 SBLINK_CLK 1 2 R103 49D9R2F
SRCT5
56 VDD_REF SRCC6 17
51 16 SBSRC_CLK# 1 2 R110 49D9R2F
VDD_PC1 SRCT6
1 2 C136 XI_CLK 43 VDD_CPU SRCC7 13
SC33P50V2JN 48 12 SBSRC_CLK 1 2 R107 49D9R2F
VDD_HTT SRCT7
1
2

X1 R124 40 NBSRC_CLK# 1 2 R101 49D9R2F


DUMMY-R3 CPUC1
1 XIN CPUT1 41
2 44 CPUCLKJ_CY 1 2 R119 15R2J CPUCLK# 6 NBSRC_CLK 1 2 R100 49D9R2F
X-14D318MHZ-1-U1 XOUT CPUC0 CPUCLK_CY R117 15R2J
DY CPUT0 45 1 2 CPUCLK 6
1

USB_48M 4 USB_48
2

1 2 C135 XO_CLK SMBC_CLK 7 SCL


RN8 SRN33-2-U2
SC33P50V2JN SMBD_CLK 8 29 ATI_CLK0# 2 3 Do not populate
SDA SRCC1 NBSRC_CLK# 13
22R2 1 2 R125 30 ATI_CLK0 1 4
26 CLK48_CARDBUS 22R2 1 2 R129 10
SRCT1
28
NBSRC_CLK 13 when using UMA
21 CLK48_USB 0R2-0 R128 CLKREQ0# SRCC2
8,21 SMBC_SB 1 2 11 CLKREQ1# SRCT2 27 2 3 CLK_PCIE_PEG 15
0R2-0 1 2 R130 1 4
8,21 SMBD_SB CLK_PCIE_PEG# 15
FS2 9 36 DY RN10 SRN33-2-U2 3D3V_CLK_VDD
33R2 1 SEL24/24_48# VSS_SRC
13 CLK14_NB 2 R116 FS1 53 REF1 VSS_SRC 20
33R2 1 2 R122 FS0 54 15 1 2
21 SB_OSC_CLK REF0 RESET# R105 10KR2
TURBO1 26
52 REF2 DY

1
VSS_CPU 42
13 HTREF_CLK 1 2 R118 CLK_HTT66 47 49 R106
3 33R2 HTT66 VSS_PCI 0R2-0 3
50 PCI0 VSS_HTT 46
VSS_SRC 31 for IDTCV137PAG testing 3D3V_S0 3D3V_CLK_VDD
IREF_CLKGEN 37 38 L7
IREF VSSA

2
VSS_48 5 1 2
1

6 NC#6 VSS_REF 55
1

1
R114 R102 BLM11A601S
C810 C811 49D9R2F 475R2F for ICS951419 C121 C123 C122 C134 C146
SC1000P16V2KX SC1000P16V2KX IDTCV137PAG SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC22U10V6ZY-U
CY28RS480
2

2
2

IDTCV137PAG
Pin 9 CY28RS480 is NC

1
C133 C124 C138 C132
SCD1U16V SCD1U16V SCD1U16V SCD1U16V

2
2 2

3D3V_CLK_VDDA 3D3V_S0

L5
1 2

1
BLM11A601S
C120 C111
SCD1U16V SC22U10V6ZY-U

2
3D3V_CLK_VDD for ICS951419
DY
1 2 R121 2K2R2 FS0 FS2 FS1 FS0 CPU HTT PCI
1 2 R123 MHz MHz MHz
DY DUMMY-R2
0 0 0 Hi-Z Hi-Z Hi-Z
DY
1 2 R120 2K2R2 FS1 0 0 1 X X/3 X/6
1 2 R115 0 1 0 180.00 60.00 30.00
DY DUMMY-R2
1 0 1 1 220.00 36.56 73.12 1
DY
1 2 R127 2K2R2 FS2 1 0 0 100.00 66.66 33.33
1 2 R126 1 0 1 133.33 66.66 33.33 Wistron Corporation
DY DUMMY-R2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 1 1 200.00 66.66 33.33 Taipei Hsien 221, Taiwan, R.O.C.

Title
CLKGEN_ICS951412
Size Document Number Rev
A3
W37 SB
Date: Friday, April 15, 2005 Sheet 3 of 51
A B C D E
A B C D E

1D2V_HT0A_S0

1
C49 C47 C50 C48 EC13 EC30 EC21
SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY

2
DY SCD1U SCD1U SCD1U

2
4 4

1D2V_HT0A_S0 VLDT CONNECTED INNER OF CPU 1D2V_HT0A_S0


NORMALLY,HTT POWER CONNECT TO ONE
SIDE, NO NEET TO CONNECT BOTH OF HTT for CPU sideB
HTT for CPU sideA THEM Receive power
Transmit power and NB sideA
and NB sideA Receive Transmit power
power

U70A

D29 VLDT0_A VLDT0_B AH29 LAYOUT: Place bypass cap on topside of board near
D27 AH27
VLDT0_A VLDT0_B HTT power pins that are not connected directly to

1
D25 VLDT0_A VLDT0_B AG28
3 C28 VLDT0_A VLDT0_B AG26 C85 downstream HTT device, but connected internally to 3
C26 AF29 SC4D7U10V5ZY
VLDT0_A VLDT0_B other HTT power pins.

2
B29 VLDT0_A VLDT0_B AE28
B27 VLDT0_A VLDT0_B AF25

NB0CADOUT15 T25 N26 CPUCADOUT15 CPUCADOUT[15..0] 11


11 NB0CADOUT[15..0] NB0CADOUTJ15 L0_CADIN_H15 L0_CADOUT_H15 CPUCADOUTJ15
11 NB0CADOUTJ[15..0] R25 L0_CADIN_L15 L0_CADOUT_L15 N27 CPUCADOUTJ[15..0] 11
NB0CADOUT14 U27 L25 CPUCADOUT14
NB0CADOUTJ14 L0_CADIN_H14 L0_CADOUT_H14 CPUCADOUTJ14
U26 L0_CADIN_L14 L0_CADOUT_L14 M25
Used SideB Power Plane NB0CADOUT13 V25 L0_CADIN_H13 L0_CADOUT_H13 L26 CPUCADOUT13 Used SideA Power Plane
NB0CADOUTJ13 U25 L27 CPUCADOUTJ13
NB0CADOUT12 L0_CADIN_L13 L0_CADOUT_L13 CPUCADOUT12
W27 L0_CADIN_H12 L0_CADOUT_H12 J25
NB0CADOUTJ12 W26 K25 CPUCADOUTJ12
NB0CADOUT11 L0_CADIN_L12 L0_CADOUT_L12 CPUCADOUT11
AA27 L0_CADIN_H11 L0_CADOUT_H11 G25
NB0CADOUTJ11 AA26 H25 CPUCADOUTJ11
NB0CADOUT10 L0_CADIN_L11 L0_CADOUT_L11 CPUCADOUT10
AB25 L0_CADIN_H10 L0_CADOUT_H10 G26
NB0CADOUTJ10 AA25 G27 CPUCADOUTJ10
NB0CADOUT9 L0_CADIN_L10 L0_CADOUT_L10 CPUCADOUT9
AC27 L0_CADIN_H9 L0_CADOUT_H9 E25
NB0CADOUTJ9 AC26 F25 CPUCADOUTJ9
NB0CADOUT8 L0_CADIN_L9 L0_CADOUT_L9 CPUCADOUT8
AD25 L0_CADIN_H8 L0_CADOUT_H8 E26
NB0CADOUTJ8 AC25 E27 CPUCADOUTJ8
NB0CADOUT7 L0_CADIN_L8 L0_CADOUT_L8 CPUCADOUT7
T27 L0_CADIN_H7 L0_CADOUT_H7 N29
NB0CADOUTJ7 T28 P29 CPUCADOUTJ7
NB0CADOUT6 L0_CADIN_L7 L0_CADOUT_L7 CPUCADOUT6
V29 L0_CADIN_H6 L0_CADOUT_H6 M28
NB0CADOUTJ6 U29 M27 CPUCADOUTJ6
NB0CADOUT5 L0_CADIN_L6 L0_CADOUT_L6 CPUCADOUT5
V27 L0_CADIN_H5 L0_CADOUT_H5 L29
NB0CADOUTJ5 V28 M29 CPUCADOUTJ5
NB0CADOUT4 L0_CADIN_L5 L0_CADOUT_L5 CPUCADOUT4
Y29 L0_CADIN_H4 L0_CADOUT_H4 K28
NB0CADOUTJ4 W29 K27 CPUCADOUTJ4
2 NB0CADOUT3 L0_CADIN_L4 L0_CADOUT_L4 CPUCADOUT3 2
AB29 L0_CADIN_H3 L0_CADOUT_H3 H28
NB0CADOUTJ3 AA29 H27 CPUCADOUTJ3
NB0CADOUT2 L0_CADIN_L3 L0_CADOUT_L3 CPUCADOUT2
AB27 L0_CADIN_H2 L0_CADOUT_H2 G29
NB0CADOUTJ2 AB28 H29 CPUCADOUTJ2
NB0CADOUT1 L0_CADIN_L2 L0_CADOUT_L2 CPUCADOUT1
AD29 L0_CADIN_H1 L0_CADOUT_H1 F28
NB0CADOUTJ1 AC29 F27 CPUCADOUTJ1
NB0CADOUT0 L0_CADIN_L1 L0_CADOUT_L1 CPUCADOUT0
AD27 L0_CADIN_H0 L0_CADOUT_H0 E29
NB0CADOUTJ0 AD28 F29 CPUCADOUTJ0
L0_CADIN_L0 L0_CADOUT_L0
NB0HTTCLKOUT1 Y25 J26 CPUHTTCLKOUT1 CPUHTTCLKOUT1 11
11 NB0HTTCLKOUT1 NB0HTTCLKOUTJ1 L0_CLKIN_H1 L0_CLKOUT_H1 CPUHTTCLKOUTJ1
11 NB0HTTCLKOUTJ1 W25 L0_CLKIN_L1 L0_CLKOUT_L1 J27 CPUHTTCLKOUTJ1 11
NB0HTTCLKOUT0 Y27 J29 CPUHTTCLKOUT0 CPUHTTCLKOUT0 11
1D2V_HT0A_S0 11 NB0HTTCLKOUT0 NB0HTTCLKOUTJ0 L0_CLKIN_H0 L0_CLKOUT_H0 CPUHTTCLKOUTJ0
11 NB0HTTCLKOUTJ0 Y28 L0_CLKIN_L0 L0_CLKOUT_L0 K29 CPUHTTCLKOUTJ0 11
49D9R3F 1 2 R49 CPUHTTCTLIN1 R27 N25
49D9R3F L0_CTLIN_H1 L0_CTLOUT_H1
1 2 R48 CPUHTTCTLINJ1 R26 L0_CTLIN_L1 L0_CTLOUT_L1 P25
NB0HTTCTLOUT T29 P28 CPUHTTCTLOUT0 CPUHTTCTLOUT0 11
11 NB0HTTCTLOUT NB0HTTCTLOUTJ L0_CTLIN_H0 L0_CTLOUT_H0 CPUHTTCTLOUTJ0
11 NB0HTTCTLOUTJ R29 L0_CTLIN_L0 L0_CTLOUT_L0 P27 CPUHTTCTLOUTJ0 11

62.10030.041

By ME requset U11 P/N: BGA754-SKT-U

Main 62.10030.041
1 1
Second 62.10053.221
Third 62.10053.201
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU(1/4)_HyperTransport I/F
Size Document Number Rev
A3 SB
W37
Date: Friday, March 25, 2005 Sheet 4 of 51
A B C D E
A B C D E

U70B
1D25V_S3

TP28
TPAD30 DDRVTT_SENSE AE13 D17
VTT_SENSE VTT_A
4
VTT_A A18 4

1
VTT_A B17
2D5V_S3 AG12 C17 C102 C53
VREF_DDR_CLAW MEMVREF1 VTT_A SCD1U SC1000P50V2KX
VTT_B AF16

2
1 2 R37 34D8R2F MEMZN D14 MEMZN VTT_B AG16
1 2 R36 34D8R2F MEMZP C14 MEMZP VTT_B AH16
VTT_B AJ17

VREF_DDR_MEM
For REGISTED DIMM Only
AG10 MEMRESET#
MEMRESET_L UNBUFFER DIMM NC
AE8 M_CKE#0 M_CKE#0 8,9
MEMCKEA M_CKE#1
9 M_DATA[63..0] MEMCKEB AE7 M_CKE#1 8,9
M_DATA63 A16 MEMDATA63
NOTE: Test with passive probes only. M_DATA62
M_DATA61
B15 MEMDATA62 MEMCLK_H7 D10 M_CLK7
M_CLK#7
M_CLK7 8,9
A12 MEMDATA61 MEMCLK_L7 C10 M_CLK#7 8,9
2D5V_S3
NOTE: Install to bypass op-amp M_DATA60
M_DATA59
B11 MEMDATA60 MEMCLK_H6 E12 M_CLK6
M_CLK#6
M_CLK6 8,9
A17 MEMDATA59 MEMCLK_L6 E11 M_CLK#6 8,9
M_DATA58 A15 AF8 M_CLK5 M_CLK5 8,9
M_DATA57 MEMDATA58 MEMCLK_H5 M_CLK#5
C13 MEMDATA57 MEMCLK_L5 AG8 M_CLK#5 8,9
M_DATA56 A11 AF10 M_CLK4 M_CLK4 8,9 2D5V_S3
M_DATA55 MEMDATA56 MEMCLK_H4 M_CLK#4
A10 MEMDATA55 MEMCLK_L4 AE10 M_CLK#4 8,9
1

M_DATA54 B9 V3 RN3
R490 C553 M_DATA53 MEMDATA54 MEMCLK_H3 M_CLK#1
C7 MEMDATA53 MEMCLK_L3 V4 8 1
100R3F SCD1U M_DATA52 A6 K5 M_CLK#0 7 2
MEMDATA52 MEMCLK_H2
2

VREF_DDR_MEM M_DATA51 C11 K4 M_CLK1 6 3


M_DATA50 MEMDATA51 MEMCLK_L2 M_CLK1 M_CLK0
A9 MEMDATA50 MEMCLK_H1 R5 5 4
2

M_DATA49 A5 P5 M_CLK#1
M_DATA48 MEMDATA49 MEMCLK_L1 M_CLK0
B5 P3 SRN10K-2
M_DATA47 MEMDATA48 MEMCLK_H0 M_CLK#0
C5 MEMDATA47 MEMCLK_L0 P4
1

3 M_DATA46 A4 3
MEMDATA46
1

C526 C544 M_DATA45 E2 D8 M_CS#7


R491 SCD1U SC1000P50V2KX M_DATA44 MEMDATA45 MEMCS_L7 M_CS#6
E1 MEMDATA44 MEMCS_L6 C8
2

100R3F M_DATA43 A3 E8 M_CS#5


M_DATA42 MEMDATA43 MEMCS_L5 M_CS#4
B3 MEMDATA42 MEMCS_L4 E7
M_DATA41 E3 D6 M_CS#3 M_CS#3 8,9
MEMDATA41 MEMCS_L3
2

M_DATA40 F1 E6 M_CS#2 M_CS#2 8,9


M_DATA39 MEMDATA40 MEMCS_L2 M_CS#1
G2 MEMDATA39 MEMCS_L1 C4 M_CS#1 8,9
M_DATA38 G1 E5 M_CS#0 M_CS#0 8,9
M_DATA37 MEMDATA38 MEMCS_L0
L3 MEMDATA37
M_DATA36 L1 H5 M_ARAS# M_ARAS# 8,9
M_DATA35 MEMDATA36 MEMRASA_L M_ACAS#
G3 MEMDATA35 MEMCASA_L D4 M_ACAS# 8,9
M_DATA34 J2 G5 M_AW E# M_AW E# 8,9
M_DATA33 MEMDATA34 MEMWEA_L
L2 MEMDATA33
M_DATA32 M1 K3 M_ABS#1 M_ABS#1 8,9
M_DATA31 MEMDATA32 MEMBANKA1 M_ABS#0
W1 MEMDATA31 MEMBANKA0 H3 M_ABS#0 8,9
M_DATA30 W3 MEMDATA30

NOTE: Remove to bypass op-amp


M_DATA29 AC1 E13 RSVD_M_AA15
M_DATA28 MEMDATA29 NC_E13 RSVD_M_AA14
AC3 MEMDATA28 NC_C12 C12 M_AA[13..0] 8,9
M_DATA27 W2 E10 M_AA13
M_DATA26 MEMDATA27 MEMADDA13 M_AA12
Y1 MEMDATA26 MEMADDA12 AE6
M_DATA25 AC2 MEMDATA25 MEMADDA11 AF3 M_AA11 AMD suggested M_AA13
M_DATA24 AD1 M5 M_AA10
M_DATA23 AE1
MEMDATA24 MEMADDA10
AE5 M_AA9 connect to DIMM pin123
M_DATA22 MEMDATA23 MEMADDA9 M_AA8
AE3 MEMDATA22 MEMADDA8 AB5
M_DATA21 AG3 AD3 M_AA7 MEMZN TP2 TPAD30
M_DATA20 MEMDATA21 MEMADDA7 M_AA6 MEMZP TP1 TPAD30
AJ4 MEMDATA20 MEMADDA6 Y5
M_DATA19 AE2 AB4 M_AA5 M_DQS8 TP62 TPAD30
M_DATA18 MEMDATA19 MEMADDA5 M_AA4 M_ADM8 TP69 TPAD30
AF1 MEMDATA18 MEMADDA4 Y3
2 2

VREF_DDR_CLAW
M_DATA17 AH3 V5 M_AA3
M_DATA16 MEMDATA17 MEMADDA3 M_AA2
AJ3 MEMDATA16 MEMADDA2 T5
M_DATA15 AJ5 T3 M_AA1
M_DATA14 MEMDATA15 MEMADDA1 M_AA0
AJ6 MEMDATA14 MEMADDA0 N5
M_DATA13 AJ7
M_DATA12 MEMDATA13 M_BRAS#
AH9 MEMDATA12 MEMRASB_L H4 M_BRAS# 8,9
2D5V_S3 M_DATA11 AG5 F5 M_BCAS# MEMRESET# TP31 TPAD30
MEMDATA11 MEMCASB_L M_BCAS# 8,9
M_DATA10 AH5 F4 M_BW E# M_BW E# 8,9 M_CS#7 TP10 TPAD30
M_DATA9 MEMDATA10 MEMWEB_L M_CS#6 TP12 TPAD30
AJ9 MEMDATA9
M_DATA8 AJ10 L5 M_BBS#1 M_BBS#1 8,9 M_CS#5 TP9 TPAD30
M_DATA7 MEMDATA8 MEMBANKB1 M_BBS#0 M_CS#4 TP11 TPAD30
AH11 MEMDATA7 MEMBANKB0 J5 M_BBS#0 8,9
1

M_DATA6 AJ11 RSVD_M_AA15 TP5 TPAD30


R86 C105 M_DATA5 MEMDATA6 RSVD_M_BA15 RSVD_M_AA14 TP7 TPAD30
AH15 MEMDATA5 NC_E14 E14
100R3 SCD1U VREF_DDR_CLAW M_DATA4 AJ15 D12 RSVD_M_BA14 RSVD_M_BA15 TP6 TPAD30
MEMDATA4 NC_D12 M_BA[13..0] 8,9
2

M_DATA3 AG11 E9 M_BA13 RSVD_M_BA14 TP8 TPAD30


M_DATA2 MEMDATA3 MEMADDB13 M_BA12
AJ12 MEMDATA2 MEMADDB12 AF6
2

M_DATA1 AJ14 MEMDATA1 MEMADDB11 AF4 M_BA11 AMD suggested M_BA13


M_DATA0 AJ16 M4 M_BA10
MEMDATA0 MEMADDB10 connect to DIMM pin123
1

AD5 M_BA9
C106 C107 M_ADM8 MEMADDB9 M_BA8
9 M_ADM[7..0] R1 MEMDQS17 MEMADDB8 AC5
1

SCD1U SC1000P50V2KX M_ADM7 A13 AD4 M_BA7


MEMDQS16 MEMADDB7
2

R87 M_ADM6 A7 AA5 M_BA6


100R3 M_ADM5 MEMDQS15 MEMADDB6 M_BA5
C2 MEMDQS14 MEMADDB5 AB3
M_ADM4
M_ADM3
H1
AA1
MEMDQS13
MEMDQS12
MEMADDB4
MEMADDB3
Y4
W5
M_BA4
M_BA3 NOT SUPPORT ECC CHECK
2

M_ADM2 AG1 U5 M_BA2


M_ADM1
M_ADM0
AH7
AH13
MEMDQS11
MEMDQS10
MEMADDB2
MEMADDB1 T4
M3
M_BA1
M_BA0
AMD suggested remove
MEMDQS9 MEMADDB0
1 9 M_DQS[7..0]
M_DQS8
M_DQS7
T1
A14
MEMDQS8
MEMDQS7 MEMCHECK7 N3 CB7 TP68 TPAD30 PULL-HI resistor. 1

M_DQS6 A8 N1 CB6 TP64 TPAD30


MEMDQS6 MEMCHECK6
M_DQS5
M_DQS4
D1
J1
MEMDQS5
MEMDQS4
MEMCHECK5
MEMCHECK4
U3
V1
CB5
CB4
TP65
TP61
TPAD30
TPAD30 Wistron Corporation
M_DQS3 AB1 N2 CB3 TP67 TPAD30 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
M_DQS2 MEMDQS3 MEMCHECK3 CB2 TP63 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
AJ2 MEMDQS2 MEMCHECK2 P1
M_DQS1 AJ8 U1 CB1 TP60 TPAD30
M_DQS0 MEMDQS1 MEMCHECK1 CB0 TP66 TPAD30 Title
AJ13 MEMDQS0 MEMCHECK0 U2
CPU(2/4)_DDR
BGA754-SKT-U Size Document Number Rev
A3 SB
W37
Date: Friday, March 25, 2005 Sheet 5 of 51
A B C D E
A B C D E

2D5V_CPUA_S0

2D5V_VDDA_S0

1
3D3V_S0 Iomax=120mA

1
R74 R1
DY C92 20KR3F Vout = 1.25*(1+ R1/R2)
U11 SC22P50V2JN-1 DY

2
1 5 2D5V_VDDA_VREF
SHDN# SET
2 GND
2D5V_S0

1
AMD SUGGEST TO USE 100 ~ 300UH 3 IN OUT 4
R75
4 20KR3F R2 4

1
R77 G913C-U DY
1 2 2D5V_CPUR_S0 C91 C94

2
0R3-U SC1U10V3KX SC1U10V3KX

2
1

C97
SC10U10V5ZY
2

Change
L270H 2D5V_VDDA_S0 LAYOUT: Route trace 50 mils wide and LAYOUT: Route VDDA trace approx.
500 to 750 mils long between these 50 mils wide (use 2x25 mil traces to
2D5V_CPUA_S0 U70C
R76 L4
caps. exit ball field) and 500 mils long.
1 2 1 2 AH25 A20 THERMTRIP#
0R3-U 0R5J VDDA1 THERMTRIP_L
AJ25 VDDA2
1

1
DY THERMDA A26 THERMDP 23
TC4 C93 C95 C96 AF20 A27 THERMDN 23
ST100U4VBM-1 SC4D7U10V5ZY SC3300P50V2KX SCD22U16V3ZY 13,18 LDT_RST# RESET_L THERMDC
18 SB_CPUPW RGD AE18 PWROK VID[4..0] 42
2

2
1D2V_HT0A_S0 AJ27 AG13 VID4
13,18 LDT_STP# LDTSTOP_L VID4 VID3
VID3 AF14
1 2 R62 44D2R3F L0_REF1 AF27 L0_REF1 VID2 AG14 VID2
AMD SUGGEST TO USE 2D5V_CPUA_S0 1 2 R63 44D2R3F L0_REF0 AE26 L0_REF0 VID1 AF15
AE15
VID1
VID0
VID0

1
42 COREFB COREFB A23
C83 C84 COREFB# COREFB_H NC_AG18 TP27 TPAD30
42 COREFB# A24 COREFB_L NC_AG18 AG18
KEMET,NT:5.7, B2 size SC1000P50V2KX SC1000P50V2KX CORE_SENSE B23 AH18 NC_AH18 TP26 TPAD30
CORE_SENSE NC_AH18

2
AG17 NC_AG17
ST100U4VBM-1 (80.10716.321) VDDIOFB AE12
NC_AG17
AJ18 NC_AJ18
VDDIOFB_H NC_AJ18
Iripple=1.1A,ESR=70mohm VDDIOFBJ AF12 VDDIOFB_L
AMD suggest voltege VDDIOSENSE AE11 VDDIO_SENSE LAYOUT: Route FBCLKOUT_H/L
3 SANYO, NT$:6.1 from 2D5V_S0 to 2D5V_S3
3

Iripple=1.1A,ESR=70mohm 3 CPUCLK 1 2 C98 CLKIN AJ21 CLKIN_H differentially impedance 80

1
SC3900P50V3KX
3.5/2.8/2.0 differentially impedance 100 R64
AH21 CLKIN_L
FBCLKOUT

1
169R3F
77.21071.031 2D5V_S3 R80
AJ23 NC_AJ23 FBCLKOUT_H AH19
1 2 C99 CLKIN# AH23 AJ19 80D6R3F-U
3 CPUCLK# NC_AH23 FBCLKOUT_L

2
1 2 R79 820R3 SC3900P50V3KX NC_AJ23
1 2 R78 820R3 NC_AH23

2
NC_AE24 AE24 FBCLKOUTJ
1D25V_S3 NC_AF24 NC_AE24
AF24 NC_AF24
C16 R82 DY
2D5V_S0 VTT_A
AG15 VTT_B
AE19 DBREQJ 1 2
LDT_RST# DBREQ_L
1 2 R81 680R3 DBRDY AH17 DBRDY
SB_CPUPW RGD 1 2 R85 680R3 D20 NC_D20 DUMMY-R3
LDT_STP# NC_D20
1 2 R61 680R3 NC_C15 C15 NC_C15 NC_C21 C21 NC_C21
D18 NC_D18
TMS NC_D18 NC_C19
E20 TMS NC_C19 C19

HDT Connectors
TCK E17 B19 NC_B19
TRST_L TCK NC_B19
B21 TRST_L
Add HDT connector for 2D5V_S0 TDI A21 A22 TDO
TDI TDO
AMD suggested 1 2 R34 NC_C18 C18
2D5V_S0 2D5V_S0 680R3 NC_C18
DY RN25 SRN680-U 1 2 R35 NC_A19 A19 NC_A19 NC_AF18 AF18 2D5V_S3
DY 680R3
1

2
DY DY C26 A28 KEY1 Connect to VDDIO for AMD suggest. 2
8
7
6
5

SCD1U AJ28 KEY0


1

DY R84 R83 CN2 DY NC_D22 D22


SB
2

C435 1 2 NC_AE23 AE23 C22


SCD1U NC_AF23 NC_AE23 NC_C22
AF23 NC_AF23
2

680R3 680R3 3 4 NC_AF22 AF22 2D5V_S0


NC_AF21 NC_AF22
5 6 AF21 NC_AF21
1
2
3
4

DBREQJ 7 8

8
7
6
5

1
DBRDY 9 10
TCK 11 12 C1 R33
TMS RN4 NC_C1 680R3
13 14 J3 NC_J3 NC_B13 B13
TDI 15 16 SRN680-U R3 B7
TRST_L NC_R3 NC_B7
17 18 DY AA2 NC_AA2 NC_C3 C3

2
TDO 19 20 D3 K1 THERMTRIP# 2 3 CPU_THERMTRIP# 21,23
NC_D3 NC_K1
1
2
3
4
21 22 AG2 R2 Q5
R462 1 680R3 NC_AG2 NC_R2 MMBT3904-U1
2D5V_S3 2 23 24 B18 NC_B18 NC_AA3 AA3
DY 26 AH1 NC_AH1 NC_F3 F3

1
AE21 C23 2D5V_S0
SMC-CONN26A-FP NC_AE21 NC_C23
C20 NC_C20 NC_AG7 AG7
CHANGE FROM 1KR3 TO 680R2 FOR AMD 20.F0357.025 AG4 NC_AG4 NC_AE22 AE22 NS3 1 2 R32
C6 C24 1KR3
CHECK LIST AG6
NC_C6 NC_C24
A25
SRN680-U NC_AG6 NC_A25
RN5 AE9 C9
NC_AE9 NC_C9
1 8 AG9 NC_AG9
NC_D18 2 7 THERMTRIP#Level shift to SB400

Validation Test Points


NC_AJ18 3 6
NC_AG17 4 5
BGA754-SKT-U

1 NC_B19
NC_C21
1
2
8
7
LAYOUT: Place close to the CPU. 1

NC_D20 3 6 LDT_RST# TP25 TPAD30


NC_C19 4 5
NC_C15 TP4 TPAD30
CLKIN
CLKIN#
TP18
TP22
TPAD30
TPAD30 Wistron Corporation
RN2 SRN680-U NC_AE23 TP20 TPAD30 CORE_SENSE TP3 TPAD30 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
NC_AF23 TP21 TPAD30 VDDIOFB TP30 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
NC_AF22 TP23 TPAD30 VDDIOFBJ TP29 TPAD30
NC_AF21 TP24 TPAD30 VDDIOSENSE TP32 TPAD30 Title
NC_AE24
NC_AF24
TP17
TP19
TPAD30
TPAD30
CPU(3/4)_Control & Debug
Size Document Number Rev
A3 SB
W37
Date: Friday, March 25, 2005 Sheet 6 of 51
A B C D E
A B C D E

N20 VCC_CORE_S0 2D5V_S3


VSS
Y17 VSS VSS L20
K17 VSS VSS J20
H17 AF19 L7 E4
U70E
VSS VSS VDD VDDIO
F17 VSS VSS AD19 AC15 VDD VDDIO G4
E18 VSS VSS AB19 H18 VDD VDDIO J4
AJ26 Y19 B20 L4

U70D
VSS VSS VDD VDDIO
AE29 VSS VSS K19 E21 VDD VDDIO N4
AC16 H19 H22 U4 BGA754-SKT-U
VSS VSS VDD VDDIO
AA16 VSS VSS F19 J23 VDD VDDIO W4
J16 VSS VSS D19 H24 VDD VDDIO AA4
G16 VSS VSS AC18 F26 VDD VDDIO AC4 LAYOUT: Place in uPGA socket cavity.
E16 VSS VSS AA18 N7 VDD VDDIO AE4
4 AH14 VSS VSS G18 L9 VDD VDDIO D5 4
AD15 B16 V10 AF5 VCC_CORE_S0
VSS VSS VDD VDDIO
AB15 VSS VSS AD17 G13 VDD VDDIO F6 0.22u x 6 10u x 4
K15 VSS VSS AB17 K14 VDD VDDIO H6
E15 VSS VSS H15 Y14 VDD VDDIO K6

1
D16 VSS VSS F15 AB14 VDD VDDIO M6
AE14 VSS VSS G28 G15 VDD VDDIO P6
AC14 VSS VSS D28 J15 VDD VDDIO T6

2
AA14 B28 AA15 V6 C60 C485 C467 C69 C486 C61 C482 C465 C813 C814 C815
VSS VSS VDD VDDIO
J14 VSS VSS C27 H16 VDD VDDIO Y6
G14 VSS VSS AH26 K16 VDD VDDIO AB6
AF17 AF26 Y16 AD6 SCD22U16V3ZY SC10U10V5ZY SC10U10V5ZY SCD22U16V3ZY SCD22U16V3ZY
VSS VSS VDD VDDIO SCD22U16V3ZY SCD22U16V3ZY
SCD22U16V3ZY SC10U10V5ZY SC10U10V5ZY SCD22U16V3ZY
AD13 VSS VSS AD26 AB16 VDD VDDIO D7
AB13 VSS VSS Y26 G17 VDD VDDIO G7
Y13 VSS VSS T26 J17 VDD VDDIO J7
K13 VSS VSS M26 AA17 VDD VDDIO AA7
H13 VSS VSS H26 AC17 VDD VDDIO AC7
F13 VSS VSS D26 AE17 VDD VDDIO AF7
AH12 VSS VSS B26 F18 VDD VDDIO F8
AC12 VSS VSS C25 K18 VDD VDDIO H8
AA12 VSS VSS B25 Y18 VDD VDDIO AB8
G12 VSS VSS AJ24 AB18 VDD VDDIO AD8 LAYOUT: Place on backside of processor.
B12 VSS VSS AG24 AD18 VDD VDDIO D9
AD11 AC24 AG19 G9 VCC_CORE_S0
VSS VSS VDD VDDIO
AB11 VSS VSS AA24 E19 VDD VDDIO AC9
Y11 VSS VSS W24 G19 VDD VDDIO AF9
K11 VSS VSS U24 AC19 VDD VDDIO F10

1
H11 VSS VSS R24 AA19 VDD VDDIO AD10 DY
F11 VSS VSS N24 J19 VDD VDDIO D11
3 AH10 J24 F20 AF11 C484 C72 C73 C70 C469 3
VSS VSS VDD VDDIO

2
AC10 VSS VSS G24 H20 VDD VDDIO F12
W10 E24 K20 AD12 SC10U10V5ZY
VSS VSS VDD VDDIO
U10 VSS VSS AG23 M20 VDD VDDIO D13
R10 AD23 P20 AF13 SCD22U16V3ZY SC10U10V5ZY
VSS VSS VDD VDDIO SCD22U16V3ZY SCD22U16V3ZY
N10 VSS VSS AB23 T20 VDD VDDIO F14
L10 VSS VSS Y23 V20 VDD VDDIO AD14 0.22u x 4 10u x 2
J10 VSS VSS V23 Y20 VDD VDDIO F16
G10 VSS VSS T23 AB20 VDD VDDIO AD16
B10 VSS VSS P23 AD20 VDD VDDIO D15
AD9 K23 G21 R4 VCC_CORE_S0
VSS VSS VDD VDDIO
Y9 VSS VSS H23 J21 VDD
V9 VSS VSS F23 L21 VDD VDD N28
T9 VSS VSS D23 N21 VDD VDD U28
P9 VSS VSS AJ22 R21 VDD VDD AA28
M9 VSS VSS AH22 U21 VDD VDD AE27
K9 VSS VSS AG22 W21 VDD VDD R7
H9 VSS VSS AC22 AA21 VDD VDD U7
F9 AA22 AC21 W7 2D5V_S3 2D5V_S3
VSS VSS VDD VDD
AH8 VSS VSS AG29 F22 VDD VDD K8
AC8 VSS VSS U22 K22 VDD VDD M8
W8 VSS VSS R22 M22 VDD VDD P8 1

1
U8 VSS VSS N22 P22 VDD VDD T8 DY DY DY DY
R8 VSS VSS L22 T22 VDD VDD V8
N8 VSS VSS J22 V22 VDD VDD Y8
2

2
L8 G22 Y22 J9 C104 C40 C74 C54 C75 C86 C42 C41 C62 C63 C64 C55 C76
VSS VSS VDD VDD
J8 VSS VSS E22 AB22 VDD VDD N9
G8 VSS VSS B22 AD22 VDD VDD R9
B8 AG21 E23 U9 SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY SC10U10V5ZY SC4D7U10V5ZY SC4D7U10V5ZY SC4D7U10V5ZY
2 VSS VSS VDD VDD SCD22U16V3ZY SCD22U16V3ZY SC4D7U10V5ZY SC4D7U10V5ZY SC4D7U10V5ZY 2
AD7 VSS VSS AD21 G23 VDD VDD W9
AB7 VSS VSS Y21 L23 VDD VDD AA9 10u x 1 4.7u x 6
V7 VSS VSS V21 N23 VDD VDD H10
T7 VSS VSS T21 R23 VDD VDD K10
P7 VSS VSS P21 U23 VDD VDD M10
M7 VSS VSS M21 W23 VDD VDD P10
K7 VSS VSS K21 AA23 VDD VDD T10
H7 VSS VSS H21 AC23 VDD VDD Y10
F7 VSS VSS F21 B24 VDD VDD AB10
AH6 VSS VSS D21 D24 VDD VDD G11
AC6 VSS VSS AJ20 F24 VDD VDD J11
AA6 VSS VSS AG20 K24 VDD VDD AA11
U6 VSS VSS AE20 M24 VDD VDD AC11
R6 AC20 P24 H12 1D25V_S3 1D25V_S3
VSS VSS VDD VDD
N6 VSS VSS AA20 T24 VDD VDD K12
L6 VSS VSS W20 V24 VDD VDD Y12
J6 VSS VSS U20 Y24 VDD VDD AB12
1

1
G6 VSS VSS R20 AB24 VDD VDD J13
B6 VSS VSS G20 AD24 VDD VDD AA13
AH4 VSS VSS J18 AH24 VDD VDD AC13
2

2
B4 AE16 AE25 H14 C52 C51 C103 C101
VSS VSS VDD VDD
AH2 VSS VSS Y15 K26 VDD VDD AB26
AD2 B14 P26 E28 SCD22U16V3ZY SCD22U16V3ZY SC4D7U10V5ZY SC4D7U10V5ZY
VSS VSS VDD VDD
AB2 VSS VSS J12 V26 VDD VDD J28
Y2 VSS VSS AA10
V2 VSS VSS AB9
T2 VSS VSS AA8 0.22u x 2 4.7u x 2
P2 VSS VSS Y7
1 M2 VSS VSS W6 1
K2 VSS VSS AF2
H2 VSS VSS D2
F2
C29
VSS
VSS
VSS
VSS
AG27
AG25 Wistron Corporation
AH28 L24 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS VSS Taipei Hsien 221, Taiwan, R.O.C.
AF28 VSS VSS M23
AC28 VSS VSS W22
W28 AB21 Title
VSS VSS
R28
L28
VSS VSS AH20
B2
CPU(4/4)_Power
VSS VSS BGA754-SKT-U Size Document Number Rev
A3
W37 SB
Date: Friday, March 25, 2005 Sheet 7 of 51
A B C D E
A B C D E
DIM1 DIM2

M_AA0 112 121 M_CS#0 5,9 M_BA0 112 121 M_CS#2 5,9
M_AA1 A0 /CS0 M_BA1 A0 /CS0
111 A1 /CS1 122 M_CS#1 5,9 111 A1 /CS1 122 M_CS#3 5,9
M_AA2 110 M_BA2 110
M_AA3 A2 M_CKE#0 M_BA3 A2 M_CKE#1
109 A3 CKE0 96 M_CKE#0 5,9 109 A3 CKE0 96 M_CKE#1 5,9
M_AA4 108 95 M_BA4 108 95
M_AA5 A4 CKE1 M_BA5 A4 CKE1
107 A5 107 A5
M_AA6 106 11 M_DQS_R0 M_BA6 106 11 M_DQS_R0
M_AA7 A6 DQS0 M_DQS_R1 M_BA7 A6 DQS0 M_DQS_R1
105 A7 DQS1 25 105 A7 DQS1 25
M_AA8 102 47 M_DQS_R2 M_BA8 102 47 M_DQS_R2
M_AA9 A8 DQS2 M_DQS_R3 M_BA9 A8 DQS2 M_DQS_R3
101 A9 DQS3 61 101 A9 DQS3 61
M_AA10 115 133 M_DQS_R4 M_BA10 115 133 M_DQS_R4
M_AA11 A10 / AP DQS4 M_DQS_R5 M_BA11 A10 / AP DQS4 M_DQS_R5
100 A11 DQS5 147 100 A11 DQS5 147
4 M_AA12 99 169 M_DQS_R6 M_BA12 99 169 M_DQS_R6 4
A12 DQS6 M_DQS_R7 A12 DQS6 M_DQS_R7
DQS7 183 DQS7 183 M_ADM_R[7..0] 9
M_ABS#0 117 77 M_BBS#0 117 77
M_ABS#1 BA0 DQS8 M_BBS#1 BA0 DQS8
116 BA1 116 BA1 M_DATA_R_[63..0] 9
DM0 12 M_ADM_R0 M_ADM#0 DM0 12 M_ADM_R0 M_ADM#0
M_DATA_R_0 5 DQ0 DM1 26 M_ADM_R1 M_ADM#1 M_DATA_R_0 5 DQ0 DM1 26 M_ADM_R1 M_ADM#1 M_DQS_R[7..0] 9
M_DATA_R_1 7 DQ1 DM2 48 M_ADM_R2 M_ADM#2 M_DATA_R_1 7 DQ1 DM2 48 M_ADM_R2 M_ADM#2
M_DATA_R_2 13 DQ2 DM3 62 M_ADM_R3 M_ADM#3 M_DATA_R_2 13 DQ2 DM3 62 M_ADM_R3 M_ADM#3 M_AA[13..0] 5,9
M_DATA_R_3 17 DQ3 DM4 134 M_ADM_R4 M_ADM#4 M_DATA_R_3 17 DQ3 DM4 134 M_ADM_R4 M_ADM#4
M_DATA_R_4 6 DQ4 DM5 148 M_ADM_R5 M_ADM#5 M_DATA_R_4 6 DQ4 DM5 148 M_ADM_R5 M_ADM#5 M_ABS#[1..0] 5,9
M_DATA_R_5 8 DQ5 DM6 170 M_ADM_R6 M_ADM#6 M_DATA_R_5 8 DQ5 DM6 170 M_ADM_R6 M_ADM#6
M_DATA_R_6 14 DQ6 DM7 184 M_ADM_R7 M_ADM#7 M_DATA_R_6 14 DQ6 DM7 184 M_ADM_R7 M_ADM#7 M_BA[13..0] 5,9
M_DATA_R_7 18 78 M_DATA_R_7 18 78
M_DATA_R_8 DQ7 DM8 M_DATA_R_8 DQ7 DM8
19 DQ8 19 DQ8 M_BBS#[1..0] 5,9
M_DATA_R_9 23 35 M_CLK5 5,9 M_DATA_R_9 23 35 M_CLK4 5,9
M_DATA_R_10 DQ9 CK0 M_DATA_R_10 DQ9 CK0
29 DQ10 /CK0 37 M_CLK#5 5,9 29 DQ10 /CK0 37 M_CLK#4 5,9
M_DATA_R_11 31 160 M_CLK7 5,9 M_DATA_R_11 31 160 M_CLK6 5,9
M_DATA_R_12 DQ11 CK1 M_DATA_R_12 DQ11 CK1
20 DQ12 /CK1 158 M_CLK#7 5,9 20 DQ12 /CK1 158 M_CLK#6 5,9
M_DATA_R_13 24 89 DDR_CLK0 M_DATA_R_13 24 89 DDR_CLK1
M_DATA_R_14 DQ13 CK2 DDR_CLK#0 M_DATA_R_14 DQ13 CK2 DDR_CLK#1
30 DQ14 /CK2 91 30 DQ14 /CK2 91
M_DATA_R_15 32 M_DATA_R_15 32
M_DATA_R_16 DQ15 SMBC_SB M_DATA_R_16 DQ15
41 DQ16 SCL 195 41 DQ16 SCL 195 SMBC_SB 3,21
M_DATA_R_17 43 193 SMBD_SB M_DATA_R_17 43 193
M_DATA_R_18 49
DQ17
NORMAL TYPE SDA M_DATA_R_18 49
DQ17 SDA SMBD_SB 3,21

REVERSE TYPE
M_DATA_R_19 DQ18 M_DATA_R_19 DQ18 DM2_SA0
53 DQ19 SA0 194 53 DQ19 SA0 194 1 2 3D3V_S0
M_DATA_R_20 42 196 M_DATA_R_20 42 196
M_DATA_R_21 DQ20 SA1 M_DATA_R_21 DQ20 SA1 4K7R3 R460
44 DQ21 SA2 198 44 DQ21 SA2 198
M_DATA_R_22 50 M_DATA_R_22 50 DY 2D5V_S3
M_DATA_R_23 DQ22 M_DATA_R_23 DQ22
54 DQ23 VDD 9 54 DQ23 VDD 9
3 M_DATA_R_24 55 10 M_DATA_R_24 55 10 RN46 3
M_DATA_R_25 DQ24 VDD M_DATA_R_25 DQ24 VDD DDR_CLK#1
59 DQ25 VDD 21 59 DQ25 VDD 21 8 1
M_DATA_R_26 65 22 M_DATA_R_26 65 22 DDR_CLK#0 7 2
M_DATA_R_27 DQ26 VDD M_DATA_R_27 DQ26 VDD DDR_CLK1
67 DQ27 VDD 33 67 DQ27 VDD 33 6 3
M_DATA_R_28 56 34 M_DATA_R_28 56 34 DDR_CLK0 5 4
M_DATA_R_29 DQ28 VDD M_DATA_R_29 DQ28 VDD
60 DQ29 VDD 36 60 DQ29 VDD 36
M_DATA_R_30 66 45 M_DATA_R_30 66 45 SRN10K-2
M_DATA_R_31 DQ30 VDD M_DATA_R_31 DQ30 VDD
68 DQ31 VDD 46 68 DQ31 VDD 46
M_DATA_R_32 127 57 M_DATA_R_32 127 57
M_DATA_R_33 DQ32 VDD M_DATA_R_33 DQ32 VDD
129 DQ33 VDD 58 129 DQ33 VDD 58
M_DATA_R_34 135 69 M_DATA_R_34 135 69
M_DATA_R_35 DQ34 VDD M_DATA_R_35 DQ34 VDD
139 DQ35 VDD 70 139 DQ35 VDD 70
M_DATA_R_36 128 81 M_DATA_R_36 128 81
M_DATA_R_37 DQ36 VDD M_DATA_R_37 DQ36 VDD
130 DQ37 VDD 82 130 DQ37 VDD 82
M_DATA_R_38 136 92 M_DATA_R_38 136 92
M_DATA_R_39 DQ38 VDD M_DATA_R_39 DQ38 VDD
140 DQ39 VDD 93 140 DQ39 VDD 93
M_DATA_R_40 141 94 M_DATA_R_40 141 94
M_DATA_R_41 DQ40 VDD M_DATA_R_41 DQ40 VDD
145 DQ41 VDD 113 145 DQ41 VDD 113
M_DATA_R_42 151 114 M_DATA_R_42 151 114
M_DATA_R_43 DQ42 VDD M_DATA_R_43 DQ42 VDD
153 DQ43 VDD 131 153 DQ43 VDD 131
M_DATA_R_44 142 132 M_DATA_R_44 142 132
M_DATA_R_45 DQ44 VDD M_DATA_R_45 DQ44 VDD
146 DQ45 VDD 143 146 DQ45 VDD 143
M_DATA_R_46 152 144 M_DATA_R_46 152 144
M_DATA_R_47 DQ46 VDD M_DATA_R_47 DQ46 VDD
154 DQ47 VDD 155 154 DQ47 VDD 155
M_DATA_R_48 163 156 M_DATA_R_48 163 156
M_DATA_R_49 DQ48 VDD M_DATA_R_49 DQ48 VDD
165 DQ49 VDD 157 165 DQ49 VDD 157
M_DATA_R_50 171 167 M_DATA_R_50 171 167
M_DATA_R_51 DQ50 VDD M_DATA_R_51 DQ50 VDD
175 DQ51 VDD 168 175 DQ51 VDD 168
M_DATA_R_52 164 179 M_DATA_R_52 164 179
2 M_DATA_R_53 DQ52 VDD M_DATA_R_53 DQ52 VDD 2
166 DQ53 VDD 180 166 DQ53 VDD 180
M_DATA_R_54 172 191 M_DATA_R_54 172 191
M_DATA_R_55 DQ54 VDD M_DATA_R_55 DQ54 VDD
176 DQ55 VDD 192 2D5V_S3 176 DQ55 VDD 192 2D5V_S3
M_DATA_R_56 177 M_DATA_R_56 177
DQ56 DQ56
M_DATA_R_57 181 DQ57 VSS 3 NOT SUPPORT ECC CHECK M_DATA_R_57 181 DQ57 VSS 3
M_DATA_R_58 187 4 M_DATA_R_58 187 4
M_DATA_R_59 189
DQ58 VSS
15
AMD suggested pull-low M_DATA_R_59 189
DQ58 VSS
15
M_DATA_R_60 DQ59 VSS M_DATA_R_60 DQ59 VSS
178 DQ60 VSS 16 178 DQ60 VSS 16
M_DATA_R_61 182 27 M_DATA_R_61 182 27
M_DATA_R_62 DQ61 VSS M_DATA_R_62 DQ61 VSS
188 DQ62 VSS 28 188 DQ62 VSS 28
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS
VSS 39 VSS 39
71 CB0 VSS 40 71 CB0 VSS 40
73 CB1 VSS 51 73 CB1 VSS 51
79 CB2 VSS 52 79 CB2 VSS 52
83 CB3 VSS 63 83 CB3 VSS 63
72 CB4 VSS 64 72 CB4 VSS 64
74 CB5 VSS 75 74 CB5 VSS 75
80 CB6 VSS 76 80 CB6 VSS 76
84 CB7 VSS 87 84 CB7 VSS 87
VSS 88 VSS 88
85 NC#85 VSS 90 85 NC VSS 90
TPAD30 TP70 DM1_RESET# 86 103 TPAD30 TP15 DM2_RESET# 86 103
TPAD30 TP13 DM1_A13 NC#86/(RESET#) VSS TPAD30 TP59 DM2_A13 NC/(RESET#) VSS
97 NC#97/A13 VSS 104 97 NC/A13 VSS 104
TPAD30 TP58 DM1_BA2 98 125 TPAD30 TP14 DM2_BA2 98 125
M_AA13 NC#98/BA2 VSS M_BA13 NC/BA2 VSS
123 NC#123 VSS 126 123 NC VSS 126
124 NC#124 VSS 137 124 NC VSS 137
200 NC#200 VSS 138 200 NC VSS 138
1 VSS 149 VSS 149 1
118 150 M_BRAS# 118 150
5,9 M_ARAS# /RAS VSS 5,9 M_BRAS# M_BCAS# /RAS VSS
5,9 M_ACAS# 120 /CAS VSS 159 5,9 M_BCAS# 120 /CAS VSS 159
M_BW E#
5,9 M_AW E# 119 /WE VSS
VSS
161
162
5,9 M_BW E# 119 /WE VSS
VSS
161
162 Wistron Corporation
VREF_DDR_MEM 1 173 VREF_DDR_MEM 1 173 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VREF VSS VREF VSS Taipei Hsien 221, Taiwan, R.O.C.
2 VREF VSS 174 2 VREF VSS 174
Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185 Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185
1

199 186 199 186 Title


VDDID VSS VDDID VSS
C527
SCD1U 201 202
C532
SCD1U 202 201
DDR SO-DIMM SKT
GND GND GND GND
2

Size Document Number Rev


A3
W37 SB
SKT-SODIMM200-28
SKT-SODIMM200-25 Date: Tuesday, March 15, 2005 Sheet 8 of 51
A B C D E
A B C D E

SERIES DAMPING PARALLEL TERMINATION


PLACE RNs CLOSE TO FIRST DM ( DM1 ), < 0.75" PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM2 )
STRICT EQUAL LENGTH LIMITATION WITH DQS, NO EQUAL LENGTH LIMITATION
CB PINS 1D25V_S3 1D25V_S3
RN55 RN30 RN57 RN36
M_DATA4 1 16 M_DATA_R_4 M_DATA37 1 16 M_DATA_R_37 M_ADM_R1 1 16 1 16 M_DATA_R_39
M_ADM_R[7..0] 8
M_DATA5 2 15 M_DATA_R_5 M_DATA32 2 15 M_DATA_R_32 M_DATA_R_13 2 15 2 15 M_DATA_R_38 RN41
M_ADM0 3 14 M_ADM_R0 M_DATA33 3 14 M_DATA_R_33 M_DATA_R_12 3 14 3 14 M_DQS_R4 M_CKE#1 2 3 M_ADM[7..0] 5
M_DATA6 4 13 M_DATA_R_6 M_DATA36 4 13 M_DATA_R_36 M_DATA_R_6 4 13 4 13 M_ADM_R4 M_BA12 1 4
M_DATA7 5 12 M_DATA_R_7 M_DQS4 5 12 M_DQS_R4 M_DATA_R_7 5 12 5 12 M_DATA_R_32
M_DATA[63..0] 5
M_DATA13 6 11 M_DATA_R_13 M_ADM4 6 11 M_ADM_R4 M_ADM_R0 6 11 6 11 M_DATA_R_33 SRN47J
4 M_DATA12 7 10 M_DATA_R_12 M_DATA34 7 10 M_DATA_R_34 M_DATA_R_5 7 10 7 10 M_DATA_R_37 RN40 4
M_DATA_R_[63..0] 8
M_ADM1 8 9 M_ADM_R1 M_DATA39 8 9 M_DATA_R_39 M_DATA_R_4 8 9 8 9 M_DATA_R_36 M_CKE#0 2 3
M_AA12 1 4 M_DQS[7..0] 5
SRN10J-3 SRN10J-3 SRN68J-1 SRN68J-1
RN58 RN35 SRN47J M_DQS_R[7..0] 8
RN56 RN32 M_DATA_R_0 1 16 1 16 M_DATA_R_48
M_DATA0 1 16 M_DATA_R_0 M_DATA35 1 16 M_DATA_R_35 M_DATA_R_1 2 15 2 15 M_DATA_R_49 RN44 M_AA[13..0] 5,8
M_DATA1 2 15 M_DATA_R_1 M_DATA41 2 15 M_DATA_R_41 M_DQS_R0 3 14 3 14 M_DATA_R_43 M_AA11 1 16
M_DQS0 3 14 M_DQS_R0 M_DATA40 3 14 M_DATA_R_40 M_DATA_R_2 4 13 4 13 M_DATA_R_42 M_AA9 2 15 M_ABS#[1..0] 5,8
M_DATA2 4 13 M_DATA_R_2 M_DQS5 4 13 M_DQS_R5 M_DATA_R_3 5 12 5 12 M_DQS_R5 M_AA7 3 14
M_DATA3 5 12 M_DATA_R_3 M_DATA42 5 12 M_DATA_R_42 M_DATA_R_8 6 11 6 11 M_DATA_R_41 M_AA5 4 13 M_BA[13..0] 5,8
M_DATA8 6 11 M_DATA_R_8 M_DATA43 6 11 M_DATA_R_43 M_DATA_R_9 7 10 7 10 M_DATA_R_40 M_AA4 5 12
M_DATA9 7 10 M_DATA_R_9 M_DATA49 7 10 M_DATA_R_49 M_DQS_R1 8 9 8 9 M_DATA_R_34 M_AA8 6 11 M_BBS#[1..0] 5,8
M_DQS1 8 9 M_DQS_R1 M_DATA48 8 9 M_DATA_R_48 M_AA6 7 10
SRN68J-1 SRN68J-1 M_AA3 8 9
SRN10J-3 SRN10J-3 RN49 RN34 M_AW E# 5,8
M_DATA_R_25 1 16 1 16 M_DATA_R_35 SRN47J-1-U M_ACAS# 5,8
RN47 RN31 M_DATA_R_22 2 15 2 15 M_DATA_R_44 RN39 M_ARAS# 5,8
M_DATA14 1 16 M_DATA_R_14 M_DATA38 1 16 M_DATA_R_38 M_DATA_R_23 3 14 3 14 M_DATA_R_45 M_CS#3 1 16
M_DATA15 2 15 M_DATA_R_15 M_DATA45 2 15 M_DATA_R_45 M_ADM_R2 4 13 4 13 M_ADM_R5 M_BA13 2 15 M_BW E# 5,8
M_DATA21 3 14 M_DATA_R_21 M_DATA44 3 14 M_DATA_R_44 M_DATA_R_20 5 12 5 12 M_DATA_R_46 M_CS#2 3 14 M_BCAS# 5,8
M_DATA20 4 13 M_DATA_R_20 M_ADM5 4 13 M_ADM_R5 M_DATA_R_21 6 11 6 11 M_DATA_R_47 M_BRAS# 4 13 M_BRAS# 5,8
M_ADM2 5 12 M_ADM_R2 M_DATA47 5 12 M_DATA_R_47 M_DATA_R_14 7 10 7 10 M_DATA_R_53 M_BBS#1 5 12
M_DATA23 6 11 M_DATA_R_23 M_DATA46 6 11 M_DATA_R_46 M_DATA_R_15 8 9 8 9 M_DATA_R_52 M_BCAS# 6 11
M_DATA22 7 10 M_DATA_R_22 M_DATA53 7 10 M_DATA_R_53 M_BA0 7 10 M_CS#0 5,8
M_DATA25 8 9 M_DATA_R_25 M_DATA52 8 9 M_DATA_R_52 SRN68J-1 SRN68J-1 M_BA2 8 9 M_CS#1 5,8
RN50 RN29 M_CS#2 5,8
SRN10J-3 SRN10J-3 M_DATA_R_10 1 16 1 16 M_DATA_R_59 SRN47J-1-U M_CS#3 5,8
M_DATA_R_11 2 15 2 15 M_DATA_R_58 RN37
3 RN48 RN27 M_DATA_R_16 3 14 3 14 M_DQS_R7 M_AA1 1 16 3
M_DATA11 1 16 M_DATA_R_11 M_DQS6 1 16 M_DQS_R6 M_DATA_R_17 4 13 4 13 M_DATA_R_57 M_AA10 2 15
M_DATA10 2 15 M_DATA_R_10 M_DATA50 2 15 M_DATA_R_50 M_DQS_R2 5 12 5 12 M_DATA_R_56 M_AA2 3 14
M_DATA17 3 14 M_DATA_R_17 M_DATA51 3 14 M_DATA_R_51 M_DATA_R_19 6 11 6 11 M_DATA_R_51 M_AA0 4 13
M_DATA16 4 13 M_DATA_R_16 M_DATA56 4 13 M_DATA_R_56 M_DATA_R_18 7 10 7 10 M_DATA_R_50 M_ABS#1 5 12
M_DQS2 5 12 M_DQS_R2 M_DATA57 5 12 M_DATA_R_57 M_DATA_R_24 8 9 8 9 M_DQS_R6 M_ABS#0 6 11
M_DATA19 6 11 M_DATA_R_19 M_DQS7 6 11 M_DQS_R7 M_AW E# 7 10
M_DATA18 7 10 M_DATA_R_18 M_DATA58 7 10 M_DATA_R_58 SRN68J-1 SRN68J-1 M_ARAS# 8 9
M_DATA24 8 9 M_DATA_R_24 M_DATA59 8 9 M_DATA_R_59 RN45 RN28
M_DATA_R_30 1 16 1 16 M_ADM_R6 SRN47J-1-U
SRN10J-3 SRN10J-3 M_DATA_R_31 2 15 2 15 M_DATA_R_55 RN42
M_DATA_R_26 3 14 3 14 M_DATA_R_54 M_BA7 1 16
RN43 RN26 M_DATA_R_27 4 13 4 13 M_DATA_R_60 M_BA3 2 15
M_DATA29 1 16 M_DATA_R_29 M_ADM6 1 16 M_ADM_R6 M_ADM_R3 5 12 5 12 M_DATA_R_61 M_BA6 3 14
M_DATA28 2 15 M_DATA_R_28 M_DATA54 2 15 M_DATA_R_54 M_DQS_R3 6 11 6 11 M_ADM_R7 M_BA9 4 13
M_DQS3 3 14 M_DQS_R3 M_DATA55 3 14 M_DATA_R_55 M_DATA_R_29 7 10 7 10 M_DATA_R_63 M_BA10 5 12
M_ADM3 4 13 M_ADM_R3 M_DATA61 4 13 M_DATA_R_61 M_DATA_R_28 8 9 8 9 M_DATA_R_62 M_BA1 6 11
M_DATA26 5 12 M_DATA_R_26 M_DATA60 5 12 M_DATA_R_60 M_BBS#0 7 10
M_DATA27 6 11 M_DATA_R_27 M_ADM7 6 11 M_ADM_R7 SRN68J-1 SRN68J-1 M_BW E# 8 9
M_DATA30 7 10 M_DATA_R_30 M_DATA62 7 10 M_DATA_R_62
M_DATA31 8 9 M_DATA_R_31 M_DATA63 8 9 M_DATA_R_63 SRN47J-1-U
RN38
SRN10J-3 SRN10J-3 M_BA5 1 8
M_BA8 2 7
M_BA4 3 6
M_BA11 4 5

SRN47-1
2 2

RN33
M_AA13 1 8
M_CS#0 2 7
M_CS#1 3 6
M_ACAS# 4 5

SRN47-1

Place it near CPU

5,8 M_CKE#0 M_CKE#0

5,8 M_CKE#1 M_CKE#1


R42
1 2 M_CLK7 M_CLK7 5,8
05/10 M_CLK#7 M_CLK#7 5,8
Remove the damping resistor for AMD suggest. 121R2F
R41
1 2 M_CLK6 M_CLK6 5,8
M_CLK#6 M_CLK#6 5,8
121R2F

R66
1 2 M_CLK5 M_CLK5 5,8
1 M_CLK#5 M_CLK#5 5,8 1
121R2F
R65
1 2 M_CLK4
M_CLK#4
M_CLK4 5,8
M_CLK#4 5,8
Wistron Corporation
121R2F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DAMPING & TERMINATION
Size Document Number Rev
A3 SB
W37
Date: Tuesday, March 15, 2005 Sheet 9 of 51
A B C D E
A B C D E

4 4
LAYOUT:Place altemating caps to GND and 2D5_S3
2D5V_S3
DY DY
1D25V_S3
1

1
C440 C453 C500 C499 C479 C504 C489 C494 C493 C536 C497 C528 C537 C531 C446 C520 C441
2

2
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
1

1
C461 C515 C425 C551 C460 C445 C457 C459 C473 C549 C424 C501 C430 C518 C519 C478

1
C487
2

2
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U

2
SCD1U
DY DY
DY

3 3
2D5V_S3
DY DY DY
1D25V_S3 1D25V_S3
1

1
C550 C517 C428 C514 C423 C552 C447 C476 C490 C458 C456 C474 C462 C421 C498 C491 C444
2

1
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U C502 C471 C488 C513 C496 C439 C530

2
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
DY
1

1
C521 C454 C455 C442 C452 C505 C554 C511 C472 C534 C475 C492 C538 C529 C535 C443 C448
2

2
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U

DY DY

2 2

LAYOUT:Place close to Power Pin of DDR socket.

LAYOUT:Place at end of the DIMMs 2D5V_S3 2D5V_S3

1D25V_S3
1 2 C512 1 2 C510
SCD22U16V3ZY SCD22U16V3ZY
1

DY 1 2 C470 DY 1 2 C436
TC15 TC6 C438 C426 C477 C503 SCD22U16V3ZY SCD22U16V3ZY
ST100U4VBM-U ST100U4VBM-1 SC22U10V6ZY-U SC22U10V6ZY-U SC22U10V6ZY-U SC22U10V6ZY-U
2

DY 1 2 C416 DY 1 2 C420
SCD22U16V3ZY SCD22U16V3ZY

1 2 C495 1 2 C437
SCD22U16V3ZY SCD22U16V3ZY
KEMET,NT:5.7, B2 size
1 2 C533 1 2 C516
ST100U4VBM-1 (80.10716.321) SCD22U16V3ZY SCD22U16V3ZY
Iripple=1.1A,ESR=70mohm
SANYO, NT$:6.1
Iripple=1.1A,ESR=70mohm 0.22u x 10
3.5/2.8/2.0
1 77.21071.031 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DDR DECOUPLING
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 10 of 51
A B C D E
A B C D E

4 4

CLAW HAMMER TO NB NB TO CLAW HAMMER


4 CPUCADOUT[15..0] U16A
4 CPUCADOUTJ[15..0]
NB0CADOUT[15..0] 4
CPUCADOUT15 T26 R24 NB0CADOUT15 NB0CADOUTJ[15..0] 4
CPUCADOUTJ15 HT_RXCAD15P HT_TXCAD15P
CPUCADOUT14
R26 HT_RXCAD15N PART 1OF6 HT_TXCAD15N R25 NB0CADOUTJ15
NB0CADOUT14
U25 HT_RXCAD14P HT_TXCAD14P N26
CPUCADOUTJ14 U24 P26 NB0CADOUTJ14
CPUCADOUT13 HT_RXCAD14N HT_TXCAD14N NB0CADOUT13
V26 HT_RXCAD13P HT_TXCAD13P N24
CPUCADOUTJ13 U26 N25 NB0CADOUTJ13
CPUCADOUT12 HT_RXCAD13N HT_TXCAD13N NB0CADOUT12
W25 HT_RXCAD12P HT_TXCAD12P L26
CPUCADOUTJ12 W24 M26 NB0CADOUTJ12
CPUCADOUT11 HT_RXCAD12N HT_TXCAD12N NB0CADOUT11
AA25 HT_RXCAD11P HT_TXCAD11P J26
CPUCADOUTJ11 AA24 K26 NB0CADOUTJ11
CPUCADOUT10 HT_RXCAD11N HT_TXCAD11N NB0CADOUT10
AB26 HT_RXCAD10P HT_TXCAD10P J24
CPUCADOUTJ10 AA26 J25 NB0CADOUTJ10
3 CPUCADOUT9 HT_RXCAD10N HT_TXCAD10N NB0CADOUT9 3
AC25 HT_RXCAD9P HT_TXCAD9P G26
CPUCADOUTJ9 AC24 H26 NB0CADOUTJ9
CPUCADOUT8 HT_RXCAD9N HT_TXCAD9N NB0CADOUT8
AD26 HT_RXCAD8P HT_TXCAD8P G24
CPUCADOUTJ8 AC26 G25 NB0CADOUTJ8
HT_RXCAD8N HT_TXCAD8N
CPUCADOUT7 R29 L30 NB0CADOUT7
CPUCADOUTJ7 HT_RXCAD7P HT_TXCAD7P NB0CADOUTJ7
R28 HT_RXCAD7N HT_TXCAD7N M30
CPUCADOUT6 T30 L28 NB0CADOUT6
CPUCADOUTJ6 HT_RXCAD6P HT_TXCAD6P NB0CADOUTJ6
R30 HT_RXCAD6N HT_TXCAD6N L29
CPUCADOUT5 T28 J29 NB0CADOUT5
CPUCADOUTJ5 HT_RXCAD5P HT_TXCAD5P NB0CADOUTJ5
T29 K29

HYPER TRANSPORT CPU I/F


CPUCADOUT4 HT_RXCAD5N HT_TXCAD5N NB0CADOUT4
V29 HT_RXCAD4P HT_TXCAD4P H30
CPUCADOUTJ4 U29 H29 NB0CADOUTJ4
CPUCADOUT3 HT_RXCAD4N HT_TXCAD4N NB0CADOUT3
Y30 HT_RXCAD3P HT_TXCAD3P E29
CPUCADOUTJ3 W30 E28 NB0CADOUTJ3
1D2V_S0 CPUCADOUT2 HT_RXCAD3N HT_TXCAD3N NB0CADOUT2
Y28 HT_RXCAD2P HT_TXCAD2P D30
CPUCADOUTJ2 Y29 E30 NB0CADOUTJ2
CPUCADOUT1 HT_RXCAD2N HT_TXCAD2N NB0CADOUT1
AB29 HT_RXCAD1P HT_TXCAD1P D28
DY CPUCADOUTJ1 AA29 D29 NB0CADOUTJ1
CPUCADOUT0 HT_RXCAD1N HT_TXCAD1N NB0CADOUT0
AC29 HT_RXCAD0P HT_TXCAD0P B29
1

CPUCADOUTJ0 AC28 C29 NB0CADOUTJ0


C604 C572 HT_RXCAD0N HT_TXCAD0N
SCD1U16V SCD1U16V CPUHTTCLKOUT1 Y26 L24 NB0HTTCLKOUT1
4 CPUHTTCLKOUT1 HT_RXCLK1P HT_TXCLK1P NB0HTTCLKOUT1 4
2

CPUHTTCLKOUTJ1 W26 L25 NB0HTTCLKOUTJ1 NB0HTTCLKOUTJ1 4


4 CPUHTTCLKOUTJ1 HT_RXCLK1N HT_TXCLK1N
CPUHTTCLKOUT0 W29 F29 NB0HTTCLKOUT0 NB0HTTCLKOUT0 4
4 CPUHTTCLKOUT0 CPUHTTCLKOUTJ0 HT_RXCLK0P HT_TXCLK0P NB0HTTCLKOUTJ0
4 CPUHTTCLKOUTJ0 W28 HT_RXCLK0N HT_TXCLK0N G29 NB0HTTCLKOUTJ0 4

2
AROUND NB 4 CPUHTTCTLOUT0
CPUHTTCTLOUT0 P29 HT_RXCTLP HT_TXCTLP M29 NB0HTTCTLOUT NB0HTTCTLOUT 4 2
CPUHTTCTLOUTJ0 N29 M28 NB0HTTCTLOUTJ NB0HTTCTLOUTJ 4
4 CPUHTTCTLOUTJ0 HT_RXCTLN HT_TXCTLN

1D2V_HT0A_S0 1 2 R521 HT_RXCALN D27 HT_RXCALN HT_TXCALP B28 HT_TXCALP 1 2 R137


1 2 49D9R2F HT_RXCALP E27 A28 HT_TXCALN 100R2F
R134 49D9R2F HT_RXCALP HT_TXCALN

RS480M-U

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

NB-RS480M_HT
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 11 of 51
A B C D E
A B C D E

15 PEG_TXP[15..0]

15 PEG_TXN[15..0]

15 PEG_RXP[15..0]

15 PEG_RXN[15..0]

4 U16B 4
U16C
AF17 AF28
PART 2 OF 6
MEM_A0 MEM_DQ0
AK17 MEM_A1 PART 3 OF 6 MEM_DQ1 AF27 PEG_RXP15
PEG_RXN15
D8 GFX_RX0P GFX_TX0P A7 PEG_TXP15_NB
PEG_TXN15_NB
1 2 C683
C684
SCD1U16V
SCD1U16V
PEG_TXP15
PEG_TXN15
AH16 MEM_A2 MEM_DQ2 AG28 D7 GFX_RX0N GFX_TX0N B7 1 2
AF16 AF26 PEG_RXP14 D5 B6 PEG_TXP14_NB 1 2 C680 SCD1U16V PEG_TXP14
MEM_A3 MEM_DQ3 PEG_RXN14 GFX_RX1P GFX_TX1P PEG_TXN14_NB C682 SCD1U16V PEG_TXN14
AJ22 MEM_A4 MEM_DQ4 AE25 D4 GFX_RX1N GFX_TX1N B5 1 2
AJ21 AE24 PEG_RXP13 E4 A5 PEG_TXP13_NB 1 2 C681 SCD1U16V PEG_TXP13
MEM_A5 MEM_DQ5 PEG_RXN13 GFX_RX2P GFX_TX2P PEG_TXN13_NB C659 SCD1U16V PEG_TXN13
AH20 MEM_A6 MEM_DQ6 AF24 F4 GFX_RX2N GFX_TX2N A4 1 2
AH21 AG23 PEG_RXP12 G5 B3 PEG_TXP12_NB 1 2 C666 SCD1U16V PEG_TXP12
MEM_A7 MEM_DQ7 PEG_RXN12 GFX_RX3P GFX_TX3P PEG_TXN12_NB C664 SCD1U16V PEG_TXN12
AK19 MEM_A8 MEM_DQ8 AE29 G4 GFX_RX3N GFX_TX3N B2 1 2
AH19 AF29 PEG_RXP11 H4 C1 PEG_TXP11_NB 1 2 C663 SCD1U16V PEG_TXP11
MEM_A9 MEM_DQ9 PEG_RXN11 GFX_RX4P GFX_TX4P PEG_TXN11_NB C661 SCD1U16V PEG_TXN11
AJ17 MEM_A10 MEM_DQ10 AG30 J4 GFX_RX4N GFX_TX4N D1 1 2
AG16 AG29 PEG_RXP10 H5 D2 PEG_TXP10_NB 1 2 C668 SCD1U16V PEG_TXP10
MEM_A11 MEM_DQ11 PEG_RXN10 GFX_RX5P GFX_TX5P PEG_TXN10_NB C669 SCD1U16V PEG_TXN10
AG17 MEM_A12 MEM_DQ12 AH28 H6 GFX_RX5N GFX_TX5N E2 1 2
AH17 AJ28 PEG_RXP9 G1 F2 PEG_TXP9_NB 1 2 C662 SCD1U16V PEG_TXP9
MEM_A13 MEM_DQ13 PEG_RXN9 GFX_RX6P GFX_TX6P PEG_TXN9_NB C660 SCD1U16V PEG_TXN9
AJ18 MEM_A14 MEM_DQ14 AH27 G2 GFX_RX6N GFX_TX6N F1 1 2
AJ27 PEG_RXP8 K5 H2 PEG_TXP8_NB 1 2 C670 SCD1U16V PEG_TXP8
MEM_DQ15 PEG_RXN8 GFX_RX7P GFX_TX7P PEG_TXN8_NB C667 SCD1U16V PEG_TXN8
AG26 MEM_DM0 MEM_DQ16 AE23 K4 GFX_RX7N GFX_TX7N J2 1 2
AJ29 AG22 PEG_RXP7 L4 J1 PEG_TXP7_NB 1 2 C665 SCD1U16V PEG_TXP7
MEM_DM1 MEM_DQ17 PEG_RXN7 GFX_RX8P GFX_TX8P PEG_TXN7_NB C617 SCD1U16V PEG_TXN7
AE21 MEM_DM2 MEM_DQ18 AF23 M4 GFX_RX8N GFX_TX8N K1 1 2
AH24 AF22 PEG_RXP6 N5 K2 PEG_TXP6_NB 1 2 C623 SCD1U16V PEG_TXP6
MEM_DM3 MEM_DQ19 PEG_RXN6 GFX_RX9P GFX_TX9P PEG_TXN6_NB C624 SCD1U16V PEG_TXN6
AH12 MEM_DM4 MEM_DQ20 AE20 N4 GFX_RX9N GFX_TX9N L2 1 2
AG13 AG19 PEG_RXP5 P4 M2 PEG_TXP5_NB 1 2 C618 SCD1U16V PEG_TXP5
MEM_DM5 MEM_DQ21 PEG_RXN5 GFX_RX10P GFX_TX10P PEG_TXN5_NB C621 SCD1U16V PEG_TXN5
AH8 MEM_DM6 MEM_DQ22 AF20 R4 GFX_RX10N GFX_TX10N M1 1 2

PCIE I/F TO VIDEO


AE8 AF19 PEG_RXP4 P5 N1 PEG_TXP4_NB 1 2 C628 SCD1U16V PEG_TXP4
MEM_DM7 MEM_DQ23 PEG_RXN4 GFX_RX11P GFX_TX11P PEG_TXN4_NB C625 SCD1U16V PEG_TXN4
MEM_DQ24 AH26 P6 GFX_RX11N GFX_TX11N N2 1 2
AF25 AJ26 PEG_RXP3 P2 R1 PEG_TXP3_NB 1 2 C616 SCD1U16V PEG_TXP3
MEM_DQS0P MEM_DQ25 PEG_RXN3 GFX_RX12P GFX_TX12P PEG_TXN3_NB C615 SCD1U16V PEG_TXN3
AH30 MEM_DQS1P MEM_DQ26 AK26 R2 GFX_RX12N GFX_TX12N T1 1 2
3 2D5V_S3 AG20 AH25 PEG_RXP2 T5 T2 PEG_TXP2_NB 1 2 C626 SCD1U16V PEG_TXP2 3
MEM_DQS2P MEM_DQ27 PEG_RXN2 GFX_RX13P GFX_TX13P PEG_TXN2_NB C627 SCD1U16V PEG_TXN2
AJ25 MEM_DQS3P MEM_DQ28 AJ24 T4 GFX_RX13N GFX_TX13N U2 1 2
AH13 AH23 PEG_RXP1 U4 V2 PEG_TXP1_NB 1 2 C619 SCD1U16V PEG_TXP1
MEM_DQS4P MEM_DQ29 PEG_RXN1 GFX_RX14P GFX_TX14P PEG_TXN1_NB C622 SCD1U16V PEG_TXN1
AF14 MEM_DQS5P MEM_DQ30 AJ23 V4 GFX_RX14N GFX_TX14N V1 1 2
AJ7 AH22 PEG_RXP0 W1 Y2 PEG_TXP0_NB 1 2 C620 SCD1U16V PEG_TXP0
MEM_DQS6P MEM_DQ31 GFX_RX15P GFX_TX15P
1

AG8 AK14 PEG_RXN0 W2 AA2 PEG_TXN0_NB 1 2 C577 SCD1U16V PEG_TXN0


R484 MEM_DQS7P MEM_DQ32 GFX_RX15N GFX_TX15N
AH14
MEM_A I/F

1KR2F MEM_DQ33
AG25 MEM_DQS0N MEM_DQ34 AK13
AH29 MEM_DQS1N MEM_DQ35 AJ13 AE1 GPP_RX0P/SB_RX2P GPP_TX0P/SB_TX2P AD2
AF21 MEM_DQS2N MEM_DQ36 AJ11 AE2 GPP_RX0N/SB_RX2N GPP_TX0N/SB_TX2N AD1
2

MEM_VREF AK25 AH11


MEM_DQS3N MEM_DQ37
AJ12 MEM_DQS4N MEM_DQ38 AJ10 AB2 GPP_RX1P/SB_RX3P GPP_TX1P/SB_TX3P AA1
AF13 MEM_DQS5N MEM_DQ39 AH10 AC2 GPP_RX1N/SB_RX3N GPP_TX1N/SB_TX3N AB1
1

AK7 MEM_DQS6N MEM_DQ40 AE15


R485 AF9 AF15 AB5 PCIE I/F TO SLOT GPP_TX2P Y5
1KR2F MEM_DQS7N MEM_DQ41 GPP_RX2P
MEM_DQ42 AG14 AB4 GPP_RX2N GPP_TX2N Y6
AE17 MEM_RAS# MEM_DQ43 AE14
AH18 MEM_CAS# MEM_DQ44 AE12 Y4 GPP_RX3P GPP_TX3P W5
2

AE18 MEM_WE# MEM_DQ45 AF12 AA4 GPP_RX3N GPP_TX3N W4


AJ19 MEM_CS# MEM_DQ46 AG11
AF18 MEM_CKE MEM_DQ47 AE11
Connect MEM_VREF to VDD_MEM/2 AK16
MEM_DQ48 AJ9
AH9
18 PCIE_RX0P_SB AG1
AH1
SB_RX0P SB_TX0P AF2
AG2
SB_TX0P
SB_TX0N
1
1
2 C578
2 C579
SCD1U16V
SCD1U16V
PCIE_TX0P_SB 18
MEM_CKP MEM_DQ49 18 PCIE_RX0N_SB SB_RX0N SB_TX0N PCIE_TX0N_SB 18
PA_RS480F1.PDF AJ16 MEM_CKN MEM_DQ50 AJ8 PCIE I/F TO SB
AK8 AC5 AC4 SB_TX1P 1 2 C581 SCD1U16V PCIE_TX1P_SB 18
MEM_DQ51 18 PCIE_RX1P_SB SB_RX1P SB_TX1P SB_TX1N
MEM_DQ52 AH7 18 PCIE_RX1N_SB AC6 SB_RX1N SB_TX1N AD4 1 2 C580 SCD1U16V PCIE_TX1N_SB 18
MEM_DQ53 AJ6
AH6 10KR2 1 2 R94 PCE_ISET AH3 AH2 PCE_PCAL 150R2 1 2 R96
SCD47U16V3ZY MEM_DQ54 PCE_ISET PCE_PCAL
1 2 C126 MEM_CAP1 AE28 MEM_CAP1 MEM_DQ55 AJ5 8K25R3F 1 2 R93 PCE_TXISET AJ3
PCE_TXISET PCE_NCAL AJ2 PCE_NCAL 1 2 1D2V_S0
2 SCD47U16V3ZY 2
1 2 C548 MEM_CAP2 AJ4 MEM_CAP2 MEM_DQ56 AG10
AF11 R95 82D5R2F
MEM_DQ57
MEM_DQ58 AF10 RS480M-U
MEM_DQ59 AE9
1KR2 1 2 R486 NB_MEM_VMODE AJ20 AG7
MEM_VMODE MEM_DQ60
SB
AF8 DO NOT SUPPORT SIDEPORT MEMORY
MEM_DQ61 2D5V_S3 DUMMY IT
MEM_DQ62 AF7
MEM_VREF AK20 AE7
MEM_VREF MEM_DQ63
DY
1D8V_S0 0R5J-1 1 2 L26 MPVDD_PLL AJ15 AH5 MEM_COMPP 1 2 R48960D4R2F
MPVDD MEM_COMPP MEM_COMPN
AJ14 MPVSS MEM_COMPN AD30 1 2
1

R503 60D4R2F
C542
SC1U10V3KX
RS480M-U DY
2

DO NOT SUPPORT SIDEPORT MEMORY


DUMMY IT

When disable local frame buffer,


VDD_MEM connect to 2D5V_S3, MEM_VMODE
connect to GND, MEM_VREF connect to
2D5V_S3, MPVDD connected to 1D8V
1
DSG-215-RS480-04.PDF 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

NB-RS480M_MEM/PCIE_LINK I/F
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 12 of 51
A B C D E
A B C D E

2D5V_CRT
1D8V_S0 3D3V_S0 2D5V_S0 AVDD
AVDDQ 2D5V_CRT 2D5V_CRT
R675
R515 R842 R1

1
0R3-U 1 2 1 2 1 2 2D5V_CRT Iomax=120mA
2 R519 0R3-U R843 3D3V_S0
1

1
SB DUMMY-R3
0R3-U 3D3V_S0 U82 DY 20KR3F

1
DY DY
C646 C647 C598

2
SC10U10V5ZY SCD1U16V 1D8V_S0 SC1U10V3ZY 1 5
SHDN# SET
2

2
DY 2 GND

1
3 IN OUT 4
R522 R844 R148 R178
4 1 2 1D8VAVDDD1_S0 20KR3F 4K7R2 4K7R2 4

1
0R3-U G913C-U C812 DY

2
1
Vout = 1.25*(1+ R1/R2) SC1U10V3KX R2

2
C649 DY VGA_SMB_CLK
SC1U10V3ZY

2
U16D VGA_SMB_DAT
B27 AVDD1 PART 4 OF 6
AVDDQ C27 D18
AVDD2 TXOUT_U0P GMCH_TXBOUT0+ 17
D26 AVSSN1 TXOUT_U0N C18 GMCH_TXBOUT0- 17
1

1
Do not populate D25 AVSSN2 TXOUT_U1P B19 GMCH_TXBOUT1+ 17

1
R138 R139 R140 R141 R142 C24 A19
when using M26 C648 B24
AVDDDI TXOUT_U1N
D19
GMCH_TXBOUT1- 17
AVSSDI TXOUT_U2P GMCH_TXBOUT2+ 17
75R2F 75R2F 75R2F 75R2F 75R2F SC1U10V3ZY C19
TXOUT_U2N GMCH_TXBOUT2- 17

2
E24 D20 TXBOUT3+ TP79 TPAD30
AVDDQ TXOUT_U3P
2

2
D24 C20 TXBOUT3- TP80 TPAD30
AVSSQ TXOUT_U3N

16 RS480_TV_CRMA B25 C TXOUT_L0P B16 GMCH_TXAOUT0+ 17


16 RS480_TV_LUMA A25 Y TXOUT_L0N A16 GMCH_TXAOUT0- 17

CRT/TVOUT
A24 COMP TXOUT_L1P D16 GMCH_TXAOUT1+ 17
TXOUT_L1N C16 GMCH_TXAOUT1- 17
16 MAIN_CRT_R C25 B17 1D8V_S0
RED TXOUT_L2P GMCH_TXAOUT2+ 17
16 MAIN_CRT_G A26 GREEN TXOUT_L2N A17 GMCH_TXAOUT2- 17
16 MAIN_CRT_B B26 E17 TXAOUT3+ TP82 TPAD30
BLUE TXOUT_L3P TXAOUT3- TP81 TPAD30
D17

LVDS
1D8V_S0 PLVDD TXOUT_L3N R531
16 GMCH_VSYNC A11 DAC_VSYNC
16 GMCH_HSYNC B11 DAC_HSYNC TXCLK_UP B20 GMCH_TXBCLK+ 17 1 2
R176 715R3F 1 2 R520 IRSET_NB C26 A20 GMCH_TXBCLK- 17 BLM11A121S
RSET TXCLK_UN

1
1 2 0R2-0 1 2 R527 VGA_CLK_DDC_NB E11 B18
16 VGA_CLK_DDC_3 DAC_SCL TXCLK_LP GMCH_TXACLK+ 17
3 BLM11A121S 0R2-0 1 2 R528 VGA_DAT_DDC_NB F11 C17 C657 3
16 VGA_DAT_DDC_3 DAC_SDA TXCLK_LN GMCH_TXACLK- 17
1

C678 SCD1U16V

2
C166 Do not populate LPVDD E18 1D8VLPVDD_S0
SC10U10V5ZY C150 C165 F17 SC1U10V3ZY
when using M26 LPVSS
2

A14 E19 R523


1D8V_S0 SCD1U16V
SCD1U16V PLLVDD LVDDR18D LVDDR18D_S0
B14 PLLVSS LVDDR18A_1 G20 1 2
HTPVDD H20 BLM11A121S

PLL PWR
LVDDR18A_2

1
M23 C677 C655
R133 HTPVDD LVDDR18A_S0
L23 HTPVSS LVSSR1 G19
1 2 E20 SCD1U16V
LVSSR2

2
LVSSR3 F20
1

150R3F H18 SC1U10V3ZY R132


C140 RS480_RST# LVSSR4
D14 SYSRESET# LVSSR5 G18 1 2
SC10U10V5ZY C141 C142 40 NB_PW RGD B15 F19 BLM11A121S
POWERGOOD LVSSR6
2

1
PM
6,18 LDT_STP# B12 LDTSTOP# LVSSR7 H19
SCD1U16V C12 F18 C147
SCD1U16V 18 ALLOW _LDTSTOP NB_SUS_STAT# ALLOW_LDTSTOP LVSSR8 C149 SCD1U16V
AH4 SUS_STAT#

2
E14 LVDS_DIGON
1D8V_S0 3D3V_S0 LVDS_DIGON LVDS_BLON SC1U10V3ZY
R536 LVDS_BLON F14
H13 F13 LVDS_BLEN_NB TP83 TPAD30
3D3VDDR_S0 VDDR3_1 LVDS_BLEN
1 2 H12 VDDR3_2
GFX_CLKP B8 NBSRC_CLK 3
1

0R0603-PAD A13 A8 NBSRC_CLK# 3


3 CLK14_NB OSCIN GFX_CLKN
1

C679 NB_OSC_OUT B13 OSCOUT


CLOCKs
R92 SC1U10V3ZY TPAD28 TP84 P23 HTTST_CLK 1 2 R516 10KR2
HTTSTCLK
2

4K7R2 N23
HTREFCLK HTREF_CLK 3

SB_CLKP E8 SBLINK_CLK 3
2

NB_SUS_STAT# TP35 B9 E7 SBLINK_CLK# 3


2 TPAD28 TVCLKIN SB_CLKN 2

2 1 R145 3KR2F
DO NOT SUPPORT SIDEPORT MEMORY 3KR2F 2 1 R526 DY DFT_GPIO0 F12 C13 DFT_GPIO3 DY
DO NOT SUPPORT SERIAL STRAP ROM 3KR2F DFT_GPIO0/RSV DFT_GPIO3/RSV
2 1 R524 DY DFT_GPIO1 E13 DFT_GPIO1/RSV DFT_GPIO4/RSV C14 DFT_GPIO4 2 1 R144
DUMMY IT 3KR2F 1 R525 DFT_GPIO2 DFT_GPIO5 3KR2F
DY 2 DY D13 DFT_GPIO2/RSV DFT_GPIO5/RSV C15 DY
1 2 R203 2 1R143
0R2-0 A10 TP36 DY 3KR2F
TMDS_HPD TPAD28 DISABLE DEBUG MODE
18 BMREQ# F10 BMREQb
C10 E10 TP85 TPAD28 DUMMY IT
I2C_CLK STRP_DATA
MIS.
TPAD28 TP77 C11 I2C_DATA TP34
AF4 THERMALDIODE_P DDC_DATA B10
3D3V_S0 17 VGA_SMB_CLK AE4 TPAD28
THERMALDIODE_N
17 VGA_SMB_DAT TESTMODE E12 TESTMODE_NB 3D3V_S0

U28A THERMAL_P_NB RS480M-U


14

23 THERMAL_P_NB
23 THERMAL_N_NB THERMAL_N_NB 3D3V_S0 DY

1
LDT_RST# 1 DY R201 DY DY
3 1 2 AG_RST# 15,34 LVDS_DIGON 1 2 R542 R181 R179 C167
39,40 ALL_PW ROK

1
2 0R2-0 0R2-0 R147 2KR2 1KR2 SCD1U16V DY

2
1

D16 3D3V_S0 DUMMY-R2 U20


TSLCX08MTC-U RB751V-40-U R202 DY
7

1
DY 2KR2 U28B STRP_DATA 5 4
14

SDA GND
6 SCL A2 3

1
4 7 WP A1 2
2

1 2
6 R180 8 1
3D3V_S0 NB_PW RGD LCD_VDD_ON 17 2KR2 VCC A0
5
R146 DY VGA_SMB_CLK
TSLCX08MTC-U 4K7R2 AT24C04N-10SI
7

2
3D3V_S0
2

U28C
14

1 1
D14

2
9 R204 RB751V-40-U U28D
14

6,18 LDT_RST#
RS480_RST#_R RS480_RST#
18,37 LPC_RST# 10
8 1 2
33R2 DY
12 R207 Wistron Corporation
1
1

11 1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


0R2-0 GMCH_BL_ON 34
TSLCX08MTC-U C189 LVDS_BLON 13 Taipei Hsien 221, Taiwan, R.O.C.
7

DUMMY-C3
R177 TSLCX08MTC-U
DY RESISTOR RS480M MODE Title
7

1KR2
R108 TEST MODE NB-RS480M_VIDEO/ CLOCK
2

DY DY Size Document Number Rev


2

1 2 R205
33R2
1 2 R543
0R2-0
R107 NORMAL MODE A3
W37 SB
Date: Friday, April 15, 2005 Sheet 13 of 51
A B C D E
A B C D E

VSS89

VSS30
AG27

AG24

AG12
AG15

AG21

AG18
AD28

AD21
AC13

AC21

AC11

AC19

AD17

AD23
AD19
AD16
AD13
AD11

AC23

AC16

AD25

AD24

AC27
AD27
AD29
AE27
AE26

AK29
AK22

AK10

AA28

AB25
AB28
AF30
AJ30
W19

W15

W17
W13

W27
AG9

AG6
AG5
AD7

AD8

AC9

AD9
M16
M12
M14

M18
AK5
G28

G16

G17

G30

G11

G13

G14
G15

G12
G10
R27

U19

N17
U13

R13

R17

U17

N13

N15

R15

U15

D10

H14
H16
H10
H17

H11
D11

C28

R19

D12

D15
P16

V16

V18
P18

P12

P14

V12

V14

E15

E16

B30

Y27

Y23

Y24
F27
F24

T27

T18

T12

T16

T14

F15

F26
T24

F25

F16

D9

E9
U16F

VSS112
VSS111
VSS110
VSS109
VSS108
VSS107

VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73

VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45

VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
RS480M-U
4 4

PAR 6 OF 6
GROUND

VSSA68
VSSA67
VSSA66
VSSA65
VSSA64
VSSA63
VSSA62
VSSA61
VSSA60
VSSA59
VSSA58
VSSA57
VSSA56
VSSA55
VSSA54
VSSA53
VSSA52
VSSA51
VSSA50
VSSA49
VSSA48
VSSA47
VSSA46
VSSA45
VSSA44
VSSA43
VSSA42
VSSA41
VSSA40
VSSA39
VSSA38
VSSA37
VSSA36
VSSA35
VSSA34
VSSA33
VSSA32
VSSA31
VSSA30
VSSA29
VSSA28
VSSA27
VSSA26
VSSA25
VSSA24
VSSA23
VSSA22
VSSA21
VSSA20
VSSA19
VSSA18
VSSA17
VSSA16
VSSA15
VSSA14
VSSA13
VSSA12
VSSA11
VSSA10
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122

VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113

VSSA9
VSSA8
VSSA7
VSSA6
VSSA5
VSSA4
VSSA3
VSSA2
VSSA1
R23
V28
V25
U28
K25
E26
P28
P25
N28
H24
M27

L27
T23
K28
N19
J28
M24
H28
F28

T8
L5
E5
U6
U5
E6
F6
V7
M7
AJ1
L6
AG3
C2
H8
V6
M3
H7
K7
AD6
Y7
T7
AB8
K3
C4
D6
AD5
J3
R6
J5
C7
C9
AA5
P7
B4
G3
AB7
M5
AF3
AE3
F3
V8
AD3
C8
J6
P8
AB3
A2
AA3
C6
D3
K8
W3
C3
V3
Y8
M8
F8
C5
M6
T3
AA6
R3
F5
F7
N3
V5
AE5
R5
1D2V_S0

VSSA59

VSSA22
1

R502 R501 R504


0R5J-1 0R5J-1 0R5J-1 1D2V_HT0A_S0 1D2V_S0
3 U16E 3
SC22U10V6ZY-U RS480M-U PART 5 OF 6 VDDA_12_14 H9 VDDA12_13
2

N27 VDD_HT1 VDDA_12_1 AA7

1
U27 VDD_HT2 VDDA_12_2 G9
1

V27 U8 C151
VDD_HT3 VDDA_12_3 C574 C611 C610 C606 C658 C128 SC4D7U10V5ZY
G27 VDD_HT4 VDDA_12_4 N7

2
C115 C603 C602 C558 C650 C651 C653 V24 N8 VSSA22
VDD_HT5 VDDA_12_5
2

H27 U7 SC1U10V3KX SCD1U16V SCD1U16V SC22U10V6ZY-U


SCD1U16V SCD1U16V SCD1U16V VDD_HT6 VDDA_12_6 SCD1U16V SCD1U16V
K24 VDD_HT7 VDDA_12_7 F9
SCD1U16V SCD1U16V SCD1U16V AB24 AA8
VDD_HT8 VDDA_12_8 VDDA18_13
P27 VDD_HT9 VDDA_12_9 G8
J27 VDD_HT10 VDDA_12_10 G7

1
AA27 VDD_HT11 VDDA_12_11 J8
SCD1U16V K27 J7 1D8V_VDDA 1D8V_S0 C116
VDD_HT12 VDDA_12_12 VDDA12_13 L27 SC4D7U10V5ZY
P24 VDD_HT13 VDDA_12_13 B1

2
AB27 AG4 1 2 VSSA59
VDD_HT14 VDDA_18_1
1

DY AB23 R8 MLB-201209-11
VDD_HT15 VDDA_18_2

1
V23 VDD_HT16 VDDA_18_3 AC8
C556 C559 C557 C560 C599 C600 C601 G23 AC7 VDDHT30
VDD_HT17 VDDA_18_4
2

E23 AF6 C582 C575 C613 C614 C576


VDD_HT18 VDDA_18_5

1
SCD1U16V SCD1U16V SCD1U16V W23 AE6
SCD1U16V SCD1U16V SCD1U16V VDD_HT19 VDDA_18_6 SC1U10V3KX SCD1U16V SCD1U16V C148
K23 VDD_HT20 VDDA_18_7 L8
J23 W8 SCD1U16V SCD1U16V SC4D7U10V5ZY
VDD_HT21 VDDA_18_8

2
H23 W7 VSS30
VDD_HT22 VDDA_18_9
U23 VDD_HT23 VDDA_18_10 L7
2D5V_S3 AA23 R7
VDD_HT24 VDDA_18_11 VDDHT31
D23 VDD_HT25 VDDA_18_12 AF5
SC22U10V6ZY-U F23 AK2 VDDA18_13
VDD_HT26 VDDA_18_13

1
C23 VDD_HT27 VDD_CORE1 N16
2 C127 2
B23 VDD_HT28 VDD_CORE2 M13
1D2V_S0
1

DY DY DY DY DY DY DY DY A23 M15 SC4D7U10V5ZY


VDD_HT29 VDD_CORE3

2
VDDHT30 A29 W16 VSS89
C117 C545 C555 C539 C540 C547 C571 C546 VDDHT31 VDD_HT30 VDD_CORE4
AC30 VDD_HT31 VDD_CORE5 N18
2

VDD_CORE6 P19
SCD1U16V SCD1U16V SCD1U16V SCD1U16V AK23 N12 DY
VDD_MEM1 VDD_CORE7

1
SCD1U16V SCD1U16V SCD1U16V AK28 P15
VDD_MEM2 VDD_CORE8
AK11 VDD_MEM3 VDD_CORE9 N14
AK4 M17 C125 C605 C608 C567 C564 C609
VDD_MEM4 VDD_CORE10

2
AE30 VDD_MEM5 VDD_CORE11 T19
SCD1U16V AC14 G22 SC22U10V6ZY-U SCD1U16V SCD1U16V SCD1U16V
VDD_MEM6 VDD_CORE12 SCD1U16V SCD1U16V
AD12 VDD_MEM7 VDD_CORE13 R12
AC18 VDD_MEM8 VDD_CORE14 P13
1

DY DY DY DY DY DY DY DY AC20 VDD_MEM9 VDD_CORE15 R14


AD10 VDD_MEM10 VDD_CORE16 V19
C543 C569 C561 C562 C563 C570 C568 C573 AD14 R18
VDD_MEM11 VDD_CORE17
2

AD15 VDD_MEM12 VDD_CORE18 U16


SCD1U16V SCD1U16V SCD1U16V SCD1U16V AD20 U12
VDD_MEM13 VDD_CORE19
1

1
SCD1U16V SCD1U16V SCD1U16V AC10 T13 DY
VDD_MEM14 VDD_CORE20
AD18 VDD_MEM15 VDD_CORE21 U14
AC12 T17 C139 C654 C656 C652 C612
VDD_MEM16 VDD_CORE22
2

2
AD22 VDD_MEM17 VDD_CORE23 U18
1D8V_S0 AC22 E22 SC22U10V6ZY-U SCD1U16V SCD1U16V
VDD_MEM18 VDD_CORE24 SCD1U16V SCD1U16V
AH15 VDD_MEMCK VDD_CORE25 R16
L25 SCD1U16V V13
1D8VDD_S0 VDD_CORE26
1 2 H15 VDD_18_1 VDD_CORE27 T15
BLM11A121S AC17 P17
POWER

VDD_18_2 VDD_CORE28
1

AC15 VDD_18_3 VDD_CORE29 W18


1

1 VDD_CORE30 D22 1
R487 R488 C566 C565 C607 C541 1D2V_S0 B21 W12
VDD_CORE47 VDD_CORE31
2

0R2-0 0R2-0 C21 V15


SCD1U16V SC1U10V3KX VDD_CORE46 VDD_CORE32
3D3V_S0
DY DY
SCD1U16V
A22
B22
VDD_CORE45
VDD_CORE44
VDD_CORE33
VDD_CORE34
W14
V17 Wistron Corporation
2

C22 M19 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


VDD_CORE43 VDD_CORE35
DY DY F21 VDD_CORE42 VDD_CORE36 H22 Taipei Hsien 221, Taiwan, R.O.C.
3

F22 VDD_CORE41 VDD_CORE37 H21


1 2 1 2 E21 D21 Title
VDD_CORE40 VDD_CORE38
G21 VDD_CORE39 NB-RS480M_POWER
U72 U73 Size Document Number Rev
BAV99-1 BAV99-1 A3
W37 SB
Date: Monday, March 14, 2005 Sheet 14 of 51
A B C D E
A B C D E

DY
1 2 R483 MXM_BLUE
150R2F
DY
1 2 R499 MXM_GREEN
150R2F
DY 17 MXM_TXBOUT0+ MXM_TXACLK- 17
1 2 R497 MXM_RED 17 MXM_TXBOUT0- MXM_TXACLK+ 17
4 150R2F
17 MXM_TXBOUT1+ MXM_TXAOUT2- 17 4
DY 17 MXM_TXBOUT1- MXM_TXAOUT2+ 17
1 2 R500 MXM_TV_DACA 17 MXM_TXBOUT2+ MXM_TXAOUT1- 17
150R2F
17 MXM_TXBOUT2- MXM_TXAOUT1+ 17
DY MXM_TXAOUT0- 17
1 2 R496 MXM_TV_LUMA MXM_TXAOUT0+ 17
150R2F
17 MXM_TXBCLK+
DY 17 MXM_TXBCLK-
12 PEG_TXP[15..0] 1 2 R498 MXM_TV_CRMA 16 MXM_BLUE
150R2F
16 MXM_GREEN
12 PEG_TXN[15..0] 16 MXM_RED

12 PEG_RXP[15..0]
Put near graphic connector MXM_TV_DACA
16 MXM_TV_LUMA
12 PEG_RXN[15..0] 16 MXM_TV_CRMA DY
5V_S0 1 2 R478 EDID_DAT 17
TPAD30 0R2-0
TP78 34 MXM_CD
1 2 R477 EDID_CLK 17

SMBD_GMODULE
SMBC_GMODULE
PM_SLP_S3#1 2 R529 MXM_PW EOK DY 0R2-0
0R2-0 DY MXM_LCDVDD_ON 17
LBKLT_CRTL 17

PEG_TXN15

PEG_TXN14

PEG_TXN13

PEG_TXN12

PEG_TXN11

PEG_TXN10
PEG_TXP15

PEG_TXP14

PEG_TXP13

PEG_TXP12

PEG_TXP11

PEG_TXP10
TPAD30 TPAD30 TPAD30 TPAD30

PEG_TXN9

PEG_TXN8

PEG_TXN7

PEG_TXN6

PEG_TXN5

PEG_TXN4

PEG_TXN3

PEG_TXN2

PEG_TXN1

PEG_TXN0
PEG_TXP9

PEG_TXP8

PEG_TXP7

PEG_TXP6

PEG_TXP5

PEG_TXP4

PEG_TXP3

PEG_TXP2

PEG_TXP1

PEG_TXP0
TP74 TP73 TP71 TP72 MXM_BL_ON 34

1D8V_S0 2D5V_S0
3D3V_S0

3 3

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
10
12
14
16
18
20
22
24

26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
2

4
6
8

CN6

DY
231
MH1
1

3
5
7
9
11
13
15
17
19
21
23

25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
MH2
232
SPD-CONN230A-1
PEG_RXN15

PEG_RXN14

PEG_RXN13

PEG_RXN12

PEG_RXN11

PEG_RXN10
PEG_RXP15

PEG_RXP14

PEG_RXP13

PEG_RXP12

PEG_RXP11

PEG_RXP10

PEG_RXN9

PEG_RXN8

PEG_RXN7

PEG_RXN6

PEG_RXN5

PEG_RXN4

PEG_RXN3

PEG_RXN2

PEG_RXN1

PEG_RXN0
PEG_RXP9

PEG_RXP8

PEG_RXP7

PEG_RXP6

PEG_RXP5

PEG_RXP4

PEG_RXP3

PEG_RXP2

PEG_RXP1

PEG_RXP0
DCBATOUT

TP75
TPAD30
G792_DXP2 23
G792_DXN2 23

2
3 CLK_PCIE_PEG# R482
3 CLK_PCIE_PEG
0R2-0
13,34 AG_RST# DY
1 2 R493 0R2-0 DY
23,34 SMBD_KBC

1
2 5V_S0 2D5V_S0 R495 0R2-0 2
23,34 SMBC_KBC 1 2 DY
1 2 R494 0R2-0 DY
23 OVERT#
16 MXM_HSYNC
1

C675 C524 16 MXM_VSYNC


SCD1U16V SCD1U16V 16 MXM_DDCCLK
16 MXM_DDCDATA
2

3 2 18,21,34,38,39,45 PM_SLP_S3#
1D8V_S0 3D3V_S0
Q35
2N7002
G
1

DY
1

C673 C674
SCD1U16V SCD1U16V
2

3D3V_S0
3D3V_AUX_S5

3D3V_S0 DY
1

1 2 OVERT# WC# -- H: Write disable


R471 R469 R466 R465 L: Write enable
4K7R2 R492 DUMMY-R2
1

10KR2 10KR2 10KR2 DY


C508 C507 DY 3D3V_S0
2

SCD1U16V SCD1U16V DY DY U71


2

1 E0 VCC 8
W C# 2 7 W C#
E1 WC# SMBC_GMODULE
1 3 E2 SCL 6 1
DCBATOUT 4 5 SMBD_GMODULE
VSS SDA
1

R470 R467 R468 R472


DY
M24C02-W
Wistron Corporation
1

(E2,E1,E0) should be 100KR2 10KR2 10KR2 10KR2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
C671 C672 (1,1,0) when use Taipei Hsien 221, Taiwan, R.O.C.
2

SCD1U16V SCD1U16V DY DY DY DY
extral VGA card
2

C506 Title
SCD1U16V
ATI M22_MXM_ CONNECTOR
2

DY
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 15 of 51
A B C D E
A B C D E

Layout Note:

CRT I/F & CONNECTOR


5V_S0
* Must be a ground return path between this ground and the ground on
the VGA connector.

1
D36
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT RB751V-40-U 5V_CRT_S0

Layout Note: CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. F3

2
Place these resistors 1 2
close to the CRT-out
Ferrite bead impedance: 47ohm@100MHz

1
connector FUSE-1A6V-GP
L3
C451
4 CRT_RED 1 2 CRT_R SCD01U16V2KX 4

2
BLM18BB470SN1-GP
L1
CRT_GREEN 1 2 CRT_G
FOX-CONN15-2-U

1
R40 R43 16
BLM18BB470SN1-GP 2K2R2 2K2R2
L2
MH2
CRT_BLUE 1 2 CRT_B

2
5

1
CLK_DDC1_5 15
BLM18BB470SN1-GP
10
C66 C56 C57 4

2
C68 C67 C58 JVGA_VS 14
DY DY DY 9
CRT_B 3
SC3P50V3KN SC3P50V3KN SC3P50V3CN SC3P50V3CN JVGA_HS 13
8
SC3P50V3KN SC3P50V3CN CRT_G 2
DAT_DDC1_5 12
Hsync & Vsync level shift D12 BAV99-2
2
7

5V_S0 5V_S0 CRT_R 1


CRT_R 3 11
6
1

2
C39 MH1
3 C46 C59 3
SCD1U16V SC100P SC100P C45 C44 17

1
D10 BAV99-2
2
SC22P50V2JN-1 SC22P50V2JN-1 CRT1
14

DY R534 DUMMY-R2 CRT_G 3

1 2 HSYNC_4 2 3 HSYNC_5 1 2 R39 JVGA_HS 1


15 MXM_HSYNC 39R2J
1 2 2D5V_S0
13 GMCH_HSYNC R532 0R2-0 U6A TSAHCT125
14

7
4

D11 BAV99-2

1
DY R535 DUMMY-R2 2
1 2 VSYNC_4 5 6 VSYNC_5 1 2 R38 JVGA_VS R44
15 MXM_VSYNC 39R2J CRT_B 3D3V_S0
3 0R0402-PAD
13 GMCH_VSYNC 1
R533
2
0R2-0 U6B TSAHCT125 1
DDC_CLK & DATA level shift R45
7

2
2 1

1
D8 BAV99-2
SRN0-1-U R46 R47 0R0402-PAD
RN12 2
CRT_RED 5V_S0 2K2R2 2K2R2
13 MAIN_CRT_R 1 8
13 MAIN_CRT_G 2 7 CRT_GREEN HSYNC_5 3

1
3 6 CRT_BLUE DY R540 DUMMY-R2 2N7002

G
13 MAIN_CRT_B

2
4 5 1 Q7
1 2 2 3 DAT_DDC1_5
15 MXM_DDCDATA
1 8

D
15 MXM_BLUE 2 7 13 VGA_DAT_DDC_3 1 2
3 6 D9 BAV99-2 R539 0R2-0
2 15 MXM_GREEN 2N7002 2
15 MXM_RED 4 5 2

1
Q6

G
RN11 SRN0-1-U VSYNC_5 3 DY R538 DUMMY-R2
1 2 2 3 CLK_DDC1_5
DY 15 MXM_DDCCLK
1

D
13 VGA_CLK_DDC_3 1 2
R537 0R2-0

5V @ ext. CRT side

3D3V_S0
MINDIN4-29
SC33P C406
1 2 D34 BAV99-2
6 GND 2
DY 0R2-0 R174 IND-1D2UH L18 2 GND

1
1 2 1 2 TV_CRMA 4 TV_CRMA 3
15 MXM_TV_CRMA CRMA C392
1

0R2-0 R175 C409 C404 3 1 SCD1U16V


LUMA

2
13 RS480_TV_CRMA 1 2 1 GND
SC150P SC270P50V 5 GND
2

SC33P C407 CN5 3D3V_S0


<Variant Name>
1 1 2 1
D32 BAV99-2
0R2-0 R172 IND-1D2UH L19
15 MXM_TV_LUMA
DY
1 2 1 2 TV_LUMA
2
Wistron Corporation

1
TV_LUMA 3 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

0R2-0 R173 C408 C405 C434 Taipei Hsien 221, Taiwan, R.O.C.
1 2 1 SCD1U16V
13 RS480_TV_LUMA

2
SC150P SC270P50V Title
2

CRT/TV Connector
Size Document Number Rev
A3
W37 SB
Date: Friday, April 15, 2005 Sheet 16 of 51

A B C D E
A B C D E

1
R848
2
LED / INVERTER INTERFACE
0R2-0

LCD/INV CONN
3D3V_S0
U58
5 VCC A 1 W LANONLED_KBC 34
TOP VIEW
Q21 PDTC124EU
B 2 802.11_ACT 31
4 W LANONLED# 3 2 40 4

1
R1 1 W LANONLED 4 3
Y GND
1

C353
2
R2 NC7SZ32-1
R388
100KR2
R387
100KR2 DCBATOUT 1
LCD CONN 39
5V_S0
SC1000P50V DY DY DY Layout 60 mil
2

2
5V_S0
3D3V_S0

1
U59A DCBATOUT

14
R389 LED3 1 C388 C389 C387 LCD1

2
1 2 1 2 3 41 42
2 PW R_LED# 34 MH1 45
1

1
150R2 LED-B-53 1 2 DY
C355 TSAHCT08-U 3D3V_S0 R352 SC10U35V0ZY-U SCD1U25V5KX 1 2 R10 LBKLT_CRTL 15

7
SC1000P50V 10KR2 10KR2 SC1000P50V3KX 3 4 0R2-0
2

U49A R649 5 6

14
CDROM_LED# 25 34 FPBACK 7 8 BRIGHTNESS_PW M 1 2 R9 BRIGHTNESS 34

2
1 9 10 0R2-0
MEDIA_LED# 3 11 12 EDID_CLK 15
3D3V_S0
2 HDLED# 1 R339 2 1KR2 HD_LED# 25 LVDS_8 13 14 EDID_DAT 15
U59B LVDS_7 15 16 LVDS_16
14

1
TSLCX08-U 1 2 SATA_LED# 19 17 18 LVDS_15 RN1

7
R392 LED6 4 LVDS_6 19 20 1 4 VGA_SMB_CLK 13
1 2 1 2 6 S1N4148-U D47 C809 LVDS_5 21 22 LVDS_14 2 3 VGA_SMB_DAT 13

2
LVDS_13
5 CAP_LED# 34 SB 23 24
1

150R2 LED-B-53 SC1U10V3KX LVDS_4 25 26 SRN33-2-U2


C358 TSAHCT08-U LVDS_3 27 28 LVDS_12
7

SC1000P50V LVDS_11
SB 29 30
2

LVDS_2 31 32
3 LVDS_1 33 34 LVDS_10 3
3D3V_S5 LCDVDD_S0 35 36 LVDS_9
37 38 BRIGHTNESS_PW M
R391 LED5 39 40 LCDVDD_S0
U59C 1 2 1 2
14

CHG_LED# 34

1
43 44 FPBACK
R393 LED7 13 150R2 LED-O-10 MH2 46

1
1 2 1 2 11 C11 C10 C398

1
12 NUM_LED# 34 C357 AMP-CONN40-2

PWM
1

150R2 LED-B-53 SC1000P50V SC10U10V5ZY-L

2
C359 TSAHCT08-U SCD1U16V C9 C397
7

2
SC1000P50V 3D3V_S5 SCD1U16V
2

R390 LED4
1 2 1 2 STBY_LED# STBY_LED# 34 SCD1U16V SC1000P50V

150R2 LED-O-10

1
U59D
14

C356
R386 LED2 10 SC1000P50V

2
1 2 1 2 8 3D3V_S0
9 MEDIA_LED#
1

150R2 LED-B-53
C354 TSAHCT08-U R385 LED1
7

SC1000P50V 1 2 1 2 W LANONLED#
2

150R2 LED-O-10

2 2

LVDS_8 1
RN60 SRN0-1-U
8 GMCH_TXBOUT0- 13 LVDS_5
DY
1
RN62 SRN0-1-U
8 MXM_TXBOUT1+ 15
LCD POWER
LVDS_7
LVDS_6
2 7 GMCH_TXBOUT0+ 13 LVDS_6
LVDS_7
2 7 MXM_TXBOUT1- 15 Layout 40 mil
3 6 GMCH_TXBOUT1- 13 3 6 MXM_TXBOUT0+ 15
LVDS_5 4 5 LVDS_8 4 5 LCDVDD_S0 3D3V_S0
GMCH_TXBOUT1+ 13 MXM_TXBOUT0- 15

RN51 SRN0-1-U DY RN53 SRN0-1-U


LVDS_16 1 8 LVDS_13 1 8 DY U61
LVDS_15 GMCH_TXAOUT0- 13 LVDS_14 MXM_TXAOUT1+ 15
2 7 GMCH_TXAOUT0+ 13 2 7 MXM_TXAOUT1- 15 15 MXM_LCDVDD_ON 1 2 R441
LVDS_14 3 6 LVDS_15 3 6 1KR3 1 6
LVDS_13 GMCH_TXAOUT1- 13 LVDS_16 MXM_TXAOUT0+ 15 OUT IN
4 5 GMCH_TXAOUT1+ 13 4 5 MXM_TXAOUT0- 15 2 GND GND 5
13 LCD_VDD_ON 1 2 R442 LCDVDD_ON_1 3 ON/OFF# IN 4
1KR3

1
RN59 SRN0-1-U DY RN61 SRN0-1-U
LVDS_4 1 8 GMCH_TXBOUT2- 13 LVDS_1 1 8 MXM_TXBCLK+ 15 C383
LVDS_3 2 7 LVDS_2 2 7 C391 C390 AAT4280IGU-3-T1 SC1U10V3KX
GMCH_TXBOUT2+ 13 MXM_TXBCLK- 15

2
LVDS_2 3 6 GMCH_TXBCLK- 13 LVDS_3 3 6 MXM_TXBOUT2+ 15
LVDS_1 4 5 GMCH_TXBCLK+ 13 LVDS_4 4 5 MXM_TXBOUT2- 15
SC1U10V3KX SCD1U
RN52 SRN0-1-U DY RN54 SRN0-1-U
LVDS_12 1 8 LVDS_9 1 8
LVDS_11 GMCH_TXAOUT2- 13 LVDS_10 MXM_TXACLK+ 15
2 7 GMCH_TXAOUT2+ 13 2 7 MXM_TXACLK- 15
1 LVDS_10 3 6 LVDS_11 3 6 1
LVDS_9 GMCH_TXACLK- 13 LVDS_12 MXM_TXAOUT2+ 15
4 5 GMCH_TXACLK+ 13 4 5 MXM_TXAOUT2- 15

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Place them as close to LCD as Taipei Hsien 221, Taiwan, R.O.C.
possible
Title
INV / LCD
Size Document Number Rev
A3 SB
W37
Date: W ednesday, March 30, 2005 Sheet 17 of 51
A B C D E
A B C D E

3D3V_S0
32K suspend clock output 5V_S5
U40 DY
PCI_REQ#5 5 4 U43
PCI_GNT#5 SDA GND
6 SCL A2 3 15,21,34,38,39,45 PM_SLP_S3# 1 A VCC 5

1
R270 1 2 NB_EEPROM_W P 7 2 2 R338
1KR2 WP A1 R269 22 RTC_CLK B
DY 8 VCC A0 1 3 GND Y 4 1 2 G792_32K 23
8K2R2
1 2 C258 NC7SZ08-1 10R3
SCD1U16V AT24C04N-10SI U34A

2
DY
A_RST# AH8
SB400 SB PCICLK0 L4
L3 PCI_CLK1_R 22R2 1 2 R604 CLK33_CBUS
A_RST# PCICLK1
Part 1 of 4 PCICLK2 L2 PCI_CLK2_R 22R2 1 2 R608 CLK33_LAN
4 L27 L1 PCI_CLK3_R 22R2 1 2 R607 CLK33_MINI 4
C276 3 SBSRC_CLK PCIE_RCLKP PCICLK3
M27 M4 PCI_CLK4_R 22R2 1 2 R610 CLK33_KBC
3 SBSRC_CLK# PCIE_RCLKN PCICLK4 PCI_CLK5_R 22R2 R605 PCLK_FW H
1 2 PCICLK5 M3 1 2
SCD01U16V2KX C196 1 2 TX0P M30 M2 PCI_CLK6_R 22R2 1 2 R615 CLK33_LPCROM
12 PCIE_RX0P_SB SCD01U16V2KX PCIE_TX0P PCICLK6
12 PCIE_RX0N_SB 1 2 C197 TX0N N30 PCIE_TX0N PCICLK7 M1 PCI_CLK7_R 22R2 1 2 R614 PCI_CLK7 22 CLK33_CBUS CLK33_CBUS 26

PCI CLKS
SC3D3P50V SCD01U16V2KX C194 1 2 TX1P K30 N4 PCI_CLK8_R 22R2 1 2 R612 PCI_CLK8 22 CLK33_LAN CLK33_LAN 22,29
12 PCIE_RX1P_SB PCIE_TX1P PCICLK8
3

1
SCD01U16V2KX 1 2 C195 TX1N L30 N3 PCI_CLK9_R 22R2 1 2 R618 CLK33_MINI CLK33_MINI 22,31
X6 R292 R294 12 PCIE_RX1N_SB PCIE_TX1N PCICLK9 PCI_CLK9_FB
H30 PCIE_TX2P PCICLK_FB N2 1 2 C772 DY CLK33_KBC CLK33_KBC 22,34
20MR3 20MR3 J30 PCLK_FW H PCLK_FW H 22,37
XTAL-32D768K-4P PCIE_TX2N PCIRST# CLK33_LPCROM
F30 PCIE_TX3P PCIRST# AJ7 PCI_AD[31..0] 22,26,29,31 CLK33_LPCROM 22
G30 W3 PCI_AD0 SC100P50V2JN-U
PCIE_TX3N AD0/ROMA18
2

Y2 PCI_AD1
AD1/ROMA17
2

32K_X1 M29 W4 PCI_AD2


C275 12 PCIE_TX0P_SB PCIE_RX0P AD2/ROMA16
N29 Y3 PCI_AD3
32K_X2 12 PCIE_TX0N_SB PCIE_RX0N AD3/ROMA15 PCI_AD4
1 2 12 PCIE_TX1P_SB M28 PCIE_RX1P AD4/ROMA14 V1
N28 Y4 PCI_AD5
12 PCIE_TX1N_SB PCIE_RX1N AD5/ROMA13

1
J29 V2 PCI_AD6
SC3D3P50V PCIE_RX2P AD6/ROMA12
MAIN SOURCE: 82.30001.031 EPSON K29
J28
PCIE_RX2N AD7/ROMA11 W2
AA4
PCI_AD7
PCI_AD8
C770
DUMMY-C2
C779
DUMMY-C2
C771
DUMMY-C2
C780
DUMMY-C2
C778
DUMMY-C2
C773
DUMMY-C2
PCIE_RX3P AD8/ROMA9
1D8V_S0
PCIE_PVDD 2ND SOURCE: 82.30001.341 KDS K28 PCIE_RX3N AD9/ROMA8 V4 PCI_AD9 DY DY DY DY DY DY
AA3 PCI_AD10
L9 150R2F 1 AD10/ROMA7
2 R546 PCIE_CALRP G27 PCIE_CALRP AD11/ROMA6 U1 PCI_AD11

2
1 2 150R2F 1 2 R567 PCIE_CALRN H27 AA2 PCI_AD12
PCIE_VDDR PCIE_CALRN AD12/ROMA5 3D3V_S0
MLB-201209-11 U2 PCI_AD13
AD13/ROMA4
1

PCI EXPRESS INTERFACE


4K12R2F 1 2 R547 PCIE_CALI G28 AA1 PCI_AD14
PCIE_CALI AD14/ROMA3 PCI_AD15 RN23 RN75 R621
AD15/ROMA2 U3
C168 C198 C199 A11, A12 4K53 1% PCIE_PVDD R30 T4 PCI_AD16 SRN8K2-1 SRN8K2-1 8K2R2
PCIE_PVDD AD16/ROMD0
2

A21, A22 5K5 1% AC1 PCI_AD17


AD17/ROMD1

8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5
SC10U10V5ZY SC1U10V3KX SCD1U16V A23 4K12 1% F26 R2 PCI_AD18
PA_IXP400AC10.PDF PCIE_VDDR_1 AD18/ROMD2

1
3 R29 AD4 PCI_AD19 RN76 RN77 3
PCIE_VDDR_2 AD19/ROMD3 PCI_AD20 SRN8K2-1 SRN8K2-1 3D3V_S0
G26 PCIE_VDDR_3 AD20/ROMD4 R3
P26 AD3 PCI_AD21
PCIE_VDDR_4 AD21/ROMD5 PCI_AD22
K26 PCIE_VDDR_5 AD22/ROMD6 R4
1D8V_S0 PCIE_VDDR L26 AD2 PCI_AD23 RN21
PCIE_VDDR_6 AD23/ROMD7

1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4
P28 P2 PCI_AD24 LPC_LAD0 1 8
L30 PCIE_VDDR_7 AD24
SC22U10V6ZY-U N26 AE3 PCI_AD25 LPC_LAD2 2 7
PCIE_VDDR_8 AD25 PCI_AD26 LPC_LAD1 3
1 2 P27 PCIE_VDDR_9 AD26 P3 6
AE2 PCI_AD27 LPC_LAD3 4 5
AD27
1

1
DY DY H28 P4 PCI_AD28
0R0603-PAD PCIE_VSS_1 AD28 PCI_AD29
F29 AF2 SRN100K
C686 C701 C703 C706 C704 C702 C705 C698 C700 PCIE_VSS_2 AD29 PCI_AD30
H29 PCIE_VSS_3 AD30 N1
2

2
H26 AF1 PCI_AD31
SCD1U16V SCD1U16V SCD1U16V SCD1U16V PCIE_VSS_4 AD31
F27 PCIE_VSS_5 CBE0#/ROMA10 V3 PCI_C/BE#0 26,29,31
SCD1U16V SCD1U16V SCD1U16V SCD1U16V G29 AB4
PCIE_VSS_6 CBE1#/ROMA1 PCI_C/BE#1 26,29,31

PCI INTERFACE
L29 PCIE_VSS_7 CBE2#/ROMWE# AC2 PCI_C/BE#2 26,29,31
J26 PCIE_VSS_8 CBE3# AE4 PCI_C/BE#3 26,29,31
L28 PCIE_VSS_9 FRAME# T3 PCI_FRAME# 26,29,31
J27 PCIE_VSS_10 DEVSEL#/ROMA0 AC4 PCI_DEVSEL# 26,29,31
RP1 3D3V_S0 N27 AC3 PCI_IRDY# 26,29,31
INT_PIRQE# PCIE_VSS_11 IRDY#
1 10 M26 PCIE_VSS_12 TRDY#/ROMOE# T2 PCI_TRDY# 26,29,31
INT_PIRQF# 2 9 INT_PIRQH# K27 U4
PCIE_VSS_13 PAR/ROMA19 PCI_PAR 26,29,31
INT_PIRQC# 3 8 INT_PIRQG# P29 T1
PCIE_VSS_14 STOP# PCI_STOP# 26,29,31
INT_PIRQB# 4 7 INT_PIRQD# P30 AB2
PCIE_VSS_15 PERR# PCI_PERR# 26,29,31
5 6 INT_PIRQA# AB3
3D3V_S0 SERR# PCI_SERR# 26,29,31
TPAD30 TP47 SB_CPUSTP# AJ8 AF4 PCI_REQ#0 26
TPAD30 TP49 SB_PCISTP# CPU_STP#/DPSLP# REQ0#
SRP10K AK7 AF3 PCI_REQ#1 31
TPAD30 TP96 INT_PIRQA# PCI_STP# REQ1#
AG5 INTA# REQ2# AG2 PCI_REQ#2 29
TPAD30 TP98 INT_PIRQB# AH5 AG3 PCI_REQ#3
2 TPAD30 TP48 INT_PIRQC# INTB# REQ3#/PDMA_REQ0# PCI_REQ#4 2
AJ5 INTC# REQ4#/PLL_BP33/PDMA_REQ1# AH1
5V_S0 TPAD30 TP95 INT_PIRQD# AH6 AH2 PCI_REQ#5
INT_PIRQE# INTD# REQ5#/GPIO13 PCI_REQ#6
26,31 INT_PIRQE# AJ6 INTE#/GPIO33 REQ6#/GPIO31 AH3
U37 INT_PIRQF# AK6 AJ2 PCI_GNT#0 26
26 INT_PIRQF# INTF#/GPIO34 GNT0#
A_RST# 1 5 INT_PIRQG# AG7 AK2 PCI_GNT#1 31
A VCC 26 INT_PIRQG# INTG#/GPIO35 GNT1#
2 R268 INT_PIRQH# AH7 AJ3 PCI_GNT#2 29
B 29 INT_PIRQH# INTH#/GPIO36 GNT2#
3 4 RSTDRV#_R 1 2 RSTDRV#_5 25 AK3 PCI_GNT#3 TP55 TPAD30
GND Y GNT3#/PLL_BP66/PDMA_GNT0# PCI_GNT#4 TP97 TPAD30
GNT4#/PLL_BP50/PDMA_GNT1# AG4
NC7SZ32-U 33R2 AH4 PCI_GNT#5 TP50 TPAD30
GNT5#/GPIO14 PCI_GNT#6 TP51 TPAD30 PCI_GNT#3 10KR2 R658
GNT6#/GPIO32 AJ4 1 2
32K_X1 B2 AG1 PCI_GNT#4 10KR2 1 2 R657
X1 CLKRUN# PM_CLKRUN# 29,34
AB1 PCI_LOCK# PCI_GNT#5 10KR2 1 DY 2 R660
LOCK#
PCIRST# 3V to 5V level shift for HDD & CDROM PCI_GNT#6 10KR2 1 2 R659
32K_X2 B1 LPC_LAD[0..3] 34,37
XTAL

X2 PCI_REQ#5 10KR2 1 DY 2 R661


AG25 LPC_LAD0 PCI_REQ#6 10KR2 1 DY 2 R662
LAD0 LPC_LAD1
LAD1 AH25
3D3V_S0 TPAD30 TP38 SB_C29 C29 AJ25 LPC_LAD2
CPU_PG LAD2 3D3V_S0
SB400 asserts PLTRST# to reset TPAD30 TP40 SB_A28 A28 INTR/LINT0 LAD3 AH24 LPC_LAD3 Pull up 100k to 3D3V_S0
TPAD30 TP86 H_NMI C28 AG24
devices on the platform. NMI/LINT1 LFRAME# LPC_LFRAME# 34,37
LPC

U49B FW H_INIT# B29 AH26 LPC_LDRQ0#


14

37 FW H_INIT# TPAD30 TP39 SB_D29 INIT# LDRQ0# LPC_LDRQ1# P_SERIRQ 10KR2


D29 SMI# LDRQ1# AG26 1 2 R569
4 R353 E4
PLT_RST#_R1 6,13 LDT_STP# TPAD30 TP37 SB_B30 SLP#/LDT_STP# LPC_LDRQ1# 10KR2
6 2 LPC_RST# 13,37 B30 AK27 P_SERIRQ 26,31,34,37 1 2 R568
CPU

A_RST# TPAD30 TP89 H_A20M# IGNNE# SERIRQ


5 F28 A20M#
33R2 TPAD30 TP87 H_FERR# E28 RTC_CLK 22 LPC_LDRQ0# 10KR2 1 2 R570
TSLCX08-U FERR#
13 ALLOW _LDTSTOP E29 STPCLK#/ALLOW_LDTSTP
7

6 SB_CPUPW RGD TPAD30 TP88 D25 LDT_PG/SSMUXSEL/GPIO0 RTCCLK C2 AUTO_ON# 22


1 H_DPRSLP# E27 F3 1
DPRSLPVR RTC_IRQ#/ACPWR_STRAP RTC_AUX_S5
13 BMREQ# D27 BMREQ#
3D3V_S0
1

6,13 LDT_RST# D28 LDT_RST# VBAT A2 1 2 R291


R356 1KR2
A1
Wistron Corporation
RTC

RTC_GND 3D3V_AUX_S5
8K2R2 1 C274
U49C DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
14

CHS-215SB400 1 2 Taipei Hsien 221, Taiwan, R.O.C.


2

9 CON3-4 RB751V-40-U D22


8 PCI_RST# 1 2 R355 PCIRST_BUF# 26,27,29,31,34 Title
PCIRST# 10 33R2
1 SCD1U16V SB400 PCI/CPU/LPC/RTC (1 of 5)
TSLCX08-U SB 2
3
1
RB751V-40-U
2
D23 Size Document Number Rev
7

Secondary PCI Bus reset signal.


RTC1
A3
W37 SB
Date: Friday, April 15, 2005 Sheet 18 of 51
A B C D E
A B C D E

PIDE_D[15..0] 25

SIDE_D[15..0] 25

U34B
4 4
25 SATA_TXP0 1
1
2 C234
2 C213
SCD01U50V3KX
SCD01U50V3KX
AK22
AJ22
SATA_TX0+ SB400 SB AD30 PDRDY PIOR# 1
RN18
8
SRN0-1-U
25 SATA_TXN0 SATA_TX0- PIDE_IORDY PIDE_IOR# 25
Part 2 of 4 PIDE_IRQ AE28 IRQ14R PIOW # 2 7 PIDE_IOW # 25
25 SATA_RXN0 1 2 C775 SCD01U50V3KX AK21 SATA_RX0- PIDE_A0 AD27 PDA_0 PD14 3 6 PIDE_D14
25 SATA_RXP0 1 2 C776 SCD01U50V3KX AJ21 SATA_RX0+ PIDE_A1 AC27 PDA_1 PD0 4 5 PIDE_D0
AD28 PDA_2
PIDE_A2 PDACK# SRN0-1-U
AK19 AD29 PDACK# 22 RN19
SATA_TX1+ PIDE_DACK# PDREQ PD13
AJ19 SATA_TX1- PIDE_DRQ AE27 1 8 PIDE_D13
AE30 PIOR# PD2 2 7 PIDE_D2
PIDE_IOR# PIOW # PD3 PIDE_D3
AK18 SATA_RX1- PIDE_IOW# AE29 3 6
AJ18 AC28 PDCS0# PD11 4 5 PIDE_D11
SATA_RX1+ PIDE_CS1# PDCS1#
PIDE_CS3# AC29
SATA_X1 AK14 RN69 SRN0-1-U
SATA_TX2+ PD0 PD7 PIDE_D7
AJ14 SATA_TX2- PIDE_D0 AF29 1 8

PRIMARY ATA 66/100


AF27 PD1 PD4 2 7 PIDE_D4
R249 10MR3F PIDE_D1 PD2 PD8 PIDE_D8
AK13 SATA_RX2- PIDE_D2 AG29 3 6

SERIAL ATA
1 2 SATA_X2 AJ13 AH30 PD3 PD12 4 5 PIDE_D12
SATA_RX2+ PIDE_D3 PD4
PIDE_D4 AH28
X4 AK11 AK29 PD5 RN20 SRN0-1-U
SATA_TX3+ PIDE_D5 PD6 PD10
1 2 AJ11 SATA_TX3- PIDE_D6 AK28 1 8 PIDE_D10
AH27 PD7 PD5 2 7 PIDE_D5
PIDE_D7
1

XTAL-25MHZ-9 AK10 AG27 PD8 PD9 3 6 PIDE_D9


R248 SATA_RX3- PIDE_D8 PD9 PD6 PIDE_D6
AJ10 SATA_RX3+ PIDE_D9 AJ28 4 5
1

0R2-0 1KR3F AJ29 PD10


C232 C233 R267 1 PIDE_D10 PD11 RN68 SRN0-1-U
DY 2 AJ15 SATA_CAL PIDE_D11 AH29
SC27P50V2JN SC27P50V2JN AG28 PD12 PD1 1 8 PIDE_D1
PIDE_D12
2

SATA_X1 AJ16 AG30 PD13 PD15 2 7 PIDE_D15


SATA_X1 PIDE_D13 PD14 PDREQ
PIDE_D14 AF30 3 6 PIDE_DREQ 25
3 SATA_X2 AK16 AF28 PD15 IRQ14R 4 5 3
SATA_X2 PIDE_D15 PIDE_IRQ14 25
17 SATA_LED# AK8 V29 SDRDY RN67 SRN0-1-U
SATA_ACT# SIDE_IORDY IRQ15R PDA_0
SIDE_IRQ T27 1 8 PIDE_A0 25
AH15 T28 SDA_0 PDA_2 2 7 PIDE_A2 25
1D8V_PLLVDD_ATA PLLVDD_SATA SIDE_A0
U29 SDA_1 PDA_1 3 6 PIDE_A1 25
SIDE_A1 SDA_2 PDCS0#
1D8V_XTLVDD_ATA AH16 XTLVDD_SATA SIDE_A2 T29 4 5 PIDE_CS#0 25
V30 SDACK#
SIDE_DACK# SDREQ SRN0-1-U
1D8V_SATA_S0 AG10 U28 RN17
AVDD_SATA_1 SIDE_DRQ SIOR#
AG14 AVDD_SATA_2 SIDE_IOR# W29 1 8
AH12 W30 SIOW # PDCS1# 2 7 PIDE_CS#1 25
AVDD_SATA_3 SIDE_IOW# SDCS#0 PDRDY
AG12 AVDD_SATA_4 SIDE_CS1# R27 3 6 PIDE_IORDY 25
AG18 R28 SDCS#1 PDACK# 4 5 PIDE_DACK# 25
AVDD_SATA_5 SIDE_CS3#
AG21 AVDD_SATA_6
AH18 V28 SD0
AVDD_SATA_7 SIDE_D0/GPIO15 SD1
AG20 AVDD_SATA_8 SIDE_D1/GPIO16 W28
Y30 SD2 RN16 SRN0-1-U
SIDE_D2/GPIO17
1

AG9 AA30 SD3 SD11 1 8 SIDE_D11


AVSS_SATA_1 SIDE_D3/GPIO18

SECONDARY ATA 66/100


R578 R577 R549 AF10 Y28 SD4 SD3 2 7 SIDE_D3
0R2-0 0R2-0 0R2-0 AVSS_SATA_2 SIDE_D4/GPIO19 SD5 SD8 SIDE_D8
AF11 AVSS_SATA_3 SIDE_D5/GPIO20 AA28 3 6
DY DY DY AF12 AB28 SD6 SD6 4 5 SIDE_D6
AVSS_SATA_4 SIDE_D6/GPIO21 SD7
AF13 AVSS_SATA_5 SIDE_D7/GPIO22 AB27
2

AF14 AB29 SD8 RN65 SRN0-1-U


SERIAL ATA POWER

AVSS_SATA_6 SIDE_D8/GPIO23 SD9 SD10 SIDE_D10


AF15 AVSS_SATA_7 SIDE_D9/GPIO24 AA27 1 8
AF16 Y27 SD10 SD1 2 7 SIDE_D1
AVSS_SATA_8 SIDE_D10/GPIO25 SD11 SD12 SIDE_D12
AF17 AVSS_SATA_9 SIDE_D11/GPIO26 AA29 3 6
AF18 W27 SD12 SD0 4 5 SIDE_D0
AVSS_SATA_10 SIDE_D12/GPIO27 SD13
AF19 AVSS_SATA_11 SIDE_D13/GPIO28 Y29
AF20 V27 SD14 RN66 SRN0-1-U
2 AVSS_SATA_12 SIDE_D14/GPIO29 SD15 SD7 SIDE_D7 2
AF21 AVSS_SATA_13 SIDE_D15/GPIO30 U27 1 8
AF22 SD5 2 7 SIDE_D5
AVSS_SATA_14 SD9 SIDE_D9
AH9 AVSS_SATA_15 3 6
AG11 AG13 SD4 4 5 SIDE_D4
AVSS_SATA_16 AVSS_SATA_33
AG15 AVSS_SATA_17 AVSS_SATA_34 AH22
AG17 AK12 RN15 SRN0-1-U
AVSS_SATA_18 AVSS_SATA_35 SIOR#
AG19 AVSS_SATA_19 AVSS_SATA_36 AH11 1 8 SIDE_IOR# 25
AG22 AJ17 SIOW # 2 7 SIDE_IOW # 25
AVSS_SATA_20 AVSS_SATA_37 SD13 SIDE_D13
AG23 AVSS_SATA_21 AVSS_SATA_38 AH14 3 6
AF9 AH19 SD2 4 5 SIDE_D2
AVSS_SATA_22 AVSS_SATA_39
AH17 AVSS_SATA_23 AVSS_SATA_40 AJ20
AH23 AH21 RN14 SRN0-1-U
AVSS_SATA_24 AVSS_SATA_41 SDA_2
AH13 AVSS_SATA_25 AVSS_SATA_42 AJ9 1 8 SIDE_A2 25
AH20 AG16 SDA_1 2 7 SIDE_A1 25
AVSS_SATA_26 AVSS_SATA_43 SDRDY
AK9 AVSS_SATA_27 AVSS_SATA_44 AK15 3 6 SIDE_IORDY 25
AJ12 AK20 SDACK# 4 5 SIDE_DACK# 25
AVSS_SATA_28 AVSS_SATA_45
AK17 AVSS_SATA_29
AK23 RN63 SRN0-1-U
AVSS_SATA_30 IRQ15R
AH10 AVSS_SATA_31 1 8 SIDE_IRQ15 25
AJ23 SDCS#1 2 7 SIDE_CS#1 25
AVSS_SATA_32 SDCS#0 3 6 SIDE_CS#0 25
4 5
CHS-215SB400
RN64 SRN0-1-U
SD14 1 8 SIDE_D14
SDREQ 2 7 SIDE_DREQ 25
SD15 3 6 SIDE_D15
1D8V_S0 SDA_0 4 5 SIDE_A0 25
1D8V_XTLVDD_ATA 1D8V_S0 1D8V_PLLVDD_ATA 1D8V_SATA_S0
1 R579 1
1D8V_S0
R580 R548
1 2
0R0603-PAD
1 2 1 2
Wistron Corporation
1

0R0603-PAD
1

C760 C734 0R0805-PAD 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

1
C761 C735 SCD1U SC2D2U6D3V3MX-1 C200 C688 C687 Taipei Hsien 221, Taiwan, R.O.C.
2

SCD1U SC2D2U6D3V3MX-1 SCD1U SC10U6D3V5M C733 C731 C757 C756 C732


2

DY DY SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V Title


2

SB400 ACPI/GPIO/SATA/IDE (2 of 5)
SC10U6D3V5MX Size Document Number Rev
A3
W37 SB
Date: Friday, April 15, 2005 Sheet 19 of 51
A B C D E
A B C D E

1D8V_S0
SC22U10V6ZY-U 3D3V_SB_S0 U34C

A30 VDDQ_1 SB400 SB VSS_12 E19


1

1
DY DY DY D30 VDDQ_2 VSS_13 E22
E24 VDDQ_3 Part 3 of 4 VSS_14 E23
C169 C170 C726 C752 C730 C748 C724 E25 E26
VDDQ_4 VSS_15
2

2
J5 VDDQ_5 VSS_16 E30
SC22U10V6ZY-U SCD1U16V SCD1U16V K1 F1
SCD1U16V SCD1U16V SCD1U16V VDDQ_6 VSS_17
4 K5 VDDQ_7 VSS_18 F4 4
N5 VDDQ_8 VSS_19 G5
P5 VDDQ_9 VSS_20 H5
R1 VDDQ_10 VSS_21 J1
SCD1U16V U5 J4
VDDQ_11 VSS_22
U26 VDDQ_12 VSS_23 K4
U30 VDDQ_13 VSS_24 L5
1

1
DY DY DY V5 VDDQ_14 VSS_25 M5
V26 VDDQ_15 VSS_26 P1
C725 C747 C729 C728 C751 C723 C727 Y1 R5
VDDQ_16 VSS_27
2

2
Y26 VDDQ_17 VSS_28 R26
SCD1U16V SCD1U16V SCD1U16V AA5 T5
SCD1U16V SCD1U16V SCD1U16V VDDQ_18 VSS_29
AA26 VDDQ_19 VSS_30 T26
AB5 VDDQ_20 VSS_31 T30
AC30 VDDQ_21 VSS_32 W1
AD5 VDDQ_22 VSS_33 W5
AD26 VDDQ_23 VSS_34 W26
AE1 VDDQ_24 VSS_35 Y5
3D3V_SB_S0 3D3V_S0 AE5 AB26
VDDQ_25 VSS_36
R206 AE26 VDDQ_26 VSS_37 AB30
SC22U10V6ZY-U AF6 AC5
VDDQ_27 VSS_38
2 1 AF7 VDDQ_28 VSS_39 AC26
AF24 VDDQ_29 VSS_40 AD1
1

DY 0R0805-PAD AF25 VDDQ_30 VSS_41 AF5


AK1 VDDQ_31 VSS_42 AF8
C190 C753 C277 C707 C746 C708 C709 AK4 AF23
VDDQ_32 VSS_43
2

AK26 VDDQ_33 VSS_44 AF26


SCD1U16V SCD1U16V SCD1U16V 1D8V_S0 AK30 AG8
VDDQ_34 VSS_45

POWER
SCD1U16V SCD1U16V SCD1U16V AJ1
3 VSS_46 3
M12 VDD_1 VSS_47 AJ24
M13 VDD_2 VSS_48 AJ30
M18 VDD_3 VSS_49 AK5
SCD1U16V M19 AK25
VDD_4 VSS_50
N12 VDD_5 VSS_51 M14
N13 VDD_6 VSS_52 M15
1

1
DY DY DY DY N18 VDD_7 VSS_53 M16
N19 VDD_8 VSS_54 M17
C710 C699 C712 C191 C755 C711 C278 C749 C754 C750 C193 V12 N14
VDD_9 VSS_55
2

2
V13 VDD_10 VSS_56 N15
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V V18 N16
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V VDD_11 VSS_57
V19 VDD_12 VSS_58 N17
W12 VDD_13 VSS_59 P12
W13 VDD_14 VSS_60 P13
W18 VDD_15 VSS_61 P14
3D3V_SB_S5 W19 P15
VDD_16 VSS_62
VSS_63 P16
3D3V_SB_S5 3D3V_S5 A3 P17
S5_3.3V_1 VSS_64
R261 A7 S5_3.3V_2 VSS_65 P18
SC22U10V6ZY-U E6 P19
S5_3.3V_3 VSS_66
2 1 E7 S5_3.3V_4 VSS_67 R12
E1 S5_3.3V_5 VSS_68 R13
1

DY DY DY 1D8V_S5 F5 R14
0R0805-PAD S5_3.3V_6 VSS_69
VSS_70 R15
C257 C740 C744 C741 C769 C745 E9 R16
S5_1.8V_1 VSS_71
2

E10 S5_1.8V_2 VSS_72 R17


SCD1U16V SCD1U16V SCD1U16V E20 R18
SCD1U16V SCD1U16V 1D8V_S5 S5_1.8V_3 VSS_73
E21 S5_1.8V_4 VSS_74 R19
VSS_75 T12
2 2
E13 USB_PHY_1.8V_1 VSS_76 T13
E14 USB_PHY_1.8V_2 VSS_77 T14
E16 USB_PHY_1.8V_3 VSS_78 T15
1D2V_S0 E17 T16
1D8V_S5 1D8V_S5 R208 USB_PHY_1.8V_4 VSS_79
VSS_80 T17
2 1 CPU_1D2V C30 T18
SC10U10V5ZY SCD1U16V CPU_PWR VSS_81
VSS_82 T19
1D8V_S0 V5_VREF AG6 U12
L12 0R0402-PAD V5_VREF VSS_83
VSS_84 U13
1

DY DY DY DY 1 2 1D8VAVDDCK_S0 A24 U14


MLB-201209-11 AVDDCK VSS_85
B24 AVSSCK VSS_86 U15
1

1
C212 C719 C722 C720 C717 C721 C718 C743 U16
VSS_87
2

5V_S0 C209 A4 U17


SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC10U10V5ZY C210 C697 C192 VSS_1 VSS_88
A8 VSS_2 VSS_89 U18
2

2
SCD1U16V SCD1U16V DY A29 U19
VSS_3 VSS_90
B28 VSS_4 VSS_91 V14
SC1U10V3KX SCD1U16V C1 V15
SCD1U16V VSS_5 VSS_92
E5 VSS_6 VSS_93 V16
E8 VSS_7 VSS_94 V17
E11 VSS_8 VSS_95 W14
RB751V-40-U D43 E12 W15
VSS_9 VSS_96
E15 VSS_10 VSS_97 W16
1 2 1 2 R588 V5_VREF E18 VSS_11 VSS_98 W17
1KR2
3D3V_S0
1

1D8V_S5 3D3V_S5 CHS-215SB400


D42
C759 C758
2

1 2
1 SC1U10V3KX SCD1U16V 1
RB751V-40-U D21
RB751V-40-U
1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SB400 POWER/DECOUPLING
Size Document Number Rev
A3
W37 SB
Date: Friday, April 15, 2005 Sheet 20 of 51
A B C D E
A B C D E

3D3V_S5
RN73

8
7
6
5
SRN4K7 R596 R574
10KR2 10KR2 RN70 CHECK SB VERSION
SRN10K-2
CLK48_USB 3
8
7
6
5

8
7
6
5

1
1

1
DY
R597 DY R575 DY 1 2 R246

1
2
3
4
10KR2 10KR2 GPIO3 U34D 1 2 R245 0R2-0
GPIO1 0R2-0
RN74 GPIO6
SB400 SB Part 4 of 4 48M_X1/USBCLK A15

2
2

2
SRN4K7 23 THRM# C6 TALERT#/TEMP_ALERT#/GPIO10 48M_X2 B15 SPEC change
1
2
3
4

1
2
3
4

4 GPM6# D5 C15 USB_PCOMP 1 2 R573 4


BLINK/GPM6# USB_RCOMP USB_VREFOUT 11K8R3F
29,34 PME#_SB C4 PCI_PME#/GEVENT4# USB_VREFOUT D16
PCIE_W AKE# S3_STATE RI# D3 C16 USB_TE1 TP93 TPAD30
PM_PW RBTN# THERMTRIP#_1 RI#/EXTEVNT0# USB_ATEST1 USB_TE0 TP92 TPAD30
15,18,34,38,39,45 PM_SLP_S3# B4 SLP_S3# USB_ATEST0 D15
PM_SLP_S3# E3 B8 USB_OC#0 TP94 TPAD30
PM_SLP_S5# PM_SUS_STAT# 34,44 PM_SLP_S5# SLP_S5# USB_OC0#/GPM0# USB_OC#1
B3 C8 RP2 3D3V_S5
PME#_SB RI# 34 PM_PW RBTN# SB_PW RGD PWR_BTN# USB_OC1#/GPM1# USB_OC#2 USB_OC#4
C3 C7 1 10

ACPI / WAKE UP EVENTS


THRM# 40 SB_PW RGD PM_SUS_STAT# PWR_GOOD USB_OC2#/FANOUT1/GPM2# USB_OC#3 TP54 TPAD30 USB_OC#7 USB_OC#2
34 PM_SUS_STAT# D4 SUS_STAT# USB_OC3#/GPM3# B7 2 9
GPM6# 10KR2 1 2 R295 F2 B6 USB_OC#4 USB_OC#0 3 8 BT_EN
SYS_REST 10KR2 TEST1 USB_OC4#/GPM4#
1 2 R293 E2 TEST0 USB_OC5#/GPM5# A6 BT_EN USB_OC#1 4 7 USB_OC#3
34 KA20GATE AJ26 B5 USB_OC#6 1 2 ECSW I# 5 6 USB_OC#6
D41 GA20IN USB_OC6#/FAN_ALERT#/GEVENT6# 3D3V_S5
AJ27 A5 USB_OC#7 R585 0R2-0
34 KBRCIN# 0R2-0 R586 THERMTRIP#_1 KBRST# USB_OC7#/CASE_ALERT#/GEVENT7#
2 1 1 2 D6 SRP10K
6,23 CPU_THERMTRIP# 0R2-0 R587 ECSCI# SMBALERT#/THRMTRIP#/GEVENT2#
34 ECSCI#_KBC 1 2 C5 LPC_PME#/GEVENT3# USB_HSDP7+ A11 USB_PP7 1 2 R264 15KR2 DY
0R2-0 1 2 R225 ECSMI# A25 B11 USB_PN7 1 2 R263 15KR2 DY
S1N4148-U 34 ECSMI#_KBC ECSW I# 0R2-0 R576 S3_STATE LPC_SMI#/EXTEVNT1# USB_HSDM7-
34 ECSW I# 1 2 D8 VOLT_ALERT#/S3_STATE/GEVENT5#
R224 DY SYS_REST D7 A10 USB_PP6 1 2 R265 15KR2 DY
PCIE_W AKE# SYS_RESET#/GPM7# USB_HSDP6+
3 SB_OSC_CLK 1 2 D2 WAKE#/GEVENT8# USB_HSDM6- B10 USB_PN6 1 2 R266 15KR2 DY
0R2-0
USB_PP5 R247 15KR2 DY

USB INTERFACE
34 RSMRST#_KBC D1 RSMRST# USB_HSDP5+ A14 1 2
B14 USB_PN5 1 2 R242 15KR2 DY
USB_HSDM5-
1 2 C211 XI_CLK_SB14 2 1 R226 X1_CLK_SB14_1 A23 14M_X1/OSC
SC33P50V2JN DY 0R2-0 A13 USB_PP4 1 2 R243 15KR2 DY
XO_CLK_SB14_1 USB_HSDP4+
Use CLK GEN REF DY B23 14M_X2 USB_HSDM4- B13 USB_PN4 1 2 R244 15KR2 DY
2

14.318M CLK to SB X3

CLK / RST
OSCIN R222 TPAD30 TP41 SIO_CLK_SB
DUMMY IT
DY AK24 SIO_CLK USB_HSDP3+ A18 USB_PP3 24
X-14D318MHZ-1-U1 1MR2 B18
USB_HSDM3- USB_PN3 24
DY GPIO1 B25 ROM_CS#/GPIO1
1

DY GPIO6 C25 A17


GHI#/GPIO6 USB_HSDP2+ USB_PP2 24
2

3 1 2 C230 XO_CLK_SB14 2 1 C23 B17 AVDD_USB 3


39,42 VRM_PW RGD VGATE/GPIO7 USB_HSDM2- USB_PN2 24 3D3V_S5
SC33P50V2JN PCB_VER0 D24
R227 0R2-0 PCB_VER1 AGP_STP#/GPIO4 L17 SC10U10V5ZY
DY D23 AGP_BUSY#/GPIO5 USB_HSDP1+ A21 USB_PP1 24
GPIO3 A27 B21 1 2
FANOUT0/GPIO3 USB_HSDM1- USB_PN1 24
32 SPKR_SB C24 SPKR/GPIO2

1
SMBC_SB A26 A20 0R3-U DY
SCL0/GPOC0# USB_HSDP0+ USB_PP0 24

GPIO
Lynx Board Version Setting SMBD_SB
DDC1_SCL
B26
B27
SDA0/GPOC1# USB_HSDM0- B20 USB_PN0 24
C250 C255 C254 C715 C253
DDC1_SCL/GPIO9

2
DDC1_SDA C26 DDC1_SDA/GPIO8
Ver. PCB_VER0 PCB_VER1 DDC2_SCL
DDC2_SDA
C27
D26
DDC2_SCL/GPIO11
DDC2_SDA/GPIO12
AVDDTX_0
AVDDTX_1
C21
C18
AVDD_USB
SC1U10V3KX
SCD1U16V
SCD1U16V
SCD1U16V
SA 0 0 AVDDTX_2
AVDDTX_3
D13
D10
SB 0 1 J2 NC1
AVDDRX_0
AVDDRX_1
D20
D17
SC 1 0 K3
J3
NC4
NC3
AVDDRX_2
AVDDRX_3
C14
C11

(NOT USED)
SD 1 1 K2 NC2
AVDDC A16 3D3V_AVDDC
SC10U10V5ZY

1
AVSSC B16 DY
3D3V_S0 A9 C251 C252 C714 C716 C742
AVSS_USB_1

2
33R2 R603 1 2 AC_BITCLK G1 A12
32 AC97_BITCLK_SB 33R2 R296 1 AC_SDOUT AC_BITCLK AVSS_USB_2 SC1U10V3KX SCD1U16V
22,24,32 AC97_DOUT 2 G2 AC_SDOUT AVSS_USB_3 A19
H4 A22 SCD1U16V SCD1U16V
32 AC97_DIN0 AC_SDIN0 AVSS_USB_4
24 AC97_DIN1 G3 AC_SDIN1 AVSS_USB_5 B9
1

AC97_DIN2 G4 B12
R565 R564 33R2 R301 1 AC_SYNC AC_SDIN2 AVSS_USB_6
24,32 AC97_SYNC 2 H1 AC_SYNC AVSS_USB_7 B19
2 3D3V_AVDDC 2

AC97
10KR2 10KR2 H3 B22

USB PWR
24,32 AC97_RST# AC_RST# AVSS_USB_8 L15
DY DY 22,33 SPDIF_OUT_STRAP H2 SPDIF_OUT AVSS_USB_9 C9
AVSS_USB_10 C10 1 2
2

PCB_VER0 C12
AVSS_USB_11

1
PCB_VER1 C13 MLB-201209-11 DY
3D3V_S5 AVSS_USB_12
AVSS_USB_13 C17
1

C19 C228 C229 C231


AVSS_USB_14

2
1

C20 SC10U10V5ZY
R562 R572 AVSS_USB_15 SC1U10V3KX
AVSS_USB_16 C22
1

10KR2 10KR2 D9 SCD1U16V


R299 AVSS_USB_17
AVSS_USB_18 D11
2

10KR2 D12
AVSS_USB_19
2

AVSS_USB_20 D14
AVSS_USB_21 D18
2

AVSS_USB_22 D19
AC97_RST# D21
AVSS_USB_23
AVSS_USB_24 D22

CHS-215SB400
AC97_BITCLK_SB
3D3V_S0
AC97_DIN0

AC97_DIN1 3D3V_S0

AC97_DIN2
1

1 1
1

R545 R544 R563 R223


R602 R297 R601 R600 R561 R566
10KR2 10KR2 10KR2 10KR2 1K5R2 1K5R2
Wistron Corporation
2

10KR2 10KR2 10KR2 10KR2


2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

DDC1_SCL SMBC_SB Taipei Hsien 221, Taiwan, R.O.C.


DDC1_SDA 3,8 SMBC_SB
DDC2_SCL SMBD_SB Title
3,8 SMBD_SB
DDC2_SDA
SB400 AC97/USB
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 21 of 51
A B C D E
A B C D E
3D3V_S5 3D3V_S0 3D3V_S5 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0

1
R598 R300 R595 R302 R631 R606 R632 R628 R620 R616 R613
10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
DY DY DY DY DY

2
18 AUTO_ON#
21,24,32 AC97_DOUT
18 RTC_CLK
4 21,33
18,29
SPDIF_OUT_STRAP
CLK33_LAN 4
18,31 CLK33_MINI
18,34 CLK33_KBC
18,37 PCLK_FW H
18 CLK33_LPCROM
18 PCI_CLK7
18 PCI_CLK8

1
R599 R298 R594 R303 R630 R609 R633 R629 R619 R617 R611
10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
DY DY DY DY DY DY

2
REQUIRED SYSTEM STRAPS ACPWRON AC_SDOUT RTC_CLK SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 PCI_CLK6 PCI_CLK7 PCI_CLK8
48MHZ- USB PHY 14MHZ ROM TYPE
MANUAL SIO 24MHz Clock PWRDOWN USB INT OSC
STRAP PWR ON USE DEBUG PLL48 CPU I/F=K8 H,H=PCI (X Bus) ROM
Input DISABLE MODE
3 HIGH STRAPS INTERNAL RTC
Buffer DEFAULT H,L=LPC ROM I
3
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
DEFAULT

AUTO IGNORE EXTENNAL SIO 48MHz 48MHZ USB PHY USB 14MHZ L,H=LPC ROM II
STRAP PWR DEBUG RTC (NOT -Crytsal Pad PWRDOWN EXT. XTAL CPU I/F=P4
LOW ON STRAPS SUPPORTED ENABLE 48MHZ MODE L,L=Firmware Hub ROM
DEFAULT W/IT8712) DEFAULT

3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
1

1
R209 R314 R305 R317 R309 R313 R306 R624 R310 R622
10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
DY DY DY DY DY
2

2
19 PDACK#
18,26,29,31 PCI_AD31
18,26,29,31 PCI_AD30
18,26,29,31 PCI_AD29
18,26,29,31 PCI_AD28
2 18,26,29,31
18,26,29,31
PCI_AD27
PCI_AD26
2
18,26,29,31 PCI_AD25
18,26,29,31 PCI_AD24
18,26,29,31 PCI_AD23
1

1
R210 R315 R304 R316 R308 R312 R307 R625 R311 R623
1KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
DY DY DY DY DY
2

2
DEBUG STRAPS

PDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
BYPASS BYPASS IDE PLL USE RESERVED
USE LONG PCI PLL BYPASS ACPI BCLK EEPROM
STRAP RESET RESERVED RESERVED RESERVED RESERVED
PCIE
1 HIGH
STRAPS 1
DEFAULT
Wistron Corporation
USE 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
USE SHORT USE PCI USE ACPI USE DEFAULT Taipei Hsien 221, Taiwan, R.O.C.
STRAP RESET PLL BCLK IDE PCIE Title
LOW PLL
DEFAULT DEFAULT DEFAULT
STRAPS
DEFAULT SB400 STRAPPING PIN
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 22 of 51
3D3V_S0 5V_S0 FAN1_VCC

*Layout* 15 mil
5V_S0

1
1

1
D40

3
4
R14 R15 C695 C694 C696
10KR2 10KR2 SCD1U16V SC10U10V5ZY-L SC2200P50V2KX

1
RN24 S1N4148-U
SRN10KJ R541

2
2

1
10KR2

2
1

2
1
FAN1_VCC

G
Q30 FAN1
15,34 SMBC_KBC 3 2 2N7002 SMB_CLK_W FAN1_FG1
3
2

1
D

G
Q31 1

1
15,34 SMBD_KBC 3 2 2N7002 SMB_DATA_W *Layout* 15 mil CON3-4
C685
SC1000P50V 20.D0012.103

2
13 THERMAL_N_NB
5V_S0 13 THERMAL_P_NB
U3 G792SFX
5V_S0 *Layout* 30 mil G792_DXP2 15

1
1 2 R24 5V_G792_S0 6 VCC FAN1 1 G792_DXN2 15
20 4 R846 R847
DVCC FG1

1
200R2F 14 G792_32K 18
CLK

1
C29 16 SMB_DATA_W 0R2-0 0R2-0
SC1U10V3ZY R23 SDA SMB_CLK_W
7 DXP1 SCL 18

2
4K99R2F C19 C20 C21 9 19 DY
DXP2 NC

2
11 SC2200P50V2KX
SC4D7U10V5ZY SCD1U16V SCD1U16V DXP3 G792_DXP2

3
G792_DXP3
SB DGND 5

3
ALERT# 15 17 1 Q34
ALERT# DGND

1
1 2 R17 THER_SHUT# 13 1 Q11 S2N3904-U3
3D3V_S0 THERM# S2N3904-U3
10KR2 V_DEGREE 3 8
THERM_SET SGND1

2
2 10 G792_DXN2 C522 C114 C113 C523
RESET# SGND2

2
12 G792_DXN3 SC470P50V3JN
SGND3
DCBATOUT 1 R22

2
49K9R2F G2 SC2200P50V2KX
DY 3D3V_S0 G1 SC470P50V3JN
1

GAP-CLOSE GAP-CLOSE
2

R336
100KR3F U48

1
U49D

14
QUICK_SDN# 1 5
OUT NC#5
2

MAX807_VDD 2 12 DXP1:108 Degree THERMDP 6


VDD

1
3 4 39 RUNPW ROK 11
VSS NC#4 DXP2:H/W Setting
1

13 Place near chip as close C30


R337 DXP3:88 Degree as possible SC2200P50V2KX
THERMDN 6

2
S80820CNMC TSLCX08-U

7
31K6R3F
2

BL3# HW Thermal Throttling

DY
ALERT# 1 2 R16 0R2-0 THRM# 21

Dummy when G792 enhanced T8 5V_AUX_S5


function SB
15 OVERT#
1

R51 5V_AUX_S5
150R2
5V_AUX_S5

1
HW thermal shut down tempature
2

R334
setting 95 degree . Put Near CPU . C71 QUICK_SDN# 10KR2
1

SCD01U16V2KX
R50

2
U9 0R2-0
D26
2

R53 3D3V_AUX_S5
1 2 CPU_THSET 1 SET VCC 5 1 2 T8_HW _SHUT#
2

18KR2F 2 DY
T8_HW _SHUT# GND CPU_TH_HYST
3 OUT# HYST 4 S1N4148-U
3

D27 D24
1

G709T1U R350
R52 D25 RSMRST# 34
0R2-0 S1N4148-U S1N4148-U 3D3V_AUX_S5
BAT54-1
1

OUT#: Hi active / mount R353 DY 10KR2


Low active / mount R378 U47
2

1 A VCC 5
1

34 S5_ENABLE 2 B
C311
SCD1U16V 3 GND Y 4 S5PW R_ENABLE 44,45
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


NC7S08-U Taipei Hsien 221, Taiwan, R.O.C.
DY
6,21 CPU_THERMTRIP# 1 2 R333 0R2-0 Title
G792
Size Document Number Rev
A3
W37 SB
Date: Friday, March 25, 2005 Sheet 23 of 51
100 mil
5V_S0
5V_USB1_S0
USB PORT 5V_USB0_S0
F2 100 mil
1 2

1
FUSE-2A8V
C376 C378 TC12
C377 SCD1U16V SC1000P50V ST150U6D3VDM-9 USB3

2
DY TR3 11
9
SC4D7U10V5ZY 1 5
100 mil 21 USB_PN3 1 2
USB_3- 2 6
5V_S0 USB_3+ 3 7
5V_USB0_S0 100 mil 21 USB_PP3 4 3 4 8
F1 10
1 2 12
DLW 21HN900SQ2
1

1
MINISMDC110-U SKT-USB-88-U
C143 C144 TC7
C145 SCD1U16V SC1000P50V ST150U6D3VDM-9
2

2
DY
SC4D7U10V5ZY
High limit under 2.5 mm SB

3D3V_S5
TR4

1 2 USB_2-
21 USB_PN2
MDC1
13 15

1
MH1 14 4 3 USB_2+
21 USB_PP2
1 2 C272
C273 SC4D7U10V5ZY

2
21,22,32 AC97_DOUT 3 4 DLW 21HN900SQ2
5 6
7 8 SCD1U16V
21,32 AC97_SYNC R259 AC_DIN1A_R
21 AC97_DIN1 2 1 9 10
22R2 11 12 ACZ_BTCLK_MDC_1 1 2 R262
21,32 AC97_RST# 0R2-0 AC97_BITCLK 32
MH2 17
16 18
1

1
AMP-CONN12A
C256 R260
SC22P50V2JN-1 100KR2 5V_USB1_S0
2

DY

2
TR1 USB1
5
1
21 USB_PN1 1 2
USB_1- 2
USB_1+ 3
21 USB_PP1 4 3 4
6

USB-RJ45-2
DLW 21HN900SQ2

5V_USB1_S0

TR2 USB2
5
1
21 USB_PN0 1 2
USB_0- 2
USB_0+ 3
21 USB_PP0 4 3 4
6

USB-RJ45-2
DLW 21HN900SQ2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB and MDC I/F


Size Document Number Rev
A3
W37 SB
Date: Friday, March 25, 2005 Sheet 24 of 51
HD Connector

CN3
45
MH1
1
5V_S0
2 5V_S0
3
4
5 CDROM_LED# 1 2 R530
17 HD_LED# 4K7R2

CD-ROM CONNECTOR
6
19 PIDE_CS#1 7 5V_S0
19 PIDE_CS#0
1

1
D28 8
19 PIDE_A2 9 PIDE_IRQ14 1 2 R636
TC11 C792 C791 19 10 8K2R2
PIDE_A0
2

DY 2 1 2 PDIAG# 11
SSM24-U R65019 PIDE_A1 12
2

10KR2 13 19 SIDE_D[15..0]
SC10U10V6ZY-U SCD1U16V 19 PIDE_IRQ14 14
SCD1U16V 15
19 PIDE_DACK# 16
2 1 HD_CSEL 17
18 CDROM1
R634 19 PIDE_IORDY 19 SC100P 51
470R2 20 1 2 C173 1 2 C174
19 PIDE_IOR# 21 2 1 SC100P
32 CD_AUDR CD_AUDL 32
22 1 2 C175
19 PIDE_IOW # 23 4 3 SC100P
5V_S0 CD_AGND 32
24 SIDE_D8 6 5
19 PIDE_DREQ SIDE_D9 SIDE_D7 RSTDRV#_5 18
25 8 7
5V_S0

1
26 SIDE_D10 10 9 SIDE_D6

2
PIDE_D15 27 SIDE_D11 12 11 SIDE_D5 R190
PIDE_D0 28 R153 R152 SIDE_D12 14 13 SIDE_D4 DUMMY-R2

1
PIDE_D14 29 5K1R2 4K7R2 SIDE_D13 16 15 SIDE_D3 DY
PIDE_D1 30 DY SIDE_D14 18 17 SIDE_D2 R154
PIDE_D13 31 SIDE_D15 20 19 SIDE_D1 4K7R2

2
19 PIDE_D[15..0] PIDE_D2 32 22 21 SIDE_D0
19 SIDE_DREQ
PIDE_D12 33 19 SIDE_IOR# 24 23

2
PIDE_D3 34 26 25 SIDE_IOW # 19
PIDE_D11 35 19 SIDE_DACK# 28 27 SIDE_IORDY 19
PIDE_D4 36 30 29 SIDE_IRQ15 19
5V_S0 PIDE_D10 37 PDIAG# 32 31 SIDE_A1 19
PIDE_D5 38 19 SIDE_A2 34 33 SIDE_A0 19
PIDE_D9 39 19 SIDE_CS#1 36 35 SIDE_CS#0 19
1

PIDE_D6 40 38 37 CDROM_LED# 17
R635 PIDE_D8 41 40 39
4K7R2 PIDE_D7 42 42 41
5V_S0 5V_S0
43 44 43

1
RSTDRV#_5 44 46 45 DY
2

MH2 48 47 CD_CSEL 1 2

1
46 C644 C676 C645 50 49

2
PIDE_IORDY R517 10KR2
SPD-CON44-5 52
SC10U10V5ZY-L SCD1U16V SCD1U16V R518
SPD-CONN50-4R7U1 0R2-0

2
Connector change

SATA HD Connector
3D3V_S0
1

TC20 C774
ST22U6D3VBM SCD1U16V
2

CN4
1 2
MH1

3 4 SATA_TXP0 19
19 SATA_TXN0 5 6
19 SATA_RXN0 7 8 SATA_RXP0 19
9 10
11 12 5V_S0
5V_S0 13 14
15 16
17 18
19 20
21 22
23 24
MH2
25 26

SPD-CONN26A-1 Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
HD/CDROM
Size Document Number Rev
A3
W37 SB
Date: W ednesday, March 23, 2005 Sheet 25 of 51
A B C D E

INTA# CARBUS 1
INTB# CARBUS 2
3D3V_S0 U46A 1 of 4 INTC# 1394
INTD# CARD READER 3D3V_S0

W3 VCCP MFUNC0 N3 INT_PIRQE# 18,31


W10 U1-1 M5 1 2 R640 10KR2
VCCP MFUNC1
18,22,29,31 PCI_AD[31..0] MFUNC2 P1 INT_PIRQF# 18
MFUNC3 P2 P_SERIRQ 18,31,34,37
PCI_AD31 U2 P3 INT_PIRQG# INT_PIRQG# 18
PCI_AD30 AD31 MFUNC4 FM_LED
V1 AD30 MFUNC5 N5 1 2 R638 10KR2
PCI_AD29 V2 R1 CB_MFUNC6 1 2 R346 10KR2
PCI_AD28 AD29 MFUNC6
4 U3 AD28 4
PCI_AD27 W2
PCI_AD26 AD27
V3 AD26 CLK_48 M1 CLK48_CARDBUS 3
PCI_AD25 U4
PCI_AD24 AD25 3D3V_PLL_S0
V4 AD24
PCI_AD23 V5
PCI_AD22 AD23
U5 AD22 AVDD R13
PCI_AD21 R6 U1-7 R14
PCI_AD20 AD21 AVDD
P6 AD20 AVDD V17
PCI_AD19 W6 R318
PCI_AD18 AD19
V6 AD18 VDPLL_33 V19 1 2 Place it near to chip
PCI_AD17 U6 P14 0R2-0 SCD1U16V
PCI_AD16 AD17 VSSPLL
R7 AD16
PCI_AD15 V9 T18 CBS_VDPLL_15 1 2 C283
PCI_AD14 AD15 VDPLL_15
U9 AD14 VSSPLL T17
PCI_AD13 R9
PCI_AD12 AD13 6K34R2F
N9 AD12
PCI_AD11 V10 U18 CBS_R0 1 2 R319

CARD BUS
PCI_AD10 AD11 R0 CBS_R1
U10 AD10 R1 U19
PCI_AD9 R10 * All 1394 signals must be routed on top side only
PCI_AD8 AD9 * Differential pairs of each ports should have equal trace length
N10 AD8 TPBIAS0 U15 1394_TPBIAS0 28
PCI_AD7 V11 * Stubs must be keep as short as possible
PCI_AD6 AD7
U11 AD6 TPA0P V15 1394_TPA0P 28
PCI_AD5 R11 W15
AD5 TPA0N 1394_TPA0N 28
PCI_AD4 W12
PCI_AD3 AD4
V12 V14 Bypass/Decupoling Capacitors

1394
AD3 TPB0P 1394_TPB0P 28
PCI_AD2 U12 W14
AD2 TPB0N 1394_TPB0N 28
PCI_AD1 N11 4K7R2 Should be places as close to
PCI_AD0 AD1
W13 AD0 PHY_TEST_MA R17 1 2 R320
3 M11 CBS_CPS 2 1 R626 0R2-0 PCI7421 as possible 3
CPS 3D3V_S0
W11 P15 CBS_CNA 1 2 R343
18,29,31 PCI_C/BE#0 C/BE0# CNA
W9 4K7R2
18,29,31 PCI_C/BE#1 C/BE1#
W7 R19 CBS_XO 1 2 C305
18,29,31 PCI_C/BE#2 C/BE2# XO SC15P 3D3V_S0
W4 R18 CBS_XI
18,29,31 PCI_C/BE#3 C/BE3# XI

2
X7
PC0(TEST1) R12
P9 U13 X-24D576M-2
18,29,31 PCI_PAR PAR PC1(TEST2)

1
18,29,31 PCI_FRAME# V7 FRAME# PC2(TEST3) V13 DY DY

1
18,29,31 PCI_TRDY# R8 TRDY# 1 2 C306 C794 C782 C290 C318
U7 SC15P SC1000P50V SCD1U16V SCD1U16V SC1000P50V
18,29,31 PCI_IRDY# IRDY#

2
18,29,31 PCI_STOP# W8 STOP# AGND N12 DY
18,29,31 PCI_DEVSEL# N8 DEVSEL# AGND U14
PCI_AD25 1 2 CBS_DEVSEL# W5 U16
R329 100R2 IDSEL AGND PC[2:0]
18,29,31
PCI_PERR# V8 PERR#
U8 U17 011 3D3V_S0
18,29,31
PCI_SERR# SERR# TPBIAS1 15W
18
PCI_REQ#0 U1 REQ#
18
PCI_GNT#0 T2 GNT# TPA1P V18

1
18 CLK33_CBUS P5 PCLK TPA1N W18 MS_D[1..3] 28

1
R3 4K7R2 C284 DY DY
18,27,29,31,34 PCIRST_BUF# PRST# SCD1U16V
1 2 R330 T1 GRST# TPB1P V16 1 2 R321 C304 C308 C795 C783

2
0R2-0 T3 W16 1 2 R322 SC1000P50V SCD1U16V SCD1U16V SCD1U16V
31 CBUS_PME# RI_OUT#/PME# TPB1N

2
3D3V_S0 4K7R2
1 2 R345 R2 SUSPEND#
10KR2 F1 MC_PW R_CTRL#
U1-8 MC_PWR_CTRL_0 MC_PW R_CTRL-1 3D3V_S0
27 CB_DATA N1 DATA MC_PWR_CTRL_1 F2
L6 TP57 TPAD30
27 CB_CLOCK CLOCK
27 CB_LATCH N2 LATCH
2 2
32 PCI_SPKR L7 SPKROUT SD_CD# E3 SD_CD# 28 SD

1
SD/SDIO

? 3D3V_S0 MS_CD# F5 MS_CD# 28 MS/MS_pro C793 C781 C307 C291


2

F6 SCD1U16V SCD1U16V SCD1U16V SCD1U16V


R641 SM_CD#
MS_CLK/SD_CLK/SM_EL_WP# G5 MS_CLK 28 DY

2
47KR2 E1 F3
B_USB_EN# U1-10 MS_BS/SD_CMD/SM_WE# MSCBS 28
E2 A_USB_EN#
1

220R2J R347 H5 MS_D3


MS_DATA3/SD_DAT3/SM_D3 MS_D2
1 2 M2 SDA MS_DATA2/SD_DAT2/SM_D2 G3 MS/MS_pro
1 2 M3 U1-5 G2 MS_D1
SCL MS_DATA1/SD_DAT1/SM_D1
UNUSED TERMINALS

220R2J R639 G1
MS_SDIO(DATA0)/SD_DAT0/SM_D0 MSCSDIO 28
W17 NC#W17 SD_CLK/SM_RE# J5
T19 U1-6 J3 XD 3D3V_S0
RSVD SD_CMD/SM_ALE
P12 TEST0
3D3V_S0 H3
SD_DAT0/SM_D4

1
SD_DAT1/SM_D5 J6 SD 3D3V_S0 3D3V_PLL_S0
TPAD30 TP100 L5 J1 3D3V_S0 R349
RSVD SD_DAT2/SM_D6 10KR2 R342
L2 RSVD SD_DAT3/SM_D7 J2
TPAD30 TP99 K5 U1-9 1 2
RSVD

1
TPAD30 TP101 K3 H7 0R3-U
RSVD SD_WP/SM_CE SD_W P 28

1
1 2 R637 K7 RSVD SM_CLE J7 R651 MC_PW R_CTRL 28
TPAD30 TP56 0R2-0 L1 K1 10KR2 C281 C302 C282
RSVD SM_R/B# SC10U10V5ZY-L SC1000P50V SC1U10V3ZY
L3 RSVD SM_PHYS_WP# K2

2
3
D

2
MC_PW R_CTRL# 1 Q19
2N7002
PCI7411 G
S

2
1 3D3V_S0 1

3
D
FM_LED 1 Q42

1
2N7002
G
S DY R652 Wistron Corporation
2

10KR2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


DY Taipei Hsien 221, Taiwan, R.O.C.

2
SD_CD# Title

TI PCI7411 GHK (1 of 2)
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 26 of 51
A B C D E
A B C D E

Power switch VPP_ASKT_S0


VCC_ASKT_S0

1
1
R332 C296 C320
C295 100KR2 SCD1U16V SC4D7U10V5ZY

2
SCD1U16V

2
VCC_ASKT_S0 DY
2 of 4 U46C 3 of 4
U46B 1 2 C319
4 4
A5 SCD01U16V2KX D19
VCCA RSVD
VCCA A11 RSVD K19

RSVD B15
A_CAD31/A_D10 D1 CBB_D10 28 RSVD A16
A_CAD30/A_D9 C1 CBB_D9 28 RSVD B16
A_CAD29/A_D1 D3 CBB_D1 28 RSVD A17
A_CAD28/A_D8 C2 CBB_D8 28 RSVD C16
A_CAD27/A_D0 B1 CBB_D0 28 RSVD D17
A_CAD26/A_A0 B4 CBB_A0 28 RSVD C19
A_CAD25/A_A1 A4 CBB_A1 28 RSVD D18
A_CAD24/A_A2 E6 CBB_A2 28 RSVD E17
A_CAD23/A_A3 B5 CBB_A3 28 RSVD E19
C6 CBB_A4 28 G15 U42
A_CAD22/A_A4 RSVD VCC_ASKT_S0
A_CAD21/A_A5 B6 CBB_A5 28 RSVD F18
A_CAD20/A_A6 G9 CBB_A6 28 RSVD H14 26 CB_DATA 3 DATA AVCC 9
A_CAD19/A_A25 C7 CBB_A25 28 RSVD H15 26 CB_CLOCK 4 CLOCK AVCC 10
B7 U1-3 G17 5
A_CAD18/A_A7 CBB_A7 28 RSVD 26 CB_LATCH LATCH
A_CAD17/A_A24 A7 CBB_A24 28 RSVD K17 18,26,29,31,34 PCIRST_BUF# 12 RESET#
A10 L13 1 2 TPS2210_SHDN# 21 8
A_CAD16/A_A17 CBB_A17 28 RSVD 5V_S0 10KR2 SHDN# AVPP VPP_ASKT_S0
E11 K18 R331
A_CAD15/A_IOWR# CBB_IOW R# 28 RSVD 3D3V_S0
A_CAD14/A_A9 G11 CBB_A9 28 RSVD L15
A_CAD13/A_IORD# C11 CBB_IORD# 28 RSVD L17 13 3.3V OC# 15
B11 L18 5V_S0
CBB_A11 28

CARDBUS B
U1-2 A_CAD12/A_A11 RSVD
A_CAD11/A_OE# C12 CBB_OE# 28 RSVD L19

1
A_CAD10/A_CE2# B12 CBB_CE2# 28 RSVD M17 1 5V
A12 M14 C293 2 24
A_CAD9/A_A10 CBB_A10 28 RSVD SCD1U16V 5V NC
A_CAD8/A_D15 E12 CBB_D15 28 RSVD M15 NC 23

2
3
A_CAD7/A_D7 C13 CBB_D7 28 RSVD N19 DY NC 22 3

1
F12 N18 C292 C310 C294 7 19
A_CAD6/A_D13 CBB_D13 28 RSVD 12V NC
A_CAD5/A_D6 A13 CBB_D6 28 RSVD N15 20 12V NC 18
A_CAD4/A_D12 C14 CBB_D12 28 RSVD M13 DY NC 17

2
E13 P18 16
CARDBUS A

A_CAD3/A_D5 CBB_D5 28 RSVD NC


A14 P17 SC4D7U10V5ZY SCD1U16V 11 14
A_CAD2/A_D11 CBB_D11 28 RSVD GND NC
A_CAD1/A_D4 B14 CBB_D4 28 RSVD P19 25 GND NC 6
E14 SC4D7U10V5ZY
A_CAD0/A_D3 CBB_D3 28
F15 TPS2210APW P
RSVD
A_CC/BE3#/A_REG# C5 CBB_REG# 28 RSVD G18
A_CC/BE2#/A_A12 F9 CBB_A12 28 RSVD K14
A_CC/BE1#/A_A8 B10 CBB_A8 28 RSVD M18
A_CC/BE0#/A_CE1# G12 CBB_CE1# 28
RSVD K13
A_CPAR/A_A13 G10 CBB_A13 28
RSVD G19
A_CFRAME#/A_A23 C8 CBB_A23 28 RSVD H17
A_CTRDY#/A_A22 A8 CBB_A22 28 RSVD J13
A_CIRDY#/A_A15 B8 CBB_A15 28 RSVD J17
A9 H19 3D3V_S0
A_CSTOP#/A_A20 CBB_A20 28 RSVD
A_CDEVSEL#/A_A21 C9 CBB_A21 28 RSVD J19
E10 U46D 4 of 4
A_CBLOCK#/A_A19 CBB_A19 28 3D3V_S0
RSVD J18
A_CPERR#/A_A14 F10 CBB_A14 28 RSVD B18 H8 VCC
A_CSERR#/A_WAIT# B3 CBB_W AIT# 28 H9 VCC

1
RSVD E18 H10 VCC
E7 CBB_INPACK# 28 J15 H11 M19 R344
A_CREQ#/A_INPACK# RSVD VCC VR_PORT 10KR2
A_CGNT#/A_WE# B9 CBB_W E# 28 H12 VCC VR_PORT H1
2 2
RSVD F14 J8 VCC DY
A_CSTSCHG/A_BVD1(STSCHG#/RI#) B2 CBB_BVD1# 28 RSVD A18 M7 VCC

2
C3 CBB_W P 28 H18 J12 H2 CBS_VR_EN#
A_CCLKRUN#/A_WP(IOIS16#) CBB_A16_1 RSVD VCC VR_EN#
A_CCLK/A_A16 E9 1 2 R593 CBB_A16 28 M9 VCC

1
33R2 B19 M10
RSVD VCC R348
A_CINT#/A_READY(IREQ#) C4 CBB_RDY 28 RSVD F17 M12 VCC

POWER TERMINALS

1
A6 C17 K8 0R2-0
A_CRST#/A_RESET CBB_RESET 28 RSVD VCC
K12 C303 from spec :
VCC C309 SCD1U16V this pin is
A_CAUDIO/A_BVD2(SPKR#) A2 CBB_BVD2# 28 RSVD N13 N7 VCC

2
B17 active low
RSVD
A_CCD1#/A_CD1# C15 CBB_CD1# 28 RSVD C18
A_CCD2#/A_CD2# E5 CBB_CD2# 28 RSVD F19 G7 GND
A3 CBB_VS1# 28 G8 SCD1U16V
A_CVS1/A_VS1# GND
A_CVS2/A_VS2# E8 CBB_VS2# 28 RSVD N17 G13 GND
RSVD A15 H13 GND
A_RSVD/A_D14 B13 CBB_D14 28 RSVD K15 J9 GND
A_RSVD/A_D2 D2 CBB_D2 28 J10 GND Place it near to chip
A_RSVD/A_A18 C10 CBB_A18 28 J11 GND
PCI7411 K9 GND U1-4
K10 GND
K11 GND
PCI7411 L8 GND
L9 GND
L10 GND
L11 GND
L12 GND
M8 GND
1 1

PCI7411

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TI PCI7411 GHK (2 of 2)
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 27 of 51
A B C D E
A B C D E

PCMCIA Socket Cardbus I/F


CBB_IORD# 27
CBB_IOW R# 27
CBB_OE# 27
1394 Connector
CBB_W E# 27
CBUS1 CBB_REG# 27
CBB_RDY 27
CBB_W P 27
69 CBB_RESET 27
CBB_W AIT# 27
4 1 CBB_INPACK# 27 4

35 L29
CBB_D3 2 CBB_CE1# 27 DLW 21SN900SQ2-U
CBB_CD1# 36 CBB_CE2# 27 3 4
26 1394_TPA0P
CBB_D4 3 6
CBB_D11 CBB_BVD1# 27 TPA0+
37 CBB_BVD2# 27 4
CBB_D5 4 2 1 TPA0- 3
CBB_CD1# 27 26 1394_TPA0N
CBB_D12 38 TPB0+ 2
CBB_D6 CBB_CD2# 27
5 CBB_VS1# 27
CBB_D13 39 3 4 TPB0- 1
CBB_VS2# 27 26 1394_TPB0P
CBB_D7 6 5
CBB_D14 40
CBB_CE1# 7 2 1
26 1394_TPB0N
CBB_D15 41 DLW 21SN900SQ2-U SKT2

1
CBB_A10 8 MLX-CONN4A-R-U
CBB_CE2# 42 R324 R325 R326 R327 L28
VCC_ASKT_S0 CBB_OE# 9
CBB_VS1# 43 56R2J 56R2J 56R2J 56R2J
CBB_A11 10

2
CBB_IORD# 44 26 1394_TPBIAS0
1

CBB_A9 11 CBB_D10 27

1
CBB_IOW R# 45 CBB_D9 27

1
DY CBB_A8 12 C289 R328
CBB_D1 27
2

C739 C765 C768 C767 CBB_A17 46 C286


CBB_D8 27
CBB_A13 13 SC220P 5K1R2
CBB_D0 27

2
CBB_A18 47 SC1U10V3ZY
CBB_A0 27

2
SC10U10V5ZY-L SC1000P50V CBB_A14 14 CBB_A1 27
SC10U10V5ZY-L SCD1U CBB_A19 48 CBB_A2 27
3 CBB_W E# 15 3
CBB_A3 27
CBB_A20 49 CBB_A4 27
CBB_RDY 16 CBB_A5 27
CBB_A21 50 CBB_A6 27
17 CBB_A25 27
VPP_ASKT_S0 51 CBB_A7 27
18 CBB_A24 27
52 CBB_A17 27
CBB_A16 19 CBB_A9 27
1

CBB_A22 53 3D3V_CR_S0
CBB_A11 27
C766 CBB_A15 20
SCD1U CBB_A10 27
CBB_A23 54 CBB_D15 27
2

CBB_A12 21 CBB_D7 27
CBB_A24 55 CBB_D13 27
CBB_A7 22 CBB_D6 27
CBB_A25 56 CBB_D12 27
CBB_A6 23 CBB_D5 27

1
CBB_VS2# 57 CBB_D11 27
CBB_A16 CBB_A5 24 CBB_D4 27 MS_D[1..3] 26
CBB_RESET 58 C763 C280 C279
CBB_D3 27

2
1

CBB_A4 25 CBB_D14 27
R592 CBB_W AIT# 59 SCD1U16V
DUMMY-R2 CBB_D2 27
CBB_A3 26 CBB_A18 27
CBB_INPACK# 60 CR1 SCD1U16V SC1U10V3ZY
CBB_A12 27
CBB_A2 27 26 SD_W P SD_W P 20 4
CBB_A8 27
CBB_REG# 61 MS_CLK 1 2 SD_CLK_R 5 3
CBB_A13 27
1 2

0R2-0
Place close to pin 19. CBB_A1
CBB_BVD2#
28 CBB_A23 27
R233
MSCSDIO
6 2 MSCBS
MS_D3
62 CBB_A22 27 7 1
DY C764 CBB_A0 29
2 DUMMY-C2 CBB_A15 27 2
CBB_BVD1# 63 MS_D1 8 9 MS_D2
CBB_A20 27
CBB_D0 30 23
CBB_A21 27
CBB_D8 64 22
CBB_A19 27
CBB_D1 31 MH2 MH1
CBB_A16 27
2

CBB_D9 65 SD_CD# 21
CBB_A14 27 26 SD_CD#
CBB_D2 32 MS_D2 14 15
CBB_D10 MSCSDIO MS_D3 MS_CD# 26
DY 66 26 MSCSDIO 13 16
Clock AC termination CBB_W P
CBB_CD2#
33
67
MS_D1
MSCBS
12
11
17
18
MS_CLK_R 1 2 R591
0R2-0
MS_CLK 26
26 MSCBS
33MHz clock for 32-bit 34
68
10 19

Cardbus card I/F VCC_ASKT_S0 70 SKT-SCDB2A0101


1

SKT1 3D3V_CR_S0
R627 CARDBUS68P-9 1 2
DUMMY-R2
47K
DY 3 4

CARDBUS-SKT45-U1
2

2
POWER SWITCH F4
1

FUSE-1A6V-GP
C777 U78 3D3V_S0
SCD01U16V2KX
2

1
2 GND IN 5
3 NC
1 26 MC_PW R_CTRL 4 ON/OFF# OUT 1 1

AAT4250-U
Wistron Corporation

1
74.04250.03F
C785 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
C784 SCD1U16V Taipei Hsien 221, Taiwan, R.O.C.

2
SC1U10V3ZY
Title

PCMCIA SLOT / 1394 CONN.


Size Document Number Rev
A3
W37 SB
Date: W ednesday, March 23, 2005 Sheet 28 of 51
A B C D E
A B C D E

Close to Pin121,Pin122 3D3V_LAN_S5


3K6R3 R557 R380 is used only at
LAN_X1 1 2
PCI_C/BE#3 18,26,31 RTL8110S(B) application
PCI_C/BE#2 18,26,31 3D3V_S5 3D3V_LAN_S5

1
R237
PCI_C/BE#1 18,26,31 U77 C224 and only at 93C56 is
LAN_X2 1 2
DY PCI_C/BE#0 18,26,31
EECS_3
EESK
1
2
CS VCC 8
7 SCD1U16V
used. L16 BLM11A601S
D3.3V
SK DC

2
DUMMY-R2 EEDI 3 6 1 2
PCI_AD[31..0] 18,22,26,31 DI ORG
EEDO 4 5
DO GND
X2

1
1 2 M93C46-W -3
R381 value should be 5.6K C236
XTAL-25MHZ-35 SC10U10V5ZY C247 C246 C713 C268 C285 C288 C269
at RTL8100CL application,

2
1

1
4 1 2 3D3V_LAN_S5 4
C222 C223 and 2.49K at RTL8110SBL
DY 10KR2 R571 SCD1U16V SCD1U16V SCD1U16V SCD1U16V
application.
2

SC27P50V2JN 2 SC27P50V2JN 3D3V_LAN_S5 SCD1U16V SCD1U16V SCD1U16V

1 2
3D3V_LAN_S5
R236

3
5K6R3F
CTRL25 1 Q17
CLOSE TO LAN CHIP BCP69T1-U
D2.5V DVDD

2
R285 0R5J-1
1 2

PCI_AD0
PCI_AD1
MDI0+

MDI1+
MDI0-

MDI1-

EECS_3
LAN_X2

LAN_X1

100M_LED#
ACTIVE_LED#

10M_LED#

EEDO
EESK

EEDI

1
LAN_RTSET
DY DY DY DY
1

C264 C266
R234 R235 R98 R99 C239 C287 C225 C265 C267 C270 C248 C226 C238

2
SCD1U16V3KX SC22U10V6ZY-U
49D9R2F 49D9R2F 49D9R2F 49D9R2F
SCD1U16V3KX SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2

SCD1U16V SCD1U16V SCD1U16V SCD1U16V


1

128
127

126

125

124

123

122

121

120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U36

C221 C131

AVDD18

CTRL18

XTAL2

XTAL1

LED0
VDD18
LED1
LED2
LED3

VDD18

VDD33

PCIAD0
PCIAD1
EEDO
AVDDH

GND

GND
VSS

VSS

VSS

EESK

EEDI

EECS
LANWAKE
RSET

VSSPST
2

SCD01U16V2KX SCD01U16V2KX
3 3

DVDD AVDD25
1 102 PCI_AD2
30 MDI0+ MDI0+ PCIAD2 R256
30 MDI0- 2 MDI0- VSSPST 101
AVDDL 3
4
AVDDL GND 100
99 DVDD
1 2 A2.5V
VSS VDD18 PCI_AD3 0R0805-PAD
30 MDI1+ 5 MDI1+ PCIAD3 98

1
6 97 PCI_AD4
30 MDI1- AVDDL MDI1- PCIAD4 PCI_AD5
7 AVDDL PCIAD5 96
CTRL25 8 95 PCI_AD6 C240 C243
CTRL25 PCIAD6

2
9 94 SCD1U16V SCD1U16V
VSS VDD33 3D3V_LAN_S5
10 93 PCI_AD7
AVDDH PCIAD7 PCI_C/BE#0
11 HSDAC+ CBEB0 92
AVDD25 12 91
HSDAC- VSSPST PCI_AD8
13 VSS PCIAD8 90
14 89 PCI_AD9
MDI2+ PCIAD9
15 MDI2- M66EN 88
16 87 PCI_AD10
AVDDL PCIAD10 PCI_AD11
17 VSS PCIAD11 86
18
19
MDI3+ PCIAD12 85
84
PCI_AD12
A3.3V AVDDL

AVDDL MDI3- VDD33 PCI_AD13


20 AVDDL PCIAD13 83 3D3V_LAN_S5 1 2
21 82 PCI_AD14
VSSPST PCIAD14 BLM11A601S L14
22 GND VSSPST 81

1
ISOLATE 23 80 DY
0R2-0 R287 ISOLATE# GND PCI_AD15
24 VDD18 PCIAD15 79
1 2 LAN_INTA# 25 78 DVDD
182 INT_PIRQH# INTA# VDD18

2
PCI_C/BE#1 C237 C220 C242 C244 C245 C241 2
3D3V_LAN_S5 26 VDD33 CBEB1 77
18,26,27,31,34 PCIRST_BUF# 27 PCIRST# PAR 76 PCI_PAR 18,26,31
18,22 CLK33_LAN 28 75 SC10U6D3V5MX SCD1U16V SCD1U16V SCD1U16V
PCICLK SERR# PCI_SERR# 18,26,31
29 74 SCD1U16V SCD1U16V
18 PCI_GNT#2 GNT# NC
18 PCI_REQ#2 30 REQ# GND 73
PME#_LAN 31 72
DVDD PME# NC
32 VDD18 VDD33 71
3D3V_S0 PCI_AD31 33 70
PCIAD31 PERR# PCI_PERR# 18,26,31
PCI_AD30 34 69
PCIAD30 STOP# PCI_STOP# 18,26,31
35 GND DEVSEL# 68 PCI_DEVSEL# 18,26,31
PCI_AD29 36 67
PCIAD29 TRDY# PCI_TRDY# 18,26,31
1

PCI_AD28 37 66
R258 PCIAD28 VSSPST
38 VSSPST CLKRUN# 65 PM_CLKRUN# 18,34
1KR2F
PCIAD27
PCIAD26

PCIAD25
PCIAD24

PCIAD23

PCIAD22
PCIAD21

PCIAD20

PCIAD19

PCIAD18
PCIAD17
PCIAD16

FRAME#
VSSPST
CBEB3

CBEB2
VDD33

VDD18

VDD18

VDD33

VDD18
IRDY#
IDSEL

3D3V_LAN_S5
GND

GND

GND
2

ISOLATE
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

RTL8100CL-U
1

R257 ACTIVE_LED# 30
15KR2
Q18
K 22

PCI_FRAME#
2

PCI_C/BE#3

PCI_C/BE#2

DY DTC124EUA-U1 10M_LED#
K 22

10M_LED# 30
PCI_IRDY#
PCI_AD27
PCI_AD26

PCI_AD25
PCI_AD24

PCI_AD23

PCI_AD22
PCI_AD21

PCI_AD20

PCI_AD19

PCI_AD18
PCI_AD17
PCI_AD16
LAN_IDSEL

DVDD

1 3 1 100M_LED# 100M_LED# 30 1
21,34 PME#_SB

3D3V_LAN_S5
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


0R2-0 R286 R323 Taipei Hsien 221, Taiwan, R.O.C.
1 2
100R2 Title
PCI_IRDY# 18,26,31
LAN RTL8100CL
1

PCI_FRAME# 18,26,31
PCI_AD23 Size Document Number Rev
PME#_LAN A3
W37 SB
Date: Friday, April 15, 2005 Sheet 29 of 51
A B C D E
A B C D E

LAN Connector 10/100


Green - 100M
Yellow - Active
3D3V_LAN_S5 Orange - 10M

1.route on bottom as differential pairs.

1
4 R97 R73 4
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. C90
SCD1U 470R2 470R2
3.No vias, No 90 degree bends.

2
4.pairs must be equal lengths.

2
5.6mil trace width,6mil separation.
6.36mil between pairs and any other signal trace.
7.12 mil between other paires.
8.Must not cross ground moat .
RJ1
10
29 ACTIVE_LED# ACTIVE_LED# B2
XF1
B1
MDI0+ 7 10 RJ45-1 RJ45_8
29 MDI0+ TD+ TX+
MDI0- 8 9 RJ45-2 RJ45_7
29 MDI0- TD- TX- RJ45-6 RJ45_6
RD+ 1 RJ45_5
6 CT RD- 2 RJ45_4
14 RJ45-3 RJ45_3
CT RJ45-3 RJ45-2
11 CT RX+ 16 RJ45_2
3 15 RJ45-6 RJ45-1 RJ45_1
CT RX-
29 10M_LED# A3

8
7
6
5
XFORM-112 RN6 A2
SRN75J
29 100M_LED# 100M_LED# A1
3 3
RJ11_2

1
2
3
4
RJ11_1
9

MDI1- SKT-RJ45+RJ11-2
29 MDI1-
MDI1+
29 MDI1+
Connector change
C110
For Modem Cable from MDC
SC1KP2KV
SB
L31
TRING1 NS
3 1 2 TIP
1 BLM18HG102SN1D
C119 C118 2 1 2 RING
1

DY 4 BLM18HG102SN1D

1
L32 C818
CON2-10-U2
2

SCD1U16V SCD1U16V SC1KP2KV

2
DYSC1KP2KV DY
C817
Co-Layout with L52

2 2

10/100 LAN Transformer RJ45 PIN

TD+ --> TX+ RJ45-1


TD- --> TX- RJ45-2

RD+ --> RX+ RJ45-3


RD- --> RX- RJ45-6

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN Connector
Size Document Number Rev
A3
W37 SB
Date: Monday, April 18, 2005 Sheet 30 of 51
A B C D E
A B C D E

3D3V_S0

1
C790 C299 C789 C788 C787 C298 C297

SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC4D7U10V5ZY

2
4 4

18,22,26,29 PCI_AD[31..0] 5V_S0

1
C316
MINI1 SC4D7U10V5ZY

2
125
1 2

3 4
5 6
7 8
9 10 PIN 3-16 : LAN RESERVE
17 802.11_ACT 11 12
34 W IRELESS_EN 13 14
15 16
1

INT_PIRQE# 17 18 5V_S0
R648 19 20 INT_PIRQE# 18,26
10KR2 3D3V_S0
21 22
TPAD30 TP102 23 24
18,22 CLK33_MINI 25 26 PCIRST_BUF# 18,26,27,29,34
2

27 28 3D3V_S0
3 29 30 3
18 PCI_REQ#1 PCI_GNT#1 18
31 32
PCI_AD31 33 34 CBUS_PME# 26
PCI_AD29 35 36
37 38 PCI_AD30
PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
43 44 PCI_AD26
PCI_C/BE#3 45 46 PCI_AD24
18,26,29 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 R340 PCI_AD21
49 50 10R2
PCI_AD21 51 52 PCI_AD22
PCI_AD19 53 54 PCI_AD20
55 56 PCI_PAR 18,26,29
PCI_AD17 57 58 PCI_AD18
PCI_C/BE#2 59 60 PCI_AD16
18,26,29 PCI_C/BE#2
18,26,29 PCI_IRDY# 61 62
63 64 PCI_FRAME# 18,26,29
1 2 R647 MINI_CLKRUN# 65 66 PCI_TRDY# 18,26,29
10KR2 67 68
18,26,29 PCI_SERR# PCI_STOP# 18,26,29
69 70
18,26,29 PCI_PERR# 71 72 PCI_DEVSEL# 18,26,29
PCI_C/BE#1 73 74
18,26,29 PCI_C/BE#1
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
PCI_AD12 79 80 PCI_AD11
PCI_AD10 81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0
2 PCI_C/BE#0 18,26,29 2
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4
93 94 PCI_AD2
PCI_AD3 95 96 PCI_AD0
5V_S0 97 98
PCI_AD1 99 100 P_SERIRQ 18,26,34,37
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122

123 124
126

SPD-CONN124A-1-U

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI-PCI
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 31 of 51
A B C D E
5 4 3 2 1

5V_AUDIO_S0
5V_AUDIO_S0
SUBWOOFER CONN.
DY R644 DUMMY-R3

1
5V_W OOF_S0

1
1 2 AC97_BITCLK_ALL 1 2 R367
21 AC97_BITCLK_SB 28K7R3F DY
47R3 R643 3D3V_S0 5V_S0 C341 AUD_AGND

2
U53 LM4991LD 2 C336
U79 U54 1
SB

2
5 1 BITCLK_BUFF SCD1U16V
VCC A 5VA_SET
1 SHDN# SET 5 DY
2 AC97_RST# 2 SC22P50V2JN-1 33 W OF_MUTE W OF_MUTE 1 9 CN7
B GND SHUTDOWN GND

1
3 4 2 8 W OOFER+ 3
IN OUT R368 BYPASS VO2
D
24 AC97_BITCLK 1 2 4 Y GND 3 3 +IN GND 7 1 D
10KR3F W OOFER_OP 1 2 R365 4 6 2
-IN VDD

1
47R3 R642 NC7SZ08-U C816 C339 G913C-U C342 10KR3 5 W OOFER- 4
VO1

1
SB DY

2
R645 SC10U10V5ZY SC1U10V3KX SC10U10V5ZY DY CON2-10-U2

2
10KR3 DY C338 DY

2
EC135 EC136
AUD_AGND SC4D7U10V5ZY AUD_AGND
2 VREFOUT1 AUD_AGND SC680P SC680P
AUD_AGND DY DY
R845
DY
VREFOUT2 W OOFER_OPX 1 2 1 R364 2
ADAF2 5V_AUDIO_S0 3D3V_S0 10KR3
ADAF1 1 2 C337
VREFOUT1 0R2-0 SC33P50V2JN
DY
CODECVREF
DY

1
output is 2.5W when Rf is 15K,speaker is 4 ohm
1

1
C786 C331

2
C313 C796 C312 5V_OP_S0 5V_W OOF_S0

2
SCD1U SCD1U DY
2

2
1 2 R363
C329 C327 C328 C333 C332 C330 C334 0R5J-1
DY

1
SCD1U SC1000P50V2KX SCD1U SCD1U AUD_AGND SCD1U SCD1U SCD1U
SC1000P50V2KX SC1U10V3KX SC10U10V5ZY C335
SC10U10V5ZY

2
1 2 C324 DY

29
30

31
32

27
28
34

33
40

38
25

9
1

2
AUD_AGND U52 SC22P50V2JN-1
C X8 AUD_AGND C

AFILT1
AFILT2

NC#33
NC#40
VRAD

FRONT-MIC

AVDD
AVDD

VDD
VDD
VRDA

VREF
VREFOUT
1 2 C325

1
SC22P50V2JN-1
X-24D576MHZ-13
14 2 XTALIN_CODEC
AUX-L XTL-IN XTALOUT_CODEC
15 AUX-R XTL-OUT 3
G61 G67
1 2 1 2
16 48 SPDIF_OUT 1 2 R646
JD2 SPDIFO S/PDIF 33
17 47 0R3-U GAP-CLOSE GAP-CLOSE
JD1/GPIO1 SPDIFI/EAPD
SUR_LIN_L 1 2 C365 AUDLINL EAPD 33
1 2 C367 SC1U10V3KX AUDLINR
SUR_LIN_R SC1U10V3KX AC97_DATIN
39 SURR-OUT-L SDIN 8 2 1 R362 AC97_DIN0 21 AUD_AGND AUD_AGND
41 5 22R3 G86 G69
SURR-OUT-R SDOUT
SOUND_L 1 2 1 2
SOUND_R AC97_DOUT 21,22,24
23 45 GAP-CLOSE GAP-CLOSE
LINE-L JD0/GPIO0
1

24 LINE-R XTLSEL 46 1 2 R354 XTSEL HI: USE 24.576M XTAL


C315 C326 DY 0R2-0 XTSEL LOW: USE 14.318M CLK FROM CLK GEN
SC1000P50V2KX SC1000P50V2KX AUD_AGND AUD_AGND
2

35 6 AC97_CBITCLK 2 1 R654 BITCLK_BUFF


FRONT-OUT-L BITCLK 33R3
AUD_AGND AUD_AGND 36 10
FRONT-OUT-R SYNC
1 2 R653
DY 10KR3
33 LFE_MIC_R 2 1 C366 AUD_MICIN1 21 MIC1 RESET# 11 AC97_SYNC 21,24
1 2 SC1U10V3ZY 22 AC97_RST# 21,24
MONO-OUT-R

33 CENTER_MIC_L MIC2
C368 SC1U10V3ZY
CEN-OUT

PC-BEEP
LFE-OUT

B B
CD-GND

PHONE

AGND
AGND
CD-R
CD-L

GND
GND

ALC655-U
18
20
19

37

43
44

12
13

26
42

4
7

25 CD_AUDL 1 2 R396 CDAUDL 1 2 C362 CDAUD_L


75R3F SC1U10V3KX
R398 AUD_AGND
25 CD_AGND 1 2 CDAGND 1 2 C363 CDAUD_GND
SC1U10V3KX R361
GAP-CLOSE-PW R AUD_PC_BEEP 2 1 C323 AUD_BEEP 2 1 AUD_SYS_BEEP
1 2 R399 CDAUDR 1 2 C364 CDAUD_R TP104 SCD1U G66 G62
25 CD_AUDR
1

SC1U10V3KX TPAD30 4K7R3 1 2 1 2


1

75R3F R394
R400 R397 R395 SC2200P50V2KX 2K2R3 W OOFER_OPX GAP-CLOSE GAP-CLOSE
100KR3 100KR3 100KR3 C361
2

5V_W OOF_S0 5V_W OOF_S0 AUD_AGND AUD_AGND


2

SB C805 1
G63
2 1
G70
2
2

R668
AUD_AGND AUD_AGND AUD_AGND 1 2
DY
SB GAP-CLOSE GAP-CLOSE

10KR2
SCD022U16V2KX AUD_AGND AUD_AGND
A DY A
1

DY DY U81
33 SOUND_OP_L 1 2 C806 1 2 R669 1 IN+ VDD 5
SCD1U16V 10KR2
2 R358
1 2 1 C322 PCI_SPKR 26 33 SOUND_OP_R 1 2 C807 1 2 R670
2
3
VSS
IN- OUT 4 1 2 C808 W OOFER_OP Wistron Corporation
0R3-U SC4D7U10V5ZY SCD1U16V 10KR2 SCD1U16V 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

DY DY R671 MAX4490AXK-T Taipei Hsien 221, Taiwan, R.O.C.


AUD_SYS_BEEP 2 R359
1 2 1 C321
DY
0R3-U SC4D7U10V5ZY SPKR_SB 21 Title
DY
2 R360
1 2 1 C360 KBC_BEEP 34
10KR2
DY
AUDIO (1/2) -- CODEC VT1612A
1

0R3-U SC4D7U10V5ZY Size Document Number Rev


A3
W37 SB
AUD_AGND Date: Thursday, March 24, 2005 Sheet 32 of 51
5 4 3 2 1
A B C D E

5V_S0
SPKR_L+ C349 R_BYPASS C800 5V_S0
KBC_MUTE 34
SC680P SC1U50V5ZY 5V_OP_S0

2
SPKR_L- C804
R374 5V_S0 SC680P L_BYPASS C801
10KR2 SPKR_R+ C344 SC1U50V5ZY 1 2 R366
5V_S0 SC680P 0R5J-1

10

14
U50C SPKR_R- C797

1
U80 TSAHCT125 5V_OP_S0 SC680P AUD_AGND
5 1 8 9 C340
VCC A SC4D7U10V5ZY

2
5V_AUDIO_S0 2 D29 DY S/PDIF_PW R 1 2 C343
B EAPD 32
2 SCD1U16V

7
4 G1421_MUTE 4 3 AUD_AGND 4
Y GND HP_IN#
NC7SZ32-U
3
SB
1

Lin-In
R415
DUMMY-R2 HP_L 1 2 C348 BAV99LT1
DY SC150P
SKT-JACK-126-GP
SOUND_OP_L 1 2 C375 HP_L_1 1 2 R378 1 2 R377
SC10U10V5ZY-L 22KR2J 33KR2F 5V_OP_S0
2

R410 MH2 MH2


VOL_AUDIO L_LINE_IN C803 5V_OP_S0 MH1 MH1

1
SC220P 2 1 LINE_INR_A_R 6
SOUND_OP_L 1 32 SUR_LIN_R NC#6
2 C374 L_LINE_IN_1 1 2 R417 1 2 R416 R370 0R0402-PAD 5 NC#5
2

2
SCD33U16V3ZY 18KR2F 22KR2J Q20 10KR2 4
R411 AGND
R414 5V_OP_S0 E PDTA124EU 3
0R2-0 LINE_INL_A_R RIGHT
32 SUR_LIN_L 2 1 2 LEFT

2
B 1 AGND
1

1
1 HP_IN#
0R0402-PAD
1

C802 U57 R408 R409 C372 C373


SC1U10V3ZY 22KR2J 22KR2J SC100P SC100P LIN1
2

2
1
C
AUD_AGND 4 3 SPKR_L+
AUD_AGND HP_L LLINEIN LOUT+ SPKR_L- C347 AUD_AGND
5 LHPIN LOUT- 10

2
L_BYPASS 6 SCD1U16V AUD_AGND AUD_AGND
LBYPASS

2
7 14 HP_IN
LVDD SE/BTL# AUD_AGND AUD_AGND
HP/LINE# 16
2 R375
1 TPA1421_SD_R 8 11 G1421_MUTE
34 TPA1421_SD SHUTDOWN MUTEIN

1
10KR2 2 9
TJ MUTEOUT R373 AUD_AGND
AUD_AGND 17 HP-IN GND/HS 1
5V_OP_S0 VOL_AUDIO 23 12 100KR2 VREFOUT1
VOL GND/HS
1

MIC-In
3 13 3
R376 GND/HS AUD_AGND
18 RVDD GND/HS 24

2
1

100KR2 R_BYPASS 19 AUD_AGND


RBYPASS

1
C799 HP_R 20 15 SPKR_R-
SC1U10V3ZY RHPIN ROUT- SPKR_R+ R401 R407 R402
21 22
GND
RLINEIN ROUT+
2

AUD_AGND
AUD_AGND
G1421BF3U
34 W OF_SHUTDOW N W OF_SHUTDOW N
DY
100KR2 3KR2F 3KR2F SB JK1
25

2
5V_S0 1
AUD_AGND AGND
32 LFE_MIC_R 1 2 R404 0R2-0 2 LEFT
U56 3
AUD_AGND HP_IN RIGHT
5 VCC A 1 4 AGND
R_LINE_IN 5
W OF_SHUTDOW N NC#5
B 2 32 CENTER_MIC_L 1 2 R405 0R2-0 6 NC#6
MH1 MH1

1
SOUND_OP_R 1 2 C346 R_LINE_IN_1 1 2 R412 1 2 R413 32 W OF_MUTE W OF_MUTE 4 3 MH2
SCD33U16V3ZY 18KR2F 22KR2J Y GND R406 R403 MH2
SB

1
C798 NC7SZ32-U C370 C369
SC220P 22KR2J 22KR2J SKT-JACK-125-GP
SC100P SC100P
DY

2
SOUND_OP_R 1 2 C371 HP_R_1 1 2 R371 HP_R 1 2 R372 AUD_AGND
SC10U10V5ZY-L 22KR2J 33KR2F
1 2 C345 AUD_AGND AUD_AGND AUD_AGND AUD_AGND
SC150P

2 Line-Out U55 DY 5V_OP_S0


2

2 R369
SB HP_IN
2
3
4
GND
NC
IN 5

1
1
0R2-0
S/PDIF_PW R
ON/OFF# OUT

SPKR_L+ 1
SPK1
3
AUD_AGND
AAT4250-U SB SKT-JACK-122
32 SOUND_L SPKR_L- C352
2
4 SC680P MH2 MH2
1

MH1 MH1
R655 10 GND
7

2K2R3 CON2-10-U2 9
VR1 GND
6 32 S/PDIF 1 2 R384 S/PDIF_R 8 D_GND
3 VR-10K-37 0R2-0 7 VCC
2

SOUND_OP_L 2 1 2 R383
DY 6
32 SOUND_OP_L SOUND_OP_R 21,22 SPDIF_OUT_STRAP 0R2-0 HP_IN# VIN
5 6

32 SOUND_OP_R 5 5 HP_IN#
1 SPKR_L+ 1 2 TC21 SPKR_L+2 1 2 R380 SPKR_L_A1 4
3

GND
1

ST100U6D3VDM-2 22R2 3
R656 SPKR_R+ SPRK_R
1 2 TC22 SPKR_R+2 1 2 SPKR_R_A1 2 SPRK_L
4

2K2R3 ST100U6D3VDM-2 R381 22R2 1 A_GND


G64

1
1 2
2

R379 R382 C350 C351


GAP-CLOSE 1KR2 1KR2 SC680P SC680P LOUT1
32 SOUND_R
G65
ETY-CON2-R1 1 2

2
3

AUD_AGND AUD_AGND AUD_AGND


1 AUD_AGND SPK2 GAP-CLOSE 1
SPKR_R+ 2 G85 AUD_AGND AUD_AGND
SPKR_R- 1 1 2

GAP-CLOSE Wistron Corporation


G60 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
4

1 2 Taipei Hsien 221, Taiwan, R.O.C.

GAP-CLOSE Title

1
G68
2 Audio AMP and Jack
Size Document Number Rev

AUD_AGND
GAP-CLOSE A3
W37 SB
Date: Friday, April 15, 2005 Sheet 33 of 51
A B C D E
5 4 3 2 1

KCOL[1..16] 35
KROW [1..8] 35
1 2 C262
SC10P50V2JN-1
3D3V_AUX_S5
SB

3
L13 BLM11P600S X5
R217 X-32D768KHZ-12-U

SMBC_KBC
SMBD_KBC
1 2 1 2

KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

BT_SDA_5
BT_SCL_5
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
0R3-U

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

2
2

1
D17 C215 1 2 C261

1
1N5819HW -7 C259 C736 C218 C235 C762 C216 SCD1U16V SC10P50V2JN-1

123
136
157
166

161

153
154

163
164
169
170

160
158
C214

16
34
45

95

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

71
72
73
74
77
78
79
80
D D
1

2
SCD1U16V U35
SMBC_KBC 15,23

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

SCL1
SDA1
SCL2
SDA2

XCLKO
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA

XCLKI
VCCBAT
SCD1U16V SCD1U16V SCD1U16V
SCD1U16V SCD1U16V SCD1U16V

18,37 LPC_LAD[0..3] SMBD_KBC 15,23


LPC_LAD0 15 155
LPC_LAD1 LAD0 GPIO29 KBC_MATRIX1 35
14 LAD1 GPIO28 149 KBC_MATRIX0 35
LPC_LAD2 13 148
5V_S0 LPC_LAD3 LAD2 GPIO27
10 LAD3 GPIO26 119
118 CHG_ON#
R582 10KR2 GPIO25 AD_OFF CHG_ON# 48
18,37 LPC_LFRAME# 9 LFRAME# GPIO24 109 AD_OFF 49
1 2 TDATA 18 108 A20 3D3V_AUX_S5
TCLK 18,22 CLK33_KBC LCLK GPIO23 E51TXD TP43 TPAD28 SRN4D7KJ
1 2 7 107 RN72
R581 10KR2 18,26,31,37 P_SERIRQ SERIRQ GPIO22 E51RXD TP45 TPAD28
GPIO21 106 49 BT_SCL_5 2 3
105 E51CS# TP44 TPAD28 1 4
GPIO20 49 BT_SDA_5
1

KBCBIOS_RD# 150 86 STBY_LED# 17


C737 36 KBCBIOS_RD# KBCBIOS_WE# RD# GPIO19
36 KBCBIOS_W E# 151 WR# GPIO18 85 MXM_CD 15
SCD1U KBCBIOS_CS# 173 75 KBC_PW RBTN# 1 2 R254
36 KBCBIOS_CS# MEMCS# GPIO17 INTERNET 35
2

10KR2
TPAD28 TP52
36 KBC_D[0..7]
KBC_D0
152

138
IOCS# GPIO16
GPIO15
70
69
63 TP105
SB
TPAD28
FAN_ON 35
PM_SLP_S5# 21,44
AC_IN#
DY
1 2 R255
KBC_D1 D0 GPIO14 R664 10KR2
139 D1 GPIO13 62 1 2 DY PM_SUS_STAT# 21 DY
KBC_D2 140 55 FnLock# 0R2-0
KBC_D3 D2 GPIO12 CAP_LED#
141 D3 GPIO11 54 CAP_LED# 17 TP90 TPAD28 BT_TH 1 2 R284
KBC_D4 144 48 DY 10KR2
D4 GPIO10 W LANONLED_KBC 17 R230
KBC_D5 145 22
23 S5_ENABLE KBC_D6 D5 GPIO09 KBC_MUTE TP46 TPAD28 KBC_LID#
146 D6 GPIO08 21 KBC_MUTE 33 1 2
C KBC_D7 147 20 C
D7 GPIO07 FAN3FB
36 A0 124
125
A0
GPIO06
GPIO05
12
11
8
FAN3PW M
R283
SB KBC_MATRIX1
DY
1
100KR2
2
10KR2
R590
36 A1 A1 GPIO04 KBCRST# W LAN_BUTTON 35
36 A2 126 A2 GPIO03 6 1 2 10KR2 KBRCIN# 21 KBC_MATRIX0
RSMRST#_KBC 127 5 1 2 1 2 R278
21 RSMRST#_KBC 36 A3 A3 GPIO02 R676 10KR2 KA20GATE 21 10KR2
36 A4 128 A4 GPIO01 4 DY
PM_PW RBTN# 131 3
21 PM_PW RBTN# 36 A5 A5 GPIO00 BT_TH 48,49
36 A6 132 A6
36 A7 133 A7 GPIO0F 41
143 28 ECSMI#_KBC 3D3V_S5
36 A8 A8 GPIO0E ECSMI#_KBC 21
142 27 W IRELESS_EN
36 A9 A9 GPIO0D W IRELESS_EN 31
36 A10 135 A10 GPIO0C 25 PM_CLKRUN# 18,29

1
36 A11 134 A11 GPIO0B 24 FPBACK 17
130 23 NUM_LED# NUM_LED# 17 R282
AD_IA 36 A12 A12 GPIO0A 100KR2
48 AD_IA 36 A13 129 A13
36 A14 121 A14 GPIO1F 98 PW R_LED# 17 DY
36 A15 120 A15 GPIO1E 97

2
36 A16 113 A16 GPIO1D 94
36 A17 112 A17 GPIO1C 93

1
36 A18 104 A18 GPIO1B 92
3D3V_AUX_S5 103 91 C263
A19 GPIO1A CHG_LED# 17
SC1U10V3ZY

2
168 VCC3VSB DY
GPIOI2D
1

35 TDATA 117 PSDAT3 GPIO2F 175 CPU_SW ITCH 42


R228 35 TCLK 116 171
10KR2 PSCLK3 GPIO2E KBC_PCIRST# TPA1421_SD 33
115 PSDAT2 GPIO2C 165 1 2 R281 PCIRST_BUF# 18,26,27,29,31
114 162 BL_ON 0R2-0
PSCLK2 GPIO2B
111 PSDAT1 GPIO2A 156 CHK_PW # 36
2

B E51CS# B
110 PSCLK1 R280
1 2 GMCH_BL_ON 13
0R2-0

BATGND
5V_S0 3D3V_AUX_S5 3D3V_S5

ECRST#
RN71
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7

ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0

AGND
8 1 PS2_DAT2 R279

GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
7 2 PS2_CLK2 1 2
PS2_DAT1 MXM_BL_ON 15
6 3

1
5 4 PS2_CLK1 KB3910SF 0R2-0
43
40
39
38
37
36
33
32

2
26
29
30
44
76
172
176

99
100
101
102
1
42
47
174

81
82
83
84
87
88
89
90

19
31

96
159

17
35
46
122
137
167
DY R276 R589
SRN10K-2 10KR2 10KR2
KBC_BEEP

3D3V_AUX_S5
ECSWI#

GMODULE_RST#

AC_VOL_SENSE
RSMRST#_KBC

ECSCI#_KBC

1 2
3D3V_AUX_S5

1
PM_PWRBTN#

BRIGHTNESS
S5_ENABLE

EC_RST# R584
KBC_PME#

BT_SENSE

G
1

10KR2 Q16
1

R272 R252 R251 KBC_PME# 3 2 2N7002


AD_IA

PME#_SB 21,29
2

DUMMY-R2 R273 R277 DUMMY-R2 ECSCI#_KBC 21

2
DUMMY-R2 DY R679

S
DY 100KR2 100KR2 DY 0R2-0
32 KBC_BEEP DY BOOT_BLOCK# 36
2

1
A1 Q41
21 ECSW I#
2

2
A4 C738 R583
A5 49 BAT_IN# AD+ BT+
17 BRIGHTNESS 1 2 1 RSMRST# 23

2
FAN3PW M W OF_SHUTDOW N
FAN3FB 33 W OF_SHUTDOW N TP91 SC10U10V5ZY 10KR2
SB

3
1

TPAD28 R213 CH3906


1

R274 R212
15,18,21,38,39,45 PM_SLP_S3#
1

R271 R275 R250 R253 560KR2F


A 35 KBC_PW RBTN# A
10KR2 100KR2F
48
35
AC_IN#
KBC_LID#
DY
SB
2

10KR2 10KR2 AC_VOL_SENSE


Wistron Corporation
2

BT_SENSE
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


DUMMY-R2 Taipei Hsien 221, Taiwan, R.O.C.
1

DY TP103 TPAD28 R211


DUMMY-R2 AG_RST# 1 2 R229 R214 Title
13,15 AG_RST# 13K3R2F
DY DY 0R2-0
100KR2F SB KBC 3910
SB DY Size Document Number Rev
2

A3
W37 SB
Date: Friday, March 25, 2005 Sheet 34 of 51
5 4 3 2 1
A B C D E

Keyboard matrix ( from vendor )


KROW 8 1 2 C595 SC1000P50V Internal KeyBoard Connector
KROW 7 1 2 C641 SC1000P50V
US Eur Jap Ohter KROW 6 1 2 C594 SC1000P50V
KROW 5 1 2 C640 SC1000P50V
KROW 4 C593 SC1000P50V 34 KROW [1..8]
1 2
KROW 3 1 2 C639 SC1000P50V
KROW 2 C592 SC1000P50V KB2 34 KCOL[1..16]
MATRIXID1# 1 0 1 0 1 2
KROW 1 1 2 C638 SC1000P50V KB1
KCOL16 1 2 C591 SC1000P50V
MATRIXID2# 1 1 0 0 KCOL15 1 2 C637 SC1000P50V
KCOL14 1 2 C636 SC1000P50V 29 29
4 KCOL13 1 2 C590 SC1000P50V KROW 8 1 KROW 8 1 4
KCOL12 1 2 C635 SC1000P50V
KCOL11 1 2 C589 SC1000P50V KROW 7 2 KROW 7 2
3D3V_S5 KCOL10 C634 SC1000P50V KROW 6 KROW 6
SB KCOL9
1
1
2
2 C588 SC1000P50V KROW 5
3
4 KROW 5
3
4

1
COVER SWITCH R232
KCOL8
KCOL7
1 2 C633
C587
SC1000P50V
SC1000P50V
KROW 4
KROW 3
5 KROW 4
KROW 3
5
1 2 6 6
10KR2 KCOL6 1 2 C632 SC1000P50V KROW 2 7 KROW 2 7
DY KCOL5 1 2 C586 SC1000P50V KROW 1 8 KROW 1 8
CVR1 KCOL4 1 2 C631 SC1000P50V KCOL16 9 KCOL16 9

2
3 R231 KCOL3 1 2 C585 SC1000P50V KCOL15 10 KCOL15 10
1 COVER_SW 1 2 KCOL2 1 2 C630 SC1000P50V KCOL14 11 KCOL14 11
100R2 KBC_LID# 34 KCOL1 C629 SC1000P50V KCOL13 KCOL13
2 1 2 12 12
1

1
4 C217 KBC_MATRIX0 1 2 C583 SC1000P50V KCOL12 13 KCOL12 13
C219 3D3V_S0 KBC_MATRIX1 1 2 C584 SC1000P50V KCOL11 14 KCOL11 14
CON2-10-U2 SCD1U SCD22U16V3ZY KCOL10 15 KCOL10 15
2

KCOL9 16 KCOL9 16
KCOL8 17 KCOL8 17
KCOL7 18 KCOL7 18
D2 KCOL6 19 KCOL6 19
2 KCOL5 20 KCOL5 20
KCOL4 21 KCOL4 21
FAN_ON 3 KCOL3 22 KCOL3 22
KCOL2 23 KCOL2 23
1 KCOL1 24 KCOL1 24
25 25
BAV99LT1 26 DY 26
27 KBC_MATRIX1 27
34 KBC_MATRIX1 KBC_MATRIX0
D31 28 28
3 34 KBC_MATRIX0 3
2 30 30

INTERNET 3
ETY-CON28-3 ETY-CON28-3
1
For 17 inch wide
BAV99LT1
D3
2
3D3V_S0
W LAN_BUTTON 3

TouchPad Connector
KBC_MATRIX0 1 2 R505
1 10KR2
KBC_MATRIX1 1 2 R506
BAV99LT1 10KR2
5V_S0

5V_S0

1
C129 C130
SC1U10V3ZY

2
SCD1U16V

1
R507 R510 TPAD1
10KR2 10KR2 7
1

SB

2
3D3V_S0 2
2 34 TDATA 2
34 TCLK 3
4
3D3V_S0

1
LEFT# 5
3D3V_AUX_S5
1

C642 C643 RIGHT# 6


R677 R678 TOUCHPAD BUTTON SWITCH SC33P SC33P 8

2
10KR2 10KR2 5V_S0
5V_S0
1

ETY-CON6-5R
R6 R8
2

1
10KR2 10KR2

1
R112
R111 10KR2
2

10KR2

2
R7 CN1

2
34 KBC_PW RBTN# 2 1 9 1
100R2
1

10 2 1 2 RIGHT#
C6 INTERNET 11 3 1 2 LEFT#
SC1000P50V 34 INTERNET
34 W LAN_BUTTON 12 4 5
2

DY 13 5 5
14 6 3 4
FAN_ON 15 7 3 4
34 FAN_ON
16 8

ETY-CONN8F SW 4
SW 3 SW -TACT-34-U2
SW -TACT-34-U2

1 1
LAUNCH KEY BUTTON
DEFINATION Wistron Corporation
1

C8 C379 C7
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC100P SC100P SC100P Taipei Hsien 221, Taiwan, R.O.C.
2

FAN_CONTROL KROW2 KCOL17 Title

WIRELESS KROW1 KCOL17 LAUNCH / TOUCHPAD / KB CONN


Size Document Number Rev
A3
W37 SB
Date: W ednesday, April 06, 2005 Sheet 35 of 51
A B C D E
5 4 3 2 1

KBC_D[0..7] 34

D D

3D3V_AUX_S5
U41

34 A0 20 A0 DQ0 21 KBC_D0 34
34 A1 19 A1 DQ1 22 KBC_D1 34
34 A2 18 A2 DQ2 23 KBC_D2 34
34 A3 17 A3 DQ3 25 KBC_D3 34
34 A4 16 A4 DQ4 26 KBC_D4 34
34 A5 15 A5 DQ5 27 KBC_D5 34
34 A6 14 A6 DQ6 28 KBC_D6 34
34 A7 13 A7 DQ7 29 KBC_D7 34
34 A8 3 A8
34 A9 2 A9
34 A10 31 A10 CE# 30 KBCBIOS_CS# 34
34 A11 1 A11
34 A12 12 A12
34 A13 4 A13 WE# 7 KBCBIOS_W E# 34
34 A14 5 A14
34 A15 11 A15
34 A16 10 A16 OE# 32 KBCBIOS_RD# 34
34 A17 6 A17
34 A18 9 A18
C 8 24 C
VDD VSS

SST39VF040-70

1
C260
SCD1U16V

2
ROM SIZE MAX. 512KBYTE
3D3V_AUX_S5
1
2

RN13
B B

SRN10KJ
4
3

DY
SW 2
BOOT_BLOCK# 1 5
34 BOOT_BLOCK#
2 6
CHK_PW # 3 7
34 CHK_PW #
4 8

SW -DIP-4-2-U2

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BIOS ROM
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 36 of 51

5 4 3 2 1
A B C D E

4 4

LPC_LAD[0..3] 18,34

TOP VIEW GOLDEN FINGER FOR DEBUG BOARD


5V_S0 U51 5V_S0

A15 (B1)
A1 A1 B1 B1
3
A14 (B2) 13,18 LPC_RST# A2 A2 B2 B2 LPC_RST# 3
LPC_LFRAME# A3 B3 LPC_LFRAME# LPC_LFRAME# 18,34
A3 B3
A4 A4 B4 B4
PCLK_FW H 1 2 R357 PCLK_FW H_2 A5 B5 PCLK_FW H_2
....

18,22 PCLK_FW H
....

0R2-0 A5 B5
A6 A6 B6 B6
LPC_INIT# A7 B7 LPC_INIT#
A7 B7
A2 (B14) A8 A8 B8 B8
LPC_LAD3 A9 B9 LPC_LAD3
A9 B9
A1 (B15) LPC_LAD2 A10 A10 B10 B10 LPC_LAD2
LPC_LAD1 A11 B11 LPC_LAD1
LPC_LAD0 A11 B11 LPC_LAD0
A12 A12 B12 B12
EXT_FW H# A13 B13 EXT_FW H#
A13 B13
A14 A14 B14 B14
3D3V_S0 A15 B15
A15 B15 3D3V_S0
(BOTTOM VIEW)
FOX-GF30

3D3V_S0

U45 DY
Boot Device must have ID[3:0] = 0000 1 A VCC 5
Has internal pull-down resistors 0R2-0 1 2 R341 2
18 FW H_INIT# B EXT_FW H#
All may be left floated 3 GND BE# 4
FPET7 Elec. P3-46 NC7SZ384-1-U

2 2
3D3V_S0

U44 DY
LPC_INIT# 1 5
A VCC
1

1
C301 C317 C300 2
18,26,31,34 P_SERIRQ B
DY 3 4 EXT_FW H#
GND SE
2

2
SC10U6D3V5MX SCD1U16V SCD1U16V NC7SZ66P5X

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Debug (Gold Finger)
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 37 of 51
A B C D E
A B C D E

5V_S0 5V_S5
42 12VGATE_S0 U75
DCBATOUT 1 8
S D
2 S D 7
Q39 3 6
TP0610T
S D
1 2 R553 PM_RUNCTL 2 1 1 2 R556
5V_S0_EN 4 5

2
G D
10KR3 0R2-0

1
AO4422

1
330KR3 EC111

1
1 2 R551 PM_RUNCTL_G R555 SCD1U EC109

2
330KR3 R554 D39 C691 SCD1U

2
1
47KR3 C690 DY

2
R552 DY DUMMY-C2
4 1KR3 4

2
SCD22U25V5ZY MMGZ5242B 3D3V_S0 3D3V_S5
U33

3
D 1 S D 8
Q22_D 1 Q40 2 7
2N7002
S D
G 3 S D 6
S DY R221 1 23D3V_S0_EN 4 5

2
Run Power
G D
0R2-0

1
D AO4422

1
PM_SLP_S3# 1 2 R550 1 Q38 C208 EC59
0R3-U G 2N7002 SCD1U SCD1U EC114

2
1
S SCD1U

2
C689
SC1U10V3KX
2

2D5V_S0 2D5V_S3

U12
DCBATOUT DY 1 8
S D
Q10 ST100U4VBM-1 2 S D 7
DY TP0610T R91 3 S D 6
1 2 R90 PM_RUNCTL_2 2 1 RUNGATE_S0 1 2RUNGATE_S0_R 4 G D 5
10KR3 0R2-0

1
AO4422

1
DY D13 EC99
3

1
1 2 R89 PM_RUNCTL_G2 C112 R68 DY C108 TC23 SCD1U EC89

2
330KR3 330KR3 SCD1U SCD1U

2
1

DY DY MMGZ5242B

2
R88
3 1KR3 3
DY SCD22U25V5ZY
2

D
Q22_D1 Q9
G 2N7002
S DY
2
3

D
15,18,21,34,39,45 PM_SLP_S3# PM_SLP_S3# 1 Q8 12VGATE_S0 1 2 R67 RUNGATE_S0
G 2N7002 0R3-U
S DY
2

12VGATE_S0 1 2 R512 1D8V_EN_S0


0R3-U

1D8V_S0 1D8V_S5

2 2
U74
DCBATOUT DY Q36 1 8
S D
TP0610T 2 S D 7
DY 3 S D 6
1 2 R511 PM_RUNCTL_3 2 1 1D8V_EN_S0 1 2 R508 1D8V_EN_S0_R 4 G D 5
10KR3 0R2-0
1

AO4422
DY D38
3

1 2 R513 PM_RUNCTL_G3 C596 R509 DY


330KR3 330KR3 C597
1

DY DY MMGZ5242B SCD1U
2

1
R514
1KR3 EC34 EC121
DY SCD22U25V5ZY SCD1U SCD1U
2

2
2
3

D
15,18,21,34,39,45 PM_SLP_S3# PM_SLP_S3# 1 Q37
G 2N7002
S DY
2

1 Power On Logic 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PWR CTL LOGIC / PWR PLANE
Size Document Number Rev
A3
W37 SB
Date: Friday, March 25, 2005 Sheet 38 of 51
A B C D E
A B C D E

5V_S5

U31D

14
TSAHCT08-U
PM_SLP_S3# 10
15,18,21,34,38,45 PM_SLP_S3# 1D2V_S0_EN
8 1D2V_S0_EN 45
VRM_PW RGD 9

7
4 4

2D5V_S0 5V_S5

1
R558 R559 5V_S5 5V_S5
10KR3 10KR3 5V_S5
U30A U30B

14
TSAHCT08-U TSAHCT08-U U30D

14
2

2
44 2D5V_S3_PG 2D5V_S3_PG 1 TSAHCT08-U

14
3D3V_S5 3 VDDA_2D5_PG 4
2D5V_S0_PG 2 6 VTT_VDDA_PG 10
5 8 VCORE_EN 42

1
PM_SLP_S3# 9

7
R149 C692 C693

7
3 DY 10KR3 SCD1U SCD1U 3

7
5V_S5

2
1D8V_S0_PG 1D8V_S0_PG 40 5V_S5

3
D
SB

1
1D8V_S0_PG# 1 Q12
G 2N7002 R151
1

S 10KR3
2

DY C152 DY
R150 DY SCD1U
2

2
4K7R3 5V_S5 1D25V_S3_PG
DY
2

1
R189 D
1 2 1D25V_S3_PG# 1 Q13 C153
1D8V_S0 4K7R3 G 2N7002 SC1U10V3KX

2
1

1
S DY DY

2
C172 C171
2

SCD1U SCD1U

2
DY R182 R185 DY DY
1MR3F 0R2-0 U21 DY
DY
5V_S5 1 8 1D25V_S3
1OUT VCC
1

1D8V_S0_FB 2 7
1D8V_PG_SET 1IN- 2OUT
1 2 R184 3 1IN+ 2IN- 6
47KR3 4 5 1 2
GND 2IN+

1
DY
1

R188 1MR3F C100


R183 SC1U10V3KX
LM393ADR DY

2
2 2
10KR3 DY
DY
5V_S5
2

R186
1 2 1D25V_PG_SET
1
By Sourcer requset change 470KR3
DY R187
P/N: 100KR3F
DY
From 74.00393.D21
2

To 74.00393.F21
5V_S5

5V_S5
U31C 5V_S5
14

TSAHCT08-U U31B
14

VTT_VDDA_PG 13 TSAHCT08-U U31A


14

11 VTT_1D2V_PG 4 TSAHCT08-U
PM_SLP_S3# 12 6 VTT_VRM_PG 1
5 3 ALL_PW ROK ALL_PW ROK 13,40
2
7

1 1
7

21,42 VRM_PW RGD VRM_PW RGD 23 RUNPW ROK


Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
POWERGOOD&ENABLES(1/2)
Size Document Number Rev
Custom
W37 SB
Date: Tuesday, March 15, 2005 Sheet 39 of 51
A B C D E
5 4 3 2 1

D D

RS480M POWER GOOD CIRCUIT

3D3V_S0 3D3V_S0

U39C U39D
14

14
TSLCX14-U TSLCX14-U

NB_PW RGD 5 6 NB_PW RGD_N 1 2 R289 9 8


C 270KR3 C
7

7
1

1
R288
220KR2J C271
DY SC1U10V3ZY

2
2

1
SB_PWRGD IS 35MS
R663
AFTER NB_PWRGD 1KR2

SB

2
3D3V_S0

U38A

14
TSLCX08-U
R290
1
3 1 2 SB_PW RGD 21
13,39 ALL_PW ROK 2
330R2

1
7
B C249 B
DUMMY-C3
DY

2
3D3V_S0
1

R680
10KR2

U38B
14
2

TSLCX08-U
13,39 ALL_PW ROK 4
6 NB_PW RGD 13
39 1D8V_S0_PG 1 2 5

DUMMY-R2
7

DY R681

A A

Title
POW ERGOOD&ENABLES(2/2)

Size Document Number Rev


A3 W 37 SB

Date: Tuesday, March 15, 2005 Sheet 40 of 51


5 4 3 2 1
A B C D E

CPU_CORE 5V_AUX_S5
Intersil 6559CR + ISL6207CB*2 (Dummy *1)
DCBATOUT
INPUT
5V_AUX_S5
VID Setting Output Signal OUT
H_VID0
VID0(I / 3.3V) VRM_PG
PGOOD(OD / 3.3V)
H_VID1
VID1(I / 3.3V) LP2951ACM
4 4
H_VID2
VID2(I / 3.3V)
1D25V_S3
H_VID3 2D5V_S3
VID3(I / 3.3V) VIN
Output Power
H_VID4
VID4(I / 3.3V) VCC_CORE_S0(Imax=43A) TI TPS5130 5V_S5
VCNTL VOUT
1D25V_S3
VCC_CORE_PWR(O) 1D2V/3D3V/5V APL5331_1D25V_VREF
VREF
Input Signal Output Signal
APL5331KAC
Input Signal FOR
1D2V_S0_EN 1.2V
VCORE_EN SS_STBY1(I / 5V)
EN (I / 3.3V) Pull High (5V)
S5PWR_ENABLE FOR PGOUT(OD / 5V)
SS_STBY2(I / 5V) 3.3V
Voltage Sense S5PWR_ENABLE
SS_STBY3(I / 5V) FOR
COREFB 5.0V
VSEN(I / Vcore)
COREFB#
RGND(I / Vcore) GND STBY_LDO(I / 5V)
3 Output Power 3

Input Power
DCBATOUT_5130 5V (5.4A)
DCBATOUT STBY_VREF5(I / 28V) 5V(O)
VCC(I)
DCBATOUT_5130
5V_S0 STBY_VREF3.3(I / 28V) 1D2V (5A)
VCC(I) 1D2V(O)

3D3V_S0
VCC(I) Input Power 3D3V 4A)
3D3V(O)
DCBATOUT
VIN (I / 28V)

5V_S5
REG5V_IN(I / 5V)
LDO(O)
Adapter
5V_AUX_S5
ISL6227CA 5V_AUX_S5
AD_OFF
Input Signal Output Signal AD_IN

1D8V/2D5V (I) (O)


2
5V_S0 2
For PGOUT
Input Signal Output Signal
Input Power Output Power
S5PWR_ENABLE
EN1 (I / 3.3V) PG1(OD / 1D8V)
1D8_S5_PG Charger_Max1909 AD_JK
VCC(I) VCC(O)
AD+

5V_AUX_S5
Input Signal Output Signal VCC(I)
2D5_S3_PG CHARGE_OFF AD_IN
PM_SLP_S5# PG2(OD /2D5V) CLS (I / 3.3V) LDO (O / 5.4V)
EN2 (I / 3.3V)
BT_TH
THM (I / 3.3V) CHARGE_LED#
XTAL2/PB4 (O/5V)
BAT+SENSE
BATT (I / 3.3V)
Input Power Output Power XTAL1/PB3 (O/5V) BL2#
BT_SCL_5
2D5V_S3 (6.4A) SCL (IO / 5V)
2D5V(O)
BT_SDA_5
SDA (IO / 5V)
Output Power
FLASH_GPIO1 DCBATOUT
1D8V_S5 (5A) RESET#/PB5 (I/5V) VCC (O)
DCBATOUT 1D8V(O)
1 V+ FLASH_GPIO2 1
PB0/MOSI/AIN0 BT+
VCC (O)
AC_IN
VCC (I / 5V) PB0/MOSI/AIN0 Wistron Corporation
5V_S5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Input Power Title


AD+ Power Block Diagram
DCIN (I)
Size Document Number Rev
A3
W37 SB
Date: Monday, March 14, 2005 Sheet 41 of 51
A B C D E
A B C D E

Vdrop is over spec


6 VID[4..0] SB
under max loading SB Dummy-10k Dummy-80.6k DCBATOUT

5V_S0 1 2 1 2 R431 1 2 R436

D
6 COREFB#
DUMMY-R3 0R3-U VID0_PW M 2 3 Q27 VID0
R429 DY Remote Sense 2N7002

1
DUMMY-R3 Tie to CPU
R439 DY R437

G
ISL6559_OVP

1
4D7R3F-L-GP 1 2
6 COREFB DY 12VGATE_S0 38

2
CPU_SWITCH : (KBC GPIO14) U60 0R3-U
5V_S0

D
E
H: 35W CPU

1 2
4 5V_ISL6559_S0 15 7 ISL6559_FB VID1_PW M 2 3 Q26 VID1 4
VCC FB VCC_CORE_S0
L: 62W CPU B 2N7002 VID0_PW M 1 2 1KR3 R424 VID0
1

1 C386 29 9 1 2
R666 SC1U10V3KX OVP IDROOP R440 51R3

G
2

1
1KR3 PDTA124EU 1 2 ISL6559_OFS 5 10 ISL6559_VDIFF VID1_PW M 1 2 1KR3 R423 VID1
C
Q43 2K49R3F R425 OFS VDIFF V_RMSEN+ DY
VSEN 11
VID0_PW M 3 12 V_RMSEN-

D
VID0 RGND
2

3
VID1_PW M 2 VID2_PW M 2 3 Q25 VID2 VID2_PW M 1 2 1KR3 R422 VID2
VID1

1
VID2_PW M 1 21 ISL6559_PW M1 2N7002
VID2 PWM1 ISL6559_PW M2 43

2
VID3_PW M 32 20 ISL6559_PW M2 R438
R849 VID4_PW M VID3 PWM2 51R3 VID3_PW M 2 1KR3 R421 VID3

G
30 VID4 PWM3 16 1

1
53K6R3F PWM4 24 5V_S0
Q44 ISEN1 22 DY
ISEN1

2
1
ISEN2 18 26 ISL6559_DIS VID4_PW M 1 2 1KR3 R420 VID4

D
1 43 ISEN2 ISEN2 FS/DIS
3 4 17 EC5 VID3_PW M 2 3 Q24 VID3
ISEN3 SCD1U 2N7002
23 ISEN4 PGOOD 25

2
1
2 5 CPU_SW ITCH CPU_SW ITCH 34
C380

G
GND 13

1
1 6 1 2 ISL6559_FB 1 2 ISL6559_COMP 6 14 3D3V_S0
R667 2K32R3F COMP GND R430 DY
GND 19
SC56P 27 28 107KR3F

D
EN GND

2
1
33 VID4_PW M 2 3 Q28 VID4

NC

NC

NC
R427 GND 2N7002
2N7002DW C381 R426 R432
84.27002.03F 1 2 1 2 FB/COMP1 2 ISL6559CR

31
3K65R3F 74.06559.073 10KR3

G
1
SC4700P50V3KX
1K74R3F DY SB

2
21,39 VRM_PW RGD

1
ISL6559_VDIFF Gain value large, VCORE_EN_1 1 2 VCORE_EN 39
3 R433 0R2-0 C385 3
then bandwidth large! SC1U10V3KX

2
=> 2.74K or 3.65K
VCC_CORE_S0

1
TC2 TC3 TC14 TC17 TC18 TC19

2
DY
Rt=10^[11.09-1.13log(fs)]
Rt=107K,=>fs=230KHz ST330U3VDM-1-GP ST330U3VDM-1-GP ST330U3VDM-1-GP

But real freq.=270KHz ST330U3VDM-1-GP ST330U3VDM-1-GP ST330U3VDM-1-GP

Main Source:
KEMET 2D5V/ 330uF / ESR=9mohm / Iripple=3.7A / ST330U2D5VDM-3
80.3371V.191/ 7.3*4.3*1.9 / NT$:9.0
Panasonic 25V / E1 Cap. C16 2'nd Source:
8.5*6.5mm / SMD 1 2 Panasonic 2V/ 330uF / ESR=9mohm / Iripple=3.0A/ SE330U2VDM-2
ESR=0.26ohm, Iripple=0.3A 79.33719.20A/ 7.3*4.3*1.9 / NT$:9.5
FX Serial SC10U35V0ZY-U
2 C12 2

DCBATOUT 1 2
1

SC10U35V0ZY-U
TC13 D
2

SE100U25VM-1-U 5V_S0 DCR=1.3mohm+-10% / Imax=40A /


C410 C18 Q29
Panasonic /

NC1

NC2
Follow MOSFET rise time spec. SCD1U50V3ZY SCD1U50V3ZY FDD8880 D-PAK
2

=> Mount 0ohm first. DY 1


Id=51A ETQP2H0R7BF / 0.48uH /
G
Qg=13~17nC 13.4*13.3*4.9
2

BOOT_1 1 2 BOOT_1# 1 2 C393


R444 2D2R3 S Rdson=9~13mohm
SCD22U16V3KX-1 USD$:0.16 VCC_CORE_S0
1

2
ISL6559_UG1
U62 ISL6559_PHASE_1
L20
1 8 D D L-D48UH-U
UGATE PHASE ISL6207_EN1
2 BOOT EN 7
4

ISL6559_PW M1 3 6
PWM VCC ISL6559_LG_1 Q1 Q32
4 GND LGATE 5
1

FDD8896 FDD8896 D35


1

1 1 DY R434
R443 ISL6207CB-U R445 G G 1K62R3F
1

499KR3F 74.06207.071 0R3-U SSM54-U


3

1 S S 1
2

C394 83.5R004.A8M
2

ISEN1
Place close to ISL6559 Wistron Corporation
1

D-PAK Iocset=90uA ; Iocp=1.5*I(full) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
C395 SCD01U50V3KX Taipei Hsien 221, Taiwan, R.O.C.
Id=35A 90uA/1.5=60uA----> respect to Full load
2

SC1U10V3KX
Qg=24~32nC If full load is 44A Title
Rdson=5.7~6.8mohm 60uA*Rsen=(44A/2)*(6.8m/2)*1.3 CPU Vcore Power_1
USD$:0.23 Rsen~ 1.62K Size Document Number Rev
A3 SB
W37
Date: Friday, April 15, 2005 Sheet 42 of 51
A B C D E
A B C D E

C27
1 2
4 DCBATOUT 4
C17
SC10U35V0ZY-U
1 2
DCR=1.3mohm+-10% / Imax=40A / Panasonic /
SCD1U50V3ZY SCD1U50V3ZY D SC10U35V0ZY-U ETQP2H0R7BF / 0.48uH / 13.4*13.3*4.9
C28 C396

3
DY

NC1

NC2
1

1
Q2 D-PAK VCC_CORE_S0
Follow MOSFET rise time spec. FDD8880
5V_S0 1
Id=51A

2
R12 G Qg=13~17nC
BOOT_3 1 2 BOOT_3# 1 2 C13 Rdson=9~13mohm

2
2D2R3 SCD22U16V3KX-1 S USD$:0.16

2
ISL6559_UG3
U2 ISL6559_PHASE_3

1 8 L21
UGATE PHASE ISL6207_EN3 D D L-D48UH-U
2 BOOT EN 7
42 ISL6559_PW M2 ISL6559_PW M2 3 6
PWM VCC

4
4 5 ISL6559_LG_3
GND LGATE
1

1
Q3 Q33

1
FDD8896 FDD8896 R435
ISL6207CB-U R13 1 1 1K62R3F

1
R11 74.06207.071 0R3-U G G D6
499KR3F SSM54-U
2

2
S S DY

2
3 ISEN2 ISEN2 42
3
C15

1
D-PAK
C14 SCD01U50V3KX Id=35A Place close to ISL6559

2
SC1U10V3KX Qg=24~32nC
Rdson=5.7~6.8mohm Iocset=90uA ; Iocp=1.5*I(full)
USD$:0.23 90uA/1.5=60uA----> respect to Full load
If full load is 44A
60uA*Rsen=(44A/2)*(6.8m/2)*1.3
TABLE 1. VOLTAGE IDENTIFICATION CODES
Rsen~ 1.62K
VID4 VID3 VID2 VID1 VID0 DAC
0 0 0 0 0 1.550
0 0 0 0 1 1.525
0 0 0 1 0 1.500
0 0 0 1 1 1.475
0 0 1 0 0 1.450
0 0 1 0 1 1.425
0 0 1 1 0 1.400
0 0 1 1 1 1.375
0 1 0 0 0 1.350
0 1 0 0 1 1.325
2
0 1 0 1 0 1.300 2
0 1 0 1 1 1.275
0 1 1 0 0 1.250
0 1 1 0 1 1.225
0 1 1 1 0 1.200
0 1 1 1 1 1.175
1 0 0 0 0 1.150
1 0 0 0 1 1.125
1 0 0 1 0 1.100
1 0 0 1 1 1.075
1 0 1 0 0 1.050
1 0 1 0 1 1.025
1 0 1 1 0 1.000
1 0 1 1 1 0.975
1 1 0 0 0 0.950
1 1 0 0 1 0.925
1 1 0 1 0 0.900
1 1 0 1 1 0.875
1 1 1 0 0 0.850
1 1 1 0 1 0.825
1 1 1 1 0 0.800
1 1 1 1 1 1 Shutdown 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU Vcore Power_2
Size Document Number Rev
A3 SB
W37
Date: Tuesday, March 29, 2005 Sheet 43 of 51
A B C D E
5 4 3 2 1
DCBATOUT DCBATOUT_6227 DCBATOUT_6227 1D8V,Iomax=5A
G14 OCP>10A
1 2
1D8V_PW R 1D8V_S5
GAP-CLOSE-PW R
G15 G20

5
6
7
8

1
1 2 1 2
U14 C525 C87

D
D
D
D
GAP-CLOSE-PW R AO4422 SC10U35V0ZY-U SCD1U GAP-CLOSE-PW R

2
G16 6227_BOOT2_R 1 2 C78 84.04422.037 G21
1 2 5V_S5 D37 SCD1U 1 2
D GAP-CLOSE-PW R 3
2 Id=9.3A
GAP-CLOSE-PW R
D
Rdson=19.6~24mohm

G
S
S
S
G17 C509 G22

4
3
2
1
1 2 1 6227_BOOT1_R1 2 1 2

1
EC96
GAP-CLOSE-PW R BAW 56-1 SCD1U GAP-CLOSE-PW R
G18 5V_S5 SCD1U Imax=6A G23

2
1 2 1 2
DCR=25mohm

2
R479
10*10*4.0

1
GAP-CLOSE-PW R 1 2 R54 L24 Vo(cal.)=1.818V GAP-CLOSE-PW R
G19 R473 0R3-U 1 2 G24
1 2 4D7R5 0R3-U 1 2
DCBATOUT_6227 IND-4D7UH-25

1
GAP-CLOSE-PW R GAP-CLOSE-PW R

5
6
7
8
G25

1
U13 1 2

D
D
D
D
1

1
AO4422 R481 R71
C77 C89 0R3-U C88 10K2R3F C109 TC5 GAP-CLOSE-PW R
2SC4D7U10V5ZY SCD1U SCD01U16V2KX SCD1U16V ST220U4VDM-10 G26

2
Id=9.3A DY 80.22716.391 1 2

2
Rdson=19.6~24mohm

G
S
S
S
KEMET GAP-CLOSE-PW R

14

4
3
2
1
ST220U4VDM-10,

VIN
80.22716.391

1
6227_VCC 28 6 6227_BOOT1
VCC BOOT1

1
R70
R475
Iripple=2.2A,
R69 5 6227_UGATE1 0R3-U 10KR2F-U ESR=25mohm,
6227_OCSET1 11 UGATE1 6227_PHASE1
OCSET1 PHASE1 4 NT:7.6

2
C
23,45 S5PW R_ENABLE 1 2 6227_EN1 8 EN1 DY
7.3*4.3*1.9 C

2
6227_SS1 12
1KR2F SOFT1 6227_LGATE1
LGATE1 2
PGND1 3
7 6227_ISEN1 1 2
TPAD30 TP16 6227_PG1 ISEN1 6227_VOUT1 R480 2KR3F
15 PG1 VOUT1 9
10 6227_VSEN1
VSEN1
R56 13 DCBATOUT_6227
6227_EN2 DDR 6227_BOOT2
21,34 PM_SLP_S5# 1 2 21 EN2 BOOT2 23
6227_SOFT2 17
1KR2F SOFT2
24 6227_UGATE2
UGATE2

1
R59 25 6227_PHASE2
PHASE2
39 2D5V_S3_PG 1 2 6227_PG2 16
1
PG2/REF
GND
C481
SC10U35V0ZY-U
C65
SCD1U 2D5V,Iomax=6.4A

2
1

5
6
7
8
0R2-0 6227_LGATE2
C79 LGATE2 27
26 U8 OCP>13A

D
D
D
D
SCD1U16V PGND2 6227_ISEN2 AO4422
ISEN2 22 1 2
2

20 19 6227_VSEN2 R55 2KR3F


VOUT2 VSEN2 2D5V_PW R
OCSET2 18 6227_OCSET2 Id=9.3A 2D5V_S3
Rdson=19.6~24mohm

1
G5

G
S
S
S
1

R60 1 2

4
3
2
1
C81 C82 U10 56K2R3F
SCD01U16V2KX SCD01U16V2KXISL6227CA 6227_VOUT2 OCP Imax=6A GAP-CLOSE-PW R
2

G6
2
13A=>R60=66.9K DCR=25mohm 1 2
L23
16A=>R60=55K 10*10*4.0
1

Vo(cal.)=2.538V
B R72
82K5R3F
1 2 GAP-CLOSE-PW R
G7 B
OCP
Vout=GND, =>Force PWM Mode IND-4D7UH-25 1 2
2

Vout=Vout, =>Auto Mode

1
GAP-CLOSE-PW R
10A=>R72=85.7K

5
6
7
8

1
R840 G8
15A=>R72=58.5K U7 R474 C80 18K2R3F TC1 1 2

D
D
D
D
0R3-U
Vo=0.9*(R1+R2)/R2 AO4422 ST220U4VDM-10

2
80.22716.391 GAP-CLOSE-PW R

2
Id=9.3A SCD01U16V2KX G9

2
1 2
Rdson=19.6~24mohm KEMET

G
S
S
S

1
GAP-CLOSE-PW R
ST220U4VDM-10,

4
3
2
1
R476 R57 G10
0R3-U 10KR2F-U 80.22716.391 1 2
Iripple=2.2A,
DY GAP-CLOSE-PW R
ESR=25mohm,

2
G11
NT:7.6 1 2
7.3*4.3*1.9 GAP-CLOSE-PW R
G12
1 2

GAP-CLOSE-PW R
G13
1 2

GAP-CLOSE-PW R

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6227_1D8V_2D5V
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 29, 2005 Sheet 44 of 51
5 4 3 2 DCBATOUT 1 DCBATOUT_5130

For 3.3V 3D3V_PW R


TI TPS5130 for 1D2V, 3D3V, 5V 1
G34
2
SETTING=3.349V C160
R167
1D2V_OCP GAP-CLOSE-PW R
R165 1 2 1

150R2F SC5600P50V3KX
2
(1D2V=>CH1 , 3D3V=>CH2 , 5V =>CH3) R199 DCBATOUT_5130 1
G35
2
1 2
R166
For 5V 5V_PW R
1 2
GAP-CLOSE-PW R
10KR2F-U 1 2 SETTING=5.0915V R196 C179 5130_TRIP1 18K2R3F G36

1
R198 1 2 1 2 C183 OCP 1 2
R163 29K4R2F 1 2
1 2 330R2F SC4700P50V3KX 12A=>R199=18K GAP-CLOSE-PW R
D 2K7R3
close to IC R194 SCD1U 18A=>R199=28K G52 D
1KR2F 1 2
close to IC 1 2
1 2

5130_5V_LDO

1
4K99R2F GAP-CLOSE-PW R
C159 5130_INV2 R193 5130_5V_LDO
3D3V_OCP G53

2
SC3300P50V3KX
close to IC 1 2
2

5130_FB2 1K8R3 D15 R200 DCBATOUT_5130


BAT54-1 1 2 GAP-CLOSE-PW R

1 2
83.00054.L03 G33

2
For 1.2V 1D2V_PW R C154 5130_INV3 D19
5130_TRIP2 22KR3F
C182
1 2
SETTING=1.217V C164
R169 SC4700P50V3KX BAT54-1 1 2 OCP GAP-CLOSE-PW R

3
1 2 1 2 5130_FB3 83.00054.L03 G37
R170
5130_LH1 SCD1U 8.4A=>R200=13K 1 2
1 2 680R3F SC6800P50V3KX
close to IC 10A=>R200=22K
R171 C184 GAP-CLOSE-PW R

3
10KR2F-U 1 2 1 2 5130_LL1 5130_LL1 46 G38
1

5V_OCP 1 2
R168
1K5R3F
4K32R3F
Vo=(R1*0.85)/R2+0.85 SCD1U50V3KX
5130_OUT1U R195 DCBATOUT_5130
SB close to IC 5130_OUT1D
5130_OUT1U 46
5130_OUT1D 46 1 2
1
GAP-CLOSE-PW R
G39
2
1 2

5130_TRIP3 22KR3F
5130_TRIP1 C180 GAP-CLOSE-PW R
C162 5130_INV1 DCBATOUT_5130 1 2 G40
SC8200P50V3KX 5130_TRIP2 1 2
2

5130_FB1 SCD1U
5130_FLT
close to IC GAP-CLOSE-PW R
G49
C C

1
5130_FLT 5130_OUT2D 5130_OUT2D 46 OCP 1 2
C163 5130_INV1
SCD01U16V2KX 8.4A=>R195=12.65K GAP-CLOSE-PW R
C161

2
1 2 U23 10A=>R195=22K G50

48
47
46
45
44
43
42
41
40
39
38
37
T(soft)=1.736ms 1 2
SC4700P50V3KX C207

INV1

LH1

LL1

OUTGND1
TRIP1
VIN_SENSE12
TRIP2
OUTGND2
OUT1_U

OUT1_D

OUT2_D
FLT
U19 5130_LH2 1 2 5130_LL2 5130_LL2 46 GAP-CLOSE-PW R
5V_AUX_S5 5130_3D3V_LDO G51
4 3 5130_SS_STBY1 SCD1U50V3KX 1 2
R136
1
1 2 TPS5130_1D2V_EN# 5 2 1D2V_S0_EN
R162 5130_FB1 1 36
close to IC DCBATOUT_5130
C206
GAP-CLOSE-PW R
G84
100KR2 100KR2 5130_SS_STBY1 FB1 LL2 5130_OUT2U 5130_5V_LDO 5130_3D3V_LDO
6 1 2 SS_STBY1 OUT2_U 35 5130_OUT2U 46 1 2 1 2
5130_INV2 3 34
2N7002DW 5130_FB2 INV2 LH2 SCD1U50V3KX
4 33 GAP-CLOSE-PW R
FB2 VIN
2

84.27002.03F R161 DY 5130_SS_STBY2 5 32 G41


PM_SLP_S3# 5130_PW MSEL SS_STBY2 VREF3.3
15,18,21,34,38,39 PM_SLP_S3# 1 2 6 PWM_SEL VREF5 31 1 2

TPS5130
5130_CT 7 30 5130_REGIN R218 1 2 0R5J-1
DUMMY-R2 CT REG5V_IN 5V_S5
8 29 5130_3D3V_LDO GAP-CLOSE-PW R
GND LDO_IN

1
5130_REF 9 28 SC4D7U10V5ZY
REF LDO_CUR
1

R160 10 27 C204 C205


R164 STBY_REF STBY_VREF5 LDO_GATE 78.47593.411 SC4D7U10V5ZY
DCBATOUT_5130 1 2 11 STBY_VREF3.3 LDO_OUT 26

2
150KR2J 5130_STBY_LDO 12 25 78.47593.411
100KR2 STBY_LDO INV_LDO
G83
2

39 1D2V_S0_EN
1D2V_S0_EN
LDO SETTING 1 2

VIN_SENSE3
GAP-CLOSE

PG_DELAY
SS_STBY3
S5PW R_ENABLE ZZ.CON2C.XX1

OUTGND3
23,44 S5PW R_ENABLE

OUT3_U

OUT3_D
B B

PGOUT

TRIP3
INV3
FB3

LH3
5130_CT

LL3
1

TPS5130PT-U

13
14
15
16
17
18
19
20
21
22
23
24
C157
SC47P50V2JN
2

78.47034.1F1 5130_SS_STBY3
5V_AUX_S5 5130_FB3
U18 5130_INV3
R191 5130_OUT3D 5130_OUT3D 46
1 2 TPS5130_5V_EN# 3 4 5130_LL3
5130_REF 5130_OUT3U 5130_OUT3U 46
100KR2 S5PW R_ENABLE
2 5
SB
1

5130_LH3 1 2 5130_LL3 46 Condition Voltage


1 6 5130_SS_STBY3
C156 5V_S0 C181 SCD1U50V3KX
2

5130_5V_LDO PWM_SEL H : Auto PWM/SKIP 2.2V(Min)~


1

SC1U10V3KX
1

2N7002DW C155 1
84.27002.03F SC4700P50V3KX R192 3 * L : PWM fixed (300KHz) ~0.3V(Max)
2

5130_PG_DELAY

78.47224.2B1 10KR2 2
D18
BAT54-1 DCBATOUT_5130
2

5V_AUX_S5 R197 83.00054.L03


U76 1 2
R560
1 2 TPS5130_3V_EN# 3 4 0R2-0 5130_TRIP3

100KR2 2 5 S5PW R_ENABLE 5V_AUX_S5 5130_5V_LDO


A A
1

R841
1 6 5130_SS_STBY2 5130_STBY_LDO
C178
DUMMY-C3
1 2
Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SB DY DUMMY-R5
1

2N7002DW R159 Taipei Hsien 221, Taiwan, R.O.C.


2

84.27002.03F C158 0R2-0


SCD01U16V2KX Title
2

TI TPS5130 1D2V/3D3V/5V (1/2)


2

Size Document Number Rev


A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 45 of 51
5 4 3 2 1

TI TPS5130 for 1D2V, 5V, 3D3V 1D2V_PW R


G81
1D2V_S0

1 2

(1D2V=>CH1 , 5V=>CH2 , 3D3V =>CH3) SB GAP-CLOSE-PW R


G82
1 2

GAP-CLOSE-PW R
DCBATOUT_5130 5V_S5 5V_AUX_S5 G27
1 2
D 3D3V_AUX_S5
GAP-CLOSE-PW R
D

1
G28

2
C185 C186 1 2

5
6
7
8

1
SCD1U SC10U35V0ZY-U SSM5817SL SSM5818SL Iomax=120mA

1
U24 R216 R1 GAP-CLOSE-PW R

D
D
D
D
AO4422 D45 D46 C202 36K5R3F G29
Imax=9.3A U29 1 2

2
Rdson=19.6~24mohm

2
1 5 GAP-CLOSE-PW R
SHDN# SET SC22P50V2JN-1
2 G30
GND

G
S
S
S

1
Change to 3.3uH 1D2V 3 IN OUT 4 1 2

4
3
2
1
1D2V_PW R R215
L8
45 5130_OUT1U
5130_OUT1U Iomax=5A 22KR3F R2 GAP-CLOSE-PW R

1
5130_LL1 1 2 G913C-U G31
45 5130_LL1
OCP>10A C201 C203 1 2

2
SC1U10V3KX SC1U10V3KX
IND-3D3UH-35

2
Imax=A GAP-CLOSE-PW R
5
6
7
8
DCR=mOhm

1
D
D
D
D

U25 TC8
AO4422 ST220U4VDM-10

2
Vout = 1.25*(1+ R1/R2)
Imax=9.3A KEMET, NTD:7.6 (Q1)
Rdson=19.6~24mohm ESR=25mohm
G
S
S
S
4
3
2
1

Iripple=2.2A 5V_PW R 5V_S5


7.3*4.3*1.9 G42
5130_OUT1D 1 2
45 5130_OUT1D
C GAP-CLOSE-PW R
C
DCBATOUT_5130 G43
1 2

GAP-CLOSE-PW R
1

1
G44
C177 C176 1 2
5
6
7
8

SCD1U SC10U35V0ZY-U
2

2
U22 GAP-CLOSE-PW R
D
D
D
D

AO4422 G45
1 2

Imax=9.3A GAP-CLOSE-PW R
G46
Rdson=19.6~24mohm
G
S
S
S

1 2
4
3
2
1

5V_PW R
5V
45 5130_OUT3U
5130_OUT3U
5130_LL3 1
L10
2
SB Iomax=5.4A
1
GAP-CLOSE-PW R
G47
2
45 5130_LL3
OCP>10A
GAP-CLOSE-PW R
IND-6D8UH-10-GP
Imax=4.5A G48
5
6
7
8

1 2
DCR=60mOhm
1

U17
D
D
D
D

AO4422 7*7*3.0 TC9 GAP-CLOSE-PW R


ST220U6D3VDM-6
2

Imax=9.3A
Rdson=19.6~24mohm NEC, NTD:8.75 (Q1)
B ESR=55mohm B
G
S
S
S
4
3
2
1

Iripple=1.65A 3D3V_PW R 3D3V_S5


7.3*4.3*2.8 G54
5130_OUT3D 1 2
45 5130_OUT3D
GAP-CLOSE-PW R
G55
1 2
DCBATOUT_5130
GAP-CLOSE-PW R
G56
1 2
1

C188 C187 GAP-CLOSE-PW R


5
6
7
8

SCD1U SC10U35V0ZY-U G57


2

U27 1 2
D
D
D
D

AO4422
GAP-CLOSE-PW R
G58
Imax=9.3A 1 2
Rdson=19.6~24mohm
G
S
S
S

SB GAP-CLOSE-PW R
4
3
2
1

3D3V_PW R
5130_OUT2U
L11 3D3V 1
G59
2
45 5130_OUT2U
45 5130_LL2
5130_LL2 1 2 Iomax=4A GAP-CLOSE-PW R
IND-6D8UH-10-GP
OCP>8A
5
6
7
8

Imax=4.5A
A A
1

U26
D
D
D
D

AO4422
DCR=60mOhm TC10
7*7*3.0 ST220U6D3VDM-6
Wistron Corporation
2

Imax=9.3A NEC, NTD:8.75 (Q1) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Rdson=19.6~24mohm ESR=55mohm
G
S
S
S
4
3
2
1

Iripple=1.65A Title

5130_OUT2D
7.3*4.3*2.8 TI TPS5130 1D2V/3D3V/5V (2/2)
45 5130_OUT2D Size Document Number Rev
A3
W37 SB
Date: Monday, April 18, 2005 Sheet 46 of 51
A B C D E

5V_AUX_S5
5/17 power team change
5V_AUX_S5

1 2 C34 LP2951ACM_FB
SC330P50V2KX
DCBATOUT
U5

1
C33 1 8
SCD1U C43 OUT INPUT
2 SENSE FB 7

1
SC10U10V5ZY 3 6
SD 5V/TAP

2
GND 100mA ERROR
4 4 5 C32 4
SC1U50V5ZY

2
LP2951ACM 78.10594.411

3 3

2D5V_S3

G79
1

DY 5V_S5 1 2
C450 C449
SC10U10V5ZY SC10U10V5ZY
1D25V_S3 GAP-CLOSE-PW R
2

78.10693.411 78.10693.411 G80


1

2D5V_S3 C463 Iomax=1.1A 1 2


SCD1U GAP-CLOSE-PW R
2

Vo(cal.)=1.250V G77
1

1 2
2 R463 1D25V_LDO 1D25V_S3 2
1KR3F U69
GAP-CLOSE-PW R
G78
1 VIN VOUT 4 1 2
2

APL5331_1D25V_VREF 3 VREF
6 8 GAP-CLOSE-PW R
VCNTL NC
1

NC 7
1

R464 2 5 TC16 C480


1KR3F C464 GND NC ST100U4VBM-1 SC22U10V6ZY-U
9 GND
2

SCD1U 78.22693.421
2
2

APL5331KAC-TR Trace Length=1cm (500mils)


KEMET Trace Width=8mils
SO-8-P 100uF / 4V / B2 Size / NTD:5.615 Trace Resistance>25mohm
Iripple=1.1A / ESR=70mohm

1 <Variant Name> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
1D25V_LDO/5V_AUX
Size Document Number Rev
A3
W37 SB
Date: Monday, March 14, 2005 Sheet 47 of 51
A B C D E
Need change package
BT+
DCBATOUT
AD+
R449
U63 U65
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
7 D S 2 2 S D 7
6 D S 3 D01R2512F-1-GP For EMI 3 S D 6

1
C418 5 D G 4 4 G D 5

1
C417 R448 C422 R20

1
SC1000P50V2KX SC1000P50V2KX 100KR3F AO4407 SCD1U25V3KX DUMMY-R3 AO4407 C427

2
C419 DY U64 SCD1U

2
SC1U50V5ZY 1 S D 8

2
G71 G72 2 S D 7

2
MAX1909_ACIN 3 S D 6
AC_IN Threshold 2.089V Max. MAX1909_PDL 4 G D 5

1
AC_IN > 2.089V --> AC DETECT Close to

1
R447 GAP-CLOSE-PW R GAP-CLOSE-PW R AO4407
13K3R3F MAX1909 pin 24

ACOK is 17.8V

2
R21 DUMMY-R3

D4 1 2 DY
1 2 AD+_TO_SYS DCBATOUT
AD+

1
CH521S-30
C402 C401
SCD1U SCD1U MAX1909_LDO

2
1
SB

1
C22 Near MAX1909
SCD1U25V3KX C399
Pin 2
2

1
SCD1U25V3KX

2
C429 C25 C24

4
3
2
1
1 2 C403 SCD1U SC10U25V0KX SC10U25V0KX

MAX1909_DHIV

2
SC1U10V3KX U66

G
S
S
S
MAX1909_LDO U67 SI4431BDY

26

25

1
R446

CSSP

CSSN
33R3 PC
MAX1909_REF
1
Id=4.6A

D
D
D
D
1
R457 MAX1909_PDS27 22
PDS DHIV

5
6
7
8
3D3V_AUX_S5 100KR3 R452 AD+_TO_SYS 24 Rdson=36~50mohm
SRC PDL
28 Near MAX1909
1

DY 100KR3 MAX1909_DC_IN1 2
R453 DCIN LDO Pin 21
2

1
46K4R3F DY BT+
2 R461
1 R456 2 DLOV 21 MAX1909_DLOV C400 L22
1

MAX1909_VCTL 11 SC1U10V3KX CHG_PW R-2 1 2 CHG_PW R-3 1 2


VCTL
2

2
R25 49K9R2F MAX1909_ICTL 10 IND-15UH-19
100KR3 MAX1909_MODE ICTL 68.1501T.101
7
MODE D015R2512F-3-GP
1

CELL is 3 Cell DHI 23 MAX1909_DHI Id=4.0A

5
6
7
8
R454
DCR=40mohm
2

D 49K9R2F 3

D
D
D
D
ACIN

1
34 CHG_ON# 1 Q4 Icharge=3.0A 12.8*12.8*4.0
G 2N7002 MAX1909_IINP 8 U68
IINP
2

2
From KBC S
DLO
20 MAX1909_DLO SI4800BDY
2

MAX1909_LDO

2
MAX1909_CLS 9 D33 G75 G76 C431 C432 C433
CLS
1

84.04800.B37 DY

1
G
S
S
S
R451 B220LFA

4
3
2
1
1

41K2R3F 6
ACOK PGND
19 NC

1
R458 G73
100KR3 29 1 2
Id=5.0A GAP-CLOSE-PW R GAP-CLOSE-PW R
PGND
2

Rdson=23~30mohm
R459 18 GAP-CLOSE-PW R
CSIP
2

34,49 BT_TH 1 2 5
1KR3 PKPRES
SC10U25V0KX SC10U25V0KX SC10U25V0KX
From Battery Connector
MAX1909_CCV 13 17
MAX1909_CCI CCV CSIN
12 16 BAT+SENSE 49
MAX1909_CCS CCI BATT
14 15
CCS GND
1

G74 From Battery Connector


REF

34 AD_IA 1 2 R450
10KR3
1

GAP-CLOSE-PW R
4
1

MAX1909ETI
2
1

C412 V_REF :4.2235V (<500uA)


2
1

R455 SCD01U50V3KX
2
1

10KR3F
MAX1909_REF
2

C414 C411 C413


2

R18
about 3mA 42K2R3F ISOURCE_MAX = (0.075/R557)*(VCLS/VREF)
TOTAL_POWER :
2

SCD1U16V3KX SCD1U16V3KX MAX1909_CLS


AD+
Adapter=65W, Total_Power=54.8W
1

SCD01U50V3KX
3D3V_AUX_S5
1

C415
SC1U10V3KX R19
2
3

24K3R3F
D44 ISOURCE_MAX = (0.075/R557)*(VCLS/VREF)
MMBZ5246BPT-GP
TOTAL_POWER :
2

about 0.09V when ON


Adapter=90W, Total_Power=80W
1

R673
SB
1

4K7R2
R672
1KR2
2

AC_IN# 34
2

Q45
1
MMBT3904-1-U Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

R674 Taipei Hsien 221, Taiwan, R.O.C.


4K7R2
Title
CHARGER MAX1909
2

Size Document Number Rev


Custom
W37 SB
Date: Friday, April 15, 2005 Sheet 48 of 51
A B C D E

<Designator>
Adaptor in to generate DCBATOUT
D1 DY 2 DIODE V.R PZM24NB1 SOT346
PZM24NB1
SB 3
1
AD+

DCIN1
U1
1 AD_JK 1 S D 8
AD+ S D
GND 2 2 7

1
3 3 S D 6
GND

1
4 AD+_2 4 G D 5 C5 C4
NC#4 C2 C3 SCD1U50V5ZY SCD1U50V5ZY
4
NC#5 5 4

2
SCD1U50V3ZY SCD1U50V3ZY AO4407

1
DC-JACK98-GP R418 ID = -10A/70deg

1
100KR3
Rds(ON) = 24mohm
SO-8

2
C1

2
E

B
AD_OFF#_JK 1 SCD1U50V3ZY

1
Q23 C
PDTA124EU R1

3
D 56KR3F

3
34 AD_OFF 1 Q22
G 2N7002

2
1
S

2
R419
1KR3

2
3 3

5V_AUX_S5 5V_AUX_S5

BATTERY CONNECTOR
G4
1 2
2 5V_AUX_S5 2

2
D7 D5 GAP-CLOSE
DY DY
G3
1

SB 1 2

3
R28 BAV99-2 BAV99-2
100KR2 GAP-CLOSE
DY BAT1
1
2

34 BAT_IN# 2
BT_SCL_5 1 2 R30 BTSMCLK 3
34 BT_SCL_5 BT_SDA_5 27R3F 1 2 R29 BTSMDATA 4
BT+34 BT_SDA_5
34,48 BT_TH 27R3F BT_TH 5
6
BT+ 7
1

SPD-CON7
R31
1

1
0R2-0 DY
C31 C38 C37 C36 C35
2

2
48 BAT+SENSE
SCD1U50V3ZY SCD1U50V3ZY SC1000P50V2KX SC1000P50V2KX SC1000P50V2KX

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
AD/BAT CONN
Size Document Number Rev
A3
W37 SB
Date: Tuesday, March 15, 2005 Sheet 49 of 51
A B C D E
5 4 3 2 1
3D3V_S0 3D3V_S5

1
EC66
1

1
EC28 EC41 EC80 EC76 EC130 EC127 EC50 EC36 EC137 EC120 EC46 EC100 EC71 EC45 EC20 EC82 EC1 EC54 EC125 EC63 EC62 EC60 EC72 EC38 EC19 EC7
SCD1U

2
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2

2
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
D D

5V_S0 5V_S5 5V_AUDIO_S0 5V_OP_S0 VCC_ASKT_S0 3D3V_LAN_S5


1

1
EC129 EC123 EC56 EC116 EC68 EC69 EC37 EC67 EC75 EC2 EC77 EC117 EC128 EC73 EC107 EC134 EC131 EC133 EC132 EC126 EC74 EC55

SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2

2
DY DY DY DY DY DY DY DY DY DY DY DY

2D5V_S3 2D5V_S0
1

1
EC26 EC86 EC97 EC14 EC17 EC9 EC29 EC11 EC87 EC93 EC98 EC92 EC25 EC83 EC12 EC22 EC23 EC40 EC118 EC101

SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2

2
C DY DY DY DY DY DY DY DY DY DY
C

1D8V_S5 1D2V_S0 1D25V_S3


1D8V_S0
1

1
EC31 EC33 EC43 EC35 EC44 EC94 EC85
1

EC105 EC113 EC106 EC49


SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2

2
SCD1U SCD1U SCD1U SCD1U
2

DY DY DY DY DY
DY DY

3D3V_AUX_S5 5V_AUX_S5
1

1
EC4 EC103 EC104 EC124 EC122 EC70 EC64 EC108 EC119 EC39 EC91 EC32 EC115

B SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U B
2

DY DY DY DY DY DY DY DY DY DY DY DY DY

AD+ BT+
1

EC3 EC6 EC79 EC88 EC51 EC81 EC48

SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U


2

DY DY DY

DCBATOUT VCC_CORE_S0

A A
1

EC112 EC110 EC52 EC102 EC95 EC18 EC90 EC78 EC65 EC24 EC8 EC84 EC15 EC10 EC16

SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
DY DY DY
Title
EMI COMPONENTS

Size Document Number Rev


A3 W 37 SB

Date: Friday, March 25, 2005 Sheet 50 of 51


5V_S0

3D3V_S0 3D3V_S0
U6D

14

13
TSAHCT125
3D3V_S0
12 11 U38C U38D 3D3V_S0 3D3V_S0 3D3V_S0

14

14
TSLCX08-U TSLCX08-U
9 12
8 11 U39E U39F U39B

14

14

14

14
7
10 13 TSLCX14-U TSLCX14-U TSLCX14-U

1 2 11 10 13 12 3 4

7
U39A TSLCX14-U

7
GND1 GND2 GND3 GND4 GND5 GND6 GND7
SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-4

1
HOLE1 HOLE2 HOLE5 HOLE6 HOLE7 HOLE9 HOLE10
HOLE HOLE HOLE HOLE HOLE HOLE HOLE SB
DY DY DY DY DY
1

1
DY DY DY DY DY DY DY
GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20
HOLE11 HOLE12 HOLE13 HOLE14 HOLE15 HOLE16 HOLE17 HOLE18 HOLE19 HOLE20 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-9 SPRING-9 SPRING-12 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-23
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE

1
1

DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY

GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28


HOLE21 HOLE22 HOLE27 HOLE28 HOLE29 HOLE30
HOLE HOLE HOLE HOLE HOLE HOLE SPRING-9 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-U3 SPRING-23 SPRING-23 SPRING-U3

1
1

DY DY DY DY DY DY DY DY DY

34.46i15.001 34.46i14.001 34.46i13.001 34.46i14.001


HOLE3 HOLE4 HOLE8 HOLE23 HOLE24 HOLE25 HOLE26
HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1

34.46i12.001 DY DY 34.4B301.001
34.46i13.001

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
MISC
Size Document Number Rev
A3
W37 SB
Date: Monday, April 18, 2005 Sheet 51 of 51

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