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Embedded Insights Inc

Embedded Processing Directory


All processors by Company
July 27, 2010
(This page intentionally left blank to support duplex printing)
In addition to listing detailed information about processors and cores from over 80
companies, the Embedded Processing Directory includes a number of features to make
it easier and faster for embedded designers to find the best processors for their project.

The listing supports side-by-side viewing and printing. The file supports printing with a
duplex printer. If you are printing two pages per sheet, start printing from the second
page so that the relevant pages will print next to each other.

The top corner of each page There are special reports that sort and
identifies the report sort and filter by target application, instruction
filter. There are over two dozen set architecture, as well as device
sorts and filters available. architecture size and type.

All processors sorted by company ###

CPU Bus interface


Device name or On-chip frequency (address/
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits)
Digi International NS9210 Industrial RISC 75, 150 17/16

e2v 68020 Military/aerospace 25 32

EM Microelectronic EM6580 UPUS 32 kHz 7/4


800 kHz

Energy Micro EFM32G200F16 Industrial, Medical, HW AES, Cortex-M3 32 32


Security DMA, PRS
(Peripheral
Reflex System)

`
EnSilica eSi-1600 Communication/wired, configurable - eSi 600 16/16
Consumer, Digital power DSP, custom
instructions,
CRC,
Encryption

Evatronix C32025 (core) Industrial, Consumer 32-bit up to 360 16/16


accumulator, (180 nm)
16x16 MAC

Clicking on a Clicking on a device or part name will take you to


company’s name will supplemental information for that part. If the company has
take you to their not provided a link, we collect your request for that part
website. and ask how to notify you when the information is available.

i
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Actel Core8051 8051 40 16/8 16 1.5 / 1.5, FPGA Idle, stop 8x8
1.8, 2.5, 3.3 dependent
(core)
Actel CoreCORDIC Medical, Can use 130 Configurable 1.5 to 5 FPGA Sleep, standby,
Military/aerospace, from 8 to 48 dependent shutdown with
Mobile/wireless Actel Fusion
PSC

Actel CoreDDS Communication/wired, Can use 191 Configurable 1.5 to 5 FPGA Sleep, standby,
Test and measurement, from 4 to 32 dependent shutdown with
Military/aerospace Actel Fusion
PSC

Actel CoreFFT (core) Communication/wired, Can use 130 16 1.5 to 5 FPGA Sleep, standby,
Military/aerospace, dependent shutdown with
Medical, Industrial Actel Fusion
PSC

Actel CoreFIR (core) Communication/wired, Can use 174 Configurable 1.5 to 5 FPGA Sleep, standby,
Military/aerospace, from 2 to 24 dependent shutdown with
Medical, Industrial Actel Fusion
PSC

Actel Cortex-M1 ARMv6-M 29 APB, AHB 16, 32 1.5 / 1.5, FPGA User-added Yes
32/32 1.8, 2.5, 3.3 dependent
(core)

Actel ProASIC3/E Communication/wired, 350 IP specific IP specific 1.5, 1.8, Sleep, standby,
Military/aerospace, 2.5, 3.3 shutdown
Medical, Industrial,
Consumer, Automotive

Actel RTAX-S, RTAX- Military/aerospace, Up to 350 1.8 Design Standby, RTAX-DSP:


DSP Medical, Automotive dependent shutdown Up to 120 DSP
mathblocks
with 125 MHz
18 bit x 18 bit
multiply-
accumulate

Actel SmartFusion Consumer, Industrial, Cortex-M3 100 CPU, APB3, AHB, IP 32 1.5, 1.8, Sleep, standby,
Medical, Automotive, 350 FPGA specific 2.5, 3.3 shutdown
Communication/wired, Fabric
Military/aerospace

Altera Arria II GX FPGA Communication/wired, DSP blocks, Configurable Configurable 0.9 / 1.2, Configurable Configurable
Mobile/wireless, Imaging up to 736 1.5, 1.8,
and video, dedicated 2.5, 3.0
Military/aerospace 18x18-bit
multipliers
Altera Cyclone IV GX Audio, Automotive, DSP blocks, 175 Configurable Configurable 1.2 / 1.5, Configurable Configurable
FPGA Consumer, up to 360 1.8, 2.5, 3.3
Communication/wired, dedicated
Imaging and video, 18x18-bit
Industrial, Medical, multipliers
Military/aerospace,
Mobile/wireless, Motor
control
Altera HardCopy IV ASIC Mobile/wireless, DSP blocks, Up to 355 Configurable Configurable 0.9 / 1.2, Configurable Configurable
Communication/wired, up to 1288 1.5, 1.8,
Military/aerospace, Test dedicated 2.5, 3.0
and measurement, 18x18-bit
Medical, Computers and multipliers
peripherals

Page 1 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Four 8-bit or two Four 8-bit ports, full-duplex 13, four priority 12-bit ADC on (Core) -40 to +125 OCI debug interface, FS2 Free in
16-bit UART levels Fusion FPGAs debugger, reprogrammable or Actel
radiation tolerant block FPGAs
Configurable 8-Mbit memory, PCI, PCI-X, 10/100 Ethernet, (Core) -55 to +125 One of 50+ Actel Soft IP cores Free in
DDR, SDR, QDR SPI, I2C, E1, T1, UTOPIA optimized for implmentation in Actel
Level 1, 2 and 3 Actel FPGAs FPGAs

Configurable 8-Mbit memory, PCI, PCI-X, 10/100 Ethernet, (Core) -55 to +125 One of 50+ Actel Soft IP cores Free in
DDR, SDR, QDR SPI, I2C, E1, T1, UTOPIA optimized for implmentation in Actel
Level 1, 2 and 3 Actel FPGAs FPGAs

Configurable 8-Mbit memory, PCI, PCI-X, 10/100 Ethernet, Fusion FPGA (Core) -55 to +125 One of 50+ Actel Soft IP cores Free in
DDR, SDR, QDR SPI, I2C, E1, T1, UTOPIA optimized for implmentation in Actel
Level 1, 2 and 3 Actel FPGAs FPGAs

Configurable 8-Mbit memory, PCI, PCI-X, 10/100 Ethernet, Fusion FPGA (Core) -55 to +125 One of 50+ Actel Soft IP cores Free in
DDR, SDR, QDR SPI, I2C, E1, T1, UTOPIA optimized for implmentation in Actel
Level 1, 2 and 3 Actel FPGAs FPGAs

Can add User Configurable User configurable UART, IRQ, FIQ 12-bit ADC on (Core) -40 to +125 Live at power up, Free in
external to 16- or 32-bit GPIO, SPI, I²C, PCIF, 10/100 configurable Fusion FPGAs reprogrammable or radiation Actel
core timers, PWM, Ethernet tolerant block FPGAs
watchdog

Configurable 1,024-bits user PCI, PCI-X, 10/100 Ethernet, Plastic to Mil- -55 to +125 Secure AES, live at power up From $1.50
Flash memory, up SPI, I2C, E1, T1, UTOPIA Hermetic
to 2-Gbyte RAM, Level 1, 2 and 3
DDR, SDR, QDR

Configurable 540-kbit memory, LEON3 processor core, PCI, Hermetic, -55 to +125 SEU-hardened flip-flops with
DDR, SDR, QDR PCI-X, 10/100 Ethernet, SPI, CQFP and built-in TMR, Screening: E-
I2C, E1, T1, UTOPIA Level 1, CCGA/LGA Flow (Actel Extended Flow)
2 and 3 and B-Flow (Mil-STD-883B),
live at power-up, high security
RTAX-DSP devices offer on-
chip math blocks for
accellerated DSP functions

Configurable up to 512-kbytes Two 32-bit PCI, PCI-X, hard 10/100 up to 3 Plastic to Mil- -55 to +125 Secure AES, live at power up
user Flash Ethernet MAC, hard 2xSPI, programmable Hermetic
memory, up to 64- hard 2xI2C, hard 2x16550 8/10/12-bit ADC,
kbytes SRAM UART, E1, T1, UTOPIA Level up to 3
1, 2 and 3 programmable
12-bit sigma-
delta DAC, 10
comparators, 5
current monitors,
5 temperature
monitors, 10
bipolar high
voltage
monitors, -10.5
to +14v range

Configurable Up to 11.7-Mbit PCI Express, Serial RapidIO, External 572/ 780/1,152 0 to +100 Up to 16 high-speed
up to 64/64- memory, DDR2, Gigabit Ethernet, 10 Gigabit FBGA; 358 transceiver channels operating
kbyte DDR3, DDR, Ethernet, SDI, HiGig, CPRI, UBGA up to 3.75 Gbps Soft 32-bit
QDR II OBSAI, GPON, SONET Nios II processor

Configurable Up to 4-Mbit PCI, PCI-X, 10/100 Ethernet, External 144 EQFP, -40 to +125 Soft 32-bit Nios II processor
up to 64/64- memory, DDR, FPD, Flat Link, RSDS, mini- 240 PQFP, offering up to 195 DMIPS
kbyte DDR2, SDR, LVDS, SPI, IEEE394, USB 256/324/484/7 performance
SDRAM, QDR II 2.0, I2C, E1, E3, T1, T3, 80 FBGA,
SONET/SDH, POS-PHY Level 256/484 UBGA
2 and 3, UTOPIA Level 2 and
3

Configurable Up to 18.4-Mbit Supports PCI Express, External 780/1,152/1,51 -40 to +100 Soft 32-bit Nios II processor
up to 64/64- memory, DDR, Common Electrical Interface 6 7 FBGA option
kbyte DDR2, DDR3, Gbps (CEI-6G), serial digital
QDR, QDR II, interface (SDI), XAUI, SONET,
RLDRAM, Gigabit Ethernet, Serial
RLDRAM II RapidIOTM, and SerialLite II

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 2


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Altera HardCopy IV GX Mobile/wireless, DSP blocks, Up to 355 Configurable Configurable 0.9 / 1.2, Configurable Configurable
ASIC Communication/wired, up to 1288 1.5, 1.8,
Military/aerospace, Test dedicated 2.5, 3.0
and measurement, 18x18-bit
Medical, Computers and multipliers
peripherals

Altera Nios (soft core) General purpose Nios Over 125 16/16, 16 1.5, 1.8, User-added 250-MHz
or 32/32 2.5, 3.3, 5 36x36 DSP
block, two-
cycle 16x16,
1-bit/clock,
user-definable

Altera Nios II/e (economy General purpose Nios II Over 200 32/32 32 1.2, 1.5 User-added 370-MHz user-
soft core) (dynamic definable MAC
sizing) (9x9, 18x18, or
36x36)

Altera Nios II/f (fast soft General purpose Nios II Over 180 32/32 32 1.2, 1.5 User-added 370-MHz user-
core) (dynamic definable MAC
sizing) (9x9, 18x18, or
36x36)

Altera Nios II/s (standard General purpose Nios II Over 160 32/32 32 1.2, 1.5 User-added 370-MHz user-
soft core) (dynamic definable MAC
sizing) (9x9, 18x18, or
36x36)

Altera Stratix IV FPGA Mobile/wireless, DSP blocks, Up to 550 Configurable Configurable 0.9 / 1.2, Configurable Configurable
Communication/wired, up to 1360 1.5, 1.8,
Military/aerospace, Test dedicated 2.5, 3.3
and measurement, 18x18-bit
Medical, Computers and multipliers
peripherals

Altera Stratix V FPGA Communication/wired, DSP blocks, Up to 550 Configurable Configurable 0.9 / 1.2, Configurable Configurable
Military/aerospace, Test up to 3680 1.5, 1.8,
and measurement, dedicated 2.5, 3.3
Medical, Computers and 18x18-bit
peripherals multipliers.
Includes
Altera's
proprietary
Variable
Precision DSP
architecture

Altium TSK165A (also General purpose PIC16C5X Over 50 8/8 12 1.5, 1.8, Device-
available as JTAG 2.5, 3.3, 5 dependent
enabled softcore)

Altium TSK165B (also General purpose PIC16C5X Over 50 10/8 12 1.5, 1.8, Device-
available as JTAG 2.5, 3.3, 5 dependent
enabled softcore)

Page 3 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Configurable Up to 20.3-Mbit PCI Express Gen1 and Gen2 External 780/1,152/1,51 -40 to +100 Up to 36 high-speed
up to 64/64- memory, DDR, (x1, x4, x8), 7 FBGA transceiver channels operating
kbyte DDR2, DDR3, XAUI/HiGig/HiGig+, Gigabit up to 6.5 Gbps Soft 32-bit Nios
QDR, QDR II, Ethernet, Serial RapidIO, II processor option
RLDRAM, Interlaken, CEI-6G, SONET
RLDRAM II OC-3/12/48, HyperTransport
3.0, SDI, ASI, GPON,
SATA/SAS/ CPRI, OBSAI, and
3G and 6G basic modes with
rule-based protocol
configuration

Can add Configurable 1- 32-bit, watchdog, Configurable, RS-232, SPI, Up to 64, (Core) (Core) Custom instructions, hardware Royalty to
accelerator to 16-kbyte, PWM, GPIO, IDE, PCI, Ethernet configurable accelerators, simultaneous free license
block direct mapped, configurable multiple master bus in Altera
write-through PLDs; ASIC
license

Can add 32-bit, watchdog, RS-232, SPI, GPIO, IDE, PCI, 32 (Core) (Core) Over 30 DMIPs, 256 custom From 35
accelerator PWM, JTAG, Ethernet, DMA, instructions, unlimited cents;
block configurable Compact Flash hardware accelerators, over 60 royalty to
available peripherals free in
Altera
FPGAs;
ASIC
license
Can add Configurable 32-bit, watchdog, RS-232, SPI, GPIO, IDE, PCI, 32 (Core) (Core) Over 200 DMIPs, 256 custom From $1.12;
accelerator up to 64/64- PWM, JTAG, Ethernet, DMA, instructions, unlimited royalty to
block kbyte configurable Compact Flash hardware accelerators, over 60 free in
available peripherals Altera
FPGAs;
ASIC
license

Can add Configurable 32-bit, watchdog, RS-232, SPI, GPIO, IDE, PCI, 32 (Core) (Core) Over 125 DMIPs, 256 custom From 78
accelerator up to 64/64- PWM, JTAG, Ethernet, DMA, instructions, unlimited cents;
block kbyte configurable Compact Flash hardware accelerators, over 60 royalty to
available peripherals free in
Altera
FPGAs;
ASIC
license
Configurable Up to 22.4-Mbit PCI Express Gen1 and Gen2 External 780/1,152/1,51 -40 to +100 Up to 680K equivalent logic
up to 64/64- memory, SDR, (x1, x4, x8), 7/1,760/1,932 elements. Soft 32-bit Nios II
kbyte DDR, DDR2, XAUI/HiGig/HiGig+, Gigabit FBGA processor
DDR3, QDR II, Ethernet, Serial RapidIO,
RLDRAM II Interlaken, CEI-6G, SONET
OC-3/12/48, HyperTransport
3.0, SDI, ASI, GPON,
SATA/SAS/ CPRI, OBSAI, and
3G and 6G basic modes with
rule-based protocol
configuration

Configurable Up to 20.3-Mbit 10G Ethernet, 10G Fibre External 1,517/1,932 0 to +100 Up to 530K equivalent logic
up to 64/64- memory, SDR, Channel, SONET/SDH FBGA elements. Up to 24 high-speed
kbyte DDR, DDR2, OC192/STM-64, G.709 OUT- transceiver channels (11.3
DDR3, QDR II, 2, 40G/100G IEEE 802.3ba, Gbps), up to 12 high-speed
RLDRAM II Interlaken, SPAUI, DDR-XAUI, transceiver channels (8.5
SFI-4.2, SFI-5.1, SFI-5.2 and Gbps), up to 12 high-speed
SFI-S. x4 PCI Express Gen1 transceiver (6.5 Gbps). DDR-3
and Gen 2 hard IP block. 533 MHz (1067 Mbps). Soft 32-
bit Nios II processor option

Watchdog CAN/RS232, EMAC, I²C, LCD, Controller (Core) (Core) over 59 available peripherals
Serial Flash, Configurable IO available as IP (also available with JTAG
Port, PS2, SPI, RS-232, SPI, peripheral core enabled on-chip debug
VGA, External Timer, interface)
Ethernet, DMA, JTAG

Watchdog CAN/RS232, EMAC, I²C, LCD, Controller (Core) (Core) over 59 available peripherals,
Serial Flash, Configurable IO available as IP (also available with JTAG
Port, PS2, SPI, RS-232, SPI, peripheral core enabled on-chip debug
VGA, External Timer, interface)
Ethernet, DMA, JTAG

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 4


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Altium TSK165C (also General purpose PIC16C5X Over 50 10/8 12 1.5, 1.8, Device-
available as JTAG 2.5, 3.3, 5 dependent
enabled softcore)

Altium TSK3000 General purpose TSK3000 Over 50 32/32 32 1.5, 1.8, Device- 32x32
(Standard and 2.5, 3.3, 5 dependent
JTAG enabled
softcore)

Altium TSK51A (also General purpose 80C31 Over 50 16/8 8 1.5, 1.8, Device- 8x8
available as JTAG 2.5, 3.3, 5 dependent
enabled softcore)

Altium TSK52A (also General purpose ASM51 Over 50 16/8 8 1.5, 1.8, Device- 8x8
available as JTAG 2.5, 3.3, 5 dependent
enabled softcore)

Altium TSK52B_WD General purpose ASM51 Over 50 16/8 8 1.5, 1.8, Device- 8x8
2.5, 3.3, 5 dependent

Altium TSK80A (also General purpose Z80CPU Over 40 16/8 8 1.5, 1.8, Device- Idle, stop 8 ALU, 16
available as JTAG 2.5, 3.3, 5 dependent Arithmetic
enabled softcore)

AMD Athlon 64 General purpose x86 1800 to 16/16, 128-bit variable (x86) 1.25 to 1.5 35 W, 62 W ACPI, 3W (Halt),
2400 memory bus TDP (socket 250mW (S3),
AM2); 67 W, multiple p-states
89 W (socket
939)
AMD Athlon 64 FX dual- General purpose x86 2600 to 16/16, 128-bit variable (x86) 1.2 to 1.35 125 W TDP ACPI, 3W (Halt),
core 2800 memory bus (socket AM2); 250mW (S3),
110 W multiple p-states
TDP(socket
939)
AMD Athlon 64 X2 dual- General purpose x86 2000 to 16/16, 128-bit variable (x86) 1.3 to 1.4 35 W, 65 W, ACPI, 3W (Halt),
core 2800 memory bus 89 W TDP 250mW (S3),
(socket AM2); multiple p-states
89 W, 110 W
(socket 939)

AMD Dual-Core Opteron General purpose x86 1800 16/16 variable (x86) 95 W
165
AMD Dual-Core Opteron General purpose x86 1800 16/16 variable (x86) 55 W
165HE
AMD Dual-Core Opteron General purpose x86 1800 16/16 variable (x86) 95 W
265
AMD Dual-Core Opteron General purpose x86 1800 16/16 variable (x86) 55 W
265HE
AMD Dual-Core Opteron General purpose x86 1800 16/16 variable (x86) 95 W
865
AMD Dual-Core Opteron General purpose x86 1800 16/16 variable (x86) 55 W
865HE
AMD Geode GX General purpose x86 333 internal: 32 32 1.5 0.9 W ACPI 0W (S3)
466@0.9W
AMD Geode GX General purpose x86 366 internal: 32 32 1.5 1W ACPI 0W (S3)
500@1.0W
AMD Geode GX General purpose x86 400 internal: 32 32 1.5 1.1 W ACPI 0W (S3)
533@1.1W
AMD Geode LX General purpose x86 433 internal: 32 32 1.2 0.8 W ACPI OW (S3)
700@0.8W

AMD Geode LX General purpose x86 500 internal: 32 32 1.2 0.9 W ACPI 0W (S3)
800@0.9W

AMD Geode NX General purpose x86 667 internal: 32 32 1.1 6W 3W (Stop Grant)
1250@6W
AMD Geode NX General purpose x86 1000 internal: 32 32 1 6W 3W (Stop Grant)
1500@6W

Page 5 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Watchdog CAN/RS232, EMAC, I²C, LCD, Controller (Core) (Core) over 59 available peripherals,
Serial Flash, Configurable IO available as IP (also available with JTAG
Port, PS2, SPI, RS-232, SPI, peripheral core enabled on-chip debug
VGA, External Timer, interface)
Ethernet, DMA, JTAG

Optional 64-bit clock, 32- CAN/RS232, EMAC, I²C, LCD, 32 Controller (Core) (Core) JTAG enabled on-chip debug
IEEE 754 bit PIT Serial Flash, Configurable IO available as IP interface, over 50 DMIPs, over
FPU Port, PS2, SPI, RS-232, SPI, peripheral core 59 available peripherals
VGA, BT656 Analog Video,
External Timer, Ethernet,
DMA, JTAG

Two 16-bit CAN/RS232, EMAC, I²C, LCD, 5 (2 Timer, Controller (Core) (Core) over 59 available peripherals,
configurable Serial Flash, Configurable IO Serial, 2 available as IP (also available with JTAG
Port, PS2, SPI, RS-232, SPI, External) peripheral core enabled on-chip debug
VGA, External Timer, interface)
Ethernet, DMA, JTAG

CAN/RS232, EMAC, I²C, LCD, 7 external Controller (Core) (Core) over 59 available peripherals,
Serial Flash, Configurable IO available as IP (also available with JTAG
Port, PS2, SPI, RS-232, SPI, peripheral core enabled on-chip debug
VGA, External Timer, interface)
Ethernet, DMA, JTAG

CAN/RS232, EMAC, I²C, LCD, 7 external Controller (Core) (Core) wishbone interface, over 59
Serial Flash, Configurable IO available as IP available peripherals, (also
Port, PS2, SPI, RS-232, SPI, peripheral core available with JTAG enabled
VGA, External Timer, on-chip debug interface)
Ethernet, DMA, JTAG

CAN/RS232, EMAC, I²C, LCD, 2 (Maskable Controller (Core) (Core) over 59 available peripherals,
Serial Flash, Configurable IO and NMI) available as IP (also available with JTAG
Port, PS2, SPI, RS-232, SPI, peripheral core enabled on-chip debug
VGA, External Timer, interface)
Ethernet, DMA, JTAG

Integrated 64-kbyte, L2: 2 GHz Hyper-Transport to 940 LGA; +5 to +65 or Cool'n'Quiet, Enhanced Virus $231 to
512-kbyte- or chipset and I/O 939 uPGA higher Protection, AMD Digital Media $343
1000-Mbyte Xpress

Integrated 64-kbyte (per 2 GHz Hyper-Transport to 940 LGA; +5 to +63 or Cool'n'Quiet, Enhanced Virus $827 to
core) chipset and I/O 939 uPGA higher Protection, AMD Digital Media $1031
L2: 1-Mbyte Xpress
(per core)

Integrated 64-kbyte (per 2 GHz Hyper-Transport to 940 LGA; +5 to +65 or Cool'n'Quiet, Enhanced Virus $303 to
core), chipset and I/O 939 uPGA higher Protection, AMD Digital Media $696
L2: 512-kbyte Xpress
or 1-Mbyte
(per core)

L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit


(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $316
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $690
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $698
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $1165
(per core) oPGA
Integrated 16-kbyte 256 entry TLB $26.50

Integrated 16-kbyte 256 entry TLB $29.15

Integrated 16-kbyte 256 entry TLB $32.75

Integrated 64/64-kbyte,
L2: 128-kbyte

Integrated 64/64-kbyte,
L2: 128-kbyte

Integrated 384-kbyte 256 entry TLB 453 Socket A -40 to +95 $65
OPGA
Integrated 384-kbyte 256 entry TLB 453 Socket A -40 to +95 $65
OPGA

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 6


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
AMD Geode NX General purpose x86 1400 internal: 32 32 1.25 14 W 3W (Stop Grant)
1750@14W
AMD Mobile Athlon 64 General purpose x86 1600 to 16/16 variable (x86) 1.15 to 1.35 62 W TDP ACPI C1/C2/C3
2400 (1.2 HT)
AMD Mobile Sempron General purpose x86 1600 to 16/16 variable (x86) 1.1 to 1.35 25 and 62 W ACPI C1/C2/C3
2000 (1.2 HT) TDP

AMD Opteron 144EE General purpose x86 1800 16/16 variable (x86) 30 W

AMD Opteron 148HE General purpose x86 2200 16/16 variable (x86) 55 W

AMD Opteron 152 General purpose x86 2600 16/16 variable (x86) 95 W

AMD Opteron 244EE General purpose x86 1800 16/16 variable (x86) 30 W

AMD Opteron 248HE General purpose x86 2200 16/16 variable (x86) 55 W

AMD Opteron 252 General purpose x86 2600 16/16 variable (x86) 95 W

AMD Opteron 848HE General purpose x86 2200 16/16 variable (x86) 55 W

AMD Opteron 852 General purpose x86 2600 16/16 variable (x86) 95 W

AMD Sempron General purpose x86 1600 to 16/16, 128-bit variable (x86) 1.25 to 1.4 35 W, 62 W ACPI, 3W (Halt),
2200 memory bus TDP (socket 250mW (S3), p-
AM2); 62 W states on select
(socket 939) models

AMD Turion 64 General purpose x86 1600 to 16/16 variable (x86) 0.85 to 1.35 25 and 35 W ACPI
2200 (1.2 HT) TDP C1/C2/C3/C3
Deeper sleep

AMD Turion 64 X2 General purpose x86 1600 to 16/16 variable (x86)


2200
Analog Devices AD1940 Audio, Consumer Yes, several 75 16-channel 40 2.5 to 3.3 240 mW
Audio I/O

Analog Devices AD1941 Audio, Consumer Yes, several 75 16-channel 40 2.5 to 3.3 240 mW
Audio I/O

Analog Devices AD1953 Audio, Consumer Yes, several 25 6-channel 40 5 280 mW


Audio I/O

Analog Devices AD1954 Audio, Consumer Yes, several 25 2-channel 40 5 450 mW


Audio I/O

Analog Devices ADAU1401 Audio, Automotive Yes, several 50 8-channel 40 1.8 to 3.3 280 mW
Audio I/O
Analog Devices ADAU1442 Audio, Automotive Yes, several 172 24-channel 40 1.8 to 3.3 600 mW
Audio I/O

Analog Devices ADAU1445 Audio, Automotive Yes, several 172 24-channel 40 1.8 to 3.3 600 mW
Audio I/O

Analog Devices ADAU1446 Audio, Automotive Yes, several 172 24-channel 40 1.8 to 3.3 600 mW
Audio I/O

Analog Devices ADAU1701 Audio, Consumer Yes, several 50 8-channel 40 1.8 to 3.3 280 mW 56-bit fixed
Audio I/O point
Analog Devices ADAU1702 Audio, Consumer Yes, several 25 8-channel 40 1.8 to 3.3 280 mW 56-bit fixed
Audio I/O point

Analog Devices ADAU1761 Audio, Consumer Yes, several 50 8-channel 40 1.8 to 3.3 10 mW
Audio I/O
Analog Devices ADAV400 Audio Yes, several 125 8-channel 41 1.8 to 3.3 650 mW
Audio I/O

Analog Devices ADSP- BF561 Mobile/wireless, Audio, 500, 600 32 16, 32, 64 0.8 to 1.35 / 650 mW Full-on, active,
Automotive, 2.5 and 3.3 sleep, deep
Communication/wired, sleep, hibernate
Consumer, General (<50 µA)
purpose, Imaging and
video, Industrial, Medical,
Military/aerospace,
Security, Test and
measurement

Page 7 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Integrated 384-kbyte 256 entry TLB 453 Socket A -40 to +95 $55
OPGA
Yes 64-kbyte, L2: 1- Hyper-Transport 754 uPGA, 0 to +95 NX bit, SSE3 $115 to
Mbyte lidless $307
Yes 64-kbyte, L2: Hyper-Transport 754 uPGA, 0 to +95 NX bit, SSE3 $107 to
256/128-kbyte lidless $142

L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit


(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $163
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $455
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $455
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $873
(per core) oPGA
L2: 1-Mbyte Hyper-Transport Lidded 940 0 to +95 NX bit $873
(per core) oPGA
Integrated 64-kbyte, 1.6 GHz + E19 Hyper- 940 LGA; +5 to +69 or Cool'n'Quiet, Enhanced Virus $67 to $145
L2: 512-kbyte Transport to chipset and I/O 754 uPGA higher Protection+X15
or 1-Mbyte

Yes 64-kbyte, Hyper-Transport 754 uPGA, 0 to +95 NX bit, SSE3 $150 to


L2: 512-kbyte lidless $354
or 1-Mbyte

Hyper-Transport 0 to +95 NX bit, SSE3 $184 to


$354
6-kbyte data, 1.5- SPI, 16-channel digital I/O 48 LQFP -40 to +105 28 / 56-bit DSP-core $5.96
kbyte program

6-kbyte data, 1.5- I2C, 16-channel digital I/O 48 LQFP -40 to +105 28 / 56-bit DSP-core $5.96
kbyte program

1-kbyte data, 0.5- SPI Three DAC 48 LQFP -40 to +105 26 / 52-bit DSP-core $5.88
kbyte program

1-kbyte data, 0.5- SPI Three DAC 48 LQFP -40 to +105 26 / 52-bit DSP-core
kbyte program

2-kbyte data, 1- SPI, I2C, self-boot, Aux-ADC Two ADC; four 48 LQFP -40 to +105 28 / 56-bit DSP-core $4.73
kbyte program (8-bit), GPIO DAC
8-kbyte data, 3.5- SPI, I2C, self-boot, Aux-ADC 100TQFP -40 to +105 28 / 56-bit DSP-core
kbyte program (10-bit), GPIO, SRC (8
stereo), SPDIF
8-kbyte data, 3.5- SPI, I2C, self-boot, Aux-ADC 100TQFP -40 to +105 28 / 56-bit DSP-core
kbyte program (10-bit), GPIO, SRC (2x8ch),
SPDIF
8-kbyte data, 3.5- SPI, I2C, self-boot, Aux-ADC 100TQFP -40 to +105 28 / 56-bit DSP-core
kbyte program (10-bit), GPIO, SPDIF

2-kbyte data, 1- SPI, I2C, self-boot, Aux-ADC Two ADC; four 48 LQFP 0 to +70 28 / 56-bit DSP-core $3.72
kbyte program (8-bit), GPIO DAC
0.5-kbyte data, SPI, I2C, self-boot, Aux-ADC Two ADC; four 48 LQFP 0 to +70 28 / 56-bit DSP-core $2.93
0.5-kbyte program (8-bit), GPIO DAC

4-kbyte data, 1- Digital microphone, SPI, I2C, Two ADC; two 32 LFCSP -40 to +85 28 / 56-bit DSP-core
kbyte program GPIO, mic bias, HP DAC
20-kbyte data, 2.5- I2C, sample-rate converter, One stereo 80 LQFP 0 to +70 28 / 56-bit DSP-core
kbyte program headphone output ADC; four mux-
to-stereo ADC;
four stereo DAC

Up to 16/32- Up to 32-/64- Two 16-bit parallel (ITU-R 656 256 mBGA, 0 to +70, Symmetric dual Blackfin cores
kbyte per core kbyte compliant), two dual channel, 297 PBGA -40 to +85
instruction/data full duplex synchronous serial
per core, 8-kbyte port, 12 32-bit PWM, SPI-
scratchpad RAM, compatible port, UART (IrDA),
128-byte L2 dual watchdog, 48 GPIO
SRAM, three
DMA, SDRAM,
SRAM, flash,
ROM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 8


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Analog Devices ADSP-21261 General purpose, SHARC 150 16: muxed 48 1.2 / 3.3 32-bit fixed
Industrial, Medical, point / 32- and
Military/aerospace, 40-bit floating
Security, Test and point
measurement

Analog Devices ADSP-21262 General purpose, SHARC 200 16: muxed 48 1.2 / 3.3 32-bit fixed
Industrial, Medical, point / 32- and
Military/aerospace, 40-bit floating
Security, Test and point
measurement

Analog Devices ADSP-21266 Consumer, Audio SHARC 150, 200 16: muxed 48 1.2 / 3.3 32-bit fixed
point / 32- and
40-bit floating
point

Analog Devices ADSP-21362 Automotive SRC, DTCP SHARC 200, 333 16: muxed 48 1.2 / 3.3 1.05 W 32-bit fixed
point / 32- and
40-bit floating
point

Analog Devices ADSP-21363 General purpose, SRC SHARC 200, 333 16: muxed 48 1.2 / 3.3 1.05 W 32-bit fixed
Industrial, Medical, point / 32- and
Military/aerospace, 40-bit floating
Security, Test and point
measurement

Analog Devices ADSP-21364 General purpose, SRC SHARC 333 16: muxed 48 1.2 / 3.3 1.05 W 32-bit fixed
Industrial, Medical, point / 32- and
Military/aerospace, 40-bit floating
Security, Test and point
measurement

Analog Devices ADSP-21365 Automotive SRC, DTCP SHARC 333 16: muxed 48 1.2 / 3.3 1.05 W 32-bit fixed
point / 32- and
40-bit floating
point

Analog Devices ADSP-21366 Consumer, Audio SRC SHARC 333 16: muxed 48 1.2 / 3.3 1.05 W 32-bit fixed
point / 32- and
40-bit floating
point

Analog Devices ADSP-21367 Consumer, Audio SRC SHARC 266, 333, 32: SDRAM 48 1.2 (1.3) / 1.6 W 32-bit fixed
350, 366, 3.3 point / 32- and
400 40-bit floating
point

Analog Devices ADSP-21368 General purpose, SRC SHARC 333, 400 32: SDRAM 48 1.2 (1.3) / 1.6 W 32-bit fixed
Industrial, Medical, 3.3 point / 32- and
Military/aerospace, 40-bit floating
Security, Test and point
measurement

Analog Devices ADSP-21369 General purpose, SRC SHARC 266, 333, 32: SDRAM 48 1.2 (1.3) / 1.6 W 32-bit fixed
professional Audio, 350, 366, 3.3 point / 32- and
Industrial, Medical, 400 40-bit floating
Military/aerospace, point
Security, Test and
measurement

Analog Devices ADSP-21371 General purpose, SHARC 266 32: SDRAM 48 1.2 / 3 / 3 0.925 W 32-bit fixed
Industrial, Medical, point / 32- and
Military/aerospace, 40-bit floating
Security, Test and point
measurement

Page 9 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-bit 2-Mbyte RAM 3 with PWM SPI , Signal Routing Unit, four 10, four 136 BGA, 144 0 to +70 , -40 Up to 16 simultaneous I2S $6.64
output and TDM serial ports, input data dedicated LQFP to +85 channels (1000)
capture, two port, 18-channel DMA flags/IRQs, six
precision clock flag inputs and
generators outputs

32-bit 2-Mbyte RAM 3 with PWM SPI, Signal Routing Unit, six 10, four 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S $17.15 to
output and TDM serial ports, input data dedicated LQFP -40 to +85 channels $25.35
capture, two port, 22-channel DMA flags/IRQs, six (1000)
precision clock flag inputs and
generators outputs

32-bit 2-Mbyte RAM, 3- 3 with PWM SPI, Signal Routing Unit, six 10, four 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S
Mbyte ROM output and TDM serial ports, input data dedicated LQFP -40 to +85 channels, Audio decoders in
capture, two port, 22-channel DMA flags/IRQs, six ROM need license
precision clock flag inputs and
generators outputs

32-bit 3-Mbyte RAM 3 with PWM Signal Routing Unit, S/PDIF 10, six flag 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S $27.12 to
output and receive/transmit, SPI, six TDM inputs and LQFP E-PAD -40 to +85, channels, 8-channel $32.55
capture, 16 serial ports, input data port, 25- outputs -40 to +105 asynchronous sample rate (1000)
channel PWM, channel DMA (200MHz QFP converter
two precision only)
clock generators

32-bit 3-Mbyte RAM 3 with PWM Signal Routing Unit with six 10, six flag 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S $20.22 to
output and TDM serial ports, SPI, input inputs and LQFP E-PAD -40 to +85, channels $29.13
capture, 16 data port, 25-channel DMA outputs -40 to +105 (1000)
channel PWM, (200MHz QFP
two precision only)
clock generators

32-bit 3-Mbyte RAM 3 with PWM Signal Routing Unit, S/PDIF 10, six flag 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S $29.75 to
output and receive/transmit, SPI, six TDM inputs and LQFP E-PAD -40 to +85, channels, 8-channel $42.85
capture, 16 serial ports, input data port, 25- outputs -40 to +105 asynchronous sample rate (1000)
channel PWM, channel DMA (200MHz QFP converter
two precision only)
clock generators

32-bit 3-Mbyte RAM, 4- 3 with PWM Signal Routing Unit, S/PDIF 10, six flag 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S
Mbyte ROM output and receive/transmit, SPI, six TDM inputs and LQFP E-PAD -40 to +85, channels, Audio decoders in
capture, 16 serial ports, input data port, 25- outputs -40 to +105 ROM need license from IP
channel PWM, channel DMA (200MHz QFP holders, 8-channel
two precision only) asynchronous sample rate
clock generators converter,DTCP

32-bit 3-Mbyte RAM, 4- 3 with PWM Signal Routing Unit, S/PDIF 10, six flag 136 BGA, 144 0 to +70, Up to 24 simultaneous I2S
Mbyte ROM output and receive/transmit, SPI, six TDM inputs and LQFP E-PAD -40 to +85, channels, Audio decoders in
capture, 16 serial ports, input data port, 25- outputs -40 to +105 ROM, need license from IP
channel PWM, channel DMA (200MHz QFP holders, 8-channel
two precision only) asynchronous sample rate
clock generators converter

32-bit 2-Mbyte RAM, 6- 3 with PWM Eight TDM serial ports, S/PDIF 10 256 SBGA, 0 to +70, Up to 32 simultaneous I2S
Mbyte on chip output and transmit/receive, UART, up to 208 LQFP -40 to +85 channels, Audio decoders in
ROM capture, 16 34 GPIO, two SPI, one TWI, EPAD ROM need license from IP
channel PWM, input data port, signal routing holders, asynchronous sample
two precision unit rate converter
clock generators

32-bit 2-Mbyte RAM 3 with PWM Eight TDM serial ports, S/PDIF 10 256 SBGA 0 to +70, Up to 32 simultaneous I2S $31.04 to
output and transmit/receive, UART, up to -40 to +85 channels, shared-memory to $41.39
capture, 16 34 GPIO, two SPI, one TWI, arbitrate the bus and gluelessly (1000)
channel PWM, input data port, signal routing access a common memory
two precision unit device, asynchronous sample
clock generators rate converter

32-bit 2-Mbyte RAM 3 with PWM Eight TDM serial ports, S/PDIF 10 256 SBGA, 0 to +70, Up to 32 simultaneous I2S $19.69 to
output and transmit/receive, UART, up to 208 LQFP -40 to +85 channels, asynchronous 37.91
capture, 16 34 GPIO, two SPI, one TWI, EPAD sample rate converter. (1000)
channel PWM, input data port, signal routing
two precision unit
clock generators

32-bit instruction 1-Mbyte RAM 2 timers, four Eight TDM serial ports, UART, 3 208 LQFP 0 to +70, Up to 16 simultaneous I2S $13.27 to
precision clock one TWI, input data port, EPAD -40 to +85, channels, supports execution $15.92
generators signal routing unit -40 to +105 from external SDRAM (1000)
(200MHz only)

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 10


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Analog Devices ADSP-21375 General purpose, SHARC 266 16: SDRAM 48 1.2 / 3 / 3 0.878 W 32-bit fixed
professional Audio, point / 32- and
Industrial, Medical, 40-bit floating
Military/aerospace, point
Security, Test and
measurement
Analog Devices ADSP-BF504 Mobile/wireless, Audio, Blackfin 300, 400 16, 32, 64 1.2 to 1.4 / <139 mW Full-On, active, Dual 16-bit
ADSP-BF504F Automotive, 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF506F Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs
Analog Devices ADSP-BF512 Mobile/wireless, Audio, Blackfin 300, 400 20/16 16, 32, 64 1.2 to 1.4 / 139 mW Full-On, active, Dual 16-bit
ADSP-BF514 Automotive, Async/Sync 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF516 Communication/wired, sleep, hibernate dual 40-bit
ADSP-BF518 Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Analog Devices ADSP-BF522 Mobile/wireless, Audio, Blackfin 300, 400 20/16 16, 32, 64 1.25 to 1.4 / 158 mW Full-On, active, Dual 16-bit
ADSP-BF524 Automotive, Async/Sync 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF526 Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Analog Devices ADSP-BF522C Mobile/wireless, Audio, Blackfin 300, 400 20/16 16, 32, 64 1.25 to 1.4 / 158 mW Full-On, active, Dual 16-bit
ADSP-BF524C Automotive, Async/Sync 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF526C Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Analog Devices ADSP-BF523 Mobile/wireless, Audio, Blackfin 533, 600 20/16 16, 32, 64 0.95 to 1.25 205 mW Full-On, active, Dual 16-bit
ADSP-BF525 Automotive, Async/Sync / 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF527 Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Analog Devices ADSP-BF523C Mobile/wireless, Audio, Blackfin 533, 600 20/16 16, 32, 64 0.95 to 1.25 205 mW Full-On, active, Dual 16-bit
ADSP-BF525C Automotive, Async/Sync / 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF527C Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Page 11 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-bit instruction 0.5-Mbyte RAM 2 timers, four Four TDM serial ports, UART, 3 208 LQFP 0 to +70, Up to 16 simultaneous I2S $9.83 to
precision clock one TWI, input data port, EPAD -40 to +85, channels, supports execution $11.79
generators signal routing unit -40 to +105 from external SDRAM (1000)
(200MHz only)

Up to 16/16- Up to 32-kbyte Eight general, 2 UART, 2 SPORT, 2 SPI, 56 12-bit 2Msps 88 LFCSP 0 to +70, PLL, JYAG, Up to 16 $5.18 to
kbyte instruction, Up to watchdog, two TWI dual SAR ADC 12X12 0.5mm -40 to +85, simultaneous I2S channels, $12.78
32-kbyte data, 4- PWM CAN, PPI/LCD, RSI/SDIO, 2 (12-ch) 120 LQFP-EP -40 to +105 Supports execution from (1000)
kbyte scratchpad Rotary Enc, ACM, (506F only) 14X14 0.4mm internal parallel FLASH (F), 14
RAM, 4-Mbyte upto 35 GPIO DMA ch.
FLASH
(504F/506F)

Up to 16/32- Up to 48-kbyte Eight general, 2 UART, 2 SPORT, 2 SPI, 56 168 CSP_BGA 0 to +70, PLL, JTAG, Up to 16 $6.26 to
kbyte instruction, Up to watchdog, TWI, PPI/LCD, Lockbox, 12x12 0.8mm -40 to +85, simultaneous I2S channels, $14.45
64-kbyte data, 4- realtime, two ATAPI, Rotary Enc, upto 40 176 LQFP-EP -40 to +105 supports execution from (1000)
kbyte scratchpad PWM GPIO 24x24m0.5mm (300MHz only) external SDRAM
RAM, ROM, DMA, RSI/SDIO (not 512) Optional in pkg SPI FLASH, 14
SDRAM, Ethernet MAC (516) DMA ch.
mSDRAM, SRAM, (IEEE-1588 support on 518)
FLASH. 64-kbit
OTP
(51xF Embedded
512-kbyte SPI
FLASH)

Up to 16/32- Up to 64-kbyte Eight general, Ethernet MAC (526) , 56 208 CSP_BGA -40 to +85 PLL, JTAG, Up to 16 $8.18 to
kbyte instruction, Up to watchdog, USB 2.0 HS OTG (526/524), 17x17 0.8mm 0 to +70 simultaneous I2S channels, $13.82
64-kbyte data, 4- realtime, PWM 2 UART, 2 SPORT, SPI, TWI 289 CSP_BGA supports execution from (1000)
kbyte scratchpad PPI/LCD, Host DMA, Rotary 12x12 0.5mm external SDRAM,
RAM, ROM, DMA, Enc, upto 48 GPIO NAND flash controller,
SDRAM, LockBox Security,
mSDRAM, SRAM, 14 DMA ch.
NOR flash, NAND
FLASH. 64-kbit
OTP

Up to 16/32- Up to 64-kbyte Eight general, Ethernet MAC (526C) , 56 Embedded 289 CSP_BGA 0 to +70 PLL, JTAG, Up to 16 $9.89 to
kbyte instruction, Up to watchdog, USB 2.0 HS OTG stereo audio 12x12 0.5mm simultaneous I2S channels, $15.53
64-kbyte data, 4- realtime, PWM (526C/524C), codec supports execution from (1000)
kbyte scratchpad 2 UART, 2 SPORT, SPI, TWI external SDRAM,
RAM, ROM, DMA, PPI/LCD, Host DMA, Rotary NAND flash controller,
SDRAM, Enc, upto 48 GPIO LockBox Security,
mSDRAM, SRAM, 14 DMA ch.
NOR flash, NAND
FLASH. 64-kbit
OTP

Up to 16/32- Up to 64-kbyte Eight general, Ethernet MAC (527) , 56 208 CSP_BGA -40 to +85 PLL, JTAG, Up to 16 $13.46 to
kbyte instruction, Up to watchdog, USB 2.0 HS OTG (527/525), 17x17 0.8mm 0 to +70 simultaneous I2S channels, $20.56
64-kbyte data, 4- realtime, PWM 2 UART, 2 SPORT, SPI, TWI 289 CSP_BGA supports execution from (1000)
kbyte scratchpad PPI/LCD, Host DMA, Rotary 12x12 0.5mm external SDRAM,
RAM, ROM, DMA, Enc, upto 48 GPIO NAND flash controller,
SDRAM, LockBox Security,
mSDRAM, SRAM, 14 DMA ch.
NOR flash, NAND
FLASH. 64-kbit
OTP

Up to 16/32- Up to 64-kbyte Eight general, Ethernet MAC (527C) , 56 Embedded 289 CSP_BGA 0 to +70 PLL, JTAG, Up to 16 $15.63 to
kbyte instruction, Up to watchdog, USB 2.0 HS OTG stereo audio 12x12 0.5mm simultaneous I2S channels, $22.89
64-kbyte data, 4- realtime, PWM (527C/525C), codec supports execution from (1000)
kbyte scratchpad 2 UART, 2 SPORT, SPI, TWI external SDRAM,
RAM, ROM, DMA, PPI/LCD, Host DMA, Rotary NAND flash controller,
SDRAM, Enc, upto 48 GPIO LockBox Security,
mSDRAM, SRAM, 14 DMA ch.
NOR flash, NAND
FLASH. 64-kbit
OTP

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 12


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Analog Devices ADSP-BF531 Mobile/wireless, Audio, Blackfin 400 to 600 20/16 16, 32, 64 0.8 to 1.45 / 319 mW Full-On, active, Dual 16-bit
ADSP-BF532 Automotive, Async/Sync 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF533 Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs
Analog Devices ADSP-BF534 Automotive, Industrial Blackfin 400 to 500 20/16 16, 32, 64 0.8 to 1.32 / 210 mW Full-On, active, Dual 16-bit
Async/Sync 2.25 to 3.6 (core) sleep, deep MACs
sleep, hibernate dual 40-bit
(50 µA) ALUs
40-bit shifter
dual data
address
generators
quad 8-bit
video ALUs
Analog Devices ADSP-BF535 Mobile/wireless, Audio, Blackfin 200 to 350 26/32 16, 32, 64 1.0 to 1.6 / 797 mW Full-On, active, Dual 16-bit
Automotive, Async/Sync 3.15 to 3.45 (core) sleep, deep MACs
Communication/wired, sleep dual 40-bit
Consumer, General ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Analog Devices ADSP-BF536 Mobile/wireless, Audio, Blackfin 300 to 600 20/16 16, 32, 64 0.8 to 1.43 / 295 mW Full-On, active, Dual 16-bit
ADSP-BF537 Automotive, Async/Sync 2.25 to 3.6 (core) sleep, deep MACs
Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs
Analog Devices ADSP-BF538 Automotive, Industrial Blackfin 400 to 533 20/16 16, 32, 64 0.8 to 1.25 225 mW Full-On, active, Dual 16-bit
ADSP-BF538F Async/Sync (core) sleep, deep MACs
sleep, hibernate dual 40-bit
ALUs
40-bit shifter
dual data
address
generators
quad 8-bit
video ALUs

Analog Devices ADSP-BF539 Automotive, Industrial Blackfin 533 20/16 16, 32, 64 1.0 to 1.25 225 mW Full-On, active, Dual 16-bit
ADSP-BF539F Async/Sync (core) sleep, deep MACs
sleep, hibernate dual 40-bit
ALUs
40-bit shifter
dual data
address
generators
quad 8-bit
video ALUs

Analog Devices ADSP-BF542 Mobile/wireless, Audio, Pixel Blackfin 400, 533, 20/16 16, 32, 64 0.9 to 1.4 / 462 mW Full-On, active, Dual 16-bit
ADSP-BF544 Automotive, compositer for 600 Async/Sync 1.8 to 3.3 (core) sleep, deep MACs
ADSP-BF547 Communication/wired, color sleep, hibernate dual 40-bit
ADSP-BF548 Consumer, General conversion (50 µA) ALUs
ADSP-BF549 purpose, Imaging and and alpha 40-bit shifter
video, Industrial, Medical, blending dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs

Page 13 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to 16/32- Up to 80-kbyte Three general, UART, 2 SPORT, SPI, 24 169 PBGA -40 to +85 Voltage regulator, PLL, JTAG, $5.99 to
kbyte instruction, up to watchdog, PPI/LCD, 16 GPIO 19x19 1.0mm 0 to +70 Up to 16 simultaneous I2S $20.19
64-kbyte data, 4- realtime, PWM 160 CSP_BGA channels, supports execution (1000)
kbyte scratchpad 12x12 0.8mm from external SDRAM,
RAM, DMA, 176 ld LQFP 12 DMA ch.
SDRAM, SRAM, 24x24 0.5mm
flash, ROM

Up to 16/32- Up to 64-kbyte Eight general, 2 UART, 2 SPORT, SPI, TWI, 32 182 CSP_BGA -40 to +85 Voltage regulator, PLL, JTAG, $12.40 to
kbyte instruction, Up to watchdog, CAN PPI/LCD, upto 48 GPIO 12x12 0.8mm -40 to +105 Up to 16 simultaneous I2S $18.53
64-kbyte data, 4- realtime, PWM 208 CSP_BGA channels, supports execution (1000)
kbyte scratchpad 17x17 0.8mm from external SDRAM,
RAM, DMA, 14 DMA ch
SDRAM, SRAM,
flash, ROM

Up to 16/32- 16-kbyte Three general, UART, 2 SPORT, UART, SPI 260 PBGA -40 to +85 JTAG, 12 DMA ch. $31.27 to
kbyte instruction, 32- watchdog, PCI, USB 1.1 Device, 16 GPIO 19x19 1.0mm 0 to +70 $43.00
kbyte data, 4- realtime, PWM (1000)
kbyte scratchpad
RAM, 256-kbyte
L2 SRAM, DMA,
SDRAM, SRAM,
flash, ROM

Up to 16/32- Up to 64-kbyte Eight general, 2 UART, 2 SPORT, SPI, TWI, 32 182 CSP_BGA -40 to +85 Voltage regulator, PLL, JTAG, $10.07 to
kbyte instruction, Up to watchdog, CAN Ethernet MAC, PPI/LCD 12x12 0.8mm 0 to +70 Up to 16 simultaneous I2S $21.20
64-kbyte data, 4- realtime, PWM 208 CSP_BGA channels, supports execution (1000)
kbyte scratchpad 17x17 0.8mm from external SDRAM, 14 DMA
RAM, DMA, ch.
SDRAM, SRAM,
flash, ROM

Up to 16/32- Up to 80-kbyte Three general, 3 UART, 4 SPORT, 3 SPI, 2 45 316 CSP_BGA -40 to +85 Voltage regulator, CAN2.0B $16.03 to
kbyte instruction, Up to watchdog, TWI, CAN, PPI/LCD, upto 54 17x17 0.8mm Controller, PLL, JTAG, p to 16 $20.67
64-kbyte data, 4- realtime, PWM GPIO simultaneous I2S channels, (1000)
kbyte scratchpad supports execution from
RAM, ROM, DMA, external SDRAM,
SDRAM, 28 DMA ch.
mSDRAM, SRAM,
FLASH (538F 1-
Mbyte parallel
FLASH)

Up to 16/32- Up to 80-kbyte Three general, 3 UART, 4 SPORT, 3 SPI, 2 49 316 CSP_BGA -40 to +105 MXVR Media Tranceiver,
kbyte instruction, Up to watchdog, TWI, CAN, PPI/LCD, MXVR, 17x17 0.8mm Voltage regulator, CAN2.0B
64-kbyte data, 4- realtime, PWM upto 54 GPIO Controller, PLL, JTAG, p to 16
kbyte scratchpad simultaneous I2S channels,
RAM, ROM, DMA, supports execution from
SDRAM, external SDRAM, 34 DMA ch.
mSDRAM, SRAM,
FLASH. 64-kbit
OTP (539F 1-
Mbyte parallel
FLASH)

Up to 16/32- Upto 64-kbyte L1 up to 11 general, USB 2.0 HS OTG, upto 4 95 400 CSP_BGA -40 to +85 Voltage regulator, PLL, JTAG, $15.66 to
kbyte instruction, upto watchdog, UART, upto 4 SPORT, 3 SPI, 17x17 0.8mm 0 to +70 Lock Box Security, MXVR $22.12
64-kbyte data, 4- realtime, PWM 2 TWI, upto 2 CAN, upto 2 Media Transceiver (BF549 (1000)
kbyte scratchpad ePPI/LCD, ATAPI, SDIO, Host only), up to 16 simultaneous
RAM, DMA, DMA, Keypad, Rotary, Pixel I2S channels, supports
DDR/mDDR Compositor, MXVR, upto 152 execution from external DDR,
SRAM, flash, GPIO 28 DMA ch.
ROM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 14


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Analog Devices ADSP-BF561 Mobile/wireless, Audio, Blackfin 500 to 600 26/32 16, 32, 64 0.8 to 1.35 / 1104 mW Full-On, active, Dual 16-bit
Automotive, dual core Async/Sync 2.25 to 3.6 (core) sleep, deep MACs
Communication/wired, sleep, hibernate dual 40-bit
Consumer, General (50 µA) ALUs
purpose, Imaging and 40-bit shifter
video, Industrial, Medical, dual data
Military/aerospace, address
Security, Test and generators
measurement quad 8-bit
video ALUs
Applied Micro APM82181 Communication/wired IPSec/SSL, PowerPC 600 to 1000 16/32 32 1.2 / 1.8 / <3 W (1 GHz)
TCP/IP, RAID 2.5 / 3.3
5

Applied Micro PowerPC 405EP Communication/wired PowerPC 133 to 333 32 32 1.8 / 3.3 0.76 W 16x16 MAC

Applied Micro PowerPC 405EX Communication/wired IPSec/SSL, PowerPC 400 to 600 32 32 1.2 / 2.5 / 1.9 W Three levels 16x16 MAC
TCP/IP 3.3

Applied Micro PowerPC 405EXr Communication/wired IPSec/SSL, PowerPC 333 to 533 32 32 1.2 / 2.5 / 1.75 W Three levels 16x16 MAC
TCP/IP 3.3

Applied Micro PowerPC 405GPr Communication/wired PowerPC 266 to 400 32 32 1.8 / 3.3 0.72 W (266 16x16 MAC
MHz)

Applied Micro PowerPC 440EP PowerPC 333 to 667 32 32 1.5 / 2.5, 3 W (533 MHz) 16x16 MAC
3.3

Applied Micro PowerPC 440EPx IPSec/SSL PowerPC 400 to 667 32/64 32 1.5 / 2.5, <4 W 16x16 MAC
3.3

Applied Micro PowerPC 440GX Communication/wired TCP/IP PowerPC 533 to 667 32/64 32 1.5 / 2.5, <6 W 16x16 MAC
3.3

Applied Micro PowerPC 440SPe Communication/wired RAID 5/6 PowerPC 533 to 800 32/64 32 1.5 / 2.5, <7 W (533 16x16 MAC
3.3 MHz)

Applied Micro PowerPC 460EX Communication/wired IPSec/SSL, PowerPC 600 to 1000 32/64 32 1.25 / 1.8 / <6 W (1 GHz)
TCP/IP, RAID 2.5 / 3.3
5

Applied Micro PowerPC 460EXr IPSec/SSL, PowerPC 600 to 1000 32/64 32 1.15 / 1.8 / <6 W (1 GHz)
TCP/IP, RAID 2.5 / 3.3
5

Applied Micro PowerPC 460GT Communication/wired IPSec/SSL, PowerPC 600 to 1000 32/64 32 1.25 / 1.8 / <6 W (1 GHz)
Kasumi, 2.5 / 3.3
TCP/IP

Page 15 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to 16/32- Upto 32-kbyte L1 12 general, UART, 2 SPORT, SPI 61 256 CSP_BGA -40 to +85 Voltage regulator, PLL, JTAG, $20.40 to
kbyte (per instruction per watchdog, PWM 2 PPI/LCD, upto 48 GPIO 12x12 0.65mm 0 to +70 up to 16 simultaneous I2S $29.13
core) core, upto 64- 256 CSP_BGA channels, supports execution (1000)
kbyte data per 17x17 1.0mm from external SDRAM,
core, 4-kbyte 297 PBGA 24 DMA ch.
scratchpad RAM, 27x27 1.0mm
DMA, SDRAM,
flash, ROM

Yes 32-kbyte 256-kbyte One PCIe x1, Two SATA II 16 external, 48 18mm2 345 pin -20 to +85 Ipsec/SSL acceleration, turbo
L2/SRAM, 32- ports; One 10/100/1G internal FBGA, RoHS Case security, TCP/IP acceleration
kbyte SRAM OCM Ethernet, USB 2.0 OTG compliant hardware, RAID 5
w/PHY, UART, two I2C, GPIO, Acceleration, NAND boot
UIC, GPT, I2O
16-kbyte 4-kbyte SRAM Yes PCI, two UART, I²C, GPIO, 7 external, 19 31mm2, 385 -40 to +85 <$20
OCM UIC, two 10/100 Ethernet internal pin EPBGA , Case
RoHS
compliant and
leaded
16-kbyte Yes Yes Two 1-Lane PCI Express v1.1, 10 external, 8 27mm2, 388 -40 to +85 Optional Ipsec/SSL <$20
two 10/100/1G Ethernet, internal, 32 pin EPGBA, Case acceleration, QOS,TCP/IP
UART, SPI, External Bus GPIO RoHS Acceleration hardware
Master, USB2.0 OTG compliant and
leaded
16-kbyte Yes Yes Two 1-Lane PCI Express v1.1, 10 external, 8 2 -40 to +85 Optional Ipsec/SSL <$20
27mm , 388
one 10/100/1G Ethernet, internal, 32 pin EPGBA, Case acceleration, QOS,TCP/IP
UART, SPI, External Bus GPIO RoHS Acceleration hardware
Master, USB2.0 OTG compliant and
leaded
16-kbyte 4-kbyte SRAM Yes PCI, 10/100 Ethernet, two 13 external, 19 35mm2 456 pin -40 to +85 <$40
OCM UART, I²C, GPIO, UIC, internal EPBGA, Case
CodePack 2
27mm 456 pin
EPBGA, RoHS
compliant and
leaded

Double 32-kbyte Yes Yes PCI, two 10/100 Ethernet, 10 external, 63 35mm2 456 pin -40 to +85 <$40
precision, DMA, SPI, USB 1.1 internal EPBGA, RoHS -40 to +100
five stage Host,/device/PHY, ISB 2.0 compliant and Case
with 2.0 Device, UIC, two I²C, four leaded
MFLOPS/M UART, GPIO
Hz
Double 32-kbyte 16-kbyte SRAM Yes PCI, two 10/100/1000 10 external, 35mm2 680 pin -40 to +85 Optional Ipsec/SSL <$40
precision, OCM Ethernet, SPI (SCP), four programmable TE-EPBGA, Case acceleration, turbo security
five stage UART, two I²C, 53 GPIO, controller RoHS
with 2.0 USB2.0 host and device, PHY compliant and
MFLOPS/M leaded
Hz
32-kbyte 256-kbyte Yes 64 bit PCI-X, two 10/100 18 external, 63 25mm2, 552 -40 to +85 TCP/IP acceleration <$70
L2/SRAM OCM Ethernet, two 10/100/1000 internal pin FC-PBGA, -40 to +105
Ethernet, two I²C, two UART, 2
25mm , 552 Case
GPIO, GPT, UIC pin CBGA,
RoHS
compliant and
leaded

32-kbyte 256-kbyte Yes Three PCIe (one x8, two x4), 16 external, 27mm2, 675 0 to +95 Case RAID 5, 6 acceleration <$120
L2/SRAM OCM 64-bit PCI-X, 101 internal pin FC-PBGA,
10/100/1000 Ethernet, three RoHS
UART, two I²C, GPIO, UIC, compliant and
GPT, I20, XOR leaded

Yes 32-kbyte 256-kbyte Two PCIe (one x4, one x1), 32 16 external, 48 35mm2 728 pin -40 to +85 Ipsec/SSL acceleration, turbo <$65
L2/SRAM, 64- bit PCI, SATA II port; Two internal TE-EPBGA, Case security, QOS, TCP/IP
kbyte SRAM OCM 10/100/1G Ethernet, USB 2.0 RoHS acceleration hardware, RAID 5
Host and OTG, UART, two compliant and acceleration
I2C, GPIO, UIC, GPT, SPI, leaded
I2O
Yes 32-kbyte 256-kbyte Two PCIe (one x4, one x1), 16 external, 48 31mm2 640 pin -40 to +85 Ipsec/SSL acceleration, turbo <$60
L2/SRAM, 64- SATA II port; Two 10/100/1G internal TE-EPBGA, Case security, QOS, TCP/IP
kbyte SRAM OCM Ethernet, USB 2.0 Host and RoHS acceleration hardware, RAID 5
OTG, UART, two I2C, GPIO, compliant Acceleration
UIC, GPT, I2O

Yes 32-kbyte 256-kbyte Two PCIe (one x4, one x1), 32 16 external, 48 35mm2 728 pin -40 to +85 Ipsec/SSL acceleration, turbo <$60
L2/SRAM, 64- bit PCI, Four 10/100/1G internal TE-EPBGA, Case security, QOS, TCP/IP
kbyte SRAM OCM Ethernet, Serial RapidIO, RoHS acceleration hardware, SRIO
UART, two I2C, GPIO, UIC, compliant
GPT, I2O

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 16


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Applied Micro PowerPC 460GTx IPSec/SSL, PowerPC 833 to 1200 32/64 32 1.2 / 1.8 / <8 W (1GHz) 16 x16 MAC
TCP/IP 2.5 / 3.3

Applied Micro PowerPC 460SX Communication/wired IPSec/SSL, PowerPC 833 to 1200 32/64 32 1.2 / 1.8 / <10 W (1GHz) 16 x16 MAC
TCP/IP, RAID 2.5 / 3.3
5/6

ARM ARM Cortex-A8 ARMv7A 650 to 1100 64/128 16 Thumb, 1 (65 0.45 mW/MHz Standby, SIMD, NEON
(65nmGP) configurable 16/32 Thumb- nmGP) ( With 32K/32K dormant, IEM
AMBA 3 AXI 2 Hybrid L1 caches)

ARM ARM Cortex-M3 ARMv7M Up to 135 3x AMBA AHB- 16 Thumb, 1.2 0.14 mW/MHz Interrupt-based Hardware
(0.13um) Lite + AMBA 16/32 Thumb- (0.13) (90nm) sleep, dormant division unit,
APB 2 Hybrid and retention single-cycle
mode 32x32 multiply

ARM ARM Cortex-R4 (F) ARMv7R Up to 475 AMBA 3 AXI 16 Thumb, 1 (90nm) 0.26 mW/MHz Standby, DSP, SIMD
(90nm) 32 ARM, dormant
16/32 Thumb-
2 Hybrid
ARM ARM1026EJ-S ARMv5TEJ 266 to 325 Dual AMBA 16 Thumb, 1 to 1.2 0.18 mW/MHz Yes DSP
(worst case) AHB 32 ARM, (0.13) (90nm)
8 Jazelle

ARM ARM11 MPCore ARMv6K 610 Single / Dual 16 Thumb, 1 (90nm) 0.27 mW/MHz Standby, DSP, SIMD
AMBA 3.0 AXI 32 ARM, 0.8 with IEM (90nm) dormant, IEM,
64 8 Jazelle adaptive
shutdown
ARM ARM1136JF-S ARMv6 610 5 x AMBA AHB 16 Thumb, 1 (90nm) 0.18 mW/MHz Standby, DSP, SIMD
32 ARM, 0.8 with IEM (90nm) dormant
8 Jazelle

ARM ARM1136J-S ARMv6 610 5 x AMBA AHB 16 Thumb, 1 (90nm) 0.3 mW/MHz Standby, DSP, SIMD
32 ARM, 0.8 with IEM (0.13) dormant
8 Jazelle

ARM ARM1156T2F-S ARMv6T2 610 Quad AMBA 16 Thumb, 1 (90nm) 0.34 mW/MHz Standby, DSP, SIMD
3.0 AXI 64 32 ARM, 0.8 with IEM (90nm) dormant
16/32 Thumb-
2 Hybrid
ARM ARM1156T2-S ARMv6T2 610 Quad AMBA 16 Thumb, 1 (90nm) 0.34 mW/MHz Standby, DSP, SIMD
3.0 AXI 64 32 ARM, 0.8 with IEM (90nm) dormant
16/32 Thumb-
2 Hybrid
ARM ARM1176JZF-S ARMv6Z 610 Quad AMBA 3 16 Thumb, 1 (90nm) 0.29 mW/MHz Standby, DSP, SIMD
worst case AXI 32 ARM, 0.8 with IEM (90nm) dormant, IEM
(90G) 8 Jazelle

ARM ARM1176JZ-S ARMv6Z 610 Quad AMBA 3 16 Thumb, 1 (90nm) 0.29 mW/MHz Standby, DSP, SIMD
worst case AXI 32 ARM, 0.8 with IEM (90nm) dormant, IEM
(90G) 8 Jazelle

ARM ARM7EJ-S ARMv5TEJ 260 AMBA AHB 32 16, 32 1 (90nm) 0.1 mW/MHz Yes DSP
(with wrapper) (90nm)

ARM ARM7TDMI ARMv4T Up to 236 AMBA AHB 32 16, 32 1 (90nm) 0.03 mW/MHz Yes Yes
worst case (with wrapper) (90nm)
(90nm)

ARM ARM7TDMI-S ARMv4T Up to 245 AMBA AHB 32 16, 32 1 (90nm) 0.06 mW/MHz Yes Yes
worst case (with wrapper) (90 nm)
(90nm)

ARM ARM920T ARMv4T Up to 250 AMBA AHB 32 16, 32 1.2 (0.13) 0.25 mW/MHz Yes Yes
worst case (with wrapper) (0.13)

ARM ARM922T ARMv4T Up to 250 AMBA AHB 32 16, 32 1.2 (0.13) 0.25 mW/MHz Yes Yes
worst case (with wrapper) (0.13 cache)

ARM ARM926EJ-S ARMv5TEJ Up to 470 Dual AMBA 16, 32 1 (90nm) 0.11 mW/MHz Yes DSP
worst case AHB (90nm)
(90nm)

ARM ARM946E-S ARMv5TE Up to 440 AMBA AHB 32 16, 32 1 (90nm) 0.08 mW/MHz Yes DSP
worst case (90)
(90nm)

Page 17 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-kbyte 512-kbyte Yes Two Gen 2 PCIe (two x4 or 16 external, 29mm2, 783 0 to +95 Case Ipsec/SSL acceleration, turbo <$100
L2/SRAM, 32- one x8), Four 10/100/1000 101 internal pin FC-PBGA, security, QOS, TCP/IP
kbyte SRAM OCM Ethernet, UART, two I²C, RoHS acceleration hardware
GPIO, UIC, GPT, I20 compliant
32-kbyte 512-kbyte Yes Three Gen 2 PCIe (one x8, 16 external, 2
29mm , 783 0 to +95 Case RAID 5, 6 acceleration, XTS- <$125
L2/SRAM, 32- two x4 or one x8), Four 101 internal pin FC-PBGA, AES storage security engine,
kbyte SRAM OCM 10/100/1000 Ethernet, UART, RoHS Ipsec/SSL acceleration; Turbo
two I²C, GPIO, UIC, GPT, I20, compliant security
XOR
VFPv3 16- or 32- MMU Licensee option Yes Licensee option (Core) (Core) Thumb-2, NEON, Jazelle RCT, License
kbyte, L2: 0-, IEM, TrustZone, Superscalar
64-kbyte or 2- pipeline, dynamic branch
Mbyte prediction
(configurable)

MPU Integrated system Licensee option Up to 244 Licensee option (Core) (Core) Wake Up Interrupt Controller License
tick, licensee distributor for ultra low power
option

0- to 64-kbyte MPU Licensee option Licensee option Yes Licensee option (Core) (Core) Thumb-2, cache parity License
(configurable) protection, ECC support for
TCM, Floating Point Unit

VFP10 co- 4- to 128- MMU and MPU Licensee option Licensee option Yes Licensee option (Core) (Core) Jazelle (Java), real-time trace License
processor kbyte
(configurable)

Yes, 16- to 64- MMU Integrated timer Licensee option Up to 255 Licensee option (Core) (Core) Cache coherence, Intelligent License
optional per kbyte and watchdog per distributor Energy Manager, Jazelle
processor (configurable) core (Java)

Yes 4- to 64-kbyte MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Jazelle (Java), multimedia License
(configurable)

4- to 64-kbyte MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Jazelle (Java), multimedia License
(configurable)

Yes 0- to 64-kbyte MPU Licensee option Licensee option Yes Licensee option (Core) (Core) Thumb-2, cache parity License
(configurable) protection, ECC support for
TCM

0- to 64-kbyte MPU Licensee option Licensee option Yes Licensee option (Core) (Core) Thumb-2, cache parity License
(configurable) protection, ECC support for
TCM

Yes 4- to 64-kbyte MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Intelligent Energy Manager, License
(configurable) TrustZone, Jazelle (Java)

Yes 4- to 64-kbyte MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Intelligent Energy Manager, License
(configurable) TrustZone, Jazelle (Java)

Optional Can add Licensee option Licensee option Yes Licensee option (Core) (Core) Jazelle (Java), real-time trace License
VFP9 external
coprocessor

Can add Licensee option Licensee option Yes Licensee option (Core) (Core) Real-time trace License
external

Can add Licensee option Licensee option Yes Licensee option (Core) (Core) Real-time trace License
external

16-kbyte MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Real-time trace License

8-kbyte MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Real-time trace License

VFP9 4- to 128- MMU Licensee option Licensee option Yes Licensee option (Core) (Core) Jazelle (Java), real-time trace License
coprocessor kbyte
(configurable)

VFP9 4-kbyte to 1- MPU Licensee option Licensee option Yes Licensee option (Core) (Core) Real-time trace License
coprocessor Mbyte
(configurable)

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 18


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
ARM ARM966E-S ARMv5TE Up to 470 Dual AMBA 16, 32 1 (90nm) 0.07 mW/MHz Yes DSP
worst case AHB 32
(90nm)

ARM ARM968E-S ARMv5TE Up to 530 AMBA AHB- 16, 32 1 (90nm) 0.06 mW/MHz Yes DSP
worst case Lite
(90nm)

ARM AudioDE (core) Audio, Mobile/wireless Bitstream Up to 75 24 Variable Process 7.5 mW Data driven, 0.1
access (130nm) length dependent mW/MHz
functions, VLIW
Huffman table
lookup
ARM SC100 ARMv4T Up to 80 32 16, 32 1.8 (0.18) 0.21 mW/MHz Yes Yes
worst case (0.18 no
(0.18um) cache)

ARM SC200 ARMv5TEJ Up to 110 32 16, 32 1.8 (0.18) 0.30 mW/MHz Yes DSP
worst case (0.18 cache)
(0.18um)

ARM SC300 ARMv7M Up to 135 3x AMBA AHB- 16 Thumb 1.2 0.14 mW/MHz Interrupt-based Hardware
(0.13um) Lite + AMBA 16/32 Thumb- (0.13) (90nm) sleep, dormant division unit,
APB 2 Hybrid and retention single-cycle
mode 32x32 multiply

ASIX Electronics AX11001 Communication/wired, TCP/IP 8051 100 8 1.8 / 3.3 136 to 236 mA Stop Mode, 0.3
Consumer, Industrial Accelerator mA

ASIX Electronics AX11005 Communication/wired, TCP/IP 8051 100 8 1.8 / 3.3 136 to 236 mA Stop Mode, 0.3
Consumer, Industrial Accelerator mA

ASIX Electronics AX11015 Communication/wired, TCP/IP 8051 100 21/16 8 1.8 / 3.3 138 to 236 mA Stop Mode, 0.8
Consumer, Industrial Accelerator mA

ASIX Electronics AX11025 Communication/wired, TCP/IP 8051 100 21/8 8 1.8 / 3.3 138 to 236 mA Stop Mode, 0.8
Consumer, Industrial Accelerator mA

ASIX Electronics AX22001 Audio, TCP/IP 8051 80 16/16 8 1.8 / 3.3 164 mA Stop Mode, 150
Communication/wired, Accelerator to 300 µA
Industrial

ASIX Electronics AX22011 Audio, TCP/IP 8051 80 20/16 8 1.8 / 3.3 174 mA Stop Mode, 150
Communication/wired, Accelerator to 300 µA
Industrial

Atmel AVR AVR Up to 16 16/8 16 2.7 to 5.5 350 µA/MIPS Power save with 8x8 and 16x16
AUTOMOTIVE 32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Atmel AVR Battery AVR 1 to 8 16/8 16 1.8 to 25 Power save with 8x8 and 16x16
Management 32kHz RTC, (un)signed and
power off, power fractional.
down. Less than
1 µA

Atmel AVR CAN AVR Up to 16 16/8 16 2.7 to 5.5 1 mA/MIPS Power save with 8x8 and 16x16
32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Page 19 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
VFP9 Licensee option Licensee option Yes Licensee option (Core) (Core) Real-time trace License
coprocessor

Licensee option Licensee option Yes Licensee option (Core) (Core) Interleaved data TCM interface License

AMBA-AHB or AXI (Core) (Core) Supplied with a self-streaming License


subsystem that includes DMA
amd configurable local memory

Secure MPU Licensee option Licensee option Yes Licensee option (Core) (Core) SecurCore security features License

Optional Secure MPU Licensee option Licensee option Yes Licensee option (Core) (Core) SecurCore security features License

Secure MPU Licensee option Licensee option Yes Licensee option (Core) (Core) SecurCore security features License

Three 16-bit, Three full-duplex UART, I²C, 13 80 LQFP 0 to +70 TCP/IP network stack with
watchdog, Five SPI, 1-wire, 10/100 Ethernet, -40 to +85 integrated Ethernet MAC/PHY,
PWM 16 GPIOs Hardwired TCP/IP Acceleratior

Three 16-bit, Three full-duplex UART, I²C, 13 80 LQFP, 0 to +70 TCP/IP network stack with
watchdog, Five SPI, 1-wire, 10/100 Ethernet, 80 TFBGA -40 to +85 integrated Ethernet MAC/PHY,
PWM 16 GPIOs Hardwired TCP/IP Acceleratior

Three 16-bit, Three full-duplex UART, I²C, 13 128 LQFP 0 to +70 TCP/IP network stack with
watchdog, Five SPI, 1-wire, 10/100 Ethernet, -40 to +85 integrated Ethernet MAC/PHY,
PWM Local bus, EMI, MII, 32 GPIOs Hardwired TCP/IP Acceleratior

Three 16-bit, Three full-duplex UART, I²C, 13 128 LQFP -40 to +85 TCP/IP network stack with
watchdog, Five SPI, 1-wire, 10/100 Ethernet, integrated Ethernet MAC/PHY,
PWM CAN, EMI, MII, 32 GPIOs Hardwired TCP/IP Acceleratior

Three 16-bit, Four full-duplex UART (two 13 802.11 WiFi 128 LQFP 0 to +70 TCP/IP network stack with
watchdog, with DMA), I²C, SPI with DMA, RXIQ ADC, integrated Ethernet MAC,
realtime, Five I²S/PCM with DMA, 1-wire, TXIQ ADC, TSSI 802.11 WLAN MAC/Baseband
PWM 802.11 a/b/g Wi-Fi ADC with dedicated CPU, Hardwired
Baseband/MAC, Local bus TCP/IP Acceleratior, In-System-
with DMA, (Rev-) MII, (Rev-) Programmable, In-Application-
RMII, 32 GPIOs Programmable, POR, PLL,
32.768KHz crystal oscillator

Three 16-bit, Four full-duplex UART (two 13 802.11 WiFi 160 TFBGA 0 to +70 TCP/IP network stack with
watchdog, with DMA), I²C, SPI with DMA, RXIQ ADC, integrated Ethernet MAC,
realtime, Five I²S/PCM with DMA, 1-wire, TXIQ ADC, TSSI 802.11 WLAN MAC/Baseband
PWM 802.11 a/b/g Wi-Fi ADC with dedicated CPU, Hardwired
Baseband/MAC, Local bus TCP/IP Acceleratior, In-System-
with DMA, EMI, (Rev-)MII, Programmable, In-Application-
(Rev-)RMII, 32 GPIOs Programmable, POR, PLL,
32.768KHz crystal oscillator

Up to 4 timers, 8 CAN, LIN, SPI, USART, TWI, All peripherals 10-bit SOIC:8/14/20, -40 to +125 On-Chip Debugging,
PWMs USI, 8-bit parallel and I/O TQFP:44/64, In-System Programming,
(64-kbyte addressing) VQFN:32/44/6 Self-Programming Memory,
4 PPAP qual.

Two timers, 1 TWI, SMbus All peripherals 10-bit, 16-bit TSOP28, -40 to +85 1-4 Li-Ion battery cells, Smart
PWM and I/O Sigma Delta TSSOP44, Battery management, On-Chip
ADC LGA36, Debugging, In-System
LQFP48, Die Programming

Up to 4 timers, 8 SPI, USART, TWI, All peripherals 10-bit 64 TQFP/QFN, -40 to +85 On-Chip Debugging,
PWMs 8-bit parallel and I/O Die In-System Programming,
(64-kbyte addressing) Self-Programming Memory
CAN 2.0 A and 2.0B

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 20


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Atmel AVR LCD AVR Up to 20 16/8 16 1.8 to 5.5 350 µA/MIPS Power save with 8x8 and 16x16
32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Atmel AVR PWM AVR Up to 16 16/8 16 2.7 to 5.5 500 µA/MIPS Power save with 8x8 and 16x16
32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Atmel AVR SECURE AVR 16/8 16 2.7 to 5.5 1 to 3 mA Less than 1 mA 8x8
(un)signed,
16x16 signed
Atmel AVR USB AVR 1 to 24 16/8 16 2.7 to 5.5 750 µA/MIPS Power save with 8x8 and 16x16
32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Atmel AVR XMEGA AVR Up to 32 16/8 16 1.6 to 3.6 350 µA/MIPS Power save with 8x8 and 16x16
32 kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Atmel Diopsis 940HF Audio, Automotive Single-cycle Up to 200 32/32 ARM, 16 / 32 ARM, 450 mW 2 mW
(AT572D940HF- butterfly 16/40 mAgic 128 mAgicV 1.2 / 1.8 to
CJ) DSP DSP 3.3

Atmel MCS-51 AT89 8051 12 to 40 16/8 8 2.7 to 6 80 mW Idle: 2 mA, 8x8


powerdown: less
than 1 µA

Atmel MCS-51 AT89LP 8051 Up to 25 16/8 8 2.0 to 5.5 0.27 mA/MHz Less than 1 µA 8x8 unsigned
(2.5V);
0.57 mA/MHz
(5.0V)

Atmel megaAVR AVR Up to 20 16/8 16 1.8 to 5.5 350 µA/MIPS Power save with 8x8 and 16x16
32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Atmel SAM3S General purpose Cortex-M3 64 24/8 16, 32 1.62 / 3.6 69 mW 1.8 µA, backup, Yes
wait, sleep

Atmel SAM3U General purpose Cortex-M3 96 24/16 16, 32 1.62 / 3.6 87 mW 1.6 µA, backup, Yes
wait, sleep

Atmel SAM7L General purpose ARM7TDMI 36 16, 32 1.8 to 3.6 41 mW 100 nA, Slow, Yes
Idle, Wait,
backup, off

Atmel SAM7S General purpose ARM7TDMI 55 16, 32 3 to 3.6 50 to 55 mW 7.2 µA, slow, Yes
standby, idle,
individual
peripheral clock
enable
Atmel SAM7SE General purpose ARM7TDMI 48 23/32 16, 32 3 to 3.6 90 mW 85 µA, slow, Yes
standby, idle,
individual
peripheral clock
enable
Atmel SAM7X (C) General purpose ARM7TDMI 55 16, 32 3 to 3.6 88 mW 21 µA, slow, Yes
standby, idle,
individual
peripheral clock
enable

Page 21 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to 3 timers, 4 SPI, USART, TWI, USI All peripherals 10-bit 64 TQFP, 64 -40 to +85 On-Chip Debugging, $2.50 to $4
PWMs and I/O QFN, Die In-System Programming,
Self-Programming Memory

Up to 2 timers, 10 SPI, USART, TWI, DALI All peripherals 10-bit 24/32 SO, 32 -40 to +85 On-Chip Debugging, Power
PWMs and I/O QFN, Die Factor Correction,
In-System Programming,
Self-Programming Memory

Two-cycle Two 16-bit TWI 27, eight 44 LQFP, Die, -40 to +85 16-bit coprocessor, ISO 7816 From $2
8x8 fixed- external Module external interface, common
point criteria EAL4+
Up to 4 timers, 8 SPI, USART, TWI, All peripherals 10-bit 64 TQFP/QFN, -40 to +85 On-Chip Debugging, $1.50 to $7
PWMs USB (Full speed, low speed, and I/O 48/64/100 In-System Programming,
2.0, OTG ) LQFP Self-Programming
Memory,Two- to four-hub port,
three to six function endpoints

Eight, 24 PWM SPI, USART, TWI, All peripherals 12-bit ADC and TQFP:100/64/ -40 to +85 On-Chip Debugging,
and I/O DAC, up to 2 44, AES/Des Crypto engine,
Msps QFN:64/44, Multilevel Interrupts, Dynamic
CBGA:100 Clock Gating, picoPower
technology
ARM: 16-kbyte 260-kbyte SRAM, Full speed USB host/device; 324-ball 0 to +70 Dual core (ARM926EJ-S and $15
32-kbyte ROM Ethernet MAC; 4 SSC; 3 CABGA -40 to +85 40-bit floating point MagicV
Controllers: USART; 2 SPI; Time Counter; VLIW DSP) optimized for
SDRAM, SRAM, 2 TWI; 2 CAN; Multimedia Audio, Communication and
NAND, Compact Card Interface; EBI Beam-forming Applications
Flash, SD

One to three 16- SPI, full-duplex UART, CAN, Nine, four Eight-channel, 44 TQFP, 0 to +70 MP3, In-system-programmable 50 cents to
bit USB levels 10-bit 64/80 VQFP, -40 to +85 Flash, three-level lock bit $4
44/52 PLCC, -40 to +125 security, smart-card reader
20/28 SOIC, interface
24/16 SSOP,
20/24/40 PDIP

Three, UART, enhanced SPI, TWI Nine, four Eight-channel, 14/16/20/40 0 to +70 On-Chip Debug, RC Oscillator, 70 cents to
Compare/Capture levels 10-bit DIP, 14/16/20 -40 to +85 In-Application Programming $4
Array, 2 PWM, SOIC,
watchdog 14/16/20/28/32
TSSOP,
28/32/44
TQFP

Up to 6 timers, 16 SPI, USART, TWI, USI, CAN, All peripherals 10-bit 28/40 PDIP, -40 to +85 picoPower technology, On- $1 to $6
PWMs LIN, USB and I/O 32/44/64/100 Chip Debugging,
8-bit parallel TQFP, In-System Programming,
(64-kbyte addressing) 32/44/64 QFN, Self-Prog. Memory
Die
MPU Six 16-bit, Full speed USB 2.0 Device, All peripherals 8-channel 12-bit, QFP48/64/100, -40 to +85 BOD, POR, 128-bit unique and
realtime clock, 2xUSARTs, and I/O, 2-channel 12-bit QFN48/64, hardware CRC
realtime timer, 2xUART,3xSPI,2xTWI, sixteen levels DAC BGA100
watchdog, 4 I²S,SDIO/SD/MMC,34 to 79
PWM PIO
MPU Three 16-bit, High speed USB 2.0 Device + All peripherals 8-channel 12-bit, QFP100/144, -40 to +85 BOD, POR, 128-bit unique ID
realtime clock, Phy, 4xUSARTs, and I/O, 8-channel 10-bit BGA100/144
realtime timer, 1xUART,5xSPI,2xTWI, sixteen levels
watchdog, 4 I²S,SDIO/SD/MMC,57 to 96
PWM PIO
Three 16-bit, 3x UART, TWI, SPI, 80 PIO All PIO, all Four-channel, 128 LQFP -40 to +85 BOD, POR, High Drive,
realtime clock, peripherals, 10-bit 144 LFBGA Security -bit, ISP, Segment
watchdog, four eight levels LCD controller
PWM
Three 16-bit, 3x UART, TWI, USB, SPI, I²S, All PIO, all Eight-channel, 48 /64-TQFP -40 to +85 BOD, POR, High Drive,
realtime, 21/32 PIO peripherals, 10-bit 48/64-QFN Security -bit, ISP
watchdog, four eight levels
PWM

MPU Three 16-bit, UART, TWI, USB, SPI, I²S, 88 All PIO, all Eight-channel, 128 LQFP -40 to +85 BOD, POR, High Drive,
realtime, PIO peripherals, 10-bit 144 LFBGA Security -bit, ISP
watchdog, four eight levels
PWM

Three 16-bit, Ethernet, CAN, UART, TWI, All PIO, all Eight-channel, 100 LQFP -40 to +85 BOD, POR, High Drive,
realtime, USB, Two SPI, I²S, 62 PIO peripherals, 10-bit 100 LFBGA Security -bit, ISP
watchdog, four eight levels Optional AES/TDES
PWM accelerator

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 22


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Atmel SAM9260 General purpose ARM926EJ-S 210 26/32 16, 32 1.65 to 1.95 230 mW 5 µW, standby, Yes
/ 3.0 to 3.6 shutdown, idle,
slow, individual
peripheral clock
enable

Atmel SAM9261 General purpose ARM926EJ-S 240 26/32 16, 32 1.08 to 1.32 77 mW 3 µW, standby, Yes
/ 2.7 to 3.6 shutdown, idle,
slow, individual
peripheral clock
enable

Atmel SAM9263 General purpose ARM926EJ-S 240 two 26/32 16, 32 1.08 to 1.32 85 mW 4 µW, standby, Yes
/ 2.7 to 3.6 shutdown, idle,
slow, individual
peripheral clock
enable

Atmel SAM9G10 General purpose ARM926EJ-S 266 26/32 16, 32 1.2 / 107 mW 3 µW, standby, Yes
1.8 to 3.3 shutdown, idle,
slow, individual
peripheral clock
enable

Atmel SAM9G20 General purpose ARM926EJ-S 400 26/32 16, 32 0.9 to 1.1 / 85 mW 9 µW, standby, Yes
3.0 to 3.6 shutdown, idle,
slow, individual
peripheral clock
enable

Atmel SAM9G45 General purpose ARM926EJ-S 400 26/32 16, 32 1.0 / 130 mW 8 µA, Backup, Yes
14/16 1.8 to 3.3 ultra low power,
idle

Atmel SAM9G46 General purpose ARM926EJ-S 400 26/32 16, 32 1.0 / 130 mW 8 µA, Backup, Yes
14/16 1.8 to 3.3 ultra low power,
idle

Atmel SAM9M10 General purpose 2D graphic ARM926EJ-S 400 26/32 16, 32 1.0 / 130 mW 8 µA, Backup, Yes
14/16 1.8 to 3.3 ultra low power,
idle

Atmel SAM9M11 General purpose 2D graphic ARM926EJ-S 400 26/32 16, 32 1.0 / 130 mW 8 µA, Backup, Yes
14/16 1.8 to 3.3 ultra low power,
idle

Atmel SAM9R64 General purpose ARM926EJ-S 240 26/32 16, 32 1.08 to 1.32 56 mW 5 µW, standby, Yes
SAM9RL64 / 3.0 to 3.6 shutdown, idle,
slow, individual
peripheral clock
enable

Atmel SAM9XE General purpose ARM926EJ-S 210 26/32 16, 32 1.65 to 1.95 230 mW 5 µA, idle, ultra Yes
/ 3.0 to 3.6 low power,
backup
Atmel Smart Card Reader 8051 16, 32 3.6 to 5.5

Atmel tinyAVR AVR Up to 20 16/8 16 1.8 to 5.5 300 µA/MIPS Power save with 8x8 and 16x16
32kHz RTC and (un)signed and
power down. fractional.
Less than 1 µA

Page 23 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
8-kbyte Yes Six 16-bit, Ethernet, USB host and All PIO, all Four-channel 10- 208 PQFP, -40 to +85 Image Sensor Interface
realtime, device, MCI, UART, TWI, SPI, peripherals, bit 217 LFBGA
watchdog I²S, 96 PIO eight levels

16-kbyte Yes Three 16-bit, USB host and device, MCI, All PIO, all 217 LFBGA -40 to +85 LCD Controller
realtime, UART, TWI, SPI, I²S, 96 PIO peripherals, Real-Time trace
watchdog eight levels

16-kbyte Yes Three 16-bit, four Ethernet, USB host and All PIO, all 324 LFBGA -40 to +85 Image Sensor Interface, LCD
PWM, real time, device, CAN, 2x MCI, 4x peripherals, Controller, 2D graphic
watchdog UART, TWI, 2x SPI, 2x I²S, eight levels accelerator, Real-Time trace,
160 PIO AC97 controller

16-kbyte Yes Three 16-bit, USB host and device, MCI, All PIO, all 217 LFBGA -40 to +85 LCD Controller
realtime timer, UART, TWI, SPI, I²S, 96 PIO peripherals,
watchdog eight levels

32-kbyte Yes Six 16-bit, Ethernet, USB host and All PIO, all Four-channel 10- 217 LFBGA -40 to +85 Image Sensor Interface
realtime, device, MCI, UART, TWI, SPI, peripherals, bit
watchdog I²S, 96 PIO eight levels

32-kbyte Yes Six 16-bit, HS USB 2.0 Host & Device, All PIO, all 8-channel 10-bit BGA 324 -40 to +85 LCD Controller, Resistive
realtime clock, Ethernet, 4xUSART, 1xUART, peripherals, Touchscreen, Camera
realtime timer, 6xSPI,2xTWI,2xI²S, AC97, eight levels Interface
watchdog, 4 2xSDIO/SD/MMC,
PWM 160 PIO

32-kbyte Yes Six 16-bit, HS USB 2.0 Host & Device, All PIO, all 8-channel 10-bit BGA 324 -40 to +85 LCD Controller, Resistive
realtime clock, Ethernet, 4xUSART, 1xUART, peripherals, Touchscreen, Camera
realtime timer, 6xSPI,2xTWI,2xI²S, AC97, eight levels Interface, SHA, AES, TDES,
watchdog, 4 2xSDIO/SD/MMC, TRNG
PWM 160 PIO

32-kbyte Yes Six 16-bit, HS USB 2.0 Host & Device, All PIO, all 8-channel 10-bit BGA 324 -40 to +85 Video Decoder, LCD
realtime clock, Ethernet, 4xUSART, 1xUART, peripherals, Controller, Resistive
realtime timer, 6xSPI,2xTWI,2xI²S, AC97, eight levels Touchscreen, Camera
watchdog, 4 2xSDIO/SD/MMC, Interface
PWM 160 PIO

32-kbyte Yes Six 16-bit, HS USB 2.0 Host & Device, All PIO, all 8-channel 10-bit BGA 324 -40 to +85 Video Decoder, LCD
realtime clock, Ethernet, 4xUSART, 1xUART, peripherals, Controller, Resistive
realtime timer, 6xSPI,2xTWI,2xI²S, AC97, eight levels Touchscreen, Camera
watchdog, 4 2xSDIO/SD/MMC, Interface, SHA, AES, TDES,
PWM 160 PIO TRNG

4-kbyte Yes Three 16-bit, four USB device HS, MCI, 5x All PIO, all 144 BGA, 217 -40 to +85 LCD controller, AC97 controller
PWM, real time UART, TWI, SPI, 2x I²S, 118 peripherals, LFBGA
clock, watchdog PIO eight levels

16-kbyte/8- Yes Six 16-bit, Ethernet, USB host and All PIO, all Four-channel 10- 208 PQFP, -40 to +85 Image Sensor Interface
kbyte realtime, device, MCI, 6x UART, 2x peripherals, bit 217 LFBGA
watchdog TWI, 2x SPI, I²S, 96 PIO eight levels
UART, USB, SPI, PCMCIA 24 SSOP, 20 0 to +70 ISO7816, DC/DC converter,
TSSOP, 28/52 -40 to +85 EMV pre-certified software
PLCC, 32/64
VQFP
Up to 2 timers, 5 SPI, USART, TWI, USI All peripherals 10-bit 8 SPT23 -40 to +85 picoPower technology, On- 50 cents to
PWMs and I/O 8/16/20 PDIP, Chip Debugging, $2
8/14/20 SOIC, In-System Programming,
20/32 QFN Self-Prog. Memory

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 24


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Atmel UC3 Peripheral AVR 66 32/16/8 16, 32 1.8 / 3.3 1.3 mW/MHz 6 sleep modes, 32X16 to
DMA, 32-bit Less than 1 µA 48x16 single
Multi-layer Bus cycle MAC

Austria AS3525 Communication/wired, Up to 266 32/32 32 1.05 to 1.2 / 58 mW Full-on, active,


Microsystems Consumer, Industrial, 1.8 to 3.3 sleep, deep
Medical, Automotive sleep; hibernate,
advanced
programmable
power
management

Beyond Beyond BA12 Consumer, General BA1 Up to 250 AMBA AHB 32 Process 0.06 mW/MHz Sleep mode, 32 MUL, 64
Semiconductor purpose, Other worst case or dependent (130 nm) wake-up on MAC,
(130 nm) wishbone interrupt hardware
32/32 division
Beyond Beyond BA14 Consumer, Video and 32x32 MAC BA1 Up to 650 2x AMBA AHB 32 Process 0.39 mW/MHz Doze, dynamic 64 MUL, 64
Semiconductor imaging, standard. worst case or wishbone dependent (65 nm) frequency MAC,
Communication/wired Optional 64-bit (65 nm) 32/32 scaling, hardware
SIMD, FPU. functional units division
power down,
wake-up on
interrupt

Beyond Beyond BA22 Consumer, Video and MAC, FPU BA2 Up to 400 2x AMBA AHB 8, 16, 24, 32 Process 0.023 Doze, dynamic 64 MUL, 64
Semiconductor imaging, General optional. worst case or wishbone dependent mW/MHz (65 frequency MAC,
purpose (65 nm) 32/32 nm) scaling, hardware
functional units division
power down,
wake-up on
interrupt
Broadcom BCM1122 MIPS 400 16/64 64 1.2 / 3.3 4W
Corporation

Broadcom BCM1125H MIPS 800 16/64 64 1.2 / 3.3 6W


Corporation

Broadcom BCM1250 MIPS64 700 64 12 W Power


Corporation management

Broadcom BCM5836 MIPS32 264 32/32 32 1.25 / 2.5 / >1.5 W Power 32x32
Corporation 3.3 management

Cambridge APE2 (DSP Audio, Mobile/wireless, IP modules Process VLIW VLIW Process Design Can include
Consultants Generator) Consumer, Industrial dependent dependent dependent

Cambridge XAP4a XAP 215 16/16 16, 32 1.0 (90nm) 12k gates 0.02 Sleep or halt 16x16
Consultants mW/MHz

Cambridge XAP5a XAP 175 24/16 16, 32, 48 1.0 (90nm) 18k gates Sleep or halt 16x16
Consultants 0.025
mW/MHz
CAST APS2 RISC (78 100 to 300 32/32 32 18 µW/MHz Sleep Optional DSP
instructions) coprocessor,
barrel shifter
and multiplier

CAST APS3 RISC (140 100 to 300 32/32 16, 32 24 µW/MHz Sleep Optional DSP
instructions) coprocessor,
barrel shifter
and multiplier

CAST R8051XC 8051 100 to 250 external: 8 0.96 mW/MHz Idle = 60% 8-bit ALU;
16/8 reduction, Sleep optional 16-bit
= 99% reduction multiply/divide

Page 25 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU Six, 13 PWM SPI, USART, SSC/I²S, TWI, All peripherals 16-bit audio LQFP144, -40 to +85 From $2.89
EBI, Ethernet 10/100, Device and I/O DAC TQFP100,
2.0 Full Speed and On-The- VQFN64,
Go (OTG) USB TQFP64,
TQFP48
QFN48,
TLLGA48
8-kbyte 4-kbyte Realtime, eight 32- ITU-R 656 video port, 2 dual- 14/16-bit stereo 10x10/ 0 to +70 embedded codec full SDK $7.50
scratchpad RAM, bit PWM, Host channel, fullduplex sync. serial ADC/DAC with 13x13 0.5mm -40 to +85 included for multimedia usage,
ROM, DMA, DMA ports, SPI, 2UARTs(IrDA), 48 amp pitch mBGA mic. input / aux. w/ 10-channel
SDRAM, GPIO, ATA, IDE, USB2.0 HS- mixer to a 16 Ohm /32 Ohm
mSDRAM, SRAM, OTG, SDRAM/NAND/MMC/SD headset , 4Ohm spk or aux.
NOR flash, NAND audio peripherals.
FLASH. 128-bit
OTP

up to 16-kbyte 32-bit with match Licensee option, Ethernet Up to 32 Licensee option (Core) (Core) Available also as Verilog RTL License
(configurable) and capture 10/100/1000, UART, VGA/DVI source, JTAG debug, Optional
Display, AC97, PCI bridge, Trace
PS/2
Optional up to 32-kbyte Optional and 32-bit with match Licensee option, Ethernet Up to 32 Licensee option (Core) (Core) Available also as Verilog RTL License
single L0, 1 to 4-way configurable and capture, OS 10/100/1000, UART, JTAG, source, JTAG debug, Optional
and/or (configurable). MMU Timer, realtime DDR/DDR2, SDRAM, FLASH, Trace, superscalar, dual issue
double up to 128- HDTV VGA/DVI Display, out of order execution
precision kbyte L1, up to AC97, PCI bridge, SPI, I2C,
4Mbyte L2 PS/2, debug core.
(configurable)

Optional up to 32-kbyte Optional and 32-bit with match Licensee option, Ethernet Up to 32 Licensee option (Core) (Core) Available also as Verilog RTL License
single or L1 configurable and capture, OS 10/100/1000, UART, JTAG, source, JTAG debug, Optional
double 1 to 4-way, MMU Timer, realtime DDR/DDR2, SDRAM, FLASH, Trace, Highest code density
precision (configurable) with separate HDTV VGA/DVI Display,
power domain AC97, PCI bridge, PS/2, SPI,
I2C, debug core.

Two 32/32-kbyte Yes 2 watchdog, 4 1G Ethernet, Fast Ethernet, 2 Multiple 899-FCBGA 0 to +100 HT Port, PCI 32- bit/66MHz, $65
pipelines; L2: 128-kbyte general serial, 2 SMBus, 16 GPIO, Sources (junction) JTAG, Generic Bus
single and PCMCIA
double
precision
Two 32/32-kbyte Yes 2 watchdog, 4 Two 1G Ethernet, 2 serial, 2 Multiple 899-FCBGA 0 to +100 PCI 32- bit/66MHz, JTAG, $85 to $200
pipelines; L2: 256-kbyte general SMBus, 16 GPIO, PCMCIA Sources (junction) Generic Bus
single and
double
precision
Two Up to 512- 64-entry TLB Two watchdog, Three 1G Ethernet, two serial, Many sources PBGA 0 to +100 One SPI/HT port $150 to
pipelines; Kbyte shared four general two SMBus, GPIO, PCMCIA (junction) $300
single and between cores
double
precision
16-kbyte, 1- 32-entry TLB Two, watchdog Two 10/100 Ethernet, two Many sources 340 PBGA 0 to +70 EJTAG debug, VPN/IPSec
kbyte pre-fetch UART, PCMCIA, IDE, PCI- hardware processor
32bit/33Mhz, USB host/device,
Audio, V.92 Modem, IR, GPIO

Can add (Core) (Core) Customer configurable License

External Yes External External 16 (Core) +125 0.68 DMIPS/MHz. High code Licence
density

External Yes External External 32 (Core) +125 0.7 DMIPS/MHz. High code Licence
density

Optional 8- Timer 32-bit Up to 256 (Core) (Core) Coprocessor interface (Barrel License
kbyte shifter and multiplier available)
instruction

Optional 8- Timer 32-bit Up to 256 (Core) (Core) Coprocessor interface (Barrel License
kbyte shifter and multiplier available)
instruction

Optional: 16-bt Optional: up to four 8-bit; Up to 18 (Core) (Core) Integrated on-chip debug License
timer/counters; serial; asynch. serial (native OCDS or FS2)
timer with CCU;
Watchdog

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 26


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cavium Networks NITROX Soho MIPS32 150 to 166 32 (PCI) 32 1.8, 3.3 1.2
CN201 8 or 16 (ELB)

Cavium Networks OCTEON CN3005 Communication/wired, Security, TCP, MIPS64 300, 400 16 32/64 1.0, 1.1 / 2 Conditional Up to 256 bit
Security, Mobile/wireless Packet Release 2, 1 1.8, 2.5, 3.3 clocking product MULs.
core CRC32, GFM

Cavium Networks OCTEON CN3010 Communication/wired, Security, TCP, MIPS64 300, 400, 32 32/64 1.0, 1.1 / 3 Conditional Up to 256 bit
Security, Mobile/wireless Packet Release 2, 1 500 1.8, 2.5, 3.3 clocking product MULs.
core CRC32, GFM

Cavium Networks OCTEON CN3020 Communication/wired, Security, TCP, MIPS64 300, 400 33 32/64 1.0, 1.1 / 4 Conditional Up to 256 bit
Security, Mobile/wireless Packet Release 2, 2 1.8, 2.5, 3.3 clocking product MULs.
cores CRC32, GFM

Cavium Networks OCTEON CN3110 Communication/wired, Security, TCP, MIPS64 300, 400, 72 32/64 1.0, 1.1 / 4 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 1 550, 550 1.8, 2.5, 3.3 clocking product MULs.
Ex core CRC32, GFM

Cavium Networks OCTEON CN3120 Communication/wired, Security, TCP, MIPS64 300, 400, 72 32/64 1.0, 1.1 / 6 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 2 500, 550 1.8, 2.5, 3.3 clocking product MULs.
Ex cores CRC32, GFM

Cavium Networks OCTEON CN3630 Communication/wired, Security, TCP, MIPS64 400, 500, 72 32/64 1.1, 1.2, 1.3 14 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 4 550, 600 / 1.8, 2.5, clocking product MULs.
Ex cores 3.3 CRC32, GFM

Cavium Networks OCTEON CN3830 Communication/wired, Security, TCP, MIPS64 400, 500, 72/144 32/64 1.1, 1.2, 1.3 19 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 4 550, 600 / 1.8, 2.5, clocking product MULs.
Ex cores 3.3 CRC32, GFM

Cavium Networks OCTEON CN3840 Communication/wired, Security, TCP, MIPS64 400, 500, 72/144 32/64 1.1, 1.2, 1.3 21 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 8 550, 600 / 1.8, 2.5, clocking product MULs.
Ex cores 3.3 CRC32, GFM

Cavium Networks OCTEON CN3850 Communication/wired, Security, TCP, MIPS64 400, 500, 72/144 32/64 1.1, 1.2, 1.3 23 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 12 550, 600 / 1.8, 2.5, clocking product MULs.
Ex cores 3.3 CRC32, GFM

Cavium Networks OCTEON CN3860 Communication/wired, Security, TCP, MIPS64 400, 500, 72/144 32/64 1.1, 1.2, 1.3 26 Conditional Up to 256 bit
Security, Mobile/wireless Packet, Reg- Release 2, 16 550, 600 / 1.8, 2.5, clocking product MULs.
Ex cores 3.3 CRC32, GFM

Cavium Networks OCTEON II Communication/wired, Security, MIPS64 800, 1100, 72 32/64 1.0, 1.2 / 14 Conditional Up to 256 bit
CN6330 Security, Mobile/wireless SNOW 3G, Release 2, 4 1300 1.8, 2.5, 3.3 clocking product MULs.
SMS4, cores CRC32, GFM
KASUMI,
Compression,
Reg-Ex, TCP,
Packet, RAID
5/6, De-Dup

Cavium Networks OCTEON II Communication/wired, Security, MIPS64 800, 1100, 72 32/64 1.0, 1.2 / 16 Conditional Up to 256 bit
CN6335 Security, Mobile/wireless SNOW 3G, Release 2, 4 1300 1.8, 2.5, 3.3 clocking product MULs.
SMS4, cores CRC32, GFM
KASUMI,
Compression,
Reg-Ex, TCP,
Packet, RAID
5/6, De-Dup

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 500, 600, 72 32/64 1.0, 1.2 / 9 Conditional Up to 256 bit
CN5220 Security, Mobile/wireless KASUMI, Release 2, 2 700, 750 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 500, 600, 72 32/64 1.0, 1.2 / 11 Conditional Up to 256 bit
CN5230 Security, Mobile/wireless KASUMI, Release 2, 4 700, 750 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Page 27 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-kbyte Simple block Two 3 FE, Two UART, optional PIO 28 internal, 4 276 PBGA -40 to +85 Cryptographic co-processor for Less than
address external IPsec, FIPS-compliant RNG $10
translation
mechanism
16/8-kbyte, 32 dual-entry 16 independent 2 RGMII/MII or one GMII, 2 32 Internal, 20 564 BGA -40 to +85 JTAG debugging, $19 to $29
shared L2: 64- TLB, fully chains UART, USB 2.0 w/PHY, TDM / external Ethernet/IP/TCP/UDP
kbyte associative, 4- PCM for voice hardware acceleration,
kbyte to 256- Security
Mbyte pages
16/8-kbyte, 32 dual-entry 16 independent RGMII/MII, 2 RGMII or one 32 Internal, 20 564 BGA -40 to +85 JTAG debugging, $29 to $39
shared L2: TLB, fully chains RGMII/MII and one GMII, 2 external Ethernet/IP/TCP/UDP
128-kbyte associative, 4- UART, USB 2.0 w/PHY, TDM / hardware acceleration,
kbyte to 256- PCM for voice Security
Mbyte pages
32/8-kbyte, 32 dual-entry 16 independent RGMII/MII, 2 RGMII or one 32 Internal, 20 564 BGA -40 to +70 JTAG debugging, $35 to $55
shared L2: TLB, fully chains RGMII/MII and one GMII, 2 external Ethernet/IP/TCP/UDP
128-kbyte associative, 4- UART, USB 2.0 w/PHY, TDM / hardware acceleration,
kbyte to 256- PCM for voice Security
Mbyte pages
32/8-kbyte, 32 dual-entry 16 independent 3 RGMII or one RGMII and 32 Internal, 20 868 BGA -40 to +85 Ethernet/IP/TCP/UDP $49 to $125
shared L2: TLB, fully chains one GMII, 2 UART, USB 2.0 external acceleration, Security,
256-kbyte associative, 4- w/PHY, TDM / PCM for voice (de)compression, RegEx
kbyte to 256- coprocessors, JTAG
Mbyte pages debugging
32/8-kbyte 32 dual-entry 16 independent 3 RGMII or one RGMII and 32 Internal, 20 868 BGA -40 to +85 JTAG debugging, $49 to $125
(per core), TLB, fully chains one GMII, 2 UART, USB 2.0 external Ethernet/IP/TCP/UDP
shared L2: associative, 4- w/PHY, TDM / PCM for voice acceleration, Security,
256-kbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/8-kbyte 32 dual-entry 16 independent One SPI4.2 or four RGMII, 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $125 to
(per core), TLB, fully chains UART, PCI-X 64-bit/133MHz external Ethernet/IP/TCP/UDP $725
shared L2: associative, 4- acceleration, Security,
512-kbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/8-kbyte 32 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $199 to
(per core), TLB, fully chains UART, PCI-X 64-bit/133MHz external Ethernet/IP/TCP/UDP $391
shared L2: 1- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/8-kbyte 32 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $283 to
(per core), TLB, fully chains UART, PCI-X 64-bit/133MHz external Ethernet/IP/TCP/UDP $477
shared L2: 1- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/8-kbyte 32 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $356 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $599
shared L2: 1- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/8-kbyte 32 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $430 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $725
shared L2: 1- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
37/32-kbyte 128 dual-entry 16 independent Two SPI4.2 or four RGMII, 2 32 Internal, 20 729 BGA -40 to +85 JTAG debugging, $89 to $174
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP
shared L2: 2- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors

37/32-kbyte 128 dual-entry 16 independent Two SPI4.2 or four RGMII, 2 32 Internal, 20 729 BGA -40 to +85 JTAG debugging, $108 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $210
shared L2: 2- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors

32/16--kbyte 64 dual-entry 16 independent 8 serdes configurable as ([2x 32 Internal, 20 729 BGA -40 to +85 JTAG debugging, $39 to $61
(per core), TLB, fully chains 1,2-lanes PCIe] + 4x SGMII or external Ethernet/IP/TCP/UDP
shared L2: associative, 4- 4x 1000BX or 1x XAUI) acceleration, Security,
512-kbyte/1- kbyte to 256- (de)compression coprocessors
Mbyte Mbyte pages
32/16--kbyte 64 dual-entry 16 independent 8 serdes configurable as ([2x 32 Internal, 20 729 BGA -40 to +85 JTAG debugging, $55 to $85
(per core), TLB, fully chains 1,2-lanes PCIe] + 4x SGMII or external Ethernet/IP/TCP/UDP
shared L2: associative, 4- 4x 1000BX or 1x XAUI) acceleration, Security,
512-kbyte/1- kbyte to 256- (de)compression coprocessors
Mbyte Mbyte pages

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 28


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 500, 600, 72 32/64 1.0, 1.2 / 13 Conditional Up to 256 bit
CN5430 Security, Mobile/wireless KASUMI, Release 2, 4 700 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 500, 600, 72 32/64 1.0, 1.2 / 16 Conditional Up to 256 bit
CN5434 Security, Mobile/wireless KASUMI, Release 2, 6 700 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 500, 600, 72 32/64 1.0, 1.2 / 13 Conditional Up to 256 bit
CN5530 Security, Mobile/wireless KASUMI, Release 2, 4 700 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
RAID 5,6, De-
Dup, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 500, 600, 72 32/64 1.0, 1.2 / 16 Conditional Up to 256 bit
CN5534 Security, Mobile/wireless KASUMI, Release 2, 6 700 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
RAID 5,6, De-
Dup, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 18 Conditional Up to 256 bit
CN5634 Security, Mobile/wireless KASUMI, Release 2, 6 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 22 Conditional Up to 256 bit
CN5640 Security, Mobile/wireless KASUMI, Release 2, 8 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 26 Conditional Up to 256 bit
CN5645 Security, Mobile/wireless KASUMI, Release 2, 10 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 30 Conditional Up to 256 bit
CN5650 Security, Mobile/wireless KASUMI, Release 2, 12 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
TCP, Packet

Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 18 Conditional Up to 256 bit
CN5734 Security, Mobile/wireless KASUMI, Release 2, 6 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
RAID 5,6, De-
Dup, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 22 Conditional Up to 256 bit
CN5740 Security, Mobile/wireless KASUMI, Release 2, 8 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
RAID 5,6, De-
Dup, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 26 Conditional Up to 256 bit
CN5745 Security, Mobile/wireless KASUMI, Release 2, 10 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
RAID 5,6, De-
Dup, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 30 Conditional Up to 256 bit
CN5750 Security, Mobile/wireless KASUMI, Release 2, 12 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
RAID 5,6, De-
Dup, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 23 Conditional Up to 256 bit
CN5830 Security, Mobile/wireless KASUMI, Release 2, 4 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
Reg-Ex, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 27 Conditional Up to 256 bit
CN5840 Security, Mobile/wireless KASUMI, Release 2, 8 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
Reg-Ex, TCP,
Packet
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 31 Conditional Up to 256 bit
CN5850 Security, Mobile/wireless KASUMI, Release 2, 12 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
Reg-Ex, TCP,
Packet

Page 29 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32/16--kbyte 64 dual-entry 16 independent 12 serdes configurable as ([2x 32 Internal, 20 868 BGA -40 to +85 JTAG debugging, $115 to
(per core), TLB, fully chains 1,2,4-lanes PCIe or 1x 8-lane external Ethernet/IP/TCP/UDP $148
shared L2: associative, 4- PCIe] + 4x SGMII or 4x acceleration, Security,
512-kbyte/1- kbyte to 256- 1000BX or 1x XAUI) (de)compression coprocessors
Mbyte Mbyte pages
32/16--kbyte 64 dual-entry 16 independent 12 serdes configurable as ([2x 32 Internal, 20 868 BGA -40 to +85 JTAG debugging, $146 to
(per core), TLB, fully chains 1,2,4-lanes PCIe or 1x 8-lane external Ethernet/IP/TCP/UDP $231
shared L2: associative, 4- PCIe] + 4x SGMII or 4x acceleration, Security,
512-kbyte/1- kbyte to 256- 1000BX or 1x XAUI) (de)compression coprocessors
Mbyte Mbyte pages
32/16--kbyte 64 dual-entry 16 independent 12 serdes configurable as ([2x 32 Internal, 20 868 BGA -40 to +85 JTAG debugging, $115 to
(per core), TLB, fully chains 1,2,4-lanes PCIe or 1x 8-lane external Ethernet/IP/TCP/UDP $148
shared L2: associative, 4- PCIe] + 4x SGMII or 4x acceleration, Security,
512-kbyte/1- kbyte to 256- 1000BX or 1x XAUI) (de)compression, RAID
Mbyte Mbyte pages coprocessors

32/16--kbyte 64 dual-entry 16 independent 12 serdes configurable as ([2x 32 Internal, 20 868 BGA -40 to +85 JTAG debugging, $146 to
(per core), TLB, fully chains 1,2,4-lanes PCIe or 1x 8-lane external Ethernet/IP/TCP/UDP $231
shared L2: associative, 4- PCIe] + 4x SGMII or 4x acceleration, Security,
512-kbyte/1- kbyte to 256- 1000BX or 1x XAUI) (de)compression, RAID
Mbyte Mbyte pages coprocessors

32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $146 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $231
shared L2: 1- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression coprocessors
Mbyte pages
32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $192 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $300
shared L2: 2- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression coprocessors
Mbyte pages
32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $222 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $549
shared L2: 2- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression coprocessors
Mbyte pages
32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $266 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $599
shared L2: 2- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression coprocessors
Mbyte pages
32/16-kbyte 64 dual-entry 16 independent 16 SERDES configurable as 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $192 to
(per core), TLB, fully chains PCIe (2 controllers), XAUI, external Ethernet/IP/TCP/UDP $300
shared L2: 1- associative, 4- SGMII acceleration, Security,
Mbyte kbyte to 256- (de)compression, RAID
Mbyte pages coprocessors

32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $222 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $549
shared L2: 2- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression, RAID
Mbyte pages coprocessors

32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $266 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $599
shared L2: 2- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression, RAID
Mbyte pages coprocessors

32/16-kbyte 64 dual-entry 16 independent 16 serdes configurable as (2x 32 Internal, 20 1217 BGA -40 to +85 JTAG debugging, $199 to
(per core), TLB, fully chains 8-lanes PCIe or 2x 4-lane external Ethernet/IP/TCP/UDP $575
shared L2: 2- associative, 4- PCIe + 2x [4x SGMII, 4x acceleration, Security,
Mbyte kbyte to 256- 1000BX, 1x XAUI] (de)compression, RAID
Mbyte pages coprocessors

32/16-kbyte 64 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $189 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $324
shared L2: 2- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/16-kbyte 64 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $278 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $542
shared L2: 2- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
32/16-kbyte 64 dual-entry 16 independent Two [SPI4.2 or four RGMII], 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $385 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $845
shared L2: 2- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 30


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cavium Networks OCTEON Plus Communication/wired, Security, MIPS64 600, 750, 72/144 32/64 1.0, 1.2 / 35 Conditional Up to 256 bit
CN5860 Security, Mobile/wireless KASUMI, Release 2, 16 800 1.8, 2.5, 3.3 clocking product MULs.
Compression, cores CRC32, GFM
Reg-Ex, TCP,
Packet
Ceva CEVA-Teak (core) Communication/wired, 150 16/16 16 1.1 to 1.3
Mobile/wireless, Audio (130 nm)

Ceva Ceva-TeakLite Communication/wired, 170 16/16 16 1.1 to 1.3


(core) Mobile/wireless, Audio (130 nm)

Ceva Ceva-TeakLite-II Communication/wired, 200 16/16 16 1.1 to 1.3


(core) Mobile/wireless, Audio (130 nm)

Ceva Ceva-X1620 (core) Communication/wired, 380 (90nm) 32/64 16, 32 1.1 to 1.3
Mobile/wireless

Ceva CEVA-X1620 DSP Communication/wired, 380 (90nm) 32/64 16, 32 1.1 to 1.3 Slow mode, stop
Ceva-XS1100 Mobile/wireless mode
System

Ceva CEVA-X1620 DSP Communication/wired, 380 (90nm) 32/64 16, 32 1.1 to 1.3 Slow mode, stop
CEVA-XS1200 Mobile/wireless, Audio mode
System

Ceva CEVA-X1622 Communication/wired, 380 (90nm) 32/64 16, 32 1.1 to 1.3


(core) Mobile/wireless

Ceva CEVA-X1622 DSP Communication/wired, 380 (90nm) 32/64 16, 32 1.1 to 1.3 Slow mode, stop
CEVA-X1102 Mobile/wireless mode
System

Ceva CEVA-X1641 Communication/wired, 380 (90nm) 32/64 16, 32 1.1 to 1.3


(core) Mobile/wireless, Audio

Ceva Xpert-Teak (core) Communication/wired, 130 32/256, 32/64 16 1.1 to 1.3 Slow mode, stop
Mobile/wireless, Audio (130 nm) external mode

Ceva Xpert-TeakLite-II Communication/wired, 200 16/16 16 1.1 to 1.3 Slow mode, stop
(core) Mobile/wireless, Audio (130 nm) mode

ChipWrights CW4512 Consumer 210 32/32 32 1.5 / 3.3 750 mW


@1.6V

ChipWrights CW5521 Consumer Yes, 16-way 300 32/32 32 1 to 1.2 / 625 mW 32x32
SIMD 3.3 @1.0V

Page 31 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32/16-kbyte 64 dual-entry 16 independent Two SPI4.2 or four RGMII, 2 32 Internal, 20 1521 BGA -40 to +85 JTAG debugging, $463 to
(per core), TLB, fully chains UART, PCI-X 64 bit/133MHz external Ethernet/IP/TCP/UDP $987
shared L2: 2- associative, 4- acceleration, Security,
Mbyte kbyte to 256- (de)compression, RegEx
Mbyte pages coprocessors
(Core) (Core) License

(Core) (Core) License

(Core) (Core) License

32-kbyte 64-kbyte program, (Core) (Core) License


instruction 64-kbyte data,
program and data
DMA

32-kbyte 64-kbyte program, Power management, timers, (Core) (Core) License


instruction 64-, 128-kbyte interrupt controller, GPIO,
data, program code-replacement unit, on-
and data DMA, chip emulation
configurable L2
memory

32-kbyte 64-kbyte program, Four TDM ports, power (Core) (Core) License
instruction 64-, 128-kbyte management, timers, interrupt
data, program controller, GPIO, code-
and data DMA, 16- replacement unit, on-chip
channel 3D DMA, emulation
configurable L2
memory

32-kbyte 64-kbyte program, (Core) (Core) License


instruction 64-, 128-kbyte
data, program
and data DMA

32-kbyte 64-kbyte program, Power management, timers, (Core) (Core) License


instruction 64-, 128-kbyte interrupt controller, GPIO,
data, program code-replacement unit, on-
and data DMA, chip emulation
configurable L2
memory

32-kbyte 64-, 96-, 160- (Core) (Core) License


instruction kbyte program, 64-
, 128-kbyte data,
program and data
DMA
128-kword Two TDM ports, HPI, power (Core) (Core) License
program and management, timers, interrupt
data, eight controller, GPIO, code-
channel 3D DMA replacement unit, on-chip
emulation
2/8-kword Up to 32-kword Two TDM ports, interrupt (Core) (Core) License
data, up to 10- controllers, timers, power
kword program, management, GPIO, on-chip
three channel emulation, processor interface
DMA unit
8-kbyte 16-, 32-bit SDRAM, parallel video, host 220 ball BGA 0 to +70
instruction SDRAM I/Os, Compactflash,
ATA/ATAPI, SPI, Microwire,
UART, GPIO, JTAG

16-kbyte 32-bit DDR 4 general, DDR SDRAM, parallel video, Three 10-bit 496 ball BGA 0 to +85
instruction SDRAM watchdog, PWM LCD Interface, CCD/CMOS DAC
sensor input, host I/Os, USB
2.0 HS, IIS Audio codec
Interface, Compactflash,
ATA/ATAPI, SecureDigital,
SPI, Microwire, PWM, UART,
GPIO, JTAG

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 32


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
ChipWrights CW5631 Consumer, Imaging and Yes, 16-way 325 32/32 32 1 to 1.2 / 350 mW @ Yes 32x32
video, SIMD 3.3 1.0V
Military/aerospace, ARM926ES
Automotive

Cirrus Logic CS47024 Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive (dual MAC) Harvard MAC

Cirrus Logic CS47028 Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive (dual MAC) Harvard MAC

Cirrus Logic CS47048 Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive (dual MAC) Harvard MAC

Cirrus Logic CS48520 Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive (dual MAC) Harvard MAC

Cirrus Logic CS48540 Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive (dual MAC) Harvard MAC

Cirrus Logic CS48560 Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive (dual MAC) Harvard MAC

Cirrus Logic CS485XX Audio 32-bit core 150 32 32 1.8 / 3.3


(dual MAC)

Cirrus Logic CS48AU2B Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
(CS48520 Automotive (dual MAC) Harvard MAC
replaces)
Cirrus Logic CS48DV2x Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
(CS48520 Automotive (dual MAC) Harvard MAC
replaces)
Cirrus Logic CS494xx Audio Dual 32-bit Modified 86 24/32 24, 32 2.5 1W
(CS495314 / cores (dual Harvard
CS4970x4 MAC)
replaces)

Page 33 © Copyright 2010 Embedded Insights Inc. All rights reserved.


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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-kbyte 32-bit DDR 4 general, DDR2, Parallel video, USB 2.0 Four 10-bit DAC 416 ball BGA 0 to +70
instruction SDRAM watchdog, PWM OTG, 10/100 ethernet
interface, LCD interface,
CCD/CMOS sensor for input ,
Host I/O, OSD, SD card
interface, 8bit MMC/CE-ATA
interface, SPI, I2C, UART,
GPIO, JTAG for ARM , JTAG
for DSP, RTC, I2S, IrDA
support

ROM and 5:1 stereo analog input mux 24-bit 2 channel 100 LQFP 0 to +70, -40 to Audio System on a Chip with $8.79
Programmable (connected to first stereo ADC; 24-bit 4 +85 integrated A/D, D/A and SRC.
RAM ADC), SPDIF Rx, SPDIF Tx, channel DAC Extensive library of audio
8ch SRC, 4 I2S In, 4 I2S Out processing algorithms and
advanced Graphical Tools.

ROM and 5:1 MUX (Analog In), SPDIF 24-bit 2 channel 100 LQFP 0 to +70, -40 to Audio System on a Chip with $15.08
Programmable Rx, SPDIF Tx, 8ch SRC, I2S ADC; 24-bit 8 +85 integrated A/D, D/A and SRC.
RAM In, I2S Out channel DAC Extensive library of audio
processing algorithms and
advanced Graphical Tools.

ROM and 5:1 MUX (Analog In), SPDIF 24-bit 4 channel 100 LQFP 0 to +70, -40 to Audio System on a Chip with $14.00
Programmable Rx, SPDIF Tx, 8ch SRC, I2S ADC; 24-bit 8 +85 integrated A/D, D/A and SRC.
RAM In, I2S Out channel DAC Extensive library of audio
processing algorithms and
advanced Graphical Tools.

ROM and 2 I2S In, 2 I2S Out, 1 S/PDIF 48 LQFP 0 to +70, -40 to Audistry. Audyssey: EQ, $18.62
Programmable Tx, 1 SPI or I2C comm port, +85 Dynamic Volume/EQ, Bass XT,
RAM multiple GPIO ABX. Dolby: Volume, PLII,
DH2, DVS2. DTS: Surround
Sensation Speaker.
EmbracingSound. SRS: WOW
HD, TSXT/HD/HD4,
TruVolume, CS/CS II/CS Auto,
StudioSound HD,
CircleCinema 3D. Waves:
MaxxBass.
ROM and 4 I2S In, 4 I2S Out, 1 S/PDIF 48 LQFP 0 to +70, -40 to Audistry. Audyssey: EQ, $18.62
Programmable Tx, 1 SPI or I2C comm port, +85 Dynamic Volume/EQ, Bass XT,
RAM multiple GPIO ABX. Dolby: Volume,
PLII/PLIIx, DH2, DVS2. DTS:
Surround Sensation Speaker.
EmbracingSound. SRS: WOW
HD, TSXT/HD/HD4,
TruVolume, CS/CS II/CS Auto,
StudioSound HD,
CircleCinema 3D. Waves:
MaxxBass.
ROM and 6 I2S In, 6 I2S Out, 1 S/PDIF 48 LQFP 0 to +70, -40 to Audistry. Audyssey: EQ, $14.00
Programmable Tx, 1 SPI or I2C comm port, +85 Dynamic Volume/EQ, Bass XT,
RAM multiple GPIO ABX. Dolby: Volume,
PLII/PLIIx, DH2, DVS2. DTS:
Surround Sensation Speaker.
EmbracingSound. SRS: WOW
HD, TSXT/HD/HD4,
TruVolume, CS/CS II/CS Auto,
StudioSound HD,
CircleCinema 3D. Waves:
MaxxBass.
ROM and SPDIF TX, Six I2S In, Six I2S 48 LQFP 0 to +70 High-Performance, Low Cost $6.12
Programmable Out 32-Bit Audio Processor with
RAM extensive library of audio
processing algorithms and
advanced Graphical Tools.

ROM and 2 I2S In, 2 I2S Out, 1 S/PDIF 48 LQFP 0 to +70 Audyssey: EQ, Dynamic $14.22
Programmable Tx, 1 SPI or I2C comm port, Volume/EQ, Bass XT, ABX.
RAM multiple GPIO
ROM and 2 I2S In, 2 I2S Out, 1 S/PDIF 48 LQFP 0 to +70 Dolby: Volume, PLII, DH2, $18 to
Programmable Tx, 1 SPI or I2C comm port, DVS2. $23.26
RAM multiple GPIO
ROM and 4 I2S In, 8 I2S Out, 2 S/PDIF 144 LQFP 0 to +70, -40 to Dedicated legacy audio $15.08
Programmable Tx, two SPI, two I2C, Parallel, +85 decoder/processor for AVR,
RAM GPIO, 8/16-bit SDRAM, 8/16- intelligent room calibration,
bit SRAM/FLASH auto-speaker set-up and EQ

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 34


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cirrus Logic CS495314 Audio, Consumer, Dual 32-bit Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive cores (dual Harvard MAC / DSP
MAC) Core. 2 DSP
Cores.

Cirrus Logic CS4953X Audio Dual 32-bit 150 32 32 1.8 / 3.3


cores (dual
MAC)
Cirrus Logic CS495xx Audio Dual core, dual 120 32 32 1.8 0.9 W
MAC, 72-bit
accumulator

Cirrus Logic CS495xx Audio Dual core, dual Modified 120 32 32 1.8 0.9 W
(CS495314 / MAC, 72-bit Harvard
CS4970x4 accumulator
replaces)

Cirrus Logic CS4961xx Audio CobraNet 120 32 32 1.8 0.9 W


controller

Cirrus Logic CS49714 Audio, Consumer, Dual 32-bit Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive cores (dual Harvard MAC / DSP
MAC) Core. 2 DSP
Cores.

Cirrus Logic CS49724 Audio, Consumer, Dual 32-bit Modified 150 32 32 1.8 / 3.3 Dual 32-bit
Automotive cores (dual Harvard MAC / DSP
MAC) Core. 2 DSP
Cores.

Cirrus Logic CS49DV8C Audio, Consumer, 32-bit core Modified 150 32 32 1.8 / 3.3 Dual 32-bit
(CS497014 Automotive (dual MAC) Harvard MAC / DSP
replaces) Core. 2 DSP
Cores.

Cirrus Logic EP7309 Industrial, Consumer, ARM720T 74 32 16, 32 2.5 / 3.3 90 mW Less than 0.03
Mobile Audio mW, power
management

Cirrus Logic EP7311 Audio, Industrial, ARM720T 74, 90 32 16, 32 2.5 / 3.3 108 mW Less than 0.03
Consumer mW, power
management
Cirrus Logic EP7312 Consumer, ARM720T 74, 90 32 16, 32 2.5 / 3.3 108 mW Less than 0.03
Mobile/wireless mW, power
management

Cirrus Logic EP9301 Security, Computers and ARM920T 166 16 16 1.8 / 3.3 550 mW Less than 1
peripherals mW, power
management

Cirrus Logic EP9302 Security, Medical, ARM920T 200 16 16 1.8 / 3.3 550 mW Less than 1 200-MHz
Consumer mW, power MaverickCrunc
management h

Cirrus Logic EP9307 Consumer, Auto, ARM920T 200 32 16, 32 1.8 / 3.3 550 mW Less than 1 200-MHz
Computers/Peripherals mW, power MaverickCrunc
management h

Page 35 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
ROM and 5 I2S In, 8 I2S Out, 2 S/PDIF 128 LQFP 0 to +70, -40 to Dolby, DTS, MPEG-2 AAC LC, $14.00
Programmable Tx, two SPI, two I2C, multiple +85 WMA, MPEG Surround Legacy
RAM GPIO, 16-bit SDRAM Audio Decoder plus: Dolby:
Volume, PLII/PLIIx, DH2,
DVS2. DTS: Surround
Sensation Speaker.
EmbracingSound. SRS: WOW
HD, TSXT/HD/HD4,
TruVolume, CS/CS II/CS Auto,
StudioSound HD,
CircleCinema 3D
ROM and SPDIF TX, Five I2S In, Eight 128/144 LQFP 0 to +70 Standard Definition Audio $5.40
Programmable I2S Out Decoder and Advanced PCM
RAM Post-processor
Four I2S In, eight I2S Out, two 144 LQFP 0 to +70, Dedicated audio $6.32
S/PDIF Out, two SPI, two I2C, -40 to +85 decoder/processor for AVR,
Parallel, GPIO, 8/16-bit intelligent room calibration,
SDRAM, 8/16-bit auto-speaker set-up and EQ
SRAM/FLASH, serial FLASH

ROM and 4 I2S In, 8 I2S Out, 2 S/PDIF 144 LQFP 0 to +70, -40 to Dedicated audio $14.22
Programmable Tx, 2 SPI, 2 I2C, Parallel, +85 decoder/processor for AVR,
RAM GPIO, 8/16-bit SDRAM, 8/16- intelligent room calibration,
bit SRAM/FLASH, serial auto-speaker set-up and EQ
FLASH

4 I2S In, 8 I2S Out, 2 S/PDIF 144 LQFP 0 to +70, -40 to Networked digital-audio $18 to
Out, 2 SPI, 2 I2C, UART, 8/16- +85 management $23.26
bit SDRAM, 8/16-bit
SRAM/FLASH
ROM and 5 I2S In, 8 I2S Out, 2 S/PDIF 128 LQFP 0 to +70 CS495314 functionality plus $18.62
Programmable Tx, two SPI, two I2C, multiple HD Audio Decoding algorithm
RAM GPIO, 16-bit SDRAM support including: Dolby Digital
Plus and Dolby TrueHD.
Contact factory for pricing
associated with Dolby-only
legacy decoder designs.

ROM and 5 I2S In, 8 I2S Out, 2 S/PDIF 128 LQFP 0 to +70 CS497014 functionality plus $18.62
Programmable Tx, two SPI, two I2C, multiple HD Audio Decoding algorithm
RAM GPIO, 16-bit SDRAM support including: DTS-HD
Master Audio, DTS-HD High
Resolution Audio, DTS
Express
ROM and 5 I2S In, 8 I2S Out, 2 S/PDIF 128 LQFP 0 to +70 7.1 ch, 20-band, Dolby Volume $14.00
Programmable Tx, two SPI, two I2C, multiple (original) Processor with
RAM GPIO, 16-bit SDRAM additional pre- and post-
processing capabilities. Ideal
for use after CS4970x4 DSPs.

8-kbyte unified 64-entry TLB Two 16-bit Two SSI, IrDA, two UART, two 22 208 LQFP, 256 -40 to +85 LCD controller, 32-/128-bit $7.04
PWM, 27 GPIO PBGA, 204 unique MaverickKey ID,
TFBGA touchscreen interface, glueless
digital audio, CODEC interface,
JTAG
8-kbyte unified 64-entry TLB Two 16-bit Two SSI, IrDA, two UART, two 22 208 LQFP, 256 -40 to +85 LCD controller, 32-/128-bit $7.58
PWM, 27 GPIO PBGA, 204 unique MaverickKey ID,
TFBGA touchscreen interface, JTAG
8-kbyte unified 64-entry TLB Two 16-bit Two SSI, IrDA, two UART, two 22 208 LQFP, 256 -40 to +85 LCD controller, 32-/128-bit $8.47
PWM, 27 GPIO PBGA, 204 unique MaverickKey ID,
TFBGA touchscreen interface, glueless
digital audio, CODEC interface,
JTAG
16-kbyte 64-entry TLB Two 16-bit, 32-bit, Two SSI, IrDA, six I²S, SPI, 64 12-bit 208 QFP -40 to +85 32/128-bit unique MaverickKey $8.85
40-bit, two PWM, two UART with HDLC, two ID, glueless digital audio,
watchdog USB 2.0 Host, AC'97, 10/100 CODEC interface
Ethernet, 24 GPIO
200-MHz 16-kbyte 64-entry TLB Two 16-bit, 32-bit, Two SSI, IrDA, six I²S, SPI, 64 12-bit 208 QFP -40 to +85 32/128-bit unique MaverickKey $10.14
Maverick- 40-bit, two PWM, two UART with HDLC, two ID, glueless digital audio,
Crunch watchdog USB 2.0 Host, AC'97, 10/100 CODEC interface
Ethernet, 24 GPIO
200-MHz 16-kbyte 64-entry TLB Two 16-bit, 32-bit, Two SSI, IrDA, six I²S, SPI, 64 12-bit 272 TFBGA -40 to +85 CRT/LCD/NTSC/PAL display $14.20
Maverick- 40-bit, two PWM, three UART with HDLC, three controller, touchscreen
Crunch watchdog USB 2.0 Host, AC'97, 10/100 interface, 32/128-bit unique
Ethernet, 8x8 Keypad, 65 MaverickKey ID, glueless
GPIO digital audio, CODEC interface

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 36


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cirrus Logic EP9312 Computers and ARM920T 200 32 16, 32 1.8 / 3.3 550 mW Less than 1 200-MHz
peripherals, Consumer mW, power MaverickCrunc
management h

Cirrus Logic EP9315 Computers and ARM920T 200 32 16, 32 1.8 / 3.3 550 mW Less than 1 200-MHz
peripherals, Consumer mW, power MaverickCrunc
management h

Connect One C02064 ARM 48 32 16, 32 1.2 190 mA Sleep mode


Semiconductors Inc current: less
than 200 µA

Connect One CO2128 ARM 48 32 16, 32 1.2 190 mA Sleep mode


Semiconductors Inc current: less
than 200 µA

Coreworks FireWorks General purpose, Audio, FireWorks 390+ 32/32 AMBA- 32 1 (65nm) 0.019 Single-cycle
Mobile/wireless (65nm) AHB mW/MHz 32x32
(65nm) multiplier;
32/32 divider;
barrel shifter;
MAC

CPU Tech ACALIS 872 (two PowerPC 400, 533, 64/64 32 1.2 / 1.8 / 8W Idle, stop MAC
cores) 677, 800 2.5 / 3.3

CPU Tech ACALIS 878 (eight PowerPC 400, 533, 64/64 32 1.2 / 1.8 / 32 W Idle, stop MAC
cores) 677, 800 2.5 / 3.3

Cyan Technology eCOG1 eCOG1 25 16 16 3.3 36 mW Stop 0.4 µA, 16x16


Ltd sleep, 10.1 µA
at 16Khz
running code
Cyan Technology eCOG16 Fast multiplier CyCore160 50 16 16 1.8 40.59 mW Stop 6.4 µA, 16x16 signed
Ltd sleep 14.3 µA, and unsigned
in single clock
cycle
Cybernetic Micro P-51 8051 51 16/8 (8051), 8, 16 3.3 / 150 mW 8x8
Systems 20/8 (EISA) 5 tolerant

Cypress CY8C20x34 M8C 24 16/8 8, 16, 24 2.4 to 5.25 2.5 mA Sleep 4 µA


Semiconductor

Cypress CY8C20xx6A M8C 24 16/8 8, 16, 24 1.71 to 5.25 4 mA Sleep 1.5 µA


Semiconductor Deep Sleep 0.5
µA

Cypress CY8C21123 M8C 24 16/8 8, 16, 24 2.4 to 5.25 3 mA Sleep 8 uW


Semiconductor CY8C21223
CY8C21323

Page 37 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
200-MHz 16-kbyte 64-entry TLB Two 16-bit, 32-bit, Two SSI, IrDA, six I²S, SPI, 64 12-bit 352 PBGA -40 to +85 CRT/LCD/NTSC/PAL display $17.72
Maverick- 40-bit, two PWM, three UART with HDLC, three controller, touchscreen
Crunch watchdog USB 2.0 Host, AC'97, two IDE, interface, 32/128-bit unique
10/100 Ethernet, 8x8 Keypad, MaverickKey ID, glueless
65 GPIO digital audio, CODEC interface

200-MHz 16-kbyte 64-entry TLB Two 16-bit, 32-bit, Two SSI, IrDA, six I²S, SPI, 64 12-bit 352 PBGA -40 to +85 CRT/LCD/NTSC/PAL display $19.64
Maverick- 40-bit, two PWM, three UART with HDLC, three controller, touchscreen
Crunch watchdog USB 2.0 Host, AC'97, two IDE, interface, 32/128-bit unique
PCMCIA interface, 10/100 MaverickKey ID, glueless
Ethernet, 8x8 Keypad, 65 digital audio, CODEC interface
GPIO

16-bit watchdog Two USARTs, Two Wire, SPI, 16 10-bit 64-pin LQFP, -40 to +85 10/100 BaseT ethernet MAC, $6
Synchronous Serial Controller, RoHS- Hardware encryption
USB v2.0 Host and Device, compliant supporting 3DES, SHA-1/256,
External Bus Interface, High- AES-128/192/256
Speed Parallel Bus

16-bit watchdog Two USARTs, Two Wire, SPI, 16 10-bit 128-pin LQFP, -40 to +85 10/100 BaseT Ethernet, $7
Synchronous Serial Controller, RoHS- hardware encryption
USB v2.0 Host and Device, compliant supporting 3DES, SHA-1/256,
External Bus Interface, High- AES-128/192/256
Speed Parallel Bus

0 to 32-kbyte 1 (Core) (Core) License


(configurable)

Dual 32-kbyte eight- 64 entry TLB Programmable Five 10G Express Links, 45 with two 899 BGA -40 to +105 On Chip Firewall and AT from $200
way set- 10/100/1G Ethernet, IIC, 16 priority levels Security Fabricated at the IBM
associative GPIO Trusted Foundry
256-kbyte 8-
way set-
associative L2
with ECC

Eight 32-kbyte eight- 64 entry TLB Programmable Eight 10G Express Links, four 180 with two 1500 BGA -40 to +105 On Chip Firewall and AT
way set- 10/100/1G Ethernet, IIC, 64 priority levels Security Fabricated at the IBM
associative GPIO Trusted Foundry
256-kbyte 8-
way set-
associative L2
with ECC

2-kbyte Logical to Seven 16-bit, 24- Two UART, two USART, I²C, 29 GPIO level Four-channel, 128 TQFP -40 to +85 Vdd sensor, temperature
physical address bit IrDA, SPI, smart-card interface or edge 12-bit sensor, eICE real time debug
translations sensitive port

2-kbyte Logical to Four 16-bit, Four UART, I2C, two SPI 20 nested Four-channel, 48 TQFP, 68 -40 to +85 Vdd sensor, temperature
physical address chainable GPIO level or 12-bit QFN sensor, Nexus real time debug
translations edge sensitive port

Single-cycle Pins/registers set Three 16-bit Four 8-bit ports, full-duplex Seven, via 100 SQFP 0 to +70 Breakpoint/single-step $12
square root: address mapping UART, PC-104- or 8051- write/read to -55 to +125 debugging, selectable IRQ and
8-bit root of into host address compatible 8-bit host interface specific (storage) memory addressing, looks like
16-bit space memory a memory device to host
number location

Flash, 8K RAM- 13-bit SPI, I2C 9 16/24/32 QFN, -40 to +85


512 Bytes 30 WLCSP

Flash, 32K RAM- Three 16-bit SPI, I2C 24 8-10-bit 16/24/32/48 -40 to +85
2K incremental ADC QFN, 48
SSOP, 30
WLCSP
Up to four Up to two dynamically 12 Up to two 10-bit 8/16 SOIC, -40 to +85 Dynamically allocatable
dynamically allocatable SPI, up to one ADC, up to two 20 SSOP comparators, pseudorandom
allocatable dynamically allocatable UART, analog 24 MLF sequence generator,
8/16/24/32-bit I2C comparators
timers, counters,
PWMs

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 38


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cypress CY8C21345 M8C 24 16/8 8. 16, 24 3.0 to 5.25 7 mA Sleep 10 uW 8x8 multiply,
Semiconductor CY8C22445 32-bit
CY8C22545 accumulate,
decimator

Cypress CY8C21x34 M8C 24 16/8 8, 16, 24 2.4 to 5.25 4 mA Sleep 4 µA


Semiconductor

Cypress CY8C24123A M8C 24 16/8 8, 16, 24 2.4 to 5.25 5 mA Sleep 10 uW 8x8 multiply,
Semiconductor CY8C24223A 32-bit
CY8C24423A accumulate,
decimator

Cypress CY8C24633 M8C 24 16/8 8, 16, 24 3 to 5.25 5 mA Sleep 10 uW 8x8 multiply,


Semiconductor CY8C23533 32-bit
accumulate,
decimator

Cypress CY8C24794 M8C 24 16/8 8, 16, 24 3 to 5.25 14 mA Sleep 10 uW Two 8x8


Semiconductor CY8C24894 multiply, 32-bit
CY8C24994 accumulate,
decimator

Cypress CY8C27x43 M8C 24 16/8 8, 16, 24 3 to 5.25 5 mA Sleep 10 uW 8x8 multiply,


Semiconductor 32-bit
accumulate,
decimator

Cypress CY8C28xxx M8C 24 16/8 8. 16, 24 3.0 to 5.25 8 mA Sleep 10 uW Two 8x8
Semiconductor multiply, 32-bit
accumulate,
decimator

Cypress CY8C29xxx M8C 12 16/8 8, 16, 24 4.75 to 5.25 8 mA Sleep 10 uW Two 8x8
Semiconductor multiply, 32-bit
accumulate,
decimator

Cypress CY8C34xxx 8051 48 32/24/16/8 8 1.7 to 5.5 5.6 mA (40 Sleep 1 µA,
Semiconductor MHz) Hibernate 200
nA, Alternate
varies

Cypress CY8C36xxx 8051 67 32/24/16/8 8 1.7 to 5.5 5.6 mA (40 Sleep 1 µA, 24x24 multiply,
Semiconductor MHz) Hibernate 200 24 8-bit
nA, Alternate accumulate,
varies decimate

Page 39 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to eight Up to four dynamically 22 Up to two 8-bit 28 SSOP, 44 -40 to +85 dynamically allocatable
dynamically allocatable SPI, up to two ADC, up to four TQFP -40 to +105 comparators, pseudorandom
allocatable dynamically allocatable UART, analog sequence generator; analog
8/16/24/32-bit I2C comparators multiplexer Bus. Capacitive
timers, counters, sensing via CapSense
PWMs

Flash, 8K RAM- 8/16/24/32-bit Full-Duplex UART, SPI, I2C 11 10-bit single 16 SOIC, -40 to +85 comparators, PRS generator
512 Bytes timers, counters, slope ADC 20/24SSOP,
PWMs 32 QFN

Up to four Up to two dynamically 12 Up to two 13-bit 8/20/28 PDIP, -40 to +85 dynamically allocatable filters,
dynamically allocatable SPI, up to one ADC, up to two 8/20/28 SOIC, -40 to +125 amplifier/scalers, comparators,
allocatable dynamically allocatable UART, 6/8/9-bit DAC,up 20/28 SSOP, pseudorandom sequence
8/16/24/32-bit, I2C to two analog 32 QFN generator,
timers, counters, comparators
PWMs

Up to four Up to two dynamically 13 Up to two 10-bit 28 SSOP, -40 to +85 dynamically allocatable
dynamically allocatable SPI, up to one ADC, up to one 32 QFN comparators, pseudorandom
allocatable dynamically allocatable UART, 6/8/9-bit DAC, sequence generator; analog
8/16/24/32-bit, I2C up to two analog multiplexer Bus. Capacitive
timers, counters, comparators sensing via CapSense
PWMs

Up to four Up to two dynamically 12 Up to two 13-bit 56/68 QFN -40 to +85 dynamically allocatable filters,
dynamically allocatable SPI, up to one ADC, up to two 100 VFBGA amplifier/scalers, comparators,
allocatable dynamically allocatable UART, 6/8/9-bit DAC, sequence generator, analog
8/16/24/32-bit, full-speed USB, I2C up to two analog multiplexer bus. Capacitive
timers, counters, comparators sensing via CapSense, High
PWMs Speed SAR ADC

Up to eight Up to four dynamically 18 Up to four 13-bit 8/28 PDIP, -40 to +85 dynamically allocatable filters,
dynamically allocatable SPI, up to two ADC, up to four 20/28/48 -40 to +125 amplifier/scalers, comparators,
allocatable dynamically allocatable UART, 6/8/9-bit DAC, SSOP, 20/28 pseudorandom sequence
8/16/24/32-bit, I2C up to four analog SOIC generator,
counters, PWMs comparators 44 TQFP,
48 QFN,

Up to twelve Dynamically allocatable 27 Up to five 6 to 14- 20/28 SSOP, -40 to +85 dynamically allocatable
dynamically variable length SPI, Up to 6 for bit ADC, up to 44 TQFP, 48 -40 to +105 comparators, pseudorandom
allocatable 8 bit. Up to three dynamically six analog QFN sequence generator; analog
8/16/24/32-bit allocatable UART, I2C comparators multiplexer Bus. Capacitive
timers, counters, sensing via CapSense
PWMs

Up to 16 Up to eight dynamically 26 Up to four 13-bit 28/48 SSOP -40 to +85 dynamically allocatable filters,
dynamically allocatable SPI, up to four ADC, up to four -40 to +125 amplifier/scalers, comparators,
allocatable dynamically allocatable UART, 6/8/9-bit DAC, pseudorandom sequence
8/16/24/32-bit, I2C up to four analog generator,
timers, counters, comparators
PWMs

4 dedicated 1 dedicated I2C, USBFS 2.0, 32 Interrupt Up to 12-bit 100 TQFP -40 to +85 736-pixel (16-common)
Timer/Ctr/PWMs CAN 2.0A/B Vectors ADC; up to 2 8- 68 QFN Up to 72 IO (62 GPIO)
Up to 24 8- to 32- Up to 24 SPI, UART, I2C, I2S bit DACs; Up to 48 SSOP Dedicated CapSense
bit timers, 4 comparators; 48 QFN Internal analog Vref at 0.1%;
counters, PWMs up to 2 opamps; 0.5V min input V with internal
2 programmable boost (at full datasheet specs)
analog switched- On-chip debug (JTAG, SWD,
capacitor blocks SWV)

4 dedicated 1 dedicated I2C, USBFS 2.0, 32 Interrupt Up to 12-bit 100 TQFP -40 to +85 736-pixel (16-common)
Timer/Ctr/PWMs CAN 2.0A/B Vectors ADC; up to 4 8- 68 QFN Up to 72 IO (62 GPIO)
Up to 24 8- to 32- Up to 24 SPI, UART, I2C, I2S bit DACs; Up to 48 SSOP Dedicated CapSense
bit timers, 4 comparators; 48 QFN Internal analog Vref at 0.1%;
counters, PWMs up to 4 opamps; IIR/FIR Internal Digital Filter
4 programmable functionality
analog switched- 0.5V min input V with internal
capacitor blocks boost (at full datasheet specs)
On-chip debug (JTAG, SWD,
SWV)

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 40


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Cypress CY8C38xxx 8051 67 32/24/16/8 8 1.7 to 5.5 5.6 mA (40 Sleep 1 µA, 24x24 multiply,
Semiconductor MHz) Hibernate 200 24 8-bit
nA, Alternate accumulate,
varies decimate

Cypress CY8C52xx Cortex-M3 40 32/24/16/8 16, 32 1.7 to 5.5 2 mA (6 MHz) Idle 20 µA,
Semiconductor Sleep 2 µA,
Hibernate 300
nA

Cypress CY8C53xx Cortex-M3 80 32/24/16/8 16, 32 1.7 to 5.5 2 mA (6 MHz) Idle 20 µA,
Semiconductor Sleep 2 µA,
Hibernate 300
nA

Cypress CY8C54xx Cortex-M3 80 32/24/16/8 16, 32 1.7 to 5.5 2 mA (6 MHz) Idle 20 µA, 24x24 multiply,
Semiconductor Sleep 2 µA, 24 8-bit
Hibernate 300 accumulate,
nA decimate

Cypress CY8C55xx Cortex-M3 80 32/24/16/8 16, 32 1.7 to 5.5 2 mA (6 MHz) Idle 20 µA, 24x24 multiply,
Semiconductor Sleep 2 µA, 24 8-bit
Hibernate 300 accumulate,
nA decimate

Cypress CYWUSB6953 M8C 12 16/8 8, 16, 24 2.7 to 3.6 74 mA Sleep 3 uW


Semiconductor

Digi International NS9210 Industrial RISC 75, 150 17/16 16, 32 1.5 / 3.3 500 mW Yes

Digi International NS9215 Industrial RISC 75, 150 17/16 16, 32 1.5 / 3.3 500 mW Automatic Clock Yes
Scaling, low-
power sleep
mode

Page 41 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
4 dedicated 1 dedicated I2C, USBFS 2.0, 32 Interrupt Up to 20-bit 100 TQFP -40 to +125 736-pixel (16-common)
Timer/Ctr/PWMs CAN 2.0A/B Vectors ADC; up to 4 8- 68 QFN Up to 72 IO (62 GPIO)
Up to 24 8- to 32- Up to 24 SPI, UART, I2C, I2S bit DACs; Up to 48 SSOP Dedicated CapSense
bit timers, 4 comparators; 48 QFN Internal analog Vref at 0.1%;
counters, PWMs up to 4 opamps; IIR/FIR Internal Digital Filter
4 programmable functionality
analog switched- 0.5V min input V with internal
capacitor blocks boost (at full datasheet specs)
On-chip debug (JTAG, SWD,
SWV)

instruction/flas 4 dedicated 1 dedicated I2C, USBFS 2.0, 16 exceptions; Up to 1msps 12- 100 TQFP -40 to +85 736-pixel (16-common)
h Timer/Ctr/PWMs CAN 2.0A/B 32 Interrupts bit SAR ADC; Up 68 QFN Up to 72 IO (62 GPIO)
Up to 20 8- to 32- Up to 24 SPI, UART, I2C, I2S to 2 comparators 48 SSOP Dedicated CapSense
bit timers, Internal analog Vref at 0.1%;
counters, PWMs 0.5V min input V with internal
boost (at full datasheet specs)
On-chip debug (JTAG, SWD,
SWV)

instruction/flas 4 dedicated 1 dedicated I2C, USBFS 2.0, 16 exceptions; Up to 1msps 12- 100 TQFP -40 to +85 736-pixel (16-common)
h Timer/Ctr/PWMs CAN 2.0A/B 32 Interrupts bit SAR ADC; up 68 QFN Up to 72 IO (62 GPIO)
Up to 24 8- to 32- Up to 24 SPI, UART, I2C, I2S to 2 8-bit DACs; 48 SSOP Dedicated CapSense
bit timers, Up to 4 Internal analog Vref at 0.1%;
counters, PWMs comparators; up 0.5V min input V with internal
to 2 opamps; boost (at full datasheet specs)
2 programmable On-chip debug (JTAG, SWD,
analog switched- SWV)
capacitor blocks

instruction/flas 4 dedicated 1 dedicated I2C, USBFS 2.0, 16 exceptions; Up to (2) 1msps 100 TQFP -40 to +85 736-pixel (16-common)
h Timer/Ctr/PWMs CAN 2.0A/B 32 Interrupts 12-bit SAR; up 68 QFN Up to 72 IO (62 GPIO)
Up to 24 8- to 32- Up to 24 SPI, UART, I2C, I2S to 4 8-bit DACs; 48 SSOP Dedicated CapSense
bit timers, Up to 4 Internal analog Vref at 0.1%;
counters, PWMs comparators; up IIR/FIR Internal Digital Filter
to 4 opamps; functionality
4 programmable 0.5V min input V with internal
analog switched- boost (at full datasheet specs)
capacitor blocks On-chip debug (JTAG, SWD,
SWV)

instruction/flas 4 dedicated 1 dedicated I2C, USBFS 2.0, 16 exceptions; Up to 20-bit 100 TQFP -40 to +85 736-pixel (16-common)
h Timer/Ctr/PWMs CAN 2.0A/B 32 Interrupts DelSig; up to 68 QFN Up to 72 IO (62 GPIO)
Up to 24 8- to 32- Up to 24 SPI, UART, I2C, I2S 1msps 12-bit 48 SSOP Dedicated CapSense
bit timers, SAR; up to 4 8- Internal analog Vref at 0.1%;
counters, PWMs bit DACs; Up to IIR/FIR Internal Digital Filter
4 comparators; functionality
up to 4 opamps; 0.5V min input V with internal
4 programmable boost (at full datasheet specs)
analog switched- On-chip debug (JTAG, SWD,
capacitor blocks SWV)

Up to four Up to two dynamically 12 Up to two 10-bit 48 QFN 0 to +70 dynamically allocatable filters,
dynamically allocatable SPI, up to one ADC, up to two amplifier/scalers, comparators,
allocatable dynamically allocatable UART, analog sequence generator, Direct
8/16/24/32-bit, I2C comparators Sequence Spread Spectrum
timers, counters, 2.4 GHz radio system
PWMs

4/4-kbyte Yes 10 32-bit timers Four UART, SPI, I2C, Up to 54 4 external 12-bit 177 BGA -40 to +85 AES acceleration, Flexible $7.95
and PWM GPIO, 10/100 Ethernet Interface Modules
4/4-kbyte Yes 10 32-bit timers Two UART, two SPI, up to 108 4 external 12-bit 265 BGA -40 to +85 AES acceleration, Flexible $9.95
and PWM GPIO, 10/100 Ethernet Interface Modules

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 42


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Digi International NS9360 Industrial RISC 177 32/32 16, 32 1.5 / 3.3 1.7 W Yes

e2v 68020 Military/aerospace 25 32 32 5.0 2W

e2v 68040 Military/aerospace 33 33 33 5.0 7W

e2v 68302 Military/aerospace 16.7 16/23 16 5.0 320 mW

e2v 68332 Military/aerospace 20 16/23 16 5.0 600 mW

e2v 68882 Military/aerospace 33 32 32 5.0 2W

e2v 68C000 Military/aerospace 12.5 16/23 16 5.0 275 mW

e2v 68C429 (ARINC) Military/aerospace 20 16 16 5.0 400 mW

e2v 68EN360 Military/aerospace 33 32 32 5.0 1.8 W

e2v PC603R Military/aerospace Power 166, 200, 32/64 32 2.5 / 3.3 4.0/6.1 W (300 Doze, stop
266, 300 MHz)

e2v PC7410 Military/aerospace Power 400, 450, 32/64 32 1.8 / 2.5 5.3/11.9 W Nap, sleep, 128-bit AltiVec
500 (500 MHz) deep sleep vector
processor

e2v PC7447A Military/aerospace Power 1000, 1167 36/64 32 1.3 / 2.5 9.2 W (1167 Nap, sleep, 128-bit AltiVec
MHz) deep sleep vector
processor

e2v PC7448 Military/aerospace Power 600 to 1500 36/64 32 1.0 to 1.3 / 8.4 W (1267 Nap, sleep, 128-bit AltiVec
1.8, 2.5, 3.3 MHz) deep sleep vector
processor

e2v PC745 Military/aerospace Power 300, 350 32/64 32 2 / 3.3 3.6 W Doze, stop

e2v PC7457 Military/aerospace Power 933, 1000 36/64 32 1.1 / 2.5 8.3 W (1000 Nap, sleep, 128-bit AltiVec
MHz) deep sleep vector
processor

e2v PC755 Military/aerospace Power 300, 350, 32/64 32 2 / 3.3 5.4 W Doze, stop
400

e2v PC8245 Military/aerospace Power 300, 333, 32/64 32 1.8 / 2 2.2 W Doze, stop
350

e2v PC8265 Military/aerospace Power 266 32/64 32 1.8 to 2.2 2.4 W Doze, stop

Page 43 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
8/4-kbyte Yes 16 programmable 50 GPIO, four programmable 4 external 272 BGA -40 to +85 Four parallel JBIG decoders for starting at
16- or 32-bit, serial (UART, SPI master single-pass and four-pass color $10.95
watchdog, system /slave), USB host/device, and monochrome laser
bus monitor, 10/100 Ethernet, 1284, I²C printers, LCD controller
system bus ar-
biter

64 long word PGA 114 -55 to +125


instruction CQFP 132 (junction)

Yes 4-kbyte PGA 179 -55 to +125


CQFP 192 (junction)
4 SCP, TDM, Ethernet PGA 132 -55 to +125
CERQUAD (junction)
132
TPU UART, SCI, QSPI, SCI PGA 132 -55 to +125
CERQUAD (junction)
132
Yes PGA 68 -55 to +125
CQFP 68 (junction)
DIL64, LDCC -55 to +125
68, CQFP 68, (junction)
LCCC 68, PGA
68
PGA 84 -55 to +125
CQFP 132 (junction)
DRAM, SRAM, 4x 16-bit or 2x 32- SCP, TDM, Ethernet PGA 241 -55 to +125
FLASH bit timers CERQUAD (junction)
240
Yes 16-kbyte, four- 64-entry TLB, two- CBGA, HiTCE, -55 to +125
way set- way set CERQUAD (junction)
associative associative
Yes 32-kbyte, eight- 128-entry TLB, CBGA, HiTCE -55 to +125 AltiVec
way set- two-way set (junction)
associative associative

Yes 32-kbyte, eight- 128-entry TLB, HiTCE -55 to +125 AltiVec


way set- two-way set (junction)
associative associative

IEEE 754- 32-kbyte, eight- 128-entry TLB, HiTCE -55 to +125 AltiVec
1985 single way set- two-way set (junction)
and double associative, associative
precision L2: 1-Mbyte
eight-way set
associative
with ECC

Yes 32-kbyte, eight- 128-entry TLB, PBGA, HiTCE -55 to +125


way set- two-way set (junction)
associative associative

Yes 32-kbyte, eight- 128-entry TLB, CBGA, HiTCE -55 to +125 AltiVec
way set- two-way set (junction)
associative associative

Yes 32-kbyte, eight- 128-entry TLB, PBGA, HiTCE -55 to +125


way set- two-way set (junction)
associative associative

Yes 16-kbyte, four- 32- or 64-bit Four 16-bit or two I²C, SPI, PCI, local bus, dual- 352 TBGA -55 to +125
way set- SDRAM 32-bit UART (junction)
associative
Yes 16-kbyte, four- SDRAM, DRAM, Four 16-bit or two Three controllers for ATM, Eight IRQ, 24 480 TBGA -55 to +125 Timeslot assigner, eight TDM
way set- FLASH 32-bit, realtime 10/100 Ethernet, or external (junction) interfaces, transmission
associative transparent; I²C, two 128- convergence layer for ATM,
channel transparent or HDLC IMA, parallel I/O, eight baud
controllers; four controllers for rate generators, debug
Ethernet, UTOPIA, HDLC, interface
UART, transparent, or BiSync;
two UART or transparent -
channel, SPI, PCI, local bus

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 44


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
e2v PC8280 Military/aerospace Power 266, 333, 32/64 32 1.5 1.55 W Doze, stop
400

e2v PC8349 Military/aerospace Power 667 32/64 32 1.3 3.5 W

e2v PC8540 Military/aerospace Power 667 to 833 32/64 32 1.2 6.9 W Doze, nap,
sleep

e2v PC8548 Military/aerospace Power 800 to 1200 32/64 32 1.2 8.3 W (1200 Doze, nap,
MHz) sleep

e2v PC8572 Military/aerospace Power 1500 32/64 32 1.1 17.3 W Doze, nap,
sleep

e2v PC860SR Military/aerospace Power 66 32 32 3.3 750 mW Doze, sleep,


deep sleep,
power down
mode
e2v PC8610 Military/aerospace Power 800 to 1333 32/64 32 1.0 and 10.7 W 128-bit Altivec
1.025 vector
processor

e2v PC8640D Military/aerospace Power Two cores, 36/64 (internal) 32 0.95 / 1.05 / 21.7 W (dual Nap, sleep 128-bit Altivec
each 1.1; 1.8 / core) vector
running 2.5 / 3.3 processor (per
1000 to core)
1250

e2v PC8641D Military/aerospace Power Two cores, 36/64 (internal) 32 0.95 / 1.05 / 32.1 W (dual Nap, sleep 128-bit Altivec
each 1.1; 1.8 / core) vector
running 2.5 / 3.3 processor (per
1000 to core)
1500

EM Microelectronic EM6580 UPUS 32 kHz 7/4 16 1.9 / 0.17 mW Standby 3.3 µA,
800 kHz 2.3 to 5.5 (3V, 800kHz) sleep 320 nA

EM Microelectronic EM6607 UPUS 32 kHz 7/4 16 1.2 / 0.005 mW Standby 0.5 µA,
1.2 to 3.6 (3V, 32kHz) sleep 100 nA

EM Microelectronic EM6625 UPUS 32 kHz 7/4 16 1.2 / 0.005 mW Standby 0.4 µA,
128 kHz 1.2 to 3.6 (3V, 32kHz) sleep 200 nA

Page 45 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 16-kbyte, four- SDRAM, DRAM, Four 16-bit or two Three controllers for ATM, Eight IRQ, 24 480 TBGA -55 to +125 Timeslot assigner, eight TDM
way set- FLASH 32-bit, realtime 10/100 Ethernet, or external (junction) interfaces, transmission
associative transparent; two 128 channels convergence layer for ATM,
of transparent or HDLC; four IMA, eight baud rate
serial for Ethernet, HDLC, generators, debug interface
UART, BiSync, transparent;
two serial for transparent or
UART, I²C, SPI, PCI, local
bus, USB

Yes 32-kbyte 400MHZ DDR2 8 general Two GigE TSECs, DUART, Programmable 672 TBGA -55 to +125
SPI, I²C, USB, PCI, GPIO Interrupt (junction)
Controller
Yes 32-kbyte, L2: 333MHZ DDR Four 16-bit or two Two 10/100/1000 Ethernet, 16 HiTCE -55 to +125 e500 core, hardware
256-kbyte 32-bit, realtime two 10/100 Ethernet, DUART, programmable, (junction) coherency, four baud rate
unified Local Bus PCI/PCI-X), 8 16 levels, 12 generators, debug interface
(RapidIO) external, 4
message, 22
other internal
Yes 32-kbyte, L2: 64-bit DDR/DDRII Four 16-bit or two Four 10/100/1000 Ethernet, 16 783 PBGA, -55 to +125 e500 core, hardware
512-Kbyte 32-bit DUART, Dual I²C, two 32-bit programmable, HiTCE (junction) coherency, security engine
unified PCI, PCI-Express, local bus, 16 levels, 12 (Ipsec, SSL, XOR)
GPIO, 10/100 Ethernet, SRIO, external, 4
Local Bus PCI/PCI-X, 8 message, 22
(RapidIO) other internal
Yes 32-kbyte, L2: 1 400MHz DDR3 Eight 32-bit Four 10/100/1000 Ethernet 16 levels, 12 1023 FC- -55 to +125 e500 core, hardware
Mbyte unified with SGMII, one 10/100 external, 16 PBGA (junction) coherency, security engine
shared Ethernet, local bus, x8 SerDes message, 8 (Ipsec, SSL, XOR), pattern
between cores for 3 PCI Express or one interprocesso, matching engine, table lookup
SRIO, 64 other engine
internal
Yes 4-kbyte, two- 32-Entry TLB fully Four 16-bit or two Ethernet, HDLC/SDLC, UART, 7 external, 23 357 PBGA -55 to +125
way set- associative 32-bit, realtime Irda, SPI, I²C, PCMCIA internal (junction)
associative

32-kbyte Eight global high Two Fast Infra-Red Interfaces, 16 783 PBGA -55 to +125 LCD Controller: Maximum
L2: 256-kbyte resolution timers I²S, SSI programmable, (junction) Display Resolution SXGA 1280
backside with 16 task priority × 1024 with
optional ECC levels, 12 60 Hz Refresh
discrete
external and
48 internal

IEEE 754- 32-kbyte eight- Separate 128- 8 global 32-bit local bus; DUART 12 external, 48 HiTCE, -45 to +125 Dual core; Dual x8 PCI
1985 single way set- entry TLB for internal, 33x33mm, (junction) Express; Quad 10/100/1000
and double associative instruction and interprocess 1023 pin. Ethernet controllers with
precision (per core), L2: data (per core), and messaging TCP/UPD offload and qualify of
(per core) 1-Mbyte eight- hardware reload, service features
way set- two-way set
associative associative; 8
with ECC block address
translations for
both instruction
and data
IEEE 754- 32-kbyte eight- Separate 128- 8 global 32-bit local bus; DUART 12 external, 48 HiTCE, -45 to +125 Dual core; Dual x8 PCI
1985 single way set- entry TLB for internal, 33x33mm, (junction) Express; Quad 10/100/1000
and double associative instruction and interprocess 1023 pin. Ethernet controllers with
precision (per core), L2: data (per core), and messaging TCP/UPD offload and qualify of
(per core) 1-Mbyte eight- hardware reload, service features
way set- two-way set
associative associative; 8
with ECC block address
translations for
both instruction
and data
10-bit, PWM, One input, 5 GPIO 8, two external 4-bit and SVLD 8/14 SO -20 to +85 ISP, PowerCheck, Sleep
watchdog, clock Chip Counter Reset, fully internal
divider RC, code3 protection
8-bit, PWM, Four input, serial write buffer, 12, nine Three-level 24/28 SO, -20 to +85 High drive outputs
watchdog, clock 16 GPIO external supply-level 24/28 TSSOP
divider, realtime detector Chip

10-bit, PWM, 12- Four input, SPI, eight GPIO 13, five Eight-level 52 TQFP -20 to +85 LCD 20x4, temperature
bit BCD counter, external supply-level Chip compensated bias generator
watchdog, 4-bit, detector
clock divider,
realtime

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 46


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
EM Microelectronic EM6626 UPUS 32 kHz 7/4 16 1.2 / 0.005 mW Standby 0.4 µA,
128 kHz 1.2 to 3.6 (3V, 32kHz) sleep 200 nA

EM Microelectronic EM6635 UPUS 32 kHz 7/4 16 1.2 / 0.005 mW / Standby 0.4 µA


500 kHz 1.2 to 3.6 0.15 mW
(3V, 32kHz /
500kHz)

EM Microelectronic EM6680 UPUS 32 kHz 7/4 16 1.2 / 0.33 mW Standby 3.5 µA,
800 kHz 1.2 to 3.6 (3V, 800kHz) sleep 350 nA

EM Microelectronic EM6682 UPUS 32 kHz 7/4 16 0.9 to 5.5 0.33 mW Standby 3.5 µA,
800 kHz (3V, 800kHz) sleep 350 nA

EM Microelectronic EM6812 CR816 32 kHz to 16/8 22 1.9 / 0.12 mA/MHz Standby 6 µA, 8x8 multiplier
10 2 to 5.5 (3V) sleep 200 nA single-cycle

Energy Micro EFM32G200F16 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G200F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G200F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G210F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G230F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G230F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G230F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Page 47 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
10-bit, PWM, 12- Four input, SPI, eight GPIO 13, five Eight-level 64 TQFP -20 to +85 LCD 32x4, temperature
bit BCD counter, external supply-level Chip compensated bias generator,
watchdog, 4-bit, detector
clock divider,
realtime

Two 8-bits, 8-bit Eight input, one output, SPI, 18, six external Three-level 40 MLF -20 to +85 High drive outputs
BCD counter, 3- 19 GPIO supply-level Chip
bit event counter, detector
realtime

10-bit, PWM, One input, five GPIO eight, two 4-bit and SVLD 8/14 SO, -20 to +85 PowerCheck, Sleep Counter
watchdog, clock external 8/14 TSSOP Reset, fully internal RC
divider Chip
10-bit, PWM, One input, five GPIO eight, two 4-bit and SVLD 8/14 SO, -20 to +85 PowerCheck, Sleep Counter
watchdog, clock external 8/14 TSSOP Reset, fully internal RC
divider Chip
Four 8-bit or two SPI, 16 GPIO 20, nine Eight-level 24 SO, -40 to +85 ISP, brownout, high drive
16-bit, watchdog, external supply-level 24 TSSOP outputs, fully internal RC, code
PWM, frequency detector Chip protection
generator,
realtime

32-kbyte Flash, 8- 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 On-chip Power-on Reset and
kbyte RAM, MPU 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, Brown-out Detector in Stop
Timer, 1x I2C, 2x ACMP mode
realtime, 24 GPIO with 20 mA drive
watchdog, strength
Pulse Counter

64-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 On-chip Power-on Reset and
16-kbyte RAM, 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, Brown-out Detector in Stop
MPU Timer, 1x I2C, 2x ACMP mode
realtime, 24 GPIO with 20 mA drive
watchdog, strength
Pulse Counter

128-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 On-chip Power-on Reset and
16-kbyte RAM, 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, Brown-out Detector in Stop
MPU Timer, 1x I2C, 2x ACMP mode
realtime, 24 GPIO with 20 mA drive
watchdog, strength
Pulse Counter

128-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP On-chip Power-on Reset and
realtime, 24 GPIO with 20 mA drive Brown-out Detector in Stop
watchdog, strength mode
Pulse Counter

128-kbyte Flash, 3x 16-bit PWM, 3x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP On-chip Power-on Reset and
realtime, 56 GPIO with 20 mA drive Brown-out Detector in Stop
watchdog, strength mode
3x Pulse Counter

32-kbyte Flash, 8- 3x 16-bit PWM, 3x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
kbyte RAM, MPU 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP On-chip Power-on Reset and
realtime, 56 GPIO with 20 mA drive Brown-out Detector in Stop
watchdog, strength mode
3x Pulse Counter

64-kbyte Flash, 3x 16-bit PWM, 3x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP On-chip Power-on Reset and
realtime, 56 GPIO with 20 mA drive Brown-out Detector in Stop
watchdog, strength mode
3x Pulse Counter

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 48


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Energy Micro EFM32G280F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G280F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G280F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G290F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G290F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G290F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G840F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G840F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G840F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G880F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Page 49 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
128-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, QFP100 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP External Bus Interface,
realtime, 85 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
Pulse Counter mode

32-kbyte Flash, 8- 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, QFP100 -40 to +85 Hardware AES
kbyte RAM, MPU 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP External Bus Interface,
realtime, 85 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
Pulse Counter mode

64-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, QFP100 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP External Bus Interface,
realtime, 85 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
Pulse Counter mode

128-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, BGA112 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP External Bus Interface,
realtime, 90 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
3x Pulse Counter mode

32-kbyte Flash, 8- 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, BGA112 -40 to +85 Hardware AES
kbyte RAM, MPU 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP External Bus Interface,
realtime, 90 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
3x Pulse Counter mode

64-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, BGA112 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP External Bus Interface,
realtime, 90 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
3x Pulse Counter mode

128-kbyte Flash, 3x 16-bit PWM, 3x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP 4x24 LCD Controller,
realtime, LCD Controller, On-chip Power-on Reset and
watchdog, 56 GPIO with 20 mA drive Brown-out Detector in Stop
3x Pulse Counter strength mode

32-kbyte Flash, 8- 3x 16-bit PWM, 3x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
kbyte RAM, MPU 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP 4x24 LCD Controller,
realtime, 56 GPIO with 20 mA drive On-chip Power-on Reset and
watchdog, strength Brown-out Detector in Stop
3x Pulse Counter mode

64-kbyte Flash, 3x 16-bit PWM, 3x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP 4x24 LCD Controller,
realtime, LCD Controller, On-chip Power-on Reset and
watchdog, 56 GPIO with 20 mA drive Brown-out Detector in Stop
3x Pulse Counter strength mode

128-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, QFP100 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP 4x40 LCD Controller,
realtime, LCD Controller, External Bus Interface,
watchdog, 85 GPIO with 20 mA drive On-chip Power-on Reset and
3x Pulse Counter strength Brown-out Detector in Stop
mode

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 50


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Energy Micro EFM32G880F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G880F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G890F128 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G890F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32G890F64 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 11 mW Run 180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG100F16 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG100F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG100F4 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG100F8 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG200F16 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Page 51 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-kbyte Flash, 8- 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, QFP100 -40 to +85 Hardware AES
kbyte RAM, MPU 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP 4x40 LCD Controller,
realtime, LCD Controller, External Bus Interface,
watchdog 85 GPIO with 20 mA drive On-chip Power-on Reset and
strength Brown-out Detector in Stop
mode

64-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, QFP100 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP 4x40 LCD Controller,
realtime, LCD Controller, External Bus Interface,
watchdog, 85 GPIO with 20 mA drive On-chip Power-on Reset and
3x Pulse Counter strength Brown-out Detector in Stop
mode

128-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, BGA112 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP 4x40 LCD Controller,
realtime, LCD Controller, External Bus Interface,
watchdog, 90 GPIO with 20 mA drive On-chip Power-on Reset and
Pulse Counter strength Brown-out Detector in Stop
mode

32-kbyte Flash, 8- 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, BGA112 -40 to +85 Hardware AES
kbyte RAM, MPU 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP 4x40 LCD Controller,
realtime, LCD Controller, External Bus Interface,
watchdog, 90 GPIO with 20 mA drive On-chip Power-on Reset and
3x Pulse Counter strength Brown-out Detector in Stop
mode

64-kbyte Flash, 3x 16-bit PWM, 3x USART, 1x UART Internal; 1x 12-bit ADC, BGA112 -40 to +85 Hardware AES
16-kbyte RAM, 1x Low Energy 2x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
MPU Timer, 1x I2C, 2x ACMP 4x40 LCD Controller,
realtime, LCD Controller, External Bus Interface,
watchdog, 90 GPIO with 20 mA drive On-chip Power-on Reset and
3x Pulse Counter strength Brown-out Detector in Stop
mode

16-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN20 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 1x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

32-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN20 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 1x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

4-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN20 -40 to +85 Hardware AES
1-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 1x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

8-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN20 -40 to +85 Hardware AES
2-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 1x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

16-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 52


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Energy Micro EFM32TG200F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG200F8 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG230F16 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG230F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG230F8 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG840F16 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG840F32 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

Energy Micro EFM32TG840F8 Industrial, Medical, HW AES, Cortex-M3 32 32 32 1.8 to 3.8 <10 mW Run <180 32x32
Security DMA, PRS µA/MHz, Sleep
(Peripheral 45 µA/MHz,
Reflex System) Deep Sleep 0.9
µA, Stop 0.6 µA,
Shutoff 20 nA

EnSilica eSi-1600 Communication/wired, configurable - eSi 600 16/16 16 9 mW Wait, Sleep 16x16
Consumer, Digital power DSP, custom
instructions,
CRC,
Encryption
EnSilica eSi-1600SC Security AES,DES,3DE eSi 500 16/16 16 12 mW Wait, Sleep 16x16
S, CRC,RSA,
RND Gen,

EnSilica eSi-3200 Consumer, General eSi 700 32/32 16/32 12 mW Wait, Sleep 32x32
purpose, Mobile/wireless

EnSilica eSi-3250 Consumer, General Configurable- eSi 700 32/32 16/32 15 mW Wait, Sleep 32x32
purpose, Mobile/wireless DSP, custom
instructions,
CRC,
Encryption

Page 53 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

8-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN32 -40 to +85 Hardware AES
2-kbyte RAM 1x Low Energy 1x Low Energy UART, External 1x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 24 GPIO with 20 mA drive mode
Pulse Counter strength

16-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 56 GPIO with 20 mA drive mode
Pulse Counter strength

32-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 56 GPIO with 20 mA drive mode
Pulse Counter strength

8-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
2-kbyte RAM 1x Low Energy 1x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, On-chip Power-on Reset and
realtime, LCD Controller, OPAMPs Brown-out Detector in Stop
watchdog, 56 GPIO with 20 mA drive mode
Pulse Counter strength

16-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, 4x24 LCD Controller,
realtime, LCD Controller, OPAMPs On-chip Power-on Reset and
watchdog, 56 GPIO with 20 mA drive Brown-out Detector in Stop
Pulse Counter strength mode

32-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
4-kbyte RAM 1x Low Energy 1x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, 4x24 LCD Controller,
realtime, LCD Controller, OPAMPs On-chip Power-on Reset and
watchdog, 56 GPIO with 20 mA drive Brown-out Detector in Stop
Pulse Counter strength mode

8-kbyte Flash, 2x 16-bit PWM, 2x USART, Internal; 1x 12-bit ADC, QFN64 -40 to +85 Hardware AES
2-kbyte RAM 1x Low Energy 1x Low Energy UART, External 2x 12-bit DAC, encryption/decryption,
Timer, 1x I2C, 2x ACMP, 4x24 LCD Controller,
realtime, LCD Controller, OPAMPs On-chip Power-on Reset and
watchdog, 56 GPIO with 20 mA drive Brown-out Detector in Stop
Pulse Counter strength mode

Configurable Configurable, Configurable - USB, Ethernet 16 Option (Core) (Core) JTAG Debug, Eclipse IDE,
PWM, realtime MAC, UART, SPI, I²C; GPIO, GCC, ISS, SystemC Model
PS/2

Configurable Configurable, Configurable - USB, Ethernet 16 Option (Core) (Core) JTAG Debug, Eclipse IDE,
PWM, realtime MAC, UART, SPI, I²C; GPIO, GCC, ISS, SystemC Model
PS/2

Configurabl Configurable Configurable, Configurable - USB, Ethernet 32 Option (Core) (Core) JTAG Debug, Eclipse IDE,
e PWM, realtime MAC, UART, SPI, I²C; GPIO, GCC, ISS, SystemC Model
PS/2
Configurabl Yes Configurable Configurable, Configurable - USB, Ethernet 32 Option (Core) (Core) JTAG Debug, Eclipse IDE,
e PWM, realtime MAC, UART, SPI, I²C; GPIO, GCC, ISS, SystemC Model
PS/2

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 54


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Evatronix C32025 (core) Industrial, Consumer 32-bit up to 360 16/16 16, 32 Process
accumulator, (180 nm) dependent
16x16 MAC

Evatronix C32025TX (core) Industrial, Consumer 32-bit up to 150 16/16 16, 32 Process Normal mode,
accumulator, (180 nm) dependent idle mode
16x16 MAC

Freescale 56F8000 56F800E DSC 32 24/16 16 3.3 50 mA Wait 17 mA; 16x16=>36


Semiconductor STOP 5 mA; MAC, four 36-
Powerdown 0.16 bit
mA accumulators

Freescale 56F80xx Motor control, Digital 16x16 MAC 32 16/32 8, 16, 32 3.3 Stop mode, low-
Semiconductor power, General purpose power mode

Freescale 56F8100 56F800E DSC 40 24/16 16 3.3 150 mA Wait 70 mA; 16x16=>36
Semiconductor STOP 6.2 mA; MAC, four 36-
Powerdown 0.3 bit
mA accumulators
Freescale 56F81xx Motor control, Industrial, 16x16 MAC 40 16/32 8, 16, 32 2.5 Stop mode, low-
Semiconductor Consumer power mode

Freescale 56F8300 56F800E DSC 60 24/16 16 3.3 210 mA Wait3 94 mA; 16x16=>36
Semiconductor STOP1 6.2 mA; MAC, four 36-
Powerdown 0.3 bit
mA accumulators

Freescale 56F83xx Motor control, Industrial, 16x16 MAC 60 16/32 8, 16, 32 2.5 Stop mode, low-
Semiconductor Consumer power mode

Freescale 9S12NE64 HCS12 25 16 16 3.3 325 mW Wait, stop,


Semiconductor pseudo stop,
low-voltage
inhibit, auto-
wakeup
Freescale ColdFire MCF520x ColdFire 64, 80 32/16 16, 32, 48 1.5 / 2.5, Stop, clock Hardware
Semiconductor 3.3 divides PLL divide,
bypass Enhanced
distributed MAC
clocking
Freescale ColdFire MCF521x ColdFire 64, 80 external 16, 32, 48 3.3 0.218 W Yes Hardware MAC
Semiconductor

Freescale ColdFire ColdFire 66, 80 16, 32, 48 3.3 Yes Hardware


Semiconductor MCF5222x divide, MAC

Freescale ColdFire ColdFire 66, 80 16, 32, 48 3.3 Yes Hardware


Semiconductor MCF5223x divide,
Enhanced
MAC

Freescale ColdFire MCF523x ColdFire 80 to 150 32/24 16, 32, 48 1.5 / 3.3 Yes Hardware
Semiconductor divide,
Enhanced
MAC
Freescale ColdFire MCF527x ColdFire 100 to 166 32/16 16, 32, 48 1.5 / 3.3 Yes Hardware
Semiconductor (2.5 DDR) divide,
Enhanced
MAC

Freescale ColdFire MCF528x ColdFire 66, 80 32 16, 32, 48 3.3 Yes Hardware
Semiconductor divide,
Enhanced
MAC

Page 55 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to 4-kword Synchronous serial, 16-bit External (Core) (Core)
ROM, two 256- timer,
kword RAM, 32- DMA (hold), two interrupts
kword RAM
Up to 4-kword Synchronous serial, 16-bit External (Core) (Core)
ROM, two 256- timer,
kword RAM, 32- DMA (hold), two interrupts
kword RAM
Up to four 4- Up to 2 QSCI, 2 QSPI, I²C, up 5 priority levels Up to two, eight- 32/48/64 -40 to +105 Up to three interval timers, $2.29 to
channel 16-bit; 6- to 1 CAN (1 software) channel 12-bit; LQFP, 44 QFP -40 to +125 analog comparators, on chip $3.99
channel PWM up to two 12-bit relaxation, PWM fault input
DACs

64-kbyte Flash, 8- QSCI, QSPI, CAN, I2C, 12-bit 12-bit, 12-bit 32/44 LQFP -40 to +125 COP/Watchdog, $2.79 to
kbyte RAM ADC, 6-Output PWM , 16-bit DAC 48/64 LQFP synchronization between PWM $5.39
Timers, External Memory and ADC, DAC, comparators
Interface, Up to 52 GPIO,
System Clock Generator

Up to two 4- 2 SCI, 2 SPI 5 priority levels Up to four, 4- 128/144/160 -40 to +105 4-channel Quadrature decoder; $4.34 to
channel 16-bit; 6- (1 software) channel 12-bit LQFP, 160 on chip relaxation osc.; temp $13.58
channel PWM MAPBGA sensor, PWM fault input and
current sense
512-kbyte Flash, SCI, SPI, 12-bit ADC, Dual 6- 12-bit 48/64 LQFP -40 to +105 COP/Watchdog, $6.19 to
32-kbyte RAM Output PWM Modules, 16-bit 128/144 LQFP synchronization between PWM $15.87
Timers, External Memory 160 LQFP 160 and ADC
Interface, Up to 76 GPIO, MBGA
System Clock Generator
Up to four 4- 2 SCI, 2 SPI, up to 2 CAN 5 priority levels Up to four, 4- 128/144/160 -40 to +105 Up to two 4-channel $5.42 to
channel 16-bit, up (1 software) channel 12-bit LQFP, 160 -40 to +125 Quadrature decoder; on chip $19.63
to two 6-channel MAPBGA relaxation osc.; temp sensor,
PWM PWM fault input and current
sense
512-kbyte Flash, SCI, SPI, CAN, 12-bit ADC, 12-bit 48/64 LQFP -40 to+125 COP/Watchdog, quad decoder, $7.23 to
32-kbyte RAM Dual 6-Output PWM Modules, 128/144 LQFP synchronization between PWM $16.86
16-bit Timers, External 160 LQFP 160 and ADC
Memory Interface, Up to 76 MBGA
GPIO, System Clock
Generator
Four-channel, 16- 10 input, up to 70 GPIO IRQ, XIRQ, 21 Eight-channel, 112 LQFP, -40 to +85 Background debug, single-pin $8 to 50 to
bit sources with 10-bit 80 QFP -40 to +105 interface, hardware $8.80
wakeup breakpoints

8-kbyte Four-channel 32- Three UART, QSPI, I²C, Yes MAPBGA, -40 to +85 Background debug $4.99 to
(configurable) bit with DMA 10/100 Ethernet QFP, LQFP $7.69

Four 32-bit with CAN 2.0B (FlexCAN) with 16 Yes Eight-channel, MAPBGA, -40 to +85 Background debug $4.99 to
DMA, four 16-bit message buffers, QSPI, three 12-bit LQFP $7.69
UART, I²C, GPIO
4-channel, 16- USB OTG Full-Speed, three Yes Eight-channel, 81 MAPBGA, -40 to +85 Real Time Clock, Background $5.49 to
and 32-bit, 4- UARTs, I²C, QSPI, up to 52 12-bit 64/100 LQFP Debug $6.99
channel 16-bit GPIOs
PWM; two
Periodic Interrupt
Timer
4-channel, 16- 10/100 Fast Ethernet, three Yes Eight-channel, 121 MAPBGA, -40 to +85 Ethernet PHY, Optional $7.99 to
and 32-bit, 4- UARTs, I²C, optional CAN 12-bit 80/112 LQFP Encryption, Real Time Clock, $11.32
channel 16-bit 2.0B, up to 73 GPIOs Background Debug
PWM; two
Periodic Interrupt
Timer
8-kbyte Four 32-bit with One or two CAN, Optional Yes QFP, -40 to +85 Optional encryption, $10 to $15
(configurable) DMA, four 16- or 10/100 Ethernet, I²C, three MAPBGA background debug
32-channel eTPU UART, QSPI

8- or 16-kbyte Four 32-bit, four One or two 10/100 Ethernet, Yes MAPBGA, 0 to +70 Optional encryption, $7.50 to
(configurable) programmable I²C, three UART, QSPI, USB QFP -40 to +85 background debug $12.25
interrupt timers,
watchdog

2-kbyte 4-channel, 16- One 10/100 Ethernet, One Yes Eight-channel, 256 MAPBGA -40 to +85 Background Debug $14.66 to
and 32-bit, 4- CAN 2.0B, I²C, three UART, 10-bit $17.45
channel 16-bit QSPI, up to 150 GPIOs
PWM; two
Periodic Interrupt
Timer

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 56


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale ColdFire MCF52xx ColdFire 25 to 140 32/32 or 16 16, 32, 48 1.8 / 3.3 / 5 183 mW Yes Hardware
Semiconductor (MCF5249) divide,
MAC/EMAC

Freescale ColdFire MCF5307 ColdFire 66, 90 32/32 16, 32, 48 3.3 950 mW Hardware
Semiconductor divide, MAC
Freescale ColdFire MCF532x ColdFire 240 32/32 or 16 or 16, 32, 48 1.5 / 3.3 Yes Hardware
Semiconductor 8 divide,
Enhanced
MAC

Freescale ColdFire MCF537x ColdFire 180, 240 32/32 or 16 or 16, 32, 48 1.5 / 3.3 Yes Hardware
Semiconductor 8 divide,
Enhanced
MAC

Freescale ColdFire MCF5407 ColdFire 162, 220 32/32 16, 32, 48 1.8 / 3.3 670 mW Hardware
Semiconductor divide, MAC
Freescale ColdFire MCF548x ColdFire 166, 200, 32/32 16, 32, 48 1.5 / 3.3 Yes Hardware
Semiconductor MCF547x 266 (2.5 DDR) divide,
Enhanced
MAC

Freescale DSP563xx Mobile/wireless, Enhanced filter 150, 200, 24 24 1.6, 1.8 /


Semiconductor Communication/wired, coprocessor 220, 240, 3.3
Audio, Medical, Industrial 275

Freescale Flexis AC HCS08 48 8 2.7 to 5.5 90 mW/150 0.9 uW/1.5 uW


Semiconductor (MC9S08AC) mW (3V/5V) (3V/5V)

Freescale Flexis AC ColdFire 50 8, 16, 32 2.7 to 5.5 180 mW/300 2.4 uW/4.0 mW
Semiconductor (MCF51AC) mW (3V/5V) (3V/5V)

Freescale Flexis JM HCS08 48 8 2.7 to 5.5 90 mW/150 0.9 uW/1.5 uW


Semiconductor (MC9S08JM) mW (3V/5V) (3V/5V)

Freescale Flexis JM ColdFire 50 8, 16, 32 2.7 to 5.5 180 mW/300 2.4 uW/4.0 mW
Semiconductor (MCF51JM) mW (3V/5V) (3V/5V)

Freescale HC08 AS, AZ HC08 8 8 8 5 125 mW Wait, stop


Semiconductor series

Freescale HC08 GP, GT HC08 8 8 8 3 to 5 75 mW Wait, stop, auto-


Semiconductor series wakeup

Freescale HC08 GR, GZ HC08 8 8 8 3.3 to 5 100 mW Wait, stop, auto-


Semiconductor series wakeup

Freescale HC08 GR8 series HC08 8 8 8 3 to 5 75 mW Wait, stop, auto-


Semiconductor wakeup

Freescale HC08 JB series HC08 3, 6 8 8 5 25 mW Wait, stop


Semiconductor

Freescale HC08 JL, JK series HC08 8 8 8 3 to 5 50 mW Wait, stop


Semiconductor

Freescale HC08 LJ, LK series HC08 8 8 8 3.3 to 5 75 mW Wait, stop, auto-


Semiconductor wakeup

Freescale HC08 MR series HC08 8 8 8 5 125 mW Wait


Semiconductor
Freescale HC08 QT/QY HC08 3.2 8 8 3 to 5 30 mW Wait, stop, auto-
Semiconductor series wakeup

Freescale HC08QB HC08 8 8 8 3 to 5 12 mA Wait, stop, auto-


Semiconductor (5V, 8 MHz) wakeup

Page 57 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to 4-kbyte Two to eight 16- FlexCAN, 10/100 Ethernet, up Yes Eight- to 10- QFP, BGA 0 to +70 Background debug, IDE $6.99 to
instruction, or bit, four 32-bit, to two I²C, up to three UART, channel, -40 to +85 interface $17.99
configurable 8- four QSPI, USB, SPDIF, TDM 10- to 12-bit
kbyte programmable
interval

8-kbyte unified Two 16-bit I²C, two UART Yes QFP 0 to +70 Background debug $11.35 to
-40 to +85 $14.95
16-kbyte 4-channel 32-bit, Optional 10/100 Ethernet, Yes 196/256 -40 to +85 SVGA LCD, Optional $10 to $14
2- or 4-channel Optional CAN 2.0B, Full MAPBGA Encryption, High Speed OTG
16-bit PWM; four Speed USB Host & Full- via ULPI Interface, Background
Periodic Interrupt Speed/High-Speed USB OTG, Debug
Timer I²C, three UART, QSPI, up to
97 GPIO
16-kbyte 4-channel 32-bit, One 10/100 Ethernet, Optional Yes 196 MAPBGA, -40 to +85 Optional Encryption, High $11.00 to
4-channel 16-bit Full Speed USB Host & Full- 160 QFP Speed OTG via ULPI Interface, $12.50
PWM, four Speed/High-Speed USB OTG, Background Debug
Periodic Interrupt I²C, three UART, QSPI, up to
Timer 62 GPIO
16/8-kbyte Two 16-bit I²C, UART, USART Yes QFP 0 to +70 Background debug $18.95 to
-40 to +85 $22.95
Yes 32-kbyte Yes Four 32-bit, two I²C, DSPI, UART, USART, four Yes 388 PBGA 0 to +70 Optional encryption, $16.95 to
32-bit slice, PSC, Up to two 10/100 -40 to +85 background debug, pin $26.47
watchdog Ethernet, up to two CAN 2.0B, compatibility
optional USB 2.0 with PHY,
IrDA, modem
3-kbyte 24-, 384-, 576- 8-bit host interface, two four 196 ball -40 to +105 $25 to $43
instruction kbyte channel synchronous serial, MAPBGA
configurable, serial communication, triple
DMA timer module, 34 GPIO

Two 6 channel 16- 2xSCI, 2xSPI, I2C Interrupt 16-channel 10- 80 LQFP, 64 -40 to +85 Internal Clock, Watchdog $2.48
bit, 2 channel 16- Controller bit LQFP, 64 QFP Timer, Cyclic Redundancy
bit Check
Two 6 channel 16- 2xSCI, 2xSPI, I2C, CAN Interrupt 24-channel 12- 80 LQFP, 64 -40 to +105 Comparators, Cyclic $3.64
bit FlexTimer, Controller bit (2.5 us) LQFP, 64 QFP Redundancy Check, Low-
2 channel 16-bit Voltage Detect, Real Time
Clock
6 channel 16-bit, 2xSCI, 2xSPI, I2C, CAN, USB Interrupt 12-channel 12bit 64 QFP, 64 -40 to +85 ICE + BDM, RTC, ACMP, $2.79
2 channel 16-bit OTG, Controller LQFP, 48 MCG, COP, KBI
QFN, 44 LQFP

Two 16-bit timers, 2xSCI, 2xSPI, 2xI2C, CAN, Interrupt 12-channel 12bit 80 LQFP, 64 -40 to +105 CAU, RNGA, COP, ACMP, $3.50
6 channel 16-bit USB OTG, Controller LQFP, 64 DEBUG, LVD, MCG, KBI, CMT
PWM QFP, 44 LQFP

Eight 16-bit, SCI, SPI, CAN, BDLC, up to IRQ, KBI (five 15-channel, 8-bit 52 PLCC, -40 to +85 COP, low-voltage inhibit $4.75 to
PWM 50 GPIO pins) 64 QFP -40 to +105 $6.75
-40 to +125
Four 16-bit, PWM SCI, SPI, up to 33 GPIO IRQ, KBI (eight Eight-channel, 8- 20 DIP, -40 to +85 COP, low-voltage inhibit, high $3.50 to
pins) bit 42 SDIP, current pins $5.50
44 QFP
Four to eight 16- ESCI, SPI, CAN, up to 53 IRQ, KBI (eight Eight to 24- 32/48 LQFP, -40 to +85 COP, low-voltage inhibit, high $3.60 to
bit, PWM GPIO pins) channel, 8-bit 64 QFP -40 to +105 current pins $4.20
-40 to +125
Three 16-bit, SCI, SPI, up to 21 GPIO IRQ, KBI (four Six-channel, 8- 28 DIP, 28 -40 to +85 COP, low-voltage inhibit, high $2.25 to
PWM pins) bit SOIC, 32 -40 to +105 current pins $3.30
LQFP -40 to +125
Two to four 16-bit USB 2.0, SCI, up to 37 GPIO IRQ, KBI (up to 20 DIP, 44 0 to +70 COP, low-voltage inhibit, high $1.90 to
eight pins) QFP, 32 current pins $4.25
LQFP, 20 to 28
SOIC
Two to four 16-bit, SCI, up to 26 GPIO IRQ, KBI (up to 12 to 14- 20 to 28 SOIC, -40 to +85 COP, low voltage inhibit, high $1.25 to
PWM eight pins) channel, 8-bit 20 to 28 DIP, -40 to +125 current pins, RC oscillator $2.25
20 to 28 PDIP, option
32 to 48 LQFP,
32 SDIP

Four 16-bit, PWM SCI with IR, SPI, LCD, up to IRQ, KBI (eight Six-channel, 10- 64/80 QFP, -40 to +85 COP, low-voltage inhibit, high $3.25 to
48 GPIO pins) bit 52/64/80 LQFP current pins $4.90

Six 16-bit, six 12- SCI, SPI, up to 42 GPIO IRQ 10-channel, 10- 64 QFP, -40 to +85 COP, low-voltage inhibit, MC $3.60 to
bit PWM bit 56 SDIP -40 to +105 fault protection $6.45
Two 16-bit, PWM Five to 13 GPIO IRQ, KBI (up to Four-channel, 8 DIP/DFN, -40 to +85 COP, trimmable internal 70 cents to
six pins) 8-bit 16 PDIP, -40 to +105 oscillator, low-voltage inhibit, $1.33
16 TSSOP, -40 to +125 high current pins
8 to 16 SOIC
Four-channel, 16- SPI, ESCI, up to 13 GPIO KBI (eight 10-channel, 10- 16 DIP, 16 -40 to +85 COP, low-voltage inhibit $1.38
bit pins) bit SOIC, 16 -40 to +105
TSSOP -40 to +125

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 58


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale HCS08 AW series HCS08 20 8 8 2.7 to 5.5 73.5 mW Wait, stop2,
Semiconductor stop3, real-time
interrupt

Freescale HCS08 GB, GT HCS08 20 8 8 1.8 to 3.6 54 mW Powerdown: 20


Semiconductor series nA, wait, stop,
real-time
interrupt

Freescale HCS08 QG series HCS08 10 8 8 1.8 to 3.6 11.4 mW Powerdown,


Semiconductor wait, stop, real-
time interrupt

Freescale MAC7100 ARM 40 20/16 16 or 32 2.5 /


Semiconductor 3.3 to 5.0

Freescale MC9S08QE128 HCS08 50 25 1.8 to 3.6 Ultra low power


Semiconductor wait, stop

Freescale MCF51QE128 ColdFire 50 25 1.8 to 3.6 6 mA Ultra low power


Semiconductor wait, stop

Freescale MCF5227x Family ColdFire 166 24/32 8, 16, 32 1.5 / 3.3 300 mW 0.75 mW Hardware
Semiconductor divide,
Enhanced
MAC
Freescale MP8560 Power 667 to 1000 64/64 32 1.2 7.4 W Doze, nap,
Semiconductor PowerQUICC III sleep

Freescale MP8568 Power 800 to 1333 64/64 32 1.2 Doze, nap,


Semiconductor PowerQUICC III sleep
8568, 8567

Freescale MPC5121e Automotive Power 400 32/64 64 1.4 / 3.3 Less than 2 W Doze, Nap,
Semiconductor Sleep, Deep
Sleep,
Hibernation <25
µA

Freescale MPC5200 (760 Automotive Power 266, 400 32 32 1.5 / 3.3 1.4 W Doze, nap,
Semiconductor MIPS) sleep, deep
sleep. 50 mW

Freescale MPC5200B (885 Automotive Power 266, 400, 32 32 1.5 / 3.3 1.5 W Doze, nap,
Semiconductor MIPS) 466 sleep, deep
sleep. 50 mW

Freescale MPC5500 Automotive Power 40, 80, 132 32/32 32 1.5 / 3.3 / SPE (SIMD)
Semiconductor 5.0

Freescale MPC5510 Family Automotive Power 48, 66, 80 32/32 32 5.0 0.8 W multiple stop
Semiconductor (two cores) modes, periodic
wake-up from
internal osc.

Freescale MPC5602S Automotive Power Up to 64 32/32 32 1.2 / 5 multiple stop


Semiconductor modes, periodic
wake-up from
internal osc.

Freescale MPC5604S Automotive Power Up to 64 32/32 32 1.2 / 5 multiple stop


Semiconductor modes, periodic
wake-up from
internal osc.

Page 59 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Eight 16-bit, Two SCI, SPI, I²C, up to 54 IRQ, KBI (up to 16-channel, 10- 64 QFP, 64 -40 to +125 Debug module with two $3.60 to
PWM GPIO eight pins) bit LQFP, 48 comparators and nine trigger $5.20
QFN, 44 LQFP modes, single-pin interface,
background debug, hardware
breakpoint
Eight 16-bit, Two SCI, SPI, I²C, up to 56 IRQ, KBI (up to Eight-channel, 44/64 QFP, -40 to +85 Debug module with two $2.65 to
PWM GPIO eight pins) 10-bit 42 SDIP, comparators and nine trigger $3.95
48 QFN modes, single-pin interface,
background debug, hardware
breakpoint
Two 16-bit, PWM, SCI, SPI, I²C, up to 12 GPIO IRQ, KBI (up to Eight-channel, 16 PDIP, 16 -40 to +85 Debug module with two 99 cents
One 8-bit eight pins) 10-bit, Analog QFN, 16 comparators and nine trigger
Comparator TSSOP, 8 modes, single-pin interface,
DFN, 8 PDIP, background debug, hardware
8 SOIC-NB breakpoint
16-channel Four eSCI with 13-bit break for 32-channel dual 112/144 LQFP, -40 to +125 Nexus IEEE-ISTO 5001-2003 $14.20 to
eMIOS LIN, two DSPI, four CAN, I²C 10-bit (5V) 208 MAPBGA Class 2, PLL $20.87

16-bit; 6-channel, 2 SCI, 2 I²C, 2 SPI 24 channel; 12- 80 LQFP, 64 -40 to +85 Internal Clock Source, 70 $3.59
two 3-channel bit ADC LQFP GPIO, Low power 32 kHz
oscillator
16-bit; 6-channel, 2 SCI, 2 I²C, 2 SPI 24 channel; 12- 80 LQFP, 64 -40 to +85 Internal Clock Source, 70 $3.80
two 3-channel bit ADC LQFP GPIO, Low power 32 kHz
oscillator
8-kbyte Four 32-bit, 4 LCD Controller, Full speed/low 3 external 8-channel 12bit 196 MAPBGA -40 to +85 BDM, JTAG, RTC and $7.50
(configurable) PWM speed USB OTG, FlexCAN, interrupts / touchscreen 176 LQFP watchdog timers
SSI, I2C, 3 UART, DSPI interrupt controller
controller
Yes 32-kbyte, L2: 64-entry TLB, four- Four 16-bit or two Two 10/100/1000 and three 16 783 FCBGA -40 to +105 e500 core, hardware Starts at
256-kbyte way set- 32-bit, realtime 10/100 Ethernet, ATM, programmable, (junction) coherency, time slot assigner, $81
unified associative, L2: transparent; two 128 -channel 16 levels, 12 eight TDM interfaces,
16-entry TLB, of HDLC or transparent; four external, 4 transmission convergence
fully associative, serial for Ethernet, HDLC, message, 22 layer for ATM, IMA, four baud
256-entry TLB, UART, BISYNC, transparent; other internal rate generators, debug
two-way set- I²C, SPI, PCI/PCI-X, local bus, sources interface
associative RapidIO, Local Bus PCI/PCI-
X, 8 (RapidIO)

Yes 32-kbyte, L2: 64-entry TLB, four- Four 16-bit or two Two enhanced 10/100/1000 16 1023 FCBGA 0 to +105 e500 core, hardware Starts at
512-Kbyte way set- 32-bit Ethernet. QUICC Engine programmable, -40 to +105 coherency, security engine $99
unified associative, L2: supporting Eight 10/100, three 16 levels, 12 (junction) (Ipsec, SSL, XOR), Table
256-entry TLB, 10/100/1000, two UTOPIA for external, 4 Lookup Unit (TLU)
two-way set- ATM/POS, eight TDM, 2xSPI, message, 22
associative, 16- 32-bit PCI. DUART, Dual I²C, other internal
entry TLB, fully 32-bit PCI, PCI-Express, local sources
associative bus, GPIO, SRIO, Local Bus

Yes 32-kbyte, eight- 64-entry 8/8 PSC (UART, SPI, AC97, I²S, Yes TePBGA -40 to +125 Integrated audio acceleration
way set- instruction and multi-ch audio), I²C, CAN, 27x27mm, junction core and PowerVR MBX/VGP
associative data TLB, two- J1850, SPDIF, Ethernet, PCI- 1mm pitch 3D graphics core.
way set 2.3, USB2.0 OTG, SATA,
associative PATA, MMC/SD/SDIO, NAND
Flash, LCD Display
Double- 16-kbyte, four- 64-entry TLB, two- Eight Flash/RAM/ROM, two USB, Standard and 272 TEPBGA 0 to +70 PCI, ATA/IDE
precision way set- way set 10/100 baseT, six PSC, two critical, four -40 to +85
associative associative CAN, J1850, two I²C, I²S, SPI, external
up to 56 GPIO
Double- 16-kbyte, four- 64-entry TLB, two- Eight Flash/RAM/ROM, two USB, Standard and 272 TEPBGA 0 to +70 PCI, ATA/IDE $16.19 to
precision way set- way set 10/100 baseT, six PSC, two critical, four -40 to +85 $17.61
associative associative CAN, J1850, two I²C, I²S, SPI, external -40 to +105
up to 56 GPIO
Yes Up to 32-kbyte Yes 24-channel Up to two eSCI, up to four Yes 40-channel dual 324/416 -40 to +125 Nexus IEEE-ISTO 5001-2003 $19.99 to
unified eMIOS, up to 64 DSPI, up to five CAN, Ethernet 12-bit (5V) TePBGA, 208 Class 3+, FM-PLL $119.97
channel eTPU Map BGA
(programmable)

MMU, MPU 24-channel Up to 8 eSCI (with LIN master Yes 40-channel 12-- 144LQFP, 0 to +85 Nexus 2+ $15 to $40
eMIOS protocol capability) bit QADC 176LQFP, 0 to +105
208MAPBGA 0 to +125

MPU Various CAN, two SCI, two SPI, two Yes 16-channel 10bit -40 to +85 Instrumentation Gauge driver.
I2C 100 LQFP, 144 -40 to +105 LCD driver. Sound Generator.
LQFP

MPU Various CAN, two SCI, two SPI, two Yes 16-channel 10bit -40 to +85 Instrumentation Gauge driver.
I2C 100 LQFP, 144 -40 to +105 LCD driver. Sound Generator.
LQFP

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 60


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale MPC5606S Automotive Power Up to 64 32/32 32 1.2 / 5 multiple stop
Semiconductor modes, periodic
wake-up from
internal osc.

Freescale MPC560xB Automotive Power Up to 64 32/32 32 1.2 / 5 0.6 W multiple stop


Semiconductor modes, periodic
wake-up from
internal osc.

Freescale MPC560xP Automotive Power 60 32/32 32 1.5 / 3.3 / 250 mW Wait, stop, real-
Semiconductor 5.0 time interrupt

Freescale MPC563xM Automotive Power 40, 60, 80 32/32 32 5 SPE (SIMD)


Semiconductor

Freescale MPC603 Power 200, 266, 32/64 64 2.5 / 3.3 4.0 W/6.1 W Doze, stop
Semiconductor 300 (300 MHz)

Freescale MPC7447A Power 600, 733, 36/65 64 1.3 / 2.5 21 W/30 W Nap, sleep,
Semiconductor 867, 1000, (1420 MHz) deep sleep
1167, 1267,
1333, 1420

Freescale MPC7448 Power 600 to 1700 36/64 32 1.0 to 1.3 / 21 W Nap, sleep, 128-bit AltiVec
Semiconductor 1.8, 2.5, 3.3 deep sleep vector
processor

Freescale MPC8245 Power 266, 300, 64 32 1.8 / 2 2.8 W Doze, stop


Semiconductor PowerQUICC 333, 350,
400
Freescale MPC8260 Power 266, 300 64 32 1.8 to 2.2 2.4 W Doze, stop
Semiconductor PowerQUICC II
8260, 8250, 8255,
8264, 8265, 8266

Freescale MPC8272 Power 266, 300, 64 32 1.5 1.3 W Doze, stop


Semiconductor PowerQUICC II 400
8272, 8271, 8248,
8247

Freescale MPC8280 Power 266, 333, 64 32 1.5 1.55 W Doze, stop


Semiconductor PowerQUICC II 450
8280, 8275, 8270

Freescale MPC8313 Power 266, 333, 32/64 32 1.0 / 3.3 1.02 W Sleep, doze,
Semiconductor PowerQUICC II Pro 400 power-down

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU Various Two CAN, two SCI, three SPI, Yes 16-channel 10bit -40 to +85 TFT Display driver.
four I2C 144 LQFP, 176 -40 to +105 Instrumentation Gauge driver.
LQFP LCD driver. Sound Generator.

MPU 56-channel Yes 36-channel, 10- 100LQFP, 144 -40 to +85 Nexus 2+ $15 to $40
eMIOS bit LQFP -40 to +105
-40 to +125

12-channel, 8 two SCI, four SPI, two CAN, Up to 26- 100/144 LQFP -40 to +125 Nexus debug mode, hardware
PWM optional dual channel Flexray channel 10-bit, 1 single step/breakpoint
us conversion
time
Yes Up to 16 channel two eSCI, two DSPI, two CAN, Yes 32-channel dual 100 LQFP, 144 -40 to +125 IEEE-ISTO 5001-2003 $15
eMIOS, 32 12-bit (5V) LQFP, 176 standard Class 2+ (eTPU2
channel eTPU LQFP, 208 Class 1)
(programable) MAPBGA

Yes 16-kbyte, four- 64-entry TLB, two- CBGA, PBGA 0 to +105 Starts at
way set- way set $25
associative associative
Yes 32-kbyte, eight- 128-entry TLB, HiTCE 0 to +105 AltiVec Starts at
way set- two-way set $45
associative associative

IEEE 754- 32-kbyte, eight- 128-entry TLB, HCTE -40 to +105 AltiVec Starts at
1985 single way set- two-way set $45
and double associative, associative
precision L2: 1-Mbyte
eight-way set
associative
with ECC

Yes 16-kbyte, four- 64-entry TLB, two- Four 16-bit or two I²C, SPI, PCI, local bus 352 TBGA 0 to +105 Starts at
way set- way set 32-bit -40 to +105 $23
associative associative (junction)
Yes 16-kbyte, four- 64-entry TLB, two- Four 16-bit or two Three controllers for ATM, Eight IRQ, 24 480 TBGA 0 to +105 Timeslot assigner, eight TDM Starts at
way set- way set 32-bit, realtime 10/100 Ethernet, or external -40 to +105 interfaces, transmission $33
associative associative transparent; I²C, two 128- sources (junction) convergence layer for ATM,
channel transparent or HDLC IMA, parallel I/O, eight baud
controllers; four controllers for rate generators, debug
Ethernet, UTOPIA, HDLC, interface
UART, transparent, or BiSync;
two UART or transparent -
channel, SPI, PCI, local bus

Yes 16-kbyte, four- 64-entry TLB, two- Four 16-bit or two Two controllers for ATM, Eight IRQ, 24 516 PBGA 0 to +105 Integrated security engine Starts at
way set- way set 32-bit, realtime 10/100 Ethernet, or external -40 to +105 (IPsec, SSL, etc), timeslot $17
associative associative transparent; I²C, SPI, PCI, sources (junction) assigner, two TDM interfaces
three controllers for HDLC, supporting 64 HDLC channels,
UART, transparent, BiSync, or eight baud rate generators,
QMC; USB, two serial debug interface
transparent or UART -channel

Yes 16-kbyte, four- 64-entry TLB, two- Four 16-bit or two Three controllers for ATM, Eight IRQ, 24 480 TBGA, 0 to +105 Timeslot assigner, eight TDM Starts at
way set- way set 32-bit, realtime 10/100 Ethernet, or external 516 PBGA -40 to +105 interfaces, transmission $67
associative associative transparent; two 128 channels sources (junction) convergence layer for ATM,
of transparent or HDLC; four IMA, eight baud rate
serial for Ethernet, HDLC, generators, debug interface
UART, BiSync, transparent;
two serial for transparent or
UART, I²C, SPI, PCI, local
bus, USB

Yes 16-kbyte 64-entry TLB, two- periodic interrupt 2 10/100/1000 Ethernet, Hi- 5 external 516 TEPBGAII 0 to +105 Security engine (IPsec, SSL), Starts
way set timer, real time Speed USB, dual 32- interrupts, -40 to +105 64 multiplexed PIO, debug $13.50
associative clock, software bit/66MHz PCI, 32-bit Local internal (junction) interface, Ethernet featuring
watchdog timer, Bus, DUART, dual I²C, SPI, sources IEEE 1588 and SGMII mode
and two general-
purpose timer
blocks

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 62


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale MPC8315 Power 266, 333, 32/64 32 1.0 / 3.3 1.16 W Sleep, doze,
Semiconductor PowerQUICC II Pro 400 power-down
8315, 8314

Freescale MPC8323E Power 266, 333 64 32 1.0 2.0 W Nap, doze,


Semiconductor PowerQUICC II Pro sleep
8323E, 8323,
8321E, 8321

Freescale MPC8349E Power 266, 400, 64 32 1.2 to 1.3 4.5 W Nap, doze,
Semiconductor PowerQUICC II Pro 533, 667 sleep
8349E, 8347E,
8343E

Freescale MPC8360E Power 266, 400, 64 32 1.2 to 1.3 / 7.0 W (1.3V) Nap, doze,
Semiconductor PowerQUICC II Pro 533, 667 3.3 sleep
8360E, 8358E (2.5 DDR1)
(1.8 DDR2)

Freescale MPC837xE Power 400, 533, 64 32 3.5 W Nap, doze,


Semiconductor PowerQUICC II Pro 667 sleep
8379E, 8378E,
8377E

Freescale MPC8536 Power 600 to 32 1.0 or 1.1 6.7 W Doze, Nap,


Semiconductor PowerQUICC III 1.5GHz Sleep modes for
dynamic power
management

Freescale MPC8540 Power 667 to 1000 64/64 32 1.2 7.4 W Doze, nap,
Semiconductor PowerQUICC III sleep

Freescale MPC8541 Power 533 to 1000 32 32 1.2 5.4 W Doze, nap,


Semiconductor PowerQUICC III sleep

Freescale MPC8548 Power 800 to 1333 64/64 32 1.2 Doze, nap,


Semiconductor PowerQUICC III sleep
8548, 8547, 8545,
8543

Freescale MPC8555 Power 533 to 1000 32 32 1.2 5.4 W Doze, nap,


Semiconductor PowerQUICC III sleep

Freescale MPC8572 Dual Power 1067 to 64/64 32 1.1, 1.8, 17.3 W Doze, nap,
Semiconductor Core PowerQUICC 1500 1.5, 3.3. 2.5 sleep
III

Page 63 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 16-kbyte 64-entry TLB, two- periodic interrupt Up to 2 10/100/1000 Ethernet, 5 external 620 TEPBGAII 0 to +105 Security engine (IPsec, SSL), Starts
way set timer, real time Hi-Speed USB, dual 32- interrupts, -40 to +105 64 multiplexed PIO, debug $17.50
associative clock, software bit/66MHz PCI, 32-bit Local internal (junction) interface, TDM, Ethernet
watchdog timer, Bus, DUART, dual I²C, SPI, up sources featuring IEEE 1588 and SGMII
and two general- to 2 SATA controlelrs, 2 x1 mode
purpose timer PCI Express
blocks

16-kbyte, four- 64-entry TLB, two- Four 16-bit or two Up to three 10/100 Ethernet, Eight IRQ 516 PBGA 0 to +105 Security engine (IPSec, Starts at
way set- way set 32-bit, realtime up to four TDM, UTOPIA, USB (junction) SSL/TLS, SRTP, and 802.11i) $13
associative associative 2.0 (full/low speed), 32-bit PCI
with parity (up to 66MHz), 16-bit Local
Bus (up to 66MHz), DUART,
I²C, (2) SPI

Yes 32-kbyte, eight- 64-entry TLB, two- Eight 16-bit or Two 10/100/1000 Ethernet, Eight IRQ, 35 620 PBGA, 0 to +105 Security engine (IPsec, SSL), Starts at
way set- way set four 32-bit or two dual Hi-Speed USB, dual 32- external 672 TBGA -40 to +105 64 multiplexed PIO, debug $21
associative associative 64-bit, realtime bit/66MHz PCI, 32-bit Local sources (junction) interface
with parity Bus, DUART, dual I²C, SPI

Yes 32-kbyte, eight- 64-entry TLB, two- Eight 16-bit or Eight 10/100, two Eight IRQ 668 PBGA, 0 to +105 Security engine (IPsec, SSL), Starts at
way set- way set four 32-bit or two 10/100/1000, two UTOPIA for 740 TBGA -40 to +105 IEEE1588 time synchronization $27
associative associative 64-bit, realtime ATM/POS, eight TDM, USB, (junction) protocol
with parity and 2xSPI; single 32-bit PCI,
dual I²C, DUART, Local Bus

Yes 32-kbyte, eight- 64-entry TLB, two- Two 10/100/1000 Ethernet, Hi- 689 TePBGA 0 to +125 Security engine (IPsec, SSL), Starts at
way set- way set Speed USB, dual 32- -40 to +125 64 multiplexed PIO, debug $27
associative associative bit/66MHz PCI, 32-bit Local (junction) interface
with parity Bus, DUART, dual I²C, SPI, up
to 4 SATA controlelrs, 2 x1
PCI Express

Double 32-kbtye 4-kbyte to 4- watchdog timer, 2 Gb Ethernet controllers 12 external, 4 64-bit dual 783 FC PBGA 0 to +105 Advanced Power Management Starts at
precision Gbyte page sizes. performance  (SGMII, RGMII, RTB, MII), message with address cycle $63
monitor timers, SPI, 2x I2C, DUART, PCI, 32-bit (DAC) support
Four global high triple PCIe, dual SATA messages
resolution timers

Yes 32-kbyte, L2: 64-entry TLB, four- Four 16-bit or two Two 10/100/1000 Ethernet, 16 783 FCBGA -40 to +105 e500 core, hardware Starts at
256-kbyte way set- 32-bit, realtime two 10/100 Ethernet, DUART, programmable, (junction) coherency, four baud rate $85
unified associative, L2: Local Bus PCI/PCI-X), 8 16 levels, 12 generators, debug interface
16-entry TLB, (RapidIO) external, 4
fully associative, message, 22
256-entry TLB, other internal
two-way set- sources
associative

Yes 32-kbyte, L2: 64-entry TLB, four- Four 16-bit or two Two 10/100 and two 16 783 FCBGA -40 to +105 e500 core, hardware Starts at
256-kbyte way set- 32-bit, realtime 10/100/1000 Ethernet, ATM, programmable, (junction) coherency, security engine $66
unified associative, L2: transparent; QMCl; USB, three 16 levels, 12 (IPsec, SSL), time slot
256-entry TLB, serial for UART, BISYNC, external, 4 assigner, three TDM interfaces,
two-way set- HDLC, transparent; two serial message, 22 four baud rate generators,
associative, 16- for UART; I²C, SPI, Local Bus other internal debug interface
entry TLB, fully PCI, 32/64 (PCI) sources
associative
Yes 32-kbyte, L2: 64-entry TLB, four- Four 16-bit or two Four 10/100/1000 Ethernet, 16 783 FCBGA -40 to +105 e500 core, hardware Starts at
512-Kbyte way set- 32-bit DUART, Dual I²C, two 32-bit programmable, (junction) coherency, security engine $62
unified associative, L2: PCI, PCI-Express, local bus, 16 levels, 12 (Ipsec, SSL, XOR)
256-entry TLB, GPIO, 10/100 Ethernet, SRIO, external, 4
two-way set- Local Bus PCI/PCI-X, 8 message, 22
associative, 16- (RapidIO) other internal
entry TLB, fully sources
associative
Yes 32-kbyte, L2: 64-entry TLB, four- Four 16-bit or two Two 10/100 and two 16 783 FCBGA -40 to +105 e500 core, hardware Starts at
256-kbyte way set- 32-bit, realtime 10/100/1000 Ethernet, ATM, programmable, (junction) coherency, security engine $94
unified associative, L2: transparent; QMCl; USB, three 16 levels, 12 (IPsec, SSL), time slot
256-entry TLB, serial for Ethernet, HDLC, external, 4 assigner, three TDM interfaces,
two-way set- UART, BISYNC, transparent; message, 22 four baud rate generators,
associative, 16- two serial for UART; I²C, SPI, other internal debug interface
entry TLB, fully Local Bus PCI, 32/64 (PCI) sources
associative
Yes 32-kbyte, L2: 1 64-entry TLB, four- Eight 32-bit timers Four 10/100/1000 Ethernet 16 levels, 12 1023 FC- 0 to +125 e500 core, hardware Starts at
Mbyte unified way set- with SGMII, one 10/100 external, 16 PBGA -40 to +125 coherency, security engine $157
shared associative, L2: Ethernet, local bus, x8 SerDes message, 8 (junction) (Ipsec, SSL, XOR), pattern
between cores 256-entry TLB, for 3 PCI Express or one inter- matching engine, table lookup
two-way set- SRIO, processor, 64 engine
associative, 16- other internal
entry TLB, fully sources
associative (per
core)

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 64


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale MPC8610 Power 667 to 1333 36/64 (internal) 32 1.0 / 1.25; 10 W Nap, sleep 128-bit Altivec
Semiconductor 1.8 / 2.5 / vector
3.3 processor (per
core)

Freescale MPC862 Power 50, 66, 80, 32 32 3.3 / 5 1.35 W Sleep, doze, 16x16 MAC
Semiconductor PowerQUICC I 100 power-down
862P, 862T, 857T,
857DSL

Freescale MPC8640 Power 1000 to 36/64 (internal) 32 0.95 / 1.05 / 13.0 W Nap, sleep 128-bit Altivec
Semiconductor 1250 1.1; 1.8 / vector
2.5 / 3.3 processor

Freescale MPC8640D Power 1000 to 36/64 (internal) 32 0.95 / 1.05 / 21 W Nap, sleep 128-bit Altivec
Semiconductor 1250 1.1; 1.8 / vector
two cores 2.5 / 3.3 processor (per
core)

Freescale MPC8641 Power 1000 to 36/64 (internal) 32 0.95 / 1.05 / 16.3 W Nap, sleep 128-bit Altivec
Semiconductor 1333 1.1; 1.8 / vector
2.5 / 3.3 processor

Freescale MPC8641D Power 1000 to 36/64 (internal) 32 0.95 / 1.05 / 32.1 W Nap, sleep 128-bit Altivec
Semiconductor 1500 1.1; 1.8 / vector
two cores 2.5 / 3.3 processor (per
core)

Freescale MPC866 Power 50, 66, 80, 32 32 1.8 / 3.3 0.26 W Normal low 16x16 MAC
Semiconductor PowerQUICC I 100, 133
866P, 866T, 852T,
859T, 859DSL

Freescale MPC885 Power 66, 80, 133 32 32 1.8 / 3.3 0.43 W Normal low 16x16 MAC
Semiconductor PowerQUICC I
885, 880, 875, 870

Freescale MSC711x Communication/wired, 300 14/8, 16, 32 16 1.2 / 2.5 to


Semiconductor Security, General 3.3
purpose

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
IEEE 754- 32-kbyte eight- Separate 128- Watch dog and 2- 32-bit local bus; DUART, 2 12 external, 48 Flip Chip - 0 to +105 x8 and x4 PCI Express; LCD Starts at
1985 single way set- entry TLB for global timers I2S/AC97 audio ports, 2 - internal, Plastic BGA, -40 to +105 Controller, PCI 2.2 , $75
and double associative instruction and Fast/Serial IrDa channels., interprocess 29x29mm, 783
precision (per core), L2: data (per core), and messaging pin, in either
(per core) 1-Mbyte eight- hardware reload, lead or lead-
way set- two-way set free.
associative associative; 8
with ECC block address
translations for
both instruction
and data
4- to 16-kbyte 32-entry TLB, Four 16-bit or two 10/100 Ethernet, four serial for Eight IRQ, 12 357 PBGA 0 to +105 Timeslot assigner, four baud Starts at
instruction, 4- fully associative 32-bit Ethernet, UTOPIA, HDLC, port pins, 23 -40 to +115 rate generators, debug $18
to 8-kbyte data Async HDLC, UART, BiSync, internal (junction) interface
transparent; two serial for sources
UART, transparent; I²C, SPI,
PCMCIA

IEEE 754- 32-kbyte, eight- Separate 128- 8 global 32-bit local bus; DUART 12 external, 48 HiTCE, 0 to +105 Dual x8 PCI Express; Quad Starts at
1985 single way set- entry TLB for internal 33x33mm, -40 to +105 10/100/1000 Ethernet $125
and double associative, instruction and 1023 pin, in controllers with TCP/UPD
precision L2: 1-Mbyte data, hardware either lead or offload and qualify of service
eight-way set reload, two-way lead-free. features.
associative set associative; 8
with ECC block address
translations for
both instruction
and data
IEEE 754- 32-kbyte eight- Separate 128- 8 global 32-bit local bus; DUART 12 external, 48 HiTCE, 0 to +105 Dual core; Dual x8 PCI Starts at
1985 single way set- entry TLB for internal, 33x33mm, -40 to +105 Express; Quad 10/100/1000 $95
and double associative instruction and interprocess 1023 pin, in Ethernet controllers with
precision (per core), L2: data (per core), and messaging either lead or TCP/UPD offload and qualify of
(per core) 1-Mbyte eight- hardware reload, lead-free. service features
way set- two-way set
associative associative; 8
with ECC block address
translations for
both instruction
and data
IEEE 754- 32-kbyte, eight- Separate 128- 8 global 32-bit local bus; DUART 12 external, 48 HiTCE, 0 to +105 Dual x8 PCI Express; Quad Starts at
1985 single way set- entry TLB for internal 33x33mm, -40 to +105 10/100/1000 Ethernet $237
and double associative, instruction and 1023 pin, in controllers with TCP/UPD
precision L2: 1-Mbyte data, hardware either lead or offload and qualify of service
eight-way set reload, two-way lead-free. features.
associative set associative; 8
with ECC block address
translations for
both instruction
and data
IEEE 754- 32-kbyte eight- Separate 128- 8 global 32-bit local bus; DUART 12 external, 48 HiTCE, 0 to +105 Dual core; Dual x8 PCI Starts at
1985 single way set- entry TLB for internal, 33x33mm, Express; Quad 10/100/1000 $264
and double associative instruction and interprocess 1023 pin, in Ethernet controllers with
precision (per core), L2: data (per core), and messaging either lead or TCP/UPD offload and qualify of
(per core) 1-Mbyte eight- hardware reload, lead-free. service features
way set- two-way set
associative associative; 8
with ECC block address
translations for
both instruction
and data
4- to 16-kbyte 32-entry TLB, Four 16-bit or two 10/100 Ethernet, four serial for Eight IRQ, 12 256/357 PBGA 0 to +95 Timeslot assigner, four baud Starts at $7
/ 4- to 8-kbyte fully associative 32-bit Ethernet, UTOPIA, HDLC, port pins, 23 -40 to +100 rate generators, debug
Async HDLC, UART, BiSync, internal (junction) interface
transparent; two serial for sources
UART, transparent; I²C, SPI,
PCMCIA

8-kbyte 32-entry TLB, Four 16-bit or two USB, two 10/100 Ethernet, Six IRQ, 12 256/357 PBGA 0 to +95 Security engine (IPsec, SSL), Starts at $7
fully associative 32-bit three serial for Ethernet, port pins, 23 -40 to +100 time slot assigner, four baud
UTOPIA, HDLC, Async HDLC, internal (junction) rate generators, debug
UART, BiSync, transparent; sources interface
two serial for UART,
transparent; I²C, SPI, PCMCIA

16-kbyte, 16- 8-kbyte boot HDI-16 host port, DDR 400 ball -40 to +125 fieldBIST hardware diagnostics $33 to $38
way instruction ROM, 192-, 224- controller, as many as three MAPBGA
kbyte M1, up to TDM (128-channel/port),
192-kbyte M2 10/100 Ethernet MAC
(optional), UART, I2C, GPIO,
timers, event port

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 66


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale MSC7120 Communication/wired Dedicated 178 (DSP)/ 26/8,16 16 (DSP), 1, 1.8 / 2.5, 1.8 W
Semiconductor packet 266 (Power 32 (e300) 3.3
forwarding processor)
engine

Freescale MSC8122 Communication/wired, Four DSP 300, 400, 32/64 16 1.1, 1.2 /
Semiconductor Imaging and video, cores 500 3.3
Military/aerospace

Freescale MSC8126 Communication/wired, Turbo and 400, 500 32/64 16 1.1, 1.2 /
Semiconductor Imaging and video, Viterbi, four 3.3
Military/aerospace DSP cores

Freescale MSC8144 Communication/wired, Four DSP 800, 1000 32/32 16 1.0 / 1.0,
Semiconductor Mobile/wireless cores 1.25, 1.8,
2.5, 3.3

Freescale MSC8144E Communication/wired, Four DSP 800, 1000 32/32 16 1.0 / 1.0,
Semiconductor Mobile/wireless cores, Security 1.25, 1.8,
Coprocessor 2.5, 3.3

Freescale MSC8144EC Communication/wired, Four DSP 800, 1000 32/32 16 1.0 / 1.0,
Semiconductor Mobile/wireless Cores, 1.25, 1.8,
Security 2.5, 3.3
Coprocessor

Freescale MSC8156 Mobile/wireless MAPLE Block StarCore Six DSP


Semiconductor (supports cores
hardware running at
acceleration 1GHz each
for Turbo and
Viterbi channel
decoding and
for DFT/iDFT
and FFT/iFFT
algorithms)

Freescale QorIQ P1, dual Power 533 to 800 64/64 32 Doze, nap,
Semiconductor core P1020 sleep

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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-kbyte 16 128-kbyte M1 DDR controller, local bus 456 ball 0 to +85 $19.5
way instruction (DSP), 8-kbyte controller, Gigabit passive TEPBGAII (Ambient)
(DSP)/ 16- M2 (DSP) optical network media access
kbyte 8 way controller, optical module
instruction, 16- interface, dual three-speed
kbyte 8 way ethenet controllers (GMII,
data (e300) RGMII, MII, FIFO8), dual
UART, I2C, SPI

16-kbyte, 16- 1.436-Mbyte 16 ALUs, system-integration 431 ball 0 to +90, $96 to $106
way instruction unified program unit, 32/64-bit direct slave FCPBGA -40 to +105
(each core) and data, 32- interface, 1024 channel TDM
channel DMA interface, UART, 32 timers, 32
GPIO, I2C, Ethernet support
for MII, RMII, and SMII

16-kbyte, 16- 1.436-Mbyte 16 ALUs, system integration 431 ball 0 to +90, $111 to
way instruction unified program unit, 32/64-bit direct slave FCPBGA -40 to +105 $128
(each core) and data, 32 interface, 1024 channel TDM
channel DMA interface, UART, 32 timers, 32
GPIO, I2C, Ethernet support
for MII, RMII, and SMII

128-kbyte 8- 512-kbyte M2, 10- 16 ALUs, memory 783 ball -40 to +105 $170 to
way L2 Mbyte M3, 16 management unit, DDR1/2 FCPBGA $210
instruction, 64- bidirectional controller, 2048 channel TDM
kbyte 8-way channel DMA interface, UART 16 timers, 32
L1 instruction, GPIOs, I2C, dual Ethernet for
128-kbyte 8- MII/RMII/SMII/RGMII/SGMII,
way L1 data ATM, serial RapidIO
controller, PCI controller, SPI

128-kbyte 8- 512-kbyte M2, 10- 16 ALUs, memory 783 ball -40 to +105 $178 to
way L2 Mbyte M3, 16 management unit, DDR1/2 FCPBGA $204
instruction, 64- bidirectional controller, 2048 channel TDM
kbyte 8-way channel DMA interface, UART 16 timers, 32
L1 instruction, GPIOs, I2C, dual Ethernet for
128-kbyte 8- MII/RMII/SMII/RGMII/SGMII,
way L1 data ATM, serial RapidIO
controller, PCI controller, SPI

128-kbyte 8- 512-kbyte M2, 10- 16 ALUs, memory 783 ball -40 to +105
way L2 Mbyte M3, 16 management unit, DDR1/2 FCPBGA
instruction, 64- bidirectional controller, 2048 channel TDM
kbyte 8-way channel DMA interface, UART 16 timers, 32
L1 instruction, GPIOs, I2C, dual Ethernet for
128-kbyte 8- MII/RMII/SMII/RGMII/SGMII,
way L1 data ATM, serial RapidIO
controller, PCI controller, SPI,
code protection unit

two RapidIO interfaces, two


Gigabit Ethernet interfaces for
network communications, a
PCI Express controller, two
DDR controllers for high-
speed, industry standard
memory interface and four
multi-channel TDM interfaces.

Yes 32-kbyte, L2: 64-entry TLB, four- Eight 32-bit timers Three 10/100/1000 with 16 levels, 12 689-in 0 to +125 e500 core, hardware
512kB unified way set- SGMII, x4 SerDes for 2 PCI external, 16 wirebond -40 to +125 coherency, security engine
shared associative, L2: Express, 2 SRIO, and 2 message, 8 TEPBGA2 (junction) (Ipsec, SSL, XOR)
between cores 256-entry TLB, SGMII; 2 USB2.0; local bus; inter-
two-way set- SPI processor, 64
associative, 16- other internal
entry TLB, fully sources
associative (per
core)

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 68


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale QorIQ P1, single Power 400 to 667 64/64 32 Doze, nap,
Semiconductor core P1010 sleep

Freescale QorIQ P1, single Power 533 to 800 64/64 32 Doze, nap,
Semiconductor core P1011 sleep

Freescale QorIQ P2, dual Power 800 to 1200 64/64 32 Doze, nap,
Semiconductor core P2020 sleep

Freescale QorIQ P2, single Power 800 to 1200 64/64 32 Doze, nap,
Semiconductor core P2010 sleep

Freescale QorIQ P3041 Communication/wired Power Four cores 32 Less than 12


Semiconductor at 1.5 GHz W

Freescale QorIQ P4, eight RegEx pattern Power 1200 to 36/128 Internal 32 0.9, 1.0, 1.1 24 W Sleeep, Nap,
Semiconductor core P4080 matching 1500 CoreNet / 1.8, 2.5, Doze, fine-
eight cores 3.3 grained static
power
management,
dynamic
changes to CPU
operating
frequencies and
voltages

Freescale QorIQ P5, 1 or 2 Communication/wired, Power 2.2 GHz 64 Less than 30


Semiconductor core (P5010 and Military/aerospace W
P5020)
Freescale RS08 KA series RS08 10 8 8 1.8 to 5.5 28 mW Wait, stop, real-
Semiconductor time interrupt

Freescale S12P Automotive S12 32 16 16 5 Wait, stop,


Semiconductor pseudo stop,
low-voltage
inhibit, auto-
wakeup,
Asyncronous
Periodic
Interrupt
Freescale S12XD Automotive S12X 40 16 16 5 Wait, stop,
Semiconductor pseudo stop,
low-voltage
inhibit, auto-
wakeup

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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 32-kbyte, L2: 64-entry TLB, four- Eight 32-bit timers Three 10/100/1000 with 16 levels, 12 689-in 0 to +125 e500 core, hardware
512kB unified way set- SGMII, x4 SerDes for 2 PCI external, 16 wirebond -40 to +125 coherency, security engine
shared associative, L2: Express, 2 SRIO, and 2 message, 64 TEPBGA2 (junction) (Ipsec, SSL, XOR)
between cores 256-entry TLB, SGMII; 2 USB2.0; local bus; other internal
two-way set- SPI sources
associative, 16-
entry TLB, fully
associative
Yes 32-kbyte, L2: 64-entry TLB, four- Eight 32-bit timers Three 10/100/1000 with 16 levels, 12 689-in 0 to +125 e500 core, hardware
512kB unified way set- SGMII, x4 SerDes for 2 PCI external, 16 wirebond -40 to +125 coherency, security engine
shared associative, L2: Express, 2 SRIO, and 2 message, 64 TEPBGA2 (junction) (Ipsec, SSL, XOR)
between cores 256-entry TLB, SGMII; 2 USB2.0; local bus; other internal
two-way set- SPI sources
associative, 16-
entry TLB, fully
associative
Yes 32-kbyte, L2: 64-entry TLB, four- Eight 32-bit timers Three 10/100/1000 with 16 levels, 12 689-in 0 to +125 e500 core, hardware
512kB unified way set- SGMII, x4 SerDes for 3 PCI external, 16 wirebond -40 to +125 coherency, security engine
shared associative, L2: Express, 2 SRIO, and 2 message, 8 TEPBGA2 (junction) (Ipsec, SSL, XOR)
between cores 256-entry TLB, SGMII; USB2.0; local bus; SPI interprocessor,
two-way set- 64 other
associative, 16- internal
entry TLB, fully sources
associative (per
core)
Yes 32-kbyte, L2: 64-entry TLB, four- Eight 32-bit timers Three 10/100/1000 with 16 levels, 12 689-in 0 to +125 e500 core, hardware
512kB unified way set- SGMII, x4 SerDes for 3 PCI external, 16 wirebond -40 to +125 coherency, security engine
shared associative, L2: Express, 2 SRIO, and 2 message, 64 TEPBGA2 (junction) (Ipsec, SSL, XOR)
between cores 256-entry TLB, SGMII; USB2.0; local bus; SPI other internal
two-way set- sources
associative, 16-
entry TLB, fully
associative

Three-level Hardware hypervisor, trusted


cache boot architecture, efficient data
hierarchy path handling, improved Serial
RapidIO and SATA IP

IEEE 754- 32-kbyte 8- 64 TLB with 512- Eight 32-bit timers Eight 10/100/1000 Ethernet 12 external, 48 FC-BGA, 1295 0 to +105 e500mc cores; Decorated
1985 single way set- entry 4K pages with SGMII, two 10GbE with internal, pin Storage APU, CoreNet
and double associative, for XAUI, two parallel interprocess coherency fabric, Hypervisor,
precision L2: 128-kbyte instruction/data(p 10/100/1000 Ethernets, and messaging Frame/Queue/Buffer
(per core) 8-way set- er core), enhanced local bus, SerDes Managers, security (IPSec,
associative hardware reload, for 3 PCI Express v2.0 or two SSL, XOR), SerDes based
with ECC 8-way set Serial Rapid IO controllers, up Aroura or JTAG, DUARTs, 4x
backside; L3: associative; 8 to 18 SerDes 5GHz I2C, 2x USB with ULPI
2 Mbyte 32- block address
way set translations for
associative instruction/data
with ECC
frontside
shared
CoreNet
Platform
Cache

One 8-bit Analog 8 SOIC-NB, 8 -40 to +85 Background debug mode with
Comparator PDIP, 6 DFN single-pin interface, hardware
breakpoint
8-channel 16-bit 1 SCI/LIN, 1 SPI, 1 CAN, up to 10-channel 12- 48 QFN, 64 -40 to +85 Non-multiplexed External Bus
Timer; 6-channel 91 I/O, bit, 3 us LQFP, 80 QFP -40 to +105 Interface, Background debug,
8-bit PWM conversion time -40 to +125 single-pin interface, hardware
breakpoints

8-channel 16-bit Up to 6 SCI/LIN, up to 3 SPI, IRQ, XIRQ, Up to 24- 80 QFP, -40 to +85 Background debug, single-pin
Enhanced up to 2 IIC, up to 5 CAN, up to more than 50 channel 10-bit, 7 112/144 LQFP -40 to +105 interface, hardware
Capture, 4- 152 I/O, sources us conversion -40 to +125 breakpoints
channel Periodic time
Interrupt, 4-
channel 16-bit
PWM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 70


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Freescale S12XE Automotive S12X 50 16 16 5 Wait, stop,
Semiconductor pseudo stop,
low-voltage
inhibit, auto-
wakeup,
Asyncronous
Periodic
Interrupt

Freescale S12XF Automotive S12X 50 16 16 5 Wait, stop,


Semiconductor pseudo stop,
low-voltage
inhibit, auto-
wakeup,
Asyncronous
Periodic
Interrupt

Freescale S12XS Automotive S12X 40 16 16 5 Wait, stop,


Semiconductor pseudo stop,
low-voltage
inhibit, auto-
wakeup,
Asyncronous
Periodic
Interrupt
Fujitsu F2MC - 8FX Industrial, Consumer F2MC-8L/8FX 1 to 10 16/8 16 1.8 to 5.5 17.5 mW Sleep, stop,
Semiconductor subclock, watch,
America timer

Fujitsu F2MC - 8FX and Industrial, Consumer F2MC-8FX 10 to 16 16/8 16 1.8 to 3.3, 17.5 mW Sleep, stop,
Semiconductor Low Pin 2.4 to 5.5 subclock, watch,
America Count(LPC) timer
devices

Fujitsu F2MC-16FX Industrial, Consumer, F2MC-16 16 to 56 24/16, 16 1.8 to 3.3 120 mW Stop, sleep,
Semiconductor Automotive external: 8 or 2.7 to 5.5 subclock,
America 16 hardware
standby, watch,
timer

Fujitsu FR and FR-ASSP Industrial, Consumer, FR 25 to 100 32/32, 16 1.8 to 3.3 200 mW Sleep, stop, sub 32x32 with
Semiconductor Automotive external: 24/16 2.7 to 5.5 clock mode, barrel shifter
America timer and bit search

Fujitsu FR30 FR 25 to 50, 32/32, 16 2.3 to 5.5 270 mW Sleep, stop, sub 32x32 DSP
Semiconductor 32.768 kHz external: 24/16 clock mode, macro with
America timer barrel shifter
and bit search

Fujitsu FR50 FR 32 to 64, 32/32, 16 2.3 to 5.5 300 mW Sleep, stop, sub 32x32 with
Semiconductor 32.768 kHz external: 24/16 clock mode, barrel shifter
America timer and bit search

Fujitsu FR60 FR 50 to 68, 32/32, 16 2.3 to 5.5 450 mW Sleep, stop, sub 32x32 with
Semiconductor 32.768 kHz external: 24/16 clock mode, barrel shifter
America timer and bit search

Fujitsu FR60lite FR 33 32/32, 16 3 to 5.5 250 mW Sleep, stop, sub 32x32 with
Semiconductor external: 24/16 clock mode, barrel shifter
America timer and bit search

Fujitsu FR-ASSP FR 30 to 50 32/32, 16 3 200 mW Sleep, stop, sub 32x32 with


Semiconductor external: 24/16 clock mode, barrel shifter
America timer and bit search

GainSpan GS1011 Mobile/Wireless, ARM7 44 Internal: 32 32 1.8 / 1.8, 40 mW 5 uA (3.6V) Yes


Corporation Industrial, Medical 2.5, 3.3 2 uA (1.8V)

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU 8-channel 16-bit Up to 8 SCI/LIN, up to 3 SPI, IRQ, XIRQ, Up to 32- 80 QFP, -40 to +85 XGATE, Memory Protection
Enhanced up to 2 IIC, up to 5 CAN, up to more than 50 channel 12-bit, 3 112/144 LQFP, -40 to +105 Unit, Error Correction Code,
Capture, 8- 152 I/O, sources us conversion 208 MAPBGA -40 to +125 Non-multiplexed External Bus
channel 16-bit time Interface, Background debug,
Timer; 8-channel single-pin interface, hardware
Periodic Interrupt, breakpoints
8-channel 8-bit
PWM

MPU 8-channel 16-bit Up to 8 SCI/LIN, up to 3 SPI, IRQ, XIRQ, Up to 32- 80 QFP, -40 to +85 Dual Channel FlexRay
Enhanced up to 2 IIC, up to 5 CAN, up to more than 50 channel 12-bit, 3 112/144 LQFP, -40 to +105 Controller, XGATE, Memory
Capture, 8- 152 I/O, sources us conversion 208 MAPBGA -40 to +125 Protection Unit, Error
channel 16-bit time Correction Code, Non-
Timer; 8-channel multiplexed External Bus
Periodic Interrupt, Interface, Background debug,
8-channel 8-bit single-pin interface, hardware
PWM breakpoints

8-channel 16-bit 2 SCI/LIN, 1 SPI, 1 CAN, up to IRQ, XIRQ, Up to 16- 64 LQFP, 80 -40 to +85 Error Correction Code, Non-
Enhanced 91 I/O, more than 50 channel 12-bit, 3 QFP, 112 QFP -40 to +105 multiplexed External Bus
Capture, 4- sources us conversion -40 to +125 Interface, Background debug,
channel Periodic time single-pin interface, hardware
Interrupt, 8- breakpoints
channel 8-bit
PWM

8/16-bit, SIO, I²C, SM bus, LIN-UART, Up to 12 12-channel 28/32/48/64/ -40 to +85 Ulta low power, CR oscillator, From $1
21-bit time-base, up to 85 GPIO external (maximum); 80/100 brownout detect, remote-
8-bit PWM, PPG, 8/10-bit DAC QFP/QFP/ control carrier generator, LCD
PWC, realtime, SOP driver
watchdog

8/16-bit, SIO, I²C, SM bus, LIN-UART, Up to 12 up to 12-channel 8/20/14/28/32/ -40 to +85 Ulta low power, on chip CR 50 cents to
21-bit time-base, up to 85 GPIO external ; 48/52/64/ oscillator, on chip debug, $2
8-bit PWM, PPG, 8/10-bit 80/100 brownout detect, LCD driver,
PWC, realtime, DACx1ch QFP/QFP/ Motor control, OpAmp
watchdog SOP

16-bit, reload, SIO, CAN, I²C, LIN, UART, Up to 24 Up to 24- 48/64/100/ -40 to +85 LCD controller, Low voltage From $2 to
PPG, PWM, LCDC, Stepper Motor Control, external channel ADC; 120/144 -40 to +105 detact, RC oscillator, PLL, $10
18-bit watchdog, Waveform generator/AC-DC 8bitx2ch DAC QFP/LQFP/ Clock modulator, input capture,
PWC, timebase, Motor control peripheral SQFP/SDIP output compare, Stepper motor
Freerun timer, I/O (plastic) controller , ECC, FPU, MPU,
timer On chip Debug

Yes Up to 8-kbyte Yes 16-bit reload, free SIO, UART, I²C, USB, CAN, Up to 24 up to 10/12-bit 48/64/100/ -10 to +70 CAN-32 message buffer, From $3 to
instruction running, LIN, HDMI, CCD, OSDC, external ADCx 32ch; 8- 120/144 /176 -40 to +85 Inverter /motor control, up to $15
timebase, PPG LCDC, Waveform bitx 3ch DAC LQFP/QFP -40 to +105 12ch USART/SPI,APIX
generator/AC-DC Motor interface, Flexray mediaLB,
control peripheral 6ch Stepper Motor Controller,
Sound generator
Up to 4-kbyte 16-bit reload, free SIO, CAN, UART, I²C, up to Up to 24 Four-, eight-, or 100/120/ 0 to +70 Comparator, input capture, From $5
instruction running, PWC, 120 PIO external 16-channel, 8/10- 144/160 -40 to +85 output compare
timebase, PPG, bit; three- QFP/LQFP
PWM channel,
8-bit DAC
Up to 4-kbyte 16-bit reload, free SIO, CAN, LIN, UART, I²C Up to 24 Eight- or 16- 120/208 QFP, -40 to +85 Input capture, output compare, From $6
instruction running, PWC, external channel, 8/10- LQFP sound generator, stepper
timebase, PPG, bit; three- motor, comparator
PWM channel, 8-bit
DAC
Up to 4-kbyte 16-bit reload, free SIO, CAN, LIN, UART, I²C Up to 24 Eight- or 16- 100/120/ 0 to +70 Comparator, input capture, From $6
instruction running, PWC, external channel, 8/10- 144/176 LQFP, -40 to +85 output compare, OSDC, CCD,
timebase, PPG, bit; QFP ac/dc inverter control, FlexRay
PWM 8-bit DAC
Up to 4-kbyte 16-bit reload, free SIO, CAN, LIN-UART, I²C Up to 24 Eight- or 16 100/120/144 0 to +70 Embedded LCDC, CAN, From $4.25
instruction running, PWC, external channel 8/10-bit, LQFP/QFP -40 to +85 stepper Motor, LIN-UART,
timebase, PPG, 8-bit DAC input capture, output compare
PWM
Up to 4-kbyte 16-bit reload, free 10/100 Ethernet, SIO, UART, Up to 24 Eight- or 16- 144 -10 to +70 Authentication hardware $10 to $20
instruction running, I²C, USB external channel, 8/10- LQFP/QFP, -40 to +85 accelerator (IPV4/IPV6 with
timebase, PPG bit; 8-bit DAC 240 FBGA DES/3DES/AES)

Internal 2 16-bit timers, SPI, 2 UART, 3 PWM, I²C, 2 Any GPIO can 3 external ADC 102 QFN -40 to +85 802.11b radio, 2 ARM7 TDMI,
3 PWM, ADC, 32 GPIO, JTAG, 802.11, be an interrupt inputs, internal integrated power amplifier, also
48-bit RTC, RTC battery voltage + supports external power
3 34-bit wakeup temperature, amplifier + Tx/Rx switch
counters 10 bit, 32Ksps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 72


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
GreenArrays, Inc GA144-1.10 Imaging and video, 144 complete F18A 666 MIPS Software 5 (4 opcodes 1.8 / 1.8 4.5 mW per Zero overhead 18x18 multiply
Industrial, computers for each of defined (no per 18- word) computer at suspension of step instruction
Communication/wired including 144 external bus 100% duty each computer
memory and computers needed) cycle, 100 nW when waiting for
intercomputer max 96 per computer stimuli or data,
communication GIPS suspended 100 nW each.
s

GreenArrays, Inc GA4-1.2 Digital power, General 4 complete F18B 700 MIPS Software 5 (4 opcodes 1.8 / 1.8 4.5 mW per Zero overhead 18x18 multiply
purpose, Other computers for each of defined (no per 18- word) computer at suspension of step instruction
including 4 computers external bus 100% duty each computer
memory and max 2.8 needed) cycle, 100 nW when waiting for
intercomputer GIPS per computer stimuli or data,
communication suspended 100 nW each.
s (max 18 mW,
min 400 nW)

Hyperstone E1-16XSR E1- E1-32XSR 125 22/16 16, 32, 48 1.8 / 3.3 40 mA Power-down
16XSRB (device sleep
and core)
Hyperstone E1-32XSR E1- E1-32XSR 125 26/32 16, 32, 48 1.8 / 3.3 40 mA Power-down
32XSRB (device sleep
and core)
Hyperstone E2 Communication/wired, Galios Factory E1-32XSR 200 32/32 16, 32, 48 1.8 / 3.3 0.2 W Power-down
Industrial Co-processor sleep, Doze

Hyperstone F3 CF/PATA NAND E1-32XSR up to 70 NAND Flash Variable 16, 2.5 / 3.3, 50 mA Automatic
Flash Controller Interface 32, 48 5.0 powerdown

Hyperstone F4 CF/PATA NAND E1-32XSR up to 70 NAND Flash Variable 16, 2.5 / 3.3, 50 mA Automatic
Flash Controller Interface 32, 48 5.0 powerdown

Hyperstone HyNetS Communication/wired, DCT E1-32XSR 200 32/32 16, 32, 48 1.8 / 3.3 Power-down
Industrial sleep, Doze

Hyperstone HyNetXS Communication/wired, Galios Factory E1-32XSR 200 32/32 16, 32, 48 1.8 / 3.3 1.7 W Power-down
Industrial Co-processor sleep, Doze

Hyperstone S6 SD/MMC NAND E1-32XSR up to 60 NAND Flash Variable 16, 1.8 / 1.65 40 Sleep
Flash Controller Interface 32, 48 to 3.6
SD/MMC
Interface

Hyperstone S7B SD/MMC E1-32XSR up to 60 NAND Flash Variable 16, 1.8 / 1.65 40 Sleep
NAND Flash Interface 32, 48 to 3.6
Controller SD/MMC
Interface

IBM PowerPC 405 Power 366 to 400 64/128 32 1.1 (90 nm) 0.12 mW/MHz Yes DSP
(core) (worst case) instructions

IBM PowerPC 440 Power 533 to 667 128 32 1.1 (90 nm) 1 W/MHz Yes DSP
(core) (worst case) instructions

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
software Each 18+18+4 pin Any computer 2 18-pin parallel with 4-pin Pins have 5 ADC, res 88 QFN -40 to +85 Software defined I/O, $6.60
computer has interface may may operate as a GPIO (2.5 Gbit/sec as 36 bit dedicated varies with (10x10mm) massively parallel processing.
64 word control SDRAM or timer; any with parallel); 2 450 Mbit SERDES; computers that sample interval.
dedicated SRAM with pins may perform 1 or 2 4-pin interfaces, 2 2-pin can wait on 5 DAC 9-bits,
ROM and 64 software mem PWM at ~10 MHz interfaces, 9 1-pin interfaces edges. more with PWM
word RAM control freqs. (see below)

software Each 4-pin interface Any computer 2 2-pin interfaces (39 Mbit Pins have 1 ADC, 1 DAC, 12 DFN -40 to +85 Software defined I/O, remote / $0.66
computer has may control SPI may operate as a 2wire sync, 20 Mbit 1wire dedicated DAC pin may be (3x3mm) or 8 smart sensors, systems with
64 word memory devices timer; any with Async, 25 Mbit 1wire PWM computers that used as a DFN (2X2mm) deeply distributed I/O and
dedicated pins may perform coding). 1 4-pin interface (SPI can wait on multiplexed ADC computing
ROM and 64 PWM at ~10 MHz etc), 250 Mbit. Software edges. input.
word RAM freqs. intensive (I2C, GPIO.)

128-byte 16-byte SRAM, 3 GPIOs, address/data bus 100 LQFP 100 0 to +85 From $6.50
instruction SDRAM, SRAM, TBGA
flash
128-byte 16-byte SRAM, 3 GPIOs, address/data bus 144 TQFP, 0 to +85 From $7.65
instruction SDRAM, SRAM, 144 TBGA
flash
Two 2-kbyte 32-kbyte RAM, 8 Channel Serial Controller 2 10-bit 182Khz 256 TFBGA 0 to +85 RealTime Clock Battery
boot ROM, 2- Channel DMA SR -40 to +85 Backed
channel DMA
128-byte 32-bit, watchdog 100 TQFP, 0 to +85 CF/PATA interface, Core/Flash $3.12
instruction 128 LQFP, Voltage Regulator Built in,
Bootable Firmware Stored in
Flash, 2x 512Byte sector
buffers per channel, 4 symbol
Reed-Solomon ECC.

128-byte 32-bit, watchdog 100 TQFP, 0 to +85 CF/PATA interface, Core/Flash


instruction 128 LQFP, Voltage Regulator Built in,
Bootable Firmware Stored in
Flash, 2x 4kByte sector buffers
per channel, 4 symbol Reed-
Solomon ECC.

Two 2-kbyte 16-kbyte RAM, 10/100 Ethernet MAC, Core 256 LBGA 0 to +85 IEEE 1588 Clock Sync, $10.50
shared SRAM, 64- YUV, PCI, MPI, I2C, RS232, realtime clock, watchdog,
kbyte SRAM, boot synchronous interfaces interrupt controller, reset and
ROM, six channel clock manager
DMA

Two 2-kbyte 16-kbyte RAM, 32- Two 10/100 Ethernet MACs, 256 TFBGA 0 to +85 Ethernet Hub, IEEE1588 clock $17.50
kbyte shared 10/100 Ethernet PHY, USB 2.0 sync, realtime clock, watchdog,
SRAM, 128-kbyte OTG, CAN, YUV, MPI, PCM, JTAG, interrupt controller,
SRAM, boot Utopia Level 2, up to 58 bits reset and clock manager
ROM, six-channel GPIOs, configurable 16 pin
DMA serial controller

128-byte 32-bit, watchdog 50 LGA 128 0 to +85 SD2.0/MMC4.2 Interface, Dual $2.34
instruction LQFP Voltage Mode, Bootable
firmware stored in flash, 2x
4kByte sector buffers per
channel, 4 symbol Reed-
Solomon ECC.
128-byte 32-bit, watchdog 50 LGA 128 0 to +85 SD2.0/MMC4.3 Interface, Dual
instruction LQFP Voltage Mode, Bootable
firmware stored in flash, 2x
4kByte sector buffers per
channel, 6/14bit BCH ECC.

16-kbyte with 64-entry UTLB, 64-bit time base, Licensee option (Core) -40 to +105 Scalar, 5-stage pipeline License
parity 4-enty ITLB, programmable
8-entry DTLB interval timer,
fixed interval
timer, watchdog
timer

Yes, 32-kbyte with 64-entry UTLB, 64-bit time base, Licensee option (Core) -40 to +105 Dual issue, superscalar, 7- License
optional parity 4-entry ITLB, 32-bit stage pipeline
8-entry DTLB programmable
interval timer,
fixed interval
timer, watchdog
timer

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 74


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
IBM PowerPC 750CXr Power 300 to 533 32/ 32 and 64 64 1.7 to 1.95 / 7.8 W Nap, doze,
1.8, 2.5 (533 MHz) sleep

IBM PowerPC 750FL Power 600 to 733 32/ 32 and 64 64 1.3 to 1.5 / 5.1 W Nap, doze,
1.8, 2.5, 3.3 (733 MHz) sleep

IBM PowerPC 750FX Power 600 to 800 32/ 32 and 64 64 1.2 to 1.5 / 6.0 W Nap, doze,
1.8, 2.5, 3.3 (800 MHz) sleep

IBM PowerPC 750GL Power 800 to 933 32/ 32 and 64 64 1.2 to 1.55 / 6.5 W Nap, doze,
1.8, 2.5, 3.3 (933 MHz) sleep

IBM PowerPC 750GX Power 933 to 1000 32/ 32 and 64 64 1.4 to 1.55 / 8.3 W Nap, doze,
1.8, 2.5, 3.3 (1 GHz) sleep

IBM PowerPC 970FX Power 1000 to 32 in, 32 out 64 1.0 to 1.3 / 48 W Nap, doze,
2200 1.5 (2.2 GHz) sleep, deep
sleep

IBM PowerPC 970MP Power 1200 to 32 in, 32 out 64 1.0 to 1.3 / 90 W Nap, doze,
2500 1.3 to 1.5 (2.5 GHz) sleep, deep
sleep

IDT RC32332 MIPS II 100, 133, 23/32 32 2.5 / 3.3 or 0.95 or 1.7 W Wait 32x32
150 3.3 / 3 / 3

IDT RC32333 MIPS II 100, 133, 23/32 32 2.5 / 3.3 or 0.95 or 1.7 W Wait 32x32
150 3.3 / 3 / 3

IDT RC32334 MIPS II 100, 133, 26/32 32 3.3 / 3.3 1.7 W Wait 32x32
150

IDT RC32336 MIPS II 150 22/32 32 2.5 / 3.3 2.38 W Wait 32x32

IDT RC32351 MIPS II 100, 133 26/32 32 2.5 / 3.3 1.26 W Wait 32x32

IDT RC32355 MIPS II 133, 150, 26/32 32 2.5 / 3.3 1.73 W Wait 32x32
180

IDT RC32365 MIPS II 150 22/32 32 2.5 / 3.3 2.38 W Wait 32x32

IDT RC32434 MIPS32 266, 300, 26/8 32 1.2 / 3.3 1.54 W Wait 32x32
350, 400

IDT RC32438 MIPS32 200, 233, 26/16 32 1.2 / 3.3 2.0 W Wait 32x32
266

IMEC ADRES SDR M4 ADRES 400 AHB 32/32, 32, 46 1.0 / 3.3 250 mW User-added dataflow
28/128, 8/32 (dataflow operation
mode) mode with 16
ALUs, 16x16
fixpoint muls, 4-
way SIMD
support
Imsys Technologies IM3200 IM3k 133, 167, 8, up to 83 Variable 1.8 / 3.3 50 mW (core), Stand-by 1mW, 8x8, MAC with
200 external multiple of 8 105 mW (core 2.5 µA (RTC 24-bit
(8, 16, 24, 32, + Ethernet) only) accumulate;
...) 32/64bit
mul/div
(microcode)

Page 75 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 32-kbyte, eight- 128-entry TLB, 256 PBGA, 0 to +95
way set 2-way set 27 mm
associative associative

Yes 32-kbyte, eight- 64-entry TLB, 292 CBGA, -40 to +105


way set 2-way set 21 mm
associative associative

Yes 32-kbyte, eight- 64-entry TLB, 292 CBGA, -40 to +105


way set 2-way set 21 mm
associative associative

Yes 32-kbyte, eight- 64-entry TLB, 292 CBGA, -40 to +105


way set 2-way set 21 mm
associative associative

Yes 32-kbyte, eight- 64-entry TLB, 292 CBGA. -40 to +105


way set 2-way set 21 mm
associative associative

Two double- 64/32-kbyte 1024-entry TLB, 4- 576 CBGA, 0 to +105 Support for virtualization;
precision way set 25 mm dynamic voltage and frequency
units associative plus scaling
128-entry
data/instruction
ERAT, 2-way
Two double- 64/32-kbyte 1024-entry TLB, 4- 575 CBGA, 0 to +105 Support for virtualization;
precision way set 25 mm dynamic voltage and frequency
units per associative plus scaling
core 128-entry
data/instruction
ERAT, 2-way
8/2-kbyte, two- 32-entry TLB Four 32-bit UART (16550-compatible), Four, more via 208 QFP -40 to +85 EJTAG debug $10 to
way set v2.1 PCI 32-bits, eight PIO PIO 0 to +70 $15.25
associative (Case)
8/2-kbyte, two- 32-entry TLB Four 32-bit UART (16550-compatible), Four, more via 208 QFP -40 to +85 EJTAG debug $10 to
way set v2.1 PCI 32-bits, eight PIO PIO 0 to +70 $15.25
associative (Case)
8/2-kbyte, two- 32-entry TLB Four 32-bit Dual UART (16550 Four, more via 256 PBGA -40 to +85 EJTAG debug $15 to
way set compatible), v2.1 PCI bridge, PIO 0 to +70 $19.25
associative 16 PIO (Case)
8/2-kbyte, two- 16-entry TLB Three 32-bit UART (16550-compatible), Four, more via 256 CABGA 0 to +70 EJTAG debug $15
way set SPI, 16 GPIO, v2.2 PCI 32- PIO
associative bits, v2.1 PCMCIA, two 10/100
Ethernet
8/2-kbyte, two- 16-entry TLB Three 32-bit Two UART (16550- Four, more via 208 QFP 0 to +70 EJTAG debug $15 to
way set compatible), USB 1.1, ATM PIO $15.75
associative (Utopia1/2), 10/100 Ethernet,
32 PIO
8/2-kbyte, two- 16-entry TLB Three 32-bit Two UART (16550- Four, more via 208 QFP -40 to +85 EJTAG debug $17.50 to
way set compatible), USB 1.1, I²C, PIO 0 to +70 $20.90
associative TDM, ATM (Utopia1/2), 10/100 (Case)
Ethernet, 32 PIO
8/2-kbyte, two- 16-entry TLB Three 32-bit UART (16550-compatible), Four, more via 256 CABGA -40 to +85 Hardware IPSec acceleration $15 to $16
way set SPI, 16 GPIO, v2.2 PCI 32- PIO 0 to +70 (DES, 3DES, AES), random
associative bits, v2.1 PCMCIA, two 10/100 (Case) number generator, EJTAG
Ethernet debug
8-kbyte, four- 16-dual-entry TLB Three 32-bit UART (16550-compatible), Four, more via 256 CABGA -40 to +85 Enhanced JTAG and ICE $15.50 to
way set I²C, SPI, 10/100 Ethernet, v2.2 PIO 0 to +70 interfaces, authentication unit $23
associative PCI 32-bit, 14 GPIO (Case) with NVRAM.
16-kbyte, four- 16-dual-entry TLB Three 32-bit Dual UART (16550- Four, more via 416 BGA -40 to +85 Enhanced JTAG and ICE $25 to $35
way set compatible), I²C, SPI, two PIO 0 to +70 interfaces, bus-monitor logic
associative 10/100 Ethernet, v2.2 PCI 32- (Case)
bit, 32 GPIO
32-kbyte (Core) 0 to +125 debug interface, dataflow Perpetual
operation mode (coarse- white-box-
grained reconfigurable array) IP license
for loop acceleration

IEEE-754- Two 256-byte Up to 10 timers, Two 10/100 Ethernet MII/RMI, 32 levels, 8 180 SSBGA -40 to +85 Single-pwr supply option; $12.95
compliant, stack caches 5/10/15-bit, three UARTs, I²C / SPI master external, 256 TCP/IP, IEEE1588 time
single/doubl prescaling, and slave, nine 8-bit ports, service routine stamping, RTOS, cryptography,
e-precision configurable configurable serial/parallel levels battery-backed RTC
(microcode) interfaces to flash, MMC/SD

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 76


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Imsys Technologies IM3900 IM3k 133, 167, 8, up to 83 Variable 1.8 / 3.3 50 mW (core), Stand-by 1mW, 8x8, MAC with
200 external multiple of 8 105 mW (core 2.5 µA (RTC 24-bit
(8, 16, 24, 32, + Ethernet) only) accumulate;
...) 32/64bit
mul/div
(microcode)

Infineon TC116x Motor control, Industrial, Dual MAC, TriCore V1.3 80 32/32 16, 32 1.5 / 3.3 650 mW Idle, sleep Dual MAC, bit-
Technologies General purpose FPU reverse,
signed-
fraction,
modulo,
saturation, pre/
post-
increment,
rounding
Infineon TC1197 Motor control, Industrial, Dual MAC, TriCore V1.3 150 32/32 16, 32 1.5 / 3.3 1.2 W Idle, sleep Dual MAC, bit-
Technologies General purpose FPU 180 reverse,
signed-
fraction,
modulo,
saturation, pre/
post-
increment,
rounding
Infineon TC1736 Motor control, Industrial, Dual MAC, TriCore v1.3 40 32/32 16, 32 1.5 / 3.3 570 mW Idle, sleep Dual MAC, bit-
Technologies Automotive FPU 80 reverse,
signed-
fraction,
modulo,
saturation, pre/
post-
increment,
rounding
Infineon TC1796 Motor control, Industrial, Dual MAC, TriCore V1.3 150 32/32 16, 32 1.5 / 3.3 1.2 W Idle, sleep Dual MAC, bit-
Technologies Automotive FPU reverse,
signed-
fraction,
modulo,
saturation, pre/
post-
increment,
rounding
Infineon TC1797 Motor control, Industrial, Dual MAC, TriCore v1.3 150 32/32 16, 32 1.5 / 3.3 1.2 W Idle, sleep Dual MAC, bit-
Technologies Automotive FPU 180 reverse,
signed-
fraction,
modulo,
saturation, pre/
post-
increment,
rounding
Infineon XC2200 Motor control, C166V2 66 or 80 32/16 16 3.0 to 5.5 down to 300 Stop-over, Single-cycle
Technologies Automotive, General mW Standby MAC
purpose

Infineon XC2300 Motor control, C166V2 66 or 80 32/16 16 3.0 to 5.5 down to 300 Stop-over, Single-cycle
Technologies Automotive, General mW Standby MAC
purpose

Infineon XC2700 Motor control, C166V2 66 32/16 16 3.0 to 5.5 down to 300 Stop-over, Single-cycle
Technologies Automotive, General mW Standby MAC
purpose

Infineon XC82x Motor control, Consumer, 8051 24 16/8 8 3.0 to 5.5 115 mW (5V) Idle 18mA, 8x8
Technologies General purpose (XC800) 69 mW (3.3V) Powerdown1
3mA,
Powerdown2
5mA
Infineon XC83x Motor control, Consumer, 8051 24 16/8 8 3.0 to 5.5 Idle, Vector
Technologies General purpose (XC800) Powerdown1, Computer
Powerdown2 (CORDIC/MDU
)

Infineon XC864 Motor control, Consumer, 8051 24 16/8 8 3.0 to 5.5 113 mW Idle 12.5mA, 8x8
Technologies General purpose (XC800) Slowdown w/Idle
5.1mA,
Powerdown 1
µA

Page 77 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
IEEE-754- Two 256-byte Up to 10 timers, Two 10/100 Ethernet MII/RMI, 32 levels, 8 8-channel 16-bit; 180 SSBGA -40 to +85 Single-pwr supply option; Java $12.95
compliant, stack caches 5/10/15-bit, three UARTs, I²C / SPI master external, 256 2-channel 16-bit VM, TCP/IP, RTOS,
single/doubl prescaling, and slave, nine 8-bit ports, service routine DAC cryptography, graphics+LCD
e-precision configurable configurable serial/parallel levels interface, battery-backed RTC
(microcode) interfaces to flash, MMC/SD

Single- 16-kbyte 1.5-Mbyte Flash, 32 24-bit, 64 16- MultiCAN (2 Nodes), 2 255 Priority 32-channel, 176 TQFP -40 to +85 Peripheral-control processor, $12 to $15
precision instruction, 32-kbyte bit SSC/SPI, 2 ASC, 2 MLI, 1 Levels, 103 8/10/12-bit; prescaler, duty cycle, phase
two-way set DataFlash, 92- MSC, 81 GPIO IRQ Fast 2-channel discrimination, digital PLL
associative kbyte RAM 10-bit
(includes cache)
MPU, DMA,
MemCheck

Single- 16-kbyte 4-Mbyte Flash, 64- 64 24-bit, 192 16- MultiCAN (2-4 Nodes), 2 255 Priority Dual 416-BGA -40 to +85 Peripheral-control processor, $15 to $25
precision Instruction, kbyte DataFlash, bit SSC/SPI, 2 ASC, 2 MLI, 2 Levels, 181 16-channel, prescaler, duty cycle, phase
two-way set 224-kbyte RAM MSC, 127 GPIO IRQ 8/10/12-bit; discrimination, digital PLL
associative, 4- (includes cache) Fast four-
kbyte Data MPU, DMA, channel 10-bit
MemCheck

Single- 8-kbyte 1-Mbyte Flash, 32- 32 24-bit, 64 16- MultiCAN (2 Nodes), two 255 Priority Dual 144 TQFP -40 to +125 Peripheral-control processor, $12 to 15
precision instruction, kbyte DataFlash, bit SSC/SPI, two ASC, MLI, MSC, Levels, 181 16-channel, prescaler, duty cycle, phase
two-way set 48-kbyte RAM 70 GPIO IRQ 8/10/12-bit; discrimination, digital PLL
associative (includes cache) Fast four-
channel 10-bit

Single- 16-kbyte 2-Mbyte Flash, 64 24-bit, 192 16- MultiCAN (4 Nodes), two 255 Priority Dual 416 PBGA -40 to +125 Peripheral-control processor, $20
precision instruction, 128-kbyte bit SSC/SPI, two ASC, two MLI, Levels, 181 16-channel, prescaler, duty cycle, phase
two-way set DataFlash, 176- two MSC, 127 PIO IRQ 8/10/12-bit; discrimination, digital PLL
associative kbyte RAM Fast four-
(includes cache) channel 10-bit
MPU, DMA,
MemCheck

Single- 16-kbyte 4-Mbyte Flash, 64- 64 24-bit, 192 16- MultiCAN (2-4 Nodes), 2 255 Priority Dual 416-BGA -40 to +125 Peripheral-control processor, $15 to $25
precision Instruction, kbyte DataFlash, bit SSC/SPI, 2 ASC, 2 MLI, 2 Levels, 181 16-channel, prescaler, duty cycle, phase
two-way set 224-kbyte RAM MSC, 127 GPIO IRQ 8/10/12-bit; discrimination, digital PLL
associative, 4- (includes cache) Fast four-
kbyte Data MPU, DMA, channel 10-bit
MemCheck

64-kbyte to 1.6- Up to 17 16-bit Up to 6x CAN, Up to 10- 16 level, 8 Dual 64, 100, 144, -40 to +85 Motor control peripheral, PLL $5 to $9
Mbyte Flash, up timers, up to 48 channel USIC suporting I²C, groups, up to 16-channel, 10- 176 TQFP -40 to +125
to 138-kbyte RAM channel PWM, RS232, UART, SPI, I2S, LIN 112 sources bit
System Timer,
realtime
64-kbyte to 1.6- Up to 17 16-bit Up to 6x CAN, Up to 10- 16 level, 8 Dual 64, 100, 144, -40 to +85 Motor control peripheral, PLL $5 to $9
Mbyte Flash, up timers, up to 48 channel USIC suporting I²C, groups, up to 16-channel, 10- 176 TQFP -40 to +125
to 138-kbyte RAM channel PWM, RS232, UART, SPI, I2S, LIN 112 sources bit
System Timer,
realtime
64-kbyte to 1.6- Up to 17 16-bit Up to 6x CAN, Up to 10- 16 level, 8 Dual 64, 100, 144, -40 to +85 Motor control peripheral, PLL $5 to $9
Mbyte Flash, up timers, up to 48 channel USIC suporting I²C, groups, up to 16-channel, 10- 176 TQFP -40 to +125
to 138-kbyte RAM channel PWM, RS232, UART, SPI, I2S, LIN 112 sources bit
System Timer,
realtime
Up to 4-kbyte 5 16-bit timers, 4- UART, SPI, IIC, up to 17 I/O (4 4 level, 15 4-channel, 10-bit 16-pin TSSOP -40 to +85 Brownout, Cap. Touch Sense, $0.65
Flash, 512 Bytes channel PWM input only) sources 20-pin DSO -40 to +125 Matrix LED, motor-control
RAM 24 pin SSOP peripheral, on-chip oscillator

8-kbyte Flash, 5 16-bit timers, 4- UART, SPI, IIC, up to 25 I/O (8 4 level, 15 8-channel, 10-bit 24-pin DSO -40 to +85 Brownout, Cap. Touch Sense, $0.85
512 Bytes RAM channel PWM input only) sources 28-pin TSSOP -40 to +125 Matrix LED, motor-control
-40 to +150 peripheral, Vector Computer,
high current I/O, on-chip
oscillator
4-kbyte Flash, 5 16-bit timers, 4- UART, SPI, 14 GPIO (eight 4 level, 15 Eight-channel, 20-pin TSSOP -40 to +85 Brownout, motor-control $0.85
768 Bytes RAM channel PWM input only) sources 10-bit -40 to +105 peripheral, Vector Computer,
PLL, on-chip oscillator

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 78


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Infineon XC866 Motor control, Consumer, 8051 26.67 16/8 8 3.0 to 5.5 113 mW Idle 17.2mA, 8x8
Technologies Automotive (XC800) (12 MIPS) Slowdown w/Idle
7.1mA,
Powerdown 1
µA
Infineon XC878 Motor control, Consumer, 8051 24 16/8 8 3.0 to 5.5 187.5 mW Idle 29.2mA, Vector
Technologies Automotive (XC800) Slowdown w/Idle Computer
9.2mA, (CORDIC/MDU
Powerdown 10 )
µA
Infineon XC886/8 Motor control, Consumer, 8051 24 16/8 8 3.0 to 5.5 136 mW Idle 21mA, Vector
Technologies Automotive (XC800) Slowdown w/Idle Computer
11.7mA, (CORDIC/MDU
Powerdown 1 )
µA
Infineon XE166X Motor control, Industrial, C166V2 66 to 80 32/16 16 3.0 to 5.5 down to 300 Stop-over, Single-cycle
Technologies General purpose mW Standby MAC

Innovasic fido1100 68000 66 32/16,8 32 3.3 / 3.3, 500 mW Single-Context 32 x 32


Semiconductor (Modified) 5.0 Sleep, CPU Multiply, Divide
Auto Sleep,
CPU Idle, CPU
Hard Sleep
(<2mW),
Peripheral
Sleep,
Innovasic IA188/186 EM x86 40 20/16 16 5.0 1.1 W Reduced clock Integer
Semiconductor in power-down Multiply, Divide
mode

Innovasic IA188/186 ES x86 40 20/16 16 5.0 1.1 W Reduced clock Integer


Semiconductor in power-down Multiply, Divide
mode

Innovasic IA188/186EB x86 66.67 (55.5 20/16 16 5.0 / 3.3 1.5 W/400 mA Idle and Power- Integer
Semiconductor at 3.3V) (5V/3.3V) Down Multiply, Divide

Innovasic IA188/186XL x86 25 20/16 16 5.0 625 mW Power-Save Integer


Semiconductor mode Multiply, Divide

Intel 64-bit Xeon x86 3200 64 65


Intel 64-bit Xeon MP x86 3660 64 110
Intel Atom N270 x86 1600 32 2.5
Intel Atom Z510 x86 1100 32 2
Intel Atom Z530 x86 1600 32 2
Intel Celeron x86 850 32 26.7
Intel Celeron x86 1200 32 32.1
Intel Celeron x86 2500 32 61
Intel Celeron x86 1660 32 27
Intel Celeron 440 x86 2000 64 35
Intel Celeron 550 x86 2000 64 31
Intel Celeron D 315 x86 2260 64 73
Intel Celeron D 320 x86 2400 64 73
Intel Celeron D 325 x86 2530 64 73
Intel Celeron D 330 x86 2660 64 73
Intel Celeron D 331 x86 2660 64 65
Intel Celeron D 335 x86 2800 64 73
Intel Celeron D 336 x86 2800 64 84
Intel Celeron D 340 x86 2930 64 73
Intel Celeron D 341 x86 2930 64 84
Intel Celeron D 346 x86 3060 64 84
Intel Celeron D 347 x86 3060 64 65
Intel Celeron D 351 x86 3200 64 84
Intel Celeron D 352 x86 3200 64 80
Intel Celeron D 355 x86 3330 64 84
Intel Celeron D 356 x86 3330 64 65
Intel Celeron D 360 x86 3460 64 65
Intel Celeron D 365 x86 3600 64 65
Intel Celeron M 320 x86 1300 32 24.5
Intel Celeron M 350 x86 1300 32 21
Intel Celeron M 360 x86 1400 32 21
Intel Celeron M 370 x86 1500 32 21
Intel Celeron M 373 x86 1000 32 5.5
Intel Celeron M 380 x86 1600 32 21
Intel Celeron M 383 x86 1000 32 5.5
Intel Celeron M 410 x86 1460 32 35
Intel Celeron M 420 x86 1600 32 35
Intel Celeron M 423 x86 1060 32 5.5

Page 79 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to 16-kbyte 5 16-bit timers, 4- UART, SPI, 27 GPIO (eight 4 level, 15 Eight-channel, 38 PTSSOP -40 to +85 Brownout, motor-control $1.25
Flash, 768 Bytes channel PWM input only) sources 10-bit -40 to +125 peripheral, PLL, on-chip
RAM -40 to +150 oscillator

Up to 64-kbyte 7 16-bit timers, 10- 2x CAN, 2x UART, SPI, 48 4 level, 15 Eight-channel, 64-pin TQFP -40 to +85 Brownout, motor-control $2.50
Flash, 3.25-kbyte channel PWM GPIO (eight input only) sources 10-bit -40 to +105 peripheral, Vector Computer,
RAM -40 to +125 PLL, on-chip oscillator

Up to 32-kbyte Up to 17 16-bit 2x CAN, 2x UART, SPI, 48 4 level, 15 Eight-channel, 38 TSSOP -40 to +85 Brownout, motor-control $2 to $3
Flash, 1.75-kbyte
timers, up to 48 GPIO (eight input only) sources 10-bit -40 to +125 peripheral, PLL, on-chip
RAM channel PWM, -40 to +150 oscillator
System Timer,
realtime
64-kbyte to 1.6- Up to 17 16-bit Up to 6x CAN, Up to 10- 16 level, 8 Dual 64, 100, 144, -40 to +85 Motor control peripheral, PLL $4 to $9
Mbyte Flash, up timers, up to 48 channel USIC suporting I²C, groups, up to 16-channel, 10- 176 TQFP
to 138-kbyte RAM channel PWM, RS232, UART, SPI, I2S, LIN 112 sources bit
System Timer,
realtime
32-kbyte Determinstic MPU Two 16-bit Four Universal Interface 8 external, 8 channel, 10-bit 208PQFP, -40 to +85 5 independent hardware Under
deterministic programmable Controllers programmable for numerous 208TQFP, contexts, 1-cycle context $10.00
Timer/Counter/P 10/100 Ethernet with MAC internal 208BGA switching, time and space
WM Units, Filtering, CAN, UART, SPI, partitioning support, hardware
watchdog, system SMbus, GPIO, custom. endian conversion, Peripheral
timer, context Management Unit
timers

Three 16-bit One UART, One synchronous 6 external, 6 100PQFP, -40 to +85 Pin-for-Pin compatible with Under
programmable serial port, 32 PIO internal 100TQFP, AMD AM186/188EM $11.00
timers, watchdog RHOS

Three 16-bit Two UARTs, 32 PIO 6 external, 6 100PQFP, -40 to +85 Pin-for-Pin compatible with Under
programmable internal 100TQFP, AMD AM186/188ES $11.00
timers, watchdog, RHOS
Pulse Width
Demodulation

Three 16-bit Two UARTs, 32 PIO 6 external, 6 84PLCC, -40 to +85 Pin-for-Pin compatible with Under
programmable internal 80PQFP, Intel 186/188EB $12.50
timers, watchdog 80LQFP

Three 16-bit 5 external, 2 68PLCC, -40 to +85 Pin-for-Pin compatible with Under
programmable internal 80PQFP, Intel 186/188XL $11.00
timers 80LQFP
Yes 1-Mbyte PPGA604 90 nm
Yes 1-Mbyte PPGA604 90 nm
Yes 512-kbyte PBGA437 45 nm $40
Yes 512-kbyte PBGA441 45 nm $20
Yes 512-kbyte PBGA441 45 nm $70
Yes 128-kbyte PPGA370 180 nm
Yes 256-kbyte PPGA370 130 nm
Yes 128-kbyte PPGA478 130 nm
Yes 1-Mbyte PPGA478 65 nm
Yes 512-kbyte LGA775 65 nm $44
Yes 1-Mbyte PBGA479 65 nm $86
Yes 256-kbyte PPGA478 90 nm
Yes 256-kbyte PPGA478 90 nm
Yes 256-kbyte PPGA478 90 nm
Yes 256-kbyte PPGA478 90 nm
Yes 256-kbyte PLGA775 90 nm
Yes 256-kbyte PPGA478 90 nm
Yes 256-kbyte PLGA775 90 nm
Yes 256-kbyte PPGA478 90 nm
Yes 256-kbyte PLGA775 90 nm
Yes 256-kbyte PLGA775 90 nm
Yes 512-kbyte PLGA775 65 nm
Yes 256-kbyte PLGA775 90 nm
Yes 512-kbyte PLGA775 65 nm
Yes 256-kbyte PLGA775 90 nm
Yes 512-kbyte PLGA775 65 nm
Yes 512-kbyte PLGA775 65 nm
Yes 512-kbyte PLGA775 65 nm
Yes 512-kbyte H-PBGA479 130 nm
Yes 1-Mbyte H-PBGA479 90 nm
Yes 1-Mbyte PPGA478 90 nm
Yes 1-Mbyte H-PBGA479 90 nm
Yes 512-kbyte H-PBGA479 90 nm
Yes 1-Mbyte PPGA478 90 nm
Yes 1-Mbyte H-PBGA479 90 nm
Yes 1-Mbyte PPGA478 65 nm
Yes 1-Mbyte PPGA478 65 nm
Yes 1-Mbyte PBGA479 65 nm

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 80


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Intel Celeron M 430 x86 1730 32 35
Intel Celeron M 440 x86 1860 32 27
Intel Celeron M 443 x86 1200 32 5.5
Intel Celeron M 450 x86 2000 32 35
Intel Celeron M 530 x86 1730 64 31
Intel Core Duo L2300 x86 1500 32 15
Intel Core Duo L2400 x86 1660 32 15
Intel Core Duo L2500 x86 1830 32 27
Intel Core Duo T2300 x86 1660 32 31
Intel Core Duo T2300E x86 1660 32 35

Intel Core Duo T2400 x86 1830 32 27


Intel Core Duo T2500 x86 2000 32 31
Intel Core Duo T2600 x86 2160 32 31
Intel Core Duo T2700 x86 2330 32 35
Intel Core Duo U2400 x86 1060 32 5.5
Intel Core Duo U2500 x86 1200 32 9
Intel Core Solo T1300 x86 1660 32 27
Intel Core Solo T1400 x86 1830 32 27
Intel Core Solo U1300 x86 1060 32 27
Intel Core Solo U1400 x86 1200 32 6
Intel Core Solo U1500 x86 1330 32 5.5
Intel Core2 Duo x86 1800 64 65
Desktop E4300
Intel Core2 Duo x86 2130 64 65
Desktop E6400
Intel Core2 Duo x86 3000 64 65
Desktop E8400
Intel Core2 Duo Mobile x86 1500 64 17
L7400
Intel Core2 Duo Mobile x86 1600 64 17
L7500
Intel Core2 Duo Mobile x86 2160 64 34
T7400
Intel Core2 Duo Mobile x86 2200 64 35
T7500
Intel Core2 Duo Mobile x86 1060 64 10
U7500
Intel Core2 Quad Q9400 x86 2660 64 95

Intel Dual-Core Xeon x86 1660 32 99


Intel Dual-Core Xeon x86 1860 64 40
5128
Intel Dual-Core Xeon x86 2000 64 65
5130
Intel Dual-Core Xeon x86 2130 64 35
5138
Intel Dual-Core Xeon x86 2330 64 65
5140
Intel Dual-Core Xeon x86 2330 64 40
5148
Intel Dual-Core Xeon x86 2330 64 65
E5220
Intel Dual-Core Xeon x86 3000 64 65
E5240
Intel Mobile Celeron x86 2400 32 59.8
Intel Mobile Pentium 4 - x86 2200 32 35
M
Intel Pentium 4 x86 2800 32 68.4
Intel Pentium 4 Hyper- x86 2800 64 84
Threading 521
Intel Pentium 4 Hyper- x86 3000 64 84
Threading 530
Intel Pentium 4 Hyper- x86 3000 64 65
Threading 531
Intel Pentium 4 Hyper- x86 3200 64 84
Threading 540
Intel Pentium 4 Hyper- x86 3200 64 84
Threading 541
Intel Pentium 4 Hyper- x86 3400 64 115
Threading 550
Intel Pentium 4 Hyper- x86 3400 64 84
Threading 551
Intel Pentium 4 Hyper- x86 3000 64 65
Threading 631
Intel Pentium 4 Hyper- x86 3200 64 86
Threading 641
Intel Pentium 4 Hyper- x86 3400 64 65
Threading 651
Intel Pentium 4 Hyper- x86 3600 64 80
Threading 661

Page 81 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 1-Mbyte PPGA478 65 nm
Yes 1-Mbyte PBGA479 65 nm
Yes 1-Mbyte PBGA479 65 nm
Yes 1-Mbyte PPGA478 65 nm
Yes 1-Mbyte PBGA479 65 nm $86
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PPGA478 65 nm

Yes 2-Mbyte PBGA479 65 nm


Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PPGA478 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PPGA478 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte PBGA479 65 nm
Yes 2-Mbyte LGA775 65 nm $113

Yes 2-Mbyte LGA775 65 nm $183

Yes 6-Mbyte LGA775 45 nm $163

Yes 4-Mbyte PBGA479 65 nm $316

Yes 4-Mbyte PBGA479 65 nm $284

Yes 4-Mbyte PBGA479 65 nm $307

Yes 4-Mbyte PBGA479 65 nm $241

Yes 2-Mbyte PBGA479 65 nm $262

Yes 6-Mbyte LGA775 45 nm

Yes 2-Mbyte PPGA478 65 nm


Yes 4-Mbyte LGA771 65 nm

Yes 4-Mbyte LGA771 65 nm $316

Yes 4-Mbyte LGA771 65 nm

Yes 4-Mbyte LGA771 65 nm $455

Yes 4-Mbyte LGA771 65 nm $519

Yes 6-Mbyte LGA771 45 nm

Yes 6-Mbyte LGA771 45 nm

Yes 256-kbyte PPGA478 130 nm


Yes 512-kbyte PPGA478 130 nm

Yes 512-kbyte PPGA478 130 nm


Yes 1-Mbyte PLGA775 90 nm

Yes 1-Mbyte PPGA478 90 nm

Yes 1-Mbyte PLGA775 90 nm

Yes 1-Mbyte PPGA478 90 nm

Yes 1-Mbyte PLGA775 90 nm

Yes 1-Mbyte PPGA478 90 nm

Yes 1-Mbyte PLGA775 90 nm

Yes 2-Mbyte PLGA775 65 nm

Yes 2-Mbyte PLGA775 65 nm

Yes 2-Mbyte PLGA775 65 nm

Yes 2-Mbyte PLGA775 65 nm

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 82


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Intel Pentium Dual-Core x86 1800 64 65
Desktop E2160

Intel Pentium M x86 1600 32 24.5


Intel Pentium M 713 x86 1100 32 12
Intel Pentium M 730 x86 1600 32 27
Intel Pentium M 733 x86 1100 32 5.5
Intel Pentium M 738 x86 1400 32 10
Intel Pentium M 740 x86 1730 32 27
Intel Pentium M 745 x86 1800 32 21
Intel Pentium M 750 x86 1860 32 27
Intel Pentium M 753 x86 1200 32 5.5
Intel Pentium M 760 x86 2000 32 27
Intel Pentium M 770 x86 2130 32 27
Intel Pentium M 773 x86 1300 32 5.5
Intel Pentium M 778 x86 1600 32 27
Intel Pentium M 780 x86 2260 32 27
Intel Quad-Core Xeon x86 2000 64 80
E5335
Intel Quad-Core Xeon x86 2330 64 80
E5345
Intel Quad-Core Xeon x86 2830 64 80
E5440
Intel Quad-Core Xeon x86 1600 64 40
L5318
Intel Quad-Core Xeon x86 2130 64 40
L5408
Intel Quad-Core Xeon x86 2330 64 50
L5410
Intel Xeon x86 2400 32 65
Jennic JN5139 Industrial, Consumer, 32-bit RISC 16 32 32 2.2 to 3.6 34 mA 0.2 µA
Mobile/wireless including radio

Jennic JN5148 Industrial, Consumer, 32-bit RISC 32 32 16/32 2.0 to 3.6 18 mA 0.12 µA
Mobile/wireless including radio

Kawasaki CatEye dual 24Kf MIPS32 400 to 600 32/64 32 Process Design Sleep,
Microelectronics (Pro) dependent dependent Powerdown

Kawasaki Topaz 24Kf (Pro) MIPS32 200 to 500 32/64 32 Process Design Sleep,
Microelectronics dependent dependent Powerdown

Lattice LatticeECP2 Mobile/wireless, sysDSP blocks 375 Programable Programable 1.2 / 1.2 to
Semiconductor Communication/wired, provide as (sysDSP 3.3
Security, Imaging and many as 88 block)
video, Computers and 18x18
peripherals, Consumer, multipliers
General purpose,
Industrial, Medical,
Military/aerospace, Motor
control, Test and
measurement
Lattice LatticeECP2M Mobile/wireless, sysDSP blocks 375 Programable Programable 1.2 / 1.2 to
Semiconductor Communication/wired, provide as (sysDSP 3.3
Security, Imaging and many as 168 block)
video, Computers and 18x18
peripherals, Consumer, multipliers
General purpose,
Industrial, Medical,
Military/aerospace, Motor
control, Test and
measurement

Page 83 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 1-Mbyte LGA775 65 nm $64

Yes 1-Mbyte H-PBGA479 130 nm


Yes 1-Mbyte H-PBGA479 130 nm
Yes 2-Mbyte PPGA478 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte PPGA478 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte H-PBGA479 90 nm
Yes 2-Mbyte PPGA479 90 nm
Yes 8-Mbyte PLGA771 65 nm $316

Yes 8-Mbyte PLGA771 65 nm $455

Yes 12-Mbyte LGA771 45 nm $690

Yes 8-Mbyte PLGA771 65 nm

Yes 12-Mbyte LGA771 45 nm

Yes 12-Mbyte LGA771 45 nm $320

Yes 512-kbyte PPGA604 130 nm


2 Application 2 UARTs (one for in-system Multiple 4-input 12-bit 56 lead QFN -40 to +85 2.4GHz IEEE802.15.4
timer/counters, 3 debug) ADC, 2 11-bit compliant radio, Security
System timers SPI port with 5 selects DACs, 2 processor (128-bit AES) MAC
2-wire serial interface comparators, accelerator with packet
21 GPIO temperature formatting, CRCs, address
sensor, battery check, auto-acks, timers
monitor
3 Application 2 UARTs (one for in-system Multiple 4-input 12-bit 56 lead QFN -40 to +85 2.4GHz IEEE802.15.4
timer/counters, 3 debug) ADC, 2 12-bit compliant radio, Security
System timers, SPI port with 5 selects DACs, 2 processor (128-bit AES) MAC
watchdog timer, 2 2-wire serial interface comparators, accelerator with packet
sleep counters 21 GPIO, 4-wire digital audio temperature formatting, CRCs, address
interface, JTAG debug sensor, battery check, auto-acks, timers
monitor
IEEE-754 0/8/16/32/64- 16, 32, 64-entry 8-16-bit 16750 UART 17 Design 0 to +70 Dual Gbit Ethernet MAC, USB Under $20
compliant kbyte; up to 1- jTLB with variable dependent host & device
(24Kf) MByte page size,
scratchpad optional FMT

IEEE-754 0/8/16/32/64- 16, 32, 64-entry 8-16-bit 16749 UART 17 Design 0 to +70 Security engine Under $15
compliant kbyte; up to 1- jTLB with variable dependent
(24Kf) MByte page size,
scratchpad optional FMT

1.0-Mbit, SPI, I2C, PCI, GMII, MII, 7:1 144 TQFP -40 to +100 128-bit AES Bitstream
400-Mbps DDR1, LVDS, Ethernet MAC, High 208 PQFP Junction Encryption, TransFR
533-Mbps DDR2 speed ADC/DAC interfaces, 8 256/484/ technology for live updates,
and 32 Microprocessor, FIR 672/900 Dual boot for reliable in-field
Filter, FFT fpBGA configuration

5.3-Mbit, SPI, I2C, PCI, PCIexpress 256/484/672/ -40 to +100 128-bit AES Bitstream
400-Mbps DDR1, GMII, MII, 7:1 LVDS, Ethernet 900/1156 Junction Encryption, TransFR
533-Mbps DDR2 MAC, 1GbE, SGMII, CPRI, fpBGA technology for live updates,
OBSAI, Serial RapidIO, High Dual boot for reliable in-field
speed ADC/DAC interfaces, 8 configuration
and 32 Microprocessor, FIR
Filter, FFT

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 84


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Lattice LatticeECP3 Mobile/wireless, sysDSP blocks >400 Programable Programable 1.2 / 1.2 to
Semiconductor Communication/wired, provide as (sysDSP 3.3
Security, Imaging and many as 320 block)
video, Computers and 18x18
peripherals, Consumer, multipliers
General purpose,
Industrial, Medical,
Military/aerospace, Motor
control, Test and
measurement
Lattice LatticeMico32 General purpose, LatticeMico32 Over 150, 32/32 32 Device Device Fully static 32-bit multiply,
Semiconductor Communication/wired, device dependent dependent Wishbone bus
Security, Industrial dependent (OpenCores)

Lattice LatticeMico8 General purpose LatticeMico8 Over 150, 8 to 24/8 18 Device Device Fully static
Semiconductor device configurable dependent dependent
dependent
Lattice LatticeXP2 Security, Video sysDSP blocks 350 Programable Programable 1.2 / 1.2 to
Semiconductor Surveillance, Displays, provide as (sysDSP 3.3
Audio, Automotive, many as 32 block)
Communication/wired, 18x18
Computers and multipliers
peripherals, Consumer,
General purpose,
Industrial, Imaging and
video, Medical,
Military/aerospace,
Mobile/wireless, Motor
control
Maxim Integrated 71M651x 8051 (one clock 5 8 8 2.5 8.5 mA 2 uA battery
Products per instruction)

Maxim Integrated 71M652x 8051 (one clock 5 8 8 2.5 8.5 mA 3 uA sleep


Products per instruction)

Maxim Integrated 71M653x 8051 (one clock 10 8 8 2.5 30mA 0.5 uA sleep 32
Products per instruction) normal

Maxim Integrated 73S1209 73S1210 8051 (one clock 24 8 8 2.5 21 mA 7 uA sleep


Products per instruction)

Maxim Integrated 73S1215 73S1217 8051 (one clock 24 8 8 2.5 30 mA 7 uA sleep


Products per instruction)

Maxim Integrated DS5002FP Security, General 8051 16 16/8 or 24/8 8 3.85 to 5.5 30 to 100 mA
Products purpose

Maxim Integrated DS5003 Security, General 8051 16 16/8 or 24/8 8 3.85 to 5.5 30 to 100 mA
Products purpose

Maxim Integrated DS5250 Security 8051 25 16/8 or 24/8 8 4.5 to 5.5 30 to 100 mA MAA (RSA
Products support), DES
engine, CRC
engine
Maxim Integrated DS80C310 Consumer, General 8051 25 16/8 8 4.5 to 5.5 10 to 100 mA Stop, idle
Products purpose

Maxim Integrated DS80C320 Consumer, General 8051 33 16/8 8 4.5 to 5.5 10 to 100 mA Stop, idle
Products purpose

Maxim Integrated DS80C323 Consumer, General 8051 18 16/8 8 2.7 to 5.5 10 to 100 mA Stop, idle
Products purpose

Maxim Integrated DS80C390 Industrial, 8051 40 22/8 or 24/8 8 4.5 to 5.5 35 to 75 mA Stop, idle, 16x16 MAC
Products Communication/wired power
management
mode
Maxim Integrated DS80C400 Industrial, 8051 75 22/8 or 24/8 8 1.8 to 3.3 35 to 75 mA Stop, idle, 16x16 MAC
Products Communication/wired power
management
mode

Page 85 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
6.8-Mbit, SPI, I2C, PCI, PCIexpress 256 ftBGA -40 to +100 128-bit AES Bitstream
400-Mbps DDR1, GMII, MII, 7:1 LVDS, Ethernet 484/672/1156 Junction Encryption, TransFR
533-Mbps DDR2 MAC, 1GbE, SGMII, CPRI, fpBGA technology for live updates,
800-Mbps DDR3 OBSAI, Serial RapidIO, High Dual boot for reliable in-field
speed ADC/DAC interfaces, configuration
SD/HD/3G SDI, 8 and 32
Microprocessor, FIR Filter,
FFT

1-, 2-, 4-, 8-,16- SDRAM, DDR, 32-bit I2C (OpenCores), SPI, GPIO, 32 (Core) (Core) Open Source, 32 general
, 32-kbyte, SRAM UART purpose registers, built-in
1 or 2 set debug support
associative
(optional)

1 External (Core) (Core) Open Source, 32 general


purpose registers, optional
memory ready strobe
0.9-Mbit, SPI, I2C, PCI, GMII, MII, 7:1 132 csBGA -40 to +100 Integrated Flash Memory
400-Mbps DDR1, LVDS, Ethernet MAC, High 144 TQFP Junction. provides Single Chip, Instant-
400-Mbps DDR2 speed ADC/DAC interfaces, 8 208 PQFP Automotive on Highly Secure Solution,
and 32 Microprocessor, FIR 256/484/ AEC-Q1000 128-bit AES Bitstream
Filter, FFT 672fpBGA available Encryption, TransFR
technology for live updates,
Dual boot for reliable in-field
configuration

2 2 UARTs 6, 4 priority 22-bit 100LQFP -40 to +85 Precision AFE, $2.21 to


levels 68QFN RTC, LCD Driver, battery $6.01
64LQFP backup, ICE interface
2 2 UARTs 6, 4 priority 22-bit 64LQFP -40 to +85 Precision AFE, $2.53 to
levels 68QFN RTC, LCD Driver, battery $3.85
backup, ICE interface
2 2 UARTs 6, 4 priority 22-bit 68QFN -40 to +85 Precision AFE,
levels 100LQFP RTC, LCD Driver, battery
120LQFP backup, ICE interface
2 2 UARTs 6, 4 priority 68QFN 44QFN -40 to +85 Smart Card Reader Interface, $2.36 to
levels ISO-7816 UART, keypad $3.46
interface, LCD interface,
LDO/voltage converter

2 2 UARTs, USB 6, 4 priority 68QFN 44QFN -40 to +85 Smart Card Reader Interface, $3.04 to
levels ISO-7816 UART, keypad $4.61
interface, LCD interface,
LDO/voltage converter

Two 16-bit timers, USART 6 or 15 MQFP/80 0 to +70 In-system-programmable, $7 to $50


watchdog -40 to +85 nonvolatile memory-control
circuitry Pwr. Fail Reset
Two 16-bit timers, USART 6 or 15 MQFP/80 0 to +70 In-system-programmable, $7 to $50
watchdog -40 to +85 nonvolatile memory-control
circuitry Pwr. Fail Reset
1-kbyte MMU Three 16-bit Two USARTs, 6 or 15 MQFP/80 0 to +70 In-system-programmable,
timers, realtime, ,MQFP/100 -40 to +85 nonvolatile memory-control
watchdog circuitry Pwr. Fail Reset

Three 8-bit timers USART 10 to 14 MQFP/44 0 to +70


,PDIP(W)/40 -40 to +85
,PLCC/44
,TQFP/44
Three 8-bit Two USARTs, 10 to 14 MQFP/44 0 to +70 Pwr. Fail Reset and Interr.
timers, watchdog ,PDIP(W)/40 -40 to +85
,PLCC/44
,TQFP/44
Three 8-bit Two USARTs, 10 to 14 PDIP(W)/40 0 to +70 Pwr. Fail Reset and Interr.
timers, watchdog ,PLCC/44 -40 to +85
,TQFP/44
MMU Three 16-bit Two USARTs, 16 PLCC/68 0 to +70 Pwr. Fail Reset and Interr., $6
timers, watchdog -40 to +85 Pwr. Mgmt. Mode

MMU Four 16-bit Three USARTs, 10/100 16 LQFP/100 0 to +70 Pwr. Fail Reset and Interr., $6
timers, watchdog Ethernet MAC, 1-Wire master, -40 to +85 Pwr. Mgmt. Mode
CAN 2.0B

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 86


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Maxim Integrated DS80C410 Industrial, 8051 75 22/8 or 24/8 8 1.8 to 3.3 35 to 75 mA Stop, idle, 16x16 MAC
Products Communication/wired power
management
mode
Maxim Integrated DS80C411 Consumer, General 8051 75 22/8 or 24/8 8 1.8 to 3.3 35 to 75 mA
Products purpose

Maxim Integrated DS80CH11 General purpose 8051 25 16/8 8 4.5 to 5.5


Products

Maxim Integrated DS83C520 General purpose 8051 33 16/8 8 4.5 to 5.5


Products

Maxim Integrated DS83C530 Consumer, General 8051 33 16/8 8 4.5 to 5.5 10 to 100 mA
Products purpose

Maxim Integrated DS87C520 Consumer, General 8051 33 16/8 8 4.5 to 5.5 10 to 100 mA
Products purpose

Maxim Integrated DS87C530 Consumer, General 8051 33 16/8 8 4.5 to 5.5 10 to 100 mA
Products purpose

Maxim Integrated DS89C430 Consumer, General 8051 33 16/8 8 4.5 to 5.5 10 to 100 mA Stop, idle
Products purpose

Maxim Integrated DS89C450 Consumer, General 8051 33 16/8 8 4.5 to 5.5 10 to 100 mA Stop, idle
Products purpose

Maxim Integrated MAXQ1103 Security MAXQ30 25 20/32 16 Dual 1.8 20 mA 220u MAA
Products (1.62 to (RSA/DSA/EC
1.98) and DSA support),
3.3 (2.8 to SHA engine,
3.6) DES engine,
CRC engine

Maxim Integrated MAXQ1850 Security MAXQ30 16 16 2.8 to 3.6 309 nA 16x16 MAC 48-
Products bit accumulate

Maxim Integrated MAXQ2000 Consumer, Medical MAXQ20 20 16 1.8 to 2.75 6.5 mA (20 0.7 µA 16x16 MAC 48-
Products MHz) bit accumulate

Maxim Integrated MAXQ2010 Consumer, Medical, MAXQ20 10 16 2.7 to 3.6 3.2 mA (10 0.37 µA 16x16
Products General purpose MHz)

Maxim Integrated MAXQ3108 Industrial MAXQ20 10 16 2 to 3.6 1 mA (10 MHz) 100 nA 16x16 MAC 48-
Products bit accumulate

Maxim Integrated MAXQ3180 Industrial MAXQ20 8 - 2.7 to 3.6


Products
Maxim Integrated MAXQ610 Consumer, General MAXQ20S 12 16 1.7 to 3.6 3.75 mA (12 200 nA
Products purpose MHz)

Maxim Integrated MAXQ612 Consumer, General MAXQ20S 12 16 1.7 to 3.6 4.8 mA (12 300 nA
Products purpose MHz)

Maxim Integrated MAXQ613 Consumer, General MAXQ20S 12 16 1.7 to 3.6 2.6 mA (12 200 nA
Products purpose MHz)

Page 87 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MMU Four 16-bit Three USARTs, 1-Wire 16 LQFP/100 0 to +70 Pwr. Fail Reset and Interr., $6
timers, watchdog Master, CAN 2.0B -40 to +85 Pwr. Mgmt. Mode

MMU Four 16-bit Three USARTs, 10/100 16 LQFP/100 0 to +70 Pwr. Fail Reset and Interr., $6
timers, watchdog Ethernet MAC, 1-Wire master -40 to +85 Pwr. Mgmt. Mode

Three 8-bit USART 0 to +70 Pwr. Fail Reset and Interr.,


timers, watchdog -40 to +85 Pwr. Mgmt. Mode

Three 8-bit Two USARTs, 0 to +70 Pwr. Fail Reset and Interr.,
timers, watchdog -40 to +85 Pwr. Mgmt. Mode

Three 8-bit Two USARTs, Pwr. Fail Reset and Interr.,


timers, watchdog Pwr. Mgmt. Mode

Three 8-bit Two USARTs, CDIP(W)/40 Pwr. Fail Reset and Interr.,
timers, watchdog ,PDIP(W)/40 Pwr. Mgmt. Mode
,PLCC/44
,TQFP/44
Three 8-bit Two USARTs, CQUAD-GL/52 Pwr. Fail Reset and Interr.,
timers, watchdog ,PLCC/52 Pwr. Mgmt. Mode
,TQFP/52

Three 8-bit Two USARTs, 10 to 14 PDIP(W)/40 0 to +70 Pwr. Fail Reset and Interr.,
timers, watchdog ,PLCC/44 -40 to +85 Pwr. Mgmt. Mode
,TQFP/44
Three 8-bit Two USARTs, 10 to 14 PLCC/44 0 to +70 Pwr. Fail Reset and Interr.,
timers, watchdog ,TQFP/44 -40 to +85 Pwr. Mgmt. Mode

4-kbyte MMU Four 16-bit Two USARTs, USB Device 8 + 8 user TQFP/144 0 to +70 Temperature/physical tamper
timers, realtime, Port, two ISO-7816 UARTs, definable data sensors erase encryption keys,
watchdog self destruct on-Chip Power-Up/Down
inputs Circuits, Processor Reset and
Early Warning Power-Fail
Interrupt, Power Management
Mode with Switchback Feature,
Idle and Stop Mode, Power-On
and Brownout Reset

Four 16-bit USART, SPI, USB Device 4 Self destruct TQFN/40 0 to +70 65MHz crypto clock, Pwr. Fail
timers, two Port, two ISO-7816 UARTs, inputs Reset, Pwr. on reset/brownout,
PWMs. realtime, Pwr. Mgmt. Mode
watchdog

Three 16-bit Two USARTs, SPI, 1-Wire 16 external TQFN/56, -40 to +85 134 Segment LCD, In-system- $2.78
timers, three Master QFN/68, programmable, JTAG debug,
PWMs, realtime, LQFP/100 Pwr. Mgmt. Mode, Pwr. Fail
watchdog Interr., Pwr. Fail Reset

Three 16-bit Two USARTs, SPI, I2C Bus, 8 8-channel 12-bit LQFP/100 -40 to +85 Pwr. Mgmt. Mode, Pwr. Fail $2.95
timers, three SAR with 312.5 Interr., Pwr. Fail Reset
PWMs, realtime, ksps conversion
watchdog

Two 16-bit timers, Two USARTs, SPI, I2C, IR TSSOP/28 Pwr. Mgmt. Mode, Pwr. Fail
realtime, Carrier Modulation Interr., Pwr. Fail Reset
watchdog,
Capture/Compare

Watchdog SPI 8-channel SAR TSSOP/28 Pwr. Mgmt. Mode, Pwr. Fail
Interr., Pwr. Fail Reset
Two 16-bit timers, Two USARTs, SPI, IR TQFN/32 -40 to +85 Pwr. Mgmt. Mode, Pwr. Fail
two PWMs, Wake Transceiver ,TQFN/40 Interr., Pwr. Fail Reset
Up Timer, ,TQFN/44
watchdog

Two 16-bit timers, Two USARTs, two SPI, I2C, IR TQFN/44, -40 to +85 Pwr. Mgmt. Mode, Pwr. Fail
two PWMs, Wake Transceiver LQFP/64 Interr., Pwr. Fail Reset
Up Timer,
watchdog

Two 16-bit timers, USART, SPI, IR Transceiver TQFN/32, -40 to +85 Pwr. Mgmt. Mode, Pwr. Fail
two PWMs, Wake LQFP/32, Interr., Pwr. Fail Reset
Up Timer, TQFN/44,
watchdog TQFP/44

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 88


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Maxim Integrated MAXQ61C Consumer, General MAXQ20S 12 16 1.7 to 3.6 2.6 mA (12 200 nA
Products purpose MHz)

Maxim Integrated MAXQ622 Consumer, General MAXQ20S 12 16 1.7 to 3.6 4.8 mA (12 300 nA
Products purpose MHz)

Maxim Integrated MAXQ7666 Automotive MAXQ20 8 16 16 4.75 to 5.25 20 mA Stop 160 µA 16x16 MAC 48-
Products (500kbps CAN, bit accumulate
analog
features off)

Maxim Integrated MAXQ7670 Automotive MAXQ20 16 16 16 4.5 to 5.5


Products

Maxim Integrated MAXQ8913 General purpose MAXQ20 20 16 2.7 to 3.6 3 mA(10 MHz) 4.5 µA 16x16 MAC 48-
Products bit accumulate

Maxim Integrated USIP Security MIPS4kSD 96 32 Dual 1.8


Products (1.7 to 1.9)
and 3.3 (3.0
to 3.6)

Maxim Integrated ZA9L0 Security ARM922T 180 32 Dual 1.8


Products (1.71 to
1.89) and
3.3 (3.0 to
3.6)

Maxim Integrated ZA9L1 Security ARM922T 192 32 Dual 1.8


Products (1.71 to
1.89) and
3.3 (3.0 to
3.6)

Microchip dsPIC30F Modified 120 24/16 24 2.5 to 5.5 450 mW Low-power Single-cycle
Technology Harvard Parallel sleep, individual 16x16 MAC,
Master Port peripheral barrel shifter,
enable two 40-bit
accumulators,
32/16 and
16/16 divide

Microchip dsPIC30F10XX Digital power 30 24/16 24 2.5 to 5.5 500 mW Idle, sleep, 15
Technology dsPIC30F202X µW

Microchip dsPIC30F20XX Motor control, Digital 30 24/16 24 2.5 to 5.5 500 mW Idle, sleep 15
Technology power µW

Microchip dsPIC30F30XX Motor control, Digital 30 24/16 24 2.5 to 5.5 600 mW Idle, sleep 15
Technology power µW

Microchip dsPIC30F40XX Motor control, Digital 30 24/16 24 2.5 to 5.5 700 mW Idle, sleep 15
Technology power, General purpose µW

Microchip dsPIC30F50XX Motor control, General 30 24/16 24 2.5 to 5.5 800 mW Idle, sleep 15
Technology purpose µW

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Two 16-bit timers, Two USARTs, SPI, IR TQFN/32, -40 to +85 Pwr. Mgmt. Mode, Pwr. Fail
two PWMs, Wake Transceiver LQFP/32, Interr., Pwr. Fail Reset
Up Timer, TQFN/44,
watchdog TQFP/44

Two 16-bit timers, Two USARTs, two SPI, I2C, LQFP/64 -40 to +85 Pwr. Mgmt. Mode, Pwr. Fail
two PWMs, Wake USB Tranceiver, IR Interr., Pwr. Fail Reset
Up Timer, Transceiver
watchdog

Can swap Three 16-bit USART, CAN 2.0B, LIN 1 Vector 8-channel 12-bit TQFN/48 -40 to +125 Single cycle instructions, ADC $7.49
program and data timers, two 20 Sources SAR with 500 has differential PGA, Internal
memory PWMs, watchdog ksps conversion reference, Power supply
supervisor, Pwr. Mgmt. Mode,
Pwr. Fail Interr., Pwr. Fail
Reset
16-bit timer, SPI, CAN 2.0B 8-channel 10-bit TQFN/40 Pwr. Mgmt. Mode, Pwr. Fail
PWM,Watchdog SAR with 250 Interr., Pwr. Fail Reset
ksps conversion

16-bit timer, USART, SPI, I2C Bus 12-bit SAR with 58 WLP Pwr. Mgmt. Mode, Pwr. Fail
PWM, watchdog, 313 ksps Interr., Pwr. Fail Reset
capture/compare conversion

2 x 8-kbyte Four 8-bit timers, Four USARTs, SPI, I2C, three 12 self 256-CSBGA Code encryption (AES), LCD,
four 16-bit timers, ISO-7816 UARTs, USB OTG destruct inputs pinter, keypad controller, DMA
two PWMs,
realtime,
watchdog

2 x 8-kbyte Four 16-bit Three USARTs, SPI, two ISO- 4 self destruct 6-channel 10-bit LCD, 3-track MSR, soft
timers, five 32-bit 7816 UARTs, IR-Tranciever inputs SAR with 45 modem, DMA, dual bus
timers, four ksps conversion
PWMs, realtime,
watchdog, Wake-
up Timer

2 x 8-kbyte Four 16-bit Three USARTs, SPI, USB 10 self 4-channel 10-bit LCD, 3-track MSR, DMA, dual
timers, five 32-bit OTG, two ISO-7816 UARTs, destruct inputs SAR with 45 bus
timers, four IR-Tranceiver ksps conversion
PWMs, realtime,
watchdog, Wake-
up Timer

Advanced Up to five 16-bit, Up to two UART, CAN 2.0B, Up to 45 Eight to 16 18 to 80 PDIP/ -40 to +125 Software stack, brown out/low $2.50 to
Memory can pair for 32- SPI, up to one I²C, up to 54 sources, 7 channel 12-bit SPDIP/QFN/ voltage detect, Buffered $7.26
Segmentationand bit, PWM, GPIO, codec interface (AC97 priority levels, 200-KSPS, 16 SOIC/TQFP peripherals, Motor
Code Protection watchdog, Power- I2S) 5 traps deep result Control/Power PWM
Supply PWM on buffer, Power- quadrature encoder interface
SMPS family Supply ADC and
Comparator with
DAC

6-12-kbyte Flash, SMPS PWM,Analog 10-bit, two to 28 -40 to +85, Dual 40-bit accumulators, $2.99 to
256-512 byte Comparators,Output four sample/hold SPDIP,SO,QF -40 to +125 software stack, Codeguard $4.25
RAM Compare/std PWM, input (2-Msps) N Security
capture,SPI, UART I2C, 44 TQFP, QFN
Codeguard
12-kbyte Flash, UART, SPI, I2C, four input 10- or 12-bit, up 28 -40 to +85, Dual 40-bit accumulators, $2.50 to
512-byte to 1- capture, two output compare, to four SPDIP/QFN, -40 to +125 brownout detection, software $2.85
kbyte RAM, up to PWM, watchdog, quadrature sample/hold 18 PDIP, 18/28 stack, 25 mA I/Os
1-kbyte EEPROM encoder interface SO

24-kbyte Flash, 1- UART, SPI, I2C, two/four input 10- or 12-bit, up 28 SPDIP, -40 to +85, Dual 40-bit accumulators, $3.00 to
to 2-kbyte RAM, 1- capture, two/four output to four 18/40 PDIP, -40 to +125 brownout detection, software $3.73
kbyte EEPROM compare, PWM, watchdog, sample/hold 18/28 SO, 44 stack, 25 mA I/Os
quadrature encoder interface TQFP/QFN

48-kbyte Flash, 2- UART, SPI, I2C, CAN, input 10- or 12-bit, up 28 SPDIP/SO, -40 to +85, Dual 40-bit accumulators, $3.73 to
kbyte RAM, 1- capture, output compare, to four 40 -40 to +125 brownout detection, software $4.03
kbyte EEPROM PWM, watchdog, quadrature sample/hold PDIP/TQFP/Q stack, 25 mA I/Os
encoder and codec interface FN

66-kbyte Flash, 4- UART, SPI, I2C, CAN, input 10- or 12-bit, up 64/80 TQFP -40 to +85, Dual 40-bit accumulators, $4.98 to
kbyte RAM, 1- capture, output compare, to four -40 to +125 brownout detection, low- $5.74
kbyte EEPROM PWM, watchdog, quadrature sample/hold voltage detect, software stack,
encoder and codec interface, 25 mA I/Os
Codeguard

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 90


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Microchip dsPIC30F60XXA Motor control, General 30 24/16 24 2.5 to 5.5 900 mW Idle, sleep 25
Technology purpose µW

Microchip dsPIC33F Modified 160 24/16 24 3 to 3.6 237 mW Low-power Single-cycle


Technology Harvard Parallel sleep, individual 16x16 MAC,
Master Port peripheral barrel shifter,
enable two 40-bit
accumulators,
32/16 and
16/16 divide

Microchip dsPIC33FJ06GSX Digital power 40 24/16 24 3.0 to 3.6 300 mW Sleep, 690 µW
Technology X

Microchip dsPIC33FJ128XX General purpose, Motor 40 24/16 24 3.0 to 3.6 280 mW Sleep, 690 µW
Technology control, Digital power

Microchip dsPIC33FJ12XX General purpose, Motor 40 24/16 24 3.0 to 3.6 280 mW Sleep, 690 µW
Technology control, Digital power

Microchip dsPIC33FJ16XX General purpose, Motor 40 24/16 24 3.0 to 3.6 280 mW Sleep, 690 µW
Technology control, Digital power

Microchip dsPIC33FJ256XX General purpose, Motor 40 24/16 24 3.0 to 3.6 280 mW Sleep, 690 µW
Technology control, Digital power

Microchip dsPIC33FJ32XX General purpose, Motor 40 24/16 24 3.0 to 3.6 280 mW Sleep, 690 µW
Technology control, Digital power

Microchip dsPIC33FJ64XX General purpose, Motor 40 24/16 24 3.0 to 3.6 280 mW Sleep, 690 µW
Technology control, Digital power

Microchip PIC10 Consumer, General PICmicro 8 12/8 12 2 to 5.5 2 mW Low-power


Technology purpose, Industrial, sleep
Medical, Security

Microchip PIC12 Consumer, General PICmicro 20 or 32 14/8 12, 14 2 to 5.5 10 mW Low-power


Technology purpose, Industrial, (Enhanced 1.8 to 5.5 sleep, individual
Medical, Motor control, Midrange) (Enhanced peripheral
Security Midrange) enable

Microchip PIC16 Consumer, General PICmicro 20 or 32 14/8 12, 14 2 to 5.5 30 mW Low-power


Technology purpose, Industrial, (Enhanced 1.8 to 5.5 sleep,
Medical, Digital power, Midrange) (Enhanced peripheral
Motor control, Computers Midrange) enable
and peripherals,
Security, Automotive

Microchip PIC18 J-series PICmicro 48 16/8 16 2.0 to 3.6 30 mW Low-power 8x8


Technology sleep,
peripheral
enable, RTCC
830 nA, Deep
Sleep 13 nA

Page 91 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
132- or 144-kbyte UART, SPI, I2C, CAN, input 10- or 12-bit, up 64/80 TQFP -40 to +85, Dual 40-bit accumulators, $6.91 to
Flash, 6- or 8- capture, output compare, to four -40 to +125 brownout detection, low- $7.39
kbyte RAM, 2- or PWM, watchdog, quadrature sample/hold voltage detect, software stack,
4-kbyte EEPROM encoder and codec interface, 25 mA I/Os
Codeguard
Advanced Up to nine 16-bit Up to two UART, SPI, ECAN Up to 67 Up to two 18 to100 PDIP -40 to +125 Software stack, Analog $1.86 to
Memory Timers, can pairs 2.0B, I²C, Parallel Master Port, sources, 7 configurable 32- TQFP/SOIC/ Comparators,quadrature $5.08
Segmentationand for 32-bit, Up to Up to 85 GPIO, codec priority levels, channel, 1.1 SPDIP/QFN encoder interface, Motor
Code Protection 16 channels interface (AC97 I2S) 5 traps MSPS/500 Control/Power PWM, PPS pin
PWM, watchdog KSPS, 10/12-bit, mapping function, RTCC, CRC,
user electable, low brown out/low voltage
Power-Supply detect.
ADC and
Comparator with
DAC

6-kbyte Flash, 2x2 SMPS PWM, UART, SPI, 10-bit, 2 MSPS 18-pin PDIP, -40 to +85 Dual 40-bit accumulators, $1.80 to
256 byte RAM I2C, input capture, output SMPS ADC, 0 or SOIC, 20-pin -40 to +125 software stack $2.27
compare/ std PWM, watchdog, 2 10-bit DAC SSOP, 28-pin
Analog Comparators SPDIP, SOIC,
SSOP, QFN

128-kbyte Flash, UART, SPI, I2C, CAN, input One or two 64/80/100 -40 to +85 Dual 40-bit accumulators, $3.29 to
8- or 16-kbyte capture, output compare, 10/12-bit, up to TQFP software stack, DMA $5.17
RAM PWM, watchdog, quadrature eight
encoder and codec interface, sample/hold
Codeguard
12-kbyte Flash, 1- UART, SPI, I2C, input capture, 10/12-bit, up to 18 DIP,SOIC -40 to +85 Dual 40-bit accumulators, $1.99 to
kbyte RAM output compare, PWM, four sample/hold 28 SOIC, -40 to +125 software stack, DMA $2.39
watchdog, quadrature encoder SDIP,QFN,
and codec interface, SSOP
Codeguard
16-kbyte Flash, 2- UART, SPI, I2C, input capture, 10/12-bit, up to 28 SOIC, -40 to +85 Dual 40-bit accumulators, $2.30 to
kbyte RAM output compare, PWM, four sample/hold SDIP,QFN 44 -40 to +125 software stack, DMA $2.67
watchdog, quadrature encoder TQFP,QFN
and codec interface,
Codeguard
256-kbyte Flash, UART, SPI, I2C, CAN, input One or two 64/100 TQFP -40 to +85 Dual 40-bit accumulators, $3.95 to
16- to 30-kbyte capture, output compare, 10/12-bit, up to software stack, DMA $5.64
RAM PWM, watchdog, quadrature eight
encoder and codec interface, sample/hold
Codeguard
32-kbyte Flash, 2- UART, SPI, I2C, CAN, input 10/12-bit, up to 28 SOIC, -40 to +85 Dual 40-bit accumulators, $2.29 to
kbyte RAM capture, output compare, four sample/hold SDIP,QFN 44 -40 to +125 software stack, DMA $2.85
PWM, watchdog, quadrature TQFP,QFN
encoder and codec interface,
Codeguard
64-kbyte Flash, 8- UART, SPI, I2C, CAN, input One or two 64/80/100 -40 to +85 Dual 40-bit accumulators, $2.98 to
or 16-kbyte RAM capture, output compare, 10/12-bit, up to TQFP software stack, DMA $4.84
PWM, watchdog, quadrature eight
encoder and codec interface, sample/hold
Codeguard
8-bit 4 GPIO 2-channel. 8-bit 6 SOT-23, -40 to +125 In-circuit serial programming, 31 to 51
8 PDIP internal oscillator, comparator, cents
8 2x3 DFN ADC, POR, voltage reference

8/16-bit, Capture- 6 GPIO 4 to 12 Up to 4-channel. 8 2x3 DFN, 8 -40 to +125 In-circuit serial programming, 75 cents to
Compare-PWM 8/10-bit MSOP, 8 low-voltage detect, brownout $2
PDIP, reset, internal oscillator,
8 SOIC, comparator, ADC, Data EE,
8 4x4 DFN voltage reference, Capacitive
8 3x3 DFN Sensing Module

8/16-bit, Capture- 12 to 53 GPIO, USART, I²C, 4 to 12 4- to 13-channel, 14- to 64 -40 to +125 Op amp, in-circuit $0.87 to
Compare-PWM SPI, LIN, USB, 8/10/12-bit; 8-bit PDIP/SOIC/ programming, low-voltage $5.50
DAC SSOP/TSSOP/ detect, brownout reset, internal
PLCC/ oscillator, comparator, ADC,
TQFP/MQFP/ Data EE, voltage reference,
QFN Capacitive Sensing Module

Up to five 10-bit Up to two UART, SPI, I²C; 4 external, 18 Up to: 28 -40 to +85 In-circuit serial programming, $1.50 to
PWM, five 8/16- USB 2.0, Ethernet MAC/PHY, internal 15-channel, 10- QFN/SOIC/DIP low-voltage detect, brownout $4.25
bit timers, Parallel Slave/Master Port, 21 bit, , 40 PDIP, 44 reset, LCD Drivers, Charge
watchdog, start- to 68 GPIO 100-KSPS QFN/TQFP, Time Measurement Unit
up, power-up 12-channel, 12- 64, 80, 100
bit 50-KSPS TQFP

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 92


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Microchip PIC18 Traditional Consumer, General PICmicro 40 or 48 / 16/8 16 1.8 to 3.6 35 mW Low-power 8x8
Technology PIC18Fxx K-series purpose, Industrial, 64 (K- (K20 series) sleep,
Medical, Digital power, series) 1.8 to 5.5 peripheral
Motor control, Computers (K22 / K50 enable
and peripherals, series)
Security, Automotive or 2 to 5.5

Microchip PIC18F J-series Consumer, Digital power PIC Up to 48 16/8 16 2.0 to 3.6 33 mW Idle, Sleep, 8x8
Technology Deep sleep,
Base power
down current
13nA @2.15V,
25C, sleep
current 3.1 µA
@2.15V, 25C,
RTCC in sleep
830nA, WDT in
sleep 820nA

Microchip PIC18F K-series Consumer, Medical, PIC Up to 64 16/8 16 1.8 to 5.5 63 mW Idle, Sleep, 8x8
Technology Automotive, Industrial Base power
down current
20nA @1.8V,
25C, RTCC in
sleep 700nA
@1.8V, 25C,
WDT in sleep
300nA@1.8V,
25C

Microchip PIC24F Modified 32 24/16 24 1.8 to 3.6 (K 50 mW Low-power Single-cycle


Technology Harvard Parallel series) or 2 sleep, 16x16 Multiply,
Master Port to 3.6 peripheral 32/16 and
enable, low 16/16 divide
power RTCC
490 nA, Deep
Sleep 20 nA,

Microchip PIC24F J-series General purpose, Three Modified 32 24/16 24 2 to 3.6 60 mW Doze, Idle, Single-cycle
Technology Industrial, Security, Graphics Harvard Parallel Sleep, and 16x16 Multiply,
Medical Hardware Master Port Alternate Clock 32/16 and
Accelerators modes, Base 16/16 divide
for Block power down
Copying, Text, current 20nA
and Unpacking @2.5V and 25C,
of RTCC in sleep
Compressed 500nA @2.0V,
Data 25C, WDT in
sleep
500nA@2.0V,
25C

Microchip PIC24F K-series Mobile/wireless, Medical, Modified 32 24/16 24 1.8 to 5.5 36 mW Doze, Idle, Single-cycle
Technology Security Harvard Parallel Sleep, Deep 16x16 Multiply,
Master Port Sleep, Base 32/16 and
power down 16/16 divide
current 20nA
@1.8V, 25C,
RTCC in sleep
490nA @1.8V,
25C, WDT in
sleep
350nA@1.8V,
25C
Microchip PIC24H Modified 160 24/16 24 3 to 3.6 237 mW Low-power Single-cycle
Technology Harvard Parallel sleep, 16x16 Multiply,
Master Port peripheral 32/16 and
enable 16/16 divide

Page 93 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Up to five 10-bit Up to two UART, SPI, I²C; 4 external, 18 Up to 16- 18/20/28/44/64 -40 to +125 In-circuit serial programming, $1.32 to
PWM, five 8/16- CAN 2.0B, USB 2.0, 23 to 68 internal channel, 10-bit, /80 low-voltage detect, brownout $8.50
bit timers, GPIO 30-200-KSPS or DIP/SOIC/TQF reset
watchdog, start- 12-bit 50-KSPS P/
up, power-up SDIP/QFN

8- to 128-kbyte Up to five 10-bit Up to two UART, Up to two 4 external, 18 Up to 15- 28 QFN, SOIC, -40 to +85 In-circuit serial programming, $1.18 to
Flash, 1- to 4- PWM, two 8-bit SPI/I²C; USB 2.0, Ethernet internal channel, 12-bit SPDIP, SSOP, low-voltage detect, brownout $3.93
kbyte RAM timers, 3 16-bit MAC/PHY, Parallel ADC, 100 KSPS 44 QFN, reset, LCD Drivers, Charge
timers, watchdog, Slave/Master Port, LCD, USB TQFP, 64 Time Measurement Unit,
start-up, power- TQFP, 80 nanoWatt XLP technology
up TQFP, 100
TQFP

8- to 128-kbyte Up to ten 10-bit Up to two UART, SPI, I²C; 4 external, up Up to 24- 20 PDIP, -40 to +125 In-circuit serial programming, $1.27 to
Flash, 256-byte to PWM, six 8-bit CAN 2.0B, USB 2.0, up to 68 to 32 sources channel, 12-bit SSOP, SPIC, low-voltage detect, brownout $3.19
4-kbyte RAM, 256- timers, five16-bit GPIO, ADC, 100KSPS QFN reset, Charge Time
byte to 1-kbyte timers, watchdog, three comparators 28 SPDIP, Measurement Unit, Data Signal
EEPROM realtime SSOP, SOIC, Modulator, nanoWatt XLP
QFN technology
44 QFN,
TQFP, 64
TQFP, QFN,
80 TQFP

Up to 5 16-bit USB with OTG, up to four Up to 67 Up to 16- 14 SSOP 20 -40 to +125 Software stack, 16 general $1.10 to
Timers, can pair UARTs, and 3 SPIs and 3 I²Cs sources, 7 channel, 500- SOIC/SSOP/Q purpose registers, brown $4.31
for 2 32-bit, Up to plus PMP, PPS pin mapping priority levels, KSPS, 10-bit FN 28 out/low voltage detect,
9 channels PWM, function, up to 86 GPIO 5 traps SOIC/SDIP/SS Buffered peripherals, Parallel
watchdog, OP/QFN, 44 Master Port, Charge Time
realtime TQFP/QFN, 64 Measurement Unit
TQFP/QFN
80/100 TQFP

16- to 256-kbyte Up to 5 16-bit USB with OTG, up to four Up to 5 Up to 24- 28 SPDIP, -40 to +125 Software stack, CTMU, PPS $1.74 to
Flash, 4- to 96- Timers, can pair UARTs, and three SPIs and External channel, 500- SSOP, SOIC, (Peripheral Pin Select) aids in $5.6
kbyte RAM for 2 32-bit, Up to three I²Cs plus PMP, PPS pin Interrupt KSPS, 10-bit QFN configuring the most efficient
9 capture input, 9 mapping function, up to 84 Sources, Up to 44 QFN, pin configuration of available
output GPIO 8 processor TQFP, 64 I/O, up to 84 GPIO, three
compare/PWM, exceptions and TQFP, QFN, Comparators, BOR, LVD, POR
watchdog, software traps, 80 TQFP, 100
realtime 7 user- TQFP
selectable
priority levels

4- to 32-kbyte Up to 5 16-bit Up to three UARTs, and two Up to 118 Up to 16- 14 PDIP, -40 to +125 Designed for power $1.10 to
Flash, 512-byte to Timers, can pair SPIs and two I²Cs, up to 24 Interrupt channel, 12-bit, TSSOP constrained and battery $2.32
2-kbyte RAM, 512- for 2 32-bit, Up to GPIOs Sources, Up to 100-KSPS 20 PDIP, QFN, powered applications. Features
byte EEPROM 3 input capture, 3 8 processor SOIC, SSOP unique peripherals like
output exceptions 28 QFN, SOIC, DSBOR, DSWDT and RTCC
comapre/PWM, (traps) SPDIP, SSOP which run in Deep Sleep mode
watchdog, 44 TQFP, QFN for industry leading low power
realtime performance. nanoWatt XLP
technology

Advanced Up to nine 16-bit Up to two UART, SPI, ECAN Up to 67 Up to two 18- to 100 -40 to +125 Software stack, Analog $1.99 to
Memory Timers, can pairs 2.0B, I²C, Up to 85 GPIO sources, 7 configurable 32- PDIP/ SPDIP/ Comparators, PPS pin $4.85
Segmentationand for 32-bit, Up to priority levels, channel, 1.1 QFN/ SOIC/ mapping function, RTCC, CRC,
Code Protection 16 channels 5 traps MSPS/500 TQFP Parallel Master Port, brown
PWM, watchdog, KSPS, 10/12-bit, out/low voltage detect
motor control user selectable
PWM on motor
control family

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 94


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Microchip PIC32 MIPS RISC 40 or 80 32/32 32 2.3 to 3.6 181 mW Idle, peripheral 32x32
Technology Harvard (Internal enable/disable, Multiply/Divide
Buses) low power sleep Unit, single
16/16 cycle 32x16
Parallel Master and 16x16
Port (External) multiply, two
cycle 32x32
multiply with
64-bit result

Microchip SST89E516RDx Consumer, General MCS51 40 16/8 8 4.5 to 5.5 125 mW Idle, Powerdown 8x8
Technology purpose, Industrial (5V, 40 MHz
activemode)

Microchip SST89E52RC Consumer, General MCS51 33 16/8 8 4.5 to 5.5 125 mW Idle, Powerdown 8x8
Technology purpose, Industrial (5V, 33 MHz
activemode)
Microchip SST89E54RC Consumer, General MCS51 33 16/8 8 4.5 to 5.5 125 mW Idle, Powerdown 8x8
Technology purpose, Industrial (5V, 33 MHz
activemode)
Microchip SST89E54RDx Consumer, General MCS51 40 16/8 8 4.5 to 5.5 125 mW Idle, Powerdown 8x8
Technology purpose, Industrial (5V, 40 MHz
activemode)
Microchip SST89E58RDx Consumer, General MCS51 40 16/8 8 4.5 to 5.5 125 mW Idle, Powerdown 8x8
Technology purpose, Industrial (5V, 40 MHz
activemode)
Microchip SST89V516RDx Consumer, General MCS51 33 16/8 8 2.7 to 3.6 75 mW Idle, Powerdown 8x8
Technology purpose, Industrial (3V, 33 MHz
activemode)
Microchip SST89V54RDx Consumer, General MCS51 33 16/8 8 2.7 to 3.6 75 mW Idle, Powerdown 8x8
Technology purpose, Industrial (3V, 33 MHz
activemode)
Microchip SST89V58RDx Consumer, General MCS51 33 16/8 8 2.7 to 3.6 75 mW Idle, Powerdown 8x8
Technology purpose, Industrial (3V, 33 MHz
activemode)
MIPS Technologies 1004Kc 1004Kf Consumer, Multiply/divide MIPS32 with >800 32/64/256 32 Process Process Wait, software SIMD, 8x8,
Mobile/wireless, unit, FPU, DSP ASE Rev 1 (65G) dependent dependent controlled clock 16x16, 32x32
Communication/wired MIPS DSP MT ASE 1.3 Ghz divider and multi-
ASE Rev 1.0 (40G wc) level clock
with SIMD gating, multi-
instructions, core power
Multithreading domains,
(MT) 2 VPEs shutdown
per Core

MIPS Technologies 24Kc 24Kf 24KE Consumer, Multiply/divide MIPS32 with 900 32/64 32 Process Process Wait, software 32x32
Communication/wired, unit, FPU, DSP ASE (65G) dependent dependent controlled clock
General purpose MIPS DSP Rev 1 1.45 Ghz divider and multi-
ASE Rev 1.0 (40G) level clock
with SIMD gating
instructions
MIPS Technologies 34Kc 34Kf Consumer, Multiply/divide MIPS32 with >850 32/64 32 Process Process Wait, software SIMD, 8x8,
Communication/wired, unit, FPU, DSP ASE Rev 1 (65G) dependent dependent controlled clock 16x16, 32x32
General purpose MIPS DSP MT ASE 1.4 GHz divider and multi-
ASE Rev 1.0 (40G wc) level clock
with SIMD gating
instructions,
Multithreading
(MT) ASE
MIPS Technologies 4Kc 4Km 4Kp Industrial, Motor control, Multiply & MIPS32, 148 32/32 16, 32 Process Process Wait, software 16x16, 32x16
General purpose Divide Units MIPS16e (180nm) dependent dependent controlled clock in 1 cycle:
216 divider and multi- 32x32 in 2
(130nm) level clock cycles
347 (90nm) gating
562 (65nm)

MIPS Technologies 74Kc 74Kf Consumer, Computers Multiply/divide MIPS32 with 1.1 GHz 32/64, 32 Process Process Wait, software Rev. 2 of the
Communication/wired unit , FPU, DSP ASE Rev 2 (65G) 128-bit to L1 dependent dependent controlled clock MIPS32 DSP
MIPS DSP MIPS 16e ASE >1.6 Ghz data cache divider and multi- ASE SIMD,
ASE Rev. 2.0 (40G wc) level clock 8x8, 16x16,
with SIMD ~2.7 GHz gating 32x32
instructions (40G typ)

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Math Prefetch Fixed Mapping Up to Five 16-bit USB Device, Host, Dual Role Up to 96 Up to 64 and 100 -40 to +85 12Kbyte Boot Flash, code $2.95 to
Software module with Translation, Timers, can pair and OTG, sources, 7 16-channels, TQFP execution from RAM, Atomic $5.26
Library for 256-Byte Kernel and User them for 2x32-bit, 2 SPI, 2 I²C, 2 UARTs, priority levels, 1000 Ksps, Bit operations on peripherals,
single/doubl Cache Modes, Code Up to 5 channels 8/16-bit PMP, 4 sub-priority 10-bit resolution I/Os toggle every cycle at up to
e precision (speeds Protection of input up to 85 GPIO levels, 5 80MHz, 2 sets of 32 general
execution from capture/output external, single purpose registers, brown out
Flash) compare or PWM, and multi- and low voltage detect, JTAG
watchdog, vector modes Debug and Programming,
realtime Clock & hardware instruction trace,
Calendar

Three 16-bit, Enhanced UART, SPI 8, four levels 40 0 to +70 In-Application Programming; In- $1.00 to
PCA, watchdog PDIP/WQFN, -40 to +85 System Programming; BOD; $3.00
44 Second DPTR, Port4
PLCC/TQFP
Three 16-bit, Enhanced UART 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
watchdog PLCC System Programming; Second $1.20
DPTR
Three 16-bit, Enhanced UART 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
watchdog PLCC System Programming; Second $1.20
DPTR
Three 16-bit, Enhanced UART, SPI 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
PCA, watchdog PLCC/TQFP -40 to +85 System Programming; BOD; $3.00
Second DPTR, Port4
Three 16-bit, Enhanced UART, SPI 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
PCA, watchdog PLCC/TQFP -40 to +85 System Programming; BOD; $3.00
Second DPTR, Port4
Three 16-bit, Enhanced UART, SPI 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
PCA, watchdog PLCC/TQFP -40 to +85 System Programming; BOD; $3.00
Second DPTR, Port4
Three 16-bit, Enhanced UART, SPI 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
PCA, watchdog PLCC/TQFP -40 to +85 System Programming; BOD; $3.00
Second DPTR, Port4
Three 16-bit, Enhanced UART, SPI 8, four levels 40 PDIP, 44 0 to +70 In-Application Programming; In- $1.00 to
PCA, watchdog PLCC/TQFP -40 to +85 System Programming; BOD; $3.00
Second DPTR, Port4
IEEE-754 Per Core: 16, 32, 64-entry L2 cache with extended width Global (Core) Final Design First multi-threaded cache License
compliant 0/8/16/32/64- TLB with variable 256-bit interface, data and Interrupt and coherent multiprocessor
(1004Kf) kbyte, 4-way page size, instruction scratchpad memory Controller Process licensable IP core. Scalable
Set- optional FMT with DMA interface, co- (cross dependent from 1-4 34K type cores +
associative; up processor, CorExtend, and core/thread cache & IO coherence
to 1-MByte OCP interfaces interrupt
scratchpad handling)

IEEE-754 0/8/16/32/64- 16, 32, 64-entry 32-bit address paths Up to 64 (Core) Final Design 8-stage pipeline Synthesizable License
compliant kbyte; up to 1- TLB with variable 64-bit data path for I-Cache vectored and core, OCP interface,
(24KEf) MByte page size, 64-bit data path for data cache Process CorExtend user defined
scratchpad optional FMT dependent instructions, DSP ASE

IEEE-754 0/8/16/32/64- 16, 32, 64-entry 32-bit address paths Up to 64 (Core) Final Design First multi-threaded core License
compliant kbyte; 4-way TLB with variable 64-bit data path for I-Cache vectored and family, OCP interface,
(34Kf) set-associative page size, 64-bit data path for data cache Process CorExtend user defined
& up to 1- optional FMT dependent instructions, DSP ASE, MT
MByte ASE
scratchpad

0- to 16-kbyte 16 dual-entryTLB 32-bit address paths Up to 64 (Core) Final Design 5-stage piepline synthesizable License
with variable page 32-bit data path for I-Cache vectored and core, cacheless design for
size or FMT 32-bit data path for data cache Process multiprocessor designs. Up to
mechanism dependent 8 sets of 32x32-bit registers

IEEE-754 0-64-kbyte; 4- 16, 32, 64-entry 32-bit address paths Up to 64 (Core) Final Design Embedded industry's first License
compliant way Set- TLB with variable 128-bit data path for I-Cache vectored and synthesizable core to achieve
(74Kf) & associative; up page size, 64 or 128-bit data path for Process speeds greater than 1 GHz; 17-
MIPS 64-bit to 1-MByte optional FMT data cache dependent stage, dual issue pipeline, out-
FPU scratchpad of-order dispatch

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 96


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
MIPS Technologies M14K Industrial, Motor control, Multipy/Divide MIPS32, 130 32/32 16, 32 Process Process Wait, software 16x16, 32x16
General purpose (MDU), Flash microMIPS (180nm) dependent dependent controlled clock in 1 cycle:
memory pre- 180 divider and multi- 32x32 in 2
fetch MCU (130nm) level clock cycles
ASE 322 (90nm) gating
540 (65nm)

MIPS Technologies M14Kc Consumer, Multiply/Divide MIPS32, 142 32/32 16, 32 Process Process Wait, software 16x16, 32x16
Mobile/wireless, unit. MCU ASE microMIPS (180nm) dependent dependent controlled clock in 1 cycle:
Communication/wired 190 divider and multi- 32x32 in 2
(130nm) level clock cycles
350 (90nm) gating

Netronome Netronome Communication/wired NFP-3240 NFP Microcode 1400 32/128, 44 1.05 / 1.125 50 W 5W
Network Flow Network Flow & Legacy Intel 40/128 ME
Engine (NFE-3240) Processor, IXP Microcode
PCIe network 36Mb TCAM, (Compatibility
acceleration card 20 Gbs Mode)
Cryptography
Engine
20 K PKI
Engine,
Atomics,
Queue & Hash
Engine

Netronome NFE-3200 IXP 1400 32/128 42 1.0 / varies 25 W 3W

Netronome NFP-3200 IXP 1400 32/128 42 1.0 / varies 25 W 3W

NXP LH7 (BlueStreak) ARM720T up to 84 23/32 16, 32 1.8 / 3.3 150 to 280 Standby, Sleep, 32x32 multiply
Semiconductors mW Stop 1, Stop 2 and MAC

NXP LH7A (BlueStreak) ARM922T up to 266 28/32 16, 32 1.8 / 3.3 228 mA Halt: 60 mA, 32x32 multiply
Semiconductors Standby: 200 µA and MAC

NXP LPC1100 Cortex-M0 50 internal: 16 Thumb 1.8 / 3.3 about 30 mW Sleep, Deep- single-cycle
Semiconductors LPC11Cxx AHBLite matrix (single 3.3 sleep, and Deep 32x32 multiply
supply) power-down

NXP LPC1300 Cortex-M3 72 internal: 16 Thumb, 1.8 / 3.3 60 mW Sleep: 7mW 32-bit
Semiconductors AHBLite matrix 16/32 (single 3.3 (72 MHz, 17 (2mA), Deep- hardware
Thumb-2 supply) mA) sleep: 100uW divison unit,
Hybrid (30 µA), Deep single-cycle
power-down: 32x32 multiply
800nW (240nA)

NXP LPC1700 Cortex-M3 up to 120 internal: 16 Thumb, 1.8 / 3.3 140 mW Sleep: 7mW 32-bit
Semiconductors Multilayer AHB 16/32 (single 3.3 (100 MHz, 42 (2mA), Deep- hardware
matrix; dual Thumb-2 supply) mA) sleep: 800uW divison unit,
APB Hybrid (240 µA), Power- single-cycle
down: 100uW 32x32 multiply
(31 µA), Deep
power-down:
2.6uW (0.8 µA)

NXP LPC2100 ARM7TDMI up to 70 16, 32 1.8 / 3.3 device Idle; powerdown 32x32 multiply
Semiconductors Thumb / ARM (some hae dependent and MAC
single 3.3
supply)

Page 97 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Simple Fixed 32-bit address Up to 256 (Core) Final Design 5-stage pipeline synthesizable License
Mapping Table 32-bit data vectored, 10 and core, microMIPS ISA code
cycle latency. Process compression, cacheless design
Tailchaining dependent for microcontroller designs.
Flash memory prefetch.
Reduced interrupt latency,
enhanced debug
trace/profiling.

0- to 64-kbyte; 4 entry instruction 32-bit address paths Up to 256 (Core) Final Design 5-stage pipeline synthesizable License
1,2,4 way set and data TLB. 32-bit data path for I-Cache vectored, 10 and core, microMIPS ISA code
associative, 16/32 dual entry 32-bit data path for data cache cycle latency. Process compression, reduced interrupt
write back, joint TLB, or FMT Tailchaining dependent latency, enhanced debug
write through. trace/profiling
16-byte cache
line

2-Mbyte Embedded ARM- Various Timers Interlaken10G, XAUI, SPI 4.2, MSI, MSI-X 1521 FCBGA 0° to +70°C Network acceleration card with $5,000
11, 3-8-Gbyte SPI, 2x10 GigE, PCIe PCIe Gen2x8 lanes. Enhanced
DRAM, 32-Mbyte I/O virtualization support.
SRAM, 36-Mbyte
TCAM

4 Mbps Embedded ARM- Interlaken10G, XAUI, SPI 4.2, MSI, MSI-X 1588 BGA Commercial $300
11 SPI, 2x10 GigE and Industrial
4 Mbps Embedded ARM- Interlaken10G, XAUI, SPI 4.2, MSI, MSI-X 1588 BGA Commercial $300
11 SPI, 2x10 GigE and Industrial
8-kbyte on LH795xx Up to 4 with 3xUART, 1xSPI, 1xSSP; Up to 32, four Up to 10- 144 to 208 -40 to +85 Color LCD controller, MMU, From $4.63
(LH795xx series Match and available USB 2.0 FS Device, external channel 10-bit QFP, BGA PLL
series) Capture, Ethernet, CAN, I²C, I²S
watchdog ,
realtime clock; 2-
channel PWM on
LH7520
8-kbyte Full MMU, Linux / 3 x 32-bit with available USB 2.0 FS 2 VICs, up to 10-channel 10- 256 (LF)BGA, -40 to +85 Color LCD controller, AC97, From $8.42
WinCE ports match and Host/Device, 3xUART, 1xSSP 64 interrupts bit w/ Touch 324 LFBGA Battery Monitor, IrDA, Audio
available capture, 2- (SPI), SD/MMC, Smart Card, (32 vectored) Screen Codec, DC-DC, BOD
channel PWM, PS/2, up to 64 I/O Controller
watchdog, (LH7A404)
realtime clock
2x32-bit and 2x16- 1xSSP (SPI), 1xI²C, 1xUART, Nested 8-channel, 10-bit 48 LQFP -40 to +85 Zero-wait-state Flash with ISP From < $1
bit with Match and up to 42 I/O pins, CAN 2.0 B Vectored 33 HVQFN and IAP; PMU; SWD and SWT;
Capture Interrupt IRC (12MHz); BOD; POR
functionality for Controller
PWM, system (NVIC); 16
tick, watchdog vectors; up to
42 ext. IR via
I/O pins
2x32-bit and 2x16- USB 2.0 FS, 1xSSP (SPI), Nested 8-channel, 10-bit 48 LQFP -40 to +85 Revision-2 Cortex-M3 core; From $0.99
bit with Match and 1xI²C, 1xUART, up to 42 I/O Vectored 33 HVQFN Zero-wait-state 128-bit wide
Capture pins Interrupt Flash with ISP and IAP; on-
functionality for Controller chip USB drivers; PMU; SWD
PWM, system (NVIC); 16 and SWT; IRC (12MHz); BOD;
tick, watchdog vectors; up to POR; PLL
42 ext. IR via
I/O pins
MPU (eight 4x32-bit with 1xUSB 2.0 Full Speed Nested up to 8-channel 80 LQFP80 -40 to +85 Revision 2 Cortex-M3 core; From $2.37
regions) Match and Host/OTG/Device, 10/100 Vectored 12-bit; 1-channel 100 LQFP Zero-wait-state 128-bit wide
Capture, Motor Ethernet MAC, 2xCAN, Interrupt 10-bit DAC 100 TFBGA Flash with ISP and IAP; MPU,
Control PWM, 4xUART, 1xSPI, 2xSSP, Controller PMU; SWD and SWT; IRC
Standard PWM, 3xI²C,1xI²S, up to 70 I/O pins (NVIC); 33 (4MHz); BOD; POR; PLL; WIC;
watchdog, vectors; WIC; pin-compatible with LPC2300
realtime clock, up to 42 ext. IR series
system tick, via I/O pins
repetitive interrupt

4x32-bit with USB 2.0 FS, CAN, 2xUART, VIC; up to 32, up to 16-channel 48, 64, 100 -40 to +85 Zero-wait-state 128-bits wide From $1.47
Match and SPI, SSP, I²C; up to 47 I/O four external 10-bit; 10-bit LQFP, HVQFN Flash with 8-bit ECC and
Capture, 6xPWM, pins DAC ISP/IAP; PLL
watchdog,
realtime clock

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 98


Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
NXP LPC2200 ARM7TDMI up to 75 24/32 16, 32 1.8 / 3.3 45 mA (60 Idle: 11.5 mA; 32x32 multiply
Semiconductors Thumb / ARM MHz) powerdown: 10 and MAC
µA

NXP LPC2300 ARM7TDMI 72 16/8 internal: 16, 32 1.8 / 3.3 200 to 400 Idle; 32x32 multiply
Semiconductors Dual AHB Thumb / ARM (single 3.3 mW (63 to 125 powerdown: 500 and MAC
supply) mA) uW (150 µA)

NXP LPC2400 ARM7TDMI 72 24/32 internal: 16, 32 1.8 / 3.3 200 to 400 Idle; 32x32 multiply
Semiconductors Dual AHB Thumb / ARM (single 3.3 mW (63 to 125 powerdown: 500 and MAC
supply) mA) uW (150 µA)

NXP LPC2900 ARM968 up to 125 24/32; internal: 16, 32 1.8 / 3.3 75 mA (125 Power-down 32x32 multiply
Semiconductors Multilayer AHB MHz) and MAC
system bus

NXP LPC3100 ARM926EJ up to 270 16/16 16, 32 1.2 / 1.8, 42 to 123 mW Standby: from 32x32 multiply
Semiconductors 2.5, 3.3 1.75 mW and MAC

NXP LPC3200 ARM926EJ up to 266 24/32 16, 32 1.2, 1.35 / 80 mA (208 Stop: 500 µA Vector Floating
Semiconductors 1.8, 2.5, 3.3 MHz) Point
Processor;
32x32 multiply
and MAC

NXP LPC700 80C51 20 8 2.7 to 5.5 Idle, powerdown


Semiconductors

NXP LPC900 80C51 18 8 2.4 to 3.6 Idle,


Semiconductors powerdown,
total powerdown

Octasic Inc OCT2200 Series FFT Opus N/A 32 1.0 to 3.3 4W Yes Yes

Octasic Inc OCT2224M Audio, FFT Opus N/A 32 1.0 to 3.3 3.5 W Yes Yes
Communication/wired,
Imaging and video
Octasic Inc OCT2224W Mobile/wireless Turbo, FFT, Opus N/A 32 1.0 to 3.3 4W Yes Yes
RACH

Octasic Inc Vocallo Imaging and video, Opus N/A 32 1.0 to 3.3 1W Yes Yes
Mobile Mobile/wireless

Oki Semiconductor ML671000 ARM7TDMI 24 23/16 16, 32 3.3 60 mA Halt, stop 32x8 with 64-
bit result

Oki Semiconductor ML674000 Communication/wired, ARM7TDMI 33 24/16 16, 32 2.5 / 3.3 35 mA Halt, stop 32x8 with 64-
Consumer, Test and bit result
measurement
Oki Semiconductor ML674001 Communication/wired, ARM7TDMI 33 24/16 16, 32 2.5 / 3.3 40 mA Halt, stop 32x8 with 64-
ML67Q4002 Consumer, Test and bit result
ML67Q4003 measurement
Oki Semiconductor ML675001 Communication/wired, ARM7TDMI 60 24/16 16, 32 2.5 / 3.3 70 mA Halt, stop 32x8 with 64-
ML67Q5002 Consumer, Test and bit result
ML67Q5003 measurement

Page 99 © Copyright 2010 Embedded Insights Inc. All rights reserved.


Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
4x32-bit with CAN, 2xUART, 2xSPI, I²C; up VIC; up to 32, 8-channel 10-bit; 144 LQFP, -40 to +85 Zero-wait-state 128-bits wide From $3.25
Match and to 112 I/O pins four external 10-bit DAC TFBGA Flash with 8-bit ECC and
Capture, 6xPWM, ISP/IAP; PLL
watchdog,
realtime clock

4x32-bit with USB 2.0 Full Speed VIC; up to 32, Up to 8-channel 100 to 144 -40 to +85 Zero-wait-state 128-bits wide From $2.40
Match and Host/OTG/Device, 10/100 four external 10-bit; 10-bit LQFP, TFBGA Flash with 8-bit ECC and
Capture, 6xPWM, Ethernet MAC, 2xCAN, DAC ISP/IAP; IRC (4MHz); BOD;
watchdog, 4xUART, 1xSPI, 2xSSP, POR; PLL
realtime clock 3xI²C,1xI²S, SD/MMC; up to
104 I/O pins
4x32-bit with USB 2.0 Full Speed VIC; up to 32, 8-channel 10-bit; 180 to 208 -40 to +85 Zero-wait-state 128-bits wide From $4.25
Match and Host/OTG/Device, 10/100 four external 10-bit DAC LQFP, TFBGA Flash with 8-bit ECC and
Capture, Ethernet MAC, 2xCAN, ISP/IAP; available color LCD
12xPWM, 4xUART, 1xSPI, 2xSSP, controller; IRC (4MHz); BOD;
watchdog, 3xI²C,1xI²S, SD/MMC; up to POR; PLL
realtime clock 160 I/O pins
16-kbyte 4x 6-channel available USB 2.0 FS Up to 32, four up to three 10- 100 to 208 -40 to +85 Reset Generator, Clock- From $6.79
tightly coupled PWM plus 4x 32- Host/OTG/Device, 2x16C550 external bit 8-channel LQFP Generation, and Power
memories bit timers with UARTs, 3xSPIs, 2xCAN 2.0B Management units, clock
(TCMs) four capture-and- controllers, 2xLIN 2.0 master frequency and power of
compare register, controllers, 4xUART, 2xI²C individual modules. 0.4 MHz
32-bit watchdog . ring oscillator. ARM test and
debug interface with real-time
in-circuit emulator. Boundary-
scan test supported

16-kbyte Full MMU, Linux 4x 32-bit with USB 2.0 Hi-Speed IRQ / FIQ, 3-channel 10-bit 180 / 208 -40 to +85 LCD interface; available Li-Ion From $2.80
port available match and Host/OTG/Device; UART, SPI, Event Router TFBGA charger, USB charge pump,
capture, 1xPWM, I²C, I²S, MMC / SD / SDIO / audio codec, power supply
watchdog, CE-ATA, PCM; up to 157 I/O unit, secure boot; random
realtime clock number generator

VFP9 32-kbyte; four- Full MMU, Linux / 6x 32-bit with USB 2.0 FS Host/OTG/Device; Master and 3-channel 10-bit 296 LFBGA -40 to +85 Color LCD controller, 6KB From $5.88
coprocessor way lockable WinCE ports match and Ethernet; 7xUART, 2xSSP, two Slave, 74 w/ touch-screen emulation trace buffer,
available capture, Motor 2xSPI, 2xI²C, 2xI²S, SD/MMC, interrupt controller standard E-ICE JTAG
Control PWM and 87 I/O, keypad sources interface; 0.9V low-power
Standard PWM mode
(11 ch. total), OS
Timer, watchdog,
realtime clock

2x 16-bit, Full duplex UART, I²C up to 13, two up to 4-channel 14, 16, 20 0 to +70 Programmable port output From $0.83
watchdog external 8-bit TSSOP, PDIP, -40 to +85 configurations, selectable
SOIC -40 to +125 Schmitt trigger inputs, LED
drive outputs
up to five, up to 5 I²C, UART, SPI up to 15, up to 4-channel, 14/16/20/28 -40 to +125 Byte erasable Flash From $0.51
PWM channels, four external 8-bit or 8- TSSOP, 8 SO, -40 to +85
realtime clock, channel 10-bit; 2 10/28 HVQFN,
watchdog comparators 8/20 DIP, 44
PLCC, 44
LQFP, 48
LQFP

Yes Serial Rapid IO, SGMII, 1 external PBGA -40 to +110


RGMII, USB, PCIe, NAND
Flash, TDM, SPI, UART
Yes Serial Rapid IO, SGMII, 1 external PBGA -40 to +110 Complete Media Gateway
RGMII, USB, PCIe, NAND Software Solution, with optional
Flash, TDM, SPI, UART Video support
Yes Serial Rapid IO, SGMII, 1 external PBGA -40 to +110 Complete Wireless
RGMII, USB, PCIe, NAND Development Libraries
Flash, TDM, SPI, UART
RMII/RGMII, UART - serial, 1 external PBGA -10 to +110 Complete Media Gateway
TDM, SPI, Mobile DDR Software Solution, with optional
Video support
Multifunction, Rx/Tx UART, 16550 UART, 13, nine 128 QFP -10 to +70 $6.50
PWM, watchdog USB 2.0 device with PHY, 64 external
GPIO
Multifunction, 16550 UART, RX/TX UART, 18, five Eight-channel, 128 TQFP, -40 to +85 Selectable clock gears From $4
PWM, watchdog 32 GPIO external 10-bit 144 LFBGA

Multifunction, 16550 UART, RX/TX UART, 24, five Four-channel, 144 LQFP, -40 to +85 Selectable clock gears From $4
PWM, watchdog SSIO, I²C, 42 GPIO external 10-bit 144 LFBGA

8-kbyte Multifunction, 16550 UART, RX/TX UART, 24, five Four-channel 144 LQFP, -40 to +85 Selectable clock gears, PLL From $5
unified, four- PWM, watchdog SSIO, I²C, 42 GPIO external 10-bit 144 LFBGA
way set
associative,
write back

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 100
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Oki Semiconductor ML675050 Security Multi-bit length ARM7TDMI 64 16, 32 1.5 / 3.3
modulo
calculator

Oki Semiconductor ML675055 Security ARM7TDMI 80 16, 32 1.5 / 3.3

Oki Semiconductor ML67Q4050 Security, Consumer, ARM7TDMI 33.33 23/ 16, 32 2.5 / 2.5 to 50 mA Halt, stop, clock 32x8 with 64-
ML67Q4051 Computer and 8, 16, 32 3.3 gears bit result
Peripherals

Oki Semiconductor ML67Q4060 Security, Consumer, ARM7TDMI 33.33 16, 32 2.5 / 2.5 to 50 mA Halt, stop, clock 32x8 with 64-
ML67Q4061 Computer and 3.3 gears bit result
Peripherals

Oki Semiconductor ML67Q5250 Security, Consumer, ARM7TDMI 32 16, 32 3.3 / 2.5 100 mA Start, stop,
Computer and interrupt
Peripherals
Oki Semiconductor ML696201 Consumer, Computer ARM946E 120 23/16, 8 16, 32 1.5 / 3.3 Halt, stop, clock 32x16 with 64-
ML696Q6203 and Peripherals, Other memory gears bit result
mapped I/O

ON Semiconductor BelaSigna 200 Portable Audio, products, WOLA 2.56 16/16 16 1 to 1.8 10 mW Man µAl
Consumer filterbank internal, shutdown: 250
coprocessor 33 external uW

ON Semiconductor BelaSigna 250 Portable Audio, products, WOLA 5.12 16/16 16 1 to 1.8 10 mW Power-down:
Consumer filterbank internal, <50 uW
coprocessor 50 external

picoChip picoArray Mobile/wireless 308 DSP 160 32/32 16 2.5 4W Yes


cores,
spread/despre
ad, FEC
(Viterbi, Turbo,
CTC),
correlation
Pixelworks BSP-15 Consumer, Security, Video scaler, 300, 350, 32 Variable 1.2, 1.27, 3W Variable clock
Imaging and video DES engine, 400 1.35 speed
variable length
encoder /
decoder

Pixelworks PWBSP-16 Consumer, Security, Video scaler, 350, 400, 32 Variable 1 / 1.2 1.7 W Variable clock
Imaging and video DES engine, 500 speed
variable length
encoder /
decoder

PMC-Sierra MSP2006 Mobile/wireless, MIPS32 167 32 32 1.8 / 3.3 600 mW Powerdown


Communication/wired

PMC-Sierra MSP8110 Mobile/wireless, MIPS32 400 32/64 32 1.0 1.5 W Standby Multiply/Divide;
Communication/wired single cycle
repeat rate for
32x32 MAC

PMC-Sierra MSP8120 Mobile/wireless, MIPS32 400 32/64 32 1.0 1.5 W Standby Multiply/Divide;
Communication/wired single cycle
repeat rate for
32x32 MAC

PMC-Sierra MSP8510 Mobile/wireless, MIPS64 600 to 1000 64 32 1.2, 2.5, 3.3 5 to 8 W Standby 64-bit
Communication/wired DDRI/DDRII
SDRAM, GE,
32 PCI, PL3,
Local

Page 101 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
8-kbyte unified 16-kbyte RAM, 2- PWM, system, UARTx2, SIO, I2Cx2, SPIx2, 46 external, 8 channel, 12-bit 176 LQFP, 176 -40 to +85 ROM/Flash/SRAM/DRAM/SDR
kbyte battery auto reload, 6x 16- 62 GPIO, USB2.0 FIQx1, IRQx45 LFBGA AM controllers, RNG
backup RAM bit, watchdog,

8-kbyte unified Boot ROM, 30- general, system, UARTx4, SIO, I2Cx2, SPIx2, 8 channel 272 LFBGA -40 to +85 Memory protection, interrupt
kbyte embedded watchdog USB2.0, 148 GPIO controller, DMA, LCD
for encryption key controller, NAND/Flash
controllers, RNG
Eight, system, Two 16550 UART with FIFO 41, five Four-channel, 144 LQFP -40 to +85 Selectable clock gears, PLL, From $5
watchdog, six and 9-bit support, multimaster external, 10-bit 2.5V Core and I/O operation,
multifunction, I²C (or SIO), two SPI with external FIQ direct CODEC interfaces, ring
PWM, realtime, FIFO, I²S with FIFO, up to 108 oscillator, debug with boundry
auto reload, input GPIO scan and JTAG
capture, output
compare
Eight, system, Two 16550 UART with FIFO 32, five Four-channel, 64 WCSP, 64 -40 to +85 Selectable clock gears, PLL, From $4
watchdog, six and 9-bit support, multimaster external, 10-bit TQFP, 84 2.5V Core and I/O operation,
multifunction, I²C (or SIO), two SPI with external FIQ LFBGA direct CODEC interfaces, ring
PWM, realtime, FIFO, I²S with FIFO, up to 40 oscillator, debug with boundry
auto reload, input GPIO scan and JTAG
capture, output
compare
32-kbyte Flash, 4- System, flexible, USB2.0FS, SPIx2, SSIO, SIO, 23 144 LFBGA -40 to +85 2ch DMAC, external memory
kbyte SRAM watchdog GPIOx43, SC controllers, fingerprint
authentication accelerator
8-kbyte Six, three flexible, USB 2.0 HS device with PHY, 23 internal, Four-channel, 272 LFBGA -30 to +70 IDE Controller UDMA66, NAND From
PWM, system, single master I²C, I²S, two five external 10-bit Flash Controller, $12.50
realtime, SSIO, up to 88 GPIO External/Internal DMA
watchdog

24-kbyte program Multiple clock domains 16-bit stereo 52 QFN, CSP -40 to +85, Multiprocessor mixed-signal $8
RAM, 2 x 8-kbyte (configurable prescalers), ADC/DAC with 2.4 x 3.7 mm -55 to +125 system, rapid prototyping
data RAMs, DMA battery-voltage monitor, amp (storage) modules, mobile headset
FIFO controller watchdog, 16 GPIO, PCM, reference design
SPI, two UART, I2C, I2S

24-kbyte program Multiple clock domains 16-bit stereo 64 LFBGA, -40 to +85, Multiprocessor mixed-signal $9.45
RAM, 2 x 8-kbyte (configurable prescalers), ADC/DAC with 5x5mm -55 to +125 system, Rapid Prototyping
data RAMs, DMA battery-voltage monitor, amp CABGA (storage) Module and motherboard,
FIFO controller watchdog, 16 GPIO, PCM, algorithm modules
SPI, two UART, I2C, I2S

8-Mbyte local Eight 16-bit I/O -40 to +100 Multi-core DSP: 308
(immediate processors. 200 GIPS. 40
access), access 1- GMACs for next-generation
Gbyte S(D)RAM wireless

32-kbyte Glueless to PCI, IIC, flash ROM controller, Analog RGB 352 BGA 0 to +85 Programmable display refresh $30 to $80
SDRAM, DMA S/PDIF, IIS, BT.656, digital output controller, 64-channel DMA
RGB output

32-kbyte Glueless to DDR- IDE, PCI, 802.3, IIC,UART, 484 PGBA 0 to +85 Programmable display refresh $20 to $70
SDRAM, DMA NAND flash controller, IIS, controller, 64 channel DMA
S/PDIF, BT.656, BT.1120,
SPI, GPDP, GPIO, digital RGB
output

32-kbyte, four- Fixed mapping Three Two UART, TDM, 32-bit, 33- Six 276 LFBGA -45 to +85 Two-wire, block copy engine, $6
way set (Included in the independent MHz-compliant PCI, 55 GPIO ELB bus, EJTAG debugger
associative, MIPS core) programmable 32-
line-lockable bit, watchdog

64-kbyte, four- 32 dual-entry TLB Two independent Two UART, TDM, 32-bit 66- Eight 416 PBGA -40 to +85 Two-wire, block copy engine, $18
way set programmable 32- MHz-compliant PCI, SPI, MPI, ELB bus, EJTAG debugger
associative, bit, watchdog 2 MII/RMII, USB 2.0, 2 TWI,
line-lockable 20 GPIO

64-kbyte, four- 32 dual-entry TLB Two independent Two UART, TDM, 32-bit 66- Eight 416 PBGA -40 to +85 Two-wire, block copy engine, $19
way set programmable 32- MHz-compliant PCI, SPI, MPI, ELB bus, EJTAG debugger,
associative, bit, watchdog 2 MII/RMII, USB 2.0, 2 TWI, Security Engine (MD5, SHA01,
line-lockable 20 GPIO DES/3DES core, IPSec
compliant, RNG)
Single/doub 16-kbyte, L2: 64 dual-entry Four general- Two GE, two PCI, DUART 256 vectored 896 FCBGA 0 to +85 $90 to $140
le-precision 256-kbyte, TLB, 4-kbyte to purpose,
IEEE-754 four-way set 256-Mbyte pages watchdog
associative,
ECC

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 102
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
PMC-Sierra MSP8520 MIPS64 600 to 1000 64 32 1.2, 2.5, 3.3 5 to 8 W Standby 64-bit
DDRI/DDRII
SDRAM, GE,
32 PCI, PL3,
Local
PMC-Sierra RM5231A Communication/wired, MIPS IV 250, 300, 32 32 1.65, 1.8 / Less than 1 W Standby MAC/MAD/MA
Consumer, 350, 400 2.5, 3.3 (400 MHz) DU, multiply
Mobile/wireless (three-operand
and cycle)

PMC-Sierra RM5261A Communication/wired, MIPS IV 250, 300, 64 32 1.65, 1.8 / Less than 1 W Standby MAC/MAD/MA
Consumer, 350, 400 2.5, 3.3 (400 MHz) DU, multiply
Mobile/wireless (three-operand
and cycle)

PMC-Sierra RM7000C Communication/wired, MIPS IV 533, 600 64 32 1.5 / 2.5 / 2.5 W Standby MAD/MADU,
Mobile/wireless 3.3 (600 MHz) multiply (three-
operand and
cycle)

PMC-Sierra RM7035C Communication/wired, MIPS64 300, 466, 32 32 1.5 / 2.5 / 2.5 W Standby MAD/MADU,
Mobile/wireless 533, 600 3.3 (600 MHz) multiply (three-
operand and
cycle)

PMC-Sierra RM7065C Communication/wired, MIPS IV 300, 466, 64 32 1.5 / 2.5 / 2.5 W Standby MAD/MADU,
Mobile/wireless 533, 600 3.3 (600 MHz) multiply (three-
operand and
cycle)

PMC-Sierra RM7900 Communication/wired, MIPS64 668, 750, 64 32 1.5 / 2.5 / 4.8 W Standby MAD/MADU,
Mobile/wireless 835 3.3 (835 MHz) multiply/subtra
ct, multiply
(three-operand
and cycle)

PMC-Sierra RM7935 Communication/wired, MIPS64 668, 750, 32 32 1.5 / 2.5 / 4.7 W Standby MAD/MADU,
Mobile/wireless 835 3.3 (835 MHz) multiply/subtra
ct, multiply
(three-operand
and cycle)

PMC-Sierra RM7965 Communication/wired, MIPS64 668, 750, 64 32 1.5 / 2.5 / 4.7 W Standby MAD/MADU,
Mobile/wireless 835 3.3 (835 MHz) multiply/subtra
ct, multiply
(three-operand
and cycle)

PMC-Sierra RM7965A Communication/wired, MIPS64 900, 1000 64 32 1.5 / 2.5 / 5W Standby MAD/MADU,
Mobile/wireless 3.3 (1000 MHz) multiply/subtra
ct, multiply
(three-operand
and cycle)

Rabbit Rabbit 2000 Digital power, General Z80/Z180 style 30 20/8 8, 16 2.5 to 5.5 120 mA (5V) Sleepy: 60 µA 16x16
Semiconductor purpose, Imaging and (2.5V)
video, Industrial, Medical,
Motor control, Test and
measurement

Page 103 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Single/doub 16-kbyte, L2: 64 dual-entry Four general- Two GE, two PCI, DUART 256 vectored 896 FCBGA 0 to +85 Integrated IPSec H/W Security $95 to $150
le-precision 256-kbyte, TLB, 4-kbyte to purpose, Engine
IEEE-754 four-way set 256-Mbyte pages watchdog
associative,
ECC
One/two- 32-kbyte, two- 48 dual-entry 32-bit SysAD 6, non- 128 QFP -45 to +85 $12 to $18
cycle rate way set TLB, 96 pages, 4- maskable 128 Exposed 0 to +70
single/doubl associative kbyte to 16-Mbyte Pad 0 to +85
e-precision
IEEE-754

One/two- 32-kbyte, two- 48 dual-entry 64-bit SysAD 6, non- 208 QFP -45 to +85 $16 to $22
cycle rate way set TLB, 96 pages, 4- maskable 0 to +70
single/doubl associative kbyte to 16-Mbyte 0 to +85
e-precision
IEEE-754

Single/doub 16-kbyte, L2: 64/48 dual-entry 32-bit 64-bit SysAD 10 external, 304 TBGA 0 to +70 $80 to $90
le-precision 256-kbyte, TLB, 128/96 two internal, 0 to +85
IEEE-754 four-way set pages two software
associative,
line locking,
write
back/through

Single/doub 16-kbyte, L2: 64/48 dual-entry 32-bit 32-bit SysAD 10 external, 128 Exposed 0 to +70 $34 to $74
le-precision 256-kbyte, TLB, 128/96 two internal, Pad 0 to +85
IEEE-754 four-way set pages two software
associative,
line locking,
write
back/through

Single/doub 16-kbyte, L2: 64/48 dual-entry 32-bit 64-bit SysAD 10 external, 256 TBGA -40 to +85 $37 to $78
le-precision 256-kbyte, TLB, 128/96 two internal, 0 to +70
IEEE-754 four-way set pages two software 0 to +85
associative,
line locking,
write
back/through

Single/doub 16-kbyte, L2: 64/48 dual-entry Two 32-bit 64-bit SysAD 10 external, 304 EPBGA 0 to +70 ECC on L2 cache, on-chip $80 to $96
le-precision 256-kbyte, TLB, 128/96 two internal, 0 to +85 EJTAG
IEEE-754 four-way set pages two software
associative,
line locking,
write
back/through,
ECC
Single/doub 16-kbyte, L2: 64/48 dual-entry Two 32-bit 32-bit SysAD 10 external, 128 Exposed 0 to +85 ECC on L2 cache, on-chip $76 to $115
le-precision 256-kbyte, TLB, 128/96 two internal, Pad EJTAG
IEEE-754 four-way set pages two software
associative,
line locking,
write
back/through,
ECC
Single/doub 16-kbyte, L2: 64/48 dual-entry Two 32-bit 64-bit SysAD 10 external, 256 TBGA 0 to +85 ECC on L2 cache, on-chip $84 to $111
le-precision 256-kbyte, TLB, 128/96 two internal, EJTAG
IEEE-754 four-way set pages two software
associative,
line locking,
write
back/through,
ECC
Single/doub 16-kbyte, L2: 64/48 dual-entry Two 32-bit 64-bit SysAD 10 external, 256 CSBGA+ 0 to +85 ECC on L2 cache, on-chip $96 to $106
le-precision 256-kbyte, TLB, 128/96 two internal, EJTAG
IEEE-754 four-way set pages two software
associative,
line locking,
write
back/through,
ECC
Yes Five 8-bit, 10-bit Four asynchronous, two 4 external 100 PQFP -40 to +85 Slave port, bootstrap mode,
with two match synchronous with SPI, 40 PIO spread spectrum circuitry for
registers, low-EMI
realtime,
watchdog

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 104
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Rabbit Rabbit 3000 Digital power, General Z80/Z180 style 54 20/8 8, 16 1.8 to 3.6 108 mA (3.3V) Sleepy: 32 kHz, 16x16
Semiconductor purpose, Imaging and ultra sleepy: 16,
video, Industrial, Medical, 8, 2 kHz (1.8V)
Motor control, Test and
measurement

Rabbit Rabbit 4000 Digital power, General Z80/Z180 style 60 24/8 8, 16 1.8 to 3.3 108 mA (3.3V) Sleepy: 32 kHz, 16x16
Semiconductor purpose, Imaging and ultra sleepy: 16,
video, Industrial, Medical, 8, 2 kHz (1.8V)
Motor control, Test and
measurement

Rabbit Rabbit 6000 Digital power, General Z80/Z180 style 200 24 16 1.2 to 3.3 75 mA 3.3V Sleepy (32 kHz),
Semiconductor purpose, Imaging and Ultra Sleepy
video, Industrial, Medical, (16, 8, 2 kHz)
Motor control, Test and
measurement

Ramtron VRS51L2070 8051 40 16/8 (data 8 3.0 to 3.6 80 mW 3.6 mW 8051 8x8
memory) MULT/DIV,
16x16 single-
cycle MAC,
five-cycle 16-
bit DIV with
single-cycle 32-
bit barrel
shifter
Ramtron VRS51L3072 8051 40 16/8 (data 8 3.0 to 3.6 80 mW 3.6 mW 8051 8x8
memory) MULT/DIV,
16x16 single-
cycle MAC,
five-cycle 16-
bit DIV with
single-cycle 32-
bit barrel
shifter
Ramtron VRS51L3074 8051 40 16/8 (data 8 3.0 to 3.6 80 mW 3.6 mW 8051 8x8
memory) MULT/DIV,
16x16 single-
cycle MAC,
five-cycle 16-
bit DIV with
single-cycle 32-
bit barrel
shifter
Ramtron VRS51L3174 8051 40 16/8 (data 8 3.0 to 3.6 80 mW 3.6 mW 8051 8x8
memory) MULT/DIV,
16x16 single-
cycle MAC,
five-cycle 16-
bit DIV with
single-cycle 32-
bit barrel
shifter
RC Module NeuroMatrix Automotive, 1-64-bit vector NeuroMatrix v3 328 (worst 32 32, 64 1.2 to 3.3 3W Power-down: Two NMC3
1879XK1 Mobile/wireless coprocessors, and ARM v6 case) 500 mW cores
Permutation (ARM 1176JZF-
coprocessor, S RISC)
24
PreProcessing
hardware
channels

RC Module NeuroMatrix General purpose, 1- to 64-bit NeuroMatrix v3 150 (worst 32/64 32, 64 2.5 / 3.3 2.5 W Power-down: 5 Single NMC3
NM6405 Imaging and video vector case) mW core
coprocessor

Page 105 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 10 8-bit, 10-bit Six asynchronous, IrDA, four 4 to 16 128 LQFP, -55 to +85 Slave port, bootstrap mode,
with two match synchronous or SPI, two with external 128 TFBGA quadrature decoder, pulse
registers, HDLC/SDLC, capture, auxiliary I/O bus,
realtime, PWM, 56 PIO spread spectrum circuitry for
watchdog low-EMI

Yes 10 8-bit, 10-bit Six asynchronous, IrDA, four 4 to 16 128 LQFP, -40 to +85 Slave port, bootstrap mode,
with two match synchronous or SPI, two with external 128 TFBGA quadrature decoder, pulse
registers, HDLC/SDLC, capture, auxiliary I/O bus,
realtime, PWM, 40 PIO, DMA spread spectrum circuitry for
two watchdog, 16- low-EMI, 10 Base-T, seven
bit timer hardware breakpoints
1-Mbyte of Ten 8-bit, one 10- 64 I/O, six asynchronous or 4 8 channels12-bit 292-ball BGA -40 to +85 10/100Base-T, 802.11a/b/g Wi-
internal SRAM bit with 2 match as SPI, 2 as HDLC, SDLC Fi, 12C channel, 32KB Battery
registers, and one backable SRAM, 2 Flexible
16-bit with 8 Interface Modules to support
match registers, 4 CANbus or USB device, RTC,
channels 2 channel quadrature decoder
synchronized
PWM with 10-bit
counter
4 channels
variable-phase or
synchronized
PWM with 16-bit
counter

14 16-bit, SPI, I²C, 2 UARTs, 56 GPIO 49 sources (16 64 QFP -40 to +85 JTAG-USB, In Under $4
watchdog, PWM external, port System/Application Flash
with up to 16-bit change), 16 Programming, Debugging, 2
resolution interrupt PWC, internal precision
vectors oscillator, brown-out detect

14 16-bit, SPI, I²C, 2 UARTs, 56 GPIO 49 sources (16 64 QFP -40 to +85 JTAG-USB, In Under
watchdog, PWM external, port System/Application Flash $4.50
with up to 16-bit change), 16 Programming, Debugging, 2
resolution interrupt PWC, internal precision
vectors oscillator, brown-out detect

14 16-bit, SPI, I²C, 2 UARTs, 56 GPIO 49 sources (16 64 QFP -40 to +85 JTAG-USB, In Under $5
watchdog, PWM external, port System/Application Flash
with up to 16-bit change), 16 Programming, Debugging, 2
resolution interrupt PWC, internal precision
vectors oscillator, brown-out detect

14 16-bit, SPI, I²C, 2 UARTs, 40 GPIO 49 sources (16 44 QFP -40 to +85 JTAG-USB, In Under $5
watchdog, PWM external, port System/Application Flash
with up to 16-bit change), 16 Programming, Debugging, 2
resolution interrupt PWC, internal precision
vectors oscillator, brown-out detect.
Standard 8051 pin compatible

ARM Vector 32/32-kbyte 16-Mbit memory, Six 32-bit, SPI, 16 GPIO, UART, USB2.0 14 per NMC3 Four 12-bit 484 BGA -40 to +75 Up to 12 FIR for input signal samples
FPU 32-bit DDR1, 43 watchdog full speed core and 64 for (85MHz) noise reduction up to 30dB;
channel DMA ARM11 core GPS/Glonass/Galileo/
Compass(Beidou) signal
detection, lock-on and tracking;
Interference angle detection
and rejection; Harmonic and
multiharmonic radio frequency
interference suppression.

8-kbyte 2-Mbit memory, Two 32-bit Two I/Os com ports up to 150 17 576 BGA -40 to +85 JTAG port, Robust 0.25um samples
Instruction two 64-bit MB/sec. throughput each technology
SRAM/SSRAM/S
DRAM, two
channel DMA

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 106
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
RC Module NeuroMatrix NMC3 General purpose, 1- to 64-bit NeuroMatrix v3 328 (worst 32/64 32, 64 1.2 to 2.5 120 mW Optional 1 to 64-bit
(core) Imaging and video vector case) Vector-Matrix
coprocessor coprocessor
with variable
data bit length

Renesas Electronics µPD78F0711 NEC 78K 20 8 4.0 to 5.5 26 mA Halt, Stop: 3.5 16x16 multiply,
America Inc µPD78F0712 µA 32/16 divide

Renesas Electronics µPD78F8024 NEC 78K 20 8 1.8 to 5.5 4.5 mA Halt, Stop; 1 µA 8 x 8 -> 16;
America Inc 16 / 8 divide

Renesas Electronics 78K0/Fx2 NEC 78K 20 8 1.8 to 5.5 4.5 mA (5V) Halt, Stop: 1 µA 16x16 multiply,
America Inc 32/16 divide

Renesas Electronics 78K0/Lx2 NEC 78K 20 8 1.8 to 5.5 4.5 mA (5V) Halt, Stop: 1 µA 16x16 multiply,
America Inc 32/16 divide

Renesas Electronics 78K0/Lx3 NEC 78K 10 8 1.8 to 5.5 2.3 mA (5V) Halt, Stop: 1 µA
America Inc

Renesas Electronics 78K0R/Ix3 NEC 78K0R 20 16 2.7 to 5.5 16x16 ->32


America Inc multiply

Renesas Electronics 78K0R/Kx3 NEC 78K0R 20 16 16 1.8 to 5.5 8.5 mA 1.1 µA 16x16->32
America Inc multiply

Renesas Electronics 78K0R/Kx3-L NEC 78K0R 20 16 1.8 to 5.5 6.8 mA 0.33 µA 16x16->32
America Inc multiply, 32/32-
>32 divide

Renesas Electronics H8/ 3670 (H8/Tiny) H8 16 16/8 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/ 3672 (H8/Tiny) H8 16 16/16 8, 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/ 3684 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/ 3687 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/ 3694 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/2110B H8 10 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2111B H8 10 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2114R H8 20 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2116 H8 20 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Page 107 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
8-kbyte Up to 6 variable Optional Optional Up to 32 -40 to +85 Synthesizable Verilog RTL of 1- License
Instruction pipeline depth 64-bit DSP core with
memory VLIW/SIMD decoupled
interfaces support architecture, Small number of
equivalent gates - 160.000

8-bit, 16-bit, 10- UART, CSI Up to 29 Four- to eight- SSOP, SDIP, -40 to +85 POC, LVI, Real Time Output $2.00 to
bit for inverter maskable channel, 10-bit TQFP Port $3.00
PWM
Four 8-bit, 16-bit, UART/LIN, CSI, I²C 6 external, 14 4-channel 10-bit 64-LQFP -40 to +85 HCD, POC, LVI
watchdog internal

8-bit, 16-bit, UART, CSIs, CAN, aFCAN, 8 external, 24- 8 - to 16 - LQFP, (FP) -40 to +125 Embedded flash optmized for
watchdog, watch, LIN 29 internal channel, 10-bit LQFP automotive; Supports CAN and
PWM 44/80 pin LIN; power-on clear, low-
voltage indicator
8-bit, 16-bit, UART, LIN, I²C, CSI Up to 26 Five- to eight- LQFP, QFP -40 to +85 On-chip POC, LVI, 240 kHz $2.5 to $5
watchdog, maskable channel, 10-bit and 8 MHz oscillator, LCD
realtime, PWM driver, bootswap function
8-bit, 16-bit, UART, CSIs, LIN 5 to 7 external, Six-eight LQFP, (FP) -40 to +85 On-chip LCD controller (36 x 8
watchdog, PWM, 17 to 22 channel, 10-bit, LQFP or 40 x 4 segments),
realtime with internal three channel, 48-80 pins Manchester Code generator
alarm function 16-bit and receiver for remote control,
Supports up to 288 display
segments
12 16-bit, PWM, CSI, UART, I²C up to 8 6 to 12 channel, 30, 38 SSOP -40 to +85 Op Amp, Comparator, POC,
watchdog external, up to 10-bit 44, 48, 52, 64 LVI, HW multiplier/divider
34 internal LQFP
16-bit, watchdog, UART/LIN, CSI, I²C up to 41 16-channel, 10- 64/80/100/128/ -40 to +85 Calendar RTC, POC, LVI,
PWM bit; 2-channel, 8- 144 pin LQFP Upwardly compatible to 78K0
bit DAC microcontroller
16-bit, watchdog, UART/LIN, CSI, I²C 9 external, 24 up to 12- 44/52/64 -40 to +85 On-chip comparators/
PWM or 25 internal channel, 10-bit LQFP, 48/64 programmable gain amplifier,
ADC TQFP, 64 Calendar RTC, POC, LVI,
FBGA Upwardly compatible to 78K0
microcontroller

One 8-bit, One 16- 1 Serial, 30 GPIO 11 4-channel 10-bit 48LQFP, -40 to +85 $2.26
bit, watchdog 64LQFP

One 8-bit, One 16- 1 Serial, 30 GPIO 11 4-channel 10-bit 48LQFP, -40 to +85 $2.38
bit, watchdog 64LQFP

Two 8-bit, Two 16- 2 Serial,I2C, 53 GPIO 11 8-channel 10-bit 32LQFP, -40 to +85 RTC, WDTO $4.64
bit, watchdog, 32QFP
One 14-bit PWM

Two 8-bit, Two 16- 2 Serial, I2C, 53 GPIO 11 8-channel 10-bit 64 LQFP, 64 -40 to +85 RTC, WDTO $5.00
bit, watchdog, QFP
One 14-bit PWM

Two 8-bit, One 16- 1 Serial, I2C, 37 GPIO 11 8-channel 10-bit 64LQFP, -40 to +85 WDTO $4.64
bit, watchdog 64QFP,
48VQFN,
48LQFP
Two 8-bit, One 16- 1 Serial,2 I2C, 82 GPIO 31 100 TQFP -20 to +75 KBD, LPC, 3-channel PS2, 5v $8.21
bit, Two IO
watchdog, Two 14-
bit PWM
Six 8-bit, One 16- 1 Serial,2 I2C, 122 GPIO 31 6-channel 10-bit 144TQFP -20 to +75 KBD, LPC, 3-channel PS2, 5v $8.79
bit, Two IO
watchdog, Eight 8-
bit PWM

Four 8-bit, Four 2 Serial,SSU,Smart Card,2 49 8-channel 10-bit 144TQFP -20 to +75 KBD, LPC, 3-channel PS2, $13.10
16-bit, Two I2C, DTC,119 GPIO Boundary scan, 5v IO
watchdog, Eight 8-
bit PWM, Two 14-
bit PWM

Four 8-bit, Three 1 Serial, Smart card,3 I2C,125 41 16-channel 10- 144 TQFP, -20 to +75 LPC, 4-channel PS2 $10.48
16-bit, Two GPIO bit 176LFBGA
watchdog, Eight 8-
bit PWM, Two 14-
bit PWM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 108
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics H8/2117 H8 20 24/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide,
16x16+32->32
or 16x16+42-
>42 MAC

Renesas Electronics H8/2134 H8 10 24/16 8, 16, 32 2.7 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2138 H8 10 24/16 8, 16, 32 2.7 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2140B H8 20 24/16 8, 16, 32 4 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2144B H8 20 24/16 8, 16, 32 4 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2168 H8 33 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2172 H8 33 24/16 8, 16, 32 3 to 3.6 Four modes 8x8, 16x16
America Inc (H8S/2100) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2212 H8 24 24/16 8, 16, 32 2.7 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2214 H8 16 24/16 8, 16, 32 2.7 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2215 H8 16 24/16 8, 16, 32 2.7 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2215R H8 24 24/16 8, 16, 32 2.7 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2215T H8 24 24/16 8, 16, 32 2.7 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2218 H8 24 24/16 8, 16, 32 2.7 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2238B H8 13.5 24/16 8, 16, 32 2.7 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2238R H8 13.5 24/16 8, 16, 32 2.7 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2239 H8 20 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2265 H8 13.5 24/16 8, 16, 32 3 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2266 H8 20.5 24/16 8, 16, 32 4 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Page 109 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Four 8-bit, Ten 16- 3 Serial,Smart card,3 I2C, 141 41 16-channel 10- 144 TQFP, -20 to +75 4-channel TCM, 3-channel $7.74
bit, Two GPIO bit 145TFLGA TDP, LPC
watchdog, Two 8-
bit PWM, Two 14-
bit PWM

Three 8-bit, One 3 Serial, IrDA,66 GPIO 15 8-channel 10-bit, 80QFP, -20 to +75 $9.40
16-bit, Two 2-channel 8-bit 80TQFP
watchdog, Two 14- DAC
bit PWM
Four 8-bit, One 3 Serial,IrDA,2 I2C, DTC,66 15 8-channel 10-bit, 80 QFP, -20 to +75 X-Bus, KBD, TMC $9.75
16-bit, Two GPIO 2-channel 8-bit 80TQFP
watchdog, DAC
Sixteen 8-bit
PWM, Two 14-bit
PWM
Four 8-bit, One 3 Serial,l,IrDA,2 I2C, DTC, 82 31 8-channel 10-bit, 100QFP, 100 -40 to +85 X-Bus, KBD, 3-channel PS2, $9.28
16-bit, Two GPIO 2-channel 8-bit TQPF, TMC, 5v IO
watchdog, DAC 144TQPF
Sixteen 8-bit
PWM, Two 14-bit
PWM
Three 8-bit, One 3 Serial,IrDA, 66 GPIO 23 8-channel 10-bit, 80QFP -20 to +75 $6.55
16-bit, Two 2-channel 8-bit
watchdog, Two 14- DAC
bit PWM
Four 8-bit, One 3 Serial,IrDA,Smart cards,6 41 8-channel 10-bit, 144TQFP -20 to +75 LPC, CRC, HSS, Boundary $16.88
16-bit, Two I2C, DTC,115 GPIO 2-channel 8-bit scan, 5v IO
watchdog, DAC
Sixteen 8-bit
PWM, Four 14-bit
PWM
Two 8-bit, 1 Serial, 76 GPIO 9 100TQFP -20 to +75 USB 2.0 High Speed, DRAMC $10.11
watchdog

Three 16-bit, 2 Serial,Smary Cards, 37 7 6-channel 10-bit 64 LQFP, -20 to +75 USB, Boot from USB, RTC, $6.79
watchdog GPIO 64VQFN HSS

Three 16-bit, 3 Serial, DTC,81 GPIO 9 1-channel 8-bit 112TFBGA -20 to +75 HSS $9.56
watchdog DAC

Two 8-bit, Three 3 Serial, Smart Card, DTC, 75 8 6-channel 10-bit, 112 LFBGA, -40 to +85 USB, Boundary scan, HSS $13.07
16-bit, watchdog GPIO 2-channel 8-bit 120TQFP
DAC

Two 8-bit, Three 3 Serial, Smart Card, DTC, 75 8 6-channel 10-bit, 112 LFBGA, -20 to +75 USB, Boot from USB, $8.10
16-bit, watchdog GPIO 2-channel 8-bit 120TQFP Boundary scan, HSS
DAC

Two 8-bit, Three 3 Serial, Smart Card, 75 GPIO 8 6-channel 10-bit, 112LFBGA, -20 to +75 USB, Boot from USB, $8.21
16-bit, watchdog 2-channel 8-bit 120TQFP Boundary scan, HSS
DAC

Three 16-bit, 2 Serial, Smart Card, 69 GPIO 7 6-channel 10-bit 100 TQFP, -20 to +75 USB, Boot from USB, $8.69
watchdog 112LFBGA Boundary scan, RTC, HSS

Four 8-bit, Six 16- 4 Serial, Smart Card,2 I2C, 9 8-channel 10-bit, 100QFP, 100 -40 to +85 PC Break $12.44
bit, Two watchdog DTC, 82 GPIO 2-channel 8-bit TQPF
DAC

Four 8-bit, Six 16- 4 Serial, Smart Card,2 I2C, 9 8-channel 10-bit, 100 QFP, -40 to +85 PC Break $11.76
bit, Two watchdog DTC, 82 GPIO 2-channel 8-bit 100TQFP,
DAC 112TFBGA,
112 LFBGA
Four 8-bit, Six 16- 4 Serial, Smart Card,2 I2C, 9 8-channel 10-bit, 100QFP, -20 to +75 PC Break, HSS $12.38
bit, Two watchdog DTC, 82 GPIO 2-channel 8-bit 100TQFP,
DAC 112TFBGA

Four 8-bit, Three 3 Serial, Smart Card,2 I2C, 14 10-channel 10- 100 QFP, -20 to +75 PC Break, 40x4 LCDC, DTMF, $9.38
16-bit, watchdog DTC,78 GPIO bit, 2-channel 8- 100TQFP HSS
bit DAC

Four 8-bit, Three 3 Serial, Smart Card,2 I2C, 14 10-channel 10- 100QFP, -20 to +75 PC Break, 40x4 LCDC, DTMF, $9.75
16-bit, watchdog DTC, 78 GPIO bit ADC, 2- 100TQFP HSS
channel 8-bit
DAC

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 110
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics H8/2268 H8 20.5 24/16 8, 16, 32 4 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2200) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2319 H8 25 24/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2329 H8 25 24/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2339 H8 25 24/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2357 H8 20 24/16 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2368 H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2378 H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2378R H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2398 H8 20 24/16 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc (H8S/2300) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2472 H8 34 24/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc (H8S/2400) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2506 H8 26 24/16 8, 16, 32 3 to 5.5 Six modes 8x8, 16x16
America Inc (H8S/2500) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2552 H8 26 24/16 8, 16, 32 3 to 5.5 Six modes 8x8, 16x16
America Inc (H8S/2500) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2556 H8 20 24/16 8, 16, 32 3 to 5.5 Six modes 8x8, 16x16
America Inc (H8S/2500) multiply, 16/8,
32/16 divide

Renesas Electronics H8/2612 H8 20 24/16 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2628 H8 24 24/16 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2633 H8 28 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2639 H8 20 24/16 8, 16, 32 4.5 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Page 111 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Four 8-bit, Three 3 Serial, Smart Card,2 I2C, 14 10-channel 10- 100QFP, -20 to +75 PC Break, 40x4 LCDC, DTMF, $11.00
16-bit, watchdog DTC,78 GPIO bit, 2-channel 8- 100TQFP HSS
bit DAC

Two 8-bit, Six 16- 2 Serial, Smart Card, DTC, 79 9 8-channel 10-bit, 100 QFP, 100 -20 to +75 $18.48
bit, watchdog GPIO 2-channel 8-bit TQFP,
DAC 113TFLGA

Two 8-bit, Six 16- 3 Serial, Smart Card, DTC, 95 9 8-channel 10-bit, 120TQFP, -40 to +85 DRAMC $12.99
bit, watchdog, 16- GPIO 2-channel 8-bit 128QFP
bit waveform DAC
generator

Two 8-bit, Six 16- 3 Serial, Smart Card, DTC,118 9 12-channel 10- 144QFP -40 to +85 DRAMC $12.86
bit, watchdog, 16- GPIO bit, 4-channel 8-
bit waveform bit DAC
generator

Two 8-bit, Six 16- 3 Serial, Smart Card, DTC, 95 9 8-channel 10-bit, 128QFP, -40 to +85 DRAMC $18.21
bit, watchdog, 16- GPIO 2-channel 8-bit 120TQFP
bit waveform DAC
generator

Two 8-bit, Six 16- 5 Serial, IrDA, Smart card, 2 9 10-channel 10- 120TQFP, -20 to +75 DRAMC, HSS $8.81
bit, watchdog, 16- I2C, DTC, 94 GPIO bit, 2-channel 8- 128QFP,
bit waveform bit DAC
generator

Two 8-bit, Six 16- 5 Serial,IrDA,Smart card,2 17 16-channel 10- 144LQFP, -20 to +75 DRAMC, 2-ch EXDMAC $11.43
bit, watchdog, 16- I2C, DTC,113 GPIO bit, 6-channel 8- 145TFLGA
bit waveform bit DAC
generator

Two 8-bit, Six 16- 5 Serial,IrDA,Smart card,2 17 16-channel 10- 144LQFP, 145 -40 to +85 SDRAM, 2-ch EXDMAC, HSS $11.14
bit, watchdog, 16- I2C, DTC, 113 GPIO bit, 6-channel 8- TFLGA
bit waveform bit DAC
generator

Two 8-bit, Six 16- 3 Serial,Smart card, DTC, 95 9 8-channel 10-bit, 120 TQPF, -40 to +85 DRAMC $5.57
bit, watchdog, 16- GPIO 2-channel 8-bit 128QFP
bit waveform DAC
generator

Two 8-bit, One 16- 2 Serial,3 SSU,Smart card, 6 33 8-channel 10-bit 144 LQFP, -20 to +75 14-bit PWM, LPC, Ethernet $8.13
bit, watchdog, I2C, DTC,119 GPIO 176LFBGA Ctrl, USB, Boundary scan,
Four 14-bit PWM CRC, SCI with FIFO, PECI

Four 8-bit, Six 16- 5 Serial,Smart card,2 I2C, 9 16-channel 10- 176LFBGA -40 to +85 PC Break, Dual VccIO $16.88
bit, Two watchdog DTC, 120 GPIO bit, 2-channel 8-
bit DAC

Four 8-bit, Six 16- 5 Serial,Smart card,2 I2C, 9 16-channel 10- 144 QFP, -40 to +85 PC Break, Dual VccIO, IEBus
bit, Two watchdog DTC,120 GPIO bit, 2-channel 8- 176LFBGA
bit DAC

Four 8-bit, Six 16- 5 Serial,Smart card,2 9 16-channel 10- QFP -40 to +85 PC Break, Dual VccIO $16.25
bit, Two watchdog I2C,CAN, DTC,120 GPIO bit, 2-channel 8-
bit DAC

Six 16-bit, 3 Serial,Smart card, CAN, 7 12-channel 10- 80QFP -20 to +75 PC Break, MMT $10.00
watchdog, 8-bit DTC, 56 GPIO bit
waveform
generator, MMT

Four 8-bit, Six 16- 2 Serial,2 SSU, Smart Card, 7 16-channel 10- 100QFP -20 to +75 PC Break $10.00
bit, watchdog, 8- CAN , DTC,76 GPIO bit
bit Waveform
generator

Four 8-bit, Six 16- 5 Serial,IrDA,Smart Card,2 9 16-channel 10- 120 TQFP, -40 to +85 PC Break, DRAMC $15.00
bit, Two I2C, DTC, 89 GPIO bit, 4-channel 8- 128QFP
watchdog, 8-bit bit DAC
waveform
generator, Four
14-bit PWM
Six 16-bit, 3 Serial, Smart Card,2 CAN, 7 12-channel 10- 128 QFP -40 to +85 15 mA IO, PC Break $16.24
watchdog, 8-bit DTC,84 GPIO bit, 2-channel 8-
waveform bit DAC
generator, One
Motor Control
PWM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 112
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics H8/2643 H8 25 24/16 8, 16, 32 3 to 3.6 Eight modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2648 H8 20 24/16 8, 16, 32 4.5 to 5.5 Eight modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2667 H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2670 H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2674R H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/2676 H8 33 24/16 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc (H8S/2600) multiply,
16x16+32,
16x16+42

Renesas Electronics H8/36014 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/36024 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/36037 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36049 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36057 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36064 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/36077 (H8/Tiny) H8 16 16/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36079 (H8/Tiny) H8 20 16/16 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36087 (H8/Tiny) H8 18 16/16 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36094 (H8/Tiny) H8 20 16/16 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36109 (H8/Tiny) H8 20 16/16 8, 16, 32 3 to 5.5 Five modes 8x8, 16x16
America Inc

Renesas Electronics H8/36902 (H8/Tiny) H8 12 16/16 8, 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/36912 (H8/Tiny) H8 12 16/16 8, 16, 32 3 to 5.5 Four modes 8x8, 16x16
America Inc

Renesas Electronics H8/38004 (H8/SLP) H8 4 16/8 16, 32 2.2 to 3.6 Seven modes 8x8
America Inc

Renesas Electronics H8/38024R H8 10 16/8 16, 32 2.7 to 3.6 Eight modes 8x8
America Inc (H8/SLP)

Page 113 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Four 8-bit, Six 16- 5 Serial,IrDA,Smart Card,2 9 16-channel 10- 144 QFP -20 to +75 PC Break, DRAMC $14.40
bit, Two I2C, DTC, 111 GPIO bit, 4-channel 8-
watchdog, 16-bit bit DAC
Waveform
generator
Six 16-bit, 3 Serial, Smart Card, CAN, 7 12-channel 10- 144 QFP -20 to +75 15 mA IO, PC Break, 24x4 $26.28
watchdog, 8-bit DTC, 108 GPIO bit LCDC
waveform
generator, One
Motor Control
PWM
Two 8-bit, Six 16- 3 Serial, IrDA,Smart Card, 9 12-channel 10- 144 LQFP -20 to +75 HSS $11.66
bit, watchdog, 8- DTC, 115 GPIO bit, 4-channel 8-
bit waveform bit DAC
generator

Two 8-bit, Six 16- 3 Serial, IrDA,Smart Card, 17 12-channel 10- 144 QFP -20 to +75 4-ch EXDMAC, DRAMC $6.25
bit, watchdog, 16- DTC,115 GPIO bit, 4-channel 8-
bit waveform bit DAC
generator

Two 8-bit, Six 16- 3 Serial, IrDA,Smart Card, 17 12-channel 10- 144 LQFP -40 to +85 SDRAM, 4-ch EXDMAC, HSS $8.25
bit, watchdog, 16- DTC,115 GPIO bit, 4-channel 8-
bit waveform bit DAC
generator

Two 8-bit, Six 16- 3 Serial, IrDA,Smart Card, 17 12-channel 10- 144 QFP -20 to +75 4-ch EXDMAC, DRAMC $12.50
bit, watchdog, 16- DTC, 115 GPIO bit, 4-channel 8-
bit waveform bit DAC
generator

One 8-bit, One 16- 2 Serial, 34 GPIO 11 4-channel 10-bit 64LQFP, -40 to +85 WDTO $4.16
bit, watchdog 48LQFP,
48VQFN
One 8-bit, One 16- 3 Serial, 34 GPIO 11 4-channel 10-bit 48LQFP, -20 to +75 WDTO $4.29
bit, watchdog 64LQFP,
48VQFN
Two 8-bit, Two 16- 1 Serial,SSU,CAN, 53 GPIO 11 8-channel 10-bit 64QFP, -20 to +75 1-channel 8-bit sub-system $5.60
bit, watchdog 64LQFP timer with on-chip oscillator

Two 8-bit, Three 3 Serial, I2C, 67 GPIO 11 8-channel 10-bit 80QFP -20 to +75 RTC, WDTO $5.36
16-bit, watchdog,
One 14-bit PWM

Two 8-bit, Two 16- 2 Serial,SSU,CAN, 53 GPIO 11 8-channel 10-bit 64QFP, -20 to +75 1-channel 8-bit sub-system $5.71
bit, watchdog 64LQFP timer with on-chip oscillator

Two 8-bit, Two 16- 2 Serial,I2C, 53 GPIO 11 8-channel 10-bit 64QFP. 64 -20 to +75 WDTO $2.98
bit, watchdog, LQFP
One 14-bit PWM

Two 8-bit, Two 16- 2 Serial,I2C, 55 GPIO 11 8-channel 10-bit 64QFP, -40 to +85 RTC, WDTO $3.75
bit, watchdog, 64LQFP
One 14-bit PWM

Two 8-bit, Two 16- 2 Serial,I2C, 55 GPIO 11 8-channel 10-bit 64QFP, -40 to +85 RTC, WDTO $4.88
bit, watchdog, 64LQFP
One 14-bit PWM

Two 8-bit, Two 16- 2 Serial,I2C, 53 GPIO 11 8-channel 10-bit 64LQFP -20 to +75 RTC, WDTO $4.88
bit, watchdog,
One 14-bit PWM

Two 8-bit, One 16- 1 Serial,I2C, 39 GPIO 11 8-channel 10-bit 64QFP, -20 to +75 WDTO $4.50
bit, watchdog 64LQFP,
48LQFP
Two 8-bit, Three 3 Serial,I2C, 87 GPIO 11 16-channel 10- 100LQFP.100 -20 to +75 RTC, Band Gap regulator, $6.08
16-bit, watchdog, bit QFP WDTO
One 14-bit PWM

One 8-bit, One 16- 1 Serial, 22 GPIO 4 4-channel 10-bit 32LQFP -20 to +75 WDTO $2.26
bit, watchdog

Two 8-bit, One 16- 1 Serial,I2C, 22 GPIO 4 4-channel 10-bit 32LQFP -20 to +75 WDTO $2.38
bit, watchdog

One 8-bit, One 16- 1 Serial, 50 GPIO 11 4-channel 10-bit 64LQFP -40 to +85 16-bit AEC, 25x4 LCDC, 2-ch $3.10
bit, watchdog 64QFP 10-bit PWM

Three 8-bit, One 1 Serial, 66 GPIO 13 8-channel 10-bit 80QFP, -40 to +85 16-bit AEC, 32x4 LCDC, 2-ch $3.81
16-bit, watchdog 80TQFP, 10-bit PWM
85TFLGA

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 114
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics H8/38076R H8 10 16/8 16, 32 2.7 to 3.6 Seven modes 8x8
America Inc (H8/SLP)

Renesas Electronics H8/38086R H8 10 16/8 16, 32 2.7 to 3.6 Seven modes 8x8
America Inc (H8/SLP)

Renesas Electronics H8/38099 (H8/SLP) H8 10 16/8 16, 32 2.7 to 3.6 Seven modes 8x8
America Inc

Renesas Electronics H8/38104 (H8/SLP) H8 20 16/8 16, 32 2.7 to 5.5 Seven modes 8x8
America Inc

Renesas Electronics H8/38124 (H8/SLP) H8 20 16/8 16, 32 2.7 to 5.5 Eight modes 8x8
America Inc

Renesas Electronics H8/3827 (H8/SLP) H8 16 16/8 16, 32 2.7 to 5.5 Eight modes 8x8
America Inc

Renesas Electronics H8/38347 (H8/SLP) H8 16 16/8 16, 32 2.7 to 5.5 Eight modes 8x8
America Inc

Renesas Electronics H8/38447 (H8/SLP) H8 16 16/8 16, 32 2.7 to 5.5 Eight modes 8x8
America Inc

Renesas Electronics H8/38524 (H8/SLP) H8 10 16/8 16, 32 2.7 to 5.5 Eight modes 8x8
America Inc

Renesas Electronics H8/38602R H8 10 16/8 16, 32 1.8 to 3.6 Seven modes 8x8
America Inc (H8/SLP)

Renesas Electronics H8/38776 (H8/SLP) H8 10 16/8 16, 32 2.7 to 3.6 Seven modes 8x8
America Inc

Renesas Electronics H8/38799 (H8/SLP) H8 4.2 16/8 16, 32 1.8 to 3.6 Eight modes 8x8
America Inc

Renesas Electronics H8X/1582 (H8SX) H8X 48 32/32 8, 16, 32 4.5 to 5.5 Five modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1622 (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1638 (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1648 (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1650 (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1651 (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1657 (H8SX) H8X 35 32/32 8, 16, 32 3 to 3.6 Six modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics H8X/1658R (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Seven modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Page 115 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Three 16-bit, 3 Serial, IrDA, I2C, 63 GPIO 14 8-channel 10-bit 80QFP, -40 to +85 RTC, 16-bit AEC, 32x4 LCDC $4.16
watchdog, Two 14- 80TQFP,
bit PWM 85TFLGA
Three 16-bit, 3 Serial, IrDA, I2C, 63 GPIO 14 3-channel 10-bit 80QFP, -40 to +85 RTC, 16-bit AEC, 32x4 LCDC, $4.16
watchdog, Two 14- 80TQFP, 2-ch 14-bit Sigma-Delta ADC
bit PWM 85TFLGA
Two 8-bit, Three 4 Serial, IrDA, I2C, 83 GPIO 14 8-channel 10-bit 100 LQFP -40 to +85 16-bit AEC, RTC, 40x4 LCDC
16-bit, watchdog,
Four 14-bit PWM

One 8-bit, One 16- 1 Serial, 49 GPIO 11 4-channel 10-bit 64QFP, -40 to +85 16-bit AEC, 25x4 LCDC, 2-ch $3.10
bit, watchdog 64LQFP 10-bit PWM

Three 8-bit, One 1 Serial, 65 GPIO 13 8-channel 10-bit 80TQFP, -40 to +85 16-bit AEC, 32x4 LCDC, 2-ch $3.34
16-bit, watchdog 80QFP 10-bit PWM

Three 8-bit, 2 Serial, 64 GPIO 13 8-channel 10-bit 80 QFP -20 to +75 16-bit AEC, 32x4 LCDC $3.93
One16-bit, 80 TQFP
watchdog, 14-bit
PWM
Three 8-bit, One 3 Serial, 84 GPIO 13 12-channel 10- 100 QFP -40 to +85 16-bit AEC, 40x4 LCDC $4.16
16-bit, watchdog, bit 100 TQFP
14-bit PWM

Three 8-bit, One 3 Serial, 84 GPIO 13 12-channel 10- 100 QFP -40 to +85 16-bit AEC, 40x4 LCDC $4.16
16-bit, watchdog, bit 100 TQFP
14-bit PWM

Three 8-bit, One 1 Serial, 65 GPIO 13 8-channel 10-bit 80 QFP, 80 -40 to +85 16-bit AEC, 32x4 LCDC, $3.58
16-bit, watchdog TQFP Internal power supply step
down circuit, 2-ch 10-bit PWM

One 8-bit, One 16- 1 Serial, SSU, IrDA, I2C, 19 4 6-channel 10-bit 32 LQFP, -40 to +85 RTC, 16-bit AEC, 2-ch $2.26
bit, watchdog GPIO 32VQFN comparator

Three 16-bit, 3 Serial, IrDA, I2C, 63 GPIO 14 8-channel 10-bit 80 TQFP, -40 to +85 RTC, 16-bit AEC $4.16
watchdog, Two 14- 80QFP
bit PWM
Two 8-bit, 3 16- 4 Serial, SSU, Smart Card, 83 14 8-channel 10-bit 100 LQFP -40 to +85 4-ch 14-bit PWM, 2-ch 16-bit $5.95
bit, watchdog, GPIO TPU, 16-bit AEC, RTC
Four 14-bit PWM

Twelve 16-bit, 2 Serial,3 SSU, Samrt Card, 17 16-channel 10- 120 LQFP -20 to +85 $14.29
watchdog, 8-bit DTC, 99 GPIO bit
waveform
generator

Four 8-bit, Six 16- 5 Serial,Smart Card, 2 I2C, 17 8-channel 10-bit, 145 TFLGA, -40 to +85 UBC, 6-ch 16-bit Sigma-Delta $8.75
bit, watchdog, 16- DTC, 91 GPIO 2-channel 8-bit 144LQFP ADC
bit Waveform DAC
generator

Eight 8-bit, 7 Serial,IrDA,Smart Card,2 17 8-channel 10-bit, 120 LQFP -20 to +75 UBC, Boundary scan $9.88
Twelve 16-bit, I2C, DTC, 91 GPIO 2-channel 8-bit
watchdog, 32-bit DAC
Waveform
Generator
Eight 8-bit, 7 Serial, IrDA,Smart Card,4 17 12-channel 10- 144 LQFP -20 to +75 UBC, Boundary scan $10.48
Twelve 16-bit, I2C, DTC,110 GPIO bit, 2-channel 8-
watchdog, 32-bit bit DAC
Waveform
Generator
Four 8-bit, Six 16- 4 Serial, Smart Card, DTC,90 13 8-channel 10-bit, 120 LQFP -40 to +85 HSS $4.83
bit, watchdog, 16- GPIO 2-channel 8-bit
bit Waveform DAC
generator

Four 8-bit, Six 16- 4 Serial, IrDA, Smart Card, 13 8-channel 10-bit, 120 LQFP -20 to +75 HSS $5.24
bit, watchdog, 16- DTC,90 GPIO 2-channel 8-bit
bit Waveform DAC
generator

Four 8-bit, Six 16- 4 Serial, Smart Card DTC,,90 13 8-channel 10-bit, 120 TQFP -40 to +85 HSS $12.77
bit, watchdog, 16- GPIO 2-channel 8-bit
bit Waveform DAC
generator

Eight 8-bit, 6 Serial, IrDA,Smart Card,2 13 12-channel 10- 120 TQFP -20 to +75 CRC, HSS, USB, 4-ch $10.48
Twelve 16-bit, I2C, DTC,84 GPIO bit, 2-channel 8- EXDMAC
watchdog, 16-bit bit DAC
Waveform
Generator

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 116
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics H8X/1668R (H8SX) H8X 50 32/32 8, 16, 32 3 to 3.6 Five modes 8x8, 16x16
America Inc 32x32 multiply,
16x16+32,
16x16+42

Renesas Electronics M16C/245 (M16C) M16C 16 20/16 16 3 to 3.6 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/26A M16C 20 20/16 16 2.7 to 5.5 Four modes 16x16 multiply
America Inc (M16C/Tiny)

Renesas Electronics M16C/28 M16C 20 20/16 16 2.7 to 5.5 Four modes 16x16 multiply
America Inc (M16C/Tiny)

Renesas Electronics M16C/28B M16C 24 20/16 16 2.7 to 5.5 Four modes 16x16 multiply
America Inc (M16C/Tiny)

Renesas Electronics M16C/29 M16C 20 20/16 16 2.7 to 5.5 Four modes 16x16 multiply
America Inc (M16C/Tiny)

Renesas Electronics M16C/30P (M16C) M16C 16 20/16 16 2.7 to 5.5 Two modes 16x16 multiply
America Inc

Renesas Electronics M16C/62P (M16C) M16C 24 20/16 16 2.7 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/64 M16C 25 20/16 16 2.7 to 5.5 20 mA Three modes; 16x16+32
America Inc 3.0 µA

Renesas Electronics M16C/64 (M16C) M16C 25 20/16 16 2.7 to 5.5 Two modes 16x16 multiply
America Inc

Renesas Electronics M16C/65 M16C 32 20/16 16 2.7 to 5.5 24 mA Three modes; 16x16+32
America Inc 3.0 µA

Renesas Electronics M16C/6N4 (M16C) M16C 24 20/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/6N5 (M16C) M16C 24 20/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/6NK (M16C) M16C 24 20/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/6NL (M16C) M16C 24 20/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/6NM (M16C) M16C 24 20/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/6NN (M16C) M16C 24 20/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M16C/6S (M16C) M16C 15.36 20/16 16 3 to 3.6 Four modes 16x16 multiply
America Inc

Renesas Electronics M32C/83 M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M32C/84 M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Page 117 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Eight 8-bit, 6 Serial, IrDA,Smart Card,2 13 12-channel 10- 176 LFBGA -20 to +75 UBC, USB, 24-bit Subclock $11.08
Twelve 16-bit, I2C, DTC,101 GPIO bit, 2-channel 8- 144 LQFP Timer (TM32K), Boundary
watchdog, 32-bit bit DAC Scan, 4-ch EXDMAC
Waveform
Generator
Five 16-bit, 4 Serial,I2C, 85 GPIO 4 8-channel 10-bit 100 LQFP -20 to +85 IEBus, SSI, USB, CRC, AND $10.00
watchdog Flash Control Circuit

Eight 16-bit, 3 Serial, I2C,39 GPIO 8 12-channel 10- 42 SSOP, -20 to +85 CRC,1-channel IEBus, 3-phase $4.86
watchdog bit 48LQFP PWM

Nine 16-bit, 5 Serial,2 I2C, 71 GPIO 8 24-channel 10- 20 LSSOP, 64 -20 to +85 1-channel IEBus, 3-phase
watchdog bit LQFP, PWM, 1-channel 16-bit IC/OC
85TFLGA
80LQFP
Nine 16-bit, 5 Serial,2 I2C 71 GPIO 8 24-channel 10- 80 LQFP -40 to +85 1-channel IEBus, 3-phase
watchdog bit PWM, 1-channel 16-bit IC/OC

Nine 16-bit, 5 Serial,2 I2C, CAN, 71 GPIO 8 27-channel 10- 64LQFP, 80 -20 to +85 1-channel IEBus, 3-phase $7.60
watchdog bit LQFP PWM, CRC, 1-channel 16-bit
IC/OC
Six 16-bit, 3 Serial,3 I2C, 88 GPIO 7 18-channel 10- 100 QFP, 100 -20 to +85 CRC, IEBus $3.88
watchdog bit LQFP

Eleven 16-bit, 5 Serial,3 I2C, 114 GPIO 8 26-channel 10- 80/100 QFP, -20 to +85 3-channel IEBus, 3-phase $12.00
watchdog bit, 2-channel 8- 128/100 LQFP PWM, CRC
bit DAC
Eleven 16-bit, I²C, IEBus, Six 13 external 26-channel, 10- 100 QFP, 100 -40 to +85 External Bus Expansion, three- $3.95 to
watchdog (a)synchronous, up to 88 bit; two-channel, LQFP phase motor controller, clock $5.10
GPIO 8-bit DAC stop detect, power-on reset,
low voltage detect, CRC block,
X-Y convertor, low-speed on-
chip OSC

Eleven 16-bit, 8 Serial, Smart Card,6 I2C, 88 13 26-channel 10- 100QFP, -20 to +85 6-channel IEBus, 3-phase $6.14
watchdog GPIO bit, 2-channel 8- 100LQFP PWM, CRC
bit DAC
Eleven 16-bit, Multi-master I²C, IEBus, Six 10, 13 external 26-channel, 10- 80 QFP, 100, -40 to +85 External Bus Expansion, three- $4.35 to
watchdog, Week (a)synchronous, up to 114 bit; two-channel, 128 LQFP phase motor controller, clock $6.50
realtime GPIO 8-bit DAC stop detect, power-on reset,
low voltage detect, CRC block,
X-Y convertor, low- and high-
speed on-chip OSC, remote
control receiver, CEC block

Eleven 16-bit, 4 Serial,3 I2C,2 CAN, 88 GPIO 9 26-channel 10- 100 LQFP -40 to +85 3-channel IEBus, 3-phase $13.10
watchdog bit, 2-channel 8- PWM, CRC
bit DAC
Eleven 16-bit, 4 Serial,3 I2C, CAN, 88 GPIO 9 26-channel 10- 100 LQFP -40 to +85 3-channel IEBus, 3-phase $11.00
watchdog bit, 2-channel 8- PWM, CRC
bit DAC
Eleven 16-bit, 5 Serial,3 I2C,2 CAN, 88 GPIO 9 26-channel 10- 100 LQFP -40 to +85 3-channel IEBus, 3-phase $15.00
watchdog bit, 2-channel 8- PWM, CRC
bit DAC
Eleven 16-bit, 5 Serial,3 I2C,CAN, 88 GPIO 9 26-channel 10- 100 LQFP -40 to +85 3-channel IEBus, 3-phase
watchdog bit, 2-channel 8- PWM, CRC
bit DAC
Eleven 16-bit, 7 Serial,3 I2C,2 CAN, 114 12 26-channel 10- 128 LQFP -40 to +85 3-channel IEBus, 3-phase $15.63
watchdog GPIO bit, 2-channel 8- PWM, CRC
bit DAC
Eleven 16-bit, 7 Serial,3 I2C,CAN, 114 GPIO 12 26-channel 10- 128 LQFP -40 to +85 3-channel IEBus, 3-phase $15.00
watchdog bit, 2-channel 8- PWM, CRC
bit DAC
Five 16-bit, 5 Serial, 3 I2C, 22 GPIO 3 64 LQFP -20 to +85 AFE (Analog Front End using 3- $8.93
watchdog ch 1-bit ADC & 1-ch 10-bit
DAC), IT800 Modem core

Eleven 16-bit, 5 Serial,5 I2C,CAN, 124 GPIO 8 34-channel 10- 100 QFP, 100 -20 to +85 Two ADC circuits, X-Y $26.06
watchdog bit,2-channel 8- LQFP, 144 converter, 3-phase PWM,
bit DAC LQFP CRC, DMAC II, DRAMC, 5-ch
IEBus, Intelligent IO (12-ch 16-
bit IC; 28-ch 16-bit OC; HDLC)

Eleven 16-bit, 5 Serial,5 I2C,CAN, 124 GPIO 8 34-channel 10- 100 QFP, 100 -20 to +85 X-Y converter, 3-phase PWM, $16.88
watchdog bit,2-channel 8- LQFP, 144 CRC, DMAC II, 5-ch IEBus,
bit DAC LQFP Intelligent IO (8-ch 16-bit IC; 8-
ch 16-bit OC; HDLC)

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 118
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics M32C/85 M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M32C/87A M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M32C/87B M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M32C/8A M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M32C87 M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics M33C/80 M16C 32 24/16 16 3 to 5.5 Four modes 16x16 multiply
America Inc

Renesas Electronics R32C Series Industrial, Medical, Motor FPU 50 26/64 16 3.0 to 5.5 28 mA Three
America Inc R32C/111 control, Consumer External:8/16

Renesas Electronics R32C Series Industrial, Medical, Motor FPU 50 26/64 16 3.0 to 5.5 35 mA Three
America Inc R32C/118 control External:8/16

Renesas Electronics R32C/111 M16C 50 32/64 32 3.0 to 5.5 32 mA Three modes; 32x32+64
America Inc R32C/100 Series 5.0 µA

Renesas Electronics R32C/116 M16C 50 32/64 32 3.0 to 5.5 32 mA Three modes; 32x32+64
America Inc R32C/100 Series 5.0 µA

Renesas Electronics R32C/117 M16C 50 32/64 32 3.0 to 5.5 32 mA Three modes; 32x32+64
America Inc R32C/100 Series 5.0 µA

Renesas Electronics R32C/118 M16C 50 32/64 32 3.0 to 5.5 32 mA Three modes; 32x32+64
America Inc R32C/100 Series 5.0 µA

Renesas Electronics R8C/Tiny Series M16C 16 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/10 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/11 multiply

Renesas Electronics R8C/Tiny Series M16C 16 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/12 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/13 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/18 multiply

Page 119 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Eleven 16-bit, 5 Serial,5 I2C,2 CAN, 124 8 34-channel 10- 100 QFP, 144 -20 to +85 X-Y converter, 3-phase PWM, $17.50
watchdog GPIO bit,2-channel 8- LQFP144 CRC, DMAC II, 5-ch IEBus,
bit DAC LQFP Intelligent IO (8-ch 16-bit IC; 8-
ch 16-bit OC; HDLC)

Eleven 16-bit, 7 Serial,IrDA,5 I2C, CAN, 124 11 34-channel 10- 100 QFP, 100 -20 to +85 X-Y converter, 3-phase PWM, $16.43
watchdog GPIO bit,2-channel 8- LQFP, CRC, DMAC II, 5-ch IEBus,
bit DAC 144LQFP Intelligent IO (8-ch 16-bit IC; 16-
ch 16-bit OC; HDLC)

Eleven 16-bit, 7 Serial,IrDA,5 I2C,124 GPIO 11 34-channel 10- 100 LQFP, 100 -20 to +85 X-Y converter, 3-phase PWM, $16.08
watchdog bit,2-channel 8- QFP144LQFP CRC, DMAC II, 5-ch IEBus,
bit DAC Intelligent IO (8-ch 16-bit IC; 16-
ch 16-bit OC; HDLC)

Eleven 16-bit, 5 Serial, 5 I2C,46 GPIO 11 10-channel 10- 100 LQFP -20 to +85 X-Y converter, 3-phase PWM, $5.00
watchdog bit, 2-channel 8- Cold/Warm Start-Up Detect,
bit DAC CRC, DMAC II, 5-ch IEBus

Eleven 16-bit, 7 Serial, IrDA,5 I2C, 2 CAN, 11 34-channel 10- 100 QFP, -20 to +85 X-Y converter, 3-phase PWM, $16.79
watchdog 124 GPIO bit,2-channel 8- 100LQFP, 144 CRC, DMAC II, 5-ch IEBus,
bit DAC LQFP Intelligent IO (8-ch 16-bit IC; 16-
ch 16-bit OC; HDLC)

Eleven 16-bit, 5 Serial,5 I2C, 48 GPIO 8 10-channel 10- 100 QFP -20 to +85 X-Y converter, 3-phase PWM, $5.25
watchdog bit, 2-channel 8- 100LQFP CRC, DMAC II, 2-ch HDLC, 5-
bit DAC ch IEBus, External ROM
version with built-in Boot loader

64-Byte 256- to 512-kbyte Serial Interface, I2C, 20/26 channel 64/100 LQFP, -20 to +85 Motor control timers, on-chip $6.95 to
instruction Flash, 31- to 63- watchdog, DMA 10-bit; Two 100 LFBGA -40 to +85 debug $8.10
kbyte RAM, 8- channel 8-bit
kbyte data Flash DAC

64-Byte 384-kbyte to 1- Serial Interface, I2C, 26/36 channel 100/144 LQFP -40 to +85 Motor control timers, on-chip $9.20 to
instruction Megabyte Flash, watchdog, DMA 10-bit; Two debug $11.00
40- to 63-kbyte channel 8-bit
RAM, 8-kbyte DAC
data Flash

Single- 64-Byte Eleven 16-bit, I²C, IEBus, SPI, Nine 11 external 26-channel 10- 64, 100 LQFP -40 to +85 External Bus Expansion, three- $5.00 to
precision instruction watchdog, 24- (a)synchronous, up to 86 bit; 2-channel 8- phase motor controller, clock $5.80
channel IC/OC GPIO bit DAC stop detect, power-on reset,
low voltage detect, CRC block,
X-Y convertor

Single- 64-Byte Eleven 16-bit, Multi-master I²C, IEBus, SPI, 11, 14 external 26- to 34- 100, 144 LQFP -40 to +85 External Bus Expansion, three- $5.40 to
precision instruction watchdog, 24- Nine (a)synchronous, up to channel 10-bit; 2- phase motor controller, clock $7.40
channel IC/OC 122 GPIO channel 8-bit stop detect, power-on reset,
DAC low voltage detect, CRC block,
X-Y convertor

Single- 64-Byte Eleven 16-bit, Multi-master I²C, IEBus, SPI, 11, 14 external 26- to 34- 100, 144 LQFP -40 to +85 External Bus Expansion, three- $8.25 to
precision instruction watchdog, 24- Nine (a)synchronous, up to channel 10-bit; 2- phase motor controller, clock $11.10
channel IC/OC 122 GPIO channel 8-bit stop detect, power-on reset,
DAC low voltage detect, 1-channel
CAN, CRC block, X-Y
convertor

Single- 64-Byte Eleven 16-bit, Multi-master I²C, IEBus, SPI, 11, 14 external 26- to 34- 100, 144 LQFP -40 to +85 External Bus Expansion, three- $9.00 to
precision instruction watchdog, 24- Nine (a)synchronous, up to channel 10-bit; 2- phase motor controller, clock $11.50
channel IC/OC 122 GPIO channel 8-bit stop detect, power-on reset,
DAC low voltage detect, 2-channel
CAN, CRC block, X-Y
convertor

Three 8-bit, One 2 Serial, 24 GPIO 5 8-channel 10-bit 32 LQFP -40 to +85 $2.25
16-bit, watchdog

Three 8-bit, One 2 Serial, 24 GPIO 5 12-channel 10- 32 LQFP -40 to +85 $2.31
16-bit, watchdog bit

Three 8-bit, One 2 Serial, 24 GPIO 5 8-channel 10-bit 32 LQFP -40 to +85 $2.44
16-bit, watchdog

Three 8-bit, One 2 Serial, 24 GPIO 5 12-channel 10- 32 LQFP -40 to +85 $2.50
16-bit, watchdog bit

Two 8-bit, One 16- 2 Serial, 16 GPIO 4 20SDIP, 28 -40 to +85 4-channel comparator, WDTO $1.81
bit, watchdog HWQF, 20
LSSOP

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 120
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All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/19 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/1A multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/1B) multiply

Renesas Electronics R8C/Tiny Series M16C 16 16/8 16 3 to 5.5 Four modes 8x8, 16x16
America Inc R8C/21 multiply

Renesas Electronics R8C/Tiny Series M16C 16 16/8 16 3 to 5.5 Four modes 8x8, 16x16
America Inc R8C/22 multiply

Renesas Electronics R8C/Tiny Series M16C 16 16/8 16 3 to 5.5 Four modes 8x8, 16x16
America Inc R8C/23 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/24 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/25 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/26 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/27 multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2A multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2B multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2C multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2D multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2E multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.7 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2F multiply

Renesas Electronics R8C/Tiny Series M16C 8 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2G multiply

Renesas Electronics R8C/Tiny Series M16C 8 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2H multiply

Renesas Electronics R8C/Tiny Series M16C 8 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2J multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2K multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Four modes 8x8, 16x16
America Inc R8C/2L multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 1.8 to 5.5 Four modes 8x8, 16x16
America Inc R8C/33A multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/34E µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/34F µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/34G µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/34H µA

Page 121 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Two 8-bit, One 16- 2 Serial, 16 GPIO 4 20 SDIP, 28 -40 to +85 4-channel comparator, WDTO $2.00
bit, watchdog HWQFN, 20
LSSOP
Two 8-bit, One 16- 2 Serial,SSU,I2C,16 GPIO 4 4-channel 10-bit 20SDIP, -40 to +85 WDTO $1.88
bit, watchdog 28HWQFN,
20LSSOP
Two 8-bit, One 16- 2 Serial,SSU,I2C,16 GPIO 4 4-channel 10-bit 20SDIP, -40 to +85 WDTO $2.06
bit, watchdog 28HWQFN,
20LSSOP
Three 8-bit, Two 2 Serial, SSU,I2C, LIN, 44 5 12-channel 10- 48 LQFP -40 to +125 WDTO $3.39
16-bit, watchdog GPIO bit

Three 8-bit, Two 2 Serial, SSU,I2C,CAN,LIN,44 6 12-channel 10- 48 LQFP -40 to +125 WDTO $4.11
16-bit, watchdog GPIO bit

Three 8-bit, Two 2 Serial, SSU,I2C,CAN,LIN,44 6 12-channel 10- 48 LQFP -40 to +125 WDTO $3.93
16-bit, watchdog GPIO bit

Three 8-bit, Two 2 Serial, SSU,I2C,LIN,44 5 12-channel 10- 52 LQFP -40 to +85 WDTO, RTC $2.75
16-bit, watchdog GPIO bit

Three 8-bit, Two 2 Serial, SSU,I2C,LIN,44 5 12-channel 10- 52 LQFP -40 to +85 WDTO, RTC $2.94
16-bit, watchdog GPIO bit

Three 8-bit, One 2 Serial, SSU,I2C,LIN,28 4 12-channel 10- 32 LQFP -40 to +85 WDTO, RTC $2.38
16-bit, watchdog GPIO bit

Three 8-bit, One 2 Serial, SSU,I2C,LIN,28 4 12-channel 10- 32 LQFP -40 to +85 WDTO, RTC $2.56
16-bit, watchdog GPIO bit

Three 8-bit, Four 3 Serial, SSU,I2C,LIN,57 5 12-channel 10- 64 LQFP, 64 -40 to +125 WDTO, RTC $3.50
16-bit, watchdog GPIO bit TFLGA

Three 8-bit, Four 3 Serial, SSU,I2C,LIN,57 5 12-channel 10- 64 TFLGA, -40 to +85 WDTO, RTC $3.69
16-bit, watchdog GPIO bit, 2-channel 8- 64LQFP
bit DAC
Three 8-bit, Four 3 Serial, SSU,I2C,LIN,73 5 20-channel 10- 80 LQFP -40 to +85 WDTO, RTC $3.75
16-bit, watchdog GPIO bit, 2-channel 8-
bit DAC
Three 8-bit, Four 3 Serial, SSU,I2C,LIN,73 5 20-channel 10- 80 LQFP -40 to +85 WDTO, RTC $3.94
16-bit, watchdog GPIO bit, 2-channel 8-
bit DAC
Three 8-bit, One 1 Serial, LIN, 28 GPIO 4 12-channel 10- 32 LQFP -40 to +85 WDTO, 2 Comparators $2.38
16-bit, watchdog bit, 2-channel 8-
bit DAC
Three 8-bit, One 1 Serial, LIN,28 GPIO 4 12-channel 10- 32 LQFP -40 to +85 WDTO, 2 Comparators $2.56
16-bit, watchdog bit, 2-channel 8-
bit DAC
Three 8-bit, One 2 Serial, LIN,28 GPIO 5 32 LQFP -40 to +85 WDTO, 2 Comparators, RTC $2.25
16-bit, watchdog

Three 8-bit, One 2 Serial, LIN,16 GPIO 3 20 LSSOP -40 to +85 WDTO, 2 Comparators, RTC $1.63
16-bit, watchdog

Two 8-bit, One 16- 1 Serial, LIN,12 GPIO 3 20 LSSOP -40 to +85 WDTO, 2 Comparators $1.38
bit, watchdog

2 8-bit, Three 16- 2 Serial, LIN,28 GPIO 4 9-channel 10-bit 32 LQFP -40 to +85 WDTO $2.25
bit, watchdog

2 8-bit, Three 16- 2 Serial, LIN,28 GPIO 4 9-channel 10-bit 32 LQFP -40 to +85 WDTO $2.44
bit, watchdog

Three 8-bit, One 3 Serial, SSU,Smart card, 7 12-channel 10- 32 LQFP -20 to +85 WDTO, Comparator A & B,
16-bit, watchdog I2C,LIN, DTC,28 GPIO bit, 2-channel 8- IEBus, Data Flash with BGO,
bit DAC Internal ADC Voltage
Reference
Three 16-bit, 43 GPIO, two (a)synchronous, 4 external, 12 channel 10- 48 LQFP -40 to +85 Ring oscillator, clock stop
three 8-bit, CAN each bit detect, power-on reset, low
watchdog peripheral voltage detect, LIN
Three 16-bit, 43 GPIO, two (a)synchronous, 4 external, 12 channel 10- 48 LQFP -40 to +85 Ring oscillator, clock stop
three 8-bit, CAN each bit detect, power-on reset, low
watchdog peripheral voltage detect, LIN
Three 16-bit, 43 GPIO, two (a)synchronous 4 external, 12 channel 10- 48 LQFP -40 to +85 Ring oscillator, clock stop
three 8-bit, each bit detect, power-on reset, low
watchdog peripheral voltage detect, LIN
Three 16-bit, 43 GPIO, two (a)synchronous 4 external, 12 channel 10- 48 LQFP -40 to +85 Ring oscillator, clock stop
three 8-bit, each bit detect, power-on reset, low
watchdog peripheral voltage detect, LIN

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 122
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 1.8 to 5.5 Four modes 8x8, 16x16
America Inc R8C/35A multiply

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/36E µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/36F µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/36G µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/36H µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/38E µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/38F µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/38G µA

Renesas Electronics R8C/Tiny Series M16C 20 16/8 16 2.2 to 5.5 Six modes; 0.7 8x8, 16x16
America Inc R8C/38H µA

Renesas Electronics SH-2 Seies SuperH 80 32,32 16 4.5 to 5.5 Five modes 32x32+64
America Inc SH/7147

Renesas Electronics SH-2 Series SuperH 50 32/32 16 4.5 to 5.5 220 mA Four modes 32x32+64
America Inc SH7047F

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7083F 4.5 to 5.5

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7084F 4.5 to 5.5

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7085F 4.5 to 5.5

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7086F 4.5 to 5.5

Renesas Electronics SH-2 Series SuperH 50 32/32 16 4.0 to 5.5 Four modes 32x32+64
America Inc SH7124F

Renesas Electronics SH-2 Series SuperH 50 32/32 16 4.5 to 5.5 Four modes 32x32+64
America Inc SH7125F

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7136 4.5 to 5.5

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7137 4.5 to 5.5

Renesas Electronics SH-2 Series SuperH 50 32/32 16 3 to 3.6 160 mA Three modes 32x32+64
America Inc SH7144F

Renesas Electronics SH-2 Series SuperH 50 32/32 16 3 to 3.6 160 mA Three modes 32x32+64
America Inc SH7145F

Renesas Electronics SH-2 Series SuperH 80 32/32 16 4.0 to 5.5 Four modes 32x32+64
America Inc SH7146F

Renesas Electronics SH-2 Series SuperH 80 32/32 16 4.0 to 5.5 Four modes 32x32+64
America Inc SH7149F

Renesas Electronics SH-2 Series SuperH 80 32/32 16 3.0 to 3.6 / Four modes 32x32+64
America Inc SH7149F 4.5 to 5.5

Page 123 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Three 8-bit, Three 3 Serial, SSU,Smart card, 9 12-channel 10- 52 LQFP -20 to +85 WDTO, Comparator A & B,
16-bit, watchdog I2C,LIN,DTC,48 GPIO bit, 2-channel 8- IEBus, Data Flash with BGO,
bit DAC Internal ADC Voltage
Reference
Five 16-bit, four 8- 59 GPIO, two (a)synchronous, 4 external, 16 channel 10- 64 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog CAN each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 59 GPIO, two (a)synchronous, 4 external, 16 channel 10- 64 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog CAN each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 59 GPIO, two (a)synchronous 4 external, 16 channel 10- 64 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 59 GPIO, two (a)synchronous 4 external, 16 channel 10- 64 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 75 GPIO, two (a)synchronous, 4 external, 20 channel 10- 80 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog CAN each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 75 GPIO, two (a)synchronous, 4 external, 20 channel 10- 80 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog CAN each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 75 GPIO, two (a)synchronous 4 external, 20 channel 10- 80 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog each bit detect, power-on reset, low
peripheral voltage detect, LIN
Five 16-bit, four 8- 75 GPIO, two (a)synchronous 4 external, 20 channel 10- 80 LQFP -40 to +85 Ring oscillator, clock stop
bit, watchdog each bit detect, power-on reset, low
peripheral voltage detect, LIN
Ten 16-bit, 3 Serial,SSU,CAN,DTC, 73 5 16-channel 12- 100 LQFP -40 to +85 Two ADC circuits, 5-ch 16-bit
watchdog GPIO bit ADC MTU2, 3-ch 16-bit MTU2S,
Port Output Enable, 2-ch CMT,
UBC, AUD

7 16-bit timers, 3 (a)synchronous, CAN, 53 8 external 2 eight-channel, 100 QFP -40 to +85 Data-transfer controller, on- $13.35
6-phase Motor I/O, 16 Input only 10-bit chip debug
Management,
watchdog,
Up to 12 PWM
11 16-bit, 4 (a)synchronous, SPI- 9 external 2 eight-channel, 100 TQFP -40 to +85 Data-transfer controller, on- $13.99
watchdog, compatible, 65 I/O, 8 Input 10-bit chip debug
Up to 12 PWM only
11 16-bit, 4 (a)synchronous, SPI- 9 external 2 eight-channel, 112 LQFP -40 to +85 Data-transfer controller, on- $14.35
watchdog, compatible, I²C, 76 I/O, 8 Input 10-bit chip debug
Up to 12 PWM only
11 16-bit, 4 (a)synchronous, SPI- 9 external 2 eight-channel, 144 LQFP -40 to +85 Data-transfer controller, on- $14.55
watchdog, compatible, I²C, 100 I/O, 8 10-bit chip debug
Up to 12 PWM input only
11 16-bit, 4 (a)synchronous, SPI- 9 external 3 16-channel, 10- 176 LQFP -40 to +85 Data-transfer controller, on- $15.48
watchdog, compatible, I²C, 118 I/O, 16 bit chip debug
Up to 12 PWM input only
8 16-bit, 3 (a)synchronous, 23 I/O, 8 4 external 8-channel, 10-bit 48 LQFP, -40 to +85 On-chip debug $5.10
watchdog, Up to Input only 52 VQFN
12 PWM
8 16-bit, 3 (a)synchronous, 37 I/O, 8 5 external 8-channel, 10-bit 64 QFP, -40 to +85 On-chip debug $7.75
watchdog, Up to Input only 64 LQFP,
12 PWM 64 VQFN
11 16-bit, 3 (a)synchronous, 3 SPI, I2C, 5 external 2 6-channel with 80 LQFP -40 to +85 On-chip debug $12.45
watchdog, Up to CAN, 44 I/O, 12 Inputs only 3 S/H each, 12-
12 PWM bit

11 16-bit, 3 (a)synchronous, 3 SPI, I2C, 5 external 2 8-channel with 100 LQFP -40 to +85 On-chip debug $11.90
watchdog, Up to CAN, 57 I/O, 16 Inputs only 3 S/H each, 12-
12 PWM bit

7 16-bit, 4 (a)synchronous, I²C, 74 I/O, 9 external 8-channel, 10-bit 112 QFP -40 to +85 Data-transfer controller, on- $11.90
watchdog, Up to 8 Input only chip debug
12 PWM
7 16-bit, 4 (a)synchronous, I²C, 98 I/O, 9 external 8-channel, 10-bit 144 LQFP -40 to +85 Data-transfer controller, on- $12.26
watchdog, Up to 8 Input only chip debug
12 PWM
11 16-bit, 3 (a)synchronous, 45 I/O, 12 9 external 3 12-channel, 10- 80 LQFP -40 to +85 Data-transfer controller, on- $10.45
watchdog, Up to Input only bit chip debug
12 PWM
11 16-bit, 3 (a)synchronous, 63 I/O, 12 9 external 3 12-channel, 10- 100 LQFP, -40 to +85 Data-transfer controller, on- $10.24
watchdog, Up to Input only bit 100 QFP chip debug
12 PWM
11 16-bit, Three (a)synchronous 9 external Triple 12- 100 LQFP -40 to +85 Data-transfer controller, on- $8.09
watchdog channel, 10-bit chip debug

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 124
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics SH2A Series Automotive, Consumer, FPU 200 32/32 16, 32 1.2 / 3.3 Four
America Inc SH7203 Audio

Renesas Electronics SH2-A Series Industrial, Medical, Motor 160 32/32 16, 32 1.5 / 3.3 400 mA Three
America Inc SH7211 control External:16

Renesas Electronics SH-2A Series SuperH 160 32/32 16, 32 1.5 / 3.3 Three modes 32x32+64
America Inc SH7211F

Renesas Electronics SH-2A Series SuperH 160 32/32 16, 32 1.5 / 3.3 Three modes 32x32+64
America Inc SH7211F

Renesas Electronics SH-2A Series SuperH 100 32/32 16 3.0 to 5.5 Three modes 32x32+64
America Inc SH7243

Renesas Electronics SH-2A Series Automotive, Consumer, FPU 144 32/32 16 1.2 / 3.3 Four
America Inc SH7262 Industrial, Medical, Audio External:16

Renesas Electronics SH-2A Series Automotive, Consumer, FPU 200 32/32 External 16 1.2 / 3.3 Four
America Inc SH7263 Audio 16/32

Renesas Electronics SH-2A Series Automotive, Consumer, FPU 144 32/32 16 1.2 / 3.3 Four
America Inc SH7264 Industrial, Medical, Audio External:16

Renesas Electronics SH-2A Series SuperH 100 32/32 16 3.0 to 3.6 / Three modes 32x32+64
America Inc SH7285 4.5 to 5.5

Renesas Electronics SH-2A Series SuperH 100 32/32 16 3.0 to 3.6 / Three modes 32x32+64
America Inc SH7286 4.5 to 5.5

Renesas Electronics SH2-A Series Industrial, Medical, Motor 100 32/32 16, 32 3.0 to 5.5 180 mA Three
America Inc SH7286 control External:32, 16

Renesas Electronics SH2A Series Industrial, Medical, Motor FPU 200 32/32 16, 32 1.2 / 3.3 Four
America Inc SH7670 control

Renesas Electronics SH2A-FPU Series SuperH 200 32/32 16, 32 1.2 / 3.3 Four modes 32x32+64
America Inc SH7203

Renesas Electronics SH2A-FPU Series SuperH 144 32/32 16, 32 1.1 / 3.3 Four modes 32x32+64
America Inc SH7262

Renesas Electronics SH2A-FPU Series SuperH 200 32/32 16, 32 1.2 / 3.3 Four modes 32x32+64
America Inc SH7263

Renesas Electronics SH2A-FPU Series SuperH 144 32/32 16, 32 1.1 / 3.3 Four modes 32x32+64
America Inc SH7264

Renesas Electronics SH2A-FPU Series SuperH 200 32/32 16, 32 1.2 / 3.3 Four modes 32x32+64
America Inc SH7670

Page 125 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
8-kbyte 32-kbyte RAM, 7 16-bit, watchdog , Four I²C, Eight-channel 10- 240 QFP -40 to +85 NAND, 2-ch sound, 2-ch CAN, $12.75
SRAM, ROM, six (a)synchronous bit; two-channel, LCD, USB Host High Speed,
SDRAM, eight- 8-bit DAC USB Function High Speed, SD,
channel DMAC ADC/DAC
512-kbyte ROM, Serial Interface, I2C, Eight channel 12- 144 LQFP -40 to +85 Motor control timers, on-chip $14.15
32-kbyte RAM watchdog, DMA bit; Two channel debug
8-bit DAC

11 16-bit, 4 (a)synchronous, I²C, 75 I/O 9 external 8-channel 12-bit; 144 LQFP -20 to +85 On-chip debug $17.69
watchdog, Up to 2-channel, 8-bit
12 PWM DAC
8 16-bit, I²C, four (a)synchronous 9 external Eight-channel 12- 144 LQFP -20 to +85 On-chip debug $17.00
watchdog bit; two-channel,
8-bit DAC

11 16-bit, 4 (a)synchronous, SPI, I2C, 9 external 8-channel with 3 100 LQFP -40 to +85 On-chip debug $12.20
watchdog, USB FS Device, 63 I/O, 8 S/H, 12-bit
Up to 12 PWM Inputs only
8-kbyte 64-kbyte SRAM , 7 16-bit, watchdog, Realtime four channel 10- 176 QFP -40 to +85 Video/LCDC, , USB host high $10
instruction, 8- 640K/1-Mbyte clock, Three I²C, 10 bit speed, USB function high
kbyte operand VRAM , ROM, (a)synchronous serial comms speed, SDHC SPI BOOT NOR
Bootable NAND, Flash, bootable NAND, 2-ch
SPI Flash CAN, on-chip debug, sample
SDRAM, 16- rate converter, CDROM DEC,
channel DMAC IE Bus, Serial Sound, SPDIF

8-kbyte 64-kbyte RAM, Eight-channel 10-bit; two- Eight channel 10- 240 QFP -40 to +85 LCDC, SDMC, Two-channel $12
SRAM, ROM, channel, 8-bit DAC, 7 16-bit, bit; Two channel CAN, on-chip debug, sample
SDRAM, eight- watchdog, Four I²C, six 8-bit DAC rate converter, CDROM DEC,
channel DMAC (a)synchronous IE Bus
8-kbyte 64-kbyte SRAM , 7 16-bit, watchdog, Realtime Eight channel 10- 208 QFP -40 to +85 Video/LCDC, , USB host high $10
instruction, 8- 640K/1-Mbyte clock, Three I²C, 10 bit ADC speed, USB function high
kbyte operand VRAM , ROM, (a)synchronous serial comms speed, SDHC SPI BOOT NOR
Bootable NAND, Flash, bootable NAND, 2-ch
SPI Flash CAN, on-chip debug, sample
SDRAM, 16- rate converter, CDROM DEC,
channel DMAC IE Bus, Serial Sound, SPDIF

11 16-bit, 4 (a)synchronous, 2 SPI, I2C, 9 external 8-channel with 3 114 LQFP -40 to +85 On-chip debug $17.15
watchdog, USB FS Device, 92 I/O, 12 S/H, 12-bit
Up to 12 PWM Inputs only
11 16-bit, 4 USART, 2 SPI, 1 I2C, CAN, 9 external 12-channel with 176 LQFP -40 to +85 On-chip debug $18.45
watchdog, USB FS Device, 101 I/O, 12 3 S/H, 12-bit,
Up to 12 PWM Inputs only 2 8-bit DACs
1024-kbyte ROM, USB, CAN, Serial Interface, Twelve channel 176 LQFP -40 to +85 Motor control timers, on-chip $16.10
32-kbyte RAM I2C, SPI, watchdog, DMA, 12-bit; Two debug
DTC channel 8-bit
DAC
8-kbyte 32-kbyte RAM, 7 16-bit, watchdog, four I²C, Eight-channel 10- 240 QFP -40 to +85 USB Host High Speed, USB $12.25
SRAM, ROM, six (a)synchronous bit; two-channel, Function High Speed, Ethernet
SDRAM, eight- 8-bit DAC 10/100, SD, 2-ch sound
channel DMAC
Single- and 8-kbyte Multifunction, Four I²C, six (a)synchronous 17 external Eight-channel 10- 240 QFP -40 to +85 Hisgh Speed USB Host, High $12.35
double- compare match, bit; two-channel, Speed USB function, LCDC, 2-
precision realtime,7 16-bit, 8-bit DAC ch CAN, on-chip debug, IE Bus
watchdog
Single- and 8-kbyte Multifunction, Three I²C, Five 17 external Eight-channel 10- 176 QFP -40 to +85 Video/LCDC, , USB host high $11.50
double- instruction/ 8K compare match, (a)synchronous, bit; two-channel, speed, USB function high
precision byte operand realtime,7 16-bit, 8-bit DAC speed, SDHC SPI BOOT NOR
watchdog Flash, bootable NAND, 2-ch
CAN, on-chip debug, sample
rate converter, CDROM DEC,
IE Bus, Serial Sound, SPDIF

Single- and 8-kbyte Multifunction, Four I²C, six (a)synchronous 17 external Eight-channel 10- 240 QFP -40 to +85 Hisgh Speed USB Host, High $12.35
double- instruction/ 8K compare match, bit; two-channel, Speed USB function, SDHC,
precision byte operand realtime,7 16-bit, 8-bit DAC LCDC, 2-ch CAN, on-chip
watchdog debug, sample rate converter,
CDROM DEC, IE Bus

Single- and 8-kbyte Multifunction, Threer I²C, six (a)synchronous 17 external Eight-channel 10- 208 QFP -40 to +85 Video/LCDC, , USB host high $12.00
double- instruction/ 8K compare match, bit; two-channel, speed, USB function high
precision byte operand realtime,7 16-bit, 8-bit DAC speed, SDHC SPI BOOT NOR
watchdog Flash, bootable NAND, 2-ch
CAN, on-chip debug, sample
rate converter, CDROM DEC,
IE Bus, Serial Sound, SPDIF

Single- and 8-kbyte 7 16-bit, Four I²C, six (a)synchronous 17 external Eight-channel 10- 240 QFP -40 to +85 USB Host High Speed, USB $10.00
double- watchdog bit; two-channel, Function High Speed, Ethernet
precision 8-bit DAC 10/100, SD, 2-ch sound

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 126
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics SH-4A Series Consumer, Computers FPU 266 32/32 16 1.2 / 3.3 Three
America Inc SH7763 and peripherals

Renesas Electronics SH-4A Series SuperH 266 32/32 16, 32 1.2 / 3.3 Three modes 32x32+64
America Inc SH7763

Renesas Electronics SH-4A Series FPU 300 26/32 16 1.2 / 3.3 Three modes
America Inc SH77650

Renesas Electronics SH-4A Series Automotive, Consumer, FPU 400 32/32 16 1.25 / 3.3 1W Three
America Inc SH7770 Mobile/wireless

Renesas Electronics SH-4A Series SuperH 400 32/32 16, 32 1.25 / 3.3 1.5 W Four modes 32x32+64
America Inc SH7780

Renesas Electronics SH-4A Series SuperH 400 32/32 16, 32 1.25 / 3.3 Four modes 32x32+64
America Inc SH7781

Renesas Electronics SH-4A Series Automotive, Consumer FPU 600 32 16 1.1 / 3.3 / Three
America Inc SH7785 1.5 DDR

Renesas Electronics SH-4A Series SuperH 600 32/32 16, 32 1.1 / 3.3 Two modes 32x32+64
America Inc SH7785

Renesas Electronics SH4A-FPU Series Consumer FPU 400 32/32 128 1.2 / 3.3 300 mA Five
America Inc SH7723

Renesas Electronics SH4A-FPU Series SuperH 400 32/32 128 1.2 / 3.3 300 mA Five modes 16x16
America Inc SH7723

Renesas Electronics SH4-DSP Series Automotive, H.264/MP4 333 32/32 16 1.2 / 3.3 300 mA Five
America Inc SH7722 Communication/wired, codec, 2D
Consumer, Imaging and graphics
video, Mobile/wireless engine, JPEG
image engine

Renesas Electronics SH4-DSP Series SuperH 333 32/32 128 1.2 / 3.3 300 mA Five modes 16x16
America Inc SH7722

Renesas Electronics SH-Tiny Series SuperH 50 32/32 16 4.5 to 5.5 Four modes 32x32+64
America Inc SH/7125

Renesas Electronics V850E/Dx3 NEC V850 48 32 32, 16 4.5 to 5.5 Halt, Idle, 16x16, 32x32
America Inc Watch, Sub- multiply
Watch, Stop

Page 127 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-kbyte, four- 16-kbyte RAM, 10 32-bit, 1 16-bit, real-time, Eight-channel, 449 BP -20 to +75 Dual Gbit Ethernet MAC, $17.00
way set DDR-SDRAM, I²C, Five serial, PCI 10-bit; two- LCDC, USB host & function,
associative SRAM, ROM, six channel, 8-bit audio interface, On-chip debug
channel DMAC DAC

Single- and 32-kbyte, four- Yes 10 32-bit, 1 16- I²C, Five serial, PCI 33 external Eight-channel, 449 BP -20 to +75 Dual Gbit Ethernet MAC, $20.80
double- way set bit, realtime 10-bit; two- LCDC, USB host & function,
precision associative channel, 8-bit audio interface, On-chip debug
DAC
32-kbyte, four- 256-kbyte RAM Two serial SCI, two I2C, two 4-channel, 10- 376 BGA -40 to +85 Image processing unit (IMP), $51
way set channels CAN, 3 video input bit; two-channel, On-chip debug
associative (8bit) with extension to 10b., 8-bit DAC

64-kbyte, four- 16-kbyte DDR- Nine 16-bit, watchdog, twelve 520 BP -40 to +85 USB Host/Function, LCD $35
way set SDRAM, SRAM, serial controller, audio, graphics, on-
associative ROM, 36-channel chip debug
DMA

Single- and 32-kbyte, four- Yes 10 32-bit, realtime Five serial, PCI 60, 11 external 449 BP -40 to +85 On-chip debug $30.00
double- way set
precision associative

Single- and 32-kbyte, four- Yes 10 32-bit, realtime Five serial, PCI 60, 11 external 449 BP -40 to +85 IPSec, On-chip debug $35.00
double- way set
precision associative

32-kbyte for 8-kbyte + 16- Six 32-bit, Four 16-bit, 436 BGA -40 to +85 $60.74
instructions, kbyte high-speed watchdog, three serial
32-kbyte for RAM, 128-kbyte
data, four-way medium-speed
set associative RAM, DDR2-
SDRAM, SRAM,
ROM, PCMCIA,
12-channel
DMAC

Single- and 32-kbyte, four- Yes Six 32-bit Six serial, PCI 9 external 436 BP -40 to +85 Display unit, On-chip debug $38.00
double- way set
precision associative

32-kbyte L1, 16-kbyte RAM, 3-ch 32-bit PWM, serial, 2-ch Four channel 10- 449 BP - 20 to +70 Camera video process, H.264 $21.50
256K L2 DDR1-SDRAM, serial FIFO, 3-ch serial comm, bit, Enc/Dec + WMV Dec, LCD, 2D
12 channel DMAC SIM, IRDA, I²C,USB Host key scan graphics engine, NAND, JPEG,
function, ATAPI controller SD, transport stream

32/32-kbyte Yes 6 32-bit, 16-bit Serial, 2-ch serial FIFO, 3-ch 9 external 449 BP - 20 to +70 Camera video process, video $20.80
instruction/ope pulse unit, 32-bit serial comm, SIM, IRDA, procesing H.264/MPEG4, LCD,
rand 256- compare match, 3- I²C,USB Host function 2D graphics engine, NAND,
kbyte mixed channel 32-bit JPEG, SD, transport stream,
PWM USB 2.0 host and function High
speed, ATAPI,Key-scan,
onchip debug

32/32-kbyte, 128-kbyte RAM, LCD, I2C, USB, JPEG 449 BP -20 to +70 Camera video process, H.264 $18.00
four-way set SDRAM, SRAM, accelerator, VPU4, 2D graphic Enc/Dec, LCD, 2D graphics
associative ROM, PCMCIA, accelerator,SD, NAND/AND, egine, NAND, JPEG, SD<
six channel 32-bit PWM, Serial, 2-ch serial transport system
DMAC FIFO,IRDA,SPI3-ch

32-kbyte Yes 3-channel 32-bit Serial, 2-ch serial FIFO, 3-ch 9 external 449 BP - 20 to +70 Camera video process, video $17.70
PWM serial comm, SIM, IRDA, procesing, LCD, 2D graphics
I²C,USB Host function engine, NAND, JPEG, SD,
transport stream, USB host and
function High speed, Key-scan,
onchip debug

Eight 16-bit, 3 Serial, 45 GPIO 5 8-channel 10-bit 48 LQFP, 64 -40 to +85 Two ADC circuits, 6-ch 16-bit $7.86
watchdog LQFP, 64 MTU2, Port Output Enable, 2-
QFP, 52 ch CMT, UBC, 15 mA IO
VQFN, 64 VQF

16-bit, PWM, CSI, UART, LIN, CAN, I²C 4 to 8 external, 8- to 16-channel, 100/144/208 -40 to +85 Stepper motor driver, sound
stepper motor 47 to 91 10-bit QFP generator, power-on clear, low-
controller, sound internal voltage indicator, LCD
generator, controller
watchdog

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 128
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Renesas Electronics V850E/IF3 NEC V850 64 32, 16 3.5 to 5.5 64 mA Halt, Idle, Stop; 16x16->32,
America Inc 40 µA 32x32-
>64multiply

Renesas Electronics V850E/IG3 NEC V850 64 16/16 32, 16 3.5 to 5.5 64 mA Halt, Idle, Stop; 16x16->32,
America Inc 40 µA 32x32-
>64multiply

Renesas Electronics V850E/PHO3 NEC V850 128 22/32 non- 32, 16 1.5 / 3.3 Halt 16x16, 32x32
America Inc multiplexed multiply

Renesas Electronics V850ES/Fx3 NEC V850 32, 48 24/16 32, 16 3.3 to 5.5 63 mA Halt, Idle 1/2, 16x16 ->32
America Inc sub-idle, Stop; multiply
7.5 µA
Renesas Electronics V850ES/Fx3-L NEC V850 20 24/16 32, 16 3.3 to 5.5 25 mA Halt, Idle 1/2, 16x16 ->32
America Inc sub-idle, Stop; multiply
7.5 µA
Renesas Electronics V850ES/Hx2 NEC V850 20 16/16 32, 16 3.5 to 5.5 40 mA (5V) Halt, idle1, 16x16
America Inc idle2, sub, sub-
idle, stop, 6 µA

Renesas Electronics V850ES/Hx3 NEC V850 32 16/16 32, 16 3.3 to 5.5 40 mA Halt, Idel1/2, 16 x16 -> 32;
America Inc Sub-clock, Sub- 32 x 32 -> 64
Idle, Stop; 10.5
µA
Renesas Electronics V850ES/IE2 NEC V850 32 32, 16 3.5 to 5.5 55 mA (5V) Halt, Idle, Stop 16X16, 32x32
America Inc

Renesas Electronics V850ES/Jx2 NEC V850 20 24/16 32, 16 2.85 to 3.6 30 mA (3V) Halt, idle1, 16x16
America Inc idle2, sub, sub-
idle, stop, 6 µA

Renesas Electronics V850ES/Jx3 NEC V850 32 24/16 32, 16 2.85 to 3.6 40 mA Halt, Idel1/2, 16 x16 -> 32;
America Inc Sub-clock, Sub- 32 x 32 -> 64
Idle, Stop; 8 µA

Renesas Electronics V850ES/Jx3-H NEC V850 48 24/16 32, 16 2.85 to 3.6 60 mA Halt, Idel1/2, 16 x16 -> 32;
America Inc Sub-clock, Sub- 32 x 32 -> 64
Idle, Stop; 10 µA

Renesas Electronics V850ES/Jx3-L NEC V850 20 22/16 32, 16 2.2 to 3.6 12 mA Halt, Idel1/2, 16 x16 -> 32;
America Inc Sub-clock, Sub- 32 x 32 -> 64
Idle, Stop; 1.5
µA
Renesas Electronics V850ES/Kx2 NEC V850 20 24/16 32, 16 2.7 to 5.5 55 mA (5V) Halt, idle, sub, 16x16
America Inc sub-idle, stop,
0.1 µA

Renesas Electronics V850ES/Sx3 NEC V850 32 24/16 32, 16 3.0 to 3.6 57 mA Halt, idle1, idle 16x16
America Inc 2, sub-idle, stop
9 µA
Renesas Electronics V850ESJx3-U NEC V850 48 24/16 32, 16 2.85 to 3.6 60 mA Halt, Idel1/2, 16 x16 -> 32;
America Inc Sub-clock, Sub- 32 x 32 -> 64
Idle, Stop; 10 µA

ROHM BU1511KV2 Automotive, Security, ARM946E-S 32.768/41 32 16/32 1.5 12 mW


Imaging and video

Samsung S3C2410 ARM920T 200, 266 27/32 16, 32 1.8 / 3.3 225 mW (1.8V) Sleep, idle
Electronics

Samsung S3C2412 ARM926EJ-S 200, 266 27/32 16, 32 1.2 / (1.8 / Normal, idle, DSP
Electronics 2.5 / 3.3) stop, power-off instructions

Samsung S3C2413 ARM926EJ-S 266 27/32 16, 32 1.2 / (1.8 / Normal, idle, DSP
Electronics 2.5 / 3.3) stop, power-off instructions

Samsung S3C2440 ARM920T 300, 400, 27/32 16, 32 1.2 / 1.3 / Sleep, idle
Electronics 533 3.3
(1.8 / 2.5 /
3.3
memory)

Page 129 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-bit, watchdog, UART, CSI, I²C 15 external, 73 Dual 5-channel 80 LQFP -40 to +85 On-chip OP AMP and
PWM, Timer for internal 12-bit; 4-channel comparators, POC, LVI.
Inverter 10-bit
n+TMQOP) x 2-
channel

16-bit, watchdog, UART, CSI, I²C 21 external, 74 Dual 5-channel -40 to +85 On-chip OP AMP and
PWM, Timer for internal 12-bit; 8-channel 100 LQFP/(FP) comparators, POC, LVI.
Inverter 10-bit LQFP
n+TMQOP) x 2-
channel

Yes 16-bit, PWM, 3- CSI, UART, LIN, CAN, 14 external, Two 10-channel 357 BGA -40 to +125 Dedicated 3-phase motor
phase motor FlexRay 103 internal 10-bit Bare Die control timer with accelerator
controller, features, features for SIL level
watchdog achievement

16-bit, watchdog, UART, CSI, I²C, LIN, CAN, up to 17 up to 48- 64-176 LQFP -40 to +125 Up to five built-in CAN
PWM FCAN external, 101 channel, 10-bit controllers, POC, LVI
internal
16-bit, watchdog, UART, CSI, I²C, LIN, CAN up to 12 up to 16- 64-100 LQFP -40 to +125 POC, LVI
PWM external, 42 channel, 10-bit
internal
Watch timer, Up to 4 UART, 3 CSI 15 external, 51 10- to 24- 64/100/144 -40 to +85 POC, LVI, CLM $5 to $9
watchdog, up to 8 internal channel 10-bit LQFP, 80
16-bit PWM TQFP

up to 9 16-bit, 14 UART/LIN, CSI, I²C up to 15 up to 24-channel 64/80100/144- -40 to +85 POC, LVI, CLM, CRC
16-bit PWM, external, 63 10-bit LQFP
watchdog internal

6-channel 16-bit, UART, CSI 42 maskable, Two four- LQFP -40 to +85 POC, LVI $5.50 to
6-Phase 16-bit for non-maskable channel 10-bit $7.00
motor control
PWM, watchdog,

Watch timer, Up to 4 UART, 5 CSI, 2 I²C 9 external, 60 12- to 16- 100/144 LQFP, -40 to +85 LVI, CLM $6.50 to
watchdog, up to internal channel 10-bit; 100 QFP $11.00
12 16-bit PWM two-channel 8-
bit DAC
up to 11 16-bit, 12 UART/LIN, CSI, I²C 9 external, 60 up to 16-channel 100/144-LQFP -40 to +85 LVI, CLM, CRC
16-bit PWM, internal 10-bit; 2-channel
watchdog 8-bit DAC

13 16-bit, USB2.0 Function, UART/LIN, 20 external, 69 12-channel 10- 100/128-LQFP -40 to +85 LVI, CLM, CRC
realtime, CSI, I²C internal bit; 2-channel 8-
watchdog, 12 16- bit DAC
bit PWM
Eight 16-bit, UART/LIN, CSI, I²C 8 external, 47 up to 12-channel 80/100-LQFP -40 to +85 LVI, CLM, CRC
watchdog, nine internal 10-bit; 2-channel
16-bit PWM 8-bit DAC

Watch timer, 2 Up to 4 UART, 5 CSI, I²C 9 external, 47 Eight 10-bit; two 64/100/144 -40 to +85 $5 to $7
watchdog, up to 7 internal 8-bit DAC LQFP, 80/100
16-bit, 5 8-bit QFP
PWM
16-bit, PWM, UART, CSI, I²C, CAN, (IEBus) 8 or 9 external, 12- to 16- 100/144 QFP -40 to +85 Low-voltage indicator, D/A
watchdog 51 to 68 channel, 10-bit converter, key return
internal
13 16-bit, USB2.0 Host/Function, 20 external, 69 12-channel 10- 100/128-LQFP -40 to +85 LVI, CLM, CRC
realtime, UART/LIN, CSI, I²C internal bit; 2-channel 8-
watchdog, 12 16- bit DAC
bit PWM
Watchdog, PWM 2 UART, I2C, IIS, 16 GPIO 4 channel ADC VQFP-T144 -40 to +150 Interrupt controller, camera
(Tstg) interface, JPEG codec, TV
encoder
16-kbyte Yes Four 16-bit Three UART, two SPI, I²S, I²C, 24 external Eight-channel, 272 FBGA 0 to +70 STN/TFT LCDC, SD/MMC,
two USB host/device 10-bit -40 to +85 SMC
touchscreen
8-kbyte Yes Four 16-bit Three UART, two SPI, I²S, I²C, 24 external Eight-channel, 272 FBGA 0 to +70 STN/TFT LCDC, SD/MMC,
two USB host/device 10-bit -40 to +85 SMC
touchscreen
8-kbypte Yes Four 16-bit Three UART, two SPI, I²S, I²C, 24 external Eight-channel, 289 FBGA 0 to +70 STN/TFT LCDC,
two USB host/device 10-bit -40 to +85 2MP CAMERA,
touchscreen SD/MMC,
CF/ATA Interface
16-kbyte Yes Four 16-bit Three UART, two SPI, I²S, I²C, 24 external Eight-channel, 289 FBGA 0 to +70 STN/TFT LCDC,
AC97, two USB host/device, 10-bit -40 to +85 4MP CAMERA,
CF/ATA Interface touchscreen SD/MMC

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 130
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Samsung S3C2443 ARM920T 400, 533 26/32 16, 32 1.2 / (1.8 / Normal, idle,
Electronics 2.5 / 3.3) stop, power-off

Samsung S3C6400 ARM1176JZF 400, 533 27(16)/32 16, 32 1.2 / (1.8 / Normal, idle, SIMD DSP
Electronics 2.5 / 3.3) stop, deep intructions
stop,power-off

Semtech XE8801A Sensing CoolRISC 2 16/8 22 2.4 to 5.5 0.3 mA/MHz, Sleep, 8x8 single-
Machine not supply- hibernate, cycle
voltage- selective multiplication
dependant function disable

Semtech XE8802 Sensing CoolRISC 7 (ROM), 16/8 22 2.4 to 5.5 0.3 mA/MHz, Sleep, 8x8 single-
Machine 2.5, 5 (MTP) not supply- hibernate, cycle
(MTP) 1.2 to 5.5 voltage- selective multiplication
(ROM) dependant function disable

Semtech XE8805A Sensing CoolRISC 2 16/8 22 2.4 to 5.5 0.3 mA/MHz, Sleep, 8x8 single-
Machine not supply- hibernate, cycle
voltage- selective multiplication
dependant function disable

Semtech XE8806A Radio CoolRISC 2.5 (MTP), 16/8 22 2.4 to 5.5 0.3 mA/MHz, Sleep, 8x8 single-
Machine 7 (ROM) (MTP) not supply- hibernate, cycle
1.2 to 5.5 voltage- selective multiplication
(ROM) dependant function disable

Semtech XE8807A Radio CoolRISC 5 (MTP) 16/8 22 2.4 to 5.5 0.3 mA/MHz, Sleep, 8x8 single-
Machine not supply- hibernate, cycle
voltage- selective multiplication
dependant function disable

Sensory NLP-5x Consumer, Automotive, 80 23/16 16 2.0 to 3.6 36 mA Sleep: 50 µA, 16x16 with 32
Audio (2 chip selects idle: 60 µA bit result;
up to multiply and
8Mwords) multiply-
accumulate

Sensory RSC-4128 Consumer, Automotive, Digital filter 14.3 20/8 8 2.4 to 3.6 10 mA Sleep: 1 µA,
Audio and vector idle: 4 µA
math

Sensory RSC-464 Consumer, Automotive, Digital filter 14.3 no external 8 2.4 to 3.6 10 mA Sleep: 1 µA,
Audio and vector bus idle: 4 µA
math

Sensory SC-691 Consumer, Medical, 12.32 8 data (slave) 17 3 to 5.2 15 mA Standby: 0.05
Audio µA, sleep: 40 µA

Silicon Hive HiveFlex CSP 2000 Communication/wired, VLIW, up to 4x up to 260 Configurable/3 64, variable in 1.2, 65nm 58 mW (65nm, Software sleep
Series Mobile/wireless 32bit complex (65 nm) 2 VLIW mode 1.2V, 200 mode, clock-
MAC or FFT MHz) gating
butterfly per
cycle,
including
memory
bandwidth to
sustain these
computations

Silicon Hive HiveFlex ISP 2000 Imaging and video Up to 128-Way up to 200 Configurable/3 64, variable in 1.1 to 1.3 12 mW up to Software sleep
Series SIMD (130 nm) 2 VLIW mode 120 mW mode, clock-
(130nm, 1.2V) gating

Page 131 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-kbyte Yes Four 16-bit Four UART, two SPI(High- 24 external Eight-channel, 400 FBGA 0 to +70 STN/TFT LCDC,
speed SPI), I²S, I²C, AC97, 10-bit -40 to +85 8MP CAMERA,
two USB host/device, CF/ATA touchscreen SD/MMC, HSMMC(SDHC)
Interface
VFP 16-kbyte Yes Five 32-bit Four UART, two SPI(High- 127 external Eight-channel, 424 FBGA 0 to +70 TFT LCDC,
speed SPI), I²S, I²C, AC97, 10-bit -40 to +85 Video Codec(D1 30fps), JPEG,
PCM, USB OTG/host, touchscreen TV Encoder,
Modem Interface, 2D Graphic,
CF/ATA Interface 16MP CAMERA,
Three HSMMC(SDHC)
Three- Four 8-bits, up- 115-kbps UART, 24 PIO Up to 24, 16 16-bit, 1 to 44 LQFP -40 to +85 Prescaler with 1 Hz and 128 $4.57
instruction down, PWM, events 1000x preamp, MTP Hz interrupt
pipeline realtime, Xtal, 22- four differential -40 to +125
bit prescaler or seven pseudo- ROM
differential
inputs

Three- Four 8-bits, up- 115-kbps UART, SPI, 60 PIO Up to 24, 16 16-bit, 1 to 100 LQFP -40 to +85 Prescaler with 1 Hz and 128 $7.32
instruction down, PWM, events 1000x preamp, MTP Hz interrupt and 120 segment
pipeline realtime, Xtal, 22- four differential -40 to +125 LCD driver
bit prescaler or seven pseudo- ROM
differential
inputs, four low-
power
comparators

Three- Four 8-bits, up- 115-kbps UART, 24 PIO Up to 24, 16 16-bit, 1 to 64 LQFP -40 to +85 Prescaler with 1 Hz and 128 $4.95
instruction down, PWM, events 1000x preamp, MTP Hz interrupt
pipeline realtime, Xtal, 22- four differential -40 to +125
bit prescaler or seven pseudo- ROM
differential
inputs, 8- and 16-
bit DAC

Three- Four 8-bits, up- 115-kbps UART, 24 PIO, 156- Up to 24, 16 Four low-power 32 TQFP -40 to +85 Prescaler with 1 Hz and 128 $3.02
instruction down, PWM, kbps Bitjockey (Radio UART) events comparators MTP Hz interrupt
pipeline realtime, Xtal, 22- -40 to +125
bit prescaler ROM

Three- Four 8-bits, up- 115-kbps UART, 24 PIO, 156- Up to 24, 16 Four low-power 32 TQFP -40 to +85 Prescaler with 1 Hz and 128 $3.02
instruction down, PWM, kbps Bitjockey (Radio UART) events comparators MTP Hz interrupt
pipeline realtime, Xtal, 22-
bit prescaler

8 words 128-kbytes OTP, 4 general timers; USB1.1, SPI, UART; LCD 16 10-input, 16-bit 176 LQFP and 0 to +70 Speech recognition, speech $2 to $5
24-kbytes RAM watchdog; 1 control and drive; IR control ADC (with 2 waffle-packed synthesis, text-to-speech, MP3 (die)
audio PWM and drive; motor control (3); up microphone die library; supply regulator; POR;
to 79 GPIO preamplifiers), BOR; realtime clock; 4
16-bit 48KHz comparator inputs; PLL
stereo DAC
128-kbytes ROM, 3 general timers; 24 GPIO, 4 comparators, 8 16-bit ADC (with 100 LQFP and 0 to +70 Speech recognition, $1.50 to $3
4.8-kbytes RAM, watchdog; 1 audio wakeup preamplifier), 10- waffle-packed speech/music playback; (die)
DMA audio PWM bit DAC die realtime clock; oscillator PLL

64-kbytes ROM, 3 general timers; 16 GPIO, 4 comparators, 8 16-bit ADC (with 100 LQFP and 0 to +70 Speech recognition, $1.25 to $2
2.8-kbytes RAM, watchdog; 1 audio wakeup preamplifier), 10- waffle-packed speech/music playback; (die)
DMA audio PWM bit DAC die realtime clock; oscillator PLL

ROM, 1.36-kbyte 2 general timers 32 GPIO, 1 comparator 4 10-bit DAC 100 LQFP and 0 to +70 Speech/music $1 to $1.75
RAM waffle-packed playback/control; oscillator PLL (die)
die
Yes, Single-cycle (Core) -40 to +85 Configurable and extendible License
instruction closely coupled (characterized) core
cache memory-
subsystem with
independent and
pseudo-multiport
banks

One generic (Core) -40 to +85 Configurable and extendible License


memory, one (characterized) core
unified line buffer
memory

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 132
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Silicon Hive HiveFlex VSP 2000 Imaging and video VLIW with up to 200 Configurable/3 64, variable in 1.1 to 1.3 60 mW up to Software sleep
Series DMA up to 32- (130 nm) 2 VLIW mode 240 mW mode, clock-
Way SIMD (130nm, 1.2V) gating

Silicon Hive HiveFlex XSP 2000 General purpose VLIW, up to 8x up to 200 Configurable/3 64, variable in 1.1 to 1.3 12 mW up to Software sleep
Series 32b MAC (130 nm) 2 VLIW mode 92 mW mode, clock-
(130nm, 1.2V) gating

Silicon Laboratories C8051F02X Industrial, Test and 8051 25 16/8 8 2.7 to 3.6 / 32 mW 0.2 µA 8x8
measurement, 5 tolerant
Measurement
Communication/wired,
Mobile/wireless, Other

Silicon Laboratories C8051F04X Industrial, Test and 8051 25 16/8 8 2.7 to 3.6 / 46 mW 0.2 µA 8x8
measurement, 5 tolerant
Measurement
Communication/wired,
Mobile/wireless, Other

Silicon Laboratories C8051F06X Industrial, Test and 8051 25 16/8 8 2.7 to 3.6 / 46 mW 0.2 µA 8x8
measurement, 5 tolerant
Measurement
Communication/wired,
Mobile/wireless, Other

Silicon Laboratories C8051F0XX Industrial, Test and 8051 20 to 25 16/8 8 2.7 to 3.6 / 35 mW 5 µA 8x8
measurement, 5 tolerant
Measurement
Communication/wired,
Mobile/wireless, Other
Silicon Laboratories C8051F12X Industrial, Test and 8051 100 16/8 8 2.7 to 3.6 / 145 mW 0.2 µA 8x8, 16x16
measurement, 5 tolerant two-cycle MAC
Measurement
Communication/wired,
Mobile/wireless, Other

Silicon Laboratories C8051F13X Industrial, Test and 8051 100 16/8 8 2.7 to 3.6 / 145 mW 0.2 µA 8x8, 16x16
measurement, 5 tolerant two-cycle MAC
Measurement
Communication/wired,
Mobile/wireless, Other
Silicon Laboratories C8051F2XX Consumer, 8051 25 16/8 8 2.7 to 3.6 / 24 mW 0.1 µA 8x8
Mobile/wireless, 5 tolerant
Automotive, Other
Silicon Laboratories C8051F30X Consumer, 8051 25 16/8 8 2.7 to 3.6 / 14 mW Less than 0.1 8x8
Mobile/wireless, 5 tolerant µA
Automotive, Other
Silicon Laboratories C8051F31X Consumer, 8051 25 16/8 8 2.7 to 3.6 / 17 mW Less than 0.1 8x8
Mobile/wireless, 5 tolerant µA
Automotive, Other

Silicon Laboratories C8051F32X Computers Peripherals 8051 25 16/8 8 2.7 to 5.25 20 mW Less than 0.1 8x8
Consumer, µA
Communication/wired,
Other
Silicon Laboratories C8051F33X Consumer, 8051 25 16/8 8 2.7 to 3.6 / 20 mW Less than 0.1 8x8
Mobile/wireless, 5 tolerant µA
Automotive, Other

Silicon Laboratories C8051F34x Computers Peripherals 8051 25 to 48 16/8 8 2.7 to 5.25 49 mW Less than 0.1 8x8
Consumer, Other µA

Silicon Laboratories C8051F35X Industrial, Test and 8051 50 16/8 8 2.7 to 3.6 / 49 mW Less than 0.1 8x8
measurement, 5 tolerant µA
Measurement
Communication/wired,
Mobile/wireless, Other

Page 133 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
One generic (Core) -40 to +85 Configurable and extendible License
memory, one or (characterized) core
more intelligent
video memories
with aligned or
unaligned access,
DMA
One generic (Core) -40 to +85 Configurable and extendible License
memory, one (characterized) core
memory per MAC
(sizes/speed
configurable) +
external memory
interface

Five 16-bit, five- SMBus, SPI, two UART, 64 22, two levels Eight-channel, 64/100 TQFP -40 to +85 Two comparators, Vref, $5.66 to
channel PCA, PIO 12-bit, 100- temperature sensor, JTAG $7.63
watchdog KSPS; two eight- debug
channel, 8-bit,
500-KSPS; two-
channel, 12-bit
DAC

Five 16-bit, six- CAN 2.0B, SMBus, SPI, two 20, two levels 13-channel, 10- 64/100 TQFP -40 to +85 Three comparators, Vref, $3.44 to
channel PCA, UART, 64 PIO or 12-bit, 100- temperature sensor, 2% $5.61
watchdog KSPS; eight- internal oscillator, 32 CAN
channel, 8-bit, message objects, ±60V PGA,
500-KSPS; two- JTAG debug
channel, 12-bit
DAC
Five 16-bit, six- CAN 2.0B, SMBus, SPI, two 22, two levels Two channel 16- 64/100 TQFP -40 to +85 Three comparators, Vref, $5.04 to
channel PCA, UART, 59 PIO bit 1-MSPS, two temperature sensor, 32 CAN $7.72
watchdog eight channel 10- message objects, 2% internal
bit 200-KSPS, oscillator, JTAG debug
two channel 12-
bit DAC

Four 16-bit, five- SMBus, SPI, UART, 32 PIO 21, two levels Eight-channel, 32 LQFP, -40 to +85 Two comparators, Vref, $3.44 to
channel PCA, 10/12-bit, 100- 48/64 TQFP temperature sensor, JTAG $7.72
watchdog KSPS; two- debug
channel, 12-bit
DAC
63-entry Five 16-bit, six- SMBus, SPI, two UART, 64 20, two levels Eight-channel, 64/100 TQFP -40 to +85 Two comparators, Vref, $7.49 to
branch target channel PCA, PIO 10/12-bit, 100- temperature sensor, JTAG $11.78
buffer watchdog KSPS; eight- debug, 2% internal oscillator
channel, 8-bit, with PLL
500-KSPS; two-
channel, 12-bit
DAC
63-entry Five 16-bit, six- SMBus, SPI, two UART, 64 20, two levels Eight-channel, 64/100 TQFP -40 to +85 Two comparators, Vref, $7.17 to
branch target channel PCA, PIO 10-bit, 100- temperature sensor, JTAG $9.03
buffer watchdog KSPS debug, 2% internal oscillator
with PLL

Three 16-bit, SPI, UART, 32 PIO 22, two levels 32-channel, 12- 48 TQFP, -40 to +85 Two comparators, JTAG debug $1.64 to
watchdog bit, 100-KSPS 32 LQFP $2.34

Three 16-bit, SMBus, UART, eight PIO 12, two levels Eight-channel, 8- 11 MLP -40 to +85 Comparator, temperature $1.03 to
three-channel bit, 500-KSPS sensor, 2% internal oscillator, $1.32
PCA, watchdog on-chip debug
Four 16-bit, five- SMBus, SPI, UART, 29 PIO 14, two levels 21-channel, 10- 32 LQFP, -40 to +85 Two comparators, temperature $1.54 to
channel PCA, bit, 200-KSPS 28 MLP 24 sensor, 2% internal oscillator, $2.52
watchdog MLP on-chip debug

Four 16-bit, five- USB 2.0, SMBus, SPI, UART, 16, two levels 17-channel, 10- 32 LQFP, -40 to +85 Two comparators, Vref, $1.76 to
channel PCA, 25 PIO bit, 200-KSPS 28 MLP temperature sensor, 1.5% $3.07
watchdog internal oscillator, on-chip
debug
Four 16-bit, three- SMBus, SPI, UART, 17 PIO 13, two levels 16-channel, 10- 20 MLP -40 to +85 Comparator, Vref, temperature $1.06 to
channel PCA, bit, 200-KSPS; sensor, 2% internal oscillator, $2.10
watchdog 10-bit DAC on-chip debug

Four 16-bit, five- USB 2.0, SMBus, SPI, 2 x 16, two levels 17-channel, 10- 48 TQFP, 32 -40 to +85 Two comparators, Vref, $3.18 to
channel PCA, UART, 29 PIO bit, 200-KSPS LQFP, temperature sensor, 1.5% $4.42
watchdog 28 MLP internal oscillator, on-chip
debug
Four 16-bit, three- SMBus, SPI, UART, 17 PIO 12, two levels Eight-channel, 32 LQFP, -40 to +85 Comparator, temperature $2.20 to
channel PCA, 24-bit, 1-KSPS; 28 MLP sensor, 2% internal oscillator, $3.55
watchdog two-channel, 8- on-chip debug
bit DAC

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 134
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Silicon Laboratories C8051F36x Consumer, 8051 100 16/8 8 2.7 to 3.6 / 145 mW Less than 0.1 8x8, 16x16
Mobile/wireless, 5 tolerant µA two-cycle MAC
Automotive, Other

Silicon Laboratories C8051F41x Consumer, 8051 50 16/8 8 2.0 to 5.25 49 mW Less than 0.1 8x8
Mobile/wireless, µA
Automotive, Other

Silicon Laboratories C8051F51x/2x Automotive 8052 25 to 50 16/8 8 170 µA/MHz Less than 50 nA 8x8

Silicon Laboratories C8051F5xx Automotive, Industrial, 8051 50 16/8 8 2.7 to 5.25 14 mW 0.2 µA 8x8
Other

Silicon Laboratories C8051F7xx Consumer, Industrial, 8051 25 16/8 8 2.7 to 3.6 / 14 mW Less than 0.1 8x8
Other 5 tolerant µA

Silicon Laboratories C8051F9xx Consumer, Industrial, 8051 25 16/8 8 0.9 to 3.6 / 160 µA/MHz Less than 50 nA 8x8
Other 5 tolerant (as low as 10
nA)

Silicon Laboratories C8051T6xx Consumer, 8051 25 16/8 8 2.7 to 3.6 / 14 mW Less than 0.1 8x8
Mobile/wireless, 5 tolerant µA
Automotive, Other
Silicon Laboratories Si10xx Consumer, Industrial, 8051 25 16/8 8 0.9 to 3.6 / 160 µA/MHz 25 nA 8x8
Other 5 tolerant

Sound Design Voyageur Audio, Medical 20 X 20 single- 16, 20/20 20/40 1.0 to 1.5 3 mW Idle: 250 uW
Technologies cycle Dual configurable stop: <20 uW
MAC operation
with 48-bit
accumulation

STMicroelectronics SPEAr300 Consumer, Computers Security Acc ARM926EJ-S ARM 926 32 32 1.2 / 3.3 <1W Sleep 60mW,
and peripherals, (C3), JPEG up to 333 Doze 60mW,
Communication/wired, Acceletaror Slow 100mW,
Security Normal 300mW

STMicroelectronics SPEAr310 Industrial, Security Acc ARM926EJ-S ARM 926 32 32 1.2 / 3.3 <1W Sleep 60mW,
Communication/wired, (C3), JPEG up to 333 Doze 60mW,
Security Acceletaror Slow 100mW,
Normal 300mW

STMicroelectronics SPEAr320 Industrial, Computers Security Acc ARM926EJ-S ARM 926 32 32 1.2 / 3.3 <1W Sleep 60mW,
and peripherals, (C3), JPEG up to 333 Doze 60mW,
Communication/wired, Acceletaror Slow 100mW,
Security Normal 300mW

STMicroelectronics SPEAr600 Consumer, Computers JPEG ARM926EJ-S Dual Core 32 32 1.0 / 3.3 <1.5 W Sleep 120mW,
and peripherals, General Acceletaror ARM926 , Doze 120mW,
purpose up to 333 Slow 220mW,
each Normal 850mW

Page 135 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
63-entry Four 16-bit, five- SMBus, SPI, UART, 29 PIO 14, two levels 17-channel, 10- 48 TQFP, 32 -40 to +85 Two comparators, temperature $2.47 to
branch target channel PCA, bit, 200-KSPS, LQFP, sensor, 2% internal oscillator, $3.84
buffer watchdog 10-bit DAC 28 MLP on-chip debug

Four 16-bit, six- SMBus, SPI, UART, 29 PIO 13, two levels 24-channel, 12- LQFP32, -40 to +85 VREG, SmaRTClock, Two $2.47 to
channel PCA, bit, 200-KSPS; 2 MLP28 comparators, temperature $3.84
watchdog x 12-bit DAC sensor, 2% internal oscillator,
on-chip debug
3-4 16-bit timers, CAN 2.0, IrC, LIN2.1, SPI, 20 two levels 120bit, 32- 40 QFN -40 to +125 AEC-Q100 qualified $1.12 to
3-6 PWM UART channel, 200- 10 DFN $2.62
ksps
Three 16-bit, LIN, SPI, UART, 17 PIO 14, two levels 16-channel, 12- 48 QFN/QFP -40 to +125 VREG, One comparator, $1.12 to
three-channel bit, 200-KSPS 32 QFN/QFP temperature sensor, 0.5% $3.94
PCA, watchdog 40 QFN 24 internal oscillator, on-chip
QFN debug

Four 16-bit I2C, SPI, UART 20 two levels 10-bit 48 QFN/QFP -40 to +85 39-54 Dig I/O Capacitive $1.37 to
Timers, Three 64 QFP Touch Sense $2.79
PWM
Four 16-bit, six- SMBus, SPI, UART 18, two levels 15- and 23- 24 or 32 QFN, -40 to +85 Integrated LDO regulator and $0.85 to
channel PCA, channel, 10-bit, 32 LTQFP dc-dc converter, comparator, $2.49
watchdog 300-KSPS temperature sensor, 2%
internal oscillator, 20 MHz low-
power oscillator, external
oscillator support,
SmaRTClock, on-chip debug,
Capacitive Touch Sense

Three 16-bit, SMBus, UART, eight PIO 12, two levels Eight-channel, 11 MLP, -40 to +85 Comparator, temperature $0.50 to
three-channel 10-bit, 500- SOIC14 sensor, 2% internal oscillator, $1.99
PCA, watchdog KSPS on-chip debug
Four 16-bit, six- SMBus, SPI, UART 18, two levels 15/18-channel, 42 QFN -40 to +85 Wireless MCU in 2-chip $3.51 to
channel PCA, 10/12-bit, 300- package combining 8051 CPU $4.81
watchdog KSPS, 11- with 240-960 MHz wireless
channel, 12-bit, transceiver with 121 dBm
75-KSPS sensirtivity, integrated LDO
regulator and dc-dc converter,
comparator, temperature
sensor, internal oscillator,
SmaRTClock, on-chip debug,

7.68/11-kword MMU, DMA Five 16-bit timers, 16 - MDSP, 95dB ADC; 87dB 0 to +40 Multiprocessor system with 5
8 fully programmable UDSP, DAC -20 to +70 DSP cores, 4 Filter Engines,
Eight GPIOs, I2S, SPI, PCM, (storage) radix-4 FFT/IFFT accelerator,
SDA on-chip clock generator,
battery-voltage monitor,
hardwired EEPROM SPI
interface, development tool
suite, 3rd party support for
algorithm development

16/16-kbyte, 4- Yes 6 general timers Fast Ethernet, 2 x USB 2.0 16 irqs + ADC 10-bit, 8 LFBGA 289 -40 to +85 Camera I/F, LCD controller, from $7.63
way set Host, 1x USB 2.0 Dev, TDM 16 vectored channel, 15x15mm, Touchscreen, 9x9 keyboard
associative BUS, I2S, I2C, SPI, UARTand irqs 1MSPS. 1-bit 0.8mm pitch ctrl,
fast IrDA, SDIO/MMC card I/F, DAC
up to 44 GPIOs

16/16-kbyte, 4- Yes 6 general timers 1 x Fast Ethernet (MII),4x Fast 16 irqs + ADC 10-bit, 8 LFBGA 289 -40 to +85 Extr Mem I/F up to 32 bits from $7.63
way set Ethernet (SMII), 2 x USB 2.0 16 vectored channel, 1MSPS 15x15mm,
associative Host, 1x USB 2.0 Dev, irqs 0.8mm pitch
TDM/HDLC I/F, 2x RS485
HDLC ports,I2C, SPI, 6 x
UART and fast IrDA. Up to 102
GPIOs
16/16-kbyte, 4- Yes 6 general timers + 2x Fast Ethernet (MII/SMII), 2 16 irqs + ADC 10-bit, 8 LFBGA 289 -40 to +85 Camera I/F, LCD controller, from $7.63
way set 4 PWM timers x USB 2.0 Host, 1x USB 2.0 16 vectored channel, 1MSPS 15x15mm, Touchscreen, Ext Mem I/F up
associative Dev, 2 x CAN I/F, 2x I2C, SPI, irqs 0.8mm pitch to 16 bits
3 x UARTand fast IrDA, 1
SPP, SDIO/MMC card I/F, Up
to 102 GPIOs
16/16-kbyte Yes 10 general 1x Giga Ethernet (GMII), 2 x 32 irqs + ADC 10-bit, 8 PBGA 420 -40 to +85 LCD controller, Touchscreen, from $10.17
(per core), 4- puropose timers USB 2.0 Host, 1x USB 2.0 32 vectored channel, 1MSPS 23x23mm, Ext 32 bit Local BUS
way set Dev, 3 x I2S, I2C, 3x SPI, 2 x irqs 1mm pitch
associative UART and fast IrDA, 10 (per core)
GPIOs

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 136
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
STMicroelectronics STM32F100 Audio, Cortex-M3 24, 36, 48, 16, 32 2 to 3.6 27 mA Stop <20 µA Single cycle
STM32F101 Communication/wired, 72 Standby 2 µA multiply and
STM32F102 Computers and hardware
STM32F103 peripherals, Consumer, division
Digital power, General
purpose, Industrial,
Medical, Motor control,
Security, Test and
measurement
STMicroelectronics STM32F105 Audio, Cortex-M3 72 16, 32 2 to 3.6 30 mA Stop <20 µA Single cycle
STM32F107 Communication/wired, Standby 2 µA multiply and
Computers and hardware
peripherals, Consumer, division
Digital power, General
purpose, Industrial,
Medical, Motor control,
Security, Test and
measurement
STMicroelectronics STM32L15x Communication/wired, Cortex-M3 32 16, 32 1.65 to 3.6 230 µA/MHz Standby 270nA, Single cycle
Computers and (mode 3) Standby with multiply and
peripherals, Consumer, RTC 1 µA, Stop hardware
General purpose, 500nA, Stop division
Industrial, Medical, Motor with RTC 1.3
control, Security, Test µA, Low power
and measurement wait 5.1 µA, Low
power run 10.4
µA

STMicroelectronics STM32W Cortex-M3 24 16, 32 2.1 to 3.6 7.5 mA RX 20 Deep sleep Single cycle
mA (-100dBm) 400nA Deep multiply and
TX 20 mA sleep with RTC hardware
(0dBm) 700nA division

STMicroelectronics STM8L10x Communication/wired, STM8 16 8, 16 1.65 to 3.6 150 µA/MHz Halt 350 nA, Hardware
Computers and Active Halt multiply
peripherals, Consumer, 800nA
General purpose,
Industrial
STMicroelectronics STM8L15x Communication/wired, STM8 16 8, 16 1.65 to 3.6 195 µA/MHz Halt 400 nA, Hardware
Computers and Active Halt with multiply
peripherals, Consumer, RTC 1.3 µA,
Digital power, General Low power wait
purpose, Industrial, 3 µA, Low power
Medical, Motor control, run 5.1 µA
Security, Test and
measurement
STMicroelectronics STM8S10x Communication/wired, STM8 24, 16 8, 16 2.95 to 5.5 8.0 mA Halt 4.5 µA, Hardware
STM8S20x Computers and Active Halt 11.5 multiply
peripherals, Consumer, µA
Digital power, General
purpose, Industrial,
Medical, Motor control,
Security, Test and
measurement

Stream Processors Storm-1 SP16- Imaging and video 80 MACs, 80 500 32/128 32 1.0 / 1.8 / 100 mW/G
(SPI) G160 ALUs 3.3 MAC

Stream Processors Storm-1 SP16HP- Imaging and video 80 MACs, 80 700 32/128 32 1.0 / 1.8 / 100 mW/G
(SPI) G220 ALUs 3.3 MAC

Stream Processors Storm-1 SP8-G80 Imaging and video 40 MACs, 40 500 32/128 32 1.0 / 1.8 / 100 mW/G
(SPI) ALUs 3.3 MAC

Stream Processors Storm-1 SP8LP- Imaging and video 40 MACs, 40 200 32/32 32 1.0 / 1.8 / 100 mW/G
(SPI) G30 ALUs 3.3 MAC

Page 137 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-, 64-, 128-, Six 16-bit, two 16- 3 SPI, 2 I²C, 5 68, 16 priority Three 21- 36QFN -40 to +85 Serial Wire Debug (SWD) and From $0.99
256-, 384-, 512-, bit PWM and USART(IrDa/ISO7816),2 I2S, levels channel 12-bit (1 48 QFN/LQFP, -40 to +105 JTAG, 3-ph induction motor
1024-kbyte Flash, dead-time SDIO, USB, CAN, Flexible uS) ADC ; 2- 64/100/144 control. Internal 8MHz RC and
4, 96-kbyte SRAM generation, two static memory controller channel 12-bit LQFP/BGA 64 40kHz RC
watchdog, 1.5 uA (supports NOR, NAND, DAC CSP
realtime clock, 24- Compact Flash, SRAM,
bit down counter PSRAM and LCD Parallel
interface), up to 112 GPIO 5V
Tolerant
64-, 128-, 256- Six 16-bit, one 16- Ethernet, USB OTG, 2 CAN, 3 68, 16 priority Two 16-channel 64/100 LQFP -40 to +85 Serial Wire Debug (SWD) and From $2.79
kbyte Flash, 20, bit PWM and SPI, 2 I²C, 5 levels 12-bit (1 uS) -40 to +105 JTAG, 3-ph induction motor
64-kbyte SRAM dead-time USART(IrDa/ISO7816),2 I2S, ADC ; 2-channel control. Internal 8MHz RC and
generation, two up to 80 GPIO 5V Tolerant 12-bit DAC 40kHz RC
watchdog, 1.5 uA
realtime clock, 24-
bit down counter

64-, 128k-kbyte Eight 16-bit, two LCD, 2 SPI, 2 I²C, 3 USART, 83, 16 priority 24-channel 12- 48 QFN/LQFP, -40 to +85 Serial Wire Debug (SWD) and From $1.86
Flash, 10, 16- watchdog, 1 uA USB levels bit ADC (1 uS), 2- 64 LQFP/BGA, JTAG, 3-ph induction motor
kbyte SRAM, 4 realtime clock, 24- channel 12-bit 100 control. Internal 16MHz RC
bytes EEPROM bit down counter DAC LQFP/BGA and 37kHz RC, plus Internal
multi-speed low power RC
(64kHz to 4.1MHz)

128-kbyte Flash, Two 16-bit timers, 1 SPI/UART/I²C, 1 SPI/I²C, up 6-channel 12-bit 40/48 QFN -40 to +85 Integrated 802.15.4 radio with From $2.42
8-kbyte SRAM watchdog, to 24 GPIO DAC 107dB link budget (with
AWU/realtime, 24- support for ZigBee, RF4CE
bit down counter and 802.15.4 MAC), Serial
Wire Debug (SWD) and JTAG

4-, 8-kbyte Flash, Two 16-bit timers, SPI, I2C, UART. Up to 30 29 external 2 comparators 20 TSSOP -40 to +85 Internal 16MHz and 38kHz RC, From $0.65
1.5-kbyte SRAM one 8-bit. GPIO sources 20/28/32 QFN -40 to +125 SWIM and Debug Module, free
watchdog and 32 LQFP touch sensing library
AWU

16-, 32-kbytes Two 16-bit timers, LCD, SPI, I2C, UART. Up to 40 external 25-channel 12- 28/32/48 QFN -40 to +85 Advanced timer for motor From $0.80
Flash, 2-kbyte 16-bit advanced 41 GPIO sources bit ADC, 12-bit 32/48 LQFP -40 to +125 control and lighting, internal
SRAM, 1-kbyte control timer, 8- DAC, 2 ultra-low- 28 CSP 16MHz and 38kHz RC, SWIM
EEPROM bit, 2 watchdogs, power and Debug Module, free touch
realtime comparators sensing library

4-, 8-, 16-, 32-, 64- 16-bit advanced 2 x UART (LIN, IrDA), SPI, 37 16-channel 10- 20 -40 to +85 Advanced timer for motor From $0.51
, 128-kbyte Flash, control I2C, CAN. up to 68 I/Os bit ADC QFN/TSSOP -40 to +125 control and lighting, Internal
up 6-kbytes (CAPCOM, 32 QFN/LQFP 16MHz RC and 128kHz RC,
SRAM, up to 2- complementary 44/48/64/80 SWIM and Debug Module, free
kbytes EEPROM outputs, dead- LQFP touch sensing library
time
insertion), Two 16-
bit (CAPCOM,
PWM), 8-bit, auto
wake up timer,
two watchdog

32/32-kbyte 128-kbyte register 10/100/1000 Ethernet MAC, 896 PBGA 0 to +85 C programming tools, Stream
with compile- files, DDR1, PCI, 8 video ports, PIO, I2S, processor based, 80 GMACS
time allocation DDR2, DMA I2C, SPI, UARTs, JTAG,
EJTAG, GPIO, PWM,
Interrupts
32/32-kbyte 128-kbyte register 10/100/1000 Ethernet MAC, 896 FCBGA 0 to +85 C programming tools, Stream
with compile- files, DDR1, PCI, 8 video ports, PIO, I2S, processor based, 112 GMACS
time allocation DDR2, DMA I2C, SPI, UARTs, JTAG,
EJTAG, GPIO, PWM,
Interrupts
32/32-kbyte 64-kbyte register 10/100/1000 Ethernet MAC, 896 PBGA 0 to +85 C programming tools, Stream
with compile- files, DDR1, PCI, 8 video ports, PIO, I2S, processor based, 40 GMACS
time allocation DDR2, DMA I2C, SPI, UARTs, JTAG,
EJTAG, GPIO, PWM,
Interrupts
32/32-kbyte 64-kbyte register 10/100 Ethernet MAC, PCI, 3 480 PBGA 0 to +85 C programming tools, Stream
with compile- files, DDR1, video ports, PIO, I2S, I2C, processor based, 16 GMACS
time allocation DDR2, DMA SPI, UARTs, JTAG, EJTAG,
GPIO, PWM, Interrupts

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 138
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Stretch S6100 Imaging and video, 2nd SCP 300, Xtensa 32/64 16, 24 or 64 (2- 1.2 2 to 3 W Customizable
Mobile/wireless, Security, Generation LX Two- way VLIW) Execution Unit,
Industrial ISEF with Way VLIW any bit width
embedded
memory
(IRAM);
Programmable
Accelerator for
common video
tasks
Stretch S6105 Imaging and video, 2nd SCP 300, Xtensa 32/64 16, 24 or 64 (2- 1.2 2 to 3 W Customizable
Mobile/wireless, Security, Generation LX Two- way VLIW) Execution Unit,
Industrial ISEF with Way VLIW any bit width
embedded
memory
(IRAM);
Programmable
Accelerator for
common video
tasks
Stretch S6106 Imaging and video, 2nd SCP 200, Xtensa 32/32 16, 24 or 64 (2- 1 2W Customizable
Mobile/wireless, Security, Generation LX Two- way VLIW) Execution Unit,
Industrial ISEF with Way VLIW any bit width
embedded
memory
(IRAM);
Programmable
Accelerator for
common video
tasks
Stretch S6107 Imaging and video, 2nd SCP 200, Xtensa 32/32 16, 24 or 64 (2- 1.2 2W Customizable
Mobile/wireless, Security, Generation LX Two- way VLIW) Execution Unit,
Industrial ISEF with Way VLIW any bit width
embedded
memory
(IRAM);
Programmable
Accelerator for
common video
tasks
Systemyde Rabbit 2000 General purpose, Z80-style 30 in 0.6um 20/8 8 Sleepy (32KHz) 16x16
International Industrial

Systemyde Rabbit 3000 General purpose, Z80-style 55 in .35um 20/8 8 Sleepy (32KHz), 16x16
International Industrial, Motor control Ultra-sleepy
(2/4/8KHz)

Systemyde Rabbit 4000 General purpose, Z80-style 60 in 180nm 24/16 8 Sleepy (32KHz), 16x16, chained
International Industrial, Motor control Ultra-sleepy MAC for crypto
(2/4/8KHz)

Systemyde Rabbit 5000 General purpose, Z80-style 100 in 24/16 8 Sleepy (32KHz), 16x16, chained
International Industrial, 180nm Ultra-sleepy MAC for crypto
Mobile/wireless (2/4/8KHz)

Systemyde Rabbit 6000 General purpose, Z80-style 200 in 90nm 24/16 8 Sleepy (32KHz), 16x16, chained
International Industrial, Ultra-sleepy MAC for crypto
Mobile/wireless (2/4/8KHz)

Systemyde Y180 General purpose Z180 20/8 8 Halt, Sleep 8x8


International
Systemyde Y180S Military/aerospace Z180 20/8 8 Halt, Sleep 8x8
International
Systemyde Y8002 Military/aerospace, Z8000 16/16 16 Halt, Sleep 16x16, 32x32
International General purpose (multiply and
divide)
Systemyde Y90 Military/aerospace, Z180 28/8 8 Halt, Sleep 8x8
International General purpose

Systemyde Y90-180 General purpose Z180 20/8 8 Halt, Sleep 8x8


International

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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 32-kbyte DDR2 667 MHz, Yes PCIe, Four 8- or 10-bit ITU-R 8 GPIO 622 pin 27x27 -40 to +125 Glueless Chip-to-Chip
64-byte SRAM, BT656 or ITU-R BT1120 Video HSBGA 0 to +100 Interconnect, Audio and Video
32-kbyte IRAM Dataports, 10/100/1000 CODEC libraries, Instruction
Ethernet, Enhanced General Set Extension Fabric,
Purpose Interface Bus (eGIB), Programmable Accelerator
TWI, SPI, Two I2S, Two UART Library
(IrDA), GPIO

Yes 32-kbyte DDR2 667 MHz, Yes Four 8- or 10-bit ITU-R BT656 8 GPIO 622 pin 27x27 -40 to +125 Glueless Chip-to-Chip
64-byte SRAM, or ITU-R BT1120 Video HSBGA 0 to +100 Interconnect, Audio and Video
32-kbyte IRAM Dataports, 10/100/1000 CODEC libraries, Instruction
Ethernet, Enhanced General Set Extension Fabric,
Purpose Interface Bus (eGIB), Programmable Accelerator
TWI, SPI, Two I2S, Two UART Library
(IrDA), GPIO

Yes 32-kbyte DDR2 500 MHz, Yes Two 8- or 10-bit ITU-R BT656 7 GPIO 400 pin 17x17 -40 to +125 Audio and Video CODEC
64-byte SRAM, or ITU-R BT1120 Video PBGA 0 to +100 libraries, Instruction Set
32-kbyte IRAM Dataports, 10/100/1000 Extension Fabric,
Ethernet, Enhanced General Programmable Accelerator
Purpose Interface Bus (eGIB), Library
TWI, SPI, Two I2S, Two UART
(IrDA), GPIO

Yes 32-kbyte DDR2 500 MHz, Yes PCIe, Two 8- or 10-bit ITU-R 7 GPIO 400 pin 17x17 -40 to +125 Audio and Video CODEC
64-byte SRAM, BT656 or ITU-R BT1120 Video PBGA 0 to +100 libraries, Instruction Set
32-kbyte IRAM Dataports, 10/100/1000 Extension Fabric,
Ethernet, Enhanced General Programmable Accelerator
Purpose Interface Bus (eGIB), Library
TWI, SPI, Two I2S, Two UART
(IrDA), GPIO

MMU 5x 8-bit, 10-bit 2x UART, 2x UART/SPI, 40 2 external, 8 (Core) Slave port, spread-spectrum
with dual match GPIO internal clock
registers,
realtime,
watchdog
MMU 10x 8-bit, 10-bit 4x UART/SPI, 2x 2 external, 17 (Core) Slave port, spread-spectrum
with dual match UART/SPI/HDLC, 56 GPIO internal clock, 2x quadrature decode,
registers, 16-bit, Auxilliary I/O bus
4x 16-bit PWM,
realtime,
watchdog
MMU, 8-channel 10x 8-bit, 10-bit 4x UART/SPI, 2x 2 external, 28 (Core) Slave port, spread-spectrum
DMA with dual match UART/SPI/HDLC, 10BASE-T internal clock, 2x quadrature decode,
registers, 16-bit, MAC/PHY, 40 GPIO Auxilliary I/O bus
4x 16-bit PWM,
realtime,
watchdog
MMU, 8-channel 10x 8-bit, 10-bit 4x UART/SPI, 2x 2 external, 28 (Core) Slave port, spread-spectrum
DMA, 1-Mbyte with dual match UART/SPI/HDLC, internal clock, 2x quadrature decode,
SRAM registers, 16-bit, 10/100BASE-T MAC, Auxilliary I/O bus
4x 16-bit PWM, 802.11b/g MAC/PHY, 48 GPIO
realtime,
watchdog
MMU, 16-channel 13x 8-bit, 10-bit 4x UART/SPI, 2x 8 external, 48 8-channel, 12-bit (Core) Slave port, spread-spectrum
DMA, 8-Mbyte with dual match UART/SPI/HDLC, internal ADC clock, 2x quadrature decode,
DRAM, 256-kbyte registers, 16-bit, 10/100BASE-T MAC/PHY, Auxilliary I/O bus, 2x Slave PIC
SRAM 4x 16-bit PWM, 802.11b/g MAC/PHY, 56 GPIO CPU
realtime,
watchdog
MMU 4 external (Core)

MMU 4 external (Core) fault detect

2 external (Core)

MMU realtime, 8x DMA REQ/ACK, 8-bit 17 external (Core) fault detect, DMA bus limiter,
watchdog System Status in Wait-state limiter, separate I/O
bus, System Status Block

MMU, 2-channel 2x 16-bit 2x UART, CSIO 4 external (Core)


DMA

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 140
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Target Compiler IP Designer - ASIP Audio, Automotive, Specialized User-defined 1 to 1024 external and 8 to 256+ Process Architecture External power Multi-MAC,
Technologies Communication/wired, operations, (dependent optional (user defined) technology and process gating SIMD (2 to
Consumer, Imaging and specialized on pipeline dependent technology 1024+
video, Medical, addressing and depedent. elements), and
Military/aerospace, modes process) Options for single-
Mobile/wireless, Other, sub-1mW cycle/multi-
Security operation
dispatch
(instruction-
level
parallelism)
Tensilica 330HiFi (core) Audio Audio codec Xtensa 57 in 65GP 64 16/24, 64 Process to 0.104 Powerdown Dual 16x16
accelerator, area opt.; dependent mW/MHz MAC, zero-
two (16x32) or 538 in (area); 0.167 overhead
(24x24) MACs 65GP mW/MHz looping,
speed opt. (speed) clamps,
max/min value,
normalize and
sign extend

Tensilica 38xVDO (cores) Imaging and video Entropy Xtensa 300 (90nm Two 32 16/24/64 Process 47 mW (200 Powerdown Core 0: 3-
decode and GT worst dependent MHz) Typical issue 32-bit
encode, case) H.264 SDTV FLIX; general
CABAC, others decode (90 nm multipliers.
buit-in GT) Core 1: 8
16x16
multipliers plus
custom
multiplier for
CABAC
Tensilica ConnX 545CK Communication/wired, Viterbi , eight Xtensa 58 (45GS 128 16/24, 64 Process 0.045 (area) Powerdown 3-issue VLIW
(core) Consumer, General (18x18) MACs area opt); dependent 0.082 (speed) DSP with 8-
purpose 684 (45GS mW/MH 45GS way SIMD
speed opt) 16x16
multiplier unit.
DSP
instruction
extensions
Tensilica ConnX Baseband Communication/wired Xtensa n/a 32, 64, 128 16, 24, 64 Process to Powerdown 16 18b x 18b
Engine (BBE16) modeless mix dependent MACs/cycle

Tensilica Diamond 106Micro General purpose, Xtensa 907 (speed) 32 16, 24 Process to 0.042 (speed) Powerdown Iterative 32x32
Communication/wired, 57 (area) dependent 0.027 (area) multiplier
Consumer 45GS mW/MHz
45GS

Tensilica Diamond 108Mini General purpose, Xtensa 923 (speed) 32 16, 24 Process to 0.029 (speed) Powerdown Iterative 32x32
Communication/wired, 58 (area) dependent 0,019 (area) multiplier, 32-
Consumer 45GS 45GS bit integer
mW/MHz divider

Tensilica Diamond 212GP General purpose, Xtensa 923 (speed) 32 16, 24 Process to 0.048 (speed) Powerdown Single-cycle
Communication/wired, 58 (area) dependent 0.027 (area) 16x16 MAC,
Consumer 45GS 45GS 32-bit integer
mW/MHz divider, zero-
overhead
looping,
clamps,
max/min value,
normalize and
sign extend

Page 141 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
External External and SRAM, DRAM, External and External and optional. Single- User-defined. External and (Core) (Core) Automated processor License
and optional optional FIFO and direct optional cycle read/write any bit-width. Any number of optional generation system, SDK from
register/port levels user-defined processor
access. DMA, description/model. C-compiler
MMU external exploits architectural features
and optional for targeted applications.

4/8-kbyte two- Three 32-bit 32-bit Queues, PIF, AMBA bus 15 (Core) (Core) VLIW customized for audio License
way set interfaces with over 60 audio SW
associative, decoders and encoders
programmable
write-through
or write-back

65-kbyte Six 32-bit 2 32 bit bus interfaces (Core) (Core) Fully software programmable, License
instruction RAM supports Main / ASP and
72-kbyte data Baseline / SP profiles, VLIW,
RAM SIMD

Three 32-bit 32-bit Queues, PIF, AMBA Lite 15 (Core) (Core) VLIW, SIMD License
and AXI bus interface

Optional Configurable 0- Optional and Up to three 32-bit PIF, AMBA Lite and AXI bus Up to 32 (Core) (Core) Single 160b wide vector License
IEEE-754 to 32-kbyte, configurable interface register file with support for
compatible, four-way set 20b x 8 and 40b x 4 vector
optional associative types; dual 128b Load/Store
double- units, single-cycle Radix-4 FFT
precision butterfly.
floating
point
128-kbyte One 32-bit PIF, AMBA Lite and AXI bus 15 (Core) (Core) License
instruction RAM, interface
128-kbyte data
RAM

128-kbyte Three 32-bit PIF, AMBA Lite and AXI bus 15 (Core) (Core) License
instruction RAM, interface, 32-bit GPIO pins
128-kbyte data
RAM

8-kbyte, two- 128-kbyte Three 32-bit PIF, AMBA Lite and AXI bus 15 (Core) (Core) License
way set instruction RAM, interface, 32-bit GPIO pins
associative, 128-kbyte data
programmable RAM
write-through
or write-back

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 142
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Tensilica Diamond 233L General purpose, Xtensa 769 (speed) 32 16, 24 Process to 0.046 (speed) Powerdown Single-cycle
Communication/wired, 58 (area) dependent 0.028 (area) 16x16 MAC,
Consumer 45GS 45GS 32-bit integer
mW/MHz divide, zero-
overhead
looping,
clamps,
max/min value,
normalize and
sign extend

Tensilica Diamond 570T General purpose, Xtensa 780 (speed) 64 16, 24, 64 Process to 0.066 (speed) Powerdown Single-cycle
Communication/wired, 58 (area) dependent 0.034 (area) 16x16 MAC,
Consumer 45GS mW/MHz 32-bit integer
45GS divide, zero-
overhead
looping,
clamps,
max/min value,
normalize and
sign extend

Tensilica Xtensa 8 Communication/wired, Xtensa 1032 32/32, 64, 128 16, 24 Process to 0.009 Powerdown User
Consumer, General (smallest, modeless mix dependent mW/MHz instructions, 32
purpose 45GS, (45GS lo W-po or 16-bit
speed opt), Wer flow); multipliers,
57 (45 GS 0.019 (45GS 32x32
low-power high-speed multiplier,
flow) flow) integer divider,
16-bit MAC

Tensilica Xtensa LX3 Audio, Vectra DSP Xtensa 1032 32/32, 64, 128 16, 24, 64 Process to 0.009 Powerdown User
Communication/wired, engine, ConnX (smallest, modeless mix dependent mW/MHz instructions, 32
Computers and D2 DSP 45GS, (45GS lo W-po or 16-bit
peripherals, Consumer, engine speed opt), Wer flow); multipliers,
General purpose, 57 (45 GS 0.019 (45GS 32x32
Imaging and video, low-power high-speed multiplier,
Mobile/wireless, Security flow) flow) integer divider,
16-bit MAC,
Vectra DSP
option, HiFi
Audio option

Texas Instruments CC430 Consumer, General MSP430 27 20 16 1.8 to 3.6 230 µA/MHz; Standby: 1.5 µA, 32x32
purpose, Industrial, 0.47 to 0.5 Off: 0.1 µA
Medical, Mobile/wireless, mW/MHz
Security

Texas Instruments Delfino Automotive, Consumer, TMS320C28x 200 to 300 Internal:16/32 16, 32 1.2 / 1.9 / 800 mW Four modes, 32x32; dual
TMS320C2834x Digital power, General External: 16/32 3.3 each peripheral 16x16
purpose, Imaging and independently
video, Industrial, Medical,
Military/aerospace,
Mobile/wireless, Motor
control, Other, Security,
Test and measurement

Texas Instruments Delfino Automotive, Consumer, TMS320C28x 100 to 150 Internal:16/32 16, 32 1.9 / 3.3 800 mW Four modes, 32x32; dual
TMS320F2833x Industrial, Medical, Motor External: 16/32 each peripheral 16x16
control, Digital power independently

Texas Instruments LM3S1150 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Page 143 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-kbyte, four- Three 32-bit PIF, AMBA Lite and AXI bus 15 (Core) (Core) Linux-compatible MMU License
way set interface, 32-bit GPIO pins
associative,
programmable
write-through
or write-back

16-kbyte, two- Three 32-bit PIF, AMBA Lite and AXI bus 15 (Core) (Core) License
way set interface, 32-bit GPIO pins,
associative, two 32-bit Queues interfaces
programmable for streaming data into and out
write-through of the processor via FIFOs
or write-back

Optional Configurable 0- Optional and Up to three 32-bit PIF, AMBA Lite and AXI bus Up to 32 (Core) (Core) Automated processor- License
IEEE-754 to 32-kbyte, configurable interface, 32-bit GPIO pins, generation system creates new
compatible, four-way set two 32-bit Queues interfaces processor and tool suite in one
optional associative for streaming data into and out hour. Optional ECC/parity on
double- of the processor via FIFOs Local memories
precision
floating
point

Optional Configurable 0- Optional and Up to three 32-bit PIF, AMBA Lite and AXI bus Up to 32 (Core) (Core) Automated processor- License
IEEE-754 to 32-kbyte, configurable interface, 32-bit GPIO pins, 32- generation system creates new
compatible, four-way set bit Queues interfaces for processor and tool suite in one
optional associative streaming data into and out of hour. Optional ECC/parity on
double- the processor via FIFOs Local memories, choice of one
precision or two load/stores
floating
point

Up to 12 16-bit, Up to 44 GPIO All peripherals 12-bit SAR ADC 48 QFN, -40 to +85 Programmable core voltage $2.70 to
realtime, 16-bit UART/LIN/IrDA/SPI and and I/O 64 VQFN with PMM, flexible clock $4.70
watchdog, 16-bit I2C/SPI system
PWM Comparator
Internal ultra-Low Power LF
oscillator
Op-amp, DMA, system voltage
supervisor, watchdog,
brownout reset, <1GHz RF

Yes 16 and 32-bit, 16- 3 SCI, 2SPI, 2 CAN, 2 McBSP, 96 256 BGA, 179 -40 to +105 Hi-Res PWM technology $8.50 to
bit PWM I²C, 88 GPIO BGA -40 to +125 provides 16 bits of accuracy in $16
a 100 KHz control loop and 12
bits at 1MHz

Yes 16 and 32-bit, 16- 3 SCI, SPI, 2 CAN, 2 McBSP, 96 12-bit, 2 SH, 16- 176 LQFP, 179 -40 to +85 Hi-Res PWM technology $13 to $15
bit PWM I²C, 88 GPIO channel BGA -40 to +125 provides 16 bits of accuracy in
a 100 KHz control loop and 12
bits at 1MHz
MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, up 34 3 Analog Comp 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 52 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 144
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S1162 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1165 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1332 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1435 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1439 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1512 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1538 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S1601 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S1607 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S1608 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1620 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1625 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S1626 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide
Texas Instruments LM3S1627 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power 32-bit
hardware
divide

Page 145 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, up 37 3 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 46 GPIOs 2 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, up 35 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 43 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 2 UART, 1 SSI/SPI, up to 57 30 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP GPIOs 3 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 29 1 Analog Comp, 100 LQFP 108 -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP to 46 GPIOs 2 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 2 SSI/SPI, up 33 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 52 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 35 3 Analog Comp, 100 LQFP 108 -40 to +85 1 QEI,
Timer/PWM/CCP to 58 GPIOs 2 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 32 8 single-sample 100 LQFP 108 -40 to +85 1 QEI,
Timer/PWM/CCP to 43 GPIOs 10-bit ADC BGA -40 to +105
Modules, each 32- channels, each
bit or 2x16-bit up to 500Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 29 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 60 GPIOs BGA -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, four 3 UART, 2 I2C, 1 SSI/SPI, up 27 8 single-sample 64 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP to 33 GPIOs 10-bit ADC
Modules, each 32- channels, each
bit or 2x16-bit up to 500Ksps

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, up 32 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 52 GPIOs 8 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 2 SSI/SPI, up 31 3 Analog Comp 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 52 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, four 1 UART, 2 I2C, 1 SSI/SPI, up 28 1 Analog Comp, 64 LQFP -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP to 33 GPIOs 6 single-sample with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, DriverLib / Bootloader
bit or 2x16-bit channels, each in ROM
up to 500Ksps

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, up 28 6 single-sample 64 LQFP -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP to 33 GPIOs 10-bit ADC with deadband and 1 fault
Modules, each 32- channels, each inputs, 1 QEI, DriverLib /
bit or 2x16-bit up to 500Ksps Bootloader in ROM

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, up 29 4 single-sample 64 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 33 GPIOs 10-bit ADC with deadband and 1 fault
Modules, each 32- channels, each inputs, 1 QEI, DriverLib /
bit or 2x16-bit up to 500Ksps Bootloader in ROM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 146
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S1635 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1637 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1751 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1776 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1850 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1911 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S1918 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1937 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S1958 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S1960 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S1968 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2110 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power 32-bit
hardware
divide

Texas Instruments LM3S2139 General purpose, Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S2276 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Page 147 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 37 2 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 56 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 1 SSI/SPI, up 35 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 43 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, three 3 UART, 1 I2C, 2 SSI/SPI, up 32 1 Analog Comp, 100 LQFP 108 -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP to 56 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, up 26 6 single-sample 64 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP to 33 GPIOs 10-bit ADC with deadband and 3 fault
Modules, each 32- channels, each inputs, DriverLib / Bootloader
bit or 2x16-bit up to 1Msps in ROM

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 30 3 Analog Comp 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 56 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 29 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 60 GPIOs BGA -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, up 32 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 52 GPIOs 8 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 31 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 56 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 31 8 single-sample 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 52 GPIOs 10-bit ADC BGA -40 to +105
Modules, each 32- channels, each
bit or 2x16-bit up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 36 3 Analog Comp 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 60 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 2 QEI,
bit or 2x16-bit

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, up 40 3 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 52 GPIOs 8 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 2 QEI,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, 1 26 3 Analog Comp 100 LQFP 108 -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP CAN, up to 40 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs,
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, 1 29 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 56 GPIOs 4 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, 1 27 6 single-sample 64 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, up to 33 GPIOs 10-bit ADC with deadband and 3 fault
Modules, each 32- channels, each inputs, DriverLib / Bootloader
bit or 2x16-bit up to 1Msps in ROM

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 148
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S2410 General purpose, Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S2412 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S2432 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S2533 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2601 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S2608 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2616 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2620 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S2637 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2651 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2671 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S2678 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide
Texas Instruments LM3S2730 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S2739 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Page 149 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, three 1 UART, 1 SSI/SPI, 1 CAN, up 22 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 60 GPIOs BGA -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, 1 30 2 Analog Comp, 100 LQFP 108 -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP CAN, up to 49 GPIOs 3 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, 1 30 2 Analog Comp, 100 LQFP 108 -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP CAN, up to 34 GPIOs 3 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 1 36 3 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP CAN, up to 48 GPIOs 3 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 1 30 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 60 GPIOs BGA -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, 1 33 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 52 GPIOs 8 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 1 UART, 1 I2C, 1 CAN, up to 31 2 Analog Comp, 64 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP 33 GPIOs 6 single-sample with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI, DriverLib /
bit or 2x16-bit channels, each Bootloader in ROM
up to 1Msps

MPU One 24-bit, four 1 UART, 1 I2C, 1 SSI/SPI, 2 32 3 Analog Comp 100 LQFP 108 -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP CAN, up to 52 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 1 32 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 46 GPIOs 4 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, 1 35 1 Analog Comp, 100 LQFP 108 -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP CAN, up to 53 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 1 UART, 1 I2C, 1 SSI/SPI, 1 29 3 Analog Comp, 64 LQFP -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP CAN, up to 33 GPIOs 4 single-sample with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, DriverLib / Bootloader
bit or 2x16-bit channels, each in ROM
up to 500Ksps

MPU One 24-bit, four 1 UART, 1 SSI/SPI, 1 CAN, up 27 8 single-sample 64 LQFP -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP to 33 GPIOs 10-bit ADC with deadband and 2 fault
Modules, each 32- channels, each inputs, 1 QEI, DriverLib /
bit or 2x16-bit up to 500Ksps Bootloader in ROM

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 1 CAN, up 22 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP to 60 GPIOs BGA -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, 1 33 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP CAN, up to 56 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 500Ksps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 150
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S2776 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2793 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2911 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S2918 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2939 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2948 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep, Battery- 32-bit multiply,
Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2950 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S2965 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S2B93 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S300 Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S301 General purpose, Motor Cortex-M3 20 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S308 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S310 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power 32-bit
hardware
divide

Page 151 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, 1 27 6 single-sample 64 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, up to 33 GPIOs 10-bit ADC with deadband and 3 fault
Modules, each 32- channels, each inputs, DriverLib / Bootloader
bit or 2x16-bit up to 1Msps in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 2 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, 2 I2S, up to 60 GPIOs 16 dual-sample with deadband and 4 fault
Modules, each 32- 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit channels, each Peripheral Interface, Precision
up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 1 30 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 60 GPIOs BGA -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, 1 33 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 52 GPIOs 8 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 3 UART, 1 I2C, 1 SSI/SPI, 1 35 3 Analog Comp, 100 LQFP 108 -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP CAN, up to 57 GPIOs 3 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, 2 35 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP CAN, up to 52 GPIOs 8 single-sample BGA -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, 2 36 3 Analog Comp 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP CAN, up to 60 GPIOs BGA -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 2 42 3 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP CAN, up to 56 GPIOs 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 2 QEI,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 2 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, 2 I2S, up to 60 GPIOs 16 dual-sample with deadband and 4 fault
Modules, each 32- 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit channels, each Peripheral Interface, Precision
up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 21 3 Analog Comp 48 LQFP -40 to +85
Timer/PWM/CCP to 36 GPIOs -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, two 1 UART, 1 SSI/SPI, up to 33 21 2 Analog Comp, 48 LQFP -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP GPIOs 3 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 23 1 Analog Comp, 48 LQFP -40 to +85
Timer/PWM/CCP to 28 GPIOs 8 single-sample -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 SSI/SPI, up to 36 23 3 Analog Comp 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP GPIOs -40 to +105 with deadband and 1 fault
Modules, each 32- inputs,
bit or 2x16-bit

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 152
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S315 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S316 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S317 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power 32-bit
hardware
divide

Texas Instruments LM3S328 General purpose, Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S3651 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S3739 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S3748 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power, Backed 32-bit
Computer peripherals Hibernate hardware
divide

Texas Instruments LM3S3749 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power, Backed 32-bit
Computer peripherals Hibernate hardware
divide

Texas Instruments LM3S5632 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S5652 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S5662 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power, Backed 32-bit
Computer peripherals Hibernate hardware
divide

Texas Instruments LM3S5732 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S5737 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Page 153 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, three 2 UART, 1 SSI/SPI, up to 32 23 1 Analog Comp, 48 LQFP -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP GPIOs 4 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 25 1 Analog Comp, 48 LQFP -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP to 32 GPIOs 4 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 1 UART, 1 SSI/SPI, up to 30 24 1 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP GPIOs 6 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 22 8 single-sample 48 LQFP -40 to +85
Timer/PWM/CCP to 28 GPIOs 10-bit ADC -40 to +105
Modules, each 32- channels, each
bit or 2x16-bit up to 500Ksps

MPU One 24-bit, four 1 UART, 1 I2C, 1 SSI/SPI, 26 2 Analog Comp, 64 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP USB Full Speed O/H/D, up to 4 single-sample
Modules, each 32- 33 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 33 2 Analog Comp, 100 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP USB Full Speed H/D, up to 61 8 single-sample
Modules, each 32- GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, 37 2 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP USB Full Speed H/D, up to 61 8 single-sample with deadband and 4 fault
Modules, each 32- GPIOs 10-bit ADC inputs, 1 QEI, DriverLib /
bit or 2x16-bit channels, each Bootloader in ROM
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 38 2 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP USB Full Speed H/D, up to 61 8 single-sample with deadband and 4 fault
Modules, each 32- GPIOs 10-bit ADC inputs, 1 QEI, DriverLib /
bit or 2x16-bit channels, each Bootloader in ROM
up to 1Msps

MPU One 24-bit, three 2 UART, 2 I2C, 1 SSI/SPI, 1 25 6 single-sample 64 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP CAN, USB Full Speed H/D, up 10-bit ADC
Modules, each 32- to 33 GPIOs channels, each
bit or 2x16-bit up to 500Ksps

MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, 1 24 1 Analog Comp, 64 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP CAN, USB Full Speed O/H/D, 6 single-sample
Modules, each 32- up to 33 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 1 CAN, 26 4 single-sample 64 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP USB Full Speed O/H/D, up to 10-bit ADC with deadband and 1 fault
Modules, each 32- 33 GPIOs channels, each inputs, DriverLib / Bootloader
bit or 2x16-bit up to 500Ksps in ROM

MPU One 24-bit, three 2 UART, 2 I2C, 1 SSI/SPI, 1 25 6 single-sample 64 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP CAN, USB Full Speed H/D, up 10-bit ADC
Modules, each 32- to 33 GPIOs channels, each
bit or 2x16-bit up to 500Ksps

MPU One 24-bit, three 1 UART, 2 I2C, 2 SSI/SPI, 1 28 8 single-sample 100 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP CAN, USB Full Speed H/D, up 10-bit ADC
Modules, each 32- to 61 GPIOs channels, each
bit or 2x16-bit up to 500Ksps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 154
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S5739 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S5747 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power, Backed 32-bit
Computer peripherals Hibernate hardware
divide

Texas Instruments LM3S5749 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power, Backed 32-bit
Computer peripherals Hibernate hardware
divide

Texas Instruments LM3S5752 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Computers and Backed 32-bit
peripherals Hibernate hardware
divide

Texas Instruments LM3S5762 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Digital power, Backed 32-bit
Computer peripherals Hibernate hardware
divide

Texas Instruments LM3S5791 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power, 32-bit
Computer peripherals hardware
divide

Texas Instruments LM3S5B91 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power, 32-bit
Computer peripherals hardware
divide

Texas Instruments LM3S600 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S601 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S608 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S610 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, Digital power, 32-bit
Computer peripherals hardware
divide

Texas Instruments LM3S6100 General purpose, Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep 32-bit multiply,
Communication/wired 32-bit
hardware
divide

Texas Instruments LM3S611 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Page 155 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 1 34 2 Analog Comp, 100 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP CAN, USB Full Speed H/D, up 8 single-sample
Modules, each 32- to 61 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, 1 30 8 single-sample 100 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP CAN, USB Full Speed H/D, up 10-bit ADC with deadband and 1 fault
Modules, each 32- to 61 GPIOs channels, each inputs, DriverLib / Bootloader
bit or 2x16-bit up to 500Ksps in ROM

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, 2 39 2 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, USB Full Speed H/D, up 8 single-sample with deadband and 4 fault
Modules, each 32- to 61 GPIOs 10-bit ADC inputs, 1 QEI, DriverLib /
bit or 2x16-bit channels, each Bootloader in ROM
up to 1Msps

MPU One 24-bit, three 1 UART, 1 I2C, 1 SSI/SPI, 1 24 1 Analog Comp, 64 LQFP -40 to +85 DriverLib / Bootloader in ROM
Timer/PWM/CCP CAN, USB Full Speed O/H/D, 6 single-sample
Modules, each 32- up to 33 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 1 CAN, 26 4 single-sample 64 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP USB Full Speed O/H/D, up to 10-bit ADC with deadband and 1 fault
Modules, each 32- 33 GPIOs channels, each inputs, DriverLib / Bootloader
bit or 2x16-bit up to 500Ksps in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 2 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, USB Full Speed O/H/D, 16 dual-sample with deadband and 4 fault
Modules, each 32- 2 I2S, up to 71 GPIOs 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit channels, each Peripheral Interface, Precision
up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 2 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP CAN, USB Full Speed O/H/D, 16 dual-sample with deadband and 4 fault
Modules, each 32- 2 I2S, up to 71 GPIOs 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit channels, each Peripheral Interface, Precision
up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 21 3 Analog Comp 48 LQFP -40 to +85
Timer/PWM/CCP to 36 GPIOs -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 25 3 Analog Comp 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 36 GPIOs -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 23 1 Analog Comp, 48 LQFP -40 to +85
Timer/PWM/CCP to 28 GPIOs 8 single-sample -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 25 2 single-sample 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 34 GPIOs 10-bit ADC -40 to +105 with deadband and 1 fault
Modules, each 32- channels, each inputs,
bit or 2x16-bit up to 500Ksps

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 10/100 20 1 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP Ethernet MAC/PHY, up to 30 BGA -40 to +105
Modules, each 32- GPIOs
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 25 4 single-sample 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 32 GPIOs 10-bit ADC -40 to +105 with deadband and 1 fault
Modules, each 32- channels, each inputs,
bit or 2x16-bit up to 500Ksps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 156
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S6110 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, 32-bit
Communication/wired hardware
divide

Texas Instruments LM3S612 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S613 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S615 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S617 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S618 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S628 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S6420 General purpose, Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep 32-bit multiply,
Communication/wired 32-bit
hardware
divide

Texas Instruments LM3S6422 General purpose, Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep 32-bit multiply,
Communication/wired 32-bit
hardware
divide

Texas Instruments LM3S6432 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security, 32-bit
Communication/wired hardware
divide

Texas Instruments LM3S6537 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Backed 32-bit
Communication/wired Hibernate hardware
divide

Texas Instruments LM3S6610 General purpose, Motor Cortex-M3 25 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Backed 32-bit
Communication/wired Hibernate hardware
divide
Texas Instruments LM3S6611 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S6618 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Page 157 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, three 1 UART, 1 SSI/SPI, 10/100 24 3 Analog Comp 100 LQFP 108 -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP Ethernet MAC/PHY, up to 35 BGA -40 to +105 with deadband and 1 fault
Modules, each 32- GPIOs inputs,
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 24 1 Analog Comp, 48 LQFP -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP to 34 GPIOs 2 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 25 1 Analog Comp, 48 LQFP -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP to 32 GPIOs 4 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 28 3 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 34 GPIOs 2 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 SSI/SPI, up to 30 25 1 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP GPIOs 6 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 SSI/SPI, up to 30 26 1 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP GPIOs 6 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 22 8 single-sample 48 LQFP -40 to +85
Timer/PWM/CCP to 28 GPIOs 10-bit ADC -40 to +105
Modules, each 32- channels, each
bit or 2x16-bit up to 1Msps

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 10/100 21 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP Ethernet MAC/PHY, up to 46 BGA -40 to +105
Modules, each 32- GPIOs
bit or 2x16-bit

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 10/100 25 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP Ethernet MAC/PHY, up to 34 2 single-sample BGA -40 to +105
Modules, each 32- GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, 29 2 Analog Comp, 100 LQFP 108 -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 3 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- to 43 GPIOs 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 34 2 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- IEEE1588, up to 41 GPIOs 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 1 SSI/SPI, 32 3 Analog Comp 100 LQFP 108 -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up BGA -40 to +105 with deadband and 1 fault
Modules, each 32- to 46 GPIOs inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 30 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up BGA -40 to +105
Modules, each 32- to 46 GPIOs
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, 33 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 8 single-sample BGA -40 to +105
Modules, each 32- to 38 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 158
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S6633 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S6637 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S6730 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep 32-bit multiply,
Communication/wired 32-bit
hardware
divide

Texas Instruments LM3S6753 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Backed 32-bit
Communication/wired Hibernate hardware
divide

Texas Instruments LM3S6911 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S6918 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S6938 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S6950 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Backed 32-bit
Communication/wired Hibernate hardware
divide
Texas Instruments LM3S6952 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Backed 32-bit
Communication/wired Hibernate hardware
divide

Texas Instruments LM3S6965 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep, Battery- 32-bit multiply,
Security, Backed 32-bit
Communication/wired Hibernate hardware
divide

Texas Instruments LM3S800 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S801 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S808 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S811 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Page 159 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, 27 1 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 3 single-sample BGA -40 to +105
Modules, each 32- to 41 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 31 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 4 single-sample BGA -40 to +105
Modules, each 32- to 41 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, three 1 UART, 1 SSI/SPI, 10/100 21 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP Ethernet MAC/PHY, up to 46 BGA -40 to +105
Modules, each 32- GPIOs
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 35 2 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- IEEE1588, up to 41 GPIOs 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 30 2 Analog Comp 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up BGA -40 to +105
Modules, each 32- to 46 GPIOs
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 2 I2C, 2 SSI/SPI, 33 2 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 8 single-sample BGA -40 to +105
Modules, each 32- to 38 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 1 SSI/SPI, 32 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 8 single-sample BGA -40 to +105
Modules, each 32- to 38 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, 34 3 Analog Comp 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ BGA -40 to +105 with deadband and 1 fault
Modules, each 32- IEEE1588, up to 46 GPIOs inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, three 3 UART, 1 I2C, 1 SSI/SPI, 34 3 Analog Comp, 100 LQFP 108 -40 to +85 4 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 3 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- to 43 GPIOs 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 2 I2C, 1 SSI/SPI, 38 2 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, up 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- to 42 GPIOs 10-bit ADC inputs, 2 QEI,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 21 3 Analog Comp 48 LQFP -40 to +85
Timer/PWM/CCP to 36 GPIOs -40 to +105
Modules, each 32-
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 25 3 Analog Comp 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 36 GPIOs -40 to +105 with deadband and 1 fault
Modules, each 32- inputs, 1 QEI,
bit or 2x16-bit

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 23 1 Analog Comp, 48 LQFP -40 to +85
Timer/PWM/CCP to 28 GPIOs 8 single-sample -40 to +105
Modules, each 32- 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 26 1 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 32 GPIOs 4 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 160
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S812 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S815 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S817 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S818 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Industrial, Sleep 32-bit multiply,
Security 32-bit
hardware
divide

Texas Instruments LM3S828 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security Sleep 32-bit multiply,
32-bit
hardware
divide

Texas Instruments LM3S8530 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep 32-bit multiply,
Communication/wired 32-bit
hardware
divide
Texas Instruments LM3S8538 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep 32-bit multiply,
Communication/wired 32-bit
hardware
divide

Texas Instruments LM3S8630 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S8730 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S8733 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S8738 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S8930 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S8933 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S8938 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Page 161 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 24 1 Analog Comp, 48 LQFP -40 to +85 2 motion control PWM outputs
Timer/PWM/CCP to 34 GPIOs 2 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 250Ksps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 28 3 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP to 34 GPIOs 2 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, three 2 UART, 1 SSI/SPI, up to 30 25 1 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP GPIOs 6 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, three 2 UART, 1 SSI/SPI, up to 30 26 1 Analog Comp, 48 LQFP -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP GPIOs 6 single-sample -40 to +105 with deadband and 1 fault
Modules, each 32- 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, three 2 UART, 1 I2C, 1 SSI/SPI, up 22 8 single-sample 48 LQFP -40 to +85
Timer/PWM/CCP to 28 GPIOs 10-bit ADC -40 to +105
Modules, each 32- channels, each
bit or 2x16-bit up to 1Msps

MPU One 24-bit, four 1 UART, 1 I2C, 2 SSI/SPI, 26 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 3 BGA -40 to +105
Modules, each 32- CAN, up to 35 GPIOs
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 31 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 8 single-sample BGA -40 to +105
Modules, each 32- IEEE1588, 1 CAN, up to 36 10-bit ADC
bit or 2x16-bit GPIOs channels, each
up to 1Msps

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 25 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 1 BGA -40 to +105
Modules, each 32- CAN, up to 31 GPIOs
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 25 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ BGA -40 to +105
Modules, each 32- IEEE1588, 1 CAN, up to 32
bit or 2x16-bit GPIOs

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 32 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 1 4 single-sample BGA -40 to +105
Modules, each 32- CAN, up to 35 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 3 UART, 1 I2C, 2 SSI/SPI, 32 1 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 1 8 single-sample BGA -40 to +105
Modules, each 32- CAN, up to 38 GPIOs 10-bit ADC
bit or 2x16-bit channels, each
up to 500Ksps

MPU One 24-bit, four 1 UART, 1 I2C, 1 SSI/SPI, 25 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 2 BGA -40 to +105
Modules, each 32- CAN, up to 34 GPIOs
bit or 2x16-bit

MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 32 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 4 single-sample BGA -40 to +105
Modules, each 32- IEEE1588, 1 CAN, up to 36 10-bit ADC
bit or 2x16-bit GPIOs channels, each
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 1 SSI/SPI, 34 3 Analog Comp, 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 8 single-sample BGA -40 to +105
Modules, each 32- IEEE1588, 1 CAN, up to 38 10-bit ADC
bit or 2x16-bit GPIOs channels, each
up to 1Msps

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 162
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments LM3S8962 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Digital power, Sleep, Battery- 32-bit multiply,
Industrial, Security, Backed 32-bit
Communication/wired Hibernate hardware
divide

Texas Instruments LM3S8970 General purpose, Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide
Texas Instruments LM3S8971 General purpose, Motor Cortex-M3 50 internal: 32 16, 32 2.5 / 3.3 Sleep, Deep Single-cycle
control, Digital power, Sleep, Battery- 32-bit multiply,
Industrial, Security, Backed 32-bit
Communication/wired Hibernate hardware
divide

Texas Instruments LM3S9790 General purpose, Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S9792 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Digital power, Sleep 32-bit multiply,
Industrial, Security, 32-bit
Communication/wired hardware
divide

Texas Instruments LM3S9B90 General purpose, Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
Industrial, Security, Sleep, Battery- 32-bit multiply,
Communication/wired Backed 32-bit
Hibernate hardware
divide

Texas Instruments LM3S9B92 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Digital power, Sleep 32-bit multiply,
Industrial, Security, 32-bit
Communication/wired hardware
divide

Texas Instruments LM3S9B95 General purpose, Motor Cortex-M3 80, 100 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Digital power, Sleep 32-bit multiply,
Industrial, Security, 32-bit
Communication/wired hardware
divide

Texas Instruments LM3S9B96 General purpose, Motor Cortex-M3 80 internal: 32 16, 32 1.2 / 3.3 Sleep, Deep Single-cycle
control, Digital power, Sleep 32-bit multiply,
Industrial, Security, 32-bit
Communication/wired hardware
divide

Texas Instruments MSP430F2xx Audio, Computer MSP430 Up to 16 16/20 16 1.8 to 3.6 515 µA/MHz; Standby: 300 16x16
Peripherals, Consumer, 0.9 to 1.6 nA, Off: 0.1 µA
General purpose, mW/MHz
Industrial, Imaging and
video, Medical,
Mobile/wireless, Security

Texas Instruments MSP430F5xx Audio, Computer MSP430 Up to 25 20 16 1.8 to 3.6 230 µA/MHz; Standby: 1.5 µA, 32x32
Peripherals, Consumer, 0.47 to 0.5 Off: 0.1 µA
General purpose, mW/MHz
Industrial, Imaging and
video, Medical,
Mobile/wireless, Security

Texas Instruments MSP430G2xx Audio, Consumer, MSP430 Up to 16 16/16 16 1.8 to 3.6 515 µA/MHz; Standby: 300
General purpose, 0.9 to 1.6 nA, Off: 0.1 µA
Industrial, Imaging and mW/MHz
video, Medical,
Mobile/wireless, Security

Page 163 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
MPU One 24-bit, four 2 UART, 1 I2C, 1 SSI/SPI, 36 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 4 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- IEEE1588, 1 CAN, up to 42 10-bit ADC inputs, 2 QEI,
bit or 2x16-bit GPIOs channels, each
up to 500Ksps

MPU One 24-bit, four 2 UART, 1 I2C, 2 SSI/SPI, 28 100 LQFP 108 -40 to +85
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ BGA -40 to +105
Modules, each 32- IEEE1588, 3 CAN, up to 46
bit or 2x16-bit GPIOs

MPU One 24-bit, four 1 UART, 1 SSI/SPI, 10/100 34 1 Analog Comp, 100 LQFP 108 -40 to +85 6 motion control PWM outputs
Timer/PWM/CCP Ethernet MAC/PHY, 1 CAN, up 8 single-sample BGA -40 to +105 with deadband and 1 fault
Modules, each 32- to 38 GPIOs 10-bit ADC inputs, 1 QEI,
bit or 2x16-bit channels, each
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 3 Analog Comp, 100 LQFP -40 to +85 32-bit External Peripheral
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 2 16 dual-sample Interface, Precision Internal
Modules, each 32- CAN, USB Full Speed O/H/D, 10-bit ADC Oscillator, DriverLib /
bit or 2x16-bit 2 I2S, up to 60 GPIOs channels, each Bootloader in ROM
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 2 16 dual-sample with deadband and 4 fault
Modules, each 32- CAN, USB Full Speed O/H/D, 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit 2 I2S, up to 65 GPIOs channels, each Peripheral Interface, Precision
up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 3 Analog Comp, 100 LQFP -40 to +85 32-bit External Peripheral
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 2 16 dual-sample Interface, Precision Internal
Modules, each 32- CAN, USB Full Speed O/H/D, 10-bit ADC Oscillator, DriverLib /
bit or 2x16-bit 2 I2S, up to 60 GPIOs channels, each Bootloader in ROM
up to 1Msps

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY, 2 16 dual-sample with deadband and 4 fault
Modules, each 32- CAN, USB Full Speed O/H/D, 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit 2 I2S, up to 65 GPIOs channels, each Peripheral Interface, Precision
up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 16 dual-sample with deadband and 4 fault
Modules, each 32- IEEE1588, 2 CAN, USB Full 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit Speed O/H/D, 2 I2S, up to 65 channels, each Peripheral Interface, Precision
GPIOs up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

MPU One 24-bit, four 3 UART, 2 I2C, 2 SSI/SPI, 3 Analog Comp, 100 LQFP -40 to +85 8 motion control PWM outputs
Timer/PWM/CCP 10/100 Ethernet MAC/PHY w/ 16 dual-sample with deadband and 4 fault
Modules, each 32- IEEE1588, 2 CAN, USB Full 10-bit ADC inputs, 2 QEI, 32-bit External
bit or 2x16-bit Speed O/H/D, 2 I2S, up to 65 channels, each Peripheral Interface, Precision
GPIOs up to 1Msps Internal Oscillator, DriverLib /
Bootloader in ROM

up to 10 16-bit,16- Up to 64 GPIO All peripherals 16 channel, 4x4 to 7x7 -40 to +105 Comparator, internal $0.55 to
bit watchdog, 16- Spy-Bi-Wire Interface and I/O 10/12-bit SAR QFN, temperature sensor $7.60
bit PWM, UART/LIN/IrDA/SPI and ADC 14/20/28/38 Internal ultra-Low Power LF
I2C/SPI 4 channel 16-bit pin TSSOP oscillator
∑∆ ADC 14 pin DIP Op-amp, DMA, system voltage
2 channel 12-bit 64/80 pin supervisor, watchdog,
∑∆ DAC TQFP brownout reset
Up to 12 16-bit, Up to 87 GPIO All peripherals 16 channel, 12- 64 QFN -40 to +85 Programmable core voltage $3.25 to
realtime, 16-bit UART/LIN/IrDA/SPI and and I/O bit SAR ADC 80/100 TQFP with PMM, flexible clock 5.50
watchdog, 16-bit I2C/SPI 113 BGA system
PWM Comparator
Internal ultra-Low Power LF
oscillator
Op-amp, DMA, system voltage
supervisor, watchdog,
brownout reset, USB

16-bit,16-bit Up to 10 GPIO pins, Spy-Bi- All peripherals 8 channel, 10-bit TSSOP 14, -40 to +85 Comparator, internal $0.31 to
watchdog, 16-bit Wire interface, USI (SPI & and I/O PDIP 14, QFN temperature sensor, watchdog, $0.47
PWM I2C) 16 brownout reset

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 164
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments MSP430x1xx Audio, Computer MSP430 Up to 8 16 16 1.8 to 3.6 500 µA/MHz; Standby: 1.6 µA, 16x16
Peripherals, Consumer, 0.9 to 1.5 Off: 0.1 µA
Industrial, Imaging and mW/MHz
video, Medical,
Mobile/wireless, Security

Texas Instruments MSP430x4xx Consumer, Imaging and MSP430 Up to 16 16/20 16 1.8 to 3.6 600 µA/MHz; Standby: 0.7 µA, 16x16 or
video, Medical, 0.9 to 1.8 Off: 0.1 µA 32x32
Mobile/wireless, Security, mW/MHz
Industrial

Texas Instruments OMAP35x Consumer, Commercial, Imaging and 600 for 16, 32 16 0.8 to 1.35 <220 mW @ 477uW standby
Industrial, Automotive, Video Audio Cortex-A8, 300 MHz at (allows for
Medical Acclerator 360 to 430 85% processor autonomous
(IVA) for DSP utilization wakeup)

Texas Instruments OMAP-L137 Audio, Medical, ARM926EJ-S 375/456 16/8 EMIFA, 32 3.3 <500 mW 1.2V (Core) Six ALU (32-
Industrial, Other ARM, 32/16 EMIFB /40-Bit)
375/456 Functional
DSP Units, Two
Multiply
Functional
Units

Texas Instruments OMAP-L138 Industrial, ARM926EJ-S Up to 450 16 EMIFA, 32 1.8, 3.3 <500 mW 1.0 to 1.3V Six ALU (32-
Communication/wired, ARM, Up to 16 EMIFB (Core) /40-Bit)
Audio, Medical, Other 450 DSP Functional
Units, Two
Multiply
Functional
Units

Texas Instruments Piccolo Automotive, Consumer, TMS320C28x 40 to 60 Internal:16/32 16, 32 1.9 / 3.3 <300 mW Four modes, 32x32; dual
TMS320F2802/F28 Industrial, Medical, Motor each peripheral 16x16
03x control, Digital power independently

Texas Instruments TMS320C54x Communication/wired, Viterbi 50 to 160 16/16 16 1.5 to 2.5 / 72 mW Three modes
Mobile/wireless 1.8 to 3.6

Page 165 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-bit watchdog, Up to 48 GPIO All peripherals 8 channel, 10/12- 20/24/28 -40 to +85 Comparator, internal $0.95 to
two 16-bit PWM, USART, I2C/SPI and I/O bit SAR ADC TSSOP temperature sensor $7.95
up to 10 16-bit 2 channel 12-bit 32/64 QFN, Internal ultra-Low Power LF
∑∆ DAC QFP oscillator
Op-amp, DMA, system voltage
supervisor, watchdog,
brownout reset
16-bit watchdog, Up to 80 GPIO, All peripherals 12 channel, 48 SSOP -40 to +85 Comparators $1.70 to
up to 16-bit PWM, UART/LIN/IrDA/SPI and and I/O 10/12-bit SAR 48 QFN Internal ultra-Low Power LF $9.25
up to 6 16-bit I2C/SPI ADC 64/80/100 QFP oscillator, RTC,
5 channel 16-bit 113 BGA Op-amps, DMA, system
∑∆ ADC voltage supervisor, watchdog,
2 channel 12-bit brownout reset
∑∆ DAC Up to 160 segment LCD
controller
256-kbyte ARM: General, Connectivity: USB 2.0 HS 10-bit DAC .65 pitch BGA -40 to +105 OpenGL ES 2.0 Graphics $20.00 to
16-kbyte I-Cache, watchdog Compliant OTG Controllers w/ Engine, SmartReflex $36.90
16-kbyte D- additional 2 USB Host Technology, Display
Cache, 256-kbyte Controllers subsystem with PIP, color
L2 Serial Interfaces: McBSP, space conversion, rotation and
On Chip: 64-kbyte McSPI, I2C, UART resizing support, camera
SRAM, 112-kbyte Data Storage: SDRC, GPMC, Interface
ROM MMC/SD/SDIO, UART,
DSP: L1 32-kbyte mSDRAM, LPDDR
Program
Cache/32-kbyte
Data Cache, 48-
kbyte SRAM, L2
64-kbyte
Program/Data
Cache, 32-kbyte
SRAM, 16-kbyte
ROM
Yes 32/32-kbyte 488-kbyte RAM, Two 64-bit or 4 32- EMIFB, EMIFA, Flash Card BGA 0 to +90, $13.85 to
EMIFA: NOR (8- bit general Timer Interface, EDMA3, Timers, -40 to +90 $18.7
/16-Bit-Wide with one UART, SPI, I2C, Multichannel -40 to +105
Data), NAND (8- Watchdog timer, Audio Serial Port, 10/100 -40 to +125
/16-Bit-Wide Three Enhanced Ethernet MAC w/ management
Data), SDRAM PWM data I/O, eHRPWM, eCAP,
(16bit With 128- eQEP, UHPI, USB. 2.0, USB
Mbyte Address) 1.1, General purpose I/O port,
EMIFB: 32 or 16 LCD controller
bit with 256-
Mbyte address

Yes 32/32-kbyte 488-kbyte RAM, 3 64-bit, 64-bit EMIFB, EMIFA, Flash Card BGA 0 to +90, LCD controller $15.80 to
EMIFA: NOR (8- watchdog, Interface, UART, SPI, I2C, -40 to +105 $21.30
/16-Bit-Wide realtime, EDMA3, Multichannel Audio Serial -40 to +90
Data), NAND (8- 2 Enhanced PWM Port, Multichannel Buffered
/16-Bit-Wide Serial Port, 10/100 Ethernet
Data), SDRAM MAC, eCAP, UHPI, USB. 2.0,
(16bit With 128- USB 1.1, GPIO, Video Port
Mbyte Address) Interface, Serial ATA
EMIFB: 16-Bit Controller, Universal Parallel
DDR2 SDRAM Port
With 512-Mbyte
Address Space or
16-Bit mDDR
SDRAM With 256-
Mbyte Address
Space

16 and 32-bit, 16- SCI, 2 SPI, CAN, I²C, LIN, 44 All peripherals 12-bit, 2 SH, 7- 38 TSSOP, -40 to +105 Control Law Accelerator for $1.85 to
bit PWM GPIO and I/O 16 channel; 10- 48 LQFP, -40 to +125 floating point parallel operation $4.50
bit DAC 64 TQFP,
80 LQFP
16-bit or 32-bit DMA, EMAC, HPI, McBSP, 144 LQFP -40 to +100 $2.99 to
EMIF I2C, SPI, UART, 16-bit timer, 144/143 BGA $20.00
16, 512-kbyte EHPI, PLL clock generator,
RAM, 8 to 256- programmable bank switching,
kbyte ROM BSP, JTAG, TDM serial port,
software waitstate generator

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 166
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments TMS320C55x Mobile/wireless, Audio Viterbi,FFT 60 to 300 16/16 16 1.05 to 1.6 / 26.4 mW @ Three modes,
2.7 to 3.6 120 MHz at Stand-by aslow
100% CPU as 0.15mW and
utilization RTC-only mode
<15uW

Texas Instruments TMS320C6474 Imaging and video, Viterbi, Turbo 1200 per 32/32  16, 32  0.9 to 1.1  / ~6 to 7 W Four modes for
multicore Military/aerospace, Test decoder core (3- 1.8, 1.1 core, five power
and measurement cores) domains for on-
chip IO

Texas Instruments TMS320C64xx Mobile/wireless, Audio, Viterbi, Turbo 300 to 1200 32/64, 32/32 16, 32 1.05 to 1.4 / ~0.4 to ~ 7 W Four modes
Medical, Imaging and decoder 1.2 to 3.3
video

Texas Instruments TMS320C6742 Industrial, 200 DSP 16 EMIFA, 32 1.8, 3.3 <500 mW 1.2 V (Core) Six ALU (32-
Communication/wired, 16 EMIFB /40-Bit)
Audio, Medical, Other Functional
Units, Two
Multiply
Functional
Units

Texas Instruments TMS320C6743x 200, 375 8 EMIFA,16 32 3.3 <500 mW 1.2 V (core) Six ALU (32-
EMIFB /40-Bit)
Functional
Units, Two
Multiply
Functional
Units

Texas Instruments TMS320C6745x 375, 456 16/8 EMIFA, 32 3.3 <500 mW 1.2 V (core) Six ALU (32-
32/16 EMIFB /40-Bit)
Functional
Units, Two
Multiply
Functional
Units

Texas Instruments TMS320C6746 Industrial, Up to 450 16 EMIFA, 32 1.8, 3.3 <1 W 1.0V-1.3V Six ALU (32-
Communication/wired, DSP 16 EMIFB (Core) /40-Bit)
Audio, Medical, Other Functional
Units, Two
Multiply
Functional
Units

Page 167 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16-bit or 32-bit 32-bit USB 2.0 High Spped 10-bit, two or 144 to 176 -40 to +85 $2.99 to
EMIF (480Mbps), ADC, I2C, four channel LQFP $15
32 to 320-kbyte MMC/SD, HPI, LCD i/f, Video 179 to 240
RAM, 32 to 128- Hardware Extensions BGA
kbyte ROM (DCT/Inverse DCT, Pixel
Interpolation, Motion
Estimation) UART, McBSPs,
DMA, EHPI, DMA
192-kbyte (3 x 16-/32-bit (DDR2- EDMA, Gigabit Ethernet MAC, BGA 0 to +100 65 nm process node, 100% $176
64-kbyte per 667 SDRAM) Serial RapidIO,  AIF, McBSP, object code compatible with
core total) EMIF, 192-kbyte I2C, 64-bit timers, TCP2, C64xx processors
L1, 3-Mbyte L2 VCP2

16 to 32-kbyte, 32-bit EDMA, EMAC, Serial RapidIO, BGA 0 to +90, Latest processors on 65-nm $8.95 to
L2: 128-kbyte (DDR2SDRAM / PCI (33-66 MHz), HPI, -40 to +105 process node, 100% object $176
to 1-Mbyte AsyncSRAM/ UTOPIA, McBSP, McASP, code compatibility within
SBSRAM/ I2C, 32 to 64-bit timers, TCP2, platform
SDRAM) EMIF, VCP2, Gigabit-EMAC
32 to 64-bit
EMIFA, 32-kbyte
L1, 128 to 2-
Mbyte L2
Yes 32/32-kbyte 128-kbyte RAM, 64-bit, 64-bit EMIFB, EMIFA, Flash Card BGA 0 to +90, $5.20 to
EMIFA: watchdog, 2 Interface, EDMA3, Timers, -40 to +105 $6.25
NOR/NAND (8/16- Enhanced PWM UART, SPI, I2C, Multichannel
bit), SDRAM (16- Audio Serial Port,
bit, 128-Mbyte Multichannel Buffered Serial
Address) EMIFB: Port, eCAP, UHPI, GPIO
16-bit DDR2
SDRAM with 512-
Mbyte Address or
16-Bit mDDR
SDRAM with 256-
Mbyte Address

Yes 32/32-kbyte 192-kbyte RAM, EMIFB, EMIFA, Flash Card QFP, BGA 0 to +90, $5.9 to
EMIFA: Interface, EDMA3, Timers, -40 to +125 X9$7.95
NOR/NAND (8- UART, SPI, I2C, Multichannel
bit), SDRAM (16- Audio Serial Port, 10/100
bit With 128- Ethernet MAC w/ management
Mbyte Address) data I/O, eHRPWM, eCAP,
EMIFB: 16-bit eQEP, GPIO
with 256-Mbyte
address

Yes 32/32-kbyte 320-kbyte RAM, Two 64-bit or 4 32- EMIFB, EMIFA, Flash Card QFP 0 to +90 LCD controller $9.45 to
1088-kbyte ROM, bit general Timer, Interface, UART, SPI, I2C, -40 to +105 $12.8
EMIFA: watchdog, Multichannel Audio Serial -40 to +90
NOR/NAND (8/16- EDMA3, Three Port, 10/100 Ethernet MAC w/ -40 to +125
Bit), SDRAM (16- Enhanced PWM management data I/O, eCAP,
bit With 128- eQEP, UHPI, USB. 2.0 full
Mbyte Address) speed, USB 1.1, GPIO
EMIFB: 32 or 16
bit with 256-
Mbyte address

Yes 32/32-kbyte 320-kbyte RAM, 3 64-bit, 64-bit EMIFB, EMIFA, Flash Card BGA 0 to +90 LCD controller, Video Port $10.50 to
EMIFA: watchdog, Interface, UART, SPI, I2C, -40 to +105 Interface $14.15
NOR/NAND (8/16- EDMA3, realtime, Multichannel Audio Serial -40 to +90
bit), SDRAM (16- 2 Enhanced PWM Port, Multichannel Buffered
bit With 128- Serial Port, 10/100 Ethernet
Mbyte Address) MAC w/ management data I/O,
EMIFB: 16-Bit eCAP, UHPI, USB. 2.0, GPIO,
DDR2 SDRAM Universal Parallel Port
With 512-Mbyte
Address or 16-Bit
mDDR SDRAM
With 256-Mbyte
Address

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 168
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments TMS320C6747x 375, 456 Two 32 3.3 <500 mW 1.2 V (core) Six ALU (32-
16/8 EMIFA, /40-Bit)
32/16 EMIFB Functional
Units, Two
Multiply
Functional
Units

Texas Instruments TMS320C6748 Industrial, Up to 450 16 EMIFA, 32 1.8, 3.3 <1 W 1.0 to 1.3V Six ALU (32-
Communication/wired, DSP 16 EMIFB (Core) /40-Bit)
Audio, Medical, Other Functional
Units, Two
Multiply
Functional
Units

Texas Instruments TMS320DM3x Imaging and video, MPEG-4/JPEG 135 to 432 DMA data and 16, 32 1.8, 3.3 1mW for
Medical Co-processor, configuration standby power
Video bus (deep sleep
Processing mode)
Subsystem
with previewer,
histogram,
resizer, OSD,
H3A

Texas Instruments TMS320DM643x Imaging and video, 300 to 700 PCI (32), 32 1.05 to 1.2 / 0.6 to 1.0 W Individual Power-
Security, Automotive EMIF (8), 3.3 Savings Modes
DDR2 (16/32),
HPI (16)

Texas Instruments TMS320DM644x Imaging and video, Video and 594 to 405 EMIF (8/16), 32 1.05 to 1.2 / 0.7 to 1.1 W Individual Power-
Security, Automotive Imaging Co- (DSP), 297 DDR2 (16/32), 1.8, 3.3 Saving Modes
processor to 202 HPI (16) for ARM/DSP
(ARM)

Texas Instruments TMS320DM646x Imaging and video, HD Video and 300 to 500 PCI (32), EMIF 16 or 32 1.05 to 1.2 / SmartReflex,
Security, Medical Imaging Co- (ARM) 600 (8/16), DDR2   1.8, 3.3 Individual Power-
processor with to 1000 (16/32), HPI Saving Modes
TCM RAM, (DSP) (32/16) for ARM/DSP
ME, MC,
CALC, IPDE,
LF, ECD,
chroma
conversion,
downscaler,
menu overaly,
VDCE, edge
padding, anti-
alias filtering

Texas Instruments TMS320DM64x Imaging and video,  Video and 400 to 900 PCI (32), EMIF 32 1.2 / 1.8, 0.4 to 1.7 W Individual Power-
Security, Automotive Imaging Co- (16), DDR2 3.3 Saving Modes
processor (for (32),
nly HPI (32/16)
DM647/DM648
)
Texas Instruments TMS320F280x Automotive, Consumer, TMS320C28x 60 to 100 Internal:16/32 16, 32 1.8 / 3.3 425 mW Four modes, 32x32; dual
Industrial, Medical, Motor each peripheral 16x16
control, Digital power independently

Texas Instruments TMS320F281x Automotive, Consumer, TMS320C28x 150 Internal:16/32 16, 32 1.9 / 3.3 625 mW Four modes, 32x32; dual
Industrial, Medical, Motor External: 16/32 each peripheral 16x16
control, Digital power independently

Texas Instruments TMS320F2823x Automotive, Consumer, TMS320C28x 100 to 150 Internal:16/32 16, 32 1.9 / 3.3 800 mW Four modes, 32x32; dual
Industrial, Medical, Motor External: 16/32 each peripheral 16x16
control, Digital power independently

Page 169 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Yes 32/32-kbyte 448-kbyte RAM, Two 64-bit or 4 32- EMIFB, EMIFA, Flash Card BGA 0 to +90 LCD controller $11.05 to
EMIFA: bit general Timer, Interface, UART, SPI, I2C, -40 to +105 $14.90
NOR/NAND (8/16- watchdog, Multichannel Audio Serial -40 to +90
bit), SDRAM EDMA3, Three Port, 10/100 Ethernet MAC w/ -40 to +125
(16bit With 128- Enhanced PWM management data I/O, eCAP,
Mbyte Address) eQEP, UHPI, USB. 2.0, USB
EMIFB: 32 or 16 1.1, GPIO
bit with 256-
Mbyte address

Yes 32/32-kbyte 448-kbyte RAM, 3 64-bit, 64-bit EMIFB, EMIFA, Flash Card BGA 0 to +90 LCD controller, Video Port $12.90 to
EMIFA: watchdog, Interface, UART, SPI, I2C, -40 to +105 Interface, Serial ATA Controller $17.4
NOR/NAND (8/16- EDMA3, realtime, Multichannel Audio Serial -40 to +90
bit), SDRAM (16- 2 Enhanced PWM Port, Multichannel Buffered
bit With 128- Serial Port, 10/100 Ethernet
Mbyte Address) MAC w/ management data I/O,
EMIFB: 16-Bit eCAP, UHPI, USB. 2.0, USB
DDR2 SDRAM 1.1, GPIO, MMC/SD,
With 512-Mbyte Universal Parallel Port
Addressor 16-Bit
mDDR SDRAM
With 256-Mbyte
Address

16/8-kbyte 32-kbyte RAM, 8- PWM USB 2.0 HS OTG, mini-host w/ 10-bit DAC 337-338 BGA -40 to +100 $8.00 to
kbyte ROM PHY, EDMA, ASP, UART, 10- $25.70
EMIF, Mobile bit DAC, MMC, I2C, SPI,
DDR/DDR2, UART,4 RTO
NAND /ECC,
MMC/SDIO

32/80-kbyte, DDR2/Async/Flas EMIF, EDMA, PCI, VLYNQ, 361 BGA 0 to +90 $9.06 to
128-kbyte L2 h EMIF, 64- EMAC, HPI, JTAG, DDR, PLL, 376 BGA -40 to +125 $25.06
channel EDMA CAN, UART, McBSP, McASP,
OSC

16/8-kbyte DDR2/Async/Flas EMIF, EDMA, PCI, VLYNQ, 361 BGA 0 to +85 $23.75 to
(ARM); 32/80- h EMIF, ATA, EMAC, HPI, JTAG, DDR, PLL, -40 to +105 $30.1
kbyte, 64- SmartMedia/SSF CAN, UART, McBSP, McASP,
kbyte L2(DSP) DC/xD, 64- OSC
channel EDMA

16/8-kbyte DDR2/Async/Flas EDMA, PCI, UHPI, USB 2.0 529 BGA 0 to +85 $52.25 to
(ARM); 32- h EMIF, ATA, PHY, VLYNQ, G-EMAC with -40 to +85 $83.6
kbyte 128- SmartMedia/SSF MDIO, Timer, WD Timer, -40 to +105
kbyte L2 DC/xD, 64- PWM, HPI, VDCE, CRGEN,
(DSP) channel EDMA I2C, SPI, UART,

16-kbyte, 128- DDR2/Async/Flas Up to three EMIF, PCI, HPI, EMAC, DMA, 0 to +90 $17.75 to
kbyte L2 h EMIF, up to three video ports, up to 548 BGA 529 - 40 to +90 $59.55
32-kbyte, 256- 64-channel EDMA two McBSPs, McASP, GPIO BGA -40 to +105
to 512-kbyte
L2

16 and 32-bit, 16- 4 SPI, 2 SCI, 2 CAN, I²C, 35 96 12-bit, 2 SH, 16- 100 -40 to +85 Hi-Res PWM technology $3 to
bit PWM GPIO channel LQFP/BGA -40 to +125 provides 16 bits of accuracy in $12.95
a 100 KHz control loop and 12
bits at 1MHz
16 and 32-bit, 16- SPI, 2 SCI, CAN, McBSP, 56 96 12-bit, 2 SH, 16- 128/176 LQFP, -40 to +85 High performance 150MHz 32- $13 to $15
bit PWM GPIO channel 179 BGA -40 to +125 bit C28x core.

16 and 32-bit, 16- 3 SCI, SPI, 2 CAN, 2 McBSP, 96 12-bit, 2 SH, 16- 176 LQFP, 179 -40 to +85 Hi-Res PWM technology $12 to $14
bit PWM I²C, 88 GPIO channel BGA -40 to +125 provides 16 bits of accuracy in
a 100 KHz control loop and 12
bits at 1MHz

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 170
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Texas Instruments TMS320TCI6487 Mobile/wireless, Other Turbo & Viterbi 1200 128 64 to 128 0.9 to 1.2 / 6.5 to 8 W 4.5 W
(3 core) CoProcessors, 1.1, 1.8 depending
WCDMA upon
Receiver application
Accelerator With Smart
Reflex (SR)
Texas Instruments TMS470 R1Axxx Consumer, Industrial, TMS470 Up to 48 32 16, 32 1.8 to 2 70 mA Standby: 2 mA 8x32
Medical, General Halt: 1 mA
purpose
Texas Instruments TMS470 R1Bxxx Consumer, Industrial, TMS470 Up to 60 32 16, 32 1.8 to 2 125 mA Standby:4 mA 8x32
Medical, General Halt 2 mA
purpose
Texas Instruments TMS470M Automotive ARMv7M 48 to 80 32/32 16, 32 1.5 / 3.3 350 mW Two modes 32 hardware
Automotive multiplier, 32
hardware
divider
Texas Instruments TMS470PLF4/6x Automotive ARMv4T 48 to 72 32/32 16, 32 1.8 / 3.3 or 250 mW Two modes 32 hardware
Automotive 1.5 / 3.3 multiplier

Texas Instruments TMS470R1X Automotive ARMv4T 24 to 72 32/32 16, 32 1.8 / 3.3 300 mW Two modes 32 hardware
Automotive multiplier

Texas Instruments TMS570 Automotive ARMv7R 80 to 160 32/64 16, 32 1.5 / 3.3 550 mW Two modes 32 hardware
Automotive multiplier, 32
hardware
divider,
DSP/SIMD
extensions

Tiempo TAM16 Customizable Clockless 16 16 0.6 to 1.2 50 µA/MIPS Only leakage


(equivalent
to 5 to 30
MHz)
Toshiba America 770 TLCS 20 3.0 to 3.6 / 16-bit fixed-
Electronic 4.5 to 5.5 point DSP
Components
Toshiba America 870 TLCS 32 kHz to 8 16/8 8 to 32 2.7 to 5.5 / 6 mA Idle: 3 mA, slow: Yes
Electronic (4clock for 1 6 30 µA, sleep: 15
Components machine mA, stop: 0.5 µA
cycle)

Toshiba America 870/C TLCS 32 kHz to 16/8 8 to 40 1.8 to 5.5 7.5 mA Idle: 5.5 mA, Yes
Electronic 16 (4clock slow: 14 µA,
Components for 1 sleep: 6 µA,
machine stop: 0.5 µA
cycle)

Toshiba America 870/C1 TLCS 32 kHz to 8 16/8 8 to 40 1.8 to 5.5 17.0 mA Idle: 5.5 mA, Yes
Electronic (1clock for 1 slow: 25 µA,
Components machine sleep: 12 µA,
cycle) stop: 10 µA

Toshiba America 870/X TLCS 20/8 8 to 48 4.5 to 5.5 20 mA Idle: 16 mA, Yes
Electronic stop: 0.5 mA
Components

Toshiba America 900/H1 TLCS 20, 80 24/32 8, 16, 32 3.0 to 3.6, 37 mA/45 mA Idle2: 26 mA, One-clock
Electronic 4.5 to 5.5 (20/80 MHz) idle1: 2.7 mA, cycle MAC:
Components stop: 0.4 µA 32x32+64bit

Toshiba America 900/L1 TLCS 36 24/16 8, 16, 32 1.8 to 2.2, 23 mA Idle2: 16 mA, Yes
Electronic 2.7 to 3.3, idle1: 1.6 mA,
Components 4.5 to 5.5 stop: 0.2 µA

Toshiba America TMPA900CMXBG Computers and ARM926EJ-S 200/150 24/32 32 1.5 TBD CPU and I/O single-cycle
Electronic peripherals, Consumer, Clock control, MAC, 16-bit
Components Industrial power plane DSP math
control

Page 171 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
32-kbyte L1, 3-Mbyte L2 2x Serial Rapid IO, Ethernet: 561 Pin BGA 0 to +100
L2 3072-kbyte SGMI, DDR2 @ 667 MHz, 6 23x23 mm
Lanes of OBSAI/CPRI, McBSP

12 to 16 HET 2 SPI, 2 SCI, 1 to 2 CAN, 40 to All peripherals 8- to 16-channel 80/100/144 -40 to +105 analog watchdog timer $4.95 to
channel 94 GPIO and I/O 10-bit LQFP $8.95

12 to 32 HET 2 to 5 SPI, 2 to 3 SCI, 1 to 2 All peripherals 12- to 16- 144 LQFP -40 to +105 analog watchdog timer $9.95 to
channel CAN, 87 to 93 GPIO and I/O channel 10-bit $14.95

MPU Up to 24 x-bit/ Up Up to 3 SPI, 2 LIN/SCI, 2 CAN, 8 external, 64 10-bit, 16- 80 to 144 -40 to +85, Optional program and $4.40 to
to 24 x-bit PWM 40-84 GPIO internal channel LQFP -40 to +105, instrumentation trace, main $6.75
-40 to +125 memory ECC, peripheral parity

MPU Up to 24 x-bit/ Up 1 SPI, 1 MibSPIP, 1 LIN/SCI, 2 48 10-bit, 16- 144 TQFP -40 to +105, Optional program and data $5.00 to
to 24 x-bit PWM CAN, 40-84 GPIO channel trace; optional safety lock step $8.00
dual core, main memory
parity/ECC, peripheral parity

MPU Up to 32 x-bit/ Up Up to 5 SPI, 2 SCI, 3 CAN, 5 8 external, 64 10-bit, up to 32- 80 to 144 -40 to +85, $4.25 to
to 32 x-bit PWM i2C, C2SI, 40-187 GPIO internal channel LQFP -40 to +105, $17.00
176 to 324 -40 to +125
PBGA
Planned Planned MPU Up to 32 x-bit/ Up Up to 3 SPI, 2 LIN/SCI, 3 CAN, 8 external, 64 10-bit, up to 32- 100 to 176 -40 to +85, Optional program and data $7.90 to
to 32 x-bit PWM FlexRay, 40-105 GPIO internal channel LQFP -40 to +105, trace; optional calibration $19.10
12-bit, up to 24- 208 to 256 -40 to +125 interface; safety lock step dual
channel PBGA core or M3 I/O processor, main
memory parity/ECC, peripheral
parity

3 cascadable 1 UART, 16-bit Programmable Programmable (Core) Based on Clockless technology Licence and
Timers, PWM, Input/Output (PIO) interrupt royalties
watchdog controller, 16
interrupts
Two 16-bit , Two UART/SIO, 18 PIO Four 10-bit LQFP64 -40 to +125 PMD for EPS(Electric Power
watchdog Steering)

Up to four 8-bit, Up to one UART, up to three 15 Up to 16- SDIP, QFP, -40 to +85 LED, LCD, VFT drivers, dual $1 to $4
up to two 16-bit, synchronous SIO, up to two channel, 8/10-bit LQFP, SSOP, clock, on-screen-display,
up to 18-bit, I²C, up to one high-speed SIO ADC; up to six SOP remote-control pulse detector
watchdog comparator
inputs; up to
eight DACs
Up to four 8-bit, Up to two UART, synchronous 31 Up to 16- SDIP, QFP, -40 to +85 LED, LCD, VFT drivers, POR, $1 to $4
up to two 16-bit, SIO, up to three I²C, channel, 10-bit; LQFP, SSOP, LVD(2level), dual clock,
18-bit, up to right up to one CAN up to eight- SOP brushless motor control
PWM, watchdog channel, 8-bit;
up to one 8-bit
DAC
Up to four 8-bit, Up to three UART, 52 Up to 16- SDIP, QFP, -40 to +85 High-speed processing $1 to $4
up to two 16-bit, synchronous SIO, up to two channel, 10-bit LQFP, capability equivalent to 16-bit
18-bit, up to right I²C, one SEI, up to 56 PIO microcontrollers, dual clock,
PWM, watchdog clock gear, POR, LVD(2levels),
On-Chip Debug, Pull-up
register
Up to four 8-bit, Up to one UART, up to two 63 Up to 16- SDIP, QFP, -40 to +85 LED, VFT drivers, dual clock, $1 to $4
up to three 16-bit, synchronous SIO, up to two channel, 10-bit; LQFP, SOP clock gear, brushless motor
up to 10 PWM, I²C up to 12- control,on-screen-display
watchdog channel, 8-bit

Yes Up to eight 8-bit, Up to three UART, 56, nine CPU, Up to 12- 100/144/160/1 -40 to +85 Four 32-bit register banks, $3 to $10
up to six 16-bit, synchronous SIO, HS SIO, nine external, channel, 10-bit: 76/228/ LCD controller, USB Host &
watchdog, SEI, CAN, SPI, IrDA, I²C, up to 38 internal, two channel 8-bit QFP/LQFP/FB Device,
realtime clock 136 PIO seven levels DAC GA
Yes Up to eight 8-bit, Up to four UART, synchronous 43, nine CPU, Up to 16- 64/80/100/128/ -40 to +85 Four 32-bit register banks, $3 to $10
up to five 16-bit, SIO, IrDA, I²C, up to 83 PIO 6 external, 28 channel, 10-bit QFP/LQFP LCD controller,
watchdog, internal, six
realtime, up to levels
two 8-bit PWM
16/16-kbyte 32-kbyte SRAM, 6 channel 16-bit, USB Host w/PHY; USB Dev 22 internal, 6 4 channel 10-bit FBGA177 -20 to +85 @ Oscillator Frequency Detection $6.75
MMU watchdog, w/PHY; 2 ch UART; 1 ch SPI; external 150MHz; Unit; USB Host with PHY; USB
realtime, 2 PWM 1 ch I2C; 1 ch I2S; 43-pin 0 to +70 @ Dev with PHY; CMOS imager
GPIO 200MHz interface; LCD controller; HW
scale/rotate/blend engine with
HW antialiasing; SD Host
Controller; touch controller;
melody generator;

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 172
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All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Toshiba America TMPA901CMXBG Computers and ARM926EJ-S 200/150 24/32 32 1.5 TBD CPU and I/O single-cycle
Electronic peripherals, Consumer, Clock control, MAC, 16-bit
Components Industrial power plane DSP math
control

Toshiba America TMPA910CRAXBG Computers and ARM926EJ-S 200 26/32 32 1.5 / 1.8 to 300 mW CPU and I/O single-cycle
Electronic peripherals, Consumer, 3.6 Clock control, MAC, 16-bit
Components Industrial power plane DSP math
control

Toshiba America TMPA910CRBXBG Computers and ARM926EJ-S 150 26/32 32 1.5 250 mW CPU and I/O single-cycle
Electronic peripherals, Consumer, Clock control, MAC, 16-bit
Components Industrial power plane DSP math
control

Toshiba America TMPM320C10FG Automotive, Industrial Cortex-M3 144 24/16 32 2.7 to 3.6 TBD PLL Bypass + Single-cycle
Electronic CPU HALT 32-bit multiply,
Components multi-cycle 32-
and 64-bit MLA
/ MLS
saturated/unsa
t

Toshiba America TMPM330FDFG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM330FWFG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM330FYFG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM332FWUG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

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Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
16/16-kbyte 32-kbyte SRAM, 6 channel 16-bit, USB Host w/PHY; USB Dev 22 internal, 6 4 channel 10-bit FBGA177 -20 to +85 @ Oscillator Frequency Detection $6.38
MMU watchdog, w/PHY; 2 ch UART; 1 ch SPI; external 150MHz; Unit; USB Host with PHY; USB
realtime, 2 PWM 1 ch I2C; 1 ch I2S; 43-pin 0 to +70 @ Dev with PHY; CMOS imager
GPIO 200MHz interface; LCD controller; HW
scale/rotate/blend engine with
HW antialiasing; SD Host
Controller; touch controller;
melody generator;

16/16-kbyte 56-kbyte SRAM, 6 channel 16-bit, USB Host w/PHY; USB Dev 22 internal, 6 6 channel 10-bit FBGA289 0 to +70 @ Oscillator Frequency Detection $6.38
MMU watchdog, w/PHY; 3 ch UART; 2 ch SPI; external 200MHz Unit; USB Host with PHY; USB
realtime, 2 PWM 2 ch I2C; 2 ch I2S; 91-pin Dev with PHY; CMOS imager
GPIO interface; LCD controller; HW
scale/rotate/blend engine with
HW antialiasing; SD Host
Controller; touch controller;
melody generator;

16/16-kbyte 56-kbyte SRAM, 6 channel 16-bit, USB Host w/PHY; USB Dev 22 internal, 6 4 channel 10-bit FBGA177 -20 to +85 @ Oscillator Frequency Detection $6.38
MMU watchdog, w/PHY; 2 ch UART; 1 ch SPI; external 150MHz Unit; USB Host with PHY; USB
realtime, 2 PWM 1 ch I2C; 1 ch I2S; 43-pin Dev with PHY; CMOS imager
GPIO interface; LCD controller; HW
scale/rotate/blend engine with
HW antialiasing; SD Host
Controller; touch controller;
melody generator;

1-Mbyte eDRAM 8 channel 16-bit, USB Host with PHY; 4 ch 4 external 4 channel 10-bit LQFP144 -40 to +85 1MB On-chip embedded $7.63
320-kbyte SRAM watchdog, UART; 2 ch I2C/SIO; 4 DRAM; USB Host with PHY;
realtime SPI/Microwire; 55-pin GPIO SD Host Controller; Serial Wire
Debug; 4-bit ETM Real-time
Trace

512-kbyte zero- 10 channel 16-bit, 3 ch UART/SIO; 3 ch I2C/SIO; 42 internal, 8 12 channel 10- LQFP100 -40 to +85 JTAG + Serial Wire Debug; 4- $3.25
waitstate FLASH watchdog, 79-pin GPIO external bit bit ETM Real-time Trace; CEC
32-kbyte, zero- realtime controller; 2-ch remote control
waitstate SRAM signal processor

128-kbyte zero- 10 channel 16-bit, 3 ch UART/SIO; 3 ch I2C/SIO; 42 internal, 8 12 channel 10- LQFP100 -40 to +85 JTAG + Serial Wire Debug; 4- $2.06
waitstate FLASH watchdog, 79-pin GPIO external bit bit ETM Real-time Trace; CEC
8-kbyte, zero- realtime controller; 2-ch remote control
waitstate SRAM signal processor

256-kbyte zero- 10 channel 16-bit, 3 ch UART/SIO; 3 ch I2C/SIO; 42 internal, 8 12 channel 10- LQFP100 -40 to +85 JTAG + Serial Wire Debug; 4- $2.60
waitstate FLASH watchdog, 79-pin GPIO external bit bit ETM Real-time Trace; CEC
16-kbyte, zero- realtime controller; 2-ch remote control
waitstate SRAM signal processor

128-kbyte zero- 10 channel 16-bit, 2 ch UART/SIO; 2 ch I2C/SIO; 30 internal, 5 8 channel 10-bit LQFP64 -40 to +85 JTAG + Serial Wire Debug; 1- $1.81
waitstate FLASH watchdog, 45-pin GPIO external bit ETM Real-time Trace; CEC
8-kbyte, zero- realtime controller; 2-ch remote control
waitstate SRAM signal processor

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 174
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Toshiba America TMPM333FDFG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM333FWFG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM333FYFG General purpose, Cortex-M3 40 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM360F20FG General purpose, Cortex-M3 64 24/16 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE1/IDLE2/ and 64-bit MLA
SLOW/ SLEEP/ / MLS
STOP saturated/unsa
t

Toshiba America TMPM362F10FG General purpose, Cortex-M3 64 24/16 32 2.7 to 3.6 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE1/IDLE2/ and 64-bit MLA
SLOW/ SLEEP/ / MLS
STOP saturated/unsa
t

Toshiba America TMPM370FYFG Motor Control, Cortex-M3 80 32 4.5 to 5.5 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + IDLE / multi-cycle 32-
STOP and 64-bit MLA
/ MLS
saturated/unsa
t

Toshiba America TMPM380FWFG General purpose, Cortex-M3 40 32 4.5 to 5.5 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Toshiba America TMPM380FYFG General purpose, Cortex-M3 40 32 4.5 to 5.5 TBD Clock Gear (1/2, Single-cycle
Electronic Consumer, Industrial 1/4, 1/8) + PLL 32-bit multiply,
Components Bypass + multi-cycle 32-
IDLE/SLOW/ and 64-bit MLA
SLEEP/ STOP / MLS
saturated/unsa
t

Ubicom IP2022 Ubicom 120 Software I/O 16 2.5 / 2.5 or 175 mW Sleep: 500 mW, One-cycle 8x8
(Serial/Parallel 3.3, runtime clock signed/unsigne
I/O) 5 tolerant control, function d
disable

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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
512-kbyte zero- 10 channel 16-bit, 3 ch UART/SIO; 3 ch I2C/SIO; 42 internal, 8 12 channel 10- LQFP100 -40 to +85 JTAG + Serial Wire Debug; 4- $3
waitstate FLASH watchdog, 79-pin GPIO external bit bit ETM Real-time Trace
32-kbyte, zero- realtime
waitstate SRAM

128-kbyte zero- 10 channel 16-bit, 3 ch UART/SIO; 3 ch I2C/SIO; 42 internal, 8 12 channel 10- LQFP100 -40 to +85 JTAG + Serial Wire Debug; 4- $1.88
waitstate FLASH watchdog, 79-pin GPIO external bit bit ETM Real-time Trace
8-kbyte, zero- realtime
waitstate SRAM

256-kbyte zero- 10 channel 16-bit, 3 ch UART/SIO; 3 ch I2C/SIO; 42 internal, 8 12 channel 10- LQFP100 -40 to +85 JTAG + Serial Wire Debug; 4- $2.44
waitstate FLASH watchdog, 79-pin GPIO external bit bit ETM Real-time Trace
16-kbyte, zero- realtime
waitstate SRAM

2-Mbyte FLASH 16 channel 16-bit, 12 ch UART/SIO; 5 ch 17 external 16 channel 10- LQFP144 -40 to +85 120-pin GPIO; Serial Wire $6.88
128-kbyte SRAM watchdog, I2C/SIO; 1 ch SPI/Microwire; bit Debug; 4-bit ETM Real-time
realtime 120-pin GPIO Trace; CEC controller; 2-ch
remote control signal processor

1-Mbyte FLASH 16 channel 16-bit, 12 ch UART/SIO; 5 ch 17 external 12 channel 10- LQFP144 -40 to +85 120-pin GPIO; Serial Wire $5.25
64-kbyte SRAM watchdog, I2C/SIO; 1 ch SPI/Microwire; bit Debug; 4-bit ETM Real-time
realtime 120-pin GPIO Trace; CEC controller; 2-ch
remote control signal processor

256-kbyte FLASH 2 channel Motor 4 ch UART/SIO; 76-pin GPIO 62 internal, 16 Dual 22 channel LQFP100, -40 to +85 5V VCC, on-chip reg; Vector $5
10-kbyte SRAM Control, 8 external 12-bit QFP100 Engine for field-oriented
channel 16-bit, control; 2-ch encoder in; prog
watchdog, gain amp for sensor input;
realtime comparators to check STOP;
PON Reset; low-voltage detect;
OSC freq detect; JTAG + Serial
Wire Debug; 2-bit ETM Real-
time Trace

128-kbyte 8 channel 16-bit, 5 ch UART/SIO; 2 ch I2C/SIO; 42 internal, 8 18 channel 12- LQFP100 -40 to +85 5V VCC w/on-chip regulator; $3
FLASH, zero- watchdog, 1 ch SPI; 79-pin GPIO external bit JTAG + Serial Wire Debug; 2-
waitstate, 12- realtime, 2 bit ETM Real-time Trace; low-
kbyte SRAM zero- channel 3-phase voltage detect; OSC frequency
waitstate PWM monitor; CEC controller; 2-ch
remote control signal processor

256-kbyte 8 channel 16-bit, 5 ch UART/SIO; 2 ch I2C/SIO; 42 internal, 8 18 channel 12- LQFP100 -40 to +85 5V VCC w/on-chip regulator; $3.63
FLASH, zero- watchdog, 1 ch SPI; 79-pin GPIO external bit JTAG + Serial Wire Debug; 2-
waitstate, 16- realtime, 2 bit ETM Real-time Trace; low-
kbyte SRAM zero- channel 3-phase voltage detect; OSC frequency
waitstate PWM monitor; CEC controller; 2-ch
remote control signal processor

single-cycle Two 16-bit, Two Serdes units for Ethernet, 15 Eight-channel, 80 PQFP, -40 to +85 Software I/O, dual threads, $8.50 to
memory on- 8-bit pre-scale, USB, GPSI, SPI, UART, 52 10-bit 80 uBGA 0 to +55 three-cycle context switching $9.90
chip realtime, GPIO
watchdog

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 176
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Ubicom IP3023 Ubicom 250 Software I/O 32 1.2 / 2.5 to 575 mW Runtime clock One-cycle
(Serial/Parallel 3.3, control, 16x16+48-bit
I/O) 5 tolerant separate control MAC
of I/O and core
PLLs

Ubicom IP5100 Ubicom 275 Hardware and 32 1.2 / 2.5 to 1500 mW Runtime clock One-cycle
StreamEngine Software I/O 3.3, control, 16x16+48-bit
5000 (Serial/Parallel 5 tolerant separate control MAC,
I/O) of I/O and core Enhanced new
PLLs instruction set

Ubicom IP5160 Ubicom 270 Hardware and 32 1.2 / 2.5 to 1500 mW Runtime clock One-cycle
StreamEngine Software I/O 3.3, control, 16x16+48-bit
5000 (Serial/Parallel 5 tolerant separate control MAC,
I/O) of I/O and core Enhanced new
PLLs instruction set

Ubicom IP5170 Ubicom 350 Hardware and 32 1.2 / 2.5 to 2200 mW Runtime clock One-cycle
StreamEngine Software I/O 3.3, control, 16x16+48-bit
5000 (Serial/Parallel 5 tolerant separate control MAC,
I/O) of I/O and core Enhanced new
PLLs instruction set

Ubicom IP7100 Ubicom 270 Hardware and 32 1.0 / 2.5 to 1000 mW Runtime clock One-cycle
StreamEngine Software I/O 3.3, control, 16x16+48-bit,
7000 (Serial/Parallel 5 tolerant separate control 32x32 MAC,
I/O) of I/O and core Enhanced new
PLLs instruction set
including byte
instructions

Ubicom IP7160 Ubicom 350, 400 Hardware and 32 1.0 / 2.5 to 1200 mW Runtime clock One-cycle
StreamEngine Software I/O 3.3, control, 16x16+48-bit,
7000 (Serial/Parallel 5 tolerant separate control 32x32 MAC,
I/O) of I/O and core Enhanced new
PLLs instruction set
including byte
instructions

Ubicom IP7170 Ubicom 500 Hardware and 32 1.2 / 2.5 to 1700 mW Runtime clock One-cycle
StreamEngine Software I/O 3.3, control, 16x16+48-bit,
7000 (Serial/Parallel 5 tolerant separate control 32x32 MAC,
I/O) of I/O and core Enhanced new
PLLs instruction set
including byte
instructions

VeriSilicon ZSP200 Audio 150 16/16 16 Process Idle, sleep,


(130 nm) dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP210 Audio 150 32/16 16 Process Idle, sleep,
(130 nm) dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP400 Audio, Mobile/wireless 150 16/16 16 Process Idle, sleep,
(130 nm) dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP410 Audio, Mobile/wireless 165 32/16 16 Process Idle, sleep,
(130 nm) dependent power-down,
clock-gating,
block-level

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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
single-cycle Two 32-bit, Four MII, two Serdes (10bT Up to 64 Analog squelch 228 uBGA 0 to +70 Eight-way hardware $12
memory on- 32-bit watchdog, MAC/PHY, USB host/device, for 10Base-T multithreading, zero-cycle
chip can add timers GPSI, SPI, UART). Soft I/O Ethernet PHY context switching, 32-bit
capable (PCMCIA, CF, IDE, random-number generator,
MPEG-TS, PCI for 802.11a/g, software I/O supports
UART, SPI, I²C, I²S, AC97 interfaces via GPIO

16/8-kbyte, One realtime 32- MII x 2, RMII x 2, USB 2.0 Up to 64 256 BGA 0 to +70 Ten-way hardware
support for bit, (FS/HS). USB 2.0 (FS), UART multithreading, zero-cycle
external DDR one 32-bit (SerDes HW or SW), SPI context switching, 32-bit
and flash watchdog, and 10 (SerDes HW or SW), GPSI, random-number generator,
memory multi function PCI. Soft I/O capable (Utopia, software I/O supports
ISA/PCMCIA/CF, IDE,I²C, I²S, interfaces via GPIO,
AC97) deterministic processing,
dedicated security engine, and
native audio processing.
16/8-kbyte, One realtime 32- MII x 2, RMII x 2, RGMII, USB Up to 64 256 BGA 0 to +70 Ten-way hardware $12
support for bit, 2.0 (FS/HS). USB 2.0 (FS), multithreading, zero-cycle
external DDR one 32-bit UART (SerDes HW or SW), context switching, 32-bit
and flash watchdog, and 10 SPI (SerDes HW or SW), random-number generator,
memory multi function GPSI, PCI. Soft I/O capable software I/O supports
(Utopia, ISA/PCMCIA/CF, interfaces via GPIO,
IDE,I²C, I²S, AC97) deterministic processing,
dedicated security engine, and
native audio processing.
16/8-kbyte, One realtime 32- MII x 2, RMII x 2, RGMII, USB Up to 64 256 BGA 0 to +70 Ten-way hardware $14
support for bit, 2.0 (FS/HS). USB 2.0 (FS), multithreading, zero-cycle
external DDR one 32-bit UART (SerDes HW or SW), context switching, 32-bit
and flash watchdog, and 10 SPI (SerDes HW or SW), random-number generator,
memory multi function GPSI, PCI. Soft I/O capable software I/O supports
(Utopia, ISA/PCMCIA/CF, interfaces via GPIO,
IDE,I²C, I²S, AC97) deterministic processing,
dedicated security engine, and
native audio processing.
16/16-kbyte, One realtime 32- MII x 2, RMII x 2, USB 2.0 Up to 64 256 BGA 0 to +70 Twelve-way hardware $10
support for bit, (FS/HS). UART (SerDes HW multithreading, zero-cycle
external DDR one 32-bit or SW), SPI (SerDes HW or context switching, 32-bit
and flash watchdog, and 10 SW), GPSI, PCI, SD/SDIO. random-number generator,
memory multi function, 3 Soft I/O capable (Utopia, software I/O supports
PWM ISA/PCMCIA/CF, IDE,I²C, I²S, interfaces via GPIO,
AC97) deterministic processing,
dedicated security engine, and
native audio processing.

16/16-kbyte, One realtime 32- MII x 2, RMII x 2, RGMII x 2, Up to 64 256 BGA 0 to +70 Twelve-way hardware $12
support for bit, USB 2.0 (FS/HS), UART multithreading, zero-cycle
external DDR one 32-bit (SerDes HW or SW), SPI context switching, 32-bit
and flash watchdog, and 10 (SerDes HW or SW), GPSI, random-number generator,
memory multi function, 3 PCI, SD/SDIO. Soft I/O software I/O supports
PWM capable (Utopia, interfaces via GPIO,
ISA/PCMCIA/CF, IDE,I²C, I²S, deterministic processing,
AC97) dedicated security engine, and
native audio processing.

16/16-kbyte, One realtime 32- MII x 2, RMII x 2, RGMII x 2, Up to 64 256 BGA 0 to +70 Twelve-way hardware $14
support for bit, USB 2.0 (FS/HS), UART multithreading, zero-cycle
external DDR one 32-bit (SerDes HW or SW), SPI context switching, 32-bit
and flash watchdog, and 10 (SerDes HW or SW), GPSI, random-number generator,
memory multi function, 3 PCI, SD/SDIO. Soft I/O software I/O supports
PWM capable (Utopia, interfaces via GPIO,
ISA/PCMCIA/CF, IDE,I²C, I²S, deterministic processing,
AC97) dedicated security engine, and
native audio processing.

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

instruction AHB, AXI, timers, interrupt Various ADC (Core) (Core) License
controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

instruction AHB, AXI, timers, interrupt Various ADC (Core) (Core) License
controller, GPIO, on-chip and DAC types
emulation

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 178
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
VeriSilicon ZSP500 Audio, Mobile/wireless Z.Turbo 185 32/32 16, 32 Process Process Idle, sleep,
interface (130 nm) dependent dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP520 Audio, Mobile/wireless Z.Turbo 185 32/32 16, 32 Process Process Idle, sleep,
interface (130 nm) dependent dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP540 Audio, Mobile/wireless Z.Turbo 180 32/32 16, 32 Process Process Idle, sleep,
interface (130 nm) dependent dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP560 Audio, Mobile/wireless Z.Turbo 180 32/32 16, 32 Process Process Idle, sleep,
interface (130 nm) dependent dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP600 Mobile/wireless Z.Turbo 160 32/32 16, 32 Process Process Idle, sleep,
interface (130 nm) dependent dependent power-down,
clock-gating,
block-level
VeriSilicon ZSP800 Audio, Mobile/wireless Z.Turbo 450 32/32 16, 32 Process Process Idle, sleep,
interface (90 nm) dependent dependent power-down,
clock-gating,
block-level
VeriSilicon ZSPneo Audio 150 16/16 16 Process Idle, sleep,
(130 nm) dependent power-down,
clock-gating,
block-level
VIA Technologies C7 Computers and x86 1000 to 32 64 1.004 to 20 W TDP Autohalt,
peripherals 2000 1.196 stopgrant, sleep,
deepsleep,
deeper sleep

VIA Technologies C7-D Computers and x86 1600 to 32 64 1.084 to 20 W TDP Autohalt,
peripherals 2000 1.26 stopgrant, sleep,
deepsleep

VIA Technologies C7-M ULV Consumer, x86 1000 to 32 64 0.796 to 8 W TDP Autohalt,
Mobile/wireless 1600 Flex VID stopgrant, sleep,
deepsleep,
deeper sleep

VIA Technologies Eden Industrial x86 400 to 1200 32 64 0.796 to 7 W TDP Autohalt,
0.86 stopgrant
VIA Technologies Eden ULV Automotive, Medical x86 500 to 1600 32 64 0.684 to 8 W TDP Autohalt,
Flex VID stopgrant, sleep,
deepsleep,
deeper sleep

VIA Technologies VIA Nano Digital power, Imaging x86 800 to 1800 32 64 Flex VID 25 W TDP Autohalt,
and video stopgrant, sleep,
deepsleep

Virage Logic ARC 601 Audio, Imaging and ARCompact 200 to 400 32 16, 32 1 to 5 0.06 mW/MHz Sleep mode,
video, Mobile/wireless, worst case (0.13) clock gating,
Security (130nm) RAM controls

Virage Logic ARC 605D Automotive, Consumer, ARC XY DSP ARCompact Up to 500 32/64 16, 32 1 to 5 0.03 mW/MHz Software sleep
Computers and subsystem (90nm) (core) mode; power
peripherals, management
Communication/wired, unit;
Industrial function/Architec
tural-level clock
gating, Power
domains and
power shut-off,
Dynamic voltage
and frequency
scaling

Page 179 © Copyright 2010 Embedded Insights Inc. All rights reserved.
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All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
AHB, AXI, timers, interrupt Various ADC (Core) (Core) License
controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

AHB, AXI, timers, interrupt Various ADC (Core) (Core) License


controller, GPIO, on-chip and DAC types
emulation

Yes 128-kbyte, L2: 6-bit NanoBGA2 0 to +100 MMX,SSE, SSE2, SSE3, $50 to $100
128-kbyte 400L (Case) PadLock

Yes 128-kbyte, L2: 6-bit NanoBGA2 0 to +100 MMX,SSE, SSE2, SSE3, $45 to $75
128-kbyte (Case) PadLock

Yes 128-kbyte, L2: 6-bit NanoBGA2 0 to +100 MMX,SSE, SSE2, SSE3, $70 to $120
128-kbyte (Case) PadLock

Yes 64-kbyte, L2: 6-bit NanoBGA2 0 to +100 MMX,SSE, SSE2, SSE3,


64-kbyte (Case) PadLock
Yes 128-kbyte, L2: 6-bit NanoBGA2 0 to +100 MMX,SSE, SSE2, SSE3, $35 to $150
128-kbyte (Case) PadLock

Yes 128-kbyte, L2: 7-bit NanoBGA2 0 to +90 MMX,SSE, SSE2, SSE3,


1024-kbyte (Case) PadLock

Licensee option Licensee option Up to 32 Licensee option IP core (Core) BVCI, AMBA bridge, JTAG to License
Ethernet debug, Optional
Trace

Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (core) (Core) BVCI, AMBA bridge, JTAG to License
closely coupled Ethernet debug, Optional
memory Trace, Configurable and
extendible core

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 180
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Virage Logic ARC 610D Automotive, Consumer, ARC XY DSP ARCompact Up to 500 32/64 16, 32 1 to 5 0.03 mW/MHz Software sleep 16/32
Computers and subsystem (90nm) (core) mode; power MUL/MAC
peripherals, management DSP
Communication/wired, unit; extensions
Mobile/wireless, function/Architec Optional ARC
Industrial tural-level clock XY subsystem
gating, Power
domains and
power shut-off,
Dynamic voltage
and frequency
scaling

Virage Logic ARC 625D (core) Automotive, Consumer, ARC XY DSP ARCompact Up to 500 32/64 16, 32 1 to 5 0.05 mW/MHz Software sleep 16/32
Computers and subsystem (90nm) (core) mode; power MUL/MAC
peripherals, management DSP
Communication/wired, unit; extensions
Mobile/wireless, function/Architec Optional ARC
Industrial tural-level clock XY subsystem
gating, Power
domains and
power shut-off,
Dynamic voltage
and frequency
scaling

Virage Logic ARC 710D Communications/wired, ARC XY DSP ARCompact Up to 700 32/64 16, 32 1 to 5 0.04 mW/MHz Software sleep 16/32
Security, Computers and subsystem (90nm) (core) mode MUL/MAC
peripherals, Industrial DSP
extensions
Optional ARC
XY subsystem

Virage Logic ARC 725D Audio, Mobile/wireless, ARC XY DSP ARCompact Up to 700 32/64 16, 32 1 to 5 0.11 mW/MHz Software sleep 16/32
Communications/wired, subsystem (90nm) (core) mode MUL/MAC
Automotive, Computers DSP
and peripherals extensions
Optional ARC
XY subsystem

Virage Logic ARC 750D Consumer, ARC XY DSP ARCompact Up to 700 32/64 16, 32 Process 0.106 Software sleep 16/32
Mobile/wireless, subsystem (90nm) dependent mW/MHz mode MUL/MAC
Communication/wired (core) in 90nm DSP
G extensions
Optional ARC
XY subsystem

Virage Logic ARC Sound Automotive, Consumer, Complete and ARCompact Up to 500 32/64 16, 32 Process 0.0\61 Domain clock Full
Subsystems AS Mobile/wireless Integrated (90nm) dependent mW/MHz gating, Voltage performance
211SFX Solution: (core) domains, DSP engine
AS 211SFX Dynamic voltage Register-
DSP, and frequency speed memory
Audio Codecs, scaling, power and address
Sonic Focus. management generators for
Media unit DSP operand
Software data
Framework Same as a
instructions) dedicated DSP
single unified
CPU+DSP
architecture

Virage Logic ARC Video Imaging and video Entropy ARCompact Up to 500 32/64 16, 32 Process 0.65 mW/MHz Software sleep 16/32
Subsystems AV Decode (90nm) dependent (core) mode, clock- MUL/MAC
401V Engine, DMA gating DSP
engine, and extensions
SIMD Video Optional ARC
Engine XY subsystem

Page 181 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (Core) (Core) BVCI, AMBA bridge, JTAG to License
FPX instruction/dat closely coupled Ethernet debug, Optional
extensions, a (1-, 2-, 4- memory Trace, Configurable and
single way with 4, 8, extendible core
and/or 16, 32 words
double per line)
precision

Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (core) (Core) Configurable and extendible License
FPX instruction/dat closely coupled core
extensions, a (1-, 2-, 4- memory, caches
single way with 4, 8,
and/or 16, 32 words
double per line)
precision

Optional 8- to 64-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (Core) (Core) BVCI, AMBA bridge, JTAG to License
FPX instruction (2- closely coupled Ethernet debug, Optional
extensions, way)/data (4- memory Trace, Configurable and
single way) extendible core
and/or
double
precision
Optional 8- to 64-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (Core) (Core) BVCI, AMBA bridge, JTAG to License
FPX instruction (2- closely coupled Ethernet debug, Optional
extensions, way)/data (4- memory, caches Trace, Configurable and
single way) extendible core
and/or
double
precision
Optional 8- to 64-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (Core) (Core) BVCI, AMBA bridge, JTAG to License
FPX instruction (2- closely coupled Ethernet debug, Optional
extensions, way)/data (4- memory, caches, Trace, Configurable and
single way) MMU extendible core
and/or
double
precision
Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option (subsystem) (Core) Sonic Focus Ready. License
FPX instruction/dat closely coupled Configurable, extendible core
extensions, a (1-, 2-, 4- memory runs H.264 and most codecs at
single way with 4, 8, 166 MHz or less in 0.13
and/or 16, 32 words process supports H.264, VC-1,
double per line) MPEG-4, MPEG-2, JPEG,
precision MJPEG, GIF, TIFF, PNG

Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option IP Subsystem (Core) Sonic Focus Ready. License
FPX instruction/dat closely coupled Configurable, extendible core
extensions, a (1-, 2-, 4- memory runs H.264 and most codecs at
single way with 4, 8, 166 MHz or less in 0.13
and/or 16, 32 words process supports H.264, VC-1,
double per line) MPEG-4, MPEG-2, JPEG,
precision MJPEG, GIF, TIFF, PNG

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 182
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Virage Logic ARC Video Mobile/wireless, Imaging Entropy ARCompact Up to 500 32/64 16, 32 Process 0.65 mW/MHz Software sleep 16/32
Subsystems AV and video Decode (90nm) dependent (core) mode, clock- MUL/MAC
404V Engine, DMA gating DSP
engine, and extensions
SIMD Video Optional ARC
Engine XY subsystem

Virage Logic ARC Video Security, Automotive, Entropy ARCompact Up to 500 32/64 16, 32 Process 0.65 mW/MHz Software sleep 16/32
Subsystems AV Imaging and video Decode (90nm) dependent (core) mode, clock- MUL/MAC
407V Engine, DMA gating DSP
engine, and extensions
SIMD Video Optional ARC
Engine XY subsystem

Virage Logic ARC Video Mobile/wireless Entropy ARCompact Up to 500 32/64 16, 32 Process 0.65 mW/MHz Software sleep 16/32
Subsystems AV Decode (90nm) dependent (core) mode, clock- MUL/MAC
417V Engine, DMA gating DSP
engine, and extensions
SIMD Video Optional ARC
Engine XY subsystem

Virage Logic Energy Pro ARCompact 500 32 16, 32 1 to 5 0.03 mW/MHz Domain clock 16/32
gating, Voltage MUL/MAC
domains, instructions
Dynamic voltage Parallel
and frequency execution of
scaling, power MUL, MAC and
management ALU
unit Saturation,
Zero overhead
loop

Xilinx MicroBlaze Industrial, Security, Support for MicroBlaze Up to 250 32/32 Harvard 32 1.2 to 3.3 Hard Multiplier
Medical, Automotive Custom (FPGA block in the
Accelerators usage) CPU and 100+
using FPGA XtremeDSP
fabric multiplier
blocks

Xilinx PowerPC 405 Aerospace Defense, Support for PowerPC Up to 450 32/64 32 1.5 (Virtex 0.45 mW/MHz Yes Hard Multiplier
(Virtex-II Pro, Virtex- Mobile/wireless Custom to II Pro) or Virtex-4 FX block in the
4 FX) Accelerators 1.2 (Virtex CPU and 100+
using FPGA to 4 FX) XtremeDSP
fabric multiplier
blocks

Xilinx PowerPC 440 Aerospace Defense, Support for PowerPC Up to 550 32/64 32 1.2 to 3.3 each DSP48E Yes Hard Multiplier
(Virtex-5) Mobile/wireless Custom slice: 1.38 block in the
Accelerators mW/100 MHz, CPU and 100+
using FPGA at 38% toggle XtremeDSP
fabric rate multiplier
blocks

Xilinx Spartan-3/3E Consumer, Automotive Up to 104 MicroBlaze 185 Configurable Configurable 1.1 to 3.3 / Suspend, DSP48 slice
18x18-bit 1.14 to 3.45 Hibernate
multipliers modes

Xilinx Spartan-3A DSP Imaging and video, Up to 128 MicroBlaze Up to 500 Configurable Configurable 1.2 / 1.5 to 2.3 mW/MHz Suspend, DSP48 slice
Security, Consumer, DSP48 Slices 3.3 per DSP48 Hibernate
Automotive slice modes

Xilinx Spartan-6 Imaging and video, Up to 182 MicroBlaze 250 Configurable Configurable 1.2 / 1.5 to 2.3 mW/MHz Suspend, DSP48 slice
Security, Consumer, DSP48 Slices 3.3 per DSP48 Hibernate
Automotive slice modes

Page 183 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option IP Subsystem (Core) Sonic Focus Ready. License
FPX instruction/dat closely coupled Configurable, extendible core
extensions, a (1-, 2-, 4- memory runs H.264 and most codecs at
single way with 4, 8, 166 MHz or less in 0.13
and/or 16, 32 words process supports H.264, VC-1,
double per line) MPEG-4, MPEG-2, JPEG,
precision MJPEG, GIF, TIFF, PNG

Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option IP Subsystem (Core) Sonic Focus Ready. License
FPX instruction/dat closely coupled Configurable, extendible core
extensions, a (1-, 2-, 4- memory runs H.264 and most codecs at
single way with 4, 8, 166 MHz or less in 0.13
and/or 16, 32 words process supports H.264, VC-1,
double per line) MPEG-4, MPEG-2, JPEG,
precision MJPEG, GIF, TIFF, PNG

Optional 2- to 32-kbyte Single-cycle Licensee option BVCI, AMBA-AHB/AXI Up to 32 Licensee option IP Subsystem (Core) Sonic Focus Ready. License
FPX instruction/dat closely coupled Configurable, extendible core
extensions, a (1-, 2-, 4- memory runs H.264 and most codecs at
single way with 4, 8, 166 MHz or less in 0.13
and/or 16, 32 words process supports H.264, VC-1,
double per line) MPEG-4, MPEG-2, JPEG,
precision MJPEG, GIF, TIFF, PNG

Optional Cacheless Licensee option Licensee option Up to 32 Licensee option IP core (Core) ARC Instruction Set License
FPX and closely extensions; API level - Power-
extensions, coupled aware MQX-EP RTOS
single (single-cycle)
and/or memories
double
precision

Tightly Configurable 0- Soft MMU or MPU PIT, FIT, User definable - CoreConnect- 0 to 32 Any Xilinx (For FPGA, 0 User-configurable CPU, Included in
integrated to 64-kbyte, option watchdog, PWM enabled I²C, GPIO, SPI, PCI, configurable FPGA to +85, -40 to dedicated interface Fast the Xilinx
single direct mapped, 16450/550 UART, 10/100 with +100) Simplex Link (FSL) for Embedded
option in write-through EMAC, UART lite, CAN, programmable hardware acceleration, optional Developme
MicroBlaze or write-back MOST, Flexray level or edge debug features for HW/SW nt Kit
soft cache sensitivity debugging, catalog of IP (royalty
processor available free)

Optional 16-kbyte MMU in PowerPC PIT, FIT, User definable - CoreConnect- 0 to 32 Virtex-II Pro, 0 to +85 Virtex-4 FX contains: Dual Included in
soft watchdog, PWM enabled I²C, GPIO, SPI, PCI, configurable Virtex-4 FX -40 to +100 PowerPC 405 cores with Virtex-4
single/doubl 16450/550 UART, UART lite, with Auxiliary Processor Unit (APU) FPGAs
e FPU in Dual "hard 10/100/1000 programmable controllers for custom
FPGA EMACs (Virtex-4 FX), PCI level or edge instructions and accelerators,
Fabric sensitivity dual "hard" Tri-mode
10/100/1000 Ethernet, debug
support, catalog of IP
available.
Optional 16-kbyte MMU in PowerPC PIT, FIT, User definable - CoreConnect- 0 to 32 Virtex-5 FXT; 0 to +85 Virtex-4 FX contains: Dual Included in
soft watchdog, PWM enabled I²C, GPIO, SPI, PCI, configurable Virtex-5LX; -40 to +100 PowerPC 440 cores with Virtex-5
single/doubl 16450/550 UART, 10/100 with Virtex-5 LXT; Auxiliary Processor Unit (APU) FXT FPGAs
e FPU in EMAC, UART lite, CAN, programmable Virtex-5 SXT; controllers for custom
FPGA MOST, Flexray level or edge Virtex-5 TXT instructions and accelerators,
Fabric sensitivity dual "hard" Tri-mode
10/100/1000 Ethernet, debug
support, catalog of IP
available.
Soft FPU On-Chip Block DDR SDRAM, FPGA logic UART, timers, LVTTL, FPGA logic External VQFP, TQFP, Commercial, Soft 32-bit Microblaze
RAM DDR2 SDRAM, LVCMOS, PCI, GTL, HSTL, PQFP, industrial, processor or 8-bit PicoBlaze
EMIF SSTL, LVDS, RSDS, LDT, FTBGA, FBGA automotive processor
VLYNQ
Soft FPU On-Chip Block DDR SDRAM, FPGA logic UART, timers, LVTTL, FPGA logic External SF, FF Commercial, Up to two embedded
RAM DDR2 SDRAM, LVCMOS, PCI, PCI-X, GTL, industrial, PowerPC405 and soft 32-bit
QDRII SRAM, GTLP, HSTL, SSTL, LVDS, military, space Microblaze processors
RLDRAMII, Extended LVDS, BLVDS,
FCRAMII, EMIF ULVDS, Hypertransport,
Differential HSTLSerial
RapidIO, PCI Express, VLYNQ

Soft FPU On-Chip Block DDR SDRAM, FPGA logic UART, timers, LVTTL, FPGA logic External SF, FF Commercial, Soft 32-bit Microblaze
RAM DDR3 SDRAM, LVCMOS, PCI, PCI-X, GTL, industrial, processors, up to 4 hard
QDRII SRAM, GTLP, HSTL, SSTL, LVDS, military, space memory controllers, up to 8
RLDRAMII, Extended LVDS, BLVDS, tranceivers
FCRAMII, EMIF ULVDS, Hypertransport,
Differential HSTLSerial
RapidIO, PCI Express, VLYNQ

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 184
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Xilinx Virtex-5 SXT Mobile/wireless, Imaging Up to 1056 MicroBlaze Up to 550 Configurable Configurable 1.2 / 1.5 to 1.38 mW/MHz Low power DSP48 slice
and video, DSP48 slices 3.3 per DSP48 option
Military/aerospace slice

Xilinx Virtex-6 Mobile/wireless, Imaging Up to 2016 MicroBlaze Up to 550 Configurable Configurable 1.2 / 1.5 to 1.38 mW/MHz Low power DSP48 slice
and video, DSP48 slices 3.3 per DSP48 option
Military/aerospace slice

XMOS XS1-G4 Audio, Motor control, XS1 400 32 16 1 1500 mW 500mW 32x32-64 MAC
General purpose
XMOS XS1-L1 Audio, Motor control, XS1 500 32 16 1 200 mW 15mW 32x32-64 MAC
General purpose
XMOS XS1-L2 Audio, Motor control, XS1 500 32 16 1 400 mW 30mW 32x32-64 MAC
General purpose
Zilog eZ80F91 Z80/Z180 50 24/8 8, 16, 24 3.0 to 3.6 230 mA Sleep, halt

Zilog eZ80F92 eZ80 20 24/8 8, 16, 24 3.0 to 3.6 30 mA Sleep, halt

Zilog eZ80F93 eZ80 20 24/8 8, 16, 24 3.0 to 3.6 30 mA Sleep, halt

Zilog FMC04100 eZ8 20 16/8 8 to 40 2.7 to 3.6 20 mA Stop <1 µA

Zilog FMC08100 eZ8 20 16/8 8 to 40 2.7 to 3.6 20 mA Stop <1 µA

Zilog FMC16100 eZ8 20 16/8 8 to 40 2.7 to 3.6 20 mA Stop <1 µA

Zilog Z8 Encore! 8F0113 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0123 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0213 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0223 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0411 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0412 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0413 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0421 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0422 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F0423 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F0811 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0812 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0813 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Page 185 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
Soft FPU On-Chip Block DDR SDRAM, FPGA logic UART, timers, LVTTL, FPGA logic External SF, FF Commercial, Built in Low Power
RAM DDR2 SDRAM, LVCMOS, PCI, PCI-X, GTL, industrial, Transceivers operating at up to
QDRII SRAM, GTLP, HSTL, SSTL, LVDS, military, space 3.2 Gbps, Built-in, fully
RLDRAMII, Extended LVDS, BLVDS, compliant PCIe endpoint and
FCRAMII, EMIF ULVDS, Hypertransport, Ethernet MAC blocks, Soft 32-
Differential HSTLSerial bit Microblaze processor
RapidIO, PCI Express, VLYNQ

Soft FPU On-Chip Block DDR SDRAM, FPGA logic UART, timers, LVTTL, FPGA logic External SF, FF Commercial, Up to 36 6.5 Gpbs Serial
RAM DDR3 SDRAM, LVCMOS, PCI, PCI-X, GTL, industrial, Tranceivers, Built-in, fully
QDRII SRAM, GTLP, HSTL, SSTL, LVDS, military, space compliant PCIe endpoint and
RLDRAMII, Extended LVDS, BLVDS, Ethernet MAC blocks, Soft 32-
FCRAMII, EMIF ULVDS, Hypertransport, bit Microblaze processor
Differential HSTLSerial
RapidIO, PCI Express, VLYNQ

256-kbyte 40 256 328 144BGA, 512 -40 to +85 Link interconnect $13.10
BGA
64-kbyte 10 64 82 64LQFP, -40 to +85 Link interconnect $4.70
128TQFP
128-kbyte 20 88 164 124QFN -40 to +85 Link interconnect $9.40

8-bit, 8-bit BRG, Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators, $1.92 to
16-bit watchdog SOIC, SSOP WDT, UART, IR Learning Amp $2.89

8-bit, 8-bit BRG, Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators, $1.92 to
16-bit watchdog SOIC, SSOP UART, IR Learning Amp $2.89

8-bit, 8-bit BRG, Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators, $1.92 to
16-bit watchdog SOIC, SSOP WDT, UART, IR Learning Amp $2.89

8-bit, 8-bit BRG, Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators, $1.92 to
16-bit watchdog SOIC, SSOP WDT, UART, IR Learning Amp $2.89

8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 16-bit Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators $0.75 to
watchdog SOIC, SSOP $1.27
8-bit, 16-bit Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators $0.75 to
watchdog SOIC, SSOP $1.27
8-bit, 16-bit Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators $0.75 to
watchdog SOIC, SSOP $1.27
8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
2, 16-bit Up to 24 GPIO Up to 24 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $0.99 to
8/20/28 SOIC, -40 to +105 Internal Oscillator $1.66
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 24 GPIO Up to 24 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.18 to


8/20/28 SOIC, -40 to +105 Internal Oscillator $1.96
20/28 SSOP,
8/20/28 PDIP

8-bit, 16-bit Up to 32 GPIO 6, 20 sources 20/28/40/48 0 to +70 HVD, LVD, 2 Comparators $1.42 to
watchdog DIP, SOIC, $2.13
SSOP
8-bit, 8-bit BRG, Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators, $1.45 to
16-bit watchdog SOIC, SSOP UART, IR Learning Amp $1.76

8-bit, 8-bit BRG, Up to 24 GPIO 6, 20 sources 20/28 DIP, 0 to +70 HVD, LVD, 2 Comparators, $1.45 to
16-bit watchdog SOIC, SSOP UART, IR Learning Amp $1.76

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 186
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Zilog Z8 Encore! 8F0821 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F0822 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F0823 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F1621 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt

Zilog Z8 Encore! 8F2421 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F3222 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F4821 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F4822 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F4823 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F6421 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F6422 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! 8F6423 eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8

Zilog Z8 Encore! MC eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8
8F1622
Zilog Z8 Encore! MC eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8
8F2422
Zilog Z8 Encore! MC eZ8 20 16/8 8 to 40 3.0 to 3.6 12 mA Stop; 6 µA; halt 8x8
8F3221
Zilog Z8F011A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F012A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0130 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0131 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F021A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F022A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0230 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0231 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F041A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F042A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0430 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0431 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Page 187 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
2, 16-bit Up to 22 GPIO Up to 24 Up to 8 channel 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.04 to
10-bit 8/20/28 SOIC, -40 to +105 Internal Oscillator $1.73
20/28 SSOP,
8/20/28 PDIP

4, 16-bit, 4 PWM Up to 32 GPIO Up to 48 144 LQFP, 144- 0 to +70 10/100 Ethernet MAC, 2 $8.33 to
ball BGA -40 to +105 UARTs, SPI, I2C peripheral $9.61
interfaces
6, 16-bit Up to 24 GPIO Up to 38 100 LQFP 0 to +70 2 UARTs, SPI, I2C, GPID, $5.28 to
-40 to +105 RTC, WDT, PQR/VBO $5.81
6, 16-bit Up to 24 GPIO Up to 38 100 LQFP 0 to +70 2 UARTs, SPI, I2C, GPID, $4.91 to
-40 to +105 RTC, WDT, PQR/VBO $5.40
2, 16-bit Up to 24 GPIO Up to 24 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.04 to
8/20/28 SOIC, -40 to +105 Internal Oscillator $1.75
20/28 SSOP,
8/20/28 PDIP

1, 16-bit , 6 PWM Up to 17 GPIO Up to 18 Up to 8 channel 32 QFN/QFP 0 to +70 6-channel 12-bit Motor Control $2.32 to
10-bit; 10-bit -40 to +105 PWMs, Op Amp, Fault $2.55
SAR Shutdown
1, 16-bit , 6 PWM Up to 17 GPIO Up to 18 Up to 8 channel 32 QFN/QFP 0 to +70 6-channel 12-bit Motor Control $2.21 to
10-bit; 10-bit -40 to +105 PWMs, Op Amp, Fault $2.42
SAR Shutdown
2, 16-bit Up to 22 GPIO Up to 24 Up to 8 channel 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.09 to
10-bit 8/20/28 SOIC, -40 to +105 Internal Oscillator $1.82
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 11 GPIO Up to 24 20 SSOP, 20 0 to +70 WDT, POR/VBO, UART, I2C $1.25 to


PDIP -40 to +105 $1.38
2, 16-bit Up to 19 GPIO Up to 24 28 SOIC, 28 0 to +70 WDT, POR/VBO, UART, I2C $1.29 to
PDIP -40 to +105 $1.57
2, 16-bit Up to 24 GPIO Up to 24 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.10 to
8/20/28 SOIC, -40 to +105 Internal Oscillator $1.84
20/28 SSOP,
8/20/28 PDIP

1, 16-bit , 6 PWM Up to 17 GPIO Up to 18 Up to 8 channel 32 QFN/QFP 0 to +70 6-channel 12-bit Motor Control $2.10 to
10-bit; 10-bit -40 to +105 PWMs, Op Amp, Fault $2.30
SAR Shutdown
2, 16-bit Up to 11 GPIO Up to 24 2 channel 10-bit 20 SSOP, 20 0 to +70 WDT, POR/VBO, UART, I2C $1.31 to
PDIP -40 to +105 $1.44
2, 16-bit Up to 11 GPIO Up to 24 20 SSOP, 20 0 to +70 WDT, POR/VBO, UART, I2C $1.35 to
PDIP -40 to +105 $1.48
2, 16-bit Up to 19 GPIO Up to 24 28 SOIC, 28 0 to +70 WDT, POR/VBO, UART, I2C $1.39 to
PDIP -40 to +105 $1.67
2, 16-bit Up to 19 GPIO Up to 24 5 channel 10-bit 28 SOIC, 28 0 to +70 WDT, POR/VBO, UART, SPI, $1.45 to
PDIP -40 to +105 I2c $1.74
2, 16-bit Up to 22 GPIO Up to 24 Up to 8 channel 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.24 to
10-bit 8/20/28 SOIC, -40 to +105 Internal Oscillator $2.05
20/28 SSOP,
8/20/28 PDIP

3 Up to 31 GPIO Up to 24 8 channel 10-bit 40 PDIP, 44 0 to +70 WDT, 2 UARTs, SPI, I2C, $2.29 to
PLCC, 44 -40 to +105 POR/VBO $2.81
LQFP
4 Up to 46 GPIO Up to 24 12 channel 10- 64 LQFP, 68 0 to +70 WDT, 2 UARTs, SPI, I2C, $3.45 to
bit PLCC -40 to +105 POR/VBO $3.85
3 Up to 31 GPIO Up to 24 8 channel 10-bit 40 PDIP, 44 0 to +70 WDT, 2 UARTs, SPI, I2C, $3.52 to
PLCC, 44 -40 to +105 POR/VBO $4.17
LQFP
4 Up to 60 GPIO Up to 24 12 channel 10- 80 QFP 0 to +70 WDT, 2 UARTs, SPI, I2C, $4.22 to
bit -40 to +105 POR/VBO $4.69
2, 16-bit Up to 19 GPIO Up to 24 5 channel 10-bit 28 SOIC, 28 0 to +70 WDT, POR/VBO, UART, I2C $1.35 to
PDIP -40 to +105 $1.63
2, 16-bit Up to 11 GPIO Up to 24 2 channel 10-bit 20 SSOP, 20 0 to +70 WDT, POR/VBO, UART, I2C $1.42 to
PDIP -40 to +105 $1.55
3 Up to 31 GPIO Up to 24 8 channel 10-bit 40 PDIP, 44 0 to +70 WDT, 2 UARTs, SPI, I2C, $2.68 to
PLCC, 44 -40 to +105 POR/VBO $3.05
LQFP
4 Up to 46 GPIO Up to 24 12 channel 10- 64 LQFP, 68 0 to +70 WDT, 2 UARTs, SPI, I2C, $3.81 to
bit PLCC -40 to +105 POR/VBO $4.24
4 Up to 60 GPIO Up to 24 12 channel 10- 80 QFP 0 to +70 WDT, 2 UARTs, SPI, I2C, $3.83 to
bit -40 to +105 POR/VBO $4.25
3 Up to 31 GPIO Up to 24 8 channel 10-bit 40 PDIP, 44 0 to +70 WDT, 2 UARTs, SPI, I2C, $3.91 to
PLCC, 44 -40 to +105 POR/VBO $4.61
LQFP

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 188
Click on any processor name to request additional information.
All processors sorted by company
Core / I/O Low power DSP /
CPU Bus interface operating Typical power modes and multiplication
Device name or On-chip frequency (address/ Instruction voltages at maximum minimum hardware
Company name family Target Applications Accelerators Instruction set (MHz) data) (bits) width (bits) (V) frequency power (bits)
Zilog Z8F043A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F081A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F082A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0830 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0831 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F083A eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F0880 eZ8 20 16/8 8 to 40 1.8 to 3.6 8x8

Zilog Z8F1232 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F1233 eZ8 20 16/8 8 to 40 2.7 to 3.6 12 mA Stop; <2 µA 8x8

Zilog Z8F1680 eZ8 20 16/8 8 to 40 1.8 to 3.6 8x8

Zilog Z8F2480 eZ8 20 16/8 8 to 40 1.8 to 3.6 8x8

Zilog ZNEO Z16F2810 ZENO 20 8, 16, 32 2.7 to 3.6 8x8

Zilog ZNEO Z16F2811 ZENO 20 8, 16, 32 2.7 to 3.6 8x8

Zilog ZNEO Z16F3211 ZENO 20 8, 16, 32 2.7 to 3.6 8x8

Zilog ZNEO Z16F6411 ZENO 20 8, 16, 32 2.7 to 3.6 8x8

Page 189 © Copyright 2010 Embedded Insights Inc. All rights reserved.
Click on any processor name to request additional information.
All processors sorted by company
On-chip Temperature
Caching memory, ranges Price
(instruction / controllers, Serial, Parallel I/O, Package (degrees ($USD/10,0
FPU data) MMU, DMA Timers / PWM off-chip interfaces Interrupts ADC; DAC selection Celsius) Additional features 00)
4 Up to 46 GPIO Up to 24 12 channel 10- 64 LQFP, 68 0 to +70 WDT, 2 UARTs, SPI, I2C, $4.21 to
bit PLCC -40 to +105 POR/VBO $4.68
4 Up to 46 GPIO Up to 24 12 channel 10- 64 LQFP, 68 0 to +70 WDT, 2 UARTs, SPI, I2C, $2.59 to
bit PLCC -40 to +105 POR/VBO $2.88
4 Up to 46 GPIO Up to 24 12 channel 10- 64 LQFP, 68 0 to +70 WDT, 2 UARTs, SPI, I2C, $2.97 to
bit PLCC -40 to +105 POR/VBO $3.32
3 Up to 31 GPIO Up to 24 8 channel 10-bit 40 PDIP, 44 0 to +70 WDT, 2 UARTs, SPI, I2C, $3.16 to
PLCC, 44 -40 to +105 POR/VBO $3.78
LQFP
2, 16-bit Up to 22 GPIO Up to 24 Up to 8 channel 8 QFN, 0 to +70 WDT, POR/VBO, UART, 5.5 $1.15 to
10-bit 8/20/28 SOIC, -40 to +105 Internal Oscillator $1.92
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 25 GPIO Up to 18 8 QFN, 0 to +70 $1.07 to


8/20/28 SOIC, -40 to +105 $1.77
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 23 GPIO Up to 18 Up to 8 channel 8 QFN, 0 to +70 Temp Sensor, Op Amp, LVD $1.12 to
10-bit 8/20/28 SOIC, -40 to +105 (8pin only) $1.85
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 23 GPIO Up to 18 Up to 8 channel 20/28 SOIC, 0 to +70 23,17 SPIO, WDT, POR/VBO, $0.54 to
10-bit SSOP, QFN, -40 to +105 5.5 Internal Oscillator, SAR $0.85
PDIP ADC
2, 16-bit Up to 25 GPIO Up to 18 20/28 SOIC, 0 to +70 25, 17 SPIO, WDT, POR/VBO, $0.570 to
SSOP, QFN, -40 to +105 5.5 Internal Oscillator, SAR $1.10
PDIP ADC
2, 16-bit Up to 25 GPIO Up to 18 8 QFN, 0 to +70 $1.13 to
8/20/28 SOIC, -40 to +105 $1.86
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 23 GPIO Up to 18 Up to 8 channel 8 QFN, 0 to +70 Temp Sensor, Op Amp, LVD $1.18 to
10-bit 8/20/28 SOIC, -40 to +105 (8pin only) $1.94
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 23 GPIO Up to 18 Up to 8 channel 20/28 SOIC, 0 to +70 23,17 SPIO, WDT, POR/VBO, $0.58 to
10-bit SSOP, QFN, -40 to +105 5.5 Internal Oscillator, SAR $0.85
PDIP ADC
2, 16-bit Up to 25 GPIO Up to 18 20/28 SOIC, 0 to +70 25, 17 SPIO, WDT, POR/VBO, $0.61 to
SSOP, QFN, -40 to +105 5.5 Internal Oscillator, SAR $0.92
PDIP ADC
2, 16-bit Up to 25 GPIO Up to 18 8 QFN, 0 to +70 $1.18 to
8/20/28 SOIC, -40 to +105 $1.96
20/28 SSOP,
8/20/28 PDIP

2, 16-bit Up to 23 GPIO Up to 18 Up to 8 channel 8 QFN, 0 to +70 Temp Sensor, Op Amp, LVD $1.24 to
10-bit 8/20/28 SOIC, -40 to +105 (8pin only) $2.05
20/28 SSOP,
8/20/28 PDIP

© Copyright 2010 Embedded Insights Inc. All rights reserved. Page 190

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