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HỒ CHÍ MINH
TRƯỜNG ĐẠI HỌC BÁCH KHOA
KHOA ĐIỆN-ĐIỆN TỬ
BỘ MÔN KỸ THUẬT ĐIỆN TỬ
1
1. ADC
• ADC stands for Analog to Digital Conversion
Vin0 Vref
0
0
Vin1 1
Vin
0
Clock 1
– Missing codes or the 1100
imperfections where 1011
increasing voltage does not 1010
result in the next step being 1001
Output Code
Output Code
output are described as non‐ 1000
monotonicity. 0111
1 LSB
– Errors in A/D conversion may 0110
be significant particularly if 0101
the full range of the analog 0100
Missing Code
signal is significantly less than 0011
the range of the analog input 0010
of the A/D. 0001
0000
-10 V Input Voltage 10 V
•A comparator is used at each 11/16 V +
2R
level to determine whether the -
voltage is lower or higher than 9/16 V +
2R
the level. -
•The series of comparator 7/16 V +
2R Encoder 3
outputs are encoded to a -
binary number in digital logic 5/16 V +
2R
(an encoder) -
3/16 V +
2R
-
1/16 V +
R
-
Vin
Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 7
ADC Transfer Function
•The ideal output from an A/D
converter is a stair‐step function
(see right)
– Ideal worst case error in
conversion is 1/2 bit.
– Missing codes or the
imperfections where
increasing voltage does not
result in the next step being
output are described as non‐
monotonicity.
– Errors in A/D conversion may
be significant particularly if
the full range of the analog
signal is significantly less than
the range of the analog input
of the A/D.
time
• A waveform is sampled at a constant rate – every t
– Each such sample represents the instantaneous amplitude at the instant of sampling
– “At 37 ms, the input is 1.91341914513451451234311… V”
– Sampling converts a continuous time signal to a discrete time signal
• The sample can now be quantized (converted) into a digital value
– Quantization represents a continuous (analog) value with the closest discrete (digital)
value
– “The sampled input voltage of 1.91341914513451451234311… V is best represented by
the code 0x018, since it is in the range of 1.901 to 1.9980 V which corresponds to code
0x018.”
If the hold capacitor is fully discharged, the minimum input impedance is RADC.
As the hold capacitor starts to charge, the current flowing into the pin will reduce.
If the hold capacitor is charged to a level equal to the external voltage there will
be only minimal charging current flowing into the analog input
Question:
A circuit use 10 bits ADC with VREF+=5V, VREF-=0V to measure input voltage
and display the value to LCD.
Because of error on the VREF+ regulator, the real value of VREF+ is 4.8V. If we
put a 4V to Vin, what is the display value on the LCD?