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Stackup
R23 AMD Sabin UMA/Muxless SYSTEM DIAGRAM TOP
GND
IN1
A

DDR3
AMD DDR3 900MHz IN2
A

PCI-E x 8 ( 8 ~ 15 ) VCC
SODIMM1 Channel A Seymour-XT VRAM
Max. 4GB 128x16x4,64bit BOT
PG.12
AMD PP;PP
PG.19

DDR3 7'3:
SODIMM2 Channel B Llano APU PG.14~18 +3V/+5V
Max. 4GB
PG.31
PG.13 35mm X 35mm PCI-E ( 0 ~ 3 )
HDMI PG.21 +1.1V/+1.1VS5
3&,([ PG.32
B
FS1 socket 722 pin uPGA DP Port 0 ANX3110 LVDS B
LAN2 LAN1 LAN0
DP to LVDS LVDS PG.20 +1.2V/+2.5V
Card reader LAN WLAN TDP 35W Translator PG.11 PG.33
RTS5219-GR RTS8165EH BT COMBO PG.2~5
10/100 PG.24 10/100 PG.27 PG.30
+VCC_CORE
DP Port 1 UMI PG.34

+VDDNB_CORE
CRT CRT PG.35
PG.22
AMD FCH +1.5VSUS
USB2.0 Webcam BT +1.0V_VGA
Ports X 2PG.26 Softbreeze
PG.20 PG.26 +1.8V_VGA
C
USB 2.0 Hudson M2/M3 USB 2.0
PORT0,5 PORT2 PORT15
PG.36
C

PORT10 24.5mm X 24.5mm +VGACore


656pin FCBGA SATA0
SPI HDD PG.23 +1.5V_VGA
SPI ROM TDP 4.7W
+3V_VGA
LPC PG.6~10 SATA1 PG.37
KBC ODD
EnE KB3930QF D2 PG.23
PG.29 Charger
Azalia PG.38
KB TP ROM FAN Speaker Discharger
PG.25
AUDIO PG.39
D D

CODEC HP/MIC
PG.26
IDT92HD80B1
Analog MIC 352-(&75
PG.25 PG.25 4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom BLOCK DIAGRAM 1A

Date: Tuesday, May 03, 2011 Sheet 1 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

U29F

02
note --HDMI P&N can not swap
AA8 PCI EXPRESS AA2 PEG_HDMI_TXDP2 C771 0.1U/10V_4 C_TX2_HDMI+
P_GFX_RXP0 P_GFX_TXP0 C_TX2_HDMI+ 21
AA9 AA3 PEG_HDMI_TXDN2 C772 0.1U/10V_4 C_TX2_HDMI-
P_GFX_RXN0 P_GFX_TXN0 C_TX2_HDMI- 21

HDMI
Y7 Y2 PEG_HDMI_TXDP1 C1053 0.1U/10V_4 C_TX1_HDMI+
P_GFX_RXP1 P_GFX_TXP1 C_TX1_HDMI+ 21
Y8 Y1 PEG_HDMI_TXDN1 C774 0.1U/10V_4 C_TX1_HDMI- P_GFX_TXP/N[3:0]
P_GFX_RXN1 P_GFX_TXN1 PEG_HDMI_TXDP0 C_TX0_HDMI+ C_TX1_HDMI- 21
W5 Y4 C775 0.1U/10V_4 correspond to DisplayPort 2.
P_GFX_RXP2 P_GFX_TXP2 C_TX0_HDMI+ 21
W6 Y5 PEG_HDMI_TXDN0 C776 0.1U/10V_4 C_TX0_HDMI-
P_GFX_RXN2 P_GFX_TXN2 C_TX0_HDMI- 21
W8 W2 PEG_HDMI_TXCP C777 0.1U/10V_4 C_TXC_HDMI+
P_GFX_RXP3 P_GFX_TXP3 PEG_HDMI_TXCN C_TXC_HDMI- C_TXC_HDMI+ 21
W9 W3 C778 0.1U/10V_4
P_GFX_RXN3 P_GFX_TXN3 C_TXC_HDMI- 21
V7 P_GFX_RXP4 P_GFX_TXP4 V2
V8 P_GFX_RXN4 P_GFX_TXN4 V1
U5 P_GFX_RXP5 P_GFX_TXP5 V4
U6 P_GFX_RXN5 P_GFX_TXN5 V5 swap for layout
D U8 U2 D
P_GFX_RXP6 P_GFX_TXP6 concern , AMD
U9 U3

GRAPHICS
P_GFX_RXN6 P_GFX_TXN6 recommend
T7 P_GFX_RXP7 P_GFX_TXP7 T2
T8 P_GFX_RXN7 P_GFX_TXN7 T1
14 PEG_RXN8 PEG_RXN8 R5 T4 PEG_TXP8_C PEG_TXN8_CC779 0.1U/10V_4 PEG_TXP8 PEG_TXP8 14
PEG_RXP8 P_GFX_RXP8 P_GFX_TXP8 PEG_TXN8_C PEG_TXP8_C C780 0.1U/10V_4 PEG_TXN8
14 PEG_RXP8 R6 P_GFX_RXN8 P_GFX_TXN8 T5 PEG_TXN8 14
14 PEG_RXP9 PEG_RXP9 R8 R2 PEG_TXP9_C PEG_TXN9_CC781 0.1U/10V_4 PEG_TXP9 PEG_TXP9 14
PEG_RXN9 P_GFX_RXP9 P_GFX_TXP9 PEG_TXN9_C PEG_TXP9_C C782 0.1U/10V_4 PEG_TXN9
P&N swap for 14 PEG_RXN9 R9 P_GFX_RXN9 P_GFX_TXN9 R3 PEG_TXN9 14
PEG_RXP10 P7 P2 PEG_TXP10_C C783 0.1U/10V_4 PEG_TXP10
layout concern , 14 PEG_RXP10 P_GFX_RXP10 P_GFX_TXP10 PEG_TXP10 14

PEG X 8
14 PEG_RXN10 PEG_RXN10 P8 P1 PEG_TXN10_C C784 0.1U/10V_4 PEG_TXN10 PEG_TXN10 14
AMD recommend PEG_RXN11 P_GFX_RXN10 P_GFX_TXN10 PEG_TXP11_C C785 0.1U/10V_4 PEG_TXP11
14 PEG_RXN11 N5 P_GFX_RXP11 P_GFX_TXP11 P4 PEG_TXP11 14
PEG_RXP11 N6 P5 PEG_TXN11_C C786 0.1U/10V_4 PEG_TXN11
14 PEG_RXP11 P_GFX_RXN11 P_GFX_TXN11 PEG_TXN11 14
14 PEG_RXP12 PEG_RXP12 N8 N2 PEG_TXP12_C C787 0.1U/10V_4 PEG_TXP12 PEG_TXP12 14
PEG_RXN12 P_GFX_RXP12 P_GFX_TXP12 PEG_TXN12_C C788 0.1U/10V_4 PEG_TXN12
14 PEG_RXN12 N9 P_GFX_RXN12 P_GFX_TXN12 N3 PEG_TXN12 14
PEG_RXP13 M7 M2 PEG_TXP13_C C789 0.1U/10V_4 PEG_TXP13
14 PEG_RXP13 P_GFX_RXP13 P_GFX_TXP13 PEG_TXP13 14
14 PEG_RXN13 PEG_RXN13 M8 M1 PEG_TXN13_C C790 0.1U/10V_4 PEG_TXN13 PEG_TXN13 14
PEG_RXP14 P_GFX_RXN13 P_GFX_TXN13 PEG_TXP14_C C791 0.1U/10V_4 PEG_TXP14
14 PEG_RXP14 L5 P_GFX_RXP14 P_GFX_TXP14 M4 PEG_TXP14 14
PEG_RXN14 L6 M5 PEG_TXN14_C C792 0.1U/10V_4 PEG_TXN14
14 PEG_RXN14 P_GFX_RXN14 P_GFX_TXN14 PEG_TXN14 14
PEG_RXP15 L8 L2 PEG_TXP15_C C793 0.1U/10V_4 PEG_TXP15
14 PEG_RXP15 P_GFX_RXP15 P_GFX_TXP15 PEG_TXP15 14
14 PEG_RXN15 PEG_RXN15 L9 L3 PEG_TXN15_C C794 0.1U/10V_4 PEG_TXN15 PEG_TXN15 14
P_GFX_RXN15 P_GFX_TXN15
PCIE_RXP0_WLAN AC5 AD4 PCIE_TXP0_C C903 0.1U/10V_4
30 PCIE_RXP0_WLAN P_GPP_RXP0 P_GPP_TXP0 PCIE_TXP0_WALN 30
TO WLAN PCIE_RXN0_WLAN AC6 AD5 PCIE_TXN0_C C904 0.1U/10V_4 PCIE_TXN0_WLAN 30 TO WLAN
30 PCIE_RXN0_WLAN P_GPP_RXN0 P_GPP_TXN0
PCIE_RXP1_LAN AC8 AC2 PCIE_TXP1_C C905 0.1U/10V_4 PCIE_TXP1_LAN 27
27 PCIE_RXP1_LAN P_GPP_RXP1 P_GPP_TXP1
TO PCIE-LAN PCIE_RXN1_LAN AC9 AC3 PCIE_TXN1_C C906 0.1U/10V_4 TO PCIE-LAN
27 PCIE_RXN1_LAN P_GPP_RXN1 P_GPP_TXN1 PCIE_TXN1_LAN 27
PCIE_RXP2_CARD AB7 AB2 PCIE_TXP2_C C907 0.1U/10V_4 PCIE_TXP2_CARD 24
24 PCIE_RXP2_CARD P_GPP_RXP2 P_GPP_TXP2

GPP
TO PCIE CARD READER PCIE_RXN2_CARD AB8 AB1 PCIE_TXN2_C C908 0.1U/10V_4 PCIE_TXN2_CARD 24 TO PCIE CARD READER
24 PCIE_RXN2_CARD P_GPP_RXN2 P_GPP_TXN2
AA5 P_GPP_RXP3 P_GPP_TXP3 AB4
AA6 P_GPP_RXN3 P_GPP_TXN3 AB5
C AF8 AF1 UMI_TXP0_C C795 0.1U/10V_4 UMI_TXP0 C
7 UMI_RXP0 P_UMI_RXP0 P_UMI_TXP0 UMI_TXP0 7
7 UMI_RXN0 AF7 AF2 UMI_TXN0_C C796 0.1U/10V_4 UMI_TXN0 UMI_TXN0 7
P_UMI_RXN0 P_UMI_TXN0 UMI_TXP1_C C797 0.1U/10V_4 UMI_TXP1
7 UMI_RXP1 AE6 P_UMI_RXP1 P_UMI_TXP1 AF5 UMI_TXP1 7
UMI_TXN1_C C798 0.1U/10V_4 UMI_TXN1

UMI-LINK
7 UMI_RXN1 AE5 P_UMI_RXN1 P_UMI_TXN1 AF4 UMI_TXN1 7
7 UMI_RXP2 AE9 AE3 UMI_TXP2_C C799 0.1U/10V_4 UMI_TXP2 UMI_TXP2 7
P_UMI_RXP2 P_UMI_TXP2 UMI_TXN2_C C800 0.1U/10V_4 UMI_TXN2
7 UMI_RXN2 AE8 P_UMI_RXN2 P_UMI_TXN2 AE2 UMI_TXN2 7
AD8 AD1 UMI_TXP3_C C801 0.1U/10V_4 UMI_TXP3
7 UMI_RXP3 P_UMI_RXP3 P_UMI_TXP3 UMI_TXP3 7
7 UMI_RXN3 AD7 AD2 UMI_TXN3_C C802 0.1U/10V_4 UMI_TXN3 UMI_TXN3 7
P_UMI_RXN3 P_UMI_TXN3
R508 196/F_6 P_ZVDDP K5 K4 P_ZVSS R509 196/F_6
+1.2V P_ZVDDP P_ZVSS

Llano APU
+3V

HDT+ Connector for Debug only PV change to short-pad


VID Override Circuit
BOOT VOLTAGE
+1.5V
R873
*0_4/s SVC SVD VFIX_+VDD VFIX_+VDD
=VCC/GND =OPEN

R510 R511 0 0 1.1 1.1


*300/J_4 *300/J_4

U30 0 1 1.0 1.2


B APU_RST# 1 6 APU_RST_L_BUF B
4,7 APU_RST# A1 Y1
2 GND VCC 5 1 0 0.9 1.0
Note:
APU_PWRGD 3 4 APU_PWROK_BUF
4,7 APU_PWRGD A2 Y2 To override VID,Remove Rd, Re, Rf, install Rc
1 1 0.8 0.8
set VID via SVC & SVD option RES.
*74LVC2G07
+1.5VSUS SI +1.5V

R512 R513
J1 1K/F_4 1K/F_4 R515 R516 R514
+1.5VSUS *1K/J_4 *1K/J_4 *2.2K/J_4
20
APU_TEST18 19
close to HDT 4 APU_TEST18 18
Rd
+1.5VSUS APU_TEST19 SVC R517 0_4 CPU_SVC
debug HEADER 4 APU_TEST19 17 4 SVC CPU_SVC 34,35
APU_RST_L_BUF Re
APU_TDI R529 *1K/F_4 CPU_LDT_RST_HTPA# 16 SVD R520 0_4 CPU_SVD
TP37 15 4 SVD CPU_SVD 34,35
APU_TCK R530 *1K/F_4 APU_DBREQ# Rf
4 APU_DBREQ# 14
APU_TMS R531 *1K/F_4 APU_DBRDY APU_PWRGD R523 0_4 CPU_PWRGD_SVID_REG CPU_PWRGD_SVID_REG 34,35
4 APU_DBRDY 13 4,7 APU_PWRGD
APU_TRST# R532 *1K/F_4 APU_TCK
4 APU_TCK 12
APU_DBREQ# R533 *300/J_4 APU_TMS APU_PWRGD have pull up 300ohm
4 APU_TMS 11
APU_TDI
4 APU_TDI
APU_TRST# 10 to +1.5V on page 4 R526 R527 R528
4 APU_TRST# APU_TDO 9 *220/J_4 *220/J_4 *220/J_4
4 APU_TDO 8
APU_PWROK_BUF for normal operation Ra Rb Rc
7
A 6 open Ra , Rb,Rc A
5
4
3
2
1
*HDT CONN
88511-2001-20p-l Quanta Computer Inc.
DEL AMD HDT debug port
PROJECT : R23
Size Document Number Rev
1A
Llano PCIE/UMI/GPP
Date: Wednesday, May 04, 2011 Sheet 2 of 40
5 4 3 2 1
5 4 3 2 1

U29A M_A_DQ[0..63] 12
U29B
03
M_B_DQ[0..63] 13
12 M_A_A[15:0] M_A_A0 MEMORY CHANNEL A M_A_DQ0 13 M_B_A[15:0]
U20 MA_ADD0 MA_DATA0 E13 MEMORY CHANNEL B
M_A_A1 R20 J13 M_A_DQ1 M_B_A0 T27 A14 M_B_DQ0
M_A_A2 MA_ADD1 MA_DATA1 M_A_DQ2 M_B_A1 MB_ADD0 MB_DATA0 M_B_DQ1
R21 MA_ADD2 MA_DATA2 H15 P24 MB_ADD1 MB_DATA1 B14
M_A_A3 P22 J15 M_A_DQ3 M_B_A2 P25 D16 M_B_DQ2
M_A_A4 MA_ADD3 MA_DATA3 M_A_DQ4 M_B_A3 MB_ADD2 MB_DATA2 M_B_DQ3
P21 MA_ADD4 MA_DATA4 H13 N27 MB_ADD3 MB_DATA3 E16
D M_A_A5 N24 F13 M_A_DQ5 M_B_A4 N26 B13 M_B_DQ4 D
M_A_A6 MA_ADD5 MA_DATA5 M_A_DQ6 M_B_A5 MB_ADD4 MB_DATA4 M_B_DQ5
N23 MA_ADD6 MA_DATA6 F15 M28 MB_ADD5 MB_DATA5 C13
M_A_A7 N20 E15 M_A_DQ7 M_B_A6 M27 B16 M_B_DQ6
M_A_A8 MA_ADD7 MA_DATA7 M_B_A7 MB_ADD6 MB_DATA6 M_B_DQ7
N21 MA_ADD8 M24 MB_ADD7 MB_DATA7 A16
M_A_A9 M21 H17 M_A_DQ8 M_B_A8 M25
M_A_A10 MA_ADD9 MA_DATA8 M_A_DQ9 M_B_A9 MB_ADD8 M_B_DQ8
U23 MA_ADD10 MA_DATA9 F17 L26 MB_ADD9 MB_DATA8 C17
M_A_A11 M22 E19 M_A_DQ10 M_B_A10 U26 B18 M_B_DQ9
M_A_A12 MA_ADD11 MA_DATA10 M_A_DQ11 M_B_A11 MB_ADD10 MB_DATA9 M_B_DQ10
L24 MA_ADD12 MA_DATA11 J19 L27 MB_ADD11 MB_DATA10 B20
M_A_A13 AA25 G16 M_A_DQ12 M_B_A12 K27 A20 M_B_DQ11
M_A_A14 MA_ADD13 MA_DATA12 M_A_DQ13 M_B_A13 MB_ADD12 MB_DATA11 M_B_DQ12
L21 MA_ADD14 MA_DATA13 H16 W 26 MB_ADD13 MB_DATA12 E17
M_A_A15 L20 H19 M_A_DQ14 M_B_A14 K25 B17 M_B_DQ13
12 M_A_BS#[2..0] MA_ADD15 MA_DATA14 MB_ADD14 MB_DATA13
F19 M_A_DQ15 M_B_A15 K24 B19 M_B_DQ14
M_A_BS#0 MA_DATA15 13 M_B_BS#[2..0] MB_ADD15 MB_DATA14 M_B_DQ15
U24 MA_BANK0 MB_DATA15 C19
M_A_BS#1 U21 H20 M_A_DQ16 M_B_BS#0 U27
M_A_BS#2 MA_BANK1 MA_DATA16 M_A_DQ17 M_B_BS#1 MB_BANK0 M_B_DQ16
12 M_A_DM[7..0] L23 MA_BANK2 MA_DATA17 F21 T28 MB_BANK1 MB_DATA16 C21
J23 M_A_DQ18 M_B_BS#2 K28 B22 M_B_DQ17
MA_DATA18 13 M_B_DM[7..0] MB_BANK2 MB_DATA17
M_A_DM0 E14 H23 M_A_DQ19 C23 M_B_DQ18
M_A_DM1 MA_DM0 MA_DATA19 M_A_DQ20 M_B_DM0 MB_DATA18 M_B_DQ19
J17 MA_DM1 MA_DATA20 G20 D14 MB_DM0 MB_DATA19 A24
M_A_DM2 E21 E20 M_A_DQ21 M_B_DM1 A18 D20 M_B_DQ20
M_A_DM3 MA_DM2 MA_DATA21 M_A_DQ22 M_B_DM2 MB_DM1 MB_DATA20 M_B_DQ21
F25 MA_DM3 MA_DATA22 G22 A22 MB_DM2 MB_DATA21 B21
M_A_DM4 AD27 H22 M_A_DQ23 M_B_DM3 C25 E23 M_B_DQ22
M_A_DM5 MA_DM4 MA_DATA23 M_B_DM4 MB_DM3 MB_DATA22 M_B_DQ23
AC23 MA_DM5 AF25 MB_DM4 MB_DATA23 B23
M_A_DM6 AD19 G24 M_A_DQ24 M_B_DM5 AG22
M_A_DM7 MA_DM6 MA_DATA24 M_A_DQ25 M_B_DM6 MB_DM5 M_B_DQ24
AC15 MA_DM7 MA_DATA25 E25 AH18 MB_DM6 MB_DATA24 E24
G27 M_A_DQ26 M_B_DM7 AD14 B25 M_B_DQ25
MA_DATA26 M_A_DQ27 MB_DM7 MB_DATA25 M_B_DQ26
12 M_A_DQSP0 G14 MA_DQS_H0 MA_DATA27 G26 MB_DATA26 B27
H14 F23 M_A_DQ28 C15 D28 M_B_DQ27
12 M_A_DQSN0 MA_DQS_L0 MA_DATA28 M_A_DQ29 13 M_B_DQSP0 MB_DQS_H0 MB_DATA27 M_B_DQ28
12 M_A_DQSP1 G18 MA_DQS_H1 MA_DATA29 H24 13 M_B_DQSN0 B15 MB_DQS_L0 MB_DATA28 B24
H18 E28 M_A_DQ30 E18 D24 M_B_DQ29
12 M_A_DQSN1 MA_DQS_L1 MA_DATA30 13 M_B_DQSP1 MB_DQS_H1 MB_DATA29
J21 F27 M_A_DQ31 D18 D26 M_B_DQ30
C 12 M_A_DQSP2 MA_DQS_H2 MA_DATA31 13 M_B_DQSN1 MB_DQS_L1 MB_DATA30 M_B_DQ31 C
12 M_A_DQSN2 H21 MA_DQS_L2 13 M_B_DQSP2 E22 MB_DQS_H2 MB_DATA31 C27
E27 AB28 M_A_DQ32 D22
12 M_A_DQSP3 MA_DQS_H3 MA_DATA32 13 M_B_DQSN2 MB_DQS_L2
E26 AC27 M_A_DQ33 B26 AG26 M_B_DQ32
12 M_A_DQSN3 MA_DQS_L3 MA_DATA33 13 M_B_DQSP3 MB_DQS_H3 MB_DATA32
AE26 AD25 M_A_DQ34 A26 AH26 M_B_DQ33
12 M_A_DQSP4 MA_DQS_H4 MA_DATA34 13 M_B_DQSN3 MB_DQS_L3 MB_DATA33
AD26 AA24 M_A_DQ35 AG24 AF23 M_B_DQ34
12 M_A_DQSN4 MA_DQS_L4 MA_DATA35 13 M_B_DQSP4 MB_DQS_H4 MB_DATA34
AB22 AE28 M_A_DQ36 AG25 AG23 M_B_DQ35
12 M_A_DQSP5 MA_DQS_H5 MA_DATA36 13 M_B_DQSN4 MB_DQS_L4 MB_DATA35
AA22 AD28 M_A_DQ37 AG21 AG27 M_B_DQ36
12 M_A_DQSN5 MA_DQS_L5 MA_DATA37 M_A_DQ38 13 M_B_DQSP5 MB_DQS_H5 MB_DATA36 M_B_DQ37
12 M_A_DQSP6 AB18 MA_DQS_H6 MA_DATA38 AB26 13 M_B_DQSN5 AF21 MB_DQS_L5 MB_DATA37 AF27
AA18 AC25 M_A_DQ39 AG17 AH24 M_B_DQ38
12 M_A_DQSN6 MA_DQS_L6 MA_DATA39 13 M_B_DQSP6 MB_DQS_H6 MB_DATA38
AA14 AG18 AE24 M_B_DQ39
12 M_A_DQSP7 MA_DQS_H7 M_A_DQ40 13 M_B_DQSN6 MB_DQS_L6 MB_DATA39
12 M_A_DQSN7 AA15 MA_DQS_L7 MA_DATA40 Y23 13 M_B_DQSP7 AH14 MB_DQS_H7
AA23 M_A_DQ41 AG14 AE22 M_B_DQ40
MA_DATA41 M_A_DQ42 13 M_B_DQSN7 MB_DQS_L7 MB_DATA40 M_B_DQ41
12 M_A_CLKP0 T21 MA_CLK_H0 MA_DATA42 Y21 MB_DATA41 AH22
T22 AA20 M_A_DQ43 R26 AE20 M_B_DQ42
12 M_A_CLKN0 MA_CLK_L0 MA_DATA43 13 M_B_CLKP0 MB_CLK_H0 MB_DATA42
R23 AB24 M_A_DQ44 R27 AH20 M_B_DQ43
12 M_A_CLKP1 MA_CLK_H1 MA_DATA44 M_A_DQ45 13 M_B_CLKN0 MB_CLK_L0 MB_DATA43 M_B_DQ44
12 M_A_CLKN1 R24 MA_CLK_L1 MA_DATA45 AD24 13 M_B_CLKP1 P27 MB_CLK_H1 MB_DATA44 AD23
AA21 M_A_DQ46 P28 AD22 M_B_DQ45
MA_DATA46 13 M_B_CLKN1 MB_CLK_L1 MB_DATA45
H28 AC21 M_A_DQ47 AD21 M_B_DQ46
12 M_A_CKE0 MA_CKE0 MA_DATA47 MB_DATA46
H27 J26 AD20 M_B_DQ47
12 M_A_CKE1 MA_CKE1 13 M_B_CKE0 MB_CKE0 MB_DATA47
AA19 M_A_DQ48 J27
MA_DATA48 13 M_B_CKE1 MB_CKE1
Y25 AC19 M_A_DQ49 AF19 M_B_DQ48
12 M_A_ODT0 MA_ODT0 MA_DATA49 MB_DATA48
AA27 AC17 M_A_DQ50 W 27 AE18 M_B_DQ49
12 M_A_ODT1 MA_ODT1 MA_DATA50 M_A_DQ51 13 M_B_ODT0 MB_ODT0 MB_DATA49 M_B_DQ50
MA_DATA51 AA17 13 M_B_ODT1 Y28 MB_ODT1 MB_DATA50 AE16
V22 AB20 M_A_DQ52 AH16 M_B_DQ51
12 M_A_CS#0 MA_CS_L0 MA_DATA52 MB_DATA51
AA26 Y19 M_A_DQ53 V25 AG20 M_B_DQ52
12 M_A_CS#1 MA_CS_L1 MA_DATA53 M_A_DQ54 13 M_B_CS#0 MB_CS_L0 MB_DATA52 M_B_DQ53
MA_DATA54 AD18 13 M_B_CS#1 Y27 MB_CS_L1 MB_DATA53 AG19
V21 AD17 M_A_DQ55 AF17 M_B_DQ54
12 M_A_RAS# MA_RAS_L MA_DATA55 MB_DATA54
W 24 V24 AD16 M_B_DQ55
12 M_A_CAS# MA_CAS_L 13 M_B_RAS# MB_RAS_L MB_DATA55
W 23 AA16 M_A_DQ56 V27
12 M_A_WE# MA_W E_L MA_DATA56 13 M_B_CAS# MB_CAS_L
+1.5VSUS R537 1K/F_4 Y15 M_A_DQ57 V28 AG15 M_B_DQ56
B MA_DATA57 13 M_B_WE# MB_W E_L MB_DATA56 B
H25 AA13 M_A_DQ58 AD15 M_B_DQ57
12 M_A_RST# MA_RESET_L MA_DATA58 MB_DATA57
T24 AC13 M_A_DQ59 J25 AG13 M_B_DQ58
12 M_A_EVENT# MA_EVENT_L MA_DATA59 M_A_DQ60 13 M_B_RST# MB_RESET_L MB_DATA58 M_B_DQ59
MA_DATA60 Y17 13 M_B_EVENT# T25 MB_EVENT_L MB_DATA59 AD13
+MEMVREF_CPU +MEMVREF_CPU W 20 AB16 M_A_DQ61 AG16 M_B_DQ60
C235 M_VREF MA_DATA61 M_A_DQ62 MB_DATA60 M_B_DQ61
MA_DATA62 AB14 MB_DATA61 AF15
220pF/50V_4 +1.5VSUS R534 39.2/F_4 +M_ZVDDIO W 21 Y13 M_A_DQ63 +1.5VSUS R541 1K/F_4 AE14 M_B_DQ62
M_ZVDDIO MA_DATA63 MB_DATA62 M_B_DQ63
MB_DATA63 AF13
Place close to APU within 1" 220pF/50V_4
MV EMI suggestion Soldermask openings for all bottom side vias/TPs under FS1 C252
MV EMI suggestion
Llano APU
Llano APU

+1.5VSUS Reserved for AMD suggest


R808 0_4

+3VS5
R809
C417 *.1U/10V_4
1K/F_4
5

U43
+MEMVREF 3
A
+ A
1 R8101 2 *10_4 +MEMVREF_CPU R867 *0_4
DDR_VTTREF 12,13,36
4 -
R811 C1047 *OPA343NA/3K Reserved
R812 C274
2

1K/F_4 *0.47u/6.3V_4 220pF/50V_4


*10K/F_4
MV EMI suggestion
R813 *0_4 Quanta Computer Inc.
R814 *0_4
PROJECT : R23
Size Document Number Rev
1A
Llano DDR3 MEM I/F
Date: Wednesday, May 04, 2011 Sheet 3 of 40
5 4 3 2 1
5 4 3 2 1

04
Place caps with APU < 1 inch U29C
route PCIE as 85ohm +/- 10%
ANALOG/DISPLAY/MISC
C805 0.1U/10V_4 INT_eDP_TXP0_C F2 D4 INT_eDP_AUXP_C C806 0.1U/10V_4 INT_eDP_AUXP R542 *100K/F_4
11 INT_eDP_TXP0
C807 0.1U/10V_4 INT_eDP_TXN0_C F1
DP0_TXP0 DP0_AUXP
D5 INT_eDP_AUXN_C C808 0.1U/10V_4
INT_eDP_AUXP 11 LVDS
11 INT_eDP_TXN0 DP0_TXN0 DP0_AUXN INT_eDP_AUXN 11
DP0 output to INT_eDP_AUXN R543 *100K/F_4 +3V
11 INT_eDP_TXP1 C809 0.1U/10V_4 INT_eDP_TXP1_C E3 E5 APU_DP_AUXP_C C810 0.1U/10V_4 APU_DP_AUXP 8
eDP to LVDS converter 11 INT_eDP_TXN1 C811 0.1U/10V_4 INT_eDP_TXN1_C E2
DP0_TXP1 DP1_AUXP
E6 APU_DP_AUXN_C C812 0.1U/10V_4 APU_DP_AUXN 8 VGA INT_eDP_AUXP_C R858 1.8K/J_4
DP0_TXN1 DP1_AUXN
D2 J5 INT_HDMI_AUXP INT_eDP_AUXN_C R859 1.8K/J_4
TP1 DP0_TXP2 DP2_AUXP INT_HDMI_AUXP 21
INT_HDMI_AUXN
D1 J6 HDMI

DISPLAY
TP2 DP0_TXN2 DP2_AUXN INT_HDMI_AUXN 21

PORT 0
Display port power 1.5V min 1.2v max : 1.65v
TP3 C2 DP0_TXP3 DP3_AUXP H4
TP4 C3 DP0_TXN3 DP3_AUXN H5
D APU_DP_AUXP R860 100K/F_4 D
Display port power 1.5V min 1.2v max : 1.65v

DISPLAY PORT
C813 0.1U/10V_4 APU_DP_TXP0_C K2 G5
8 APU_DP_TXP0 APU_DP_TXN0_C DP1_TXP0 DP4_AUXP APU_DP_AUXN
C814 0.1U/10V_4 K1 G6 R861 100K/F_4 +3V
8 APU_DP_TXN0 DP1_TXN0 DP4_AUXN
C815 0.1U/10V_4 APU_DP_TXP1_C J3 F4 APU_DP_AUXP_C R544 1.8K/J_4
8 APU_DP_TXP1 DP1_TXP1 DP5_AUXP

MISC.
DP1 output to Hudson-M2 C816 0.1U/10V_4 APU_DP_TXN1_C J2 F5
8 APU_DP_TXN1 DP1_TXN1 DP5_AUXN APU_DP_AUXN_C R545 1.8K/J_4
for VGA translator interface C817 0.1U/10V_4 APU_DP_TXP2_C H2 D7 FCH_LVDS_HPD
8 APU_DP_TXP2 DP1_TXP2 DP0_HPD FCH_LVDS_HPD 11

DISPLAY
C818 0.1U/10V_4 APU_DP_TXN2_C H1 E7 FCH_VGA_HPD

PORT 1
8 APU_DP_TXN2 DP1_TXN2 DP1_HPD FCH_VGA_HPD 8
J7 HDMI_HPD_Q
DP2_HPD HDMI_HPD_Q 21
C819 0.1U/10V_4 APU_DP_TXP3_C G2 H7
8 APU_DP_TXP3 DP1_TXP3 DP3_HPD
C820 0.1U/10V_4 APU_DP_TXN3_C G3 G7
8 APU_DP_TXN3 DP1_TXN3 DP4_HPD +1.5VSUS
DP5_HPD F7
CLK_APU_P AH7 +1.5VSUS
7 CLK_APU_P CLKIN_H
Note: CLK_APU_HCLKP/N is 100MHZ SSC CLK_APU_N AH6 C6 APU_BLEN
7 CLK_APU_N CLKIN_L DP_BLON APU_BLEN 20

CLK
C5 APU_DIGON
DP_DIGON APU_DIGON 20
CLK_DP_P AH4 C7
7 CLK_DP_P CLK_DP_N DISP_CLKIN_H DP_VARY_BL APU_BLPWM 11
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC 7 CLK_DP_N AH3 DISP_CLKIN_L
D8 DP_AUX_ZVSS R550 150/F_4 R548 R549
SVC DP_AUX_ZVSS *39.2/F_4 300/J_4
2 SVC B8 SVC
SVD A8 AA10 APU_TEST6 TP5
2 SVD SVD TEST6 APU_TEST9 M_TEST APU_TEST35

SER.
TEST9 G10 TP6
APU_SIC AH11 H10 APU_TEST10
APU_SID SIC TEST10 APU_TEST12_SCANSHIFTEND TP7
AG11 SID TEST12 H12 TP8
R553 300/J_4 D9 APU_TEST14_BP0 M_TEST CONNECTION TBD
+1.5V TEST14 TP9
APU_RST# AF10 E9 APU_TEST15_BP1 R551 R552
2,7 APU_RST# RESET_L TEST15 TP10
APU_PWRGD AE10 G9 APU_TEST16_BP2 39.2/F_4 TEST35 PU FOR INTERNAL *300/J_4
2,7 APU_PWRGD PW ROK TEST16 TP11

CTRL
R554 300/J_4 H9 APU_TEST17_BP3
+1.5V TEST17 TP12 TEST35 PD FOR CUSTOMER
APU_PROCHOT# AD10 H11 APU_TEST18
PROCHOT_L TEST18 APU_TEST18 2
APU_THERMTRIP# AG12 G11 APU_TEST19 To AMD HDT
C APU_ALERT THERMTRIP_L TEST19 APU_TEST20_SCANCLK2 APU_TEST19 2 C
+1.5VSUS R555 1K/F_4 AH12 F12
ALERT_L TEST20 TP13
E11 APU_TEST21_SCANEN

TEST
TEST21 TP14
APU_TDI C12 D11 APU_TEST22_SCANSHIFTEN
2 APU_TDI TDI TEST22 TP15
APU_TDO A12 F10 APU_TEST23
2 APU_TDO TDO TEST23 TP16

JTAG
APU_TCK A11 G12 APU_TEST24_SCANCLK1
2 APU_TCK TCK TEST24 TP17
APU_TMS D12 AH10 APU_TEST25_H
2 APU_TMS TMS TEST25_H TP18 +1.2V
APU_TRST# B12 AH9 APU_TEST25_L
2 APU_TRST# APU_DBRDY TRST_L TEST25_L APU_TEST28_H TP19
2 APU_DBRDY B11 DBRDY TEST28_H K7 TP20
APU_DBREQ# C11 K8 APU_TEST28_L APU_TEST25_L R556 510/J_4
2 APU_DBREQ# DBREQ_L TEST28_L TP21
AA12 ANATSTIN_H
TEST30_H ANATSTIN_L TP22 PV change to short-pad
E8 RSVD_1 TEST30_L AB12 TP23
K21 K22 M_TEST DMAACTIVE_L controls APU_TEST9 R557 *0_4/s
RSVD_2

RSVD
PV change to short-pad TEST31 APU_TEST32_H APU_TEST12_SCANSHIFTEND R558 1K/F_4
AC11 RSVD_3 TEST32_H AB11 TP24 entry and exit from the
AA11 APU_TEST32_L APU_TEST18 R559 1K/F_4
TEST32_L TP25 sleep and power states
R560 *0_4/s D10 APU_TEST35 APU_TEST19 R561 1K/F_4
35 CPU_VDDNB_RUN_FB_L VSS_SENSE TEST35 APU_TEST20_SCANCLK2
R562 *0_4/s B9 R564 1K/F_4
34 CPU_VDD0_RUN_FB_L VSS_SENSE
VDDP_FB_H C8 Y11 FS1R1 R563 10K/F_4 APU_TEST21_SCANEN R566 1K/F_4
33 VDDP_FB_H VDDP_SENSE FS1R1 +3VS5

SENSE
CPU_VDDNB_RUN_FB_H A9 AB10 DMAACTIVE_L DMAACTIVE_L 7 APU_TEST22_SCANSHIFTEN R567 1K/F_4
35 CPU_VDDNB_RUN_FB_H VDDNB_SENSE DMAACTIVE_L
VDDIO_FB_H B10 R568 *1K/F_4 +1.5V APU_TEST24_SCANCLK1 R569 1K/F_4
36 VDDIO_FB_H VDDIO_SENSE
CPU_VDD0_RUN_FB_H C9 AE12 CPU_THERMDA R571 1K/F_4 +1.5VSUS APU_TEST25_H R570 510/J_4
+1.5VSUS 34 CPU_VDD0_RUN_FB_H VDD_SENSE TEST4 TP38
VDDP_FB_H A10 AD12 CPU_THERMDC
VDDR_SENSE TEST5 TP39
SI
AMD internal test only
Llano APU FS1R1 signals is for detect CPU TYPE and protect it.
R587
R588 +1.5V FS1R1 CPU this pin is N.C
10K/F_4 SI
1K/F_4 FS1R2 CPU this pin is LOW
can remove it at MP
2

B Q49 R579 +1.5VSUS +1.5VSUS B


MMBT3904-7-F 1K/F_4
3 1 APU_THERMTRIP# APU_PROCHOT# ⎗ẍ䔞 input or output
6 FCH_THERMTRIP#
䔞Low 㗪CPU 㚫旵 P - STATE
⹎C
THERMTRIP# shutdown temperature 125⹎
R584 *0_4/s APU_PROCHOT# R572 R573 R574 R575
7 FCH_PROCHOT# PV change to short-pad 2K/F_4 2K/F_4 1K/F_4 1K/F_4

Thermal 29 H_PROCHOT#
R830 0_4

2
to EC reserve only PV inner document ADD R830 for EC request Q44
C278 MMBT3904-7-F
3920_RST# 220pF/50V_4 MBCLK2 3 1 APU_SIC
3920_RST# 29 29 MBCLK2
Q47
3

MMBT3904-7-F D14 CH501H-40PT 1 2


2 2 1 ECPWROK RB501V-40 D12
ECPWROK 10,17,29

2
1

R586 10K/F_4 R831 Q46


+3V +3VPCU +5VPCU MBDATA2 APU_SID
U31 *11.5K/F_4 R832 29 MBDATA2 MMBT3904-7-F 3 1
SMBALERT# *G718 *11.5K/F_4
1 VCC TMSNS1 8
1 2
3

R834 *100K_6 NTC RB501V-40 D13


R590 *10K/F_4 R583 C821 2 7 R833 *8.87K/F_4 2 1
10K/F_4 *1U/6.3V_4 GND RHYST1
1

Q48 2 VGA_ALERT 15
R580 *0_4/S 3 6
*2N7002E-G D24 *CH501H-40PT OT1 TMSNS2
A 2 1 A
HWPG 20,29,31,32,33,36
SMBALERT# 4 5 R581 *8.87K/F_4 2 1
1

OT2 RHYST2
ADD VGA TEMP_ FAIL function is active Hi R835 *100K_6 NTC
over 120 degree C= Low
:KHQ.17&& .
7KHUPDO7ULS &
Quanta Computer Inc.
PROJECT : R23
DEL Thermal IC circuit on MV Size Document Number Rev
1A
Llano Display/Misc
Date: Wednesday, May 04, 2011 Sheet 4 of 40
5 4 3 2 1
5 4 3 2 1

APU POWER TABLE


PIN NAME

VDD

VDDNB

VDDIO
NET NAME

+VCC_CORE

+VDDNB_CORE

+1.5VSUS
VOLTAGE
+1.1V

??

+1.5V
+VCC_CORE SI EMI
05
C388 C383 C371
VDDP +1.2V_VDDP +1.2V 470P/50V_4 *470P/50V_4 *470P/50V_4

VDDR +1.2V_VDDR +1.2V

D VDDA +2.5V_VDDA +2.5V +VCC_CORE +VCC_CORE D


U29D 36A PV ADD 470pF on C388 for EMI suggestion
U29E
C1 T6
Maximum IDDspike 50A A7 T11
VDD_1 VDD_33 VSS_1 VSS_75
D3 VDD_2 VDD_34 T10 A13 VSS_2 VSS_76 T19
+VDDNB_CORE D6 T18 A15 U4
VDD_3 VDD_35 C823 C824 C825 C826 C827 C828 C829 VSS_3 VSS_77
E1 VDD_4 VDD_36 U1 A17 VSS_4 VSS_78 U7
F3 U11 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 A19 U10
VDD_5 VDD_37 VSS_5 VSS_79
F6 VDD_6 VDD_38 U19 A21 VSS_6 VSS_80 U18
F8 VDD_7 VDD_39 V3 A23 VSS_7 VSS_81 V9
G1 VDD_8 VDD_40 V6 A25 VSS_8 VSS_82 V11
C830 C831 C832 C833 C834 H3 V10 B7 V19
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 0.22U/6.3V_4 VDD_9 VDD_41 VSS_9 VSS_83
H6 VDD_10 VDD_42 V18 C4 VSS_10 VSS_84 W4
H8 VDD_11 VDD_43 W1 C10 VSS_11 VSS_85 W7
J1 VDD_12 VDD_44 W 11 C14 VSS_12 VSS_86 W 10
K3 VDD_13 VDD_45 W 13 C16 VSS_13 VSS_87 W 12
K6 VDD_14 VDD_46 W 15 C18 VSS_14 VSS_88 W 14
L1 VDD_15 VDD_47 W 17 C20 VSS_15 VSS_89 W 16
L11 W 19 C835 C836 C837 C838 C839 C840 C841 C22 W 18
VDD_16 VDD_48 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4 0.01U/25V_4 0.01U/25V_4 0.01U/25V_4 VSS_16 VSS_90
L19 VDD_17 VDD_49 Y3 C24 VSS_17 VSS_91 Y9
C845 C842 C843 C844 M3 Y6 C26 Y22
0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4 VDD_18 VDD_50 VSS_18 VSS_92
M6 VDD_19 VDD_51 Y10 C28 VSS_19 VSS_93 AA4
M10 VDD_20 VDD_52 Y12 D13 VSS_20 VSS_94 AA7
M18 VDD_21 VDD_53 Y14 D15 VSS_21 VSS_95 AB9
N1 VDD_22 VDD_54 Y16 D17 VSS_22 VSS_96 AB13
N11 VDD_23 VDD_55 Y18 D19 VSS_23 VSS_97 AB15
N19 VDD_24 VDD_56 Y20 D21 VSS_24 VSS_98 AB17
P3 VDD_25 VDD_57 AA1 D23 VSS_25 VSS_99 AB19
P6 VDD_26 VDD_58 AB3 D25 VSS_26 VSS_100 AB21
P10 AB6 D27 AB23
C P18
VDD_27 VDD_59
AC1
DECOUPLING between PROCESSOR and DIMMs E4
VSS_27 VSS_101
AB25 C
VDD_28 VDD_60 VSS_28 VSS_102
R1 AD3
R11
VDD_29 VDD_61
AD6
Across VDDIO and VSS split E10
E12
VSS_29 VSS_103 AB27
AC4
VDD_30 VDD_62 +1.5VSUS VSS_30 VSS_104
R19 AE1 F9 AC7
18A +VDDNB_CORE T3
VDD_31 VDD_63 +VDDNB_CORE F11
VSS_31 VSS_105
AC10
VDD_32 VSS_32 VSS_106
Maximum IDDNBspike 22.5A J9 K11
F14
F16
VSS_33 VSS_107 AC12
AC14
VDDNB_1 VDDNB_9 C846 C847 C848 C849 VSS_34 VSS_108
J10 VDDNB_2 VDDNB_10 K12 F18 VSS_35 VSS_109 AC16
J11 K13 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4 F20 AC18
VDDNB_3 VDDNB_11 VSS_36 VSS_110
J12 VDDNB_4 VDDNB_12 K14 F22 VSS_37 VSS_111 AC20
J14 VDDNB_5 VDDNB_13 K16 F24 VSS_38 VSS_112 AC22
J16 VDDNB_6 VDDNB_14 K17 F26 VSS_39 VSS_113 AC24
K9 VDDNB_7 VDDNB_15 K18 F28 VSS_40 VSS_114 AC26
+1.5VSUS K10 L18 +1.5VSUS G4 AC28
VDDNB_8 VDDNB_16 VSS_41 VSS_115
4A Up to DDR3-1333 @ 1.50V VDDIO G8 VSS_42 VSS_116 AD9
G28 VDDIO_1 VDDIO_19 R22 G13 VSS_43 VSS_117 AD11
H26 VDDIO_2 VDDIO_20 R25 G15 VSS_44 VSS_118 AE4
J28 VDDIO_3 VDDIO_21 R28 G17 VSS_45 VSS_119 AE7
C851 C852 C853 C854 C855 C856 K20 T20 C857 C858 C859 C860 C861 C862 C863 G19 AE13
0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4 VDDIO_4 VDDIO_22 22U/6.3VS_8 22U/6.3VS_8 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 VSS_46 VSS_120
K23 VDDIO_5 VDDIO_23 T23 G21 VSS_47 VSS_121 AE15
K26 VDDIO_6 VDDIO_24 T26 G23 VSS_48 VSS_122 AE17
L22 VDDIO_7 VDDIO_25 U22 G25 VSS_49 VSS_123 AE19
EMI reserve L25 VDDIO_8 VDDIO_26 U25 If the VSS plane is cut to create a VDDIO plane, J4 VSS_50 VSS_124 AE21
L28 U28 J8 AE23
M20
VDDIO_9 VDDIO_27
V20
ceramic capacitors are connected across J18
VSS_51 VSS_125
AE25
VDDIO_10 VDDIO_28 VSS_52 VSS_126
M23 VDDIO_11 VDDIO_29 V23 the VDDIO and VSS plane split as follows J20 VSS_53 VSS_127 AE27
M26 VDDIO_12 VDDIO_30 V26 J22 VSS_54 VSS_128 AF3
N22 VDDIO_13 VDDIO_31 W 22 J24 VSS_55 VSS_129 AF6
N25 VDDIO_14 VDDIO_32 W 25 K19 VSS_56 VSS_130 AF9
N28 VDDIO_15 VDDIO_33 W 28 L4 VSS_57 VSS_131 AF12
B P20 Y24 L7 AF14 B
VDDIO_16 VDDIO_34 VSS_58 VSS_132
P23 VDDIO_17 VDDIO_35 Y26 L10 VSS_59 VSS_133 AF16
+1.2V
VDDP_A + VDDP_B = 3.5A P26 VDDIO_18 VDDIO_36 AA28 M9 VSS_60 VSS_134 AF18
+1.2V_VDDP_A
1.75A 1.75A +1.2V_VDDP_B
M11 VSS_61 VSS_135 AF20
+1.2V R591 *0_8/S AG2 A3 R824 *0_8/S M19 AF22
VDDP_A_1 VDDP_B_1 VSS_62 VSS_136
AG3 VDDP_A_2 VDDP_B_2 A4 N4 VSS_63 VSS_137 AF24
AG4 VDDP_A_3 VDDP_B_3 B3 N7 VSS_64 VSS_138 AF26
C864 C867 C869 AG5 B4 C865 C866 C868 C870 N10 AF28
10U/6.3V_8 0.22U/6.3V_4 180P/50V_4 VDDP_A_4 VDDP_B_4 10U/6.3V_8 10U/6.3V_8 0.22U/6.3V_4 180P/50V_4 VSS_65 VSS_139
N18 VSS_66 VSS_140 AG10
+1.2V AG6 A5 +1.2V P9 AH5
VDDR_1 VDDR_5 VSS_68 VSS_141
AG7 VDDR_2 VDDR_6 A6 P11 VSS_67 VSS_142 AH8
1.5A AG8 VDDR_3 VDDR_7 B5 1.5A P19 VSS_69 VSS_143 AH13
R592 *0_8/S +1.2V_VDDR_A AG9 B6 +1.2V_VDDR_B R825 *0_8/S R4 AH15
VDDR_4 VDDR_8 VSS_70 VSS_144
R7 VSS_71 VSS_145 AH17
AE11 VDDA_1 VDDR = 3A ( Up to DDR3-1333 @ 1.5V ) R10 VSS_72 VSS_146 AH19
C871 C872 C875 C876 AF11 C873 C874 C877 C878 R18 AH21
1000P/50V_4 1000P/50V_4 0.22U/6.3V_4 0.22U/6.3V_4 VDDA_2 1000P/50V_4 1000P/50V_4 0.22U/6.3V_4 0.22U/6.3V_4 VSS_73 VSS_147
T9 VSS_74 VSS_148 AH23
VSS_149 AH25
Llano APU
Llano APU
C883 C884 C887 C888 C885 C886 C889 C890
4.7U/6.3V_6 4.7U/6.3V_6 180P/50V_4 180P/50V_4 4.7U/6.3V_6 4.7U/6.3V_6 180P/50V_4 180P/50V_4

A +2.5V_VDDA
VDDA= 0.75A A
+2.5V L62
BLM21PG221SN1D(220,100M,2A)_8

C879 C880 C881


4.7U/6.3V_6 0.22U/6.3V_4 3300P/50V_4

Quanta Computer Inc.


PROJECT : R23
Size Document Number Rev
1A
Llano POWER/GND
Date: Wednesday, May 04, 2011 Sheet 5 of 40
5 4 3 2 1
5 4 3 2 1

+3VS5

R594

R596
NC,no install by default
*2.2K/J_4

*2.2K/J_4
FCH_TEST0

FCH_TEST1
remove PCIE_RST2# from AMD recommend

TP153
TP154
PCIE_RST2#
RI#
AB6
R2
U32A
PCIE_RST2#/GEVENT4#
RI#/GEVENT22#
USBCLK/14M_25M_48M_OSC G8

USB_RCOMP_SB R597 11.8K/F_6


06
W7 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP B9
R598 *2.2K/J_4 FCH_TEST2 SUSB# T3
29 SUSB# SUSC# SLP_S3#
W2 H1

MISC
29 SUSC# SLP_S5# USB_FSD1P/GPIO186 USBP15+ 26

USB
DNBSWON# J4 H3 BLUETOOTH
29 DNBSWON# FCH_PWRGD PW R_BTN# USB_FSD1N USBP15- 26
10 FCH_PWRGD N7 PW R_GOOD HUDSON-M3 USB_FSD0P/GPIO185 H6
FCH_TEST0 T9 Part 4 of 5 H5
D FCH_TEST1 TEST0 USB_FSD0N D
T10

USB
FCH_TEST2 TEST1/TMS

1.1
ACPI / WAKE UP
V9 TEST2 USB_HSD13P H10
+3V GEVENT0# internal pull Hi 8.2K to +3V EC_A20GATE AE22 G10
29 EC_A20GATE GA20IN/GEVENT0# USB_HSD13N
GEVENT1# internal pull Hi 8.2K to +3V EC_RCIN# AG19
29 EC_RCIN# KBRST#/GEVENT1#
R602 2.2K_4 CGCLK_SMB FCH_PME# R9 K10

EVENTS
TP155 SIO_EXT_SMI# PME#/GEVENT3# USB_HSD12P
to DDR3 SMBUS GEVENT23# internal pull Hi 8.2K to +3V 29 SIO_EXT_SMI# C26 LPC_SMI#/GEVENT23# USB_HSD12N J12
R603 2.2K_4 CGDAT_SMB GEVENT5# internal pull Hi 8.2K to +3VS5 R829 *0_4/s GEVENT5# T5
29 SIO_EXT_SCI# LPC_PD#/GEVENT5#
SYS_RST# U4 G12 USBP11+
SYS_RESET#/GEVENT19# USB_HSD11P TP156
R604 *1K/J_4 PCIE_WAKE# no need to pull PCIE_WAKE# K1 F12 USBP11-
27,30 PCIE_WAKE# W AKE#/GEVENT8# USB_HSD11N TP157
C1075 *100P/50V_4 V7
J2 1 SYS_RST#
Hi resistor from check list FCH_THERMTRIP# R10 IR_RX1/GEVENT20#
2 4 FCH_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P K12 USBP10+ 30
SYS_RST# internal +3V R607 10K/F_4 WD_PWRGD AF19 K13 WLAN Min-Card
PV change to short-pad W D_PW RGD USB_HSD10N USBP10- 30
*SOLDERJUMPER-2 SI
10K pull up RSMRST#
29 RSMRST# U2 RSMRST# USB_HSD9P B11
USB_HSD9N D11
PCIE_CARD_CLKREQ# AG24
24 PCIE_CARD_CLKREQ# CLK_REQ4#/SATA_IS0#/GPIO64
CLK_REQ2# internal pull Hi 8.2K to +3V PCIE_LAN_CLKREQ# AE24 E10
27 PCIE_LAN_CLKREQ# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P
R868 *0/J_4 LAN_DISABLE#_FCH AE26 F10
27,29 LAN_DISABLE# SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N
CLK_REQ3# internal pull Hi 8.2K to +3V AF22 CLK_REQ0#/SATA_IS3#/GPIO60
+3VS5 AH17 C10 USBP7+
SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P USBP7- TP158
CLK_REQ4# internal pull Hi 8.2K to +3V AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD7N A10 TP159
R856 10K/F_4 SCL3 R612 *0_4/s FCH_GPIO66 AF24
25 ACZ_SPKR SPKR/GPIO66
CGCLK_SMB AD26 H9
12,13 CGCLK_SMB SCL0/GPIO43 USB_HSD6P USBP6+ 26
R857 10K/F_4 SDA3 CGDAT_SMB AD25 G9 USB Connector

USB
12,13 CGDAT_SMB SDA0/GPIO47 USB_HSD6N USBP6- 26
SCL1

2.0
T7 SCL1/GPIO227
R611 10K/F_4 SCL2 SDA1 R7 A8
SDA1/GPIO228 USB_HSD5P USBP5+ 26
30 PCIE_MINI_CLKREQ#
PCIE_MINI_CLKREQ# AG25
CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N C8 USBP5- 26 USB Connector
R613 10K/F_4 SDA2 CLKREQ1# AG22

GPIO
LLB# CLK_REQ1#/FANOUT4/GPIO61
LLB# Not Implemented ,left unconnected. J2 IR_LED#/LLB#/GPIO184 USB_HSD4P F8
R614 10K/F_4 SCL1 This pin is used to SMARTVOLT2 AG26 E8
C TP160 VGA_PD SMARTVOLT2/SHUTDOW N#/GPIO51 USB_HSD4N C
power down VGA DAC R619 0_4 V8
9 VGA_POWER_DOWN DDR3_RST#/GEVENT7#/VGA_PD
R616 10K/F_4 SDA1 GBE_LED0 W8 C6
regulators when CRT TP161 GBE_LED0/GPIO183 USB_HSD3P
24 CARD_EECS Y6 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N A6
R618 *4.7K/J_4 FCH_THERMTRIP# no connected R904 0_4 V10 GBE_LED2/GEVENT10#
AA8 GBE_STAT0/GEVENT11# USB_HSD2P C5 USBP2+ 20
C1073 *0.01U/25V_4 SI TP163 AF25 CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N A5 USBP2- 20 Carama USB
C1 USBP1+
MV USB_HSD1P TP164
M7 C3 USBP1-
TP165 BLINK/USB_OC7#/GEVENT18# USB_HSD1N TP166
R629 10K/F_4 DNBSWON# R8
ODD_PLUGIN# USB_OC6#/IR_TX1/GEVENT6#
23 ODD_PLUGIN# T1 USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P E1 USBP0+ 26
GEVENT16# internal pull Hi 8.2K to +3VS5 ODD_DA#_FCH P6 E3 USB Connector
23 ODD_DA#_FCH USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N USBP0- 26
F5 USB_OC3#/AC_PRES/TDO/GEVENT15#
GEVENT15# internal pull Hi 8.2K to +3VS5 FCH_JTAG_TCK P5 C16 USBSS_CALRP
TP168 TP151

USB
FCH_JTAG_TDI USB_OC2#/TCK/GEVENT14# USBSS_CALRP USBSS_CALRN

OC
For Zero ODD TP169 FCH_JTAG_RST#
J7
T8
USB_OC1#/TDI/GEVENT13# USBSS_CALRN A16 TP152
TP170 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
USB_SS_TX3P A14
USB_SS_TX3N C14 USB 3.0 Not Implemented: left unconnected.
R630 *10K/F_4 ACZ_BCLK_R AB3 C12
ACZ_SDOUT_R AZ_BITCLK USB_SS_RX3P
AB1 AZ_SDOUT USB_SS_RX3N A12
HD audio R631 *10K/F_4 ACZ_SDIN0 AA2
R632 *10K/F_4 ACZ_SDIN1 AZ_SDIN0/GPIO167
interface is Y5 AZ_SDIN1/GPIO168 USB_SS_TX2P D15
R633 *10K/F_4 ACZ_SDIN2_R Y3 B15
+3V_S5 voltage R634 *10K/F_4 ACZ_SDIN3_R AZ_SDIN2/GPIO169 USB_SS_TX2N
Y1 AZ_SDIN3/GPIO170
ACZ_SYNC_R AD6 E14
ACZ_RST#_R AZ_SYNC USB_SS_RX2P
AE4 AZ_RST# USB_SS_RX2N F14

USB
F15
To Azalia

AUDIO

3.0
USB_SS_TX1P
TP171 K19 PS2_DAT/SDA4/GPIO187 USB_SS_TX1N G15

HD
B J19 B
TP172 PS2_CLK/CEC/SCL4/GPIO188
ACZ_SDOUT_R R635 33/J_4 J21 H13
ACZ_SDOUT_AUDIO 25 SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P
USB_SS_RX1N G13
ACZ_SYNC_R R636 33/J_4
ACZ_SYNC_AUDIO 25
D21 PS2KB_DAT/GPIO189 USB_SS_TX0P J16
ACZ_BCLK_R R637 33/J_4 C20 H16
BIT_CLK_AUDIO 25 PS2KB_CLK/GPIO190 USB_SS_TX0N
D23 PS2M_DAT/GPIO191
ACZ_RST#_R R638 33/J_4 C22 J15
ACZ_RST#_AUDIO 25 PS2M_CLK/GPIO192 USB_SS_RX0P
USB_SS_RX0N K15
ACZ_SDIN0 ACZ_SDIN0 25
F21 KSO_0/GPIO209 SCL3 of a TSI-capable APU's
E20 H19 SCL2
KSO_1/GPIO210 SCL2/GPIO193 SDA2
thermal bus,Pulled up to
F20 KSO_2/GPIO211 SDA2/GPIO194 G19
A22 G22 SCL3 APU_VDDIO. Resistor value
KSO_3/GPIO212 SCL3_LV/GPIO195
E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21 SDA3 verified in the relevant APU
CLK_REQ# already A20 KSO_5/GPIO214 EC_PW M0/EC_TIMER0/GPIO197 E22 design guide.
Pure UMA can remove internal pull up 8.2K J18 KSO_6/GPIO215 EC_PW M1/EC_TIMER1/GPIO198 H22
H18 J22 EC_PWM2
KSO_7/GPIO216 EC_PW M2/EC_TIMER2/W OL_EN/GPIO199 EC_PWM2 10
1 2 CLKREQ1# G18 H21
37 VGA_REQ KSO_8/GPIO217 EC_PW M3/EC_TIMER3/GPIO200
B21 No need for GPIO200
D26 RB501V-40 KSO_9/GPIO218
K18 KSO_10/GPIO219 KSI_0/GPIO201 K21
D19 EMBEDDED K22
KSO_11/GPIO220 CTRL KSI_1/GPIO202
A18 KSO_12/GPIO221 KSI_2/GPIO203 F22
C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
B19 KSO_14/XDB0/GPIO223 KSI_4/GPIO205 E24
B17 KSO_15/XDB1/GPIO224 KSI_5/GPIO206 B23
A24 KSO_16/XDB2/GPIO225 KSI_6/GPIO207 C24
D17 KSO_17/XDB3/GPIO226 KSI_7/GPIO208 F18

A A

Hudson-M2-A13

Quanta Computer Inc.


PROJECT : R23
Size Document Number Rev
Hudson-M3 GPIO/USB/AZ/RGMII 1A

Date: Wednesday, May 04, 2011 Sheet 6 of 40


5 4 3 2 1
5 4 3 2 1

07
C1058 150P/50V_4
24 CARD_PCIE_RST# R870 33/J_4
30 MINI_PCIE_RST# R641 33/J_4

C892 150P/50V_4 U32E

C893 150P/50V_4
11,27 LAN_PCIE_RST# R871 33/J_4 PCIE_RST# AE2 PCIE_RST#
HUDSON-M3 PCICLK0 AF3
14 GPU_RST# R642 33/J_4 A_RST# AD5 Part 1 of 5 AF1 PCI_CLK1 PCI_CLK1 10
C1059 150P/50V_4 A_RST# PCICLK1/GPO36
PCICLK2/GPO37 AF5
2 UMI_RXP0 C894 0.1U/10V_4 UMI_RXP0_C AE30 AG2 PCI_CLK3 PCI_CLK3 10
C895 0.1U/10V_4 UMI_RXN0_C UMI_TX0P PCICLK3/GPO38 PCI_CLK4
2 UMI_RXN0 AE32 UMI_TX0N PCICLK4/14M_OSC/GPO39 AF6 PCI_CLK4 10
C896 0.1U/10V_4 UMI_RXP1_C AD33
2 UMI_RXP1

CLKS
C897 0.1U/10V_4 UMI_RXN1_C UMI_TX1P PCIRST#_L R643 33/J_4 KBC_RST# C898 *150P/50V_4
Place these PICE AC AD31 AB5

PCI
D
2 UMI_RXN1 UMI_TX1N PCIRST# D
C899 0.1U/10V_4 UMI_RXP2_C AD28
coupling cap close to FCH 2 UMI_RXP2 UMI_TX2P
2 UMI_RXN2 C900 0.1U/10V_4 UMI_RXN2_C AD29
C901 0.1U/10V_4 UMI_RXP3_C UMI_TX2N
2 UMI_RXP3 AC30 UMI_TX3P AD0/GPIO0 AJ3 KBC_RST# 29
C902 0.1U/10V_4 UMI_RXN3_C AC32 AL5
2 UMI_RXN3 UMI_TX3N AD1/GPIO1
AD2/GPIO2 AG4
2 UMI_TXP0 AB33 UMI_RX0P AD3/GPIO3 AL6
2 UMI_TXN0 AB31 UMI_RX0N AD4/GPIO4 AH3
2 UMI_TXP1 AB28 UMI_RX1P AD5/GPIO5 AJ5
2 UMI_TXN1 AB29 UMI_RX1N AD6/GPIO6 AL1
2 UMI_TXP2 Y33 UMI_RX2P AD7/GPIO7 AN5
2 UMI_TXN2 Y31 UMI_RX2N AD8/GPIO8 AN6
2 UMI_TXP3 Y28 UMI_RX3P AD9/GPIO9 AJ1
2 UMI_TXN3 Y29 UMI_RX3N AD10/GPIO10 AL8

PCI EXPRESS
INTERFACES
AD11/GPIO11 AL3
R646 590/F_4 PCIE_CALRP_FCH AF29 AM7
R647 2K/F_4 PCIE_CALRN_FCH PCIE_CALRP AD12/GPIO12
+1.1V_PCIE_VDDR AF31 PCIE_CALRN AD13/GPIO13 AJ6
AD14/GPIO14 AK7
V33 GPP_TX0P AD15/GPIO15 AN8
V31 GPP_TX0N AD16/GPIO16 AG9
W 30 GPP_TX1P AD17/GPIO17 AM11
W 32 GPP_TX1N AD18/GPIO18 AJ10
AB26 GPP_TX2P AD19/GPIO19 AL12
AB27 GPP_TX2N AD20/GPIO20 AK11
AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 GPP_TX3N AD22/GPIO22 AG12
AE12 PCI_AD23 PCI_AD23 10
AD23/GPIO23 PCI_AD24
AA27 GPP_RX0P AD24/GPIO24 AC12 PCI_AD24 10
AA26 AE13 PCI_AD25
GPP_RX0N AD25/GPIO25 PCI_AD25 10
W 27 AF13 PCI_AD26 PCI_AD26 10
GPP_RX1P AD26/GPIO26 PCI_AD27
V27 GPP_RX1N AD27/GPIO27 AH13 PCI_AD27 10
C C

INTERFACE
V26 GPP_RX2P AD28/GPIO28 AH14
W 26 AD15 HUDSON_MEMHOT#_R
GPP_RX2N AD29/GPIO29 TP173
W 24 GPP_RX3P AD30/GPIO30 AC15
W 23 AE16

PCI
GPP_RX3N AD31/GPIO31 D15
CBE0# AN3
AJ8 RB500V-40
CBE1# +3V_RTC
CBE2# AN10 1 2 +3VPCU
R653 2K/F_4 CLK_CALRN_FCH F27 AD12
+1.1V_CKVDD CLK_CALRN CBE3# 20MIL 20MIL
FRAME# AG10
AK9 20MIL R654 499/F_4 +3VRTC_1 R655 10_4 +3VRTC 1 2
DEVSEL#
G30 PCIE_RCLKP IRDY# AL10
G28 AF10 D16

+VCCRTC_2
PCIE_RCLKN TRDY# RB500V-40
PAR AE10
RP5 2 1 0X2 CLK_DP_FCH_P R26 AH1 C909
4 CLK_DP_P DISP_CLKP STOP#
4 3 CLK_DP_FCH_N T26 AM9
4 CLK_DP_N DISP_CLKN PERR#
SERR# AH8 PCI_SERR# 29 1U/6.3V_4 20MIL
RP6 2 1 0X2 CLK_ANX_FCH_P H33 AG15
11 CLK_ANX_P DISP2_CLKP REQ0#
11 CLK_ANX_N 4 3 CLK_ANX_FCH_N H31 AG13 C1076 100P/50V_4
DISP2_CLKN REQ1#/GPIO40 R656
REQ2#/CLK_REQ8#/GPIO41 AF15
RP7 4 3 0X2 CLK_APU_FCH_P T24 AM17
4 CLK_APU_P
CLK_APU_FCH_N APU_CLKP REQ3#/CLK_REQ5#/GPIO42 SI TP174
1K/F_4
4 CLK_APU_N 2 1 T23 AD16
APU_CLKN GNT0# FCH_GPIO44 R884 *0_4
GNT1#/GPO44 AD13 SPI_WP 8,29
RP8 4 3 0X2 CLK_VGA_FCH_P J30 AD21 VGA_ON_SB

+BAT
14 CLK_VGA_P SLT_GFX_CLKP GNT2#/SD_LED/GPO45 VGA_ON_SB 29
2 1 CLK_VGA_FCH_N
14 CLK_VGA_N K29 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AK17
AD19 CLKRUN#
TP175
CLKRUN# 29
20MIL
RP9 CLK_WLAN_FCH_P CLKRUN#
30 CLK_WLAN_P 4 3 0X2 H27 GPP_CLK0P LOCK# AH9 TP176
30 CLK_WLAN_N 2 1 CLK_WLAN_FCH_N H28 CN24
GPP_CLK0N
INTE#/GPIO32 AF18 VGA_PWROK 17,29,36,37
RP11 4 3 0X2 CLK_PCIE_CARDP_FCH J27 AE18 TRAVIS_EN#
24 CLK_PCIE_CARD_P GPP_CLK1P INTF#/GPIO33 TP177 1
24 CLK_PCIE_CARD_N 2 1 CLK_PCIE_CARDN_FCH K26 AC16 PCIE_RST#_ANX
B GPP_CLK1N INTG#/GPIO34 TP178 2 B
AD18 VGA_RSTB VGA_RSTB 14
INTH#/GPIO35
F33 GPP_CLK2P
F31 LPC_CLK0 LPC_CLK0 10 88266-020L
GPP_CLK2N LPC_CLK1 LPC_CLK1 10 CLK_33_DEBUG 30
Note: CLK_FCH_SRCP/N is 100MHZ SSC E33 GPP_CLK3P
E31 B25 R660 22/J_4 C910 5.6P/16V_4
GPP_CLK3N LPCCLK0 R661 22/J_4 C911 5.6P/16V_4
Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC LPCCLK1 D25
M23 D27 LAD0
GPP_CLK4P LAD0 LAD0 29,30
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC M24 C28 LAD1
GPP_CLK4N LAD1 LAD1 29,30 CLK_33M_KBC 29
LPC
GENERATOR

A26 LAD2 LAD2 29,30


Note: CLK_APU_HCLKP/N is 100MHZ SSC M27
LAD2
A29 LAD3
GPP_CLK5P LAD3 LAD3 29,30
Note: CLK_PCIE_VGAP/N is 100MHZ SSC M26 A31 LFRAME# 32K_X1 C912 18P/50V_4
CLOCK

GPP_CLK5N LFRAME# LFRAME# 29,30


Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable B27 LDRQ#0
LDRQ0# TP180

1
2
N25 AE27 LDRQ#1
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 TP181
N26 AE19 SERIRQ FCH PROCHOT#--- (input 0.8V threshold )
GPP_CLK6N SERIRQ/GPIO48 SERIRQ 29
R662 Y4
When it isasserted, it can generate SCI or 20M/J_4 32.768KHZ
R23 GPP_CLK7P
R24 SMI to OS/BIOS

4
3
GPP_CLK7N DMAACTIVE_L PV change to short-pad 32K_X2 C913 18P/50V_4
DMA_ACTIVE# G25 DMAACTIVE_L 4
27 CLK_PCIE_LANP RP10 4 3 0X2 CLK_PCIE_LANP_FCH N27 E28 FCH_PROCHOT# FCH_PROCHOT# 4
CLK_PCIE_LANN_FCH GPP_CLK8P PROCHOT# APU_PWRGD_R R664 *0_4/s USE GROUND GUARD FOR 32K_X1 AND 32K_X2
2 1 R27 E26
APU

27 CLK_PCIE_LANN GPP_CLK8N APU_PG APU_PWRGD 2,4


G26 APU_STOP#
LDT_STP# TP183
F26 APU_RST# APU_RST# 2,4 LDT_STP# let is NC from schematic recommend
APU_RST#
J26 14M_25M_48M_OSC
TP184 G2 32K_X1
32K_X1
SI
C914 27P/50V_4 25M_X1 C31 G4 32K_X2
25M_X1 32K_X2
S5_CORE_EN is necessary to connect enable
H7 S5_CORE_EN pin of +3VPCU/+5VPCU regulator for S5+
A S5_CORE_EN CLK_RTC TP185 A
Y5 R666 F1 CLK_RTC 10,29
25M_X2 RTCCLK INTRUDER_ALERT# mode implementation
25MHZ C33 25M_X2 INTRUDER_ALERT# F3 TP186
1M/F_4 E6 +3V_RTC
PLUS

VDDBT_RTC_G +3V_RTC
TP187
20MIL
S5

C915 27P/50V_4
Hudson-M2-A13
1

G2
*SHORT_ PAD1 C916 INTRUDER_ALERT# Left not connected Quanta Computer Inc.
0.1U/10V_4
(FCH has 50-kohm internal pull-up to
PROJECT : R23
2

VBAT).
Size Document Number Rev
Hudson-M3 ACPI/PCI/CLOCK 1A

Date: Wednesday, May 04, 2011 Sheet 7 of 40


5 4 3 2 1
5 4 3 2 1

U32D

A3
A33
B7
B13
VSS_1
VSS_2
VSS_3
VSS_4
HUDSON-M3
Part 5 of 5 VSS_65
VSS_66
VSS_67
VSS_68
T25
T27
U6
U14
23
23
PLACE SATA AC COUPLING
CAPS CLOSE TO HUDSON-M2/M3

SATA_TXP0
SATA_TXN0
SATA_TXP0
SATA_TXN0
AK19
AM19
U32B

SATA_TX0P
SATA_TX0N
HUDSON-M3 Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
AL14
AN14
08
D9 U17 AJ12
D13
VSS_5 VSS_69
U20
SATA HDD AL20
SD_CD#/GPIO75
AH12
VSS_6 VSS_70 23 SATA_RXN0 SATA_RX0N SD_W P/GPIO76
E5 VSS_7 VSS_71 U21 23 SATA_RXP0 AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13
E12 VSS_8 VSS_72 U30 SD_DATA1/SDATO_2/GPIO78 AM13
E16 U32 SATA_TXP1 AN22 AH15 Vender Size P/N
VSS_9 VSS_73 23 SATA_TXP1 SATA_TX1P SD_DATA2/GPIO79
E29 V11 SATA_TXN1 AL22 AJ14

CARD
VSS_10 VSS_74 23 SATA_TXN1 SATA_TX1N SD_DATA3/GPIO80
F7 V16
SATA ODD AMIC 2M AKE38ZN0801

SD
D VSS_11 VSS_75 GBE_COL R668 10K/F_4 D
F9 VSS_12 VSS_76 V18 23 SATA_RXN1 AH20 SATA_RX1N GBE_COL AC4
GBE_CRS R670 10K/F_4 WINBOND AKE38FP0N01
F11
F13
VSS_13 VSS_77 W4
W6
23 SATA_RXP1 AJ20 SATA_RX1P GBE_CRS AD3
AD9
2M
VSS_14 VSS_78 GBE_MDCK GBE_MDIO R672 10K/F_4
F16 VSS_15 VSS_79 W 25 AJ22 SATA_TX2P GBE_MDIO W 10 +3VS5 Socket DFHS08FS023
F17 VSS_16 VSS_80 W 28 AH22 SATA_TX2N GBE_RXCLK AB8
F19 VSS_17 VSS_81 Y14 GBE_RXD3 AH7
F23 VSS_18 VSS_82 Y16 AM23 SATA_RX2N GBE_RXD2 AF7
F25 Y18 +3V AK23 AE7 follow AMD check list to pull UP / LOW SPI_CLK
VSS_19 VSS_83 SATA_RX2P GBE_RXD1
F29 VSS_20 VSS_84 AA6 GBE_RXD0 AD7
G6 VSS_21 VSS_85 AA12 AH24 SATA_TX3P GBE_RXCTL/RXDV AG8
G16 AA13 AJ24 AD1 GBE_RXERR R674 10K/F_4 C1064

GBE
VSS_22 VSS_86 SATA_TX3N GBE_RXERR

LAN
G32 AA14 AB7 *22P/50V_4
H12
VSS_23
VSS_24
VSS_87
VSS_88 AA16 C921 AN24 SATA_RX3N
GBE_TXCLK
GBE_TXD3 AF9 +3V FCH SPI ROM
H15 VSS_25 VSS_89 AA17 0.1U/10V_4 AL24 SATA_RX3P GBE_TXD2 AG6 EMI
H29 AA25 U36 AE8 +3V
VSS_26 VSS_90 GBE_TXD1

5
J6 AA28 TC7SH08FU AL26 AD8 SI
VSS_27 VSS_91 SATA_TX4P GBE_TXD0
GROUND

J9 AA30 2 SB_SATA_LED# AN26 AB9


VSS_28 VSS_92 SATA_TX4N GBE_TXCTL/TXEN R876 C1063 *0.1U/10V_4
J10 VSS_29 VSS_93 AA32 28 SATA_LED# 4 GBE_PHY_PD AC2
J13 AB25 1 AJ26 AA7 *10K/F_4
VSS_30 VSS_94 SATA_RX4N GBE_PHY_RST# GBE_PHY_INTR R675 10K/F_4
J28 VSS_31 VSS_95 AC6 AH26 SATA_RX4P GBE_PHY_INTR W9 +3VS5

SERIAL
J32 AC18

3
VSS_32 VSS_96 U44
K7 AC28 AN29

ATA
VSS_33 VSS_97 SATA_TX5P FCH_SPI_SI FCH_SPI_CS0# R878 *0_4 SPI_CS0# R877
K16 VSS_34 VSS_98 AD27 AL28 SATA_TX5N SPI_DI/GPIO164 V6 TP188 1 CE# VDD 8
K27 AE6 V5 FCH_SPI_SO FCH_SPI_CLK R879 *0_4 SPI_CLK 6 *10K/F_4
VSS_35 VSS_99 SPI_DO/GPIO163 TP189 SCK
K28 AE15 AK27 V3 FCH_SPI_CLK FCH_SPI_SO R880 *0_4 SPI_SO 5
VSS_36 VSS_100 SATA_RX5N SPI_CLK/GPIO162 TP190 SI
L6 AE21 AM27 T6 FCH_SPI_CS0# FCH_SPI_SI R881 *0_4 SPI_SI 2 7
VSS_37 VSS_101 SATA_RX5P SPI_CS1#/GPIO165 TP191 SO HOLD#
L12 AE28 V1 FCH_SPI_WP

ROM
VSS_38 VSS_102 ROM_RST#/SPI_W P#/GPIO161 TP192 SPI_WP

SPI
L13 VSS_39 VSS_103 AF8 AL29 NC6 7,29 SPI_WP 3 W P# VSS 4
L15 VSS_40 VSS_104 AF12 AN31 NC7
L16 AF16 L30 FCH_CRT_R R676 *0_4/S FCH_CRT_RED 22 *MX25L1605DM2I-12G
C VSS_41 VSS_105 VGA_RED C
L21 VSS_42 VSS_106 AF33 AL31 NC8
M13 AG30 AL33 L32 FCH_CRT_G R678 *0_4/S FCH_CRT_GRE 22
VSS_43 VSS_107 NC9 VGA_GREEN
M16 VSS_44 VSS_108 AG32
M21 AH5 AH33 M29 FCH_CRT_B R680 *0_4/S FCH_CRT_BLU 22
VSS_45 VSS_109 NC10 VGA_BLUE
M25 VSS_46 VSS_110 AH11 AH31 NC11
N6 VSS_47 VSS_111 AH18 PLACE SATA_CAL RES VERY
N11 AH19 AJ33 M28 FCH_CRT_HSYNC 22
N13
VSS_48 VSS_112
AH21 CLOSE TO BALL OF AJ31
NC12 VGA_HSYNC/GPO68
N30 R place close to PCH
VSS_49 VSS_113 NC13 VGA_VSYNC/GPO69 FCH_CRT_VSYNC 22

DAC
VGA
N23 VSS_50 VSS_114 AH23 HUDSON-M2/M3
N24 AH25 M33 FCH_CRT_R R677 150/F_4
VSS_51 VSS_115 VGA_DDC_SDA/GPO70 FCH_DDCDAT 22
P12 VSS_52 VSS_116 AH27 VGA_DDC_SCL/GPO71 N32 FCH_DDCCLK 22
P18 AJ18 R682 1K/F_4 SATA_CALRP AF28 FCH_CRT_G R679 150/F_4
VSS_53 VSS_117 R683 1K/F_4 SATA_CALRN SATA_CALRP VGA_DAC_REST R684 715/F_4
P20 VSS_54 VSS_118 AJ28 +1.1V_AVDD_SATA AF27 SATA_CALRN VGA_DAC_RSET K31
P21 AJ29 FCH_CRT_B R681 150/F_4
VSS_55 VSS_119
P31 VSS_56 VSS_120 AK21 AUX_VGA_CH_P V28 APU_DP_AUXP 4
P33 AK25 +3V R685 10K/F_4 SB_SATA_LED# AD22 V29 APU_DP_AUXN 4
VSS_57 VSS_121 SATA_ACT#/GPIO67 AUX_VGA_CH_N
R4 VSS_58 VSS_122 AL18
R11 AM21 U28 AUXCAL R686 100/F_4 +FCH_VDDAN_11_MLDAC
VSS_59 VSS_123 AUXCAL
R25 VSS_60 VSS_124 AM25 AF21 SATA_X1
R28 VSS_61 VSS_125 AN1 ML_VGA_L0P T31 APU_DP_TXP0 4
T11 VSS_62 VSS_126 AN18 Integrated Clock Mode: ML_VGA_L0N T33 APU_DP_TXN0 4
T16 VSS_63 VSS_127 AN28 Leave unconnected. ML_VGA_L1P T29 APU_DP_TXP1 4
T18 VSS_64 VSS_128 AN33 ML_VGA_L1N T28 APU_DP_TXN1 4
ML_VGA_L2P R32 APU_DP_TXP2 4
N8 VSSAN_HW M VSSPL_DAC T21 AG21 SATA_X2 ML_VGA_L2N R30 APU_DP_TXN2 4
VSSAN_DAC L28 ML_VGA_L3P P29 APU_DP_TXP3 4 PV change to +FCH_VDDAN_33_DAC_R for AMD suggestion
K25 K33 P28

MAINLINK
VSSXL VSSANQ_DAC ML_VGA_L3N APU_DP_TXN3 4
VSSIO_DAC N28
H25 GPIO52 internal pull Hi 8.2K to +3V C29 VGA_HPD R687 *10K/F_4
VSSPL_SYS ML_VGA_HPD/GPIO229 +FCH_VDDAN_33_DAC_R

VGA
EFUSE R6 GPIO53 internal pull Hi 8.2K to +3V
B GPIO54 internal pull Hi 8.2K to +3V RF_OFF# AH16 N2 SIDE_PORT_ID0 B
30 RF_OFF# FANOUT0/GPIO52 VIN0/GPIO175
Hudson-M2-A13 GPIO56 internal pull Hi 8.2K to +3V BT_OFF# AM15 M3 SIDE_PORT_ID1 PV DEL R687 for AMD suggestion
26 BT_OFF# BT_COMBO_EN# FANOUT1/GPIO53 VIN1/GPIO176 SIDE_PORT_ID2
GPIO57 internal pull Hi 8.2K to +3V 30 BT_COMBO_EN# AJ16 FANOUT2/GPIO54 VIN2/SDATI_1/GPIO177 L2
GPIO58 internal pull Hi 8.2K to +3V HW N4 BOARD_ID0
ODD_PWR MONITOR VIN3/SDATO_1/GPIO178 BOARD_ID1
23 ODD_PWR AK15 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 P1
BT_COMBO_OFF# AN16 P3 BOARD_ID2
30 BT_COMBO_OFF# FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 +1.5V
LCD_BK AL16 M1 BOARD_ID3
20 LCD_BK FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 BOARD_ID4
ID4 ID3 ID2 ID1 ID0 CONFIG 31- Level BOM Item M5
TEMPIN0
TEMPIN1
K6 TEMPIN0/GPIO171
VIN7/GBE_LED3/GPIO182 VGA Hot-plug
K5 TEMPIN1/GPIO172 NC1 AG16
0 0 0 0 0 UMA 1 TEMPIN2 K3 AH10 VIN ( 0 - 7 ) R692
TEMPIN3 TEMPIN2/GPIO173 NC2
M6 TEMPIN3/TALERT#/GPIO174 NC3 A28 Voltage Monitor Not Implemented
G27 10-Kȍ 5% pull-up to +3VS5 10K/F_4 +5V
NC4
0 0 0 1 0 2 NC5 L4 or 10-Kȍ 5% pull-down
FCH_VGA_HPD
4 FCH_VGA_HPD
0 0 1 0 0 3 Hudson-M2-A13 R697

3
R693 R694 R695 R696 100K/F_4
10K/F_4 10K/F_4 10K/F_4 10K/F_4 TEMP( 0 - 3 )
0 0 1 1 0 4 Temp Monitor Not Implemented +3VS5 R836 10K/F_4 BOARD_ID0 R837 *10K/F_4
10-Kȍ 5% pull-up to +3VS5 Q53 2
or 10-Kȍ 5% pull-down DMN601K-7

3
0 1 0 1 0 5 R838 *10K/F_4 BOARD_ID1 R839 10K/F_4 Q54
DMN601K-7

1
0 1 1 1 0 6 R840 *10K/F_4 BOARD_ID2 R841 10K/F_4 2 VGA_HPD

SIDE_PORT_ID2 SIDE_PORT_ID1 SIDE_PORT_ID0


1 0 0 1 0 7 R842 *10K/F_4 BOARD_ID3 R843 10K/F_4
R700

1
A 0 0 0 Samsung A
*100K/F_4
1 0 1 1 0 8 R844 *10K/F_4 BOARD_ID4 R845 10K/F_4

0 0 0 0 1 SG / Muxless 9 0 0 1 Hynix
R846 10K/F_4 SIDE_PORT_ID0 R688 *10K/F_4

0 0 1 0 1 10 Quanta Computer Inc.


0 1 0 NC R847 *10K/F_4 SIDE_PORT_ID1 R689 10K/F_4

1 0 0 1 1 11 PROJECT : R23
R848 *10K/F_4 SIDE_PORT_ID2 R690 10K/F_4 Size Document Number Rev
0 1 1 no supprot side port Hudson-M3 SATA/HWM/SPI 1A
1 0 1 1 1 12
Date: Wednesday, May 04, 2011 Sheet 8 of 40
5 4 3 2 1
5 4 3 2 1

+3V
+3.3V_VDDIO

VDDQ--3.3V I/O power 102mA


PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U32C 1007mA for M3
902mA for M2
+1.1V_VDDCR
09
VDDCR-- S/B CORE power
AB17 HUDSON-M3
VDDIO_33_PCIGP_1
Part 3 of 5
VDDCR_11_1 T14 TRACE WIDTH >=100mil +1.1V
C927 C928 C929 C930 C931 AB18 T17
0.1U/10V_4 22U/6.3VS_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDIO_33_PCIGP_2 VDDCR_11_2
AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20
AD10 U16 C932 C933 C934 C935 C936
VDDIO_33_PCIGP_4 VDDCR_11_4

PCI/GPIO I/O
AG7 U18 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_8
VDDIO_33_PCIGP_5 VDDCR_11_5

CORE
M2 chipset need to connect to GND AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14
D L63 TRACE WIDTH >=15mil AB12 V17 D

S0
+3V VDDIO_33_PCIGP_7 VDDCR_11_7
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20
PBY160808T-221Y-N(220,2A) +FCH_VDDAN_33_DAC_R AB14 Y17 +1.1V_CKVDD
C940 C941 +VDDPL_3.3V VDDIO_33_PCIGP_9 VDDCR_11_9
AB16 VDDIO_33_PCIGP_10
2.2U/6.3V_4 *0.1U/10V_4 +FCH_VDDPL_33_MLDAC VDDAN_11_CLK-- Internal clock
47mA 340mA
H24 VDDPL_33_SYS VDDAN_11_CLK_1 H26 Generator I/O power
+VDDPL_33_SYS 20mA V22 J25 TRACE WIDTH >=30mil L64 +1.1V
VDDPL_33_DAC VDDAN_11_CLK_2
+VDDPL_33_DAC 20mA U22 VDDPL_33_ML VDDAN_11_CLK_3 K24 BLM18PG181SN1D(180,1.5A)_6
+3V L65 TRACE WIDTH >=15mil 30mA T22 VDDAN_33_DAC VDDAN_11_CLK_4 L22
R707 0_4 +FCH_VDDPL_33_SSUSB_S 11mA L18 M22 C942 C943 C944 C945 C946
VDDPL_33_SSUSB_S VDDAN_11_CLK_5

CLKGEN
PBY160808T-221Y-N(220,2A) +FCH_VDDPL_33_SUSB_S 14mA D7 VDDPL_33_USB_S VDDAN_11_CLK_6 N21 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3VS_8
C948 C949 +FCH_VDDPL_33_PCIE 11mA AH29 N22
+FCH_VDDPL_33_SATA VDDPL_33_PCIE VDDAN_11_CLK_7
2.2U/6.3V_4 *0.1U/10V_4 12mA AG28 P22

I/O
VDDPL_33_SATA VDDAN_11_CLK_8 +1.1V_PCIE_VDDR VDDPL_11_SYS_S : System Clock Gen
NOTE : LDO_CAP 1088mA VDDAN_11_PCIE --PCIE/UMI analog power TRACE WIDTH >=100mil PLLs analog power
A11 stepping : C will C950 *1000P/50V_4 +LDO_CAP M31 AB24 L66 +1.1V
LDO_CAP VDDAN_11_PCIE_1 BLM18PG181SN1D(180,1.5A)_6
Y21
install 1nf cap +FCH_VDDAN_11_DAC 7mA V21
VDDAN_11_PCIE_2
AE25 +VDDPL_1.1V
+FCH_VDDAN_11_MLDAC VDDPL_11_DAC VDDAN_11_PCIE_3
A12 stepping : C will VDDAN_11_ML -- UMI 1.1V analog power AD24 C951 C952 C953 C954 C955
+FCH_VDDAN_11_ML 226mA VDDAN_11_PCIE_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 22U/6.3VS_8 L68
let it to NC

EXPRESS
Y22 VDDAN_11_ML_1 VDDAN_11_PCIE_5 AB23 +1.1V
V23 AA22 PBY160808T-221Y-N(220,2A)
VDDAN_11_ML_2 VDDAN_11_PCIE_6
V24 VDDAN_11_ML_3 VDDAN_11_PCIE_7 AF26

PCI
+1.1V_AVDD_SATA

MAIN
C957 C958 C959 C960 C961 C962

LINK
V25 VDDAN_11_ML_4 VDDAN_11_PCIE_8 AG27
0.1U/10V_4 1U/6.3V_4 4.7U/6.3V_6 0.1U/10V_4 2.2U/6.3V_4 0.1U/10V_4
1337mA VDDAN_11_SATA--SATA PHY analog/IO power TRACE WIDTH >=50mil
AB10 AA21 L69 +1.1V
VDDIO_33_GBE_S VDDAN_11_SATA_1 BLM18PG181SN1D(180,1.5A)_6
VDDAN_11_SATA_4 Y20

GBE
AB21

LAN
VDDAN_11_SATA_2 C963 C964 C965 C966 C967
VDDPL_33_USB_S : USB PHY PLL analog power VDDAN_11_SATA_3 AB22 if support USB
AB11 AC22 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3VS_8
C +3V_AVDD_USB +FCH_VDDPL_33_SUSB_S VDDCR_11_GBE_S_1 VDDAN_11_SATA_5 3.0 wake up C
AA11 AC21 VDDAN_33_HWM_S -- Hardware

SERIAL
VDDCR_11_GBE_S_2 VDDAN_11_SATA_6 should be
VDDAN_11_SATA_7 AA20 monitor interface I/O power

ATA
L70
VDDAN_11_SATA_8 AA18 change pull hi
PBY160808T-221Y-N(220,2A) AA9 AB20 +VDDAN_3.3V_HWM
VDDIO_GBE_S_1 VDDAN_11_SATA_9 to S5 power
AA10 VDDIO_GBE_S_2 VDDAN_11_SATA_10 AC19
C969 C970 +3VS5 L72
2.2U/6.3V_4 1U/6.3V_4 PBY160808T-221Y-N(220,2A)

C973 C974
+VDDIO_3.3V 2.2U/6.3V_4 0.1U/10V_4
59mA VDDIO_33_S-- 3.3v S5 I/O power
G7 N18 TRACE WIDTH >=20mil +3VS5 if support USB
+3V_AVDD_USB VDDAN_33_USB_S_1 VDDIO_33_S_1
VDDAN_33_USB_S : USB PHY I/O analog power H8 VDDAN_33_USB_S_2 VDDIO_33_S_2 L19 3.0 wake up
TRACE WIDTH >=50mil 470mA J8 M18
L73 PBY160808T-221Y-N(220,2A) VDDAN_33_USB_S_3 VDDIO_33_S_3 C975 C977 C978 C979 C980 C981 should be
+3VS5 K8 VDDAN_33_USB_S_4 VDDIO_33_S_4 V12

3.3V_S5 I/O
K9 VDDAN_33_USB_S_5 VDDIO_33_S_5 V13 *0.1U/10V_4 2.2U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 change pull hi
M9 VDDAN_33_USB_S_6 VDDIO_33_S_6 Y12 to S5 power
C982 C984 C985 C986 C987 M10 Y13
0.1U/10V_4 10U/6.3V_8 10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 VDDAN_33_USB_S_7 VDDIO_33_S_7
N9 VDDAN_33_USB_S_8 VDDIO_33_S_8 W 11
N10

USB
VDDAN_33_USB_S_9
M12 VDDAN_33_USB_S_10 5mA VDDXL_33_S-- 25MHZ XTAL IO power
VDDAN_11_USB_S : USB PHY PLL analog power N12 G24 +VDDXL_3.3V L74 +3V
L75 +FCH_VDDAN_11_USB_S VDDAN_33_USB_S_11 VDDXL_33_S PBY160808T-221Y-N(220,2A)
+1.1VS5 140mA M11 VDDAN_33_USB_S_12
VDDCR_1.1_S-- 1.1V S5 Core power
C988 2.2U/6.3V_4 187mA
PBY160808T-221Y-N(220,2A) TRACE WIDTH >=20mil U12 N20 +VDDCR_1.1V +1.1VS5 C989 C990
C992 0.1U/10V_4 VDDAN_11_USB_S_1 VDDCR_11_S_1 TRACE WIDTH >=15mil *0.1U/10V_4 2.2U/6.3V_4
U13 VDDAN_11_USB_S_2 VDDCR_11_S_2 M20
VDDCR_11_USB_S : USB PHY core power 42mA 70mA
+1.1VS5 L76 +FCH_VDDCR_11_USB_S T12 J24 +VDDPL_1.1V C994 C995
TRACE WIDTH >=15mil VDDCR_11_USB_S_1 VDDPL_11_SYS_S 1U/6.3V_4 2.2U/6.3V_4
T13 VDDCR_11_USB_S_2
PBY160808T-221Y-N(220,2A)
B C996 C997 C998 M8 12mA +VDDAN_3.3V_HWM
B
0.1U/10V_4 *0.1U/10V_4 10U/6.3V_8 VDDAN_33_HW M_S
P16 VDDAN_11_SSUSB_S_1
next stage should be +3V
M14
N14
VDDAN_11_SSUSB_S_2
AA4 26mA This circuit is
VDDAN_11_SSUSB_S_3 VDDIO_AZ_S Trace +VDDIO_AZ change to +1.2VS5 from

3
+FCH_VDDAN_11_SSUSB_S_R
282mA P13 VDDAN_11_SSUSB_S_4
width >=20 mil
AMD Errta 1.2 for switch DAC and 32 mA Max
P14 VDDAN_11_SSUSB_S_5
VDDAN_11_SSUSB_S : USB3.0 PHY PLL analog power UMI analog power +FCH_VDDAN_33_DAC_R
N16 VDDCR_11_SSUSB_S_1 USB 2
SS
424mA N17 Q62
+FCH_VDDCR_11_SSUSB_S VDDCR_11_SSUSB_S_2 +12VALW AO3404
P17 VDDCR_11_SSUSB_S_3
M17 VDDCR_11_SSUSB_S_4
VDDCR_11_SSUSB_S : USB3.0 PHY core power C999 C1000

1
2
2.2U/6.3V_4 0.1U/10V_4
R716 +FCH_VDDAN_33_DAC L79
M2 chipset can let it to GND 330K_6 PBY160808T-221Y-N(220,2A)
POWER

1
+FCH_VGA_PWR_EN +1.1V
VGA will power down +FCH_VDDAN_33_DAC_R +FCH_VDDPL_33_MLDAC

3
Hudson-M2-A13 Q63
when CRT no insert 2N7002E

3
R718 *0_8/S
6 VGA_POWER_DOWN VGA_POWER_DOWN 2
Q64
2 AO3404 C1009 C1010

1
VGA_PD is R717 2.2U/6.3V_4 0.1U/10V_4
if support generated 2.2K_4 C1011 C1012

1
1U/6.3V_4 0.022U/25V_4
Modem wake 233 mA Max

2
from FCH

1
up should be +3V +VDDAN_11_MLDAC L67
+VDDIO_AZ +3V +VDDPL_3.3V +FCH_VDDAN_11_MLDAC
A change pull hi to A

S5 power PBY160808T-221Y-N(220,2A)
R719 *0_4/S
L81
VDDIO_AZ_S -- HD Audio PBY160808T-221Y-N(220,2A)
Interface I/O power C1013
2.2U/6.3V_4 C1014 C1015
2.2U/6.3V_4 0.1U/10V_4 Quanta Computer Inc.
PROJECT : R23
Size Document Number Rev
Hudson-M3 POWER/GND 1A

Date: Wednesday, May 04, 2011 Sheet 9 of 40


5 4 3 2 1
5 4 3 2 1

STRAPS PINS OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP RESISTORS.
DEBUG STRAPS
10
+3V +3VS5 +3VS5 +3VS5

D D
FCH has 15K Internal Pull Up for PCI_AD[27:23]
R720 R724 R742
10K/F_4 10K/F_4 R725 10K/F_4
10K/F_4 PCI_AD27
7 PCI_AD27 TP193
PCI_AD26
7 PCI_AD26 TP194
7 PCI_CLK1 PCI_CLK1
SI PCI_AD25 remove reserve pull low resistor
PCI_CLK3
MV 7 PCI_AD25 TP195
7 PCI_CLK3 reserve test point only.
PCI_AD24
7 PCI_AD24 TP196
PCI_CLK4
7 PCI_CLK4
PCI_AD23
7 PCI_AD23 TP197
7 LPC_CLK0 LPC_CLK0

7 LPC_CLK1 LPC_CLK1

EC_PWM2
6 EC_PWM2

7,29 CLK_RTC CLK_RTC

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
R732 R733 R734 R735 R737 R738
*10K/J_4 10K/F_4 10K/F_4 10K/F_4 HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
*2.2K/J_4 *2.2K_4

DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

C C

PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI


LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
REQUIRED STRAPS

-------- PCI_CLK1 -------- PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 CLK_RTC

PULL ALLOW USE non_Fusion AMD internal EC CLKGEN LPC ROM S5 PLUS MODE
HIGH PCIE Gen2 DEBUG CLOCK MODE ENABLED ENABLED DISABLED
-------- --------
STRAP DEFAULT DEFAULT DEFAULT
DEFAULT

PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS MODE


LOW -------- PCIE Gen1 -------- DEBUG CLOCK MODE DISABLED DISABLED ENABLED
STRAP
DEFAULT DEFAULT DEFAULT

B FCH PWRGD B

+3V
+3V

R739
10K/F_4 C1016
D17 BAT54A *0.1U/10V_4
5

34,35 CPU_VRM8380_PG 2

3 2 4 FCH_PWRGD 6

4,17,29 ECPWROK 1
C1017 U37
3

*2.2U/6.3V_6 *74AUP1G17GW

A R740 0_4 A

Quanta Computer Inc.


PROJECT : R23
Size Document Number Rev
Hudson-M3 STRAP/PWRGD 1A

Date: Wednesday, May 04, 2011 Sheet 10 of 40


5 4 3 2 1
5 4 3 2 1

ANX3110 Power Up Sequence


+1.2V R851 *0_8/s

PV change to short-pad
250mA
+TRAVIS1.2V

R741 *0_8/s
+ANXDVDD1.2

PV change to short-pad
11
C1018 C1019 C1020 C1021 C1022 C1023 C1024
2.2U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/25V_4 0.01U/25V_4

+TRAVIS3.3V +ANXAVDD1.2
D D
R744 *0_8/s

+TRAVIS1.2V PV change to short-pad


C1026 C1027 C1028 C1029
2.2U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.01U/25V_4

+TRAVIS3.3V
TRAVIS_RST#
+ANXAVDD3.3

+ANXDVDD3.3 +ANXDVDD1.2 +ANXAVDD3.3 +ANXAVDD1.2


150mA
10ms >=10ms +3V R850 *0_8/s R747 *0_8/s

PV change to short-pad
PV change to short-pad
50mA 120mA 100mA 120mA C1031 C1032 C1033 C1034 C1035 C1036
2.2U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.01U/25V_4 0.01U/25V_4

25
33
39
63
13
53

32
46
59

1
9
+TRAVIS3.3V 1M/F_4 R748 U38

AVDD33
AVDD33
AVDD33
AVDD33
AVDD33

AVDD12
DVDD33
DVDD33

DVDD12
DVDD12
DVDD12
DVDD12
0.1U/10V_4 C1037 POWER_ON_RESET 34 POR TXUCLKOUT+
LVDS_CLKU_P 43 TXUCLKOUT+ 20
R750 *0_4/s TRAVIS_RST# 12 42 TXUCLKOUT- +ANXDVDD3.3
7,27 LAN_PCIE_RST# RESET_L LVDS_CLKU_N TXUCLKOUT- 20
LVDS_U3_P 45
PV change to short-pad 44 R749 *0_8/s
ANX_TDO LVDS_U3_N TXUOUT2+
TP28 54 TDO LVDS_U2_P 41 TXUOUT2+ 20
C ANX_TDI 55 40 TXUOUT2- C
TP29 TD1 LVDS_U2_N TXUOUT2- 20 PV change to short-pad
ANX_TMS 57 38 TXUOUT1+ C1038 C1039
TP30 TMS LVDS_U1_P TXUOUT1+ 20
GPIO_0 : Define VAR_BL & ANX_TCK 56 37 TXUOUT1- 2.2U/6.3V_4
TP31 TCK LVDS_U1_N TXUOUT1- 20
BL_EN & DIGON H/W or S/W 36 TXUOUT0+ 0.1U/10V_4
LVDS_U0_P TXUOUT0+ 20
35 TXUOUT0-
control power up timming LVDS_U0_N TXUOUT0- 20
R753 10K/F_4 16
Pull Hi for H/W mode GPIO_0 TXLCLKOUT+
LVDS_CLKL_P 27 TXLCLKOUT+ 20
---chip have defined power GPIO_1 & GPIO_2 can 17 26 TXLCLKOUT-
GPIO_1 LVDS_CLKL_N TXLCLKOUT- 20
let it to NC from 29
up timing LVDS_L3_P
vendor review 18 28
Pull Low for S/W mode -- GPIO_2 LVDS_L3_N TXLOUT2+
24
APU through DPRX port to
program it
+TRAVIS3.3V R756 10K/F_4 CLK_SEL 10
CLK_SEL ANALOGIX ANX3110 LVDS_L2_P
LVDS_L2_N
LVDS_L1_P
23
22
TXLOUT2-
TXLOUT1+
TXLOUT1-
TXLOUT2+ 20
TXLOUT2- 20
TXLOUT1+ 20
CLK_SEL: LVDS_L1_N 21 TXLOUT1- 20
Pull Hi for 100MHZ clk source input 20 TXLOUT0+
LVDS_L0_P TXLOUT0- TXLOUT0+ 20
LVDS_L0_N 19 TXLOUT0- 20
Pull Low for 27MHZ crystal input
SI CLK_ANX_N 31 50 TRAVIS_DDC_DATA
7 CLK_ANX_N OSC_IN/100MHZ_P DDC_DATA
CLK_ANX_P 30 49 TRAVIS_DDC_CLK
7 CLK_ANX_P OSC_OUT/100MHZ_N DDC_CLK
+3V R852 *1M/F_4
TP42
C1054 0.1U/10V_4 ANX_eDP_AUXP 61
4 INT_eDP_AUXP DPRX_AUX_P
C1055 0.1U/10V_4 ANX_eDP_AUXN 60 47 VADJ R757 1K/F_4
4 INT_eDP_AUXN DPRX_AUX_N VAR_BL LVDS_BLON DPST_PWM 20 EDIDDATA TRAVIS_DDC_DATA
R853 *1M/F_4 TP43 15 20 EDIDDATA
BL_EN LVDS_BLON 20
+1.5V +3V INT_eDP_TXP0 3 14 DISP_ON
4 INT_eDP_TXP0 DPRX_LN0_P DIGON DISP_ON 20
INT_eDP_TXN0 4 EDIDCLK TRAVIS_DDC_CLK
4 INT_eDP_TXN0 INT_eDP_TXP1 DPRX_LN0_N 20 EDIDCLK
4 INT_eDP_TXP1 6 DPRX_LN1_P
R762 R771 INT_eDP_TXN1 7
4 INT_eDP_TXN1 DPRX_LN1_N
2.2k_4 10K_4 51 CFG_SCL R759 *4.7K_4 +TRAVIS3.3V remove level shift
ANX_PWM CFG_SCL
48 CPU_VARY_BL
2

52 CFG_SDA R760 *4.7K_4

TEST_EN
B Q50 R765 DPRX_HPD CFG_SDA B
58

R_BIAS
DPRX_HPD
AVSS

AVSS

AVSS
1 3 That is for debug

GND
4 APU_BLPWM
MMBT3904-7-F *0/J_4 only,can let it to
PV change for brightness issue NC
DPRX_HPD : ANX3110
2

62

65

11

64
It will transfer to
29 PWM_VADJ Hi when power enable

R_BIAS

R764 47K_4 R763


12K/F_4 C1042
TEST_EN : internal pull 100P/50V_4
+1.5V
low
1:scan test mode
0:normal mode
R766
10K/F_4
+5V

FCH_LVDS_HPD +TRAVIS3.3V
4 FCH_LVDS_HPD
R767
3

Q60 100K/F_4
DMN601K-7

2 R768
A A
*10K/J_4
3

Q61
DMN601K-7
1

2 DPRX_HPD

352-(&75
R769 4XDQWD&RPSXWHU,QF
1

100K/F_4

Size Document Number Rev


Custom ANX3110 1A

Date: Tuesday, May 03, 2011 Sheet 11 of 40


5 4 3 2 1
1 2 3 4 5 6 7 8

3 M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
98
97
JDIM2A

A0
A1
DQ0
DQ1
5
7
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ[0..63] 3 12
96 A2 DQ2 15
M_A_A3 95 17 M_A_DQ3
M_A_A4 A3 DQ3 M_A_DQ4 +1.5VSUS
92 A4 DQ4 4
M_A_A5 M_A_DQ5 JDIM2B
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
86 A7 DQ7 18 76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
A M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18 A
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ12 93 61
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD7 VSS22
119 A13 DQ13 24 94 VDD8 VSS23 65
M_A_A14 80 34 M_A_DQ14 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


109 41 M_A_DQ17 106 127
3 M_A_BS#0 BA0 DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


3 M_A_BS#1 108 51 M_A_DQ18 111 128
BA1 DQ18 M_A_DQ19 VDD13 VSS28
3 M_A_BS#2 79 BA2 DQ19 53 112 VDD14 VSS29 133
114 40 M_A_DQ20 117 134
3 M_A_CS#0 S0# DQ20 VDD15 VSS30
3 M_A_CS#1 121 42 M_A_DQ21 118 138
S1# DQ21 M_A_DQ22 VDD16 VSS31
3 M_A_CLKP0 101 CK0 DQ22 50 123 VDD17 VSS32 139
103 52 M_A_DQ23 124 144
3 M_A_CLKN0 CK0# DQ23 VDD18 VSS33
3 M_A_CLKP1 102 57 M_A_DQ24 145
CK1 DQ24 M_A_DQ25 VSS34
3 M_A_CLKN1 104 CK1# DQ25 59 +3V 199 VDDSPD VSS35 150
73 67 M_A_DQ26 151
3 M_A_CKE0 CKE0 DQ26 VSS36
74 69 M_A_DQ27 77 155
3 M_A_CKE1 CKE1 DQ27 NC1 VSS37
3 M_A_CAS# 115 56 M_A_DQ28 122 156
CAS# DQ28 M_A_DQ29 NC2 VSS38
3 M_A_RAS# 110 RAS# DQ29 58 125 NCTEST VSS39 161
113 68 M_A_DQ30 162
3 M_A_WE# W E# DQ30 VSS40
DIMM0_SA0 197 70 M_A_DQ31 3 M_A_EVENT# 198 167
DIMM0_SA1 SA0 DQ31 M_A_DQ32 EVENT# VSS41
201 SA1 DQ32 129 3 M_A_RST# 30 RESET# VSS42 168
202 131 M_A_DQ33 172
6,13 CGCLK_SMB SCL DQ33 VSS43
6,13 CGDAT_SMB 200 141 M_A_DQ34 PV change to short-pad 173
SDA DQ34 M_A_DQ35 R770 *0_6/s +VREF_DQ0 VSS44
DQ35 143 +VREF_DQ 1 VREF_DQ VSS45 178
116 130 M_A_DQ36 +VREF_CA0 126 179
3 M_A_ODT0 ODT0 DQ36 +VREF_CA0 VREF_CA VSS46
3 M_A_ODT1 120 132 M_A_DQ37 184
ODT1 DQ37 M_A_DQ38 VSS47
3 M_A_DM[7:0] DQ38 140 VSS48 185
B M_A_DM0 11 142 M_A_DQ39 2 189 B
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS1 VSS49
28 DM1 DQ40 147 3 VSS2 VSS50 190
M_A_DM2 46 149 M_A_DQ41 8 195
M_A_DM3 DM2 DQ41 M_A_DQ42 VSS3 VSS51
63 157 9 196

(204P)
(204P)
M_A_DM4 DM3 DQ42 M_A_DQ43 VSS4 VSS52
136 DM4 DQ43 159 13 VSS5
M_A_DM5 153 146 M_A_DQ44 14
M_A_DM6 DM5 DQ44 M_A_DQ45 VSS6
170 DM6 DQ45 148 19 VSS7
M_A_DM7 187 158 M_A_DQ46 20
DM7 DQ46 M_A_DQ47 VSS8
DQ47 160 25 VSS9
M_A_DQSP0 12 163 M_A_DQ48 26 203
3 M_A_DQSP0 DQS0 DQ48 VSS10 VTT1 +0.75V_DDR_VTT
M_A_DQSP1 29 165 M_A_DQ49 31 204
3 M_A_DQSP1 DQS1 DQ49 VSS11 VTT2
M_A_DQSP2 47 175 M_A_DQ50 32
3 M_A_DQSP2 M_A_DQSP3 DQS2 DQ50 M_A_DQ51 VSS12
3 M_A_DQSP3 64 DQS3 DQ51 177 37 VSS13

C378

C379
M_A_DQSP4 137 164 M_A_DQ52 38
3 M_A_DQSP4 DQS4 DQ52 VSS14
M_A_DQSP5 154 166 M_A_DQ53 43 205
3 M_A_DQSP5 M_A_DQSP6 DQS5 DQ53 M_A_DQ54 VSS15 VSS53
3 M_A_DQSP6 171 DQS6 DQ54 174 VSS54 206
M_A_DQSP7 M_A_DQ55 for WiMAX

*15P/50V_4

*15P/50V_4
3 M_A_DQSP7 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ56 DDR3-DIMM2
3 M_A_DQSN0 DQS#0 DQ56
M_A_DQSN1 27 183 M_A_DQ57
3 M_A_DQSN1 DQS#1 DQ57
M_A_DQSN2 45 191 M_A_DQ58
3 M_A_DQSN2 DQS#2 DQ58
M_A_DQSN3 62 193 M_A_DQ59
3 M_A_DQSN3 DQS#3 DQ59
M_A_DQSN4 135 180 M_A_DQ60
3 M_A_DQSN4 M_A_DQSN5 DQS#4 DQ60 M_A_DQ61
152 182 +VREF_CA0
3 M_A_DQSN5 DQS#5 DQ61
M_A_DQSN6 169 192 M_A_DQ62
3 M_A_DQSN6 DQS#6 DQ62
M_A_DQSN7 186 194 M_A_DQ63
3 M_A_DQSN7 DQS#7 DQ63
R864 *0_4/S
DDR_VTTREF 3,13,36
DDR3-DIMM2

R865 *1K_4 R866 *1K_4


C
H9.2mm +1.5VSUS C

Place these Caps near So-Dimm0. for WiMAX +1.5VSUS Reserved for AMD suggest
+1.5VSUS +1.5VSUS R772 0/J_6
+0.75V_DDR_VTT
C210 10U/6.3VS_6 +3VS5
C185 10U/6.3VS_6 C365 1U/6.3V_4
C166 10U/6.3VS_6 C381 1U/6.3V_4 R773
+VREF_DQ
150P/50V_4

150P/50V_4

150P/50V_4

C234 *100P/50V_4

C222 *100P/50V_4

C221 10U/6.3VS_6 C380 1U/6.3V_4 C1049 *.1U/10V_4


C254 10U/6.3VS_6 C366 1U/6.3V_4 1K/F_4
C232 10U/6.3VS_6 C360 *10U/6.3V_8

5
C156 0.1U/10V_4 C387 *10U/6.3V_8 U40
C197 0.1U/10V_4 C370 10U/6.3VS_6 +VREF_DQ_L 3 +
C172 0.1U/10V_4 C367 1 2 *0.047U/10V_4 1 R7741 2 *10_4 +VREF_DQ
C261

C253

C173

C192 0.1U/10V_4 C382 1 2*0.047U/10V_4 4 -


C267 0.1U/10V_4 R775 C1043 *OPA343NA/3K
C152 150P/50V_4 R776

2
C244 150P/50V_4 +VREF_DQ0 1K/F_4 *0.47u/6.3V_4
C245 150P/50V_4 SI EMI *10K/F_4
C251 150P/50V_4 C33 0.1U/10V_4
C29 2.2U/6.3V_4 R777 *0_4
SI EMI
+3V R778 *0_4
+VREF_CA0
C352 2.2U/6.3V_4
0.1U/10V_4
D C368 *0.1U/10V_4 C308 2.2U/6.3V_4 D
C3341 2*0.047U/10V_4
C358 2 1 *0.047U/10V_4 C324

352-(&75
4XDQWD&RPSXWHU,QF
13,36 +0.75V_DDR_VTT
2,3,4,5,13,36,37,39 +1.5VSUS
2,4,6,8,9,10,11,13,14,17,20,22,23,24,25,27,28,29,30,34,37,39 +3V Size Document Number Rev
Custom DDR3 DIMM-0 1A

Date: Tuesday, May 03, 2011 Sheet 12 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

3 M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
98
97
96
95
JDIM1A

A0
A1
A2
A3
DQ0
DQ1
DQ2
DQ3
5
7
15
17
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ[0..63] 3

+1.5VSUS
13
92 A4 DQ4 4
M_B_A5 91 6 M_B_DQ5
M_B_A6 A5 DQ5 M_B_DQ6
90 A6 DQ6 16
M_B_A7 M_B_DQ7 JDIM1B
86 A7 DQ7 18
M_B_A8 89 21 M_B_DQ8 75 44
M_B_A9 A8 DQ8 M_B_DQ9 VDD1 VSS16
85 A9 DQ9 23 76 VDD2 VSS17 48
M_B_A10 107 33 M_B_DQ10 81 49
A M_B_A11 A10/AP DQ10 M_B_DQ11 VDD3 VSS18 A
84 A11 DQ11 35 82 VDD4 VSS19 54
M_B_A12 83 22 M_B_DQ12 87 55
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD5 VSS20
119 A13 DQ13 24 88 VDD6 VSS21 60
M_B_A14 80 34 M_B_DQ14 93 61
M_B_A15 A14 DQ14 M_B_DQ15 VDD7 VSS22
78 A15 DQ15 36 94 VDD8 VSS23 65
39 M_B_DQ16 99 66
DQ16 VDD9 VSS24

PC2100 DDR3 SDRAM SO-DIMM


3 M_B_BS#0 109 41 M_B_DQ17 100 71
BA0 DQ17 M_B_DQ18 VDD10 VSS25
3 M_B_BS#1 108 BA1 DQ18 51 105 VDD11 VSS26 72
79 53 M_B_DQ19 106 127
3 M_B_BS#2 BA2 DQ19 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


3 M_B_CS#0 114 40 M_B_DQ20 111 128
S0# DQ20 M_B_DQ21 VDD13 VSS28
3 M_B_CS#1 121 S1# DQ21 42 112 VDD14 VSS29 133
101 50 M_B_DQ22 117 134
3 M_B_CLKP0 CK0 DQ22 VDD15 VSS30
3 M_B_CLKN0 103 52 M_B_DQ23 118 138
CK0# DQ23 M_B_DQ24 VDD16 VSS31
3 M_B_CLKP1 102 CK1 DQ24 57 123 VDD17 VSS32 139
104 59 M_B_DQ25 124 144
3 M_B_CLKN1 CK1# DQ25 VDD18 VSS33
3 M_B_CKE0 73 67 M_B_DQ26 145
CKE0 DQ26 M_B_DQ27 VSS34
3 M_B_CKE1 74 CKE1 DQ27 69 +3V 199 VDDSPD VSS35 150
115 56 M_B_DQ28 151
3 M_B_CAS# CAS# DQ28 VSS36
110 58 M_B_DQ29 77 155
3 M_B_RAS# RAS# DQ29 NC1 VSS37
3 M_B_WE# 113 68 M_B_DQ30 122 156
R162 4.7K_4 DIMM1_SA0 197 W E# DQ30 M_B_DQ31 NC2 VSS38
+3V SA0 DQ31 70 125 NCTEST VSS39 161
DIMM1_SA1 201 129 M_B_DQ32 162
SA1 DQ32 M_B_DQ33 VSS40
6,12 CGCLK_SMB 202 SCL DQ33 131 3 M_B_EVENT# 198 EVENT# VSS41 167
6,12 CGDAT_SMB 200 141 M_B_DQ34 3 M_B_RST# 30 168
SDA DQ34 M_B_DQ35 RESET# VSS42
DQ35 143 VSS43 172
3 M_B_ODT0 116 130 M_B_DQ36 PV change to short-pad 173
ODT0 DQ36 M_B_DQ37 R779 *0_6/s +VREF_DQ1 VSS44
3 M_B_ODT1 120 ODT1 DQ37 132 +VREF_DQ 1 VREF_DQ VSS45 178
140 M_B_DQ38 +VREF_CA1 126 179
3 M_B_DM[7:0] DQ38 +VREF_CA1 VREF_CA VSS46
M_B_DM0 11 142 M_B_DQ39 184
M_B_DM1 DM0 DQ39 M_B_DQ40 VSS47
28 DM1 DQ40 147 VSS48 185
B M_B_DM2 46 149 M_B_DQ41 2 189 B
M_B_DM3 DM2 DQ41 M_B_DQ42 VSS1 VSS49
63 157 3 190

(204P)
M_B_DM4 DM3 DQ42 M_B_DQ43 VSS2 VSS50
136 DM4 DQ43 159 8 VSS3 VSS51 195
M_B_DM5 153 146 M_B_DQ44 9 196

(204P)
M_B_DM6 DM5 DQ44 M_B_DQ45 VSS4 VSS52
170 DM6 DQ45 148 13 VSS5
M_B_DM7 187 158 M_B_DQ46 14
DM7 DQ46 M_B_DQ47 VSS6
DQ47 160 19 VSS7
M_B_DQSP0 12 163 M_B_DQ48 20
3 M_B_DQSP0 DQS0 DQ48 VSS8
M_B_DQSP1 29 165 M_B_DQ49 25
3 M_B_DQSP1 DQS1 DQ49 VSS9
M_B_DQSP2 47 175 M_B_DQ50 26 203
3 M_B_DQSP2 DQS2 DQ50 VSS10 VTT1 +0.75V_DDR_VTT
M_B_DQSP3 64 177 M_B_DQ51 31 204
3 M_B_DQSP3 DQS3 DQ51 VSS11 VTT2
M_B_DQSP4 137 164 M_B_DQ52 32
3 M_B_DQSP4 M_B_DQSP5 DQS4 DQ52 M_B_DQ53 VSS12
3 M_B_DQSP5 154 DQS5 DQ53 166 37 VSS13
M_B_DQSP6 171 174 M_B_DQ54 38
3 M_B_DQSP6 DQS6 DQ54 VSS14
M_B_DQSP7 188 176 M_B_DQ55 43 205
3 M_B_DQSP7 M_B_DQSN0 DQS7 DQ55 M_B_DQ56 VSS15 VSS53
3 M_B_DQSN0 10 DQS#0 DQ56 181 VSS54 206
M_B_DQSN1 27 183 M_B_DQ57
3 M_B_DQSN1 DQS#1 DQ57
M_B_DQSN2 45 191 M_B_DQ58 DDR3-DIMM1
3 M_B_DQSN2 DQS#2 DQ58
M_B_DQSN3 62 193 M_B_DQ59
3 M_B_DQSN3 DQS#3 DQ59
M_B_DQSN4 135 180 M_B_DQ60
3 M_B_DQSN4 DQS#4 DQ60
M_B_DQSN5 152 182 M_B_DQ61 +VREF_CA1
3 M_B_DQSN5 DQS#5 DQ61
M_B_DQSN6 169 192 M_B_DQ62
3 M_B_DQSN6 M_B_DQSN7 DQS#6 DQ62 M_B_DQ63
3 M_B_DQSN7 186 DQS#7 DQ63 194

R780 *0_4/S
DDR_VTTREF 3,12,36
DDR3-DIMM1

R784 *1K_4 R782 *1K_4


H5.2mm +1.5VSUS

C C

Place these Caps near So-Dimm1.


+1.5VSUS +0.75V_DDR_VTT

C273 10U/6.3VS_6 C364 1U/6.3V_4


C208 10U/6.3VS_6 C363 1U/6.3V_4
C170 10U/6.3VS_6 C621 1U/6.3V_4
C263 10U/6.3VS_6 C362 1U/6.3V_4
C231 10U/6.3VS_6 C359 *10U/6.3V_8
C191 10U/6.3VS_6 C635 10U/6.3VS_6
C196 0.1U/10V_4 C384 10U/6.3VS_6
C218 0.1U/10V_4 C376
1 2*0.047U/10V_4
C184 0.1U/10V_4 C377
1 2*0.047U/10V_4
C246 0.1U/10V_4
C161 0.1U/10V_4
C375 0.1U/10V_4
C289 150P/50V_4
C155 150P/50V_4 SI EMI C625 0.1U/10V_4

C288 0.1U/10V_4

+VREF_CA1
EMI request

C343 0.1U/10V_4
D +3V C342 2.2U/6.3V_4 D
C3441 2*0.047U/10V_4
C350 2.2U/6.3V_4
C354 *0.1U/10V_4
C353 1 2*0.047U/10V_4 +VREF_DQ1

C32
C28
0.1U/10V_4
2.2U/6.3V_4
352-(&75
12,36 +0.75V_DDR_VTT 4XDQWD&RPSXWHU,QF
2,3,4,5,12,36,37,39 +1.5VSUS
2,4,6,8,9,10,11,12,14,17,20,22,23,24,25,27,28,29,30,34,37,39 +3V
Size Document Number Rev
Custom DDR3 DIMM-1 1A

Date: Tuesday, May 03, 2011 Sheet 13 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

U17A

+1.8V_DPE_VDD18 AG15
U17G

DP E/F POWER

DPE_VDD18#1
DP A/B POWER

DPA_VDD18#1 AE11 +1.8V_DPA_VDD18


14
AG16 DPE_VDD18#2 DPA_VDD18#2 AF11
P&N swap for layout concern , AMD recommend
2.5GT/s bit rate
PEG_TXP8 AF30 AH30 C_PEG_RXP0 C190 0.1U/10V_4 +1.0V_DPE_VDD10 AG20 AF6 +1.0V_DPB_VDD10
2 PEG_TXP8 PCIE_RX0P PCIE_TX0P PEG_RXP8 2 DPE_VDD10#1 DPA_VDD10#1
PEG_TXN8 AE31 AG31 C_PEG_RXN0 C194 0.1U/10V_4 AG21 AF7
2 PEG_TXN8 PCIE_RX0N PCIE_TX0N PEG_RXN8 2 DPE_VDD10#2 DPA_VDD10#2
D D
PEG_TXP9 AE29 AG29 C_PEG_RXP1 C_PEG_RXN1 C195 0.1U/10V_4 AG14 AE1
2 PEG_TXP9 PEG_TXN9 PCIE_RX1P PCIE_TX1P C_PEG_RXN1 C_PEG_RXP1 PEG_RXP9 2 DPE_VSSR#1 DPA_VSSR#1
AD28 AF28 C207 0.1U/10V_4 AH14 AE3
2 PEG_TXN9 PCIE_RX1N PCIE_TX1N PEG_RXN9 2 DPE_VSSR#2 DPA_VSSR#2
AM14 DPE_VSSR#3 DPA_VSSR#3 AG1
AM16 DPE_VSSR#4 DPA_VSSR#4 AG6
PEG_TXP10 AD30 AF27 C_PEG_RXN2 C211 0.1U/10V_4 AM18 AH5
2 PEG_TXP10 PCIE_RX2P PCIE_TX2P PEG_RXP10 2 DPE_VSSR#5 DPA_VSSR#5
PEG_TXN10 AC31 AF26 C_PEG_RXP2 C215 0.1U/10V_4
2 PEG_TXN10 PCIE_RX2N PCIE_TX2N PEG_RXN10 2
+1.0V_VGA
PEG_TXP11 AC29 AD27 C_PEG_RXP3 C187 0.1U/10V_4 +1.8V_DPE_VDD18 AF16 AE13 +1.8V_DPA_VDD18
2 PEG_TXP11 PCIE_RX3P PCIE_TX3P PEG_RXP11 2 DPF_VDD18#1 DPB_VDD18#1
PEG_TXN11 AB28 AD26 C_PEG_RXN3 C174 0.1U/10V_4 AG17 AF13 1.0V@220mA
2 PEG_TXN11 PCIE_RX3N PCIE_TX3N PEG_RXN11 2 DPF_VDD18#2 DPB_VDD18#2

PEG_TXP12 AB30 AC25 C_PEG_RXP4 C227 0.1U/10V_4 +1.0V_DPB_VDD10 L46


2 PEG_TXP12 PCIE_RX4P PCIE_TX4P PEG_RXP12 2
PEG_TXN12 AA31 AB25 C_PEG_RXN4 C236 0.1U/10V_4 AF22 AF8 *0_6/s
2 PEG_TXN12 PCIE_RX4N PCIE_TX4N PEG_RXN12 2 +1.0V_DPE_VDD10 DPF_VDD10#1 DPB_VDD10#1

PCI EXPRESS INTERFACE


AG22 AF9 PV change to short-pad
DPF_VDD10#2 DPB_VDD10#2 C547 C535 C548
PEG_TXP13 AA29 Y23 C_PEG_RXP5 C217 0.1U/10V_4 PEG_RXN13 PEG_RXP13 PV change to short-pad 0.1U/10V_4 *10U/6.3V_8 *1U/6.3V_4
2 PEG_TXP13 PCIE_RX5P PCIE_TX5P PEG_RXP13 2
PEG_TXN13 Y28 Y24 C_PEG_RXN5 C225 0.1U/10V_4 PEG_RXP13 PEG_RXN13 R64 *0_4/sAF23 AF10
2 PEG_TXN13 PCIE_RX5N PCIE_TX5N PEG_RXN13 2 DPF_VSSR#1 DPB_VSSR#1
AG23 DPF_VSSR#2 DPB_VSSR#2 AG9
AM20 DPF_VSSR#3 DPB_VSSR#3 AH8
PEG_TXP14 Y30 AB27 C_PEG_RXP6 C240 0.1U/10V_4 AM22 AM6
2 PEG_TXP14 PCIE_RX6P PCIE_TX6P PEG_RXP14 2 DPF_VSSR#4 DPB_VSSR#4
PEG_TXN14 W 31 AB26 C_PEG_RXN6 C248 0.1U/10V_4 AM24 AM8
2 PEG_TXN14 PCIE_RX6N PCIE_TX6N PEG_RXN14 2 DPF_VSSR#5 DPB_VSSR#5

PEG_TXP15 W 29 Y27 C_PEG_RXP7 C250 0.1U/10V_4


2 PEG_TXP15 PCIE_RX7P PCIE_TX7P PEG_RXP15 2
PEG_TXN15 V28 Y26 C_PEG_RXN7 C264 0.1U/10V_4
2 PEG_TXN15 PCIE_RX7N PCIE_TX7N PEG_RXN15 2
R90 150/F_4 AF17 AE10 R82 150/F_4
DPEF_CALR DPAB_CALR
C V30 PCIE_RX8P PCIE_TX8P W 24 C
U31 PCIE_RX8N PCIE_TX8N W 23 P&N swap for layout concern , AMD recommend
+1.8V_DPE_VDD18 AG18 DP PLL POWER AG8 +1.8V_DPA_VDD18
DPE_PVDD DPA_PVDD
AF19 DPE_PVSS DPA_PVSS AG7
U29 PCIE_RX9P PCIE_TX9P V27
T28 PCIE_RX9N PCIE_TX9N U26
+1.8V_DPE_VDD18 AG19 AG10 +1.8V_DPA_VDD18
DPF_PVDD DPB_PVDD
T30 PCIE_RX10P PCIE_TX10P U24 AF20 DPF_PVSS DPB_PVSS AG11
R31 PCIE_RX10N PCIE_TX10N U23

R29 T26 Seymour-S3


PCIE_RX11P PCIE_TX11P AJ080900T01
P28 PCIE_RX11N PCIE_TX11N T27
FCBGA631-AMD-M92-S2

P30 PCIE_RX12P PCIE_TX12P T24


N31 PCIE_RX12N PCIE_TX12N T23

N29 PCIE_RX13P PCIE_TX13P P27


M28 PCIE_RX13N PCIE_TX13N P26 (Seymour-S3: LVDS mode 240mA@1.0V)
+1.0V_DPE_VDD10 +1.8V_DPA_VDD18 1.8V(300mA)
(Seymour-S3: DP mode 220mA@1.0V)
M30 P24 +1.0V_DPE_VDD10 L15 *0_6/s +1.0V_VGA +1.8V_DPA_VDD18 L16 *0_6/s +1.8V_VGA
PCIE_RX14P PCIE_TX14P
L31 PCIE_RX14N PCIE_TX14N P23
C140 C141
C147 C120 C133 0.1U/10V_4 *1U/6.3V_4 C127
L29 M27 0.1U/10V_4 *1U/6.3V_4 *10U/6.3V_6 *10U/6.3V_8
PV ADD 0.1uF for EMI suggestion PCIE_RX15P PCIE_TX15P
B
K30 PCIE_RX15N PCIE_TX15N N26 B
*0.1U/10V_4
C149
(Seymour-S3: LVDS mode 300mA@1.8V)
CLOCK
(Seymour-S3: DP mode 300mA@1.8V)
CLK_VGA_P AK30
7 CLK_VGA_P PCIE_REFCLKP
CLK_VGA_N AK32 +1.8V_DPE_VDD18 L12 *0_6/s
7 CLK_VGA_N PCIE_REFCLKN +1.8V_VGA
C121 PV change to short-pad
C130 C110
CALIBRATION 0.1U/10V_4 *1U/6.3V_4 *10U/6.3V_8
C158 Y22 M72_PCIE_CALRP R100 1.27K/F_4
*0.1U/10V_4 PCIE_CALRP
10K/F_4 R332 N10 AA22 M72_PCIE_CALRN R104 2K/F_4
PW RGOOD PCIE_CALRN +1.0V_VGA

PEGX_RST# AL27 PERSTB

Seymour-S3
100MHz (+/-300ppm) input frequency, AJ080900T01
0-0.7V single-ended swing FCBGA631-AMD-M92-S2

+3V

A C100 A
U3 0.1U/10V_4 +1.0V_VGA
15,17,36 +1.0V_VGA
MC74VHC1G08DFT2G
5

+1.8V_VGA
15,17,36 +1.8V_VGA
7 GPU_RST# 2
4 PEGX_RST#
7 VGA_RSTB R61 330_4 DGPU_HIN_RST# 1 352-(&75
4XDQWD&RPSXWHU,QF
3

R67
100K/F_4
Size Document Number Rev
Custom 1A
Seymour PCIE_Interface
Date: Tuesday, May 03, 2011 Sheet 14 of 40
5 4 3 2 1
5 4 3 2 1

MEM_ID[3:0]
0000
0001
0010
0011
Vendor
Samsung- E die
Hynix- Vega die
Hynix- Vega die
Samsung- C die
Type
64*16-800MHZ
64*16-800MHZ
128*16-800MHZ
128*16-800MHZ
Vendor P/N
K4W1G1646E-HC12
H5TQ1G63DFR-12C
H5TQ2G63BFR-12C
K4W2G1646C-HC12
QUANTA P/N
Reserved
Reserved
Reserved
Reserved TP198 AE9
U17B

Seymour-S3
DVCNTL_0/ DVPDATA_18
TXCAP_DPA3P
TXCAM_DPA3N
AF2
AF4 +1.8V_AVDD_Q +A2VDD
15
0100 Micron 128*16-800MHZ MT41J128M16HA-125:D Reserved TP199 L9
DVCNTL_1 / NC 1.8V(70mA) 3.3V(65mA)
0101 Reserved Reserved Reserved Reserved TP200 N9
DVCNTL_2 / NC TX0P_DPA2P
AG3
0110 Hynix- Vega die 64*16-900MHZ H5TQ1G63DFR-11C AKD5LZWTW02 AE8 DPA AG5 +1.8V_AVDD_Q L14 +A2VDD L13 +3V_DELAY
TP201 DVDATA_12 / DVPDATA_16 TX0M_DPA2N +1.8V_VGA
0111 Samsung- E die 64*16-900MHZ K4W1G1646E-HC11 Reserved TP202 AD9
DVDATA_11 / DVPDATA_20
1000 Samsung- G die 64*16-900MHZ K4W1G1646G-BC11 AKD5EGGT500 AC10 AH3 PBY160808T-121Y-N/2.5A_6 *BLM18PG181SN1D(180,1.5A)_6
TP203 DVDATA_10 / DVPDATA_22 TX1P_DPA1P
1001 Reserved Reserved Reserved Reserved TP204 AD7
DVDATA_9 / DVPDATA_12 TX1M_DPA1N
AH1
1010 Hynix- Vega die 128*16-900MHZ H5TQ2G63BFR-11C AKD5MGWTW00 AC8 C134 C148 C122 C112 C104 C93
TP205 DVDATA_8 / DVPDATA_14
1011 Samsung- C die 128*16-900MHZ K4W2G1646C-HC11 AKD5MGWT500 AC7 AK3 0.1U/10V_4 1U/6.3V_4 10U/6.3V_6 *0.1U/10V_4 *1U/6.3V_4 *10U/6.3V_8
TP206 DVDATA_7 / DVPCNTL_0 TX2P_DPA0P
1100 Reserved Reserved TP207 AB9
DVDATA_6 / DVPDATA_8 TX2M_DPA0N
AK1
1101 Reserved Reserved TP208 AB8
DVDATA_5 / DVPDATA_6
D 1110 Reserved Reserved TP209 AB7
DVDATA_4 DVPDATA_4 TXCBP_DPB3P
AK5 D
1111 Reserved Reserved TXCBM_DPB3N
AM3
R305
Memory ID DVO
+VDDR4 *10K/F_4 MEM_ID3 AB4 AK6
R303 10K/F_4 MEM_ID2 DVDATA_3 / DVPDATA_19 TX3P_DPB2P
AB2 AM5
R87 10K/F_4 MEM_ID1 DVDATA_2 / DVPDATA_21 TX3M_DPB2N
Y8
DVDATA_1 / DVPDATA_2 DPB
R86 *10K/F_4 MEM_ID0 Y7 AJ7
DVDATA_0 / DVPDATA_0 TX4P_DPB1P
AH6
TX4M_DPB1N +VDDD1 +1.8V_A2VDD_Q
PBY160808T-121Y-N/2.5A_6 1.8V(150mA DPC_VDD18) AK8 1.8V(45mA VDD1DI) 1.8V(2mA)
+1.8V_DPC_VDD18 TX5P_DPB0P
AL7
L47 TX5M_DPB0N +VDDD1 L9 +1.8V_A2VDD_Q L17
+1.8V_VGA +1.8V_VGA +1.8V_VGA
C553 C552 C551 Seymour-S3
AMD request to use Hi voltage enter O.S 10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 W6 PBY160808T-121Y-N/2.5A_6 *PBY160808T-121Y-N/2.5A_6
DPC_PVDD / DVPDATA_11
+3V_DELAY
V6
DPC_PVSS / GND Seymour-S3
V4 C90 C89 C106 C132 C145 C144
DVPDATA_3/TXCCP_DPC3P 0.1U/10V_4 1U/6.3V_4 10U/6.3V_6 *0.1U/10V_4 *1U/6.3V_4 *10U/6.3V_8
U5
DVPCNTL_2/TXCCM_DPC3N
AC6
GPIO15 +1.8V_DPC_VDD18
AC5
DPC_VDD18#1/DVPDAT10
DPC_VDD18#2/DVPDAT23 DVPDATA_7 / TX0P_DPC2P
W3 Robson-- Install
V2 Seymour- NC
R887 10K_4 GFX_CORE_CNTRL0 DVPDATA_1 / TX0M_DPC2N
BACO mode -- install
Y4
DVPCNTL_MV1 / TX1P_DPC1P
AA5 W5
PBY160808T-121Y-N/2.5A_6 DPC_VDD10#1/DVPDAT15 DVPDATA_9 / TX1M_DPC1N
GPIO20 1.1V(110mA DPC_VDD10) AA6
DPC_VDD10#2/DVPDAT17
+1.0V_VGA +1.1V_DPC_VDD10 AA3
L25 DVPDATA_13 / TX2P_DPC0P
Y2
R888 *10K_4 GFX_CORE_CNTRL1 C229 C237 C238 DVPCNTL_1 / TX2M_DPC0N
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 U1 AA12
DPC_VSSR#1 / DVPCLK VDDR4 / DPCD_CALR
W1
DPC_VSSR#2 / DVPDAT5
U3
DPC_VSSR#3 / GND
Y6
GPIO15 GPIO20 Access to SCL and SDA is mandatory AA1
DPC_VSSR#4 / GND
DPC_VSSR#5/ DVPCNTL_MV0 DPC
R308 *4.7K_4
on BACO designs for debug purposes R311 *4.7K_4
+3V_DELAY
Seymour-XT PWRCNTL0 PWRCNTL1 V-CORE
TP210 R1
SCL
TP211 R3
SDA I2C Reserve for AMD debug only
L 0 0 0.9V
C AM26 TP212 C
GENERAL PURPOSE I/O R
AK26
GPIO0 RB
M 0 1 1V 16 GPIO0 U6
GPIO_0
16 GPIO1 GPIO1 U10 AL25 TP213
GPIO2 GPIO_1 G
16 GPIO2 T10 AJ25
GPUT_DATA GPIO_2 GB
H 1 0 1.1V (Default) U8
GPIO_3_SMBDATA
GPUT_CLK U7 AH24 TP214
GPIO5 GPIO_4_SMBCLK B
16 GPIO5 T9 AG25
R117 *0_4 GPIO_5_AC_BATT BB
TBD 1 1 NA 29 GPU_PROCHOT T8
GPIO_6 DAC1 *10K_4
EXT_LVDS_BLON T7 AH26 HSYNC_COM_R R854
GPIO8 GPIO_7_BLON HSYNC VSYNC_COM_R R855 *10K_4
16 GPIO8 P10 AJ27
GPIO9 GPIO_8_ROMSO VSYNC
16 GPIO9 P4
+3V_DELAY GPIO10 GPIO_9_ROMSI
TP215 P2
GPIO11 GPIO_10_ROMSCK R75 499/F_4
16 GPIO11 N6 AD22
R107 *10K_4 GPIO24_TRSTB R101 *10K_4 GPIO12 GPIO_11 RSET
16 GPIO12 N5
GPIO13 GPIO_12 +1.8V_AVDD_Q
16 GPIO13 N3 AG24 +1.8V_AVDD_Q
R114 *10K_4 GPIO25_TDI TP216 HDMI_HP2 GPIO_13 AVDD
Y9 AE22
GFX_CORE_CNTRL0 GPIO_14_HPD2 AVSSQ
37 GFX_CORE_CNTRL0 N1
R324 *10K_4 GPIO27_TMS TP217 OSC_SPREAD GPIO_15_PWRCNTL_0 +VDDD1
M4 AE23 +VDDD1
VGA_ALERT GPIO_16_SSIN VDD1DI
4 VGA_ALERT R6 AD23
R335 *10K_4 GPIO28_TDO HPD3 GPIO_17_THERMAL_INT VSS1DI
TP218 W10
TEMP_FAIL GPIO_18_HPD3
M2
GPIO_19_CTF Seymour-S3
R322 *10K_4 GPIO26_TCK 37 GFX_CORE_CNTRL1 GFX_CORE_CNTRL1 P8 AM12
BB_EN GPIO_20_PWRCNTL_1 R2 / NC
TP219 P7 AK12
GPIO22 GPIO_21_BB_EN R2B / NC
16 GPIO22 N8
GPIO_23_CLKREQb GPIO_22_ROMCSB C525 22P/50V_4 EVGA-XTALI TP220
N7 AL11
GPIO_23_CLKREQB G2 / NC
AJ11
G2B / NC

1
R120 10K/F_4 GPIO22 Y2 R296
B2 / NC
AK10 follow AMD checklist change
GPIO24_TRSTB L6 AL9 27MHZ 1M/F_4
TP221
GPIO25_TDI JTAG_TRSTB B2B / NC from 10M to 1Mohm
GPIO22(ROMCS#) TP222 L5 DAC2 is NC on Seymour

2
R331 *10K_4 GPIO_23_CLKREQb GPIO26_TCK JTAG_TDI
PD without external VBIOS ROM +3V_DELAY TP223 L3
GPIO27_TMS JTAG_TCK C534 EVGA-XTALO TP225
TP224 L1 AH12
GPIO28_TDO JTAG_TMS C / NC 22P/50V_4
TP226 K4
JTAG_TDO DAC2 Y / NC
AM10
TESTEN AF24 AJ9
TP227 TESTEN COMP / NC
R116 10K/F_4 TEMP_FAIL
For Int Clk 27Mhz
AB13
GENERICA DAC2_VSY
W8 AL13 DAC2_VSY 16
B
GENERICC GENERICB H2SYNC DAC2_HSY B
16 GENERICC W9 AJ13 DAC2_HSY 16
GENERICC V2SYNC
W7
GENERICD
AD10
GENERICE_HPD4 R60 *0_4 +VDDD1
AD19 +VDDD1
VDD2DI / NC R93 *0_4
AC14 AC19
HPD1 VSS2DI / NC
EXT_LVDS_BLON R110 10K/F_4 +1.8V_VGA
1.8V+R6043(249R)=1.8V/3=0.6V AE20 R73 *0_4 +A2VDD
R295 499/F_4 A2VDD / NC
AE17 R77 *0_4 +1.8V_A2VDD_Q +1.8V_A2VDD_Q
R297 249/F_4 +0.6V_M92_VREFG AC16 A2VDDQ / NC
VREFG
If no contact this pin to LVDS need pull low A2VSSQ
AE19

BLM18PG471SN1D/1A_6 1.8V(75mA DPLL_PVDD) C533 0.1U/10V_4 AG13 R91 *715/F_4 Seymour-S3--NC


R2SET / NC
+1.8V_VGA ROBSON--install
L43
+3V_DELAY C529 DDC/AUX
C526 C532 AE6 29 GPUT_CLK GPUT_CLK
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 PLL/CLOCK DDC1CLK GPUT_DATA
AE5 29 GPUT_DATA
+1.8V_DPLL_PVDD DDC1DATA
AF14
R79 DPLL_PVDD
AE14 AD2
DPLL_PVSS AUX1P
*10K_4 AD4
AUX1N +3V_DELAY
+1.0V_VGA L20 BLM18PG471SN1D/1A_6 +1.0V_DPLL_VDDC AD14 AC11
DPLL_VDDC DDC2CLK
AC13
TESTEN C151 C160 C169 DDC2DATA R102 4.7K_4
1.0V(125mA DPLL_VDDC)
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 EVGA-XTALI AM28 AD13
EVGA-XTALO XTALIN AUX2P R108 4.7K_4
AK28 AD11
XTALOUT AUX2N
AC22
R80 NC#2/XO_IN
AB22 AE16
NC#1/XO_IN2 DDCCLK_AUX5P
Ra *10K_4 Seymour uninstall Ra
DDCDATA_AUX5N
AD16 Reserve for DB debug only
to meet AF24 N/C
PBY160808T-121Y-N/2.5A_6 1.8V(20mA TSVDD) AC1 TP228
DDC6CLK TP229
+1.8V_VGA T4 AC3
L44 DPLUS THERMAL DDC6DATA
T2
DMINUS
AD20
C524 C527 C530 NC/DDCCLK_AUX3P
A AC20 A
NC/DDCDATA_AUX3N
R5
10U/6.3V_8 1U/6.3V_4 0.1U/10V_4 +1.8V_TSVDD TS_FDO
AD17
TSVDD
AC17
TSVSS

+1.0V_VGA
14,17,36 +1.0V_VGA
+1.8V_VGA
352-(&75
14,17,36 +1.8V_VGA
Seymour-S3
AJ080900T01 +3V_DELAY
FCBGA631-AMD-M92-S2
16,17 +3V_DELAY
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
Seymour Main
Date: Tuesday, May 03, 2011 Sheet 15 of 40
5 4 3 2 1
5 4 3 2 1

AA27
U17E

PCIE_VSS#1 GND#1 A3
U17F

LVDS CONTROL
16
AB24 PCIE_VSS#2 GND#2 A30 VARY_BL AB11
AB32 AA13 AB12 RECOMMENDED SETTINGS
AC24
PCIE_VSS#3
PCIE_VSS#4
GND#3 / EVDDQ#2
GND#4 AA16
DIGON CONFIGURATION STRAPS 0= DO NOT INSTALL RESISTOR
AC26 AB10 1 = INSTALL 10K RESISTOR
PCIE_VSS#5 GND#5
AC27 PCIE_VSS#6 GND#6 / EVDDQ#3 AB15 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, X = DESIGN DEPENDANT
AD25 PCIE_VSS#7 GND#7 AB6 NA = NOT APPLICABLE
AD32 AC9 AH20 THEY MUST NOT CONFLICT DURING RESET
D PCIE_VSS#8 GND#8 TXCLK_UP_DPF3P D
AE27 PCIE_VSS#9 GND#9 AD6 TXCLK_UN_DPF3N AJ19
AF32 PCIE_VSS#10 GND#10 AD8
AG27 AE7 AL21 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
PCIE_VSS#11 GND#11 TXOUT_U0P_DPF2P
AH32 PCIE_VSS#12 GND#12 AG12 TXOUT_U0N_DPF2N AK20
K28 PCIE_VSS#13 GND#13 AH10 Transmitter Power Savings Enable
K32 AH28 AH22 TX_PWRS_ENB GPIO0
L27
PCIE_VSS#14
PCIE_VSS#15
GND#14
GND#15 B10
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N AJ21
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
1
M32 PCIE_VSS#16 GND#16 B12
N25 B14 AL23 PCI Express Transmitter De-emphasis Enable
PCIE_VSS#17 GND#17 TXOUT_U2P_DPF0P TX_DEEMPH_EN GPIO1
N27 B16 AK22
P25
PCIE_VSS#18
PCIE_VSS#19
GND#18
GND#19 B18
TXOUT_U2N_DPF0N 0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)
1
P32 PCIE_VSS#20 GND#20 B20 TXOUT_U3P AK24
R27 B22 AJ23 Enable CLKREQ# Power Management
PCIE_VSS#21 GND#21 TXOUT_U3N BIF_GEN2_EN_A GPIO2 0 - CLKREQ# power management capability is disabled
T25 B24
T32
PCIE_VSS#22
PCIE_VSS#23
GND#22
GND#23 B26 1 - CLKREQ# power management capability is enabled 0
U25 B6 LVTMDP
PCIE_VSS#24 GND#24
U27 PCIE_VSS#25 GND#25 B8
V32 C1 AL15 RSVD GPIO8 0
PCIE_VSS#26 GND#26 TXCLK_LP_DPE3P BIF_VGA_DIS GPIO9 VGA ENABLED 0
W 25 PCIE_VSS#27 GND#27 C32 TXCLK_LN_DPE3N AK14
W 26 E28 RSVD GPIO21 0
PCIE_VSS#28 GND#28
W 27 PCIE_VSS#29 GND#29 F10 TXOUT_L0P_DPE2P AH16
Y25 F12 AJ15 BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 0
PCIE_VSS#30 GND#30 TXOUT_L0N_DPE2N
Y32 PCIE_VSS#31 GND#31 F14
F16 AL17 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT 0 0 1
GND#32 TXOUT_L1P_DPE1P
GND#33 F18 TXOUT_L1N_DPE1N AK16
F2 VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
GND#34
GND#35 F20 TXOUT_L2P_DPE0P AH18
M6 GND#56 GND#36 F22 TXOUT_L2N_DPE0N AJ17 0
N11 F24 RSVD GENERICC 0
GND#57 GND#37 AUD[1] HSYNC AUD[1] AUD[0]
N12 GND#58 GND#38 F26 TXOUT_L3P AL19 11
C N13 F6 AK18 AUD[0] VSYNC 0 0 No audio function C
GND#59 GND#39 TXOUT_L3N
N16 F8 0 1 Audio for DisplayPort and HDMI if dongle is detected
N18
N21
GND#60
GND#61
GND#62
GND GND#40
GND#41
GND#42
G10
G27
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
P6 GND#63 GND#43 G31
P9 G8 Seymour-S3
GND#64 GND#44 AJ080900T01
R12 GND#65 GND#45 H14
R15 H17 FCBGA631-AMD-M92-S2
GND#66 GND#46
R17 GND#67 GND#47 H2
R20 GND#68 GND#48 H20
T13 GND#69 GND#49 H6
T16 J27
T18
GND#70
GND#71
GND#50
GND#51 J31 +3V_DELAY AMD RESERVED CONFIGURATION STRAPS
T21 GND#72 GND#52 K11
T6 GND#73 GND#53 K2 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
U15 GND#74 GND#54 K22
U17 K6 15 GPIO9
GPIO9 R312 *10K_4 THEY MUST NOT CONFLICT DURING RESET
GND#75 GND#55
U20 GND#76 GND#85 T11
U9 R11 GPIO13 R315 *10K_4
GND#77 GND#86 15 GPIO13
V13 H2SYNC GENERICC
GND#78 GPIO12 R115 *10K_4
V16 GND#79 15 GPIO12
V18 GND#80
Y10 GPIO11 R333 10K/F_4 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
GND#81 15 GPIO11
Y15
Y17
GND#82
A32 THEY MUST NOT CONFLICT DURING RESET
GND#83 VSS_MECH#1
Y20 GND#84 VSS_MECH#2 AM1
VSS_MECH#3 AM32
GPIO21_BB_EN

B B

Seymour-S3
AJ080900T01 +3V_DELAY
FCBGA631-AMD-M92-S2
Power Up/Down Sequence Memory Aperture size
GPIO0 R307 *10K_4
GPIO9 GPIO13 GPIO12 GPIO11 15 GPIO0
GPIO1 R98 *10K_4
15 GPIO1
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0 GPIO2
15 GPIO2 R106 *10K_4

0 128M 0 0 0 15 GPIO8 GPIO8 R113 *10K_4

+VGA_CORE VDDC R99 *10K_4


0 256M 0 0 1 15 GENERICC
GPIO22 R122 *10K_4
15 GPIO22
0 64M 0 1 0 15 GPIO5
GPIO5 R321 10K/F_4
+VGA_CORE VDDCI
R78 *10K_4
0 32M 0 1 1 15 DAC2_VSY
R76 *10K_4
15 DAC2_HSY

+1.5V_VGA VDDR1 0 512M 1 0 0


0 1G 1 0 1 15,17 +3V_DELAY
+3V_DELAY

A A
+3.3V_Delay VDDR3
0 2G 1 1 0
+1.8V_VGA VDDR4 0 4G 1 1 1
+1.8V_VGA VDD_CT
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
352-(&75
20ms 20ms
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Seymour GND / LVDS/ Straps 1A

Date: Tuesday, May 03, 2011 Sheet 16 of 40


5 4 3 2 1
5 4 3 2 1

+1.5V_VGA 1.5V ( DDR3, MVDDQ = 1.5V@2.0A)


H13
U17D

MEM I/O

VDDR1#1
PCIE
PCIE_VDDR#1 AB23
PCIE_VDDR--PCI-E I/O power. 1.8 V ± 5%

+1.8V_PCIE_VDDR
+1.8V_PCIE_VDDR

1.8V(500mA) PBY160808T-221Y-N/2A_6
L18
+1.8V_VGA
17
H16 VDDR1#2 PCIE_VDDR#2 AC23
H19 VDDR1#3 PCIE_VDDR#3 AD24
C404 C327 C330 C331 C336 J10 AE24 C242 C150 C154 C136 C135 C230 C137 C162
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VDDR1#4 PCIE_VDDR#4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6
J23 VDDR1#5 PCIE_VDDR#5 AE25
J24 VDDR1#6 PCIE_VDDR#6 AE26
J9 VDDR1#7 PCIE_VDDR#7 AF25
K10 VDDR1#8 PCIE_VDDR#8 AG26
D K23 D
VDDR1#9 +1.0V_VGA
K24 VDDR1#10
K9 VDDR1#11 PCIE_VDDC#1 L23
C645 C624 C395 L11 L24 +1.0V_PCIE_VDDC
10U/6.3VS_6 10U/6.3VS_6 VDDR1#12 PCIE_VDDC#2
10U/6.3VS_6 L12 VDDR1#13 PCIE_VDDC#3 L25 1.0V(2.0A) *0_8/s
L13 L26 +1.0V_PCIE_VDDC L26
VDDR1#14 PCIE_VDDC#4
L20 VDDR1#15 PCIE_VDDC#5 M22
L21 N22 PV change to short-pad
VDDR1#16 PCIE_VDDC#6 C304 C280 C269 C294 C260 C299 C319 C307
L22 VDDR1#17 PCIE_VDDC#7 N23
1.8V(110mA VDD_CT) +1.8V_VDD_CT N24 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6
PCIE_VDDC#8
PCIE_VDDC#9 R22
L22 PBY160808T-121Y-N/2.5A_6 +1.8V_VDD_CT T22
+1.8V_VGA LEVEL PCIE_VDDC#10
PCIE_VDDC#11 U22
TRANSLATION V22
C163 C167 C241 C168 C249 PCIE_VDDC#12 +VGA_CORE
AA20 VDD_CT#1 VDDC+VDDCI
Gated 3.3V 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 AA21 0.85~1.1V(15A peak )( Ripple < 87.2mV)
VDD_CT#2
60mA by AB20 VDD_CT#3 VDDC#1 AA15

1
+3V_DELAY AB21 CORE N15
VDDC VDD_CT#4 VDDC#2 +
VDDC#3 N17
+3V_VGA L19 *0_6/s +3V_DELAY Seymour-S3 R13 C86 C92 C293 C276 C91 C268 C277 C519 C773
VDDC#4

POWER
R16 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_41U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 *330u_2.5V_3528

2
VDDC#5
VDD_R3 --IO power for AA17 VDDR3#1 VDDC#6 R18
PV change to short-pad C228 C226 C279 C243 AA18 I/O Y21
3.3 V pins (e.g. VDDR3#2 VDDC#7
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 AB17 T12
GPIO’s). 3.3 V ± 5% VDDR3#3 VDDC#8
AB18 VDDR3#4 VDDC#9 T15
VDDC#10 T17
V12 VDDR4#1 / VDDR5 VDDC#11 T20
+VDDR4 Y12 U13 C85 C323 C262 C305 C272 C257 C258
VDDR4#2 VDDC#12 1U/6.3V_4 2.2U/6.3V_4 1U/6.3V_4 10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
U12 VDDR4#3 / VDDR5 VDDC#13 U16
+1.8V_VGA L23 +VDDR4 U18
C VDDC#14 C
AA11 NC#1 / VDDR4 VDDC#15 V21
PBY160808T-121Y-N/2.5A_6 C209 C212 C256 Y11 V15
TP230 DVCLK / VDDR4 VDDC#16
1.8V(170mA VDDR4) 10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 V17
VDDC#17
V11 NC#3 / VDDR5 VDDC#18 V20
U11 NC / VDDR5 VDDC#20 Y13
Y16 C259 C286 C275 C87 C79 C247
VDDC#21 1U/6.3V_4 2.2U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VDDC#22 Y18
1.8V(75mA MPV18) VDDC#23 /BIF_VDDC R21
VDDC#19/BIF_VDDC U21
L50 BLM18PG471SN1D/1A_6 +MPV18 MEM CLK
+1.8V_VGA
L17 VDDRHA
C600 C602 L16 ISOLATED
1U/6.3V_4 0.1U/10V_4 VSSRHA CORE I/O C81 C88 C83 C521 C520 C82
M13 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
PLL VDDCI#1
1.8V(40mA PCIE_PVDD) VDDCI#2 M15
+1.8V_PCIE_VDDR AM30 PCIE_PVDD VDDCI#3 M16
1.8V(90mA SPV18) VDDCI#4 M17
VDDCI#5 M18
L27 PBY160808T-121Y-N/2.5A_6 +SPV18 +MPV18 L8 M20
+1.8V_VGA MPV18 VDDCI#6
VDDCI#7 M21
N20 BIF_VDDC R112 *0_4
VDDCI#8 +VGA_CORE
C317 C295 1.0V_VGA(100mA SPV10) +SPV18 H7
1U/6.3V_4 0.1U/10V_4 SPV18
RA
L29 BLM18PG471SN1D/1A_6 +1.0V_VGA_SPV10 H8
+1.0V_VGA SPV10 PV change to short-pad
J7 SPVSS
C337 C332 C328 0.95V~1.1V(2A VDDCI) *0_8/s
10U/6.3VS_6 0.1U/10V_4 1U/6.3V_4 +VDDCI L24
+VGA_CORE
B BACK BIAS B
M11 C329 C313 C306 C265 C266 C315
+5V BBP#1 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
8,11,21,22,23,25,28,30,39 +5V M12 BBP#2
+3V
2,4,6,8,9,10,11,12,13,14,20,22,23,24,25,27,28,29,30,34,37,39 +3V
+1.0V_VGA
14,15,36 +1.0V_VGA +3V_VGA
37 +3V_VGA
+VGA_CORE Seymour-S3
37 +VGA_CORE
AJ080900T01
FCBGA631-AMD-M92-S2

^ƵƉƉŽƌƚKDŽĚĞ +5V +5V

+3V 37 PX_MODE1 Q10 Q27 BIF_VDDC


+3V AO3416 AO3416
3

R337 R336
SI R330 1K/F_4 1K/F_4 +1.0V_VGA 1 3 3 1
*10K/F_4
PX_EN 2 Q41
3

R323 PX_EN## C325 C287 C297 C270 C271

2
2N7002E 100K/F_4 Q25 PX_EN# PX_EN# 22U/6.3VS_8 10U/6.3VS_6 10U/6.3VS_6 2.2U/6.3V_4 2.2U/6.3V_4
Q9 Q26
37 PX_MODE AO3416 AO3416
2 2N7002E
1
3

3
3

+VGA_CORE 1 3 3 1

18 PX_EN 2 2 Q28 2 Q30


1

4,10,29 ECPWROK 2 2N7002E 2N7002E

2
A Q29 PX_EN## A
R94 Q31 2N7002E +3V
2N7002E 0.1U/10V_4
1

5.1K_4 C592
1

Note1.
7,29,36,37 VGA_PWROK 2
BACO_EN 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra)
352-(&75
4XDQWD&RPSXWHU,QF
R500 4
PX_MODE 1
PX_MODE PX_MODE1 2. BACO Support: Refer to the BACO reference
U18
schematics/Application note for detail about BIF_VDDC Rail
3

PX_EN = 0, for Normal Operation TC7SH08FU Size Document Number Rev


*0_4 if BACO is Supported (Uninstall Ra) Custom 1A
PX_EN = 1, for BACO MODE Seymour_Power_and_NC
Date: Tuesday, May 03, 2011 Sheet 17 of 40
5 4 3 2 1
5 4 3 2 1

19
19

19
VMA_ODT0
VMA_ODT1

VMA_RAS0#
VMA_ODT0
VMA_ODT1

VMA_RAS0#
VMA_RAS1#
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
K27
J29
H30
U17C

DQA_0
DQA_1
DQA_2
MAA_0
MAA_1
MAA_2
K17
J20
H23
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
18
19 VMA_RAS1# H32 DQA_3 MAA_3 G23
VMA_DQ4 G29 G24 VMA_MA4
VMA_CAS0# VMA_DQ5 DQA_4 MAA_4 VMA_MA5
19 VMA_CAS0# F28 DQA_5 MAA_5 H24
19 VMA_CAS1# VMA_CAS1# VMA_DQ6 F32 J19 VMA_MA6
VMA_DQ7 DQA_6 MAA_6 VMA_MA7
F30 DQA_7 MAA_7 K19
VMA_WE0# VMA_DQ8 VMA_MA8

MEMORY INTERFACE
19 VMA_WE0# C30 DQA_8 MAA_8 J14
VMA_WE1# VMA_DQ9 F27 K14 VMA_MA9
D
19 VMA_WE1# DQA_9 MAA_9 D
VMA_DQ10 A28 J11 VMA_MA10
VMA_CS0# VMA_DQ11 DQA_10 MAA_10 VMA_MA11
19 VMA_CS0# C28 DQA_11 MAA_11 J13
VMA_DQ12 E27 H11 VMA_MA12
VMA_CS1# VMA_DQ13 DQA_12 MAA_12 VMA_BA2
19 VMA_CS1# G26 DQA_13 MAA_13/BA2 G11
VMA_DQ14 D26 J16 VMA_BA0
VMA_CKE0 VMA_DQ15 DQA_14 MAA_14/BA0 VMA_BA1
19 VMA_CKE0 F25 DQA_15 MAA_15/BA1 L15
19 VMA_CKE1 VMA_CKE1 VMA_DQ16 A25
VMA_DQ17 DQA_16 VMA_DM0
C25 DQA_17 DQMA_0 E32
VMA_CLK0 VMA_DQ18 E25 E30 VMA_DM1
19 VMA_CLK0 DQA_18 DQMA_1
19 VMA_CLK0# VMA_CLK0# VMA_DQ19 D24 A21 VMA_DM2
VMA_DQ20 DQA_19 DQMA_2 VMA_DM3
E23 DQA_20 DQMA_3 C21
VMA_CLK1 VMA_DQ21 F23 E13 VMA_DM4
19 VMA_CLK1 DQA_21 DQMA_4
19 VMA_CLK1# VMA_CLK1# VMA_DQ22 D22 D12 VMA_DM5
VMA_DQ23 DQA_22 DQMA_5 VMA_DM6
F21 DQA_23 DQMA_6 E3
VMA_WDQS[7..0] VMA_DQ24 E21 F4 VMA_DM7
19 VMA_WDQS[7..0] VMA_DQ25 DQA_24 DQMA_7
D20 DQA_25
VMA_RDQS[7..0] VMA_DQ26 F19 H28 VMA_RDQS0
19 VMA_RDQS[7..0] VMA_DQ27 DQA_26 RDQSA_0 VMA_RDQS1
A19 DQA_27 RDQSA_1 C27
VMA_DM[7..0] VMA_DQ28 D18 A23 VMA_RDQS2
19 VMA_DM[7..0] DQA_28 RDQSA_2
VMA_DQ29 F17 E19 VMA_RDQS3
VMA_DQ[63..0] VMA_DQ30 DQA_29 RDQSA_3 VMA_RDQS4
19 VMA_DQ[63..0] A17 DQA_30 RDQSA_4 E15
VMA_DQ31 C17 D10 VMA_RDQS5
VMA_MA[13..0] VMA_DQ32 DQA_31 RDQSA_5 VMA_RDQS6
19 VMA_MA[13..0] E17 DQA_32 RDQSA_6 D6
VMA_DQ33 D16 G5 VMA_RDQS7
VMA_DQ34 DQA_33 RDQSA_7
F15 DQA_34
19 VMA_BA0 VMA_BA0 VMA_DQ35 A15 H27 VMA_WDQS0
VMA_BA1 VMA_DQ36 DQA_35 W DQSA_0 VMA_WDQS1
19 VMA_BA1 D14 DQA_36 W DQSA_1 A27
VMA_BA2 VMA_DQ37 F13 C23 VMA_WDQS2
19 VMA_BA2 DQA_37 W DQSA_2
VMA_DQ38 A13 C19 VMA_WDQS3
VMA_DQ39 DQA_38 W DQSA_3 VMA_WDQS4
C13 DQA_39 W DQSA_4 C15
C VMA_DQ40 E11 E9 VMA_WDQS5 C
VMA_DQ41 DQA_40 W DQSA_5 VMA_WDQS6
A11 DQA_41 W DQSA_6 C5
VMA_DQ42 C11 H4 VMA_WDQS7
VMA_DQ43 DQA_42 W DQSA_7
F11 DQA_43
support 1Gbit VMA_DQ44 A9 L18 VMA_ODT0
VMA_DQ45 DQA_44 ODTA0 VMA_ODT1
VRAM ( 64M X 16 ) C9 DQA_45 ODTA1 K16
VMA_DQ46 F9
VMA_DQ47 DQA_46 VMA_CLK0
D8 DQA_47 CLKA0 H26
DIVIDER RESISTORS GDDR5 DDR3 VMA_DQ48 E7 H25 VMA_CLK0# DRAM_RST R129 10_4 DRAM_RST_M
DQA_48 CLKA0B DRAM_RST_M 19
VMA_DQ49 A7 R132 51_4
VMA_DQ50 DQA_49 VMA_CLK1
C7 DQA_50 CLKA1 G9
MVREF TO 1.8V (Ra) 40.2R 40.2R VMA_DQ51 F7 H9 VMA_CLK1#
VMA_DQ52 DQA_51 CLKA1B R128 C335
A5 DQA_52
VMA_DQ53 E5 G22 VMA_RAS0#
VMA_DQ54 DQA_53 RASA0B VMA_RAS1# 5.1K_4 120P/50V_4
MVREF TO GND (Rb) 100R 100R VMA_DQ55
C3 DQA_54 RASA1B G17
E1 DQA_55
VMA_DQ56 G7 G19 VMA_CAS0#
+1.5V_VGA VMA_DQ57 DQA_56 CASA0B VMA_CAS1#
G6 DQA_57 CASA1B G16 8/25 SI for AMD.
VMA_DQ58 G1
VMA_DQ59 DQA_58 VMA_CS0#
G3 DQA_59 CSA0B_0 H22
PLACE MVREFD DIVIDERS VMA_DQ60 J6 J22
R160 VMA_DQ61 DQA_60 CSA0B_1
AND CAPS CLOSE TO ASIC J1 DQA_61
VMA_DQ62 VMA_CS1#
Ra 40.2/F_4 VMA_DQ63
J3
J5
DQA_62 CSA1B_0 G13
K13
DQA_63 CSA1B_1
MVREFD K26 K20 VMA_CKE0
MVREFDA CKEA0 VMA_CKE1
J26 MVREFSA CKEA1 J17
+1.5V_VGA +1.5V_VGA
R384 243/F_4 J25 G25 VMA_WE0#
C326 R156 R131 5.1K_4 MEM_CALRN0 W EA0B VMA_WE1#
K7 NC/TESTEN#2 W EA1B H10
B B
0.1U/10V_4
Rb 100/F_4 R175 R127 150/F_4 PX_EN
Ra J8
K25
MEM_CALRP1/DPC_CALR PX_EN AB16
G14
PX_EN 17
40.2/F_4 R385 243/F_4 MEM_CALRP0 RSVD#2 VMA_MA13
RSVD#3 G20
DRAM_RST L10
MVREFS DRAM_RST
CLKTESTA K8
CLKTESTB CLKTESTA
L7 CLKTESTB
C333 R167
Rb Seymour-S3
0.1U/10V_4 100/F_4 AJ080900T01
C316 C591 FCBGA631-AMD-M92-S2
*0.1U/10V_4 *0.1U/10V_4

R118 R314
*51.1/F_4 *51.1/F_4

route 50ohms
single-ended/100ohms diff
and keep short
+1.5V_VGA Debug only, for clock observation,
17,19,37 +1.5V_VGA
A if not needed, DNI A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Seymour/MEM_Interface 1A

Date: Tuesday, May 03, 2011 Sheet 18 of 40


5 4 3 2 1
5 4 3 2 1

VMA_MA[13..0]

19
18 VMA_MA[13..0]
1GB DDR3
18 VMA_DQ[63..0]
18 VMA_DM[7..0] 18 VMA_WDQS[7..0]
18 VMA_RDQS[7..0]
U7 U19 U6 U20

VREFC_VMA1 M9 E4 VMA_DQ20 VREFC_VMA2 M9 E4 VMA_DQ27 VREFC_VMA3 M9 E4 VMA_DQ38 VREFC_VMA4 M9 E4 VMA_DQ48


VREFD_VMA1 VREFCA DQL0 VMA_DQ18 VREFD_VMA2 VREFCA DQL0 VMA_DQ31 VREFD_VMA3 VREFCA DQL0 VMA_DQ32 VREFD_VMA4 VREFCA DQL0 VMA_DQ52
H2 F8 H2 F8 H2 F8 H2 F8
VREFDQ DQL1 VMA_DQ22 VREFDQ DQL1 VMA_DQ25 VREFDQ DQL1 VMA_DQ36 VREFDQ DQL1 VMA_DQ53
DQL2 F3 DQL2 F3 DQL2 F3 DQL2 F3
VMA_MA0 N4 F9 VMA_DQ17 VMA_MA0 N4 F9 VMA_DQ29 VMA_MA0 N4 F9 VMA_DQ34 VMA_MA0 N4 F9 VMA_DQ54
VMA_MA1 A0 DQL3 VMA_DQ23 VMA_MA1 A0 DQL3 VMA_DQ30 VMA_MA1 A0 DQL3 VMA_DQ39 VMA_MA1 A0 DQL3 VMA_DQ49
P8 A1 DQL4 H4 P8 A1 DQL4 H4 P8 A1 DQL4 H4 P8 A1 DQL4 H4
VMA_MA2 P4 H9 VMA_DQ16 VMA_MA2 P4 H9 VMA_DQ28 VMA_MA2 P4 H9 VMA_DQ33 VMA_MA2 P4 H9 VMA_DQ51
VMA_MA3 A2 DQL5 VMA_DQ21 VMA_MA3 A2 DQL5 VMA_DQ24 VMA_MA3 A2 DQL5 VMA_DQ37 VMA_MA3 A2 DQL5 VMA_DQ50
N3 A3 DQL6 G3 N3 A3 DQL6 G3 N3 A3 DQL6 G3 N3 A3 DQL6 G3
VMA_MA4 P9 H8 VMA_DQ19 VMA_MA4 P9 H8 VMA_DQ26 VMA_MA4 P9 H8 VMA_DQ35 VMA_MA4 P9 H8 VMA_DQ55
VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7
P3 P3 P3 P3
D VMA_MA6 A5 VMA_MA6 A5 VMA_MA6 A5 VMA_MA6 A5 D
R9 R9 R9 R9
VMA_MA7 A6 VMA_DQ0 VMA_MA7 A6 VMA_DQ15 VMA_MA7 A6 VMA_DQ43 VMA_MA7 A6 VMA_DQ60
R3 D8 R3 D8 R3 D8 R3 D8
VMA_MA8 A7 DQU0 VMA_DQ5 VMA_MA8 A7 DQU0 VMA_DQ10 VMA_MA8 A7 DQU0 VMA_DQ44 VMA_MA8 A7 DQU0 VMA_DQ58
T9 A8 DQU1 C4 T9 A8 DQU1 C4 T9 A8 DQU1 C4 T9 A8 DQU1 C4
VMA_MA9 R4 C9 VMA_DQ1 VMA_MA9 R4 C9 VMA_DQ13 VMA_MA9 R4 C9 VMA_DQ40 VMA_MA9 R4 C9 VMA_DQ63
VMA_MA10 A9 DQU2 VMA_DQ4 VMA_MA10 A9 DQU2 VMA_DQ9 VMA_MA10 A9 DQU2 VMA_DQ47 VMA_MA10 A9 DQU2 VMA_DQ56
L8 C3 L8 C3 L8 C3 L8 C3
VMA_MA11 A10/AP DQU3 VMA_DQ2 VMA_MA11 A10/AP DQU3 VMA_DQ12 VMA_MA11 A10/AP DQU3 VMA_DQ42 VMA_MA11 A10/AP DQU3 VMA_DQ61
R8 A11 DQU4 A8 R8 A11 DQU4 A8 R8 A11 DQU4 A8 R8 A11 DQU4 A8
VMA_MA12 N8 A3 VMA_DQ7 VMA_MA12 N8 A3 VMA_DQ8 VMA_MA12 N8 A3 VMA_DQ45 VMA_MA12 N8 A3 VMA_DQ57
VMA_MA13 A12/BC DQU5 VMA_DQ3 VMA_MA13 A12/BC DQU5 VMA_DQ14 VMA_MA13 A12/BC DQU5 VMA_DQ41 VMA_MA13 A12/BC DQU5 VMA_DQ62
T4 B9 T4 B9 T4 B9 T4 B9
A13 DQU6 VMA_DQ6 A13 DQU6 VMA_DQ11 A13 DQU6 VMA_DQ46 A13 DQU6 VMA_DQ59
T8 A4 T8 A4 T8 A4 T8 A4
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M8 M8 M8 M8
A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA

M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3


18 VMA_BA0 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3
N9 D10 VMA_BA1 N9 D10 VMA_BA1 N9 D10 VMA_BA1 N9 D10
18 VMA_BA1 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10
18 VMA_BA2 M4 BA2 VDD#G8 G8 M4 BA2 VDD#G8 G8 M4 BA2 VDD#G8 G8 M4 BA2 VDD#G8 G8
VDD#K3 K3 VDD#K3 K3 VDD#K3 K3 VDD#K3 K3
VDD#K9 K9 VDD#K9 K9 VDD#K9 K9 VDD#K9 K9
VDD#N2 N2 VDD#N2 N2 VDD#N2 N2 VDD#N2 N2
J8 N10 VMA_CLK0 J8 N10 J8 N10 VMA_CLK1 J8 N10
18 VMA_CLK0 CK VDD#N10 VMA_CLK0# CK VDD#N10 18 VMA_CLK1 CK VDD#N10 VMA_CLK1# CK VDD#N10
18 VMA_CLK0# K8 CK VDD#R2 R2 K8 CK VDD#R2 R2 18 VMA_CLK1# K8 CK VDD#R2 R2 K8 CK VDD#R2 R2
K10 R10 VMA_CKE0 K10 R10 K10 R10 VMA_CKE1 K10 R10
18 VMA_CKE0 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA 18 VMA_CKE1 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA

K2 A2 VMA_ODT0 K2 A2 K2 A2 VMA_ODT1 K2 A2
18 VMA_ODT0 ODT/ODT0 VDDQ#A2 VMA_CS0# ODT/ODT0 VDDQ#A2 18 VMA_ODT1 ODT/ODT0 VDDQ#A2 VMA_CS1# ODT/ODT0 VDDQ#A2
18 VMA_CS0# L3 A9 L3 A9 18 VMA_CS1# L3 A9 L3 A9
CS /CS0 VDDQ#A9 VMA_RAS0# CS /CS0 VDDQ#A9 CS /CS0 VDDQ#A9 VMA_RAS1# CS /CS0 VDDQ#A9
18 VMA_RAS0# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2 18 VMA_RAS1# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2
K4 C10 VMA_CAS0# K4 C10 K4 C10 VMA_CAS1# K4 C10
18 VMA_CAS0# CAS VDDQ#C10 VMA_WE0# CAS VDDQ#C10 18 VMA_CAS1# CAS VDDQ#C10 VMA_WE1# CAS VDDQ#C10
18 VMA_WE0# L4 D3 L4 D3 18 VMA_WE1# L4 D3 L4 D3
WE VDDQ#D3 WE VDDQ#D3 WE VDDQ#D3 WE VDDQ#D3
E10 E10 E10 E10
VDDQ#E10 VDDQ#E10 VDDQ#E10 VDDQ#E10
VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2
VMA_RDQS2 F4 H3 VMA_RDQS3 F4 H3 VMA_RDQS4 F4 H3 VMA_RDQS6 F4 H3
VMA_RDQS0 DQSL VDDQ#H3 VMA_RDQS1 DQSL VDDQ#H3 VMA_RDQS5 DQSL VDDQ#H3 VMA_RDQS7 DQSL VDDQ#H3
C8 DQSU VDDQ#H10 H10 C8 DQSU VDDQ#H10 H10 C8 DQSU VDDQ#H10 H10 C8 DQSU VDDQ#H10 H10
C C

VMA_DM2 E8 A10 VMA_DM3 E8 A10 VMA_DM4 E8 A10 VMA_DM6 E8 A10


VMA_DM0 DML VSS#A10 VMA_DM1 DML VSS#A10 VMA_DM5 DML VSS#A10 VMA_DM7 DML VSS#A10
D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4
VSS#E2 E2 VSS#E2 E2 VSS#E2 E2 VSS#E2 E2
VSS#G9 G9 VSS#G9 G9 VSS#G9 G9 VSS#G9 G9
VMA_WDQS2 G4 J3 VMA_WDQS3 G4 J3 VMA_WDQS4 G4 J3 VMA_WDQS6 G4 J3
VMA_WDQS0 DQSL VSS#J3 VMA_WDQS1 DQSL VSS#J3 VMA_WDQS5 DQSL VSS#J3 VMA_WDQS7 DQSL VSS#J3
B8 J9 B8 J9 B8 J9 B8 J9
DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9
M2 M2 M2 M2
VSS#M2 VSS#M2 VSS#M2 VSS#M2
M10 M10 M10 M10
VSS#M10 VSS#M10 VSS#M10 VSS#M10
P2 P2 P2 P2
VSS#P2 DRAM_RST_M T3 VSS#P2 DRAM_RST_M T3 VSS#P2 DRAM_RST_M T3 VSS#P2
18 DRAM_RST_M T3 P10 P10 P10 P10
RESET VSS#P10 RESET VSS#P10 RESET VSS#P10 RESET VSS#P10
VSS#T2 T2 VSS#T2 T2 VSS#T2 T2 VSS#T2 T2
VMA_ZQ1 L9 T10 VMA_ZQ2 L9 T10 VMA_ZQ3 L9 T10 VMA_ZQ4 L9 T10
ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10

A1 B2 A1 B2 A1 B2 A1 B2
NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2
T1 B10 T1 B10 T1 B10 T1 B10
R174 NC VSSQ#B10 R389 NC VSSQ#B10 R159 NC VSSQ#B10 R379 NC VSSQ#B10
Should be 243 A11
NC VSSQ#D2
D2 Should be 243 A11
NC VSSQ#D2
D2 Should be 243 A11
NC VSSQ#D2
D2 Should be 243 A11
NC VSSQ#D2
D2
Ohms +-1% 243/F_4 T11 D9 Ohms +-1% 243/F_4 T11 D9 Ohms +-1% 243/F_4 T11 D9 Ohms +-1% 243/F_4 T11 D9
NC VSSQ#D9 NC VSSQ#D9 NC VSSQ#D9 NC VSSQ#D9
E3 E3 E3 E3
VSSQ#E3 VSSQ#E3 VSSQ#E3 VSSQ#E3
J2 E9 J2 E9 J2 E9 J2 E9
NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
L2 F10 L2 F10 L2 F10 L2 F10
NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
J10 G2 J10 G2 J10 G2 J10 G2
NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
L10 G10 L10 G10 L10 G10 L10 G10
NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W2G1646C-HC11 K4W2G1646C-HC11 K4W2G1646C-HC11 K4W2G1646C-HC11

+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA


B B

R401 R148 R392 R146 R185 R165 R383 R378


4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4

R400 R151 R405 R153 R183 R181 R388 R386


4.99K/F_4 C644 4.99K/F_4 C372 4.99K/F_4 C650 4.99K/F_4 C369 4.99K/F_4 C402 4.99K/F_4 C396 4.99K/F_4 C626 4.99K/F_4 C623
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

VMA_CLK0 +1.5V_VGA +1.5V_VGA

R161
56.2/F_4
C355 C357 C406 C397 C393 C349 C347 C655 C620 C618 C651 C346 C654 C636 C614 C611
QCI PN
C374
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
VMA_CLK0_COMM
SAM 1G AKD5MGWT500
R169 0.01U/25V_4 +1.5V_VGA +1.5V_VGA
56.2/F_4
HYU 1G AKD5MGWTW00

VMA_CLK0#
SAMSUNG AKD5EGGT500
A VMA_CLK1 C653 C648 C637 C403 C408 C345 C641 C643 C627 C622 C628 C632 C639 C642 C400 C405 A
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 HYNIX AKD5LZWTW02
R154
56.2/F_4
+1.5V_VGA
C385

+1.5V_VGA
VMA_CLK1_COMM
352-(&75
17,18,37 +1.5V_VGA
R158 0.01U/25V_4 C656 C633 C410 C409
4XDQWD&RPSXWHU,QF
56.2/F_4 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6
Size Document Number Rev
Custom 3A
VMA_CLK1#
Seymour VRAM(DDR3 BGA96)
Date: Tuesday, May 03, 2011 Sheet 19 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

20
LID Switch PV change to short-pad
D3
BLON_CON
RB500V-40
C101

R69
22P/50V_4

100K/F_4
+TRAVIS3.3V
+3VLCD_CON

D23 *CH501H-40PT
R54 *0_4/s 2 1 R25 2.2K_4 EDIDCLK C17 *10P/50V_4 C16 2 1 *0.047U/10V_4
29 EMU_LID HWPG 4,29,31,32,33,36
A R26 2.2K_4 EDIDDATA C20 *10P/50V_4 A
+1.5V +3V
R45 100K/F_4 C15 2 1 *0.047U/10V_4

R781 R783 11 LVDS_BLON


LVDS_BLON R49 1K/F_4 PN_BLON RF
*2.2k_4 *10K_4

G_0
2

3
Q51 C18 1000P/50V_4 1
2
4 APU_BLEN 1 3 8 LCD_BK 2 +TRAVIS3.3V 3
*MMBT3904-7-F Q2 11 EDIDCLK EDIDCLK
EDIDDATA 4
11 EDIDDATA 5
*DTC144EUA TXLOUT0-
11 TXLOUT0-

1
TXLOUT0+ 6
11 TXLOUT0+ 7
TXLOUT1- 8
11 TXLOUT1- 9
11 TXLOUT1+ TXLOUT1+
10 G_1
TXLOUT2- 11
11 TXLOUT2- 12
TXLOUT2+
11 TXLOUT2+ 13
PV change to short-pad
TXLCLKOUT- 14
11 TXLCLKOUT- 15
R43 *0_4/s +3V_CAM C45 *4.7U/6.3V_6 TXLCLKOUT+
+3V 11 TXLCLKOUT+ 16
C48 *0.01U/25V_4 TXUOUT0- 17
11 TXUOUT0- 18 G_2
TXUOUT0+
11 TXUOUT0+ 19
TXUOUT1- 20
11 TXUOUT1- 21
DPST_PWM TXUOUT1+
11 DPST_PWM 11 TXUOUT1+ 22
TXUOUT2- 23
B
11 TXUOUT2- 24 G_3 B
C61 33P/50V_4 TXUOUT2+
11 TXUOUT2+ 25
TXUCLKOUT- 26
11 TXUCLKOUT- 27
TXUCLKOUT+
11 TXUCLKOUT+ 28
SI EMI PV change to short-pad
29
follow L7 Location 25
25
DIGITAL_D1
DIGITAL_CLK L6 DIGITAL_CLK_L 30
31 G_4
SBK160808T-601Y-N/0.2A_6 +3V_CAM
C768 *150P/50V_4 USBP2- R44 *0_4/sUSBP2-_R L7 4 USBP2-_R 32
+3V 6 USBP2- 3 33
C40 C44 1 2 USBP2+_R
C803 *150P/50V_4 USBP2+ R46 *0_4/sUSBP2+_R EMI *10P/50V_4
6
*10P/50V_4
USBP2+ 34
35
*WCM-2012-900T(400mA) DPST_PWM
C804 *150P/50V_4 BLON_CON 36
37
L8 +VIN_BLIGHT 38
+VIN 39
40

G_5
FBM2125 HM330-T/4A_8
EMI & RF C77 C78 CN2
0.01U/25V_4 0.1U/25V_4 GS12407-11141-9H

+VIN

C73 C96
Coupling CAP. *4.7U/25V_8 0.1U/25V_4

+VIN +VIN

C C751 *0.1U/25V_4 C761 470P/50V_4 C

C752 *0.1U/25V_4 C762 *0.1U/25V_4

C753 *0.1U/25V_4 C763 *0.1U/25V_4

C754 220pF/50V_4 C764 150P/50V_4


+3V +3VLCD
C755 *0.1U/25V_4 C765 150P/50V_4 SI EMI
+3VLCD_CON
C756 *0.1U/25V_4 C766 150P/50V_4
C107 U33
C757 *0.1U/25V_4 C767 *0.1U/25V_4 L4
1U/6.3V_4 5 1 TI201209U600_8
C758 *0.1U/25V_4 C769 *0.1U/25V_4 IN OUT

1
11 DISP_ON R789 0_4 4 2
C759 *0.1U/25V_4 C770 *0.1U/25V_4 IN GND C23 C24 C22
DISP_ON_L 3 0.01U/16V_4 0.1U/10V_4 10U/6.3V_8

2
C760 *0.1U/25V_4 ON/OFF
+1.5V +3V
IC(5P) G5243AT11U
MV EMI suggestion R785 R786 R20
*2.2k_4 *10K_4 100K/F_4
2

Q52
4 APU_DIGON 1 3
*MMBT3904-7-F

D PV change for reduce circuit! D

352-(&75
4XDQWD&RPSXWHU,QF
4,7,26,28,29,31,38 +3VPCU
2,4,6,8,9,10,11,12,13,14,17,22,23,24,25,27,28,29,30,34,37,39 +3V
9,37,38,39 +12VALW Size Document Number Rev
Custom LCD CONN/LID/CAM 1A
31,32,33,34,35,36,37,38,39 +VIN
Date: Tuesday, May 03, 2011 Sheet 20 of 40
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+'0,3257

D.G recommend 604ohm
A R791 604/F_4 C_TX2_HDMI+ A

R792 604/F_4 C_TX2_HDMI- EMI reserve.


+5V

3
R793 604/F_4 C_TX1_HDMI+ C_TX2_HDMI+ R504 *100/F_4 C_TX2_HDMI-
Q68 C_TX1_HDMI+ R505 *100/F_4 C_TX1_HDMI-
2N7002E R794 604/F_4 C_TX1_HDMI- C_TX0_HDMI+ R506 *100/F_4 C_TX0_HDMI-
2 C_TXC_HDMI+ R507 *100/F_4 C_TXC_HDMI-
R795 604/F_4 C_TX0_HDMI+

R796 604/F_4 C_TX0_HDMI-


L32 *WCM2012-90

1
R816 R797 604/F_4 C_TXC_HDMI+ C_TX2_HDMI+ 4 3 CN18
2 C_TX2_HDMI+
C_TX2_HDMI- 1 2 20
2 C_TX2_HDMI- SHELL1
R798 604/F_4 C_TXC_HDMI- C_TX2_HDMI+ 1 21
100K/F_4 L30 *WCM2012-90 C_TX2_HDMI- D2+ SHELL2
3 D2-
C_TX1_HDMI+ 4 3 C_TX1_HDMI+ 4
Close to HDMI Connector 2
2
C_TX1_HDMI+
C_TX1_HDMI-
C_TX1_HDMI- 1 2 C_TX1_HDMI- 6
7
D1+
D1-
L31 *WCM2012-90 D0+
9 D0-
C_TX0_HDMI+ 4 3 C_TX0_HDMI+ 2
2 C_TX0_HDMI+ D2 Shield
C_TX0_HDMI- 1 2 C_TX0_HDMI- 5
2 C_TX0_HDMI- D1 Shield
L28 *WCM2012-90 8
C_TXC_HDMI+ C_TXC_HDMI+ 10 D0 Shield
2 C_TXC_HDMI+ 4 3 CK+ CK Shield 11
C_TXC_HDMI- 1 2 C_TXC_HDMI- 12 17
2 C_TXC_HDMI- CK- GND
Cost down backup solution
of HDMI DDC Level Shift *10P/50V_4 C310 HDMI_SCLK 15 13
+5V_FUSE *10P/50V_4 C303 HDMI_SDATA DDC CLK CE Remote
16 DDC DATA NC 14
B B
+5V_FUSE
+1.5V +1.5V +5V_FUSE 1A
+5V F1 2 1 FUSE1.1A6V_POLY 18 +5V

2
D20 D7 C594 *0.1U/10V_4
CH501H-40PT CH501H-40PT
C213 C219 HDMI_DET HDMI_HPD_L 19
R799 R800 *0.1U/10V_4 0.1U/10V_4 L48 0_6 HP DET

1
*2K/F_4 *2K/F_4
R801 R802 HDMI CONN
1K/F_4 1K/F_4 R316 R320 C569 DFHD19MR130
2

Q65 2K/F_4 2K/F_4 220P/50V_4 hdmi-100042mr019s172zl-19p-v


*MMBT3904-7-F
1 3 +1.5V
4 INT_HDMI_AUXN
SI EMI
2 1
D21
*RB501V-40 R803 +5V
2

Q66 10K/F_4
*MMBT3904-7-F
4 INT_HDMI_AUXP 1 3
HDMI_HPD_Q R804
4 HDMI_HPD_Q
2 1 100K/F_4

3
D22
*RB501V-40 Q67
HDMI HPD SENSE 2N7002E
2
U42

3
4 5 HDMI_SDATA Q8
C SDA1 SDA2 DMN601K-7 C
3 6 HDMI_SCLK +1.5V

1
SCL1 SCL2 HDMI_DET_R R318 200K/F_4 HDMI_DET
2
+1.5V 2 VREF1 VREF2 7

C1045 1 8 R805 200K/F_4 +5V_FUSE


0.1U/10V_4 GND EN C216 C224 R319

1
C1046 220pF/50V_4 220pF/50V_4 200K/F_4
PCA9306DCUR 0.1U/10V_4

Add I2C Level Shift IC Circuit


SI MV EMI suggestion

D D

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom HDMI CONN 1A

Date: Tuesday, May 03, 2011 Sheet 21 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CRT PORT

PV Change to CX8LL121002 for EMI suggestion
+5V_FUSE

16
6
FCH_CRT_RED L2 BK1608LL121/0.15A_6 CRT_R1 1 11
A 8 FCH_CRT_RED A
7
FCH_CRT_GRE L1 BK1608LL121/0.15A_6 CRT_G1 2 12 CRTDDCDAT2 C4 *470P/50V_4
8 FCH_CRT_GRE
8
FCH_CRT_BLU L3 BK1608LL121/0.15A_6 CRT_B1 3 13 CRTHSYNC C3 10P/50V_4
8 FCH_CRT_BLU
9
4 14 CRTVSYNC C2 10P/50V_4
R19 R16 R22 10
C9 C7 C11 C10 C6 C8 5 15 CRTDDCCLK2 C1 *470P/50V_4

150/F_4 150/F_4 150/F_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4

17
CRT CONN
EMI CN12

+3V

+5V U1
+5V +5V_CRT2 1 16 CRT_VSYNC1 R6 22_4 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRT_HSYNC1 R8 22_4 CRTHSYNC
SYNC_OUT1 14
C223 7 R13 R11
0.1U/10V_4 C5 0.22U/6.3V_4 CRT_BYP VCC_DDC 2.7K_4
8 BYP 2.7K_4
B 15 FCH_CRT_VSYNC B
SYNC_IN2 FCH_CRT_VSYNC 8
2 13 FCH_CRT_HSYNC
+3V VCC_VIDEO SYNC_IN1 FCH_CRT_HSYNC 8

CRT_R1 3 10 FCH_DDCCLK
VIDEO_1 DDC_IN1 FCH_DDCCLK 8
CRT_G1 4 11 FCH_DDCDAT
VIDEO_2 DDC_IN2 FCH_DDCDAT 8
SI EMI CRT_B1 5 VIDEO_3
9 CRTDDCCLK2 R3 2.2K_4
DDC_OUT1 CRTDDCDAT2 R2 2.2K_4 +5V_CRT2
6 GND DDC_OUT2 12 1 2 +5V_FUSE
D1 RB501V-40
IP4772

C C

HOLE CPU VGA


H10 H9 H5
H1 H6 H14 H11 H12 H3 H8 H4 H7 *h-tc248bc197d150p2 *h-tc248bc197d150p2 *h-tc248bc197d150p2
*h-c354d118p2 *h-c354d118p2 *h-c354d118p2 *h-c354d118p2 *H-C354I158D118P2 *h-c354d118p2 *H-C354I158D118P2 *H-C354I158D118P2 *IINTEL-CPU-BKT2
3
2
4

1
1

1
h-tc248bc197d150p2 h-tc248bc197d150p2 h-tc248bc197d150p2
h-c354d118p2 h-c354d118p2 h-c354d118p2 h-c354d118p2 H-C354I158D118P2 h-c354d118p2 H-C354I158D118P2 H-C354I158D118P2 INTEL-CPU-BKT2

H2
*h-c236d118p2 H13 H15
*h-c236d118p2 *h-c354d118p2
PAD2
*EMIPAD
1

h-c236d118p2
H-tc354bc236d118p2 h-c354d118p2

D D
For EMI

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom CRT,Hole 1A

Date: Tuesday, May 03, 2011 Sheet 22 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CPU FAN
C518 2.2U/6.3V_4
CN16
SATA HDD CONNECTOR

+5V_FAN 1
C517 0.1U/10V_4 1
2 5
29 FAN1SIG 3
2
3
5
4 4 CN23 Bypass CAP close conn
+3V R290 4.7K_4 FAN CONN
1 1
A DFHD03MR029 2 SATA_TXP0_C C917 0.01U/25V_4 A
53398-0310-3P-L 3 SATA_TXN0_C C918 0.01U/25V_4 SATA_TXP0 8
4 SATA_TXN0 8
5 SATA_RXN0_C C674 0.01U/25V_4
6 SATA_RXP0_C C672 0.01U/25V_4 SATA_RXN0 8
7 SATA_RXP0 8
8
9 +3V +5V

Main HDD
10
FANPWR = 1.6*VSET 11

U2
30 MIL 12
13 +5V
2 3 +5V_FAN 14
+5V VIN VO
GND 5 15
R42 10K/F_4THERM_OVER# 1 6 16
+5V /FON GND
7 17
GND C490 C481 C485 C489
29 VFAN 4 VSET GND 8 18
19 19 10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8
G991PV11

+5V 8 7 6 5 G995 layout notice SATA HDD(1ST)


Gnd shape DFHS13FS022
C37 sata-ah534-00-13p-r

1U/6.3V_4
1 2 3 4

B B

SATA ODD CONNECTOR SATA ODD


+5V

CN7

1 1
2 SATA_TXP1_C C919 0.01U/25V_4
SATA_TXN1_C C920 0.01U/25V_4 SATA_TXP1 8
3
4 SATA_TXN1 8 PV inner document DEL for wake on LAN issue
5 SATA_RXN1_C C500 0.01U/25V_4
6 SATA_RXP1_C C501 0.01U/25V_4 SATA_RXN1 8 C1051
7 SATA_RXP1 8 R817 Q70
C 8 ZERO_ODD_DP# 1 3 1M/F_4 1000P/50V_4 C
ODD_PLUGIN# 6

1
DMP2130L-7
9
10
+5V_ODD
Q69
High : ODD power on
11 ZERO_ODD_DA# R818
*10K/F_4
2 *2N7002E Low : ODD power down
PV change to short-pad R819 10K/F_4
R278
12 2 *0_8
13

3
14 8 ODD_PWR R820 *0_4/s
15 +3V

1
16 C1052

3
17 R821 29 ODD_PD R822 *0_4 2
18 *10K/F_4 Q72 .027U/25V_6 +5V_ODD

2
2

19 19 2N7002E
Q71
1 3 ODD_DA#_FCH 6 2N7002E

1
SATA ODD

DFHS13FS022
sata-ah534-00-13p-r
+5V_ODD

120 mils

C685 C502 C686 C682 C690


10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

D D

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom HDD/ODD/FAN 1A

Date: Wednesday, May 04, 2011 Sheet 23 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

24
CARD_PCIE_RST#
7 CARD_PCIE_RST#
PCIE_CARD_CLKREQ#
6 PCIE_CARD_CLKREQ#

D D
+3V CARD_EECS 6

C691 0.1U/10V_4 SD_CD#


SI
R470 6.2K/F_4 RREF SD_WP

48

46

43

39
47

44

41

38

37
45

42

40
U28

EEDO

GPIO/EEDI
CLK_REQ#
RREF

SD_CD#
EECS

SP15

SP14
PERST#
3V3_IN

EESK

MS_INS#
2 PCIE_TXP2_CARD 1 HSIP SP13 36 Footprint lqfp48-9x9-5-1_6h
2 PCIE_TXN2_CARD 2 HSIN SP12 35
CN9
3 34 1 SD_D3 +3VCARD
7 CLK_PCIE_CARD_P REFCLKP SP11 SD-DAT3
2 SD_CMD
SD-CMD
7 CLK_PCIE_CARD_N 4 REFCLKN SP10 33 GND1 3
SD-VCC 4
C504 4.7U/6.3V_6 AV12 5 32 5 SD_CLK
AV12 SP9 SD-CLK

C508

C505
C 6 C
C710 0.1U/10V_4 PCIE_RXP2_CARD_C GND2 SD_D0
2 PCIE_RXP2_CARD 6 HSOP SP8 31 SD-DAT0 7
8 SD_D1
C713 0.1U/10V_4 PCIE_RXN2_CARD_C SD-DAT1 SD_D2 C726
7 30 9
2 PCIE_RXN2_CARD HSON
Realtek RTS5219 SP7 SD-DAT2 SD_CD# R281

0.1U/10V_4

*0.1U/10V_4
SD-CD 10
8 29 11 SD_WP *150K/F_4 10U/6.3V_8
GND SP6 SD-W P
SHIELD1-GND 12
C721 0.1U/10V_4 DV12 9 28 C725 4.7U/6.3V_6 13
DV12 SP5 SHIELD2-GND
SHIELD3-GND 14
10 27 DV12_S 15
+3VCARD Card1_3V3 DV12_S SHIELD4-GND
C717 0.1U/10V_4
+3V 11 3V3_IN GND 26
L55
AV12 DV12 12 25 SD_D2_R R487 0_4 SD_D2 CLOSE CONN
*0_6 Card2_3V3 SD_D2
C509 C732 CARD READER SOCKET
Reserved 10U/6.3V_8 0.1U/10V_4 close to chip pin

SD_CMD
DV33_18
XD_CD#

SD_CLK
+3V3 cap place close chip

SD_D1

SD_D0

SD_D3
GND

SP1

SP2

SP3

SP4
RTS5219 max output current for ..
13

14

15

16

17

18

19

20

21

22

23

24
PIN 10 >= 800mA
PIN 12 >=400mA
SD_D3_R R492 0_4 SD_D3 SI EMI
B B
SD_CMD_R R488 0_4 SD_CMD

SD_CLK_R R284 33_4 SD_CLK C510 10P/50V_4


DV33_18
SD_D0_R R285 0_4 SD_D0
C734 C735 close to chip pin
SD_D1_R R283 0_4 SD_D1
*4.7U/6.3V_6 0.1U/10V_4
close to chip pin
Reserved
PV R284 Change to 33ohm for EMI suggestion

A A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom RTS5219 & CR SOCKET &HOLE 1A

Date: Tuesday, May 03, 2011 Sheet 24 of 40


5 4 3 2 1
A B C D E

2,4,6,8,9,10,11,12,13,14,17,20,22,23,24,27,28,29,30,34,37,39

8,11,17,21,22,23,28,30,39
+3V

+5V
+5V_AVDD

+4.75VAVDD +5V
25
U25
+5V_AVDD L52 +4.75VAVDD 5 1
Vout Vin
>40mils trace
0_6 4
Close to CODEC C681 C680 BYP C675 C677 C678
1U/6.3V_4 0.1U/10V_4 2 3 0.1U/10V_4 0.047U/10V_4 1U/6.3V_4
C684 GND EN
C687 C696 C720 1U/6.3V_4 TPS793475
+3V 10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4
AGND
Close to CODEC AGND R467 10K/F_4 +5V
C719 C718 Vset=1.242V
1U/6.3V_4 0.1U/10V_4 C697 U27
10U/6.3VS_6 AGND
+3V_DVDD_CORE 1 27 +5V
DVDD_CORE AVDD
+3V AVDD 38
Close to CODEC >40mils trace
9 DVDD
39 SENSE_A R489 2.49K/F_4
PVDD +5V_AVDD
3 DVDD_IO PVDD 45
AGND
C736 1000P/50V_4

Digital
C700 6 BIT_CLK_AUDIO BIT_CLK_AUDIO 6 C694 C695 C693
0.1U/10V_4 HDA_BITCLK 1U/6.3V_4 0.1U/10V_4 10U/6.3VS_6 SENSE_B R490 100K/F_4 +5V_AVDD
R483 33_4 HD_SDIN0 8 13 SENSE_A
6 ACZ_SDIN0 HDA_SDI SENSE_A SENSE_A 26

6 ACZ_SDOUT_AUDIO ACZ_SDOUT_AUDIO 5 14 SENSE_B


HDA_SDO SENSE_B
+'$%XV C709 *10P/50V_4
ACZ_SYNC_AUDIO 10 AGND
6 ACZ_SYNC_AUDIO
C724 *10P/50V_4 HDA_SYNC Close to CODEC
11 HDA_RST# HP0_PORT_A_L 28
ACZ_RST#_AUDIO 29
6 ACZ_RST#_AUDIO HP0_PORT_A_R
VREFOUT_A_or_F 23
C699 10P/50V_4
AGND SHIELD
20 DIGITAL_CLK R472 100/F_4 DMIC_CLK_R 2 31 HPOUT_L
DMIC_CLK/GPIO1 HP1_PORT_B_L HPOUT_L 26
72'LJLWDO0,& 20 DIGITAL_D1 R477 0_4 DMIC0 4 DMIC0/GPIO2 HPOUT_R
AGND SHIELD 72+HDGSKRQHMDFN
HP1_PORT_B_R 32 HPOUT_R 26
C706 10P/50V_4 AGND SHIELD
46 DMIC1/GPIO0/SPDIF_OUT_1
19 MIC_L
PORT_C_L MIC_L 26
+3V R471 10K/F_4 48 SPDIF_OUT_0 PORT_C_R 20 MIC_R
VREFOUT_C
MIC_R 26 72$XGLR-DFN0,&
VREFOUT_C 24 VREFOUT_C 26
29 VOLMUTE# ADC_EAPD# 47 EAPD L_SPK+
SPKR_PORT_D_L+ 40
D11 RB500V-40 7 41 L_SPK-
DVSS SPKR_PORT_D_L-
R_SPK-
72,QWHUQDO6SHDNHUV +5V_AVDD
SPKR_PORT_D_R- 43
CAP- 44 R_SPK+
SPKR_PORT_D_R+
35
Close to CODEC CAP-
1

C701 15
4.7U/6.3V_6 PORT_E_L
PORT_E_R 16
1 36 R498 1

Analog
2

CAP+ CAP+ 10K/F_4


PORT_F_L 17
33 AVSS PORT_F_R 18
30 C739 C744
AVSS 0.1U/10V_4 0.1U/10V_4
26 AVSS
12 AMP_BEEP AMP_BEEP_L R497 AMP_BEEP_R2
100K/F_4
MONO_OUT

PC_BEEP
VREFFILT

42 PVSS

3
VREG

+3V
CAP2

Check SB side and 49 PV ADD 0ohm for EMI suggestion


DAP R496
V-

vendor reply it C738 10K/F_4 2 ACZ_SPKR 6


should reserve only 92HD80B1X5NLGXTA48 0.01U/25V_4 R250 0_4
37

34

21

22

25

R485 AGND 2N7002E


4.7K_4 Q40

1
R499 0_4
ACZ_RST#_AUDIO
ADC_VREG ADC_CAP2 AGND R486 0_4
AGND
R276 0_4
C728 ADC_V- ADC_VREFFILT
0.01U/25V_4

R282 *0_8/S

AGND
1

C698 C707 C730 C727 EMI Request INT. SPEAKER


4.7U/6.3V_6 4.7U/6.3V_6 10U/6.3VS_6 0.1U/10V_4
2

INT SPEAKER CONN


L_SPK+ L61 SBK160808T-221Y-N/0.2A_6 L_SPK+_R
L_SPK- L60 SBK160808T-221Y-N/0.2A_6 L_SPK-_R 1
AGND AGND AGND AGND R_SPK- L59 SBK160808T-221Y-N/0.2A_6 R_SPK-_R 2
R_SPK+ L58 SBK160808T-221Y-N/0.2A_6 R_SPK+_R 3
4
BIT_CLK_AUDIO ACZ_SDIN0 Close to CODEC C740 220P/50V_4 CN11

C743 220P/50V_4

C745 220P/50V_4
C712 C715
33P/50V_4 33P/50V_4 C748 220P/50V_4

FOR EMI

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Azalia 92HD80 1A

Date: Tuesday, May 03, 2011 Sheet 25 of 40


A B C D E
1 2 3 4 5 6 7 8

BLUETOOTH LEFT SIDE USBX2


+3VPCU

R280
+3VS5

300mA
L33
1A
+5V_USBP0
C356

*0.1U/10V_4

1
CN19
1 GND 8
26

1
*4.7K_4 4 3 USBP0- 2 7
6 USBP0- 2 GND +5VS5
Q16
6 USBP0+ 1 2 USBP0+ 3 3 GND 6
U23
80 mils (Iout=2A) +5V_USBP0 2A
2 *WCM2012-90
4 4 GND 5
2A 2 8+5V_USBP0 C348 470P/50V_4
+3VPCU_BT VIN1 OUT3
*ME2303-G SI C1067 C1068 USB CONN 3 VIN2 OUT2 7 C351 0.1U/10V_4
5.6P/16V_4 5.6P/16V_4 29 USBPW_ON# 4 6 C414 470P/50V_4
A C664 EN OUT1 C413 0.1U/10V_4 A
24mil 300mA 1 5

1
Q17 GND OC

3
3
+3VPCU_BT G547E2P81U C660

+
2

2
C503 C1065 1U/6.3V_4
2 *Clamp-Diode_6 C1066
8 BT_OFF# 100U/25V
C498 *Clamp-Diode_6
*0.01U/25V_4 *0.1U/10V_4 C499
*DTC144EUA *10U/6.3V_8 PV ADD 5.6pF for USB Rising and Falling time
1

C411

CN8
1A *0.1U/10V_4 Right SIDE USBX1
*BLUE TOOTH CONN CN20
87213-0600-6P-L L36 +5V_USBP0 1 1 GND 8 C27 0.1U/10V_4 +5VS5
4 3 USBP5- 2 2 GND 7
6 USBP5-
BTCON_P1 C497 *1000P/50V_4 1 2 USBP5+ 3 3 GND 6
6 6 USBP5+
5 BLUELED 29,30 4 4 GND 5 29 USBPW_ON#
USBP15- *WCM2012-90 CN1
4 USBP15- 6
USBP15+ SI USB CONN
3 USBP15+ 6
C1071 C1072
2 +3VPCU_BT 5.6P/16V_4 5.6P/16V_4 1
1 +3VPCU_BT 2

1
USBP6-_R 3
6 USBP6- 4 3 4
1 2 USBP6+_R
6 USBP6+ 5

2
C1069
*Clamp-Diode_6 C1070 L5 6
BLUELED C496 *1000P/50V_4 *Clamp-Diode_6 WCM2012-90 USB board
B SI EMI B

PV ADD 5.6pF for USB Rising and Falling time

USBPW_ON# C19 220P/50V_4

Line out
CN22
SENSE_PHONE R465 20K/F_4 SENSE_A AGND SHIELD 1 7
SENSE_A 25 HPOUT_L HPOUT_L1
R482 16/F_4 L39 SBK160808T-301Y-N/0.2A_6 HPOUT_L2 2
25 HPOUT_L
AGND SHIELD 6 9
SENSE_MIC R256 10K/F_4 SENSE_A 25 HPOUT_R HPOUT_R R480 16/F_4 HPOUT_R1 L42 SBK160808T-301Y-N/0.2A_6 HPOUT_R2 3 10
AGND SHIELD 4
5 8
R275 20K/F_4
AEC_311105-2
R270 20K/F_4 Normal Open AGND
C C483 C488 C
C491 1000P/50V_4 0.1U/10V_4 0.1U/10V_4 SENSE_PHONE

AGND C476 1000P/50V_4

AGND

VREFOUT_C
C455 1U/6.3V_4 AGND MIC
25 VREFOUT_C R248 3.9K/F_4

R246 3.9K/F_4 CN21


AGND SHIELD 1 7
MIC_L C688 2.2U/6.3V_4 MIC_L1 L37 SBK160808T-301Y-N/0.2A_6 MIC_IN_L 2
25 MIC_L
AGND SHIELD 6 9
25 MIC_R MIC_R C689 2.2U/6.3V_4 MIC_R1 L38 SBK160808T-301Y-N/0.2A_6 MIC_IN_R 3 10
AGND SHIELD 4
5 8
C456 220P/50V_4
AEC_311105-2
AGND C436 220P/50V_4 AGND Normal Open AGND

D SENSE_MIC D

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom USB/BT/Audio JacK 1A

Date: Tuesday, May 03, 2011 Sheet 26 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

R96 2.49K/F_4 LANRSET


+1.05V_LAN

LAN_TX#_L R103 *3.6K/F_4


+1.05V_LAN
>60mil EVDD10
27
+3VLANVCC
+3VLANVCC

XTAL2
XTAL1
+3VLANVCC LAN_GPIOS R317 1K/F_4 C598 C567 C255
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
LAN_GLINK100#_L
GND VIA x 9 Pcs
D
VDD10 near pins 13, 29, 45. D

48
47

45

42
49

46

40

38
44
43

41

39

37
U16

AVDD33(NC)
AVDD33
AVDD33

AVDD10

DVDD10(NC)
LED0
RSET

GPO/SMBALERT
CKXTAL2
CKXTAL1
GND

DVDD33

LED1/EESK
MDI0+ 1 36 +3VLANVCC
>60mil
MDI0- MDIP0 REGOUT
2 MDIN0 VDDREG 35
3 AVDD10 VDDREG 34
MDI1+ 4 33 C300 C302 C290 C220 C239 C301 C311
MDI1- MDIP1 ENSW REG R328 10K/F_4
5 MDIN1 EEDI 32
6 31 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
AVDD10(NC) LED3/EEDO LAN_ECS_SCL R327 10K/F_4
7 MDIP2(NC) EECS 30
XTAL1
8 MDIN2(NC) RTL8161EH/8165EH DVDD10 29
PCIE_WAKE#
+1.05V_LAN
9 AVDD10(NC) LANW AKEB 28 PCIE_WAKE# 6,30
XTAL2
10 MDIP3(NC) DVDD33 27
ISOLATEB
+3VLANVCC
PV change to short-pad
VDD33 nesr pins 27, 39, 47, 48.
Y3 11 MDIN3(NC) ISOLATEB 26
LAN_REST#_L R827 *0_4/s PV ADD 0.1uF on +3VLANVCC for EMI suggestion

SMBDATA(NC)
12 AVDD33(NC) PERSTB 25 LAN_PCIE_RST# 7,11

SMBCLK(NC)

REFCLK_N
REFCLK_P
R828 *0_4

CLKREQB
LAN_REST# 29

DVDD10

EVDD10
25MHZ

HSON
HSOP
HSIN
HSIP

GND
if ISOLATEB pin
+3V pull-low,the LAN
C579 C568 chip will not drive

13
14
15
16
17
18
19
20
21
22
23
24
33P/50V_4 33P/50V_4
it's PCI-E outputs
R326
( excluding
+1.05V_LAN
PCIE_WAKE# pin )

EVDD10
1K/F_4
C C

ISOLATEB R849 *100/F_4


LAN_DISABLE# 6,29
6 PCIE_LAN_CLKREQ#
2 PCIE_TXP1_LAN 2 1
2 PCIE_TXN1_LAN

2
7 CLK_PCIE_LANP D25 *RB501V-40
7 CLK_PCIE_LANN R325

15K/F_4
C576 0.1U/10V_4

1
EVDD10 near pins 21.
C580 1U/6.3V_4

C596 0.1U/10V_4 PCIE_RXP1_LAN_L


2 PCIE_RXP1_LAN
C597 0.1U/10V_4 PCIE_RXN1_LAN_L
2 PCIE_RXN1_LAN

B
Lan Con. B

Transformer for 10/100 FOR EMI


CN17
RJ45
C214 1000P/50V_4
U13 LAN_GLED 12
+3VLANVCC LED_AMBER_P
C581 0.01U/25V_4 LAN_GLINK100# 11
LAN_MX1- MDI1- LED_AMBER_N
1 RD+ RX+ 16
LAN_GLINK100#_L R85 330_4
LAN_MX1+ 3 15 V_DAC_2 8
RD- CT RX1-
follow realtek recommend to modify 7 RX1+
LAN_EMI 75/F_4 R84 LAN_MCT0_2 C189 LAN_MCT1 2 14 MDI1+ LAN_MX1- 6
0.01U/100V_0603 CT RX- RX0-
5 TX1-
LAN_MX0- 6 9 MDI0+ 4
TD+ TX- LAN_MX1+ TX1+
3 RX0+
LAN_MX0+ 8 10 V_DAC_1 LAN_MX0- 2 14
TD- CMT FOR EMI LAN_MX0+ TX0- GND1
1 TX0+
LAN_EMI 75/F_4 R70 LAN_MCT0_1 C139 LAN_MCT0 7 11 MDI0- 13
0.01U/100V_0603 CT TX+ C114 1000P/50V_4 GND
C146 +3VLANVCC LAN_YLED 10
LAN_TX# LED_W HITE_P
NS681684 0.01U/25V_4 9
C522 C119 1000P/50V_4 LED_W HITE_N
47P/3KV_1808 PV Change to 47P/3.15KV for EMI suggestion
LAN_TX#_L R68 330_4
RJ45_CONN
C312 C320 C314
follow realtek recommend to modify
0.1U/10V_4 0_6 0_6

A A

PV ADD 0.1uF & reserve PAD for EMI suggestion

352-(&75
4XDQWD&RPSXWHU,QF
39 +3VLANVCC Size Document Number Rev
Custom RTL8165EH 1A
2,4,6,8,9,10,11,12,13,14,17,20,22,23,24,25,28,29,30,34,37,39 +3V
Date: Tuesday, May 03, 2011 Sheet 27 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

KEYBOARD Con.
POWER BOTTON CONNECT MY5
MY6
MY3
MY7
C76
C125
C131
C111
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
MX1
MX7
MX6
MY9
1
2
3
CN4

1
2
3
29

29
MY[0..17]

MX[0..7]
MY[0..17]

MX[0..7]
28
4 4
MY8 C117 *220P/50V_4 MX4 5
MY9 C53 *220P/50V_4 MX5 5
6 6
MY10 C171 *220P/50V_4 MY0 7
MY11 C165 *220P/50V_4 MX2 7
8 8
MX3 9 9
.(<%2$5'38//83
A MY5 10 A
MY1 10
11 11
MY1 C84 *220P/50V_4 MX0 12
MY2 C102 *220P/50V_4 MY2 12
13 13
MY4 C105 *220P/50V_4 MY4 14
MY0 C63 *220P/50V_4 MY7 14
15 15
MY8
100mA C55 1U/6.3V_4 CN3 1. +3VPCU(LIDSWITCH PWR) MX4 C57 *220P/50V_4 MY6
16
17
16
17 +3VPCU 10
RP4
1 MY14
PWR BTN CONN MX6 C50 *220P/50V_4 MY3 18 MY13 9 2 MY11
MX3 C71 *220P/50V_4 MY12 18 MY12 MY10
2. LEDVCC(+3VPCU) MX2 MY13
19 19 MY3
8 3
MY15
C58 0.1U/10V_4 C69 *220P/50V_4 20 7 4
MY14 20 MY6
+3VPCU 1 3. LIDSWITCH MY11
21 21 6 5
+3VPCU 2 22 22
4.POWERON# MX7 C43 *220P/50V_4 MY10 23 +3VPCU *10P8R-8.2K
29 LID_EC# 3 23
MX0 C95 *220P/50V_4 MY15 24
29 NBSWON1# PWR_LED# 4 MX5 MY16 24
5. PWRLED# C60 *220P/50V_4 25 RP3
29 PWR_LED# 5 25
MX1 C42 *220P/50V_4 MY17 26 10 1 MY2
6 26 MY1 MY4
6. GND MY12
+3V 27 27 MY5
9 2
MY7
C143 *220P/50V_4 29 CAPSLED# R89 2 1 200/F_6 28 8 3
MY13 C153 *220P/50V_4 R92 2 28 MY0 MY8
29 NUMLED# 1 200/F_6 29 29 7 4
MY14 C157 *220P/50V_4 WIRELESS_ON_R 30 MY9 6 5
MY15 C182 *220P/50V_4 WIRELESS_OFF_R 30
31 31
MY16 C188 *220P/50V_4 32 +3VPCU *10P8R-8.2K
PWR_LED# MY17 C201 *220P/50V_4 32
C66 0.1U/10V_4 +3V R83 *8.2K_4 MY16
LID_EC# R88 *8.2K_4 MY17
C67 0.1U/10V_4 KB CONN
EC KB3930 has included K/B pull-up resistor and function
NBSWON1#
B C68 0.1U/10V_4 +5V +5V B
2 1NBSWON1#
G1 *SHORT_ PAD1
R298 R97
1K/F_4 1K/F_4

R302 2 1 *200/F_6 R95 2 1 *200/F_6


WIRELESS_ON_R WIRELESS_OFF_R

3
29 WIRELESS_ON 2 29 WIRELESS_OFF 2

Q21 Q22
PDTC144EU PDTC144EU

1
LED Con. To TOUCH PAD SW board
C C

TOUCH PAD Con.


CN10
+3V 1
8 SATA_LED# 2

1000P/50V_4

1000P/50V_4
29 PWRLED_LEFT 3
4 change to +3VSUS
LED/B conn close conn
DFFC04FR045
88513-0401-4P-L-SMT R188 4.7K_4 TPCLK
+3VSUS
SATA_LED# R180 4.7K_4 TPDATA CN6

C401

C398
C507 *0.1U/10V_4 TP_LED#
29 TPLED# 1
1. +3V TP_R
PWRLED_LEFT CN5 TP_L 2
C506 *0.1U/10V_4 TP_L 3
2. SATA_LED# TP_R 6 4
C407 10P/50V_4
5
3. PWR_LED# 4
50503-0040N-001
29 TPCLK L35 BLM18BA470SN1D/0.3A_6 TPCLK-1 DFFC04FR045
L34 BLM18BA470SN1D/0.3A_6 TPDATA-1 3 88513-0401-4P-L-SMT
4.GND 29 TPDATA 2
C399 10P/50V_4
1
25 mils
TOUCH PAD CONN
DFFC06FR062
+3VSUS C386 0.1U/10V_4 88513-0601-6P-L-SMT

D D
4,7,26,29,31,38 +3VPCU
8,11,17,21,22,23,25,30,39 +5V
30,39 +3VSUS
2,4,6,8,9,10,11,12,13,14,17,20,22,23,24,25,27,29,30,34,37,39 +3V

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom LED/KB/SW/TP 1A

Date: Tuesday, May 03, 2011 Sheet 28 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3VPCU_EC +3VPCU
Smart adapter Type check
29
2,4,6,8,9,10,11,12,13,14,17,20,22,23,24,25,27,28,30,34,37,39 +3V
4,7,26,28,31,38 +3VPCU
4,31,32,38 +5VPCU
500mA
+3VPCU C612 0.1U/10V_4
C615 0.1U/10V_4 +3VPCU L49
C609 0.1U/10V_4 BLM18BA470SN1D/0.3A_6 +5VPCU
U5 C585 0.1U/10V_4 Change to 1SS355 as Current loss

1
SERIRQ 3 9 C617 0.1U/10V_4 U4
7 SERIRQ LFRAME# SERIRQ VCC1
4 22 C309 0.1U/10V_4 D6 5 1
7,30 LFRAME# LFRAME VCC2 VOUT VIN
LAD0 10 33 C606 0.1U/10V_4 1SS355
7,30 LAD0 LAD1 LAD0 VCC3
8 96 C608 0.1U/10V_4 C588
7,30 LAD1 LAD1 VCC4
LAD2 7 111 C318 0.1U/10V_4 C339
7,30 LAD2

2
LAD3 LAD2 VCC5 C291 *10U/6.3V_8 AD_TYPE R310 10K/F_4 R304 100/F_4 4.7U/6.3V_6
7,30 LAD3 5 LAD3 VCC6 125 AD_ID 38 SHDN 3
A 12 67 *1U/6.3V_4 A
7 CLK_33M_KBC PCICLK AVCC +3VPCU_EC
7 KBC_RST# 13 PCIRST/GPIO5
CLKRUN# 38 C595 0.1U/10V_4
7 CLKRUN# CLKRUN C571 R306 4 2
SCI1# 12K/F_4 C560 NR/FB GND
20 SCI/GPIOE
EC_A20GATE 1 63 TEMP_MBAT 0.1U/10V_4 100P/50V_4 C340 *TPS73133
6 EC_A20GATE GA20/GPIO0 AD0/GPI38 TEMP_MBAT 38
6 EC_RCIN# EC_RCIN# 2 64 AD_TYPE
3920_RST# KBRST/GPIO1 AD1/GPI39 AD_AIR *1U/6.3V_4
4 3920_RST# 37 ECRST AD2/GPI3A 65 AD_AIR 38
66 SYS_I
AD3/GPI3B SYS_I 38
MX0 55
28 MX0 KSI0/GPIO30
MX1 56 68
28 MX1 KSI1/GPIO31 DA0/GPO3C GPU_PROCHOT 15
MX2 57 70
28 MX2 MX3 KSI2/GPIO32 DA1/GPO3D VFAN
58 71 Change to RB500 as Current loss
28
28
MX3
MX4
MX4 59
KSI3/GPIO33
KSI4/GPIO34
DA2/GPO3E
DA3/GPO3F 72 D/C#
VFAN
D/C#
23
38
Adapter select
MX5 60 SCI1# D9 1 2 RB501V-40
28 MX5 KSI5/GPIO35 SIO_EXT_SCI# 6
MX6 61 21 PWM_VADJ
28 MX6 KSI6/GPIO36 PW M1/GPIOE PWM_VADJ 11
MX7 62 23 BATSHIP
28 MX7 KSI7/GPIO37 PW M2/GPIO10 BATSHIP 38 DNBSWON1# D10 1 2 RB500V-40 DNBSWON# 6
MY0 39 26 R823 0_4 EC_WP# R368 10K/F_4 GPIO42 R369 *10K/F_4
28 MY0 KSO0/GPIO20 FANPW M1/GPIO12 +3VPCU
MY1 40 27
28 MY1 MY2 KSO1/GPIO21 FANPW M2/GPIO13 FAN1SIG TP233 KBSMI#1
41 28 Hi ==> DIS/SG D8 1 2 RB500V-40
28 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 23 SIO_EXT_SMI# 6
MY3 42 29 Low ==>UMA
28 MY3 KSO3/GPIO23 FANFB2/GPIO15 ODD_PD 23
MY4 43 for Battery
28 MY4 KSO4/GPIO24
MY5 44 77 MBCLK charge/discharge R50 47K_4 LID_EC# C65 100P/50V_4
28 MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK 38
MY6 45 78 MBDATA
28 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 38
MY7 MBCLK2 adapter R341 10K/F_4 NBSWON1#
28 MY7
MY8
46
47
KSO7/GPIO27 SCL2/GPIO46 79
80 MBDATA2
MBCLK2 4
for CPU themal
Platform model GPIO42 +3VPCU
28 MY8 MY9 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 4 MBCLK
48 90W R338 4.7K_4 C1056 *0.1U/10V_4
28 MY9
MY10 49
KSO9/GPIO29 SG/DIS High
28 MY10 KSO10/GPIO2A
MY11 50 65W SI R342 4.7K_4 MBDATA C1057 *0.1U/10V_4
B
28 MY11
MY12 51
KSO11/GPIO2B UMA Low B
28 MY12 KSO12/GPIO2C
28 MY13 MY13 52 R345 4.7K_4 MBCLK2 C1061 *0.1U/10V_4
KSO13/GPIO2D +3VS5
28 MY14 MY14 53 6 SUSB#
KSO14/GPIO2E GPIO4 SUSB# 6
MY15 54 R347 4.7K_4 MBDATA2 C1062 *0.1U/10V_4
28 MY15 KSO15/GPIO2F
28 MY16 MY16 81 14 HWPG Vender Size P/N C233
KSO16/GPIO48 GPIO7 HWPG 4,20,31,32,33,36
28 MY17 MY17 82 15 H_PROCHOT# 220pF/50V_4 MV EMI suggestion RSMRST#
KSO17/GPIO49 GPIO8 H_PROCHOT# 4 RSMRST# 6
GPUT_CLK SUSC#
AMIC 128K AKE35ZN0801
15 GPUT_CLK 83 16 C1048 2.2U/6.3V_4
PSCLK1/GPIO4A GPIOA SUSC# 6
For GPU thermal GPUT_DATA PWRLED_LEFT EON AKE35FN0Q00 R815 *8.2K_4
15 GPUT_DATA
TPLED#
84
85
PSDAT1/GPIO4B GPIOB 17
18
PWRLED_LEFT 28 128K +3VS5
28 TPLED# PSCLK2/GPIO4C GPIOC TP234
38,39 ACIN ACIN 86 19 NBSWON1# from power button Socket DFHS08FS023 3920_RST#
PSDAT2/GPIO4D GPIOD NBSWON1# 28
28 TPCLK TPCLK 87 25
TPDATA PSCLK3/GPIO4E GPIO11 LAN_REST# 27
28 TPDATA 88 PSDAT3/GPIO4F GPIO16 30 EC_DEBUG1 30 +3VPCU
31 EMU_LID +3VPCU R313 47K_4 C586 0.1U/10V_4
BIOS_RD# 119
RD
GPIO17
GPIO18 32 KBSMI#1
EMU_LID 20 2M SPI EC ROM
BIOS_WR# 120 R357 100K/F_4
WR BLUELED 26,30
BIOS_CS# 128 34 VRON U46
SELMEM/SPICS GPIO19 VRON 33,34,35,36
7 PCI_SERR# 89 36 NUMLED# BIOS_CS# 1 8
SELIO/GPIO50 GPIO1A NUMLED# 28 CE# VDD
Vari_ON 76 BIOS_SPI_CLK_I 6 C605 *10P/50V_4 R350 *10_4 CLK_33M_KBC
TP36 SELIO2/GPIO43 SCK
*0_4/s R806 109 BIOS_WR# 5
7 VGA_ON_SB D0/GPXD0 SI
7,17,36,37 VGA_PWROK *0_4/s R807 110 BIOS_RD# 2 7 SPI_7P
D1/GPXD1 SO HOLD# +3VPCU
112 D2/GPXD2
PV change to short-pad 114 73 SPI_3P 3 4
D3/GPXD3 CIR_RX/GPIO40 W P# VSS
115 74
30 RF_LINK#
BLUELED 116
D4/GPXD4
D5/GPXD5
GPIO41
GPIO42 75 GPIO42 MX25L4005AM2C-12G 128K byte SPI EC ROM C545 0.1U/10V_4
*0_4/s R370 117 90 DNBSWON1# to FCH AKE38FP0N01
30 BLED_COMBO
118
D6/GPXD6 GPIO52
91 CAPSLED# SOIC8-8-1_27 SI U11
TP44 D7/GPXD7 GPIO53 CAPSLED# 28
92 PWR_LED# TP235 BIOS_CS# 1 8
GPIO54 PWR_LED# 28 CE# VDD
97 93 ECPWROK SI EMI C544 *22P/50V_4 TP236 BIOS_SPI_CLK_I 6
26 USBPW_ON# A0/GPXA0 GPIO55 ECPWROK 4,10,17 SCK
36,39 SUSON SUSON 98 95 RSMRST# TP237 BIOS_WR# 5
C MAINON A1/GPXA1 GPIO56 VOLMUTE# TP238 BIOS_RD# SI SPI_7P C
32,33,36,38,39 MAINON 99 A2/GPXA2 GPIO57 121 VOLMUTE# 25 2 SO HOLD# 7
LAN_POWER 100 126 BIOS_SPI_CLK BIOS_SPI_CLK_I R872 R300 10K/F_4
39 LAN_POWER A3/GPXA3 GPIO58
31,32 S5_ON S5_ON 101 127 LID_EC# L82 BLM15AG700SS1_4 33_4 +3VPCU R301 10K/F_4 SPI_3P 3 4
A4/GPXA4 GPIO59 LID_EC# 28 W P# VSS
102 TP239
33 VR2.5_ON A5/GPXA5
6,27 LAN_DISABLE# 103 A6/GPXA6 If use FCH SI EMI SI R903 *100K/F_4 *DFHS08FS023
VGACOREON 104 123 CRY2 C361 20P/50V_4 SOIC8-6-1_27
36,37 VGACOREON A7/GPXA7 XCLKO SUSCLK should
38 MBATLED0# 105 A8/GPXA8 change to 20P.
TP240 SI
38 AC_LED_ON# 106 A9/GPXA9 TP place on top
107 122 CRY1 CRY2 R150 0_4 C1060
28 WIRELESS_ON A10/GPXA10 XCLKI CLK_RTC 7,10
22P/50V_4
lay for ICT
28 WIRELESS_OFF 108 A11/GPXA11 request +3V
2

GND1 11
GND2 24 C373 R155 SI
35 *27P/50V_4 100K/F_4
V18R GND3 C1074
124 V18R GND4 94
113
1

GND5
2

69 *0.1U/10V_4 R902
C610 C607 AGND U45 *10K/F_4
0.1U/10V_4 4.7U/6.3V_6 From EC
1

KB3930QF A2 EC_WP# 1 8 FCH RST#


CLK VCC
SI Rev. A1 change to A2
2 7 R901 *0_4 KBC_RST#
D PRE
3 Q CLR 6
+3VPCU 4 5 SPI_3P
GND Q SPI_WP 7,8

*SN74LVC1G74YZPR

D R874 R900 *0_4 D


10K/F_4
CPU Thermal Vari_ON project
SMBUS select
Vari_ON
SCL1/SDA1
R875
Low R22 352-(&75
*10K/F_4 4XDQWD&RPSXWHU,QF
SCL2/SDA2 High R23,R24
Size Document Number Rev
Custom EC (KB3926)/ROM 1A

Date: Tuesday, May 03, 2011 Sheet 29 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

30
A A

Mini PCI-E Card 1 +3V


+1.5V +3V

WLAN
R29 0_4 C47 C113 C26 C36 C41 C21 C126
8 BT_COMBO_OFF#
0.01U/25V_4 0.1U/10V_4 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3VS_6
+1.5V

CN15 R31 *10K_4


+3V
R30 *0_6 +MINIEC_5V 51 52 R32 *0_4
+5V Reserved +3.3V BLED_COMBO 29
49 50 R33 *0_4
Reserved GND BLUELED 26,29
EC debug pin 47 48
Reserved +1.5V MINI_BLED R34 *0_4/s PV change to short-pad
29 EC_DEBUG1 45 Reserved LED_W PAN# 46
FOR KBC DEBUG 43 44 RF_LINK#
Reserved LED_W LAN# RF_LINK# 29
41 42 R37 *0_4/s R38 10K/F_4
Reserved LED_W W AN# +3V
39 Reserved GND 40
37 38 +3VSUS
Reserved USB_D+ USBP10+ 6
35 GND USB_D- 36 USBP10- 6
2 PCIE_TXP0_WALN 33 34 R74 *10K_4
PETp0 GND
2 PCIE_TXN0_WLAN 31 PETn0 SMB_DATA 32
B 29 30 B
GND SMB_CLK
27 GND +1.5V 28

2
2 PCIE_RXP0_WLAN 25 PERp0 GND 26
2 PCIE_RXN0_WLAN 23 PERn0 +3.3Vaux 24
21 22 MINI_PCIE_RST# MINI_PCIE_RST# 7
CLK_33_DEBUG GND PERST# R886 *0_4/s
7 CLK_33_DEBUG 19 Reserved W _DISABLE# 20 RF_OFF# 8
MINI_PCIE_RST# 17 18 3 1 MINICAR_PME#
Reserved GND PV change to short-pad 6,27 PCIE_WAKE#
Q7
15 16 LAD0 LAD0 7,29 *DTC144EUA
CLK_WLAN_P GND Reserved LAD1
7 CLK_WLAN_P 13 REFCLK+ Reserved 14 LAD1 7,29
7 CLK_WLAN_N CLK_WLAN_N 11 12 LAD2 LAD2 7,29
REFCLK- Reserved LAD3
9 GND Reserved 10 LAD3 7,29
7 8 LFRAME#
6 PCIE_MINI_CLKREQ# CLKREQ# Reserved LFRAME# 7,29
R71 *0_4 BT_COMBO_EN_R# 5 6
8 BT_COMBO_EN# BT_CHCLK +1.5V
TP45 3 BT_DATA GND 4
MINICAR_PME# 1 2
W AKE# +3.3V
MINI PCIE H=9.0
BT_DATA,BT_CHCLK,CLKREQ# DFHS52FR057 2,4,8,11,20,21,34,35,39 +1.5V
internal pull-DOWN 100k ohm MIPCI-C-1759513-52P-LDV-SMT 2,4,6,8,9,10,11,12,13,14,17,20,22,23,24,25,27,28,29,34,37,39 +3V
4,7,26,28,29,31,38 +3VPCU
8,11,17,21,22,23,25,28,39 +5V
CLK_33_DEBUG R56 *0_4 C75 *33P/50V_4

for EMI request

C C

D D

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom MINI PCIE CONN X1 1A

Date: Tuesday, May 03, 2011 Sheet 30 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

DC/DC +3VS5/+5VS5
31
D +VIN D

Place these CAPs +VIN_5VS5


PL16 close to FETs
UPB201212T-800Y-N
Place these CAPs +VIN_3VS5 +VIN
close to FETs PL10
PC74
PC198 PC199 PC196 PC197 UPB201212T-800Y-N

0.1U/25V_4

2200P/50V_4
4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
+VIN +5VPCU
PC109 PC110 PC107 PC106 PC188

2200P/50V_4
0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
PR90 PC68
10_8

4.7U/6.3V_6
+5VPCU
+3VPCU +2VREF

PC27
PC60 PC10

4.7U/6.3V_6
PR18 PR17

0.1U/25V_4
1U/6.3V_4

8
7
6
5

5
6
7
8
PR85 *0_4 0_4
+5 Volt +/- 5% *665K/F_4 +3.3 Volt +/- 5%

16

17
Countinue current:4A Countinue current:4A

3
C 4 4 C

Peak current:6A Peak current:6A

VREG3

VREG5
VIN

REF
PR76 8205EN 13 EN0 TONSEL 4
PQ47 PQ28
OCP minimum:7.5A DMG4496
*330K/F_4
5V_UGATE1 21 10 3V_UGATE2 DMG4496 OCP minimum:7.5A
PC46 UGATE1 UGATE2 PC43
+5VS5 PR61 PR55 +3VS5
5V_BST1 22 9
1
2
3

3
2
1
PL20 BOOT1 BOOT2
2_6 2_6
2.2UH/8A 0.1U/25V_4 PU3 0.1U/25V_4 PL21
+5V_ALWP 5V_PHASE1 20 RT8223P 11 3V_PHASE2 +3.3V_ALWP
PHASE1 PHASE2 2.2UH/8A
PR238 PR240
8
7
6
5

5V_LGATE1 19 12 3V_LGATE2
LGATE1 LGATE2

5
6
7
8
*0_2/S *0_2/S
1

24 PR135

ENTRIP1

ENTRIP2
VOUT1

SKIPSEL
+ PR84 4 5V_FB1 2 7 2.2_8
FB1 OUT2

1
PC203 PC204 PR20 2.2_8 4

GND
GND
ENC
PR41
15.4K/F_4 PGOOD 3V_FB2 +
330U/6.3V_6X5.8

0.1U/10V_4

+3VS5 1 2 23 5
2

*0_4/S PR46 PGOOD FB2 PC211 PC205


10K_4
PC111

0.1U/10V_4

330U/6.3V_6X5.8
1

18

25
15
14

2
2200P/50V_4
PC59 HWPG 4,20,29,32,33,36
2200P/50V_4

PQ46
1
2
3

DMG4812 PQ23

3
2
1
PR19 DMG4812
PR78
10K/F_4 PR21
Rds(on) 18m ohm 110K/F_4 0_4
PR16
Rds(on) 18m ohm 6.8K/F_4
PR79
*0_4
PR14
B 130K/F_4 B

+3VPCU PR15
10K/F_4
PR77 S5_ON 29,32
S5_ON
0_4
PC61

*0.1U/10V_4
A A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom +5V/+3V (RT8206B) 1A

Date: Tuesday, May 03, 2011 Sheet 31 of 40


5 4 3 2 1
5 4 3 2 1

+5VS5
PR60 PR56
+VIN_1.1V

PL3
+VIN +1.1V Volt +/- 5%
Countinue current:3A
Peak current: 4A
32

RT8238VCC1.1V

RT8238TON1.1V
10_6 360K/F_4 UPB201212T-800Y-N
OCP minimum:6A
PC45 PC95 PC91 PC77 PC72 PC69

2200P/50V_4
1U/6.3V_4

0.1U/25V_4

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
5
6
7
8
+1.1V
D D

11
4

5
PU1
3 RT8238DH1.1V

VCC

TON
PR42 UGATE
RT8238ILIM1.1V
10 CS PC53 PQ21
PR70
RT8238BST_1_1.1V
RT8238BST1.1V DMG4496
110K/F_4 BOOST 4
PR7 2_6
1 2 RT8238HW PG_S2A1.1V
9 PGOOD RT8228A 0.1U/25V_4 PL15
4,20,29,31,33,36 HW PG 600 mils

3
2
1
*0_4/S 2 RT8238LX1.1V
PR9 0_4 RT8238EN1.1V PHASE 2.2UH/8A
29,33,36,38,39 MAINON 8 EN

5
6
7
8
RT8238DL1.1V PR226
1

MODE
LGATE PR83

GND
*0_2/S

1
PC7 2.2_8

FB
13 PAD
4 +

*0.1U/10V_4
PC215 PC216 PC237

12

RT8238FB1.1V 6

0.1U/10V_4

*10U/6.3V_8
390U/2.5V_6X5.8ESR10
2
PQ19 PC81
DMG4812

2200P/50V_4
Vo=0.5(R1+R2)/R2

3
2
1
PC31
PR10
+5VS5
0_4
*100P/50V_4 RDSon=18m ohm
PR43
12K/F_4

C PR37 C
10K/F_4

+3VS5
B 1.1 Volt +/- 5% B

Countinue current:0.2A
3 VIN NC 5 Peak current:0.5A
PC206 PC230
10U/6.3V_8

0.1U/10V_4

+1.1VS5
PU13
G9661 6
VOUT
PR223
29,31 S5_ON 2 EN
10K/F_4
+5VPCU 4 8 PC233 PC209 PC231
VDD GND

10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
ADJ

PC232 1 9
PGOOD GND1
0.33U/6.3V_4

PC229
7
1U/6.3V_4

1.1VADJ PR213
R1 38.3K/F_4
HW PG 1 PR222 2 PR224
*0_4/S R2 100K/F_4 VO=(0.8(R1+R2)/R2)
R2<120Kohm

A A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom 1A
VGA Core/+1.8VGFX/1.0VGFX
1%5'
Date: Tuesday, May 03, 2011 Sheet 32 of 40
5 4 3 2 1
5 4 3 2 1

33
D D

+1.05V PCH Volt +/- 5%


+VIN_1.2V Countinue current:4A
+VIN
PR200 PL13
Peak current:6A
PR207
+5VS5 OCP minimum:7.5A

RT8238VCCPCH

RT8238TONPCH
10_6 360K/F_4 UPB201212T-800Y-N
PC172

1U/6.3V_4
PC179 PC178 PC181 PC180 PC177
+1.2V

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
5
11
5
PU11
3 RT8238DHPCH 4

VCC

TON
PR206 UGATE
RT8238ILIMPCH
10 PC174
C CS PR202
RT8238BST_1PCH RT8238BSTPCH PQ54 +1.2V_S2 C
75K/F_4 BOOST 4
2_6 AON7410 PL24

3
2
1
PR205 1 2 RT8238HWPG_S2APCH 9 0.1U/25V_4 2.2UH/8A
4,20,29,31,32,36 HWPG
*0_4/S PGOOD RT8228A
2 RT8238LXPCH 600 mils
PR204 0_4 RT8238ENPCH PHASE
29,34,35,36 VRON 8 EN
1 RT8238DLPCH
LGATE PR243

5
MODE
PR208

GND
PC175 13 2.2_8

FB
PAD *0_2/S

1
*0.1U/10V_4
+

12

RT8238FBPCH 6
4 PC228 PC227

0.1U/10V_4
330U/2.5V_5*5.9ESR10
2
PQ53 PC176

2200P/50V_4
Vo=0.5(R1+R2)/R2 AON7702

3
2
1
PC173
PR203
+5VS5 PR247
0_4
*100P/50V_4 0_4
RDSon=14m ohm Change FP to ecap5x5_9-6
PR199 PR246
VDDP_FB_H 4
14K/F_4 *0_4
PR201
10K/F_4

B B

+2.5V +/- 5%
Countinue current:0.3A
Peak current:0.75A
+3VS5 +2.5V

3 VIN NC 5
PC187 PC183
10U/6.3V_8

0.1U/10V_4

PR306
29 VR2.5_ON PU12
*10K/F_4 G9661 6
VOUT
PR210
29,32,36,38,39 MAINON 2 EN
10K/F_4 PC189
+5VS5 4 8 PC194 PC186
PC182 VDD GND
10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
ADJ
0.1U/10V_4

1 PGOOD GND1 9
1

PC190
7
1U/6.3V_4
2

A 1.2VADJ1.8VPR211 A
R1 210K/F_4

4,20,29,31,32,36 HWPG 1 PR209 2 PR212 VO=(0.8(R1+R2)/R2)


*0_4/S R2 97.6k_4 R2<120Kohm

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom +1.05V (RT8238A) 1A

Date: Tuesday, May 03, 2011 Sheet 33 of 40


5 4 3 2 1
5 4 3 2 1

ϯϰ
D D

+1.5V

+VIN_CPUCORE PL1 +VIN


UPB201212T-800Y-N

PR256
CPU CORE Volt

1
*10K_4
PC65 PC66 PC23 PC22 PC19 PC21 PC39 + + +
1 2 PC207 PC208 PC261
Countinue current:36A

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
2,35 CPU_PWRGD_SVID_REG

100U/25V L-F

100U/25V L-F

*100U/25V L-F
*0_4/S
Peak current:50A

2
5
PR257 PQ9
FDMS7692 D
PR258
G
OCP minimum:55A
29,33,35,36 VRON
10K/F_4 4
S
PC304 PL19 +VCC_CORE

1
2
3
0.36uH/25A_11

1U/6.3V_4
8384GND

1
8384CSN D PR216 + +
G 2.2_8 PC213 PC136 PC151

8384PWROK
4

0.1U/10V_4
8384HDR1

2
390U/2.5V_6X5.8ESR10
S

330U/2.5V_5*5.9ESR10
+VCC_CORE 8384CSP

8384LX1
8384EN
+5VS5 PQ43

1
2
3
FDMS0308 PC185
PC308

2200P/50V_4
2
0.22U/25V_6
PR262

17

14

13
18

16

15

8384BST1
10/F_4
PD17 PR260

LX1
HDR1
CSN

EN/SKIP

PWR_OK
CSP
4 CPU_VDD0_RUN_FB_H PR264 RB501V-40 20K/F_4

1
PR229
3.32k/F_4
PR265
8384RSP 19 12 PR261 1 2
4 CPU_VDD0_RUN_FB_L PC311 RSP BST1 10K/F_4 Change FP to ecap5x5_9-6
C 2_6 C
220P/50V_4 10K/F_4 NTC
PR267
PR268 8384RSN 20 11 8384LDR1
3.32k/F_4 RSN LDR1
10/F_4
8384VREF *64.9K/F_4
PR270
+5VS5 PR269 8384VDDA 21 PU6 10
VDDA GNDP +5VS5 PR266
22_6 8384VREF
2=/1 PC314
1U/6.3V_4
PC310
47nF/16V_4 51/F_4
PC313 8384VREF 22 9
VREF VDDP
1U/6.3V_4

8384GND
PC315 8384TSET 23 5 8384HDR2 PC312
8384GND PR272 TSET HDR2 953/F_4 8384CSN
0.22U/6.3V_4

PD18
5.49K/F_4 +VIN_CPUCORE PR271
PR273
PC317 24 7 8384BST21 2 +5VS5 1000P/50V_4 8384CSP
8384GND SVD BST2
1000p/50V_4

2_6
LDR2

RB501V-40
8384GND

VFIX
SVC

LX2
VIN

PG

25 PC316
8384GND PAD PC64 PC67 PC20 PC24 PC25 PC26

22P/50V_4
2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

*4.7U/25V_8
1

PR274

5
8384VFIX

49.9K/F_4 2,35 8384GND


8384VIN

CPU_SVD
8384PG

PC324 D
G

0.22U/25V_6
2,35 CPU_SVC
4 PR275
8384GND S 20K/F_4
PR276 +VCC_CORE
+5VS5 PQ10 PL18

1
2
3
*10K_4 FDMS7692 0.36uH/25A_11
8384LX2

1
PR277
0_4 PQ42 D PR214 + +
FDMS0308 G 2.2_8 PC159 PC220
8384LDR2 4

330U_2V_7343
2

390U/2.5V_6X5.8ESR10
S
8384GND

1
2
3
PC184
B B

2200P/50V_4
PR279
+VIN_CPUCORE
100K/F_4 PR280
PC328
*0_4/S
1000P/50V_4

8384GND
8384GND
PR281
+3V
10K_4
10,35 CPU_VRM8380_PG 1 2
*0_4/S
PR282

A A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
C +1.1V VTT / PCH 1A
1%5'
Date: Tuesday, May 03, 2011 Sheet 34 of 40
5 4 3 2 1
5 4 3 2 1

ϯϱ
D D

+1.5V

PR283
*10K_4

2,34 CPU_PWRGD_SVID_REG 1 2
*0_4/S
PR284

PR285
8390EN
29,33,34,36 VRON
10K/F_4
PC329

1U/6.3V_4
+VIN_VDDNB PL12 +VIN
UPB201212T-800Y-N
8390GND

8390PWROK
8390CSN 8390HDR
+VDDNB_CORE PC154 PC156 PC155 PC152 PC334 PC335 PC157
VDDNB Volt

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
*4.7U/25V_8
8390CSP +5VS5

2200P/50V_4
Countinue current:18A

2
PR286

14

11
15

13

12
10/F_4 PD19 Peak current:22.5A

D1 2

G1 1
RB501V-40
OCP minimum:27A

HDR
CSN

EN/SKIP

PWR_OK
CSP

D1
G1

D1

D1

D1
D1
4 CPU_VDDNB_RUN_FB_H PR287 8390RSP
C 7.87k/F_4 PR288 PC339 C

1
4 CPU_VDDNB_RUN_FB_L 16 9
PC338 RSP BST PL23 +VDDNB_CORE
2_6

S1/D2

S1/D2
PR289 120P/50V_4 0.22U/25V_6 0.36uH/25A_11
PR290 8390RSN 17 10 8390LX 9 9 8390LX
7.87k/F_4 RSN LX
10/F_4

1
8390VREF PR291 *64.9K/F_4 PU18

G2
PR292

8 G2
S2

S2

S2

5 S2

6 S2

7 S2
+5VS5 8390VREF
8390VDDA 18
VDDA 2=(6/1 GNDP
7
PR167 PC223
+
PC225
+
PC226
+
PC224
+
PC158
+
PC147
+
PC260
22_6

5
2.2_8

0.1U/10V_4

330u_2.5V_3528

330u_2.5V_3528

*330u_2.5V_3528
2

2
390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
*390U/2.5V_6X5.8ESR10
PC344 8390VREF 19 8 8390LDR PQ40
VREF LDR FDMS7602S PQ39
1U/6.3V_4

FDMS7602S
PC345 8390TEST 20 6 +5VS5 PC153
8390GND PR296 TEST VDDP

2200P/50V_4
0.22U/6.3V_4

27.4K/F_4
8390GND

VFIX
SVD

SVC

VIN

PC347 PG PC348 PR294


21
8390GND PAD 20K/F_4
1000p/50V_4

1U/6.3V_4
1

8390VFIX 3

PR245
PR295
8390GND 1 2
8390VIN

8390PG

2,34 CPU_SVD 18.2K/F_4


PR299 10K/F_4 NTC
49.9K/F_4 2,34 CPU_SVC
PR301
+5VS5 PC349 PR298
*10K_4 4700P/25V_4 20/F_4
PR303
8390GND
*0_4/S
PR302
0_4 PC350
8390GND 8390GND PR300 1.5k/F_4 8390CSN

1000P/50V_4 8390CSP
8390GND
PR304 PC351
+VIN_VDDNB

22P/50V_4
B 100K/F_4 B

PC352
8390GND
1000P/50V_4

8390GND

10,34 CPU_VRM8380_PG 1 2
*0_4/S
PR305

A A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
C +1.1V VTT / PCH 1A
1%5'
Date: Tuesday, May 03, 2011 Sheet 35 of 40
5 4 3 2 1
1 2 3 4 5

( VTT/2A )
PR65
0_4
PR71
*0_4
+1.5VSUS
+VIN_DDR
PL4
+VIN

+0.75V_DDR_VTT UPB201212T-800Y-N
+1.5V +/- 5%

4
PU4 PC40
24 23 PC49 PC63 PC62 PC48 PC50
Countinue current:6A

MODE
VTT VLDOIN

2200P/50V_4
0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
5
2 *0.1U/50V_6
A PC70 PC71 VTTSNS Peak current:12A A

10U/6.3V_8

10U/6.3V_8
1
OCP minimum 15A
VTTGND 1116DRVH
UGATE 21 4

3 PC28 +1.5VSUS_1 +1.5VSUS


GND 1116VBST PR58
22

3
2
1
VBST PQ14 PL14
( 3mA ) 25 GND 2_6
0.1U/25V_4 AON7410 SLH0630-R82M-NB/13A
3,12,13 DDR_VTTREF 5 20 1116LL
VTTREF PHASE
PQ7

1
PC51 7 19 1116DRVL RJK03D3D PR6
NC LGATE

1
SUSON PR168 *0_4 0.033U/10V_4 2.2_8 +
D PR217 PC200 PC202
*0_2/S

0.1U/10V_4
390U/2.5V_6X5.8ESR10
G

2
PR32 0_4 51116S3 10 18 +5VS5 4
29,32,33,38,39 MAINON S3 PGND S
17 PC8

1
2
3
CS_GND

2200P/50V_4
SUSON PR31 0_4 51116S5 11 PC11
29,39 SUSON S5 1U/6.3V_4
HWPG 51116PG 13 PR23
4,20,29,31,32,33 HWPG 1 PR29 2 PGOOD VDDP 15
*0_4/S 10_6
PR30 1116TONSET PR63
+VIN_DDR 12 TON CS 16 1116CS
619K/F_4 7.5K/F_4
PR57 V5FILT
9 FB DEM 6
10K/F_4
8 VDDQSNS VDD 14
B B
PR166
PR48
4 VDDIO_FB_H
*10K/F_4 10.2K/F_4 RT8207LGQW PC12

1U/6.3V_4
SG & Discrete Only

+1.5VSUS +1.0V +/- 5%


Countinue current:1.7A
+3VS5 +1.8V +/- 5%
C Peak current:3A C
Countinue current:1.2A PR64 3 5
MAINON PC37 PC44 VIN NC
Peak current:3A +1.0V_VGA

10U/6.3V_8

0.1U/10V_4
*0_4
3 VIN NC 5
PC127 PC124 PR169 PU5
+1.8V_VGA 29,33,34,35 VRON
PD4 G9661-25ADJF12U6
10U/6.3V_8

0.1U/10V_4

*10K/F_4 VOUT
BAS316/DG
PR67
1 2 PU8 2
G9661-25ADJF12U6 29,37 VGACOREON EN
VOUT 110K/F_4
+5VS5 4 8 PC112 PC119 PC129
VGACOREON PR122 PC52 VDD GND

10U/6.3V_8

10U/6.3V_8

0.1U/10V_4
2 EN

ADJ
0.47U/6.3V_4
60.4K/F_4 1 PGOOD GND1 9

1
+5VS5 4 8 PC128 PC118 PC132
VDD GND
10U/6.3V_8

10U/6.3V_8

0.1U/10V_4

29,32,33,38,39 MAINON PR133 *0_4 PC36

7
ADJ

1U/6.3V_4
1 9

2
PGOOD GND1
PR106
2

PC116 PC131 1.2VADJ1.0V


7
1U/10V_4

PR124
1U/6.3V_4

R1 25.5K/F_4

2
VO=(0.8(R1+R2)/R2)
*0_4/S PR145
1.2VADJ1.8VVGA R2<120Kohm 7,17,29,37 VGA_PWROK 1 2
R1 127K/F_4 *0_4/S R2 PR107 VO=(0.8(R1+R2)/R2)
1

PR81 100K/F_4 R2<120Kohm


PR139

1
R2 100K/F_4

VGA_PWROK

D D

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom DDR3 (RT8207) 1A

Date: Tuesday, May 03, 2011 Sheet 36 of 40


1 2 3 4 5
1 2 3 4 5 6 7 8

37
PR89 +5VS5 PD6

VGA Core 10_6 *RB501V-40


2 1 8208RTBST1
+VIN_VGA
PL11
+VIN

8208RTVDD1
UPB201212T-800Y-N
PC125
PC85 1U/6.3V_4
1U/6.3V_4 PC126 PC134 PC135 PC140 PC133 PC130 +VGACORE +/- 5%
+3V

2200P/50V_4
0.1U/25V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4
8208BST1_1
PR144 Countinue current:12.5A

5
2_6 Peak current:15A
A A

13
PU7 OCP minimum 18A

9
2
PR92
10K/F_4 PR146 8208CS1 8208RTDH1
10 12 4

VDDP
VDD

BST
CS DH PQ36
9.09K/F_4
AON7410 +VGA_CORE
7,17,29,36 VGA_PWROK 1 PR109 2 *0_4/S 8208RTPG1 4 11 8208RTLX2 PL22

3
2
1
PGOOD PHASE PCMC104T-R88MN/20A
PR123 10K/F_4 8208RTEN1 15 16 8208TON1 PR116 600 mils
29,36 VGACOREON EN/DEM TON PQ37
232K/F_4 PR242
17 8 8208RTDL1 RJK03D3D
PAD DL

VOUT
PX_MODE PR121 0_4 PR162 *0_2/S
17 PX_MODE

1
8208RTD11 2.2_8

G0
14 5

FB

D0
G1 D1 + +
D
SI PC100 RT8208A G PC217 PC219 PC218

6
0.22U/10V_4 PR118 PR108

0.1U/10V_4
4

390U/2.5V_6X5.8ESR10

390U/2.5V_6X5.8ESR10
2

2
15K/F_4 7.5K/F_4 S

8208VOUT1
8208RTD10 PC138

1
2
3

2200P/50V_4
8208RTFB1

PR97 2K/F_4 PR91


15 GFX_CORE_CNTRL0
10K/F_4
PC90 *100P/50V_4
PR138
5'6RQ PRKP
*10K/F_4
andrew---AMD PR143
recommend to change +3V Vo=0.75(R1+R2)/R2
to +3V *10K/F_4
B B
15 GFX_CORE_CNTRL1

Seymour-XT PWRCNTL0 PWRCNTL1 V-CORE

L 0 0 0.9V

M 0 1 1V

H 1 0 1.1V (Default)

TBD 1 1 NA +1.5VSUS
+1.5V_VGA +12VALW

+VIN PC113

5
PR88 PR75

0.1U/10V_4
*22_8 1M_4 D
+12VALW
G
+3V_VGA 1.5V_OND 4
+3VS5 PR111 S

3
+VIN 1M_4 PQ15
$

1
2
3
*DMN601K-7 PQ22
C +1.5V_VGA C
PR80 PC47 RJK0392DPA
1
2
5
6

PR2 1M_4 1.5V_ONG

0.01U/25V_4
6 VGA_REQ 2 2
*22_8 PC2

3
PR69 3VGFX_OND
0.1U/10V_4

3
1M_4 PQ16
3

PQ3 PQ12 PQ1


$ 2 PR87 DMN601K-7 PC102 PC87 PC96

1
*DMN601K-7 DMN601K-7 ME3424D 1M_4

0.1U/10V_4

*10U/6.3V_8

*10U/6.3V_8
4

+3V_VGA +3V
2 2 PQ20

1
PC3 PR1 PDTC144EU
3

PQ8
0.01U/25V_4

*0_8
DMN601K-7
PR5 PC5 PC4 PC1
1

VGACOREON PR105 1M_4


0.1U/10V_4

0.1U/10V_4
*10U/6.3V_8

2
0_4
PR110 33K/F_4 VGACOREON

3VGFX_ONG
1

R27 0_4 PX_MODE1 PX_MODE1 17

PC86 SI
0.47U/10V_4

D D

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom +VGACORE (RT8208/1.8V) 1A

Date: Tuesday, May 03, 2011 Sheet 37 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

DC_JACK
90W
EC4
2200P/50V_4

Do Not add test pad on BATDIS_G signal


+PRWSRC

+BATCHG
38
AD_ID 29
EC2 EC1 EC3 EC5 PL6
3 +VA_AC +VA

10U/25V_8

10U/25V_8

10U/25V_8

10U/25V_8
CN14
AD_ID
7 PL9 +VAD UPB201212T-800Y-N
VDD PD9
8 PQ24 PQ49 PL5 CN13
VDD UPB201212T-800Y-N FDMC4435BZ PQ48 BATT+
1 2 1 8 2 2 1 1
D 1 P0603BDG 2 7 UPB201212T-800Y-N D
PL7
4 5 2 P4SMAJ20A 4 3 3 6 SMD 3 10
GND UPB201212T-800Y-N BATDIS_ID_DOD PC97 PC75 3 10
3 4 5
PC84 PC201 PC79 SMC

0.1U/25V_4

0.1U/25V_4
4 4 9 9
PC80 FDS6679AZ
0.1U/25V_4

0.1U/25V_4

0.22U/25V_8
2 5

1
LED2 GND

0.1U/25V_4
6 5 7

4
GND AC_LED_ON# PC78 PR231 +VIN +3VPCU 5 7
1 LED1 RC2512-R010 B_TEMP_MBAT6

0.1U/25V_4
8

IDEA_G
2 6 8
1 2
To PWR LED DC-IN CONN PQ44 ACOK_IN PR102 *100/F_4 BATDIS_G Place this ZVS close to PR93 PR95 200045MR008G10JZR
PDTC144EU 330_4 330_4 DFHD08MR145
Far-Far away +VIN
PR215 PR104 150K/F_4 PC104 bat-bp02081-b82d5-7h-8p-l-v
+12VALW 3 1 +VH28

1
PQ45 PR54

0.1U/25V_4
1M_4 29 MBDATA
2

DMN601K-7 PD11 10K/F_4


+VAD 8681_VDDA
PR221 Place this ZVS close to 100_4
P4SMAJ20A 29 MBCLK
1 3 +5VPCU PR233 PR232
2.43K/F_6
Diode away +VIN PR103 *0_2/S *0_2/S PL8 PR53
TEMP_MBAT 29

2
3

PR99 PC144 UPB201212T-800Y-N PD2 PD3 1K/F_4

CSIN
CSIP

1
100K/F_4

UDZ5V6B-7-F

UDZ5V6B-7-F
3
PC115 2 PC32 PC148
AC_LED_ON# 29
ACOK_IN 1U/10V_4

0.01U/25V_4

0.01U/25V_4
*0.1U/25V_4

PQ11 +VIN_CHARGER
PDTC144EU 2ACOK# PD5
1

2
MBATLED0# BAS316/DG PR157 PR161
2 1 10/F_4 10/F_4 PR164
2

PQ18 PR100 PQ17 100_4 8681_VDDP PC93 PC92

3
100K/F_4

*100P/50V_4

*100P/50V_4
PQ29 DMN601K-7 Place this cap

1
PR112

8681_VDDA
PDTC144EU 2 ACIN PC105 PC123 PC122 PC121
PR136 close to EC

2200P/50V_4

1000P/50V_4
PC212

4.7U/25V_8

0.1U/25V_4
1M_4

28681IACP
1
MMBT3904-7-F
C 8681_VDDP C

8681IACM
+12VALW 3 1

1
PQ33 PC94 PC139
2

2
DMN601K-7 1U/10V_4 1U/10V_4

2
1M_4

5
15
PR147

6
3
1 3 +5VPCU 2.2U/10V_6 PD15
RB501V-40

IACP

IACM
2.43K/F_6

VDDA

VDDP
PR101
3

PR241

1
MBCLK PR154
1M_4 10 2_6 PC214 4
SCL 8681B_2 8681B_1
2 MBATLED0# 29 *0_4/S BST 12
PC120
+VAD PR140 0.1U/50V_6 PR219 +BATCHG
*0.1U/25V_4

PR151

3
2
1
PQ32 MMDT2907A 1M_4 MBDATA 11 13 8681HDR PQ31 RC1206-R020
1

SDL HDR
Q2

PDTC144EU 4 3 *0_4/S AON7410 F3_2X1_65-2_8


PL17
PR134
5 6 14 8681LX 8681LR 1 2
PR156 LX

5
220K_4 ACIN 8681_ACAV 9 6.8uH
PR96 29,39 ACIN ACAV

1
2 1 +VA 100K/F_4 PU9
Q1

PR132 1K_6 16 8681LDR PR239


PR158 LDR PC191 PC192 PC193 PC195 PC98
+VA 220K_4 PQ25 OZ8681 2.2_8
+VAD_1

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8

0.1U/25V_4

0.1U/25V_4
100K/F_4 4
PD10

2
BAS316/DG PD12 PR220 PR218
+VAD_1 2 PR155 DCIN
2 1 1 1 *0_2/S *0_2/S

3
2
1
VAC

1
10_8 5 PQ30 PC210
ICHP

1500P/50V_4
BAS316/DG AON7410
PC137 PD8

RB501V-40
1U/25V_6

PD13 PC142

1U/10V_4
8681_ACAV 2 1

2
PR236 4
75K/F_4 BAS316/DG 8681COMP ICHM 8681ICHP PR163 10/F_4 8681CSP
8 COMP
B 8681ICHM PR159 10/F_4 8681CSM B
PD14

GND
29 AD_AIR

IAC
29,32,33,36,39 MAINON 2 1
PR160 PC141
PC150 BAS316/DG 0_4

0.01U/50V_4
17

7
0.1U/10V_4
PR237

8681IAC
4

12.4K/F_4
PC146
+BATCHG
0.47U/10V_4

PQ34 PR165
Place this cap SYS_I 29
IMD2 10/F_4
close to EC
PC145 PC149 PR117
3

470_8

0.01U/50V_4

0.01U/50V_4
PQ35
PR148 PR152 PR149

Q1
1 2
+BATCHG 1K_6 220K_4 220K_4

3
+VAD 6 5

Place this cap 3 4 +PRWSRC

Q2
2 PQ26
+VA close to EC 29 BATSHIP
MMDT2907A BATDIS_ID_DOD DMN601K-7
+VH28 39
+VAD_1 39
+3VPCU 4,7,26,28,29,31
ACOK_IN PR150 PR153
+5VPCU 4,29,31,32

1
1M_4 1M_4
+BATCHG
PR114
PQ27 0_4
3

PDTC144EU
A PD7 A
2D/C#_S6A
1 2 D/C# 29
*BAS316/DG
PC114
1

*10U/6.3V_8

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Charger (OZ8681) 1A

Date: Tuesday, May 03, 2011 Sheet 38 of 40


5 4 3 2 1
5 4 3 2 1


+VH28
+VA 38
+VAD +5V 8,11,17,21,22,23,25,28,30
+VIN 20,31,32,33,34,35,36,37,38

1
PR86
+3VS5 3,4,6,8,9,10,12,26,29,31,32,33,36,37
*0_4/S +5VS5 26,31,32,33,34,35,36,37
PR52
+VH28 38
22_6
+VAD_1 38

2
+3VSUS 28,30
+12VALW 9,37,38
PC54
+BATCHG 38 +3VS5
0.1U/25V_4 PC58
D +1.5VSUS 2,3,4,5,12,13,36,37 D
PC55 1U/35V_6
ACIN 29,38 +3VLANVCC 27

G5934CN
PC57

G5934CP
0.1U/25V_4
+0.75V_DDR_VTT 12,13,36

1
0.47U/25V_6 PR74

19
20

18

17

16
*0_4/S PC160 PC161 PC162 PC163
+VAD_1

1000P/50V_4

1U/6.3V_4
0.1U/10V_4
0.01U/25V_4
CN

VOUT
VIN

CP

D_CAP

2
29 LAN_POWER 1 ON1 PG 15 G5934PG

PR72
750K/F_4

MAINON 2 14 G5934VSENSE +3VS5


29,32,33,36,38 MAINON ON2 VSENSE

+12VALW PR68
100K/F_4
3 ON3 REG 13
29,36 SUSON PC166 PC165 PC167 PC164

1000P/50V_4

1U/6.3V_4
0.1U/10V_4
0.01U/25V_4
PC42
1U/16V_4
MAINON 4 ON4 PR26
DISC3 7 G5934DISC3 2 1 +3VSUS
*0_6/S
PR27 PR28 +3VS5
+3VLANVCC 2 1 G5934DISC1 5 DISC1 DISC2 6 G5934DISC2 2 1 +5V
C *0_6/S *0_6/S C

DRIVER4

DRIVER3

DRIVER1

DRIVER2
DISC4
PU2 +5VS5 +1.5VSUS

GND
P2806
PC246 PC245 PC247 PC244

1000P/50V_4

1U/6.3V_4
0.1U/10V_4
0.01U/25V_4
12

11

G5934DISC4 8

10

21

5
PC171 PC234 +VIN +1.5V
0.1U/10V_4 0.1U/10V_4

MAIND 4 4
$
+3VS5
PQ41 2A PR197
PC14 AON7410 PQ56 *22_8 +3VS5

3
2
1

3
2
1
1
2200P/50V_4 AON7410 PR198
5

PR25 +5V +1.5V *1M_4

3
PC33 PQ13 *0_6/S PQ55
AON7410 +3VS5 *DMN601K-7
0.1U/10V_4

2
4 MAIND3.3V 2 PC249 PC250 PC251 PC248
$

1000P/50V_4
PC170 PC236 PC235

0.1U/10V_4
0.01U/25V_4

1U/6.3V_4
3
0.1U/10V_4 0.1U/10V_4 *10U/6.3V_8
PC35 +3V PC34
1
2
3

+3V

1
2
5
6
2200P/50V_4 0.1U/10V_4

1
2
$
LAN_ON 3 PR196
PQ58 *1M_4
PQ38 +3VLANVCC *DMN601K-7
MAIND MAIN_ONG
PC89 PC88 PC15 ME3424D-G

1
0.1U/10V_4 *10U/6.3V_8 +3VS5 2200P/50V_4
B B
+3V
PC221 PC222 +1.5VSUS

0.1U/10V_4

*10U/6.3V_8
PC9
6
5
2
1

$
0.1U/10V_4

3 SUSD PC254 PC253 PC255 PC252


+3VSUS

1000P/50V_4
PC238 PC169 PC239 PC168

1U/6.3V_4
0.1U/10V_4
0.01U/25V_4

1000P/50V_4
PQ4

1U/6.3V_4
0.1U/10V_4
0.01U/25V_4
ME3424D-G PC6
4

2200P/50V_4

PC16 PC13
0.1U/10V_4

*10U/6.3V_8

+3V
+1.5VSUS

PC257 PC258 PC259 PC256

1000P/50V_4
PC241 PC242 PC243 PC240

1U/6.3V_4
0.1U/10V_4
0.01U/25V_4

1000P/50V_4

0.1U/10V_4
0.01U/25V_4

1U/6.3V_4
A A

352-(&75
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom Dis-charge IC (G5934) 1A

Date: Tuesday, May 03, 2011 Sheet 39 of 40


5 4 3 2 1

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