This full-text paper was peer-reviewed and accepted to be presented at the IEEE ICCSP 2015 conference.

Design of a Two Stage Ku Band Low Noise

Amplifier for Satellite Applications
Pradyumna Kumar Bishoyi, S. S. Karthikeyan

Abstract-This paper presents the design of a cascaded two This paper is structured as follows: the design steps of the
stage low noise amplifier (LNA) for Ku band applications. Hetero LNA are given in Section II. Section III presents the design of
Junction Field Effect Transistor (HJFET) is used as an active complete single stage and double stage LNA circuit using
device to realize low noise figure. Multi stage amplifiers have AWR microwave office. The simulation results are shown and
been designed to obtain increased gain than a single stage a comparison IS drawn with the LNAs reported in the
amplifier. In this work, two perfectly matched circuits have been
literature.
cascaded to make the design simpler and provide easy trouble­
shooting. The designed LNA has a gain of 25.81 dB and a NF of II. LNA DESIGN
0.40 dB at 12 GHz. The designed high gain LNA can be used for
satellite applications.
Design of a LNA at a particular frequency involves a
number of compromises regarding gain, NF, input impedance,
Keywords- Hetero Junction Field Effect Transistor, Ku-band output impedance and power dissipation [6]. A step-by-step
low noise amplifier, noise figure. approach is followed in designing a LNA [7-12]. The design
steps are as follows:
I. INTRODUCTION • Selection of proper transistor
A Low Noise Amplifier (LNA) is typically the first block • Stability analysis
of communication receiver system. Its function is to amplify • Matching circuit design
very weak signals and maintain signal-to-noise ratio (SNR) of • Multi stage design
the system as high as possible, while keeping the noise level
low. According to Friis' formula [I] the overall noise figure of Selection of a transistor is the initial step in the LNA
the system mainly depends on the gain and noise figure of design. The transistor used in this design is NE3511S02, a
LNA. It is tedious to achieve high gain, low noise figure (NF), HJFET manufactured by the Renesas devices, as shown in
good input, output matching and unconditional stability Fig.1.
simultaneously at a given frequency. There is always a trade­
off exists between gain and NF of the amplifier, which makes
PORT
the design of LNA for microwave frequencies more
P=2
challenging [2]. Careful selection of transistor can meet most Z=50 Ohm
of the above conditions. The input port of the transistor should
be matched to achieve minimum NF and the output port
should be properly matched to deliver maximum power at the PORT
output port [3]. P=1
Z=50 Ohm
Many methods were proposed in the literature to increase SUBCKT
l
the gain of LNA. In [4], a LNA is designed using GaAs 10=S1
MESFET in the Ku band region where a maximum of 14.1 dB NET="NE3511S02
gain is achieved along with a NF of \.02 dB. In [5], LNA with
10.12dB gain is designed using CMOS but the NF is as high
as 4.95dB. In this work, authors attempt to achieve maximum
gain and minimum NF using Hetero Junction Field Effect
Transistor (HJFET).
Fig. 1. NE3511S02 transistor

Pradyumna Kumar Bishoyi is pursuing Master of Design (M.Des) in The S-parameters and noise parameters of the transistor are
Communication Systems Design in Indian Institute of Information
Technology Design and Manufacturing, Kancheepuram. (e­ listed in Table. I.
mail:pradyumna.iiitk@gmail.com).
Dr. S.S. Karthikeyan is an Asst.Prof in the department of Electrical and A. Stability Analysis of the Transistor
Electronics Engineering, Indian Institute of Information Technology Design
and Manufacturing, Kancheepuram. (e-maiI:ssk@iiitdm.ac.in). The selected HJFET transistor is now analyzed for stability
using Rollet's condition [3]. i.e.,

978-1-4799-8081-9/15/$31.00 © 2015 IEEE

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 This full-text paper was peer-reviewed and accepted to be presented at the IEEE ICCSP 2015 conference.

(I)

(2)

TABLE I
S PARAMETERS AND NOISE FIGUREOF NE3511S02AT 12GHz

Mag (Sij) Ang(Sij)

Sll 0.440 -167.9
S21 3.704 13.9
S12 0.l06 8.9
S22 0.298 -113.4
NOISE P ARAMETRERS
ropl 0.477 131.70 Fig. 3. rMS and r OPT of NE3511S02 transistor
NFmin (dB) 0.36 -
B. Evaluation a/Optimum Source and Load Impedances
The simulation of stability factor K is shown in Fig.2.
Maximum gain of 13.955dB is obtained when the source
K
1.08�------� impedance (rs) is matched to a unique rMS at the cost of NF
1.075
(1.09dB). Taking fs fOPT gives NF as 0.36 dB but the gain is
=

dropped to 1.66 dB less than the maximum to 12.295dB. As a

1.07
trade-off between the two entities, a source impedance fOPT
1.065
can be considered between these two impedances which will
1.06 give the optimum gain and low NF simultenously. This can be
1.055 obtained graphically by taking the intersection point between
1.05 the constant available gain circle and the constant noise circle
1.045 [3] as shown in FigA .
1.04
1.035
1.03 �------�
11 11.5 12 12.5 13
Frequency (GHz)

Fig. 2. K factor vs Frequency

From Fig 2, as K 1.058 and I�I 0.261 the transistor is

= =

unconditionally stable at 12 GHz. The maximum available

gain obtained from the transistor at a particular frequency is
dependent on the S-parameters of the transistor [3] i.e.,

G
MAX
=S2
s
1 (K-.JK2-1) (3)
12
Using (3), the maximum gain obtained at 12 GHz is
13.955 dB. This can be achieved by conjugate matching of
input and output ports (rMS and rM d simultaneously.
Minimum noise condition will satisfy when the input source
impedance is fixed to an optimum rOPT. From the simulated
result shown in Fig.3, the input conjugate match (fMS ) for the
transistor is found to be 0.754LI79.6 and the optimum source Fig. 4. Position of rALT on the smith chart
impedance (rOPT ) is 0.754LI31.7 .

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 This full-text paper was peer-reviewed and accepted to be presented at the IEEE ICCSP 2015 conference.

From FigA, the value of rALT is OA78LI50.S . A. Multistage Amplifier Design

Comparison of gain and NF for all source terminations rMS ,
The gain of the LNA can be increased by cascading two
rOPT and rALT is shown in Table II. The output reflection co­
amplifiers. But cascading of two amplifiers may increase the
efficient [3] rOUT is found out using
noise figure (NF) of the overall system. So careful design of
inter stage network will help to reduce the mismatch between
two stages of amplifier. In this design two identical stages of
(4) the amplifier are cascaded for a simple circuit realization and
to result in high gain. The circuit of two stage cascaded
amplifier is shown in Fig. S.
where, ls = lAU .
15 ,-----�----�--�

TABLE II
COMPARISONS OF GAIN AND NF OF VARIOUS SOURCE TERMINATIONS FOR
NE3511S02 TRANSISTOR
to

Source Impedance lMs lOPT 1ALT Available Gain =12.86 dB

Available Gain (dB) 13.95 12.295 13 NF � 0.3824 dB

Noise Figure (dB) 1.098 0.36 0.396

o L---
10
-
-
-
----
-------------
11 12
�
�------- ---- --�----�--�
13 14
---- 15
Frequency (GRz)
The conjugate of output reflection coefficient will give the
*
load reflection coefficient (rL rOUT )' For this design the load
=
Fig. 6. The gain and noise figure of LNA
reflection coefficient is rL� OA17L146.65 . Matching circuit o ,-----�----�--�

is designed to match both input and output reflection

coefficients to the son termination. .,. .....-..--- ".,.
,......
" ,
"
III. LNA CIRCUIT AND SIMULATION -15

Fig. 5 shows the complete circuit diagram of single stage $'

::::.
'\ /'
LNA with proper matching network. The results obtained after
� -20
."
..s
\ \
/
I
simulation are presented in Fig. 6. The single stage LNA gain s. -25 ,
, I
I

is 12.S5dB and NF is 0.3SdB. Furthermore, the return loss of � ,

I
I
I
-30
single stage amplifier Sll is -SA51 dB as shown in Fig.7. u-..
�: �221 � 31.26 dB
-35
"
INO II
PORT 1/
10=L2 -40
P=2 •
L=0.494 nH Z=50 Ohm
•

SUBCKT 45 L-----�----�--�
10 II 12 13 14 15
10=S2
NET="NE3511S02
Freqnency (GHz)

CAP Fig. 7. S parameters of the single stage LNA

10=C2

T
,�.�,,""e

CAP
10=Cl

T
'��

Fig. 5: Single stage LNA Fig. 8. Cascaded two stage LNA

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 This full-text paper was peer-reviewed and accepted to be presented at the IEEE ICCSP 2015 conference.

B. Results and Discussion

From Fig.9, the gain of the two stage LNA is found to be

25.81dB and the NF is OAOdB. The simulated return loss of TABLE III COMPARTSONOF GAINAND NFOF LNAAT Ku BAND
the two stage LNA is shown in Fig.10 Transistor Gain NF
References
used (dB) (dB)

This Work HJFET 25.81 0.401

[4] GaAs MESFET 14.1 1.02

[5] CMOS 10.123 4.958

[8] Si Bipolar 9 4.7

10 [9] PHEMT 4.5 1.3
NF � 0.4017 dB

[10] HEMT 8.2 0.5

o������������==�--�------�
_ _____

10 11
l
_________ _ _____ _ -

12 13 14
---

15
REFERENCES
Frequency (GRz)

[I] H.T.Friis, "Noise figures of radio receivers," Proc. IRE, vol. 32, pp. 419-
422, July 1944.
Fig. 9. Gain and NF of two stage LNA
[2] G.Gonzalez, "Microwave transistor amplifiers analysis and design," 2nd
ed., Prentice Hall, New Jersey, 1996.
[3] R.E.Collin, "Foundations for microwave engineering," 2nd ed., Wiley,
New Jersey, 2001.
[4] Bashir,M.A, M.M.Ahmed, U.Rafiq and Q.D.Memon, "Design of a Ku­
-15 band high gain low noise amplifier," IEEE Intern. Conf. RF and
Microwave conf. (RFM),2013, pp.168-171, 2013.
� -20 [5] W.R.Liou, S.R.Mahendra and T.H.Chen, " A wideband LNA design for
�
"0
-25
Ku-band application," proc IEEE Intern. conf. on comm., circ. And sys.
.B (lCCCAS) 2010.
=

�
OJ)
-30 [6] B.M.Albinsson, "A graphic design methods for matched Low-Noise
-35
Amplifiers," IEEE trans. On Microw. Theo. And tech., vol. 38, no.2,
pp.1l8-124, February 1990.
-40 [7] M.W.Radmanesh, "Radio frequency and microwave electronics
-45
illustrated," Prentice Hall,2001
[8] G.Giriando,E.Ragonese, G.Palmisanio, "Silicon Bipolar LNAs in X
-50
10 11 12 13 14 15
and Ku band," Analog integrated circuits and signal processing, vol. 41,
Frequency (GRz) pp. 119-127, 2004.
[9] L.Bagline, R.D.Pollard, v.PoatoyLKO, "12 GHz MMIC series feedback
Fig. 10. S parameters of the two stage LNA LNA based on a novel analytical design procedure for simultaneous
noise and power match," United Kingdom 291h European Microwave
Comparison of proposed LNA with the LNAs reported in conference, Munich 1999.
the literature is summarized in Table III. The proposed LNA [10] H. Tsukada ,et.al, "A 12-GHz-band MMIC low noise amplifier with low
has a gain of 12.85dB in single stage and 25.81 dB in the dual Rg and low Rn HEMT," 3'd Asia-Pasific Microwave Conf. proc, Tokyo,
stage. The NF is OAOdB and is the lowest amongst the works pp 955-958.
in the literature. [II] R.Gilmore, L. Besser, "Pratical RF Circuit Desig n for Modem Wireless
Systems-Passive Circuits and Systems", vo1.l, Artech House, Boston,
2003.
IV. CONCLUSION [12] R.Gilmore, L. Besser, "Pratical RF Circuit Desig n for Modem Wireless
Systems- Active Circuits and Systems", vol.II, Artech House, Boston,
A single stage and a dual stage LNA is designed at 12GHz.
2003.
The gain of the dual stage LNA is 25.81dB and the design can
be useful for satellite communication where high gain and low
NF LNAs are required at the front end of the receiver. The
future scope of the work is to realize a multi-band LNA using
HJFET. Using advanced CAD tools, a layout of the model
can be generated and fabricated as a scope of future work. The
work can also be extended to realize a dual band amplifier.

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