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Quadratic Placement Result

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Slide 64 © 2013, R.A. Rutenbar


VLSI CAD: Lecture 9.8
Logic to Layout ASIC Placement:
Analytical Placement:
Recursive Partitioning
Rob A. Rutenbar
University of Illinois
What Does A Real Quadratic Placement Look Like?
•  Like this:
•  Small IBM ASIC, few thousand gates

•  New problem:
•  Quadratic model minimizes wirelength
for big netlists, in a numerical way
•  But ignores that gates have physical
size, cannot be on top of each other
•  Now, we have to fix this…
•  Our solution: recursive partitioning

Slide 66 © 2013, R.A. Rutenbar

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