VLSI CAD: Lecture 9.

9
Logic to Layout ASIC Placement:
Analytical Placement:
Recursive Partitioning
Example
Rob A. Rutenbar
University of Illinois
Small Partitioning Example
a a a
1 2 1 placed 1

5 b 5 b 5 b
4 2 4 2
3
4
3 3
c c c

1. Initial netlist 2. Initial QP 3. First partition

5 gates (1,2,3,4,5) Sort on X:
9 wires Gate order 1 5 4 3 2
3 pads (a,b,c) Pick: 1 5 4 on left

Slide 77 © 2013, R.A. Rutenbar

Small Partitioning Example
Note: do not propagate
a pad b, since no wires on a a placed
left connect to it
1 1 1
5 5 5
b
4 2 2 4 2
4 2

3 3 3 3

c c c

4. Propagate gates/pads 5. 2nd QP input 6. 2nd QP solved

Right-side gates: 2,3 This is set up for New placement
Right-side pads: b this new smaller
Push to cut, using placement
y coordinates
Slide 78 © 2013, R.A. Rutenbar