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1 2 3 4 5 6 7 8

3&%67$&.83
/$<(5723
/$<(5*1'
BL6 Block Diagram
/$<(5,1
/$<(5,1
A /$<(59&& USB-0 A

EXT_LVDS
/$<(5%27 VGA LCD/CCD Con. P23
EXT_CRT

SWITCH CIRCUIT
P15,16,17,18,19,
EXT_HDMI
20,21,22
CRT Con.
DDRIII-SODIMM1 P23
DDRIII-SODIMM2 Arrandale (UMA+VGA) INT_LVDS
P12,13 PCI-E x16

DDR SYSTEM MEMORY


PCI-E
INT_CRT
Dual Channel DDR III
HDMI Con.
800/1066/1333 MHZ

Graphics Interfaces
HDMI P14
PCI-E
INT_HDMI
rPGA 989 Level Shift
P14
P3, 4, 5, 6
SATA - HDD
P26 FDI
DMI

DMI(x4)
SATA - ODD
P26 SATA 0 PCIE-3
B B
FDI 3G
DMI USB-10
SATA 1 CK505
P24
SATA P2
PCI-Express
ESATA SATA 5 PCI-E
Re-driver P25

POWER SYSTEM
USB-4 ISL88731 P.34
SIM Card PCIE-5
USB-13 ESATA Con. WLAN ISL82882C P.39
P24
P25 Ibex Peak-M USB-5 RT8210B P.35
P24
USB-2 UPI6116A P.37
Bluetooth Con. USB 2.0 (Port0~13)
P31 USB UP6163 P.36
PCH UPI6111A P.38
USB-8 MAX8792A P.41
USB Con. P7, 8, 9, 10, 11 RT8152C P.42
P31
PCIE-6
USB-9 RTC Giga/10/100 Lan
USB Con. P28
P31 +VCC_CORE
C C

BATTERY
Cardreader USB-3 P7 +1.5V
+1.5VSUS
P29
Azalia IHDA
NVRAM NVRAM Con +VTT
LPC
+1.05V
P33
Cardreader Con.
3 IN 1 P29 LPC +1.8V

+1.5V_S5
Audio Codec EC +3VPCU
+3V_S5
P27 P30 +3V
+5VPCU
Port-B

Port-A

+5V_S5
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5V
D
MIC JACK HP SPK Con. Con. Con. +SMDDR_VTERM D
MDC Con.
P27 P27 P27 P27 P3 P31 P23 P30 P31 P31 +SMDDR_VREF
+VGPU_CORE
+VAXG

Quanta Computer Inc.


PROJECT : BL6

http://laptop-motherboard-schematic.blogspot.com/
Size Document Number Rev
A1A
Block Diagram
Date: Wednesday, April 07, 2010 Sheet 1 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

CLOCK Gen
+3V
+1.05V
250mA(20mils) +VDDIO_CLK
80mA(20mils)
L20 PBY160808T-601Y-N_1A +3V_CK505_VDD L43 PBY160808T-601Y-N_1A

D C841 C844 C826 C831 D


C798 C480 C485
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X U29 *10U/6.3V_8X 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X
R302
+1.5V *0_6 5 VDD_27
29 15
150mA(20mils) VDD_REF VDD_SRC_I/O
VDD_CPU_I/O 18 C3A
L39 R632 2.2_6 +1.5V_CK505_VDD CLK_BUF_DREFCLKP_R RP15
1 VDD_DOT_1.5 DOT_96 3 2 1 *SHORT_4P2R CLK_BUF_DREFCLKP {8}
17 4 CLK_BUF_DREFCLKN_R 4 3 JTAG need Option2 for
VDD_SRC_1.5 DOT_96# CLK_BUF_DREFCLKN {8}
PBY160808T-601Y-N_1A 24 Park,Madison Engineer sample.
VDD_CPU_1.5 CLK_VGA_27M_R R326 *EV@33_4
6
C827 C483 C797 C829 XTAL_OUT 27 XTAL_OUT
27M
27M_SS 7 CLK_VGA_27M#_R R329 EV@33_4
27M_CLK {16}
B2A
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X XTAL_IN 28 R722 *EV@33_4
XTAL_IN RP19 JTAG_TCK {16}
10 CLK_BUF_DREFSSCLKP_R 2 1 *SHORT_4P2R
SRC_1/SATA CLK_BUF_DREFSSCLKP {8}
11 CLK_BUF_DREFSSCLKN_R 4 3
SRC_1#/SATA# CLK_BUF_DREFSSCLKN {8}
CPU_SEL 30 13 CLK_BUF_PCIE_3GPLLP_R RP20 2 1 *SHORT_4P2R
REF_0/CPU_SEL SRC_2 CLK_BUF_PCIE_3GPLLP {8}
14 CLK_BUF_PCIE_3GPLLN_R 4 3
SRC_2# CLK_BUF_PCIE_3GPLLN {8}
CGDAT_SMB 31 SDA
C3A
CGCLK_SMB 32 16 ICS_CPU_STOP# R332 10K_4 +3V
SCL *CPU_STOP#
C CLK_PCH_14M R289 33_4 2 20 CLK_BUF_BCLK1_P_R TP81 C
{8} CLK_PCH_14M
8
VSS_DOT
VSS_27
CPU_1
CPU_1# 19 CLK_BUF_BCLK1_N_R TP82 C3A
9 23 CLK_BUF_BCLKP_R RP16 4 3 *SHORT_4P2R
VSS_SATA CPU_0 CLK_BUF_BCLKP {8}
12 22 CLK_BUF_BCLKN_R 2 1
VSS_SRC CPU_0# CLK_BUF_BCLKN {8}
C479 21 VSS_CPU VR_PWRGD_CLKEN
26 VSS_REF CKPW RGD/PD# 25
*10P/50V_4C
33 GND
SLG8LV595VTR

CLK POWERGOOD
CLK CRYSTAL CLK CPU_SEL CLK I2C Change to +3VPCU
(follow CRB)
B B
+3V
+3V
+3VPCU R291 1K/F_4 VR_PWRGD_CLKEN

R288

3
*10K_4
R675 R292
2 Q25 100K/F_4
Y5 {39} VR_PWRGD_CK505#

2
CPU_SEL 10K_4
XTAL_IN XTAL_OUT 2N7002_200MA
2 1
{8,24,28,33} SDATA 3 1 CGDAT_SMB {12,13,24}
14.318MHZ_30 R626

1
C790 C791
10K_4 Q59
33P/50V_4N 33P/50V_4N 2N7002_200MA R679

+3V 10K_4

2
A A

0 1 3 1
{8,24,28,33} SCLK CGCLK_SMB {12,13,24}
Quanta Computer Inc.
CPU =133MHz CPU=100MHz Q60
2N7002_200MA PROJECT : BL6
CPU_SEL (default) Size Document Number Rev
A1A
CLOCK GENERATOR
Date: Thursday, April 08, 2010 Sheet 2 of 45

5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
1 2 3 4 5 6 7 8

U15A
B26 PEG_COMP R370 49.9/F_4
PEG_ICOMPI
A26
PEG_ICOMPO
{9} DMI_TXN0 A24 B27
DMI_RX#[0] PEG_RCOMPO
{9} DMI_TXN1 C23 A25 PEG_RBIAS R369 750/F_4
DMI_RX#[1] PEG_RBIAS
{9} DMI_TXN2 B22 PEG_RXN[0..15] {15}
DMI_RX#[2] PEG_RXN15
{9} DMI_TXN3 A21 K35
DMI_RX#[3] PEG_RX#[0] PEG_RXN14 U15B
J34
PEG_RX#[1] PEG_RXN13 R57 20/F_4 H_COMP3 AT23
{9} DMI_TXP0 B24 J33 A16 CLK_CPU_BCLKP {10}
DMI_RX[0] PEG_RX#[2] PEG_RXN12 R56 20/F_4 H_COMP2 AT24 COMP3 BCLK
{9} DMI_TXP1 D23 G35 B16 CLK_CPU_BCLKN {10}
DMI_RX[1] PEG_RX#[3] PEG_RXN11 R20 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
{9} DMI_TXP2 B23 G32 MISC
DMI_RX[2] PEG_RX#[4] PEG_RXN10 R76 49.9/F_4 H_COMP0 AT26 COMP1
{9} DMI_TXP3 A22 F34 AR30 CLK_CPU_BCLK_ITP {33}
DMI_RX[3] PEG_RX#[5] PEG_RXN9 COMP0 BCLK_ITP
F31 AH24 AT30 CLK_CPU_BCLK_ITP# {33}
PEG_RX#[6] PEG_RXN8 TP3 SKTOCC# BCLK_ITP#
D24 D35
A
{9}
{9}
DMI_RXN0
DMI_RXN1 G24
F23
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8]
E33
C33
PEG_RXN7
PEG_RXN6 H_CATERR# AK14 CLOCKS PEG_CLK#
PEG_CLK
E16
D16 R374 EV@0_4
CLK_PCIE_3GPLLP {8}
CLK_PCIE_3GPLLN {8} A
{9} DMI_RXN2 DMI_TX#[2] PEG_RX#[9] CATERR#
H23 D32 PEG_RXN5 AT15
{9} DMI_RXN3 DMI_TX#[3] PEG_RX#[10] {10} H_PECI PECI
B32 PEG_RXN4 H_PROCHOT#_D AN26 A18 CLK_DREFSSCLKP_R R372 3 4 *IV@0X2
D25
PEG_RX#[11]
C31 PEG_RXN3 CPU_PM_THRMTRIP# AK15
PROCHOT# THERMAL DPLL_REF_SSCLK
A17 CLK_DREFSSCLKN_R 1 2
CLK_DREFSSCLKP {8}
{9} DMI_RXP0 DMI_TX[0] PEG_RX#[12] THERMTRIP# DPLL_REF_SSCLK# CLK_DREFSSCLKN {8}
F24 B28 PEG_RXN2
{9} DMI_RXP1 DMI_TX[1] PEG_RX#[13]
E23 B30 PEG_RXN1 R373 EV@0_4
{9} DMI_RXP2 DMI_TX[2] PEG_RX#[14]
G23 A31 PEG_RXN0 H_CPURST#_R AP26 F6 DDR3_DRAMRST#_C
{9} DMI_RXP3 DMI_TX[3] PEG_RX#[15] {33} H_CPURST#_R RESET_OBS# SM_DRAMRST#
PEG_RXP[0..15] {15} {9} PM_SYNC AL15
PM_SYNC
PEG_RX[0]
J35
H34
PEG_RXP15
PEG_RXP14
AN14
AN27
VCCPWRGOOD_1 DDR3 SM_RCOMP[0]
AL1 SM_RCOMP_0
AM1 SM_RCOMP_1
R407
R408
100/F_4
24.9/F_4
PEG_RX[1] {10,33} H_PWRGOOD VCCPWRGOOD_0 SM_RCOMP[1]
{9} FDI_TXN[7:0] FDI_TXN0 E22
PEG_RX[2]
H33
F35
PEG_RXP13
PEG_RXP12
PM_DRAM_PWRGD AK13
SM_DRAMPWROK MISC SM_RCOMP[2]
AN1 SM_RCOMP_2 R409
R98
130/F_4
10K_4
FDI_TX#[0] PEG_RX[3] +VTT
FDI_TXN1 D21 G33 PEG_RXP11 AM26 AN15 PM_EXT_TS#0
FDI_TX#[1] PEG_RX[4] {33} H_PWRGD_XDP TAPPWRGOOD PM_EXT_TS#[0] PM_EXTTS#0 {12}
FDI_TXN2 D19 E34 PEG_RXP10 AP15 PM_EXT_TS#1
FDI_TX#[2] PEG_RX[5] PM_EXT_TS#[1] PM_EXTTS#1 {13}
FDI_TXN3 D18 F32 PEG_RXP9 H_VTTPWRGD AM15 R97 10K_4
FDI_TX#[3] PEG_RX[6] VTTPWRGOOD +VTT
FDI_TXN4 G21 D34 PEG_RXP8 R38 1.5K/F_4 CPU_PLTRST# AL14
FDI_TX#[4] PEG_RX[7] {9,24,28,29,30} PLTRST# RSTIN#
FDI_TXN5 PEG_RXP7
FDI_TXN6
E19
F21
FDI_TX#[5]
Intel(R) FDI PEG_RX[8]
F33
B33 PEG_RXP6 PRDY#
AT28
AP27 XDP_PREQ#
XDP_PRDY# {33}

PCI EXPRESS -- GRAPHICS


FDI_TX#[6] PEG_RX[9] PREQ# XDP_PREQ# {33}
FDI_TXN7 G18 D31 PEG_RXP5 AN28 XDP_TCLK
FDI_TX#[7] PEG_RX[10]
A32 PEG_RXP4 R39 750/F_4
PWR MANAGEMENT TCK XDP_TCLK {33}
PEG_RX[11] PEG_RXP3 XDP_TMS
{9} FDI_TXP[7:0] C30 AP28 XDP_TMS {33}
FDI_TXP0 PEG_RX[12] PEG_RXP2 TMS
D22 A28
FDI_TXP1 FDI_TX[0] PEG_RX[13] PEG_RXP1 XDP_TRST#
C21 B29 AT27
FDI_TXP2
FDI_TXP3
D20
C18
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
PEG_RX[14]
PEG_RX[15]
A30 PEG_RXP0
PEG_TXN[0..15] {15}
{33} XDP_OBS[0:7]
XDP_OBS0 AJ22
XDP_OBS1 AK22 BPM#[0]
BPM#[1]
JTAG & BPM TRST#

TDI
AT29 XDP_TDI_R
XDP_TRST# {33}

FDI_TXP4 G22 L33 PEG_TXN15_C C624 EV@0.1U/10V_4X PEG_TXN15 XDP_OBS2 AK24 AR27 XDP_TDO_R
FDI_TXP5 FDI_TX[4] PEG_TX#[0] PEG_TXN14_C C617 EV@0.1U/10V_4X PEG_TXN14 XDP_OBS3 AJ24 BPM#[2] TDO XDP_TDI_M
E20 M35 AR29
FDI_TXP6 FDI_TX[5] PEG_TX#[1] PEG_TXN13_C C614 EV@0.1U/10V_4X PEG_TXN13 XDP_OBS4 AJ25 BPM#[3] TDI_M XDP_TDO_M
F20 M33 AP29
FDI_TXP7 FDI_TX[6] PEG_TX#[2] PEG_TXN12_C C607 EV@0.1U/10V_4X PEG_TXN12 XDP_OBS5 AH22 BPM#[4] TDO_M
G19 M30
FDI_TX[7] PEG_TX#[3] PEG_TXN11_C C597 EV@0.1U/10V_4X PEG_TXN11 XDP_OBS6 AK23 BPM#[5]
L31
FDI_FSYNC0 PEG_TX#[4] PEG_TXN10_C C589 EV@0.1U/10V_4X PEG_TXN10 XDP_OBS7 AH23 BPM#[6]
{9} FDI_FSYNC0 F17 K32 AN25 SYS_RESET# {9,33}
FDI_FSYNC1 FDI_FSYNC[0] PEG_TX#[5] PEG_TXN9_C C586 EV@0.1U/10V_4X PEG_TXN9 BPM#[7] DBR#
{9} FDI_FSYNC1 E17 M29
FDI_FSYNC[1] PEG_TX#[6] PEG_TXN8_C C584 EV@0.1U/10V_4X PEG_TXN8 PZ98927-3641-41F
J31
FDI_INT PEG_TX#[7] PEG_TXN7_C C582 EV@0.1U/10V_4X PEG_TXN7
{9} FDI_INT C17 K29
FDI_INT PEG_TX#[8] PEG_TXN6_C C579 EV@0.1U/10V_4X PEG_TXN6
H30
FDI_LSYNC0 PEG_TX#[9] PEG_TXN5_C C577 EV@0.1U/10V_4X PEG_TXN5
{9} FDI_LSYNC0 F18 H29
FDI_LSYNC1 FDI_LSYNC[0] PEG_TX#[10] PEG_TXN4_C C575 EV@0.1U/10V_4X PEG_TXN4
{9} FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11] PEG_TXN3_C C573 EV@0.1U/10V_4X PEG_TXN3
E28
PEG_TX#[12] PEG_TXN2_C C571 EV@0.1U/10V_4X PEG_TXN2
D29
PEG_TX#[13] PEG_TXN1_C C569 EV@0.1U/10V_4X PEG_TXN1
B D27
PEG_TX#[14]
C26 PEG_TXN0_C C567 EV@0.1U/10V_4X PEG_TXN0 +VTT JTAG MAPPING +VTT
B

PEG_TX#[15]
PEG_TXP[0..15] {15}
Processor hot
L34 PEG_TXP15_C C623 EV@0.1U/10V_4X PEG_TXP15
PEG_TX[0] PEG_TXP14_C C616 EV@0.1U/10V_4X PEG_TXP14 H_CATERR# R34 49.9/F_4 XDP_TDI_R R72 0_4
M34 XDP_TDI {33}
PEG_TX[1] PEG_TXP13_C C613 EV@0.1U/10V_4X PEG_TXP13 H_CPURST#_R R99 *68_4 XDP_TDO_M R59 *0_4 XDP_TDO R40
M32 XDP_TDO {33}
PEG_TX[2] PEG_TXP12_C C608 EV@0.1U/10V_4X PEG_TXP12
L30
PEG_TX[3] PEG_TXP11_C C590 EV@0.1U/10V_4X PEG_TXP11 XDP_TCLK R53 *51/F_4 XDP_TMS R60 *51/F_4 68_4
M31
PEG_TX[4] PEG_TXP10_C C587 EV@0.1U/10V_4X PEG_TXP10 XDP_TDI_R R92 *51/F_4 R66
K31
PEG_TX[5] PEG_TXP9_C C585 EV@0.1U/10V_4X PEG_TXP9 XDP_PREQ# R64 *51/F_4 0_4 XDP_TRST#
M28
PEG_TX[6] PEG_TXP8_C C583 EV@0.1U/10V_4X PEG_TXP8
H31
PEG_TX[7] PEG_TXP7_C C581 EV@0.1U/10V_4X PEG_TXP7 R41 0_4 H_PROCHOT#_D
K28
PEG_TX[8] PEG_TXP6_C C578 EV@0.1U/10V_4X PEG_TXP6 XDP_TDI_M R73 *0_4 R93 {39} H_PROCHOT#
G30
PEG_TX[9] PEG_TXP5_C C576 EV@0.1U/10V_4X PEG_TXP5 XDP_TDO_R R95 0_4
G29 51/F_4
PEG_TX[10] PEG_TXP4_C C574 EV@0.1U/10V_4X PEG_TXP4 +1.5VSUS
F28
PEG_TX[11]
E27 PEG_TXP3_C C572 EV@0.1U/10V_4X PEG_TXP3 for S3 power reduction
PEG_TX[12] PEG_TXP2_C C570 EV@0.1U/10V_4X PEG_TXP2
D28
PEG_TX[13] PEG_TXP1_C C568 EV@0.1U/10V_4X PEG_TXP1
C27
PEG_TX[14] PEG_TXP0_C C566 EV@0.1U/10V_4X PEG_TXP0
C25
PEG_TX[15]
PZ98927-3641-41F R22
1K/F_4
{10} DDR3_DRAMRST#_PCH
Scan Chain STUFF -> Ra, Rc, Re Thermal Trip
C3A Change from Page36 DDR3_DRAMRST# {12,13} (Default) NO STUFF -> Rb, Rd

3
R10 C37 +VTT
Q1 CPU Only STUFF -> Ra, Rb
S3_1.5V PR222 *0_6 *100K_4 0.1U/10V_4X
{36} S3_1.5V MAINON {11,30,37,38,40}
R21
NO STUFF -> Rc, Rd, Re
2
*0_4

3
GMCH Only STUFF -> Rd, Re
B2A BSS138_NL_0.22MA
NO STUFF -> Ra, Rb, Rc

1
+3V_S5 2 Q10
DDR3_DRAMRST#_C {9,39} DELAY_VR_PWRGOOD
2N7002_200MA
5

PU12
PR227 100K_4 2 D3A

1
1 2 4
1 +1.5V_CPUVDDQ_PG +3V Discrete only
C C

TC7SH08FU(F) R70 *SHORT_4 R16 EV@1K_4 FDI_INT +VTT R107 R106


{30} HWPG
3

5
R12 EV@1K_4 FDI_FSYNC0 1K_4 100K_4
PQ49
2
3

DMN601K-7_300MA PR241 *0_4 4 HWPG_1 R48 2K/F_4 H_VTTPWRGD R17 EV@1K_4 FDI_FSYNC1 R101 Q12
S3_Reduce {30} C3A

2
R63 1 MMBT3904-7-F_200MA
*SHORT_4 R15 EV@1K_4 FDI_LSYNC0 *56.2/F_4
2 R61 CPU_PM_THRMTRIP# 1 3 SYS_SHDN#
MAINON_ON_G {5,12,40,41}
3
SYS_SHDN# {16,35}
U2 TC7SH08FU(F) 1K/F_4 R13 EV@1K_4 FDI_LSYNC1

FDI_FSYNC can gang all these 4


R58 *0_4 R46 *0_4 signals together and tie them with R100 0_4 PM_THRMTRIP#
1

{9,30} MPWROK PM_THRMTRIP# {10}


B2A only one 1K resistor to GND (
Check list 1.0 ).

+1.5V_CPUVDDQ +3V_S5
CPU FAN CTRL
+3V
+3V_S5 +3V_S5

R412 +3V
10K_4 D3A 3mA(40mils) R368
R410 R403
10K_4 +1.5V_CPUVDDQ_PG 10K_4
+5V
5

10K_4 U17 CN12


40mils
3

2 U14 {30} FANSIG1 FANSIG1

2
4 R419 1.5K/F_4 R422 0_4 PM_DRAM_PWRGD C23 2.2U/6.3V_6X 2 3 TH_FAN_POWER1
PM_DRAM_PWRGD {9} VIN VO 1
1 5
GND 2
3

2 +1.5VSUS TEMP_ALERT# 1 3 CPUFAN#_ON_R_1 1 6


TC7SH08FU(F) {10,30} TEMP_ALERT# Q35 2N7002_200MA /FON GND 3
7
3

R421 GND C551 C550 C552


4 8
R404 1K_4 Q39 {30} VFAN1 VSET GND
2
D 2N7002_200MA 750/F_4 +3V G995P1U 10U/6.3V_8X 0.01U/25V_4X *0.01U/25V_4X 85205-0300L D
1

Q38 R645
FDV301N_200MA *1.1K/F_4 FANPWR = 1.6*VSET

B2A
1

2
PM_DRAM_PWRGD

PM_DRAM_PWRGD: {22} VGA_THERM#


1 3
R634 Q65 EV@2N7002_200MA
Never drive hight before DDR3 voltage ramp to stable *3K/F_4
E3A
Quanta Computer Inc.

http://laptop-motherboard-schematic.blogspot.com/ Size

Date:
Document Number
PROJECT :BL6
PROCESSER 1/4(HOST&PEX)
Saturday, April 10, 2010 Sheet 3 of
Rev

45
A1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

A A
{13} M_B_DQ[63:0]
{12} M_A_DQ[63:0] U15C U15D
M_A_DQ0 A10 AA6 M_A_CLKP0 {12} M_B_DQ0 B5 W8 M_B_CLKP0 {13}
M_A_DQ1 C10 SA_DQ[0] SA_CK[0] M_B_DQ1 SB_DQ[0] SB_CK[0]
SA_DQ[1] SA_CK#[0] AA7 M_A_CLKN0 {12} A5 SB_DQ[1] SB_CK#[0] W9 M_B_CLKN0 {13}
M_A_DQ2 C7 P7 M_A_CKE0 {12} M_B_DQ2 C3 M3 M_B_CKE0 {13}
M_A_DQ3 SA_DQ[2] SA_CKE[0] M_B_DQ3 SB_DQ[2] SB_CKE[0]
A7 SA_DQ[3] B3 SB_DQ[3]
M_A_DQ4 B10 Y6 M_A_CLKP1 {12} M_B_DQ4 E4 V7 M_B_CLKP1 {13}
M_A_DQ5 D10 SA_DQ[4] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK[1]
SA_DQ[5] SA_CK#[1] Y5 M_A_CLKN1 {12} A6 SB_DQ[5] SB_CK#[1] V6 M_B_CLKN1 {13}
M_A_DQ6 E10 P6 M_A_CKE1 {12} M_B_DQ6 A4 M2 M_B_CKE1 {13}
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
A8 SA_DQ[7] C4 SB_DQ[7]
M_A_DQ8 D8 AE2 M_A_CS#0 {12} M_B_DQ8 D1 AB8 M_B_CS#0 {13}
M_A_DQ9 SA_DQ[8] SA_CS#[0] M_B_DQ9 SB_DQ[8] SB_CS#[0]
F10 SA_DQ[9] SA_CS#[1] AE8 M_A_CS#1 {12} D2 SB_DQ[9] SB_CS#[1] AD6 M_B_CS#1 {13}
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 SA_DQ[10] M_B_DQ11 SB_DQ[10]
F7 SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 {12} F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 {13}
M_A_DQ12 E9 AF9 M_A_ODT1 {12} M_B_DQ12 C2 AD1 M_B_ODT1 {13}
M_A_DQ13 SA_DQ[12] SA_ODT[1] M_B_DQ13 SB_DQ[12] SB_ODT[1]
B7 SA_DQ[13] M_A_DM[7:0] {12} F5 SB_DQ[13] M_B_DM[7:0] {13}
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
M_A_DQ15 SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
C6 SA_DQ[15] SA_DM[1] D7 M_A_DM1 M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1
M_A_DQ16 H10 H7 M_A_DM2 M_B_DQ16 H6 H3 M_B_DM2
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
SA_DQ[17] SA_DM[3] M7 M_A_DM3 M_B_DQ17 G2 SB_DQ[17] SB_DM[3] K1 M_B_DM3
M_A_DQ18 K7 AG6 M_A_DM4 M_B_DQ18 J6 AH1 M_B_DM4
M_A_DQ19 SA_DQ[18] SA_DM[4] SB_DQ[18] SB_DM[4]
J8 SA_DQ[19] SA_DM[5] AM7 M_A_DM5 M_B_DQ19 J3 SB_DQ[19] SB_DM[5] AL2 M_B_DM5
M_A_DQ20 G7 AN10 M_A_DM6 M_B_DQ20 G1 AR4 M_B_DM6
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]

DDR SYSTEM MEMORY A


M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7

DDR SYSTEM MEMORY B


M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 SA_DQ[22] M_A_DQSN[7:0] {12} J2 SB_DQ[22] M_B_DQSN[7:0] {13}
M_A_DQ23 J10 C9 M_A_DQSN0 M_B_DQ23 J1 D5 M_B_DQSN0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQSN1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQSN1
L7 SA_DQ[24] SA_DQS#[1] F8 J5 SB_DQ[24] SB_DQS#[1] F4
M_A_DQ25 M6 J9 M_A_DQSN2 M_B_DQ25 K2 J4 M_B_DQSN2
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] M_A_DQSN3 M_B_DQ26 SB_DQ[25] SB_DQS#[2] M_B_DQSN3
SA_DQ[26] SA_DQS#[3] N9 L3 SB_DQ[26] SB_DQS#[3] L4
B M_A_DQ27 L9 AH7 M_A_DQSN4 M_B_DQ27 M1 AH2 M_B_DQSN4 B
M_A_DQ28 SA_DQ[27] SA_DQS#[4] SB_DQ[27] SB_DQS#[4]
L6 SA_DQ[28] SA_DQS#[5] AK9 M_A_DQSN5 M_B_DQ28 K5 SB_DQ[28] SB_DQS#[5] AL4 M_B_DQSN5
M_A_DQ29 K8 AP11 M_A_DQSN6 M_B_DQ29 K4 AR5 M_B_DQSN6
M_A_DQ30 SA_DQ[29] SA_DQS#[6] SB_DQ[29] SB_DQS#[6]
N8 SA_DQ[30] SA_DQS#[7] AT13 M_A_DQSN7 M_B_DQ30 M4 SB_DQ[30] SB_DQS#[7] AR8 M_B_DQSN7
M_A_DQ31 P9 M_A_DQSP[7:0] {12} M_B_DQ31 N5 M_B_DQSP[7:0] {13}
M_A_DQ32 AH5 SA_DQ[31] SB_DQ[31]
SA_DQ[32] SA_DQS[0] C8 M_A_DQSP0 M_B_DQ32 AF3 SB_DQ[32] SB_DQS[0] C5 M_B_DQSP0
M_A_DQ33 AF5 F9 M_A_DQSP1 M_B_DQ33 AG1 E3 M_B_DQSP1
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
SA_DQ[34] SA_DQS[2] H9 M_A_DQSP2 M_B_DQ34 AJ3 SB_DQ[34] SB_DQS[2] H4 M_B_DQSP2
M_A_DQ35 AK7 M9 M_A_DQSP3 M_B_DQ35 AK1 M5 M_B_DQSP3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
SA_DQ[36] SA_DQS[4] AH8 M_A_DQSP4 M_B_DQ36 AG4 SB_DQ[36] SB_DQS[4] AG2 M_B_DQSP4
M_A_DQ37 AG5 AK10 M_A_DQSP5 M_B_DQ37 AG3 AL5 M_B_DQSP5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
SA_DQ[38] SA_DQS[6] AN11 M_A_DQSP6 M_B_DQ38 AJ4 SB_DQ[38] SB_DQS[6] AP5 M_B_DQSP6
M_A_DQ39 AJ6 AR13 M_A_DQSP7 M_B_DQ39 AH4 AR7 M_B_DQSP7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
SA_DQ[40] M_A_A[15:0] {12} AK3 SB_DQ[40] M_B_A[15:0] {13}
M_A_DQ41 AJ9 Y3 M_A_A0 M_B_DQ41 AK4 U5 M_B_A0
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
SA_DQ[42] SA_MA[1] W1 AM6 SB_DQ[42] SB_MA[1] V2
M_A_DQ43 AK12 AA8 M_A_A2 M_B_DQ43 AN2 T5 M_B_A2
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
SA_DQ[44] SA_MA[3] AA3 AK5 SB_DQ[44] SB_MA[3] V3
M_A_DQ45 AL7 V1 M_A_A4 M_B_DQ45 AK2 R1 M_B_A4
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
SA_DQ[46] SA_MA[5] AA9 AM4 SB_DQ[46] SB_MA[5] T8
M_A_DQ47 AL8 V8 M_A_A6 M_B_DQ47 AM3 R2 M_B_A6
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
SA_DQ[48] SA_MA[7] T1 AP3 SB_DQ[48] SB_MA[7] R6
M_A_DQ49 AM10 Y9 M_A_A8 M_B_DQ49 AN5 R4 M_B_A8
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
SA_DQ[50] SA_MA[9] U6 AT4 SB_DQ[50] SB_MA[9] R5
M_A_DQ51 AL11 AD4 M_A_A10 M_B_DQ51 AN6 AB5 M_B_A10
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
SA_DQ[52] SA_MA[11] T2 AN4 SB_DQ[52] SB_MA[11] P3
M_A_DQ53 AN9 U3 M_A_A12 M_B_DQ53 AN3 R3 M_B_A12
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
SA_DQ[54] SA_MA[13] AG8 AT5 SB_DQ[54] SB_MA[13] AF7
M_A_DQ55 AP12 T3 M_A_A14 M_B_DQ55 AT6 P5 M_B_A14
M_A_DQ56 AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15
C SA_DQ[56] SA_MA[15] V9 AN7 SB_DQ[56] SB_MA[15] N1 C
M_A_DQ57 AN12 M_B_DQ57 AP6
M_A_DQ58 AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
SA_DQ[58] AP8 SB_DQ[58]
M_A_DQ59 AT14 M_B_DQ59 AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
SA_DQ[60] AT7 SB_DQ[60]
M_A_DQ61 AL13 M_B_DQ61 AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
SA_DQ[62] AR10 SB_DQ[62]
M_A_DQ63 AP14 M_B_DQ63 AT10
SA_DQ[63] SB_DQ[63]
{12} M_A_BS#0 AC3 SA_BS[0] {13} M_B_BS#0 AB1 SB_BS[0]
{12} M_A_BS#1 AB2 SA_BS[1] {13} M_B_BS#1 W5 SB_BS[1]
{12} M_A_BS#2 U7 SA_BS[2] {13} M_B_BS#2 R7 SB_BS[2]
{12} M_A_CAS# AE1 SA_CAS# {13} M_B_CAS# AC5 SB_CAS#
{12} M_A_RAS# AB3 SA_RAS# {13} M_B_RAS# Y7 SB_RAS#
{12} M_A_WE# AE9 SA_W E# {13} M_B_WE# AC6 SB_W E#
PZ98927-3641-41F PZ98927-3641-41F

D D

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
A1A
PROCESSER 2/4(DDR)
Date: Saturday, April 10, 2010 Sheet 4 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U15G
U15F 18A
+VCC_CORE AG35 VCC1 VTT0_1 AH14 +VTT AT21 VAXG1

SENSE
LINES
AG34 VCC2 VTT0_2 AH12 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE {42}
AG33 VCC3 VTT0_3 AH11 AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE {42}
AG32 AH10 C615 10U/6.3V_8X AT16
VCC4 VTT0_4 VAXG4
AG31 VCC5 VTT0_5 J14 AR21 VAXG5
C71 10U/6.3V_8X AG30 J13 C606 10U/6.3V_8X AR19
VCC6 VTT0_6 VAXG6
AG29 VCC7 VTT0_7 H14 AR18 VAXG7

GRAPHICS VIDs
C39 10U/6.3V_8X AG28 H12 C592 10U/6.3V_8X AR16 AM22 GFXVR_VID_0 {42}
VCC8 VTT0_8 VAXG8 GFX_VID[0]
A
AG27 VCC9 VTT0_9 G14 AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 {42} A
C38 10U/6.3V_8X AG26 G13 C28 10U/6.3V_8X AP19 AN22 GFXVR_VID_2 {42}
VCC10 VTT0_10 VAXG10 GFX_VID[2]
AF35 VCC11 VTT0_11 G12 AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 {42}
C602 10U/6.3V_8X AF34 G11 C35 10U/6.3V_8X AP16 AM23 GFXVR_VID_4 {42}
VCC12 VTT0_12 VAXG12 GFX_VID[4]
AF33 VCC13 VTT0_13 F14 AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 {42}
C76 10U/6.3V_8X AF32 F13 C598 10U/6.3V_8X AN19 AN24 GFXVR_VID_6 {42}
VCC14 VTT0_14 VAXG14 GFX_VID[6]

GRAPHICS
AF31 VCC15 VTT0_15 F12 +VAXG AN18 VAXG15
C70 10U/6.3V_8X AF30 F11 C30 10U/6.3V_8X AN16
VCC16 VTT0_16 VAXG16
AF29 VCC17 VTT0_17 E14 AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN {42}
C114 10U/6.3V_8X AF28 E12 C622 10U/6.3V_8X AM19 AT25 GFXVR_DPRSLPVR {42}
VCC18 VTT0_18 VAXG18 GFX_DPRSLPVR
AF27 VCC19 VTT0_19 D14 AM18 VAXG19 GFX_IMON AM24 GFXVR_IMON {42}
C609 10U/6.3V_8X AF26 D13 C58 10U/6.3V_8X AM16
VCC20 VTT0_20 C618 IV@10U/6.3V_8X VAXG20 R65 EV@1K_4
AD35 VCC21 VTT0_21 D12 AL21 VAXG21
C93 10U/6.3V_8X AD34 D11 C612 10U/6.3V_8X AL19

1.1V RAIL POWER


VCC22 VTT0_22 C619 IV@10U/6.3V_8X VAXG22
AD33 VCC23 VTT0_23 C14 AL18 VAXG23
C103 10U/6.3V_8X

+
AD32 VCC24 VTT0_24 C13 AL16 VAXG24
AD31 C12 C555 *330U/2V_7343P_E9c C621 IV@10U/6.3V_8X AK21 AJ1
VCC25 VTT0_25 VAXG25 VDDQ1 +1.5V_CPUVDDQ
C610 10U/6.3V_8X AD30 C11 AK19 AF1 C54 1U/6.3V_4X

- 1.5V RAILS
VCC26 VTT0_26 C620 IV@10U/6.3V_8X VAXG26 VDDQ2 C63 1U/6.3V_4X
AD29 VCC27 VTT0_27 B14 AK18 VAXG27 VDDQ3 AE7
C553 10U/6.3V_8X AD28 B12 AK16 AE4 C65 1U/6.3V_4X
VCC28 VTT0_28 VAXG28 VDDQ4

+
C645 *IV@330U/2V_7343P_E9c C57 1U/6.3V_4X

POWER
AD27 VCC29 VTT0_29 A14 AJ21 VAXG29 VDDQ5 AC1
C603 10U/6.3V_8X AD26 A13 AJ19 AB7 C46 4.7U/6.3V_6X
VCC30 VTT0_30 +VTT VAXG30 VDDQ6 C50 4.7U/6.3V_6X
AC35 VCC31 VTT0_31 A12 AJ18 VAXG31 VDDQ7 AB4

+
C604 10U/6.3V_8X AC34 A11 C648 *IV@330U/2V_7343P_E9c AJ16 Y1 C41 4.7U/6.3V_6X
VCC32 VTT0_32 VAXG32 VDDQ8
AC33 VCC33 AH21 VAXG33 VDDQ9 W7
C554 10U/6.3V_8X AC32 AH19 W4
VCC34 VAXG34 VDDQ10
AC31 VCC35 AH18 VAXG35 VDDQ11 U1
C116 10U/6.3V_8X AC30 AF10 AH16 T7

C601 10U/6.3V_8X
AC29
VCC36
VCC37
VTT0_33
VTT0_34 AE10
C82 10U/6.3V_8X R78 EV@0_8
VAXG36 VDDQ12
VDDQ13 T4 C3A
AC28 VCC38 VTT0_35 AC10 VDDQ14 P1
CPU CORE SUPPLY

B AC27 AB10 N7 B

DDR3
C111 10U/6.3V_8X VCC39 VTT0_36 C91 10U/6.3V_8X VDDQ15
AC26 VCC40 VTT0_37 Y10 VDDQ16 N4
AA35 VCC41 VTT0_38 W10 VDDQ17 L1

FDI
C113 10U/6.3V_8X AA34 U10 +VTT J24 H1
VCC42 VTT0_39 C105 10U/6.3V_8X VTT1_45 VDDQ18
AA33 VCC43 VTT0_40 T10 J23 VTT1_46
C69 10U/6.3V_8X AA32 J12 H25
VCC44 VTT0_41 (15mils) C595 10U/6.3V_8X VTT1_47
POWER

AA31 VCC45 VTT0_42 J11


C611 10U/6.3V_8X AA30 J16 +VTT_43 R18 *SHORT_4
VCC46 VTT0_43
AA29 VCC47 VTT0_44 J15 +VTT_44 R19 *SHORT_4
VTT0_59 P10 +VTT
C117 10U/6.3V_8X AA28 K26 N10
VCC48 C3A +VTT VTT1_48 VTT0_60

PEG & DMI


AA27 J27 L10 C600 10U/6.3V_8X
C120 *0.1U/10V_4X VCC49 PSI# VTT1_49 VTT0_61
AA26
Y35
VCC50 PSI# AN33 PSI# {39}
C29 10U/6.3V_8X
J26
J25
VTT1_50 VTT0_62 K10
J22 C605 10U/6.3V_8X
for S3 power reduction

1.1V
C118 *0.1U/10V_4X VCC51 VTT1_51 VTT1_63
Y34 VCC52 H27 VTT1_52 VTT1_64 J20
Y33 AK35 H_VID0 C563 10U/6.3V_8X G28 J18 C594 10U/6.3V_8X
VCC53 VID[0] H_VID0 {39} VTT1_53 VTT1_65
C72 *0.047U/10V_4X Y32 AK33 H_VID1 G27 H21 +1.5V_CPUVDDQ
VCC54 VID[1] H_VID1 {39} VTT1_54 VTT1_66
Y31 AK34 H_VID2 C559 10U/6.3V_8X G26 H20 C593 *10U/6.3V_8X
VCC55 VID[2] H_VID2 {39} VTT1_55 VTT1_67
C73 *0.047U/10V_4X Y30 AL35 H_VID3 F26 H19
VCC56 VID[3] H_VID3 {39} VTT1_56 VTT1_68
Y29 AL33 H_VID4 C100 10U/6.3V_8X E26
CPU VIDS

VCC57 VID[4] H_VID4 {39} VTT1_57


C74 *0.047U/10V_4X Y28 AM33 H_VID5 E25 R23
VCC58 VID[5] H_VID5 {39} VTT1_58
Y27 AM35 H_VID6 L26 +1.8V 220_8
H_VID6 {39}

1.8V
VCC59 VID[6] ICH_DPRSTP# VCCPLL1
Y26 VCC60 PROC_DPRSLPVR AM34 ICH_DPRSTP# {39} VCCPLL2 L27
V35 M26 C61 10U/6.3V_8X
VCC61 VCCPLL3
V34 VCC62
V33 C130 4.7U/6.3V_6X
VCC63

3
PZ98927-3641-41F
V32
V31
VCC64 VTT_SELECT G15 TP1 VID Default Setting C60 2.2U/6.3V_6X
VCC65
V30 VCC66 H_VTTVID1=Low, 1.1V VID[6:0]=[0100111] C129 1U/6.3V_4X
V29 VCC67 {3,12,40,41} MAINON_ON_G 2
V28 H_VTTVID1=High, 1.05V +VTT
C VCC68 C596 1U/6.3V_4X Q2 C
V27 VCC69
V26 H_VID0 R384 1K_4 DMN601K-7_300MA
VCC70 R382 *1K_4
U35

1
VCC71
U34 VCC72
U33 AN35 ISENSE H_VID1 R383 1K_4
SENSE LINES

VCC73 ISENSE ISENSE {39}


U32 R381 *1K_4
VCC74 VTT_SENSE
U31 VCC75 VTT_SENSE B15 TP52
U30 A15 TP_VSS_SENSE_VTT H_VID2 R385 1K_4
VCC76 VSS_SENSE_VTT TP51 +1.5VSUS
U29 R388 *1K_4 +15V
VCC77
U28 VCC78
C40 10U/6.3V_8X U27 R376 100/F_4 +VCC_CORE H_VID3 R386 *1K_4
VCC79 R389 1K_4
U26 VCC80 VCC_SENSE AJ34 VCCSENSE {39}
C36 10U/6.3V_8X R35 AJ35 VSSSENSE {39}
VCC81 VSS_SENSE R380 100/F_4 H_VID4 R393 *1K_4 R35
R34 VCC82

5
6
7
8
C564 10U/6.3V_8X R33 R395 1K_4 *100K_4
VCC83
R32 VCC84
C556 10U/6.3V_8X R31 H_VID5 R405 1K_4
VCC85 R400 *1K_4 MAIND
R30 VCC86 {35,36,40} MAIND 4
C558 10U/6.3V_8X R29 VCC87 H_VID6 R394 *1K_4
R28 VCC88
C560 10U/6.3V_8X R27 R396 1K_4 C126 Q3
VCC89 AO4466_9.4A
R26 VCC90 0.01U/25V_4X
C565 *10U/6.3V_8X P35 ICH_DPRSTP# R417 1K_4
VCC91 R414 *1K_4
P34

3
2
1
C562 *10U/6.3V_8X VCC92
P33 VCC93
P32 PSI# R406 *1K_4
VCC94 R401 1K_4
P31 VCC95
P30 VCC96
P29 VCC97 +1.5V_CPUVDDQ
D P28 VCC98 HFM_VID : Max 1.4V D
P27
P26
VCC99
VCC100
+VCC_CORE LFM_VID : Min 0.65V 6A/maximum
PZ98927-3641-41F

+
C84
+
C101 Quanta Computer Inc.
*330U/2V_7343P_E9c *330U/2V_7343P_E9c
C3A C3A PROJECT : BL6
Size Document Number Rev
A1A
PROCESSER 3/4(POWER)
Date: Saturday, April 10, 2010 Sheet 5 of 45
1 2 3 4 5 6 7 8

http://laptop-motherboard-schematic.blogspot.com/
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)


AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U15H U15I U15E
K27 VSS161
AT20 VSS1 VSS81 AE34 K9 VSS162 {12} DDR_VREF_DQ0 J17 SA_DIMM_VREF RSVD_NCTF_41 AT2
AT17 VSS2 VSS82 AE33 K6 VSS163 {13} DDR_VREF_DQ1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 K3 VSS164 RSVD_NCTF_43 AR1
AR28 AE31 J32 CFG0 AM30 AL28
A VSS4 VSS84 VSS165 CFG[0] RSVD45 A
AR26 VSS5 VSS85 AE30 J30 VSS166 AM28 CFG[1] RSVD46 AL29
AR24 VSS6 VSS86 AE29 J21 VSS167 AP31 CFG[2] RSVD47 AP30
AR23 AE28 J19 CFG3 AL32 AP32
VSS7 VSS87 VSS168 CFG4 CFG[3] RSVD48
AR20 VSS8 VSS88 AE27 H35 VSS169 AL30 CFG[4] RSVD49 AL27
AR17 VSS9 VSS89 AE26 H32 VSS170 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H28 VSS171 AN29 CFG[6]
AR12 AD10 H26 CFG7 AM32 AT32
VSS11 VSS91 VSS172 CFG[7] RSVD51
AR9 VSS12 VSS92 AC8 H24 VSS173 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H22 VSS174 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H18 VSS175 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H15 VSS176 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H13 VSS177 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H11 VSS178 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H8 VSS179 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H5 VSS180 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 H2 VSS181 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 G34 VSS182 AK30 CFG[17]
AN34 VSS22 VSS102 AB28 G31 VSS183 TP2 H16 RSVD_TP_86 KEY A2
AN31 VSS23 VSS103 AB27 G20 VSS184 RSVD62 D15
AN23 VSS24 VSS104 AB26 G9 VSS185 AP25 RSVD1 RSVD63 C15
AN20 VSS25 VSS105 AB6 G6 VSS186 AL25 RSVD2 RSVD64 AJ15 RSVD64_R R50 *0_4
AN17 AA10 G3 AL24 AH15 RSVD65_R R51 *0_4

RESERVED
VSS26 VSS106 VSS187 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F30 VSS188 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F27 VSS189 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F25 VSS190 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W 35 F22 VSS191 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W 34 F19 VSS192 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W 33 F16 VSS193
AM11 VSS33 VSS113 W 32 E35 VSS194 G25 RSVD11 RSVD_TP_71 AA2
B AM8 VSS34 VSS114 W 31 E32 VSS195 G17 RSVD12 RSVD_TP_72 AA1 B
AM5 VSS35 VSS115 W 30 E29 VSS196 E31 RSVD13 RSVD_TP_73 R9
AM2 VSS36 VSS116 W 29 E24 VSS197 E30 RSVD14 RSVD_TP_74 AG7
AL34 W 28 E21 B19 AE3
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W 27
W 26
E18
E13
VSS198
VSS199
VSS200
VSS R14 *0_4 TP_RSVD17_R
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
V4
V5
AL20 W6 E11 R11 *0_4 TP_RSVD18_R B20 N2
VSS40 VSS120 VSS201 RSVD18 RSVD_TP_78
AL17 VSS41 VSS121 V10 E8 VSS202 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E5 VSS203 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 E2 VSS204
AL6 VSS44 VSS124 U2 D33 VSS205 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D30 VSS206 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D26 VSS207 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D9 VSS208 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D6 VSS209 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 D3 VSS210 J28 RSVD27
AK17 VSS50 VSS130 T30 C34 VSS211 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C32 VSS212 A33 RSVD_NCTF_29
AJ23 VSS52 VSS132 T28 C29 VSS213 C35 RSVD_NCTF_30 VSS AP34 TP53
AJ20 VSS53 VSS133 T27 C28 VSS214
AJ17 VSS54 VSS134 T26 C24 VSS215 B35 RSVD_NCTF_31
AJ14 VSS55 VSS135 T6 C22 VSS216 AJ13 RSVD32
AJ11 VSS56 VSS136 R10 C20 VSS217 AJ12 RSVD33
AJ8 VSS57 VSS137 P8 C19 VSS218 AH25 RSVD34
AJ5 VSS58 VSS138 P4 C16 VSS219 AK26 RSVD35
AJ2 VSS59 VSS139 P2 B31 VSS220 AL26 RSVD36
AH35 VSS60 VSS140 N35 B25 VSS221 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B21 VSS222 AJ26 RSVD38
AH33 VSS62 VSS142 N33 B18 VSS223 AJ27 RSVD39
C
AH32 VSS63 VSS143 N32 B17 VSS224 AP1 RSVD_NCTF_40 C
AH31 VSS64 VSS144 N31 B13 VSS225
AH30 N30 B11 PZ98927-3641-41F
VSS65 VSS145 VSS226
AH29 VSS66 VSS146 N29 B8 VSS227
AH28 VSS67 VSS147 N28 B6 VSS228
AH27 VSS68 VSS148 N27 B4 VSS229
AH26 VSS69 VSS149 N26 A29 VSS230
AH20 VSS70 VSS150 N6 A27 VSS231
AH17 VSS71 VSS151 M10 A23 VSS232
AH13 VSS72 VSS152 L35 A9 VSS233
AH9 VSS73 VSS153 L32
AH6 VSS74 VSS154 L29 AT35 VSS_NCTF1
AH3 VSS75 VSS155 L8 AT1 VSS_NCTF2
AG10 L5 R411 *0_4 AR34
NCTF

VSS76 VSS156 R371 *0_4 VSS_NCTF3


AF8 VSS77 VSS157 L2 B34 VSS_NCTF4
AF4 K34 R43 *0_4 B2
VSS78 VSS158 VSS_NCTF5
AF2 VSS79 VSS159 K33 B1 VSS_NCTF6
AE35 VSS80 VSS160 K30 A35 VSS_NCTF7
PZ98927-3641-41F
PZ98927-3641-41F

Processor Strapping
CFG0 R52 *3.01K/F_4

1 0 CFG3 R47 3.01K/F_4

CFG4 Enabled; An external Display port CFG4 R45 *3.01K/F_4

(Display Port Disabled; No Physical Display Port device is connected to the Embedded CFG7 R49 *3.01K/F_4
D D
Presence) attached to Embedded Diplay Port Display port
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel CFG0
recommends placing a 3.01K +/- 5% pull down resistor to (PCI-Epress
VSS on CFG[7] pin for both rPGA and BGA components. Single PEG Bifurcation enabled
This pull down resistor should be removed when this
Configuration Select) Quanta Computer Inc.
http://laptop-motherboard-schematic.blogspot.com/ CFG3
issue is fixed.
(PCI-Epress Static Normal Operation Lane Numbers Reversed PROJECT : BL6
Lane Reversal) 15 -> 0 , 14 -> 1 Size Document Number Rev
1A
PROCESSER 4/4 (GND)
Date: Saturday, April 10, 2010 Sheet 6 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

C804 18P/50V_4C
IBEX PEAK-M (LVDS,DDI)
2
IBEX PEAK-M (HDA,JTAG,SATA)
1
U24D
Y6 R636
+3V INT_LVDS_BLON
U24A LAD0 {24,30} {23} INT_LVDS_BLON T48
L_BKLTEN Ibex-M SDVO_TVCLKINN
BJ46
32.768KHZ_10 10M_4 INT_LVDS_DIGON T47 4 OF 10 BG46
LAD1 {24,30} {23} INT_LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
3
4

RTC_X1 LAD2 {24,30} INT_LVDS_PWM


A
B13
RTCX1 Ibex-M FWH0 / LAD0
D33
LAD3 {24,30} {23} INT_LVDS_PWM Y48
L_BKLTCTL SDVO_STALLN
BJ48
A
C803 18P/50V_4C RTC_X2 D13 1 OF 10 B33 R229 BG48
RTCX2 FWH1 / LAD1 INT_LVDS_EDIDCLK SDVO_STALLP
C32 AB48
LPC FWH2 / LAD2
FWH3 / LAD3
A32
10K_4 {23} INT_LVDS_EDIDCLK
{23} INT_LVDS_EDIDDATA
INT_LVDS_EDIDDATA Y45
L_DDC_CLK
L_DDC_DATA SDVO_INTN
BF45
RTC_RST# C14
RTCRST# FWH4 / LFRAME#
C34
A34
LFRAME# {24,30}
R233 IV@10K_4 L_CTRL_CLK AB46
SDVO SDVO_INTP
BH45
LDRQ0# +3V L_CTRL_CLK
SRTC_RST# D17 F34 R234 IV@10K_4 L_CTRL_DATA V48 T51
SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ
AB9
LDRQ#1 {24}
SERIRQ {24,30}
L_CTRL_DATA SDVO_CTRLCLK
SDVO_CTRLDATA
T53
+RTC_CELL R642 1M_4 SM_INTRUDER# A16 LVDS_IBG AP39
INTRUDER# TP24 LVDS_VBG LVD_IBG
AK7 SATA_RXN0 {26} AP41 BG44
PCH_INVRMEN SATA0RXN LVD_VBG DDPB_AUXN
{10} PCH_INVRMEN A14 AK6 SATA_RXP0 {26} BJ44

DISPLAY PORT B
INTVRMEN SATA0RXP LVDS_VREFH DDPB_AUXP
SATA0TXN
AK11
AK9
SATA_TXN0 {26} HDD LVDS_VREFL
AT43
AT42
LVD_VREFH DDPB_HPD
AU38
SATA0TXP SATA_TXP0 {26} LVD_VREFL
BD42
ACZ_BITCLK DDPB_0N
A30 AH6 LVDS--A BC42

Digital Display Interface


HDA_BCLK SATA1RXN SATA_RXN1 {26} DDPB_0P
ACZ_SYNC INT_TXLCLKOUT-
D29
P1
HDA_SYNC SATA1RXP
AH5
AH9
SATA_RXP1 {26} ODD {23} INT_TXLCLKOUT-
INT_TXLCLKOUT+
AV53
AV51
LVDSA_CLK# DDPB_1N
BJ42
BG42
{10,27} PCBEEP SPKR SATA1TXN SATA_TXN1 {26} {23} INT_TXLCLKOUT+ LVDSA_CLK DDPB_1P
ACZ_RST# C30 AH8 SATA_TXP1 {26} BB40
HDA_RST# SATA1TXP INT_TXLOUT0- DDPB_2N
{27} ACZ_SDIN0_AUDIO G30 {23} INT_TXLOUT0- BB47 BA40
HDA_SDIN0 INT_TXLOUT1- LVDSA_DATA#0 DDPB_2P
F30 AF11 BA52 AW38
TP45 E32
HDA_SDIN1
HDA_SDIN2
IHDA SATA2RXN
SATA2RXP
AF9
{23} INT_TXLOUT1-
{23} INT_TXLOUT2-
INT_TXLOUT2- AY48
LVDSA_DATA#1
LVDSA_DATA#2
DDPB_3N
DDPB_3P
BA38
F32 AF7 AV47
ACZ_SDOUT HDA_SDIN3 SATA2TXN LVDSA_DATA#3 TP31
B29 AF6 Y49
HDA_SDO SATA2TXP INT_TXLOUT0+ DDPC_CTRLCLK TP32
{10,30} PCH_GPIO33 H32 {23} INT_TXLOUT0+ BB48 AB49
HDA_DOCK_EN# / GPIO33 (+3V) INT_TXLOUT1+ LVDSA_DATA0 DDPC_CTRLDATA
J30
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN
AH3 STAT2/SATA3 HM55 not support {23} INT_TXLOUT1+ BA50
LVDSA_DATA1

DISPLAY PORT C
TP48 AH1 INT_TXLOUT2+ AY49 BE44 TP13
SATA SATA3RXP
SATA3TXN
AF3
{23} INT_TXLOUT2+
AV48
LVDSA_DATA2
LVDSA_DATA3
DDPC_AUXN
DDPC_AUXP
BD44 TP7
AF1 AV40 TP9
PCH_JTAG_TCK_BUF SATA3TXP DDPC_HPD
{33} PCH_JTAG_TCK M3
JTAG_TCK
AD9 AP48
LVDS--B BE40 TP57
PCH_JTAG_TMS SATA4RXN TP34 TP26 LVDSB_CLK# DDPC_0N TP54
{33} PCH_JTAG_TMS K3 AD8 AP47 BD40
JTAG_TMS SATA4RXP TP30 TP25 LVDSB_CLK DDPC_0P TP10
AD6 BF41
PCH_JTAG_TDI SATA4TXN TP29 DDPC_1N TP8
K1 AD5 AY53 BH41
{33} PCH_JTAG_TDI JTAG_TDI JTAG SATA4TXP TP33 TP66 AT49
LVDSB_DATA#0
LVDSB_DATA#1
DDPC_1P
DDPC_2N
BD38 TP58
{33} PCH_JTAG_TDO PCH_JTAG_TDO J2 AD3 SATA_RXN5 {25} TP22 AU52 BC38 TP62
JTAG_TDO SATA5RXN TP68 LVDSB_DATA#2 DDPC_2P TP56
AD1 SATA_RXP5 {25} AT53 BB36
PCH_JTAG_RST# SATA5RXP LVDSB_DATA#3 DDPC_3N TP60
{33} PCH_JTAG_RST# J4
TRST# SATA5TXN
AB3
AB1
SATA_TXN5 {25} ESATA AY51
DDPC_3P
BA36
SATA5TXP SATA_TXP5 {25} LVDSB_DATA0
TP67 AT48 U50
B LVDSB_DATA1 DDPD_CTRLCLK SDVO_CTRLCLK {14} B
TP23 AU50 U52
LVDSB_DATA2 DDPD_CTRLDATA SDVO_CTRLDATA {14}
SPI_CLK_R BA2 AF16 TP17 AT51

DISPLAY PORT D
SPI_CLK SATAICOMPO LVDSB_DATA3 DDPD_AUXN R175 IV@10K_4
BC46 +3V
SPI_CS0#_R SATA_COMP R220 37.4/F_4 INT_CRT_BLU DDPD_AUXN DDPD_AUXP R174 IV@10K_4
AV3 AF15 +1.05V {23} INT_CRT_BLU AA52 BD46
SPI_CS0# SATAICOMPI INT_CRT_GRN CRT_BLUE DDPD_AUXP
{23} INT_CRT_GRN AB53 AT38 Port-D_HPD {14}
SPI_CS1# SATA_LED# INT_CRT_RED CRT_GREEN DDPD_HPD
AY3 T3 AD53
TP12 SPI_CS1# SPI SATALED# SATA_LED# {32} {23} INT_CRT_RED CRT_RED
CRT DDPD_0N
BJ40 C_TMDSD_DATA2#
INT_CRT_DDCCLK V51 BG40 C_TMDSD_DATA2
{23} INT_CRT_DDCCLK CRT_DDC_CLK DDPD_0P
SPI_SI_R AY1 INT_CRT_DDCDAT V53 BJ38 C_TMDSD_DATA1#
{10} SPI_SI_R SPI_MOSI {23} INT_CRT_DDCDAT CRT_DDC_DATA DDPD_1N
Y9 GPIO21 R237 10K_4 +3V BG38 C_TMDSD_DATA1
SPI_SO_R (+3V) SATA0GP / GPIO21 GPIO19 R587 10K_4 R604 IV@0_4 INT_HSYNC_R DDPD_1P C_TMDSD_DATA0#
AV1 (+3V_S5) V1 +3V {23} INT_HSYNC Y53 BF37
SPI_MISO SATA1GP / GPIO19 R611 IV@0_4 INT_VSYNC_R CRT_HSYNC DDPD_2N C_TMDSD_DATA0
{23} INT_VSYNC Y51 BH37
IbexPeak-M_Rev1_0 CRT_VSYNC DDPD_2P C_TMDSD_CLK#
BE36
R227 1K/D_4 DAC_IREF DDPD_3N C_TMDSD_CLK
AD48 BD36
DAC_IREF DDPD_3P
AB51
B2A CRT_IRTN
IbexPeak-M_Rev1_0

Port Strap How to enable Port? How to disable Port?


LVDS L_DDC_DATA PU to 3.3V with 2.2k+/- 5% NC

Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC


57&%$77(5<
Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC
+3VPCU +RTC_CELL
(20mils) Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC
D21 CH501H-40PT_100MA (30mils)
C
(20mils) C

R_3VRTC D20 CH501H-40PT_100MA eDP CFG[4] PD to GND directly NC


C530

1U/10V_6X
R352 HDMI
1K_4

C_TMDSD_DATA2 C715 IHM@0.1U/10V_4X TMDSD_DATA2


RTC_N02 (20mils)
1 3 R349 1.91K/F_4 R350 1.91K/F_4 (20mils) +5VPCU C_TMDSD_DATA2# C709 IHM@0.1U/10V_4X TMDSD_DATA2#
TMDSD_DATA2 {14}
TMDSD_DATA2# {14}
R203 IV@0_4 LVDS_VREFH For IV@ 0ohm
Q28 LVDS_VREFL For EV@ NC
C_TMDSD_DATA1 C721 IHM@0.1U/10V_4X TMDSD_DATA1
TMDSD_DATA1 {14}
2

MMBT3904-7-F_200MA R351 C_TMDSD_DATA1# C712 IHM@0.1U/10V_4X TMDSD_DATA1#


TMDSD_DATA1# {14}
For IV@ 2.37K/F
CN25 6.8K/F_4 R201 IV@2.37K/F_4 LVDS_IBG For EV@ NC
2 C_TMDSD_DATA0 C722 IHM@0.1U/10V_4X TMDSD_DATA0
1
2
1
(20mils) C_TMDSD_DATA0# C710 IHM@0.1U/10V_4X TMDSD_DATA0#
TMDSD_DATA0 {14}
TMDSD_DATA0# {14}
RTC_N03 R348 15K/F_4
AAA-BAT-046-K03 R601 IV@150/F_4 INT_CRT_BLU
R597 IV@150/F_4 INT_CRT_GRN For IV@ Connect to 150ohm/F C_TMDSD_CLK C349 IHM@0.1U/10V_4X TMDSD_CLK
TMDSD_CLK {14}
R585 IV@150/F_4 INT_CRT_RED EV@ NC C_TMDSD_CLK# C361 IHM@0.1U/10V_4X TMDSD_CLK#
TMDSD_CLK# {14}

For AUDIO
{27} ACZ_RST#_AUDIO R637 0_4 ACZ_RST# 5(6(7-803 An RC delay circuit with a time delay in the range

{27} ACZ_SDOUT_AUDIO R640 0_4 ACZ_SDOUT

E3A
+RTC_CELL
of 18 ms to 25 ms should be provided
4M byte SPI ROM PCH 2MB 4MB 8MB

{27} ACZ_SYNC_AUDIO R639 0_4 ACZ_SYNC PM55


R336 20K_6 RTC_RST#
{27} BIT_CLK_AUDIO R638 33_4 ACZ_BITCLK
D C513 G1 U21 HM55 D
C821 *10P/50V_4C SPI_SO_R R542 0_4 SPI_SO 2 8 +3V
1U/6.3V_4X *SHORT_ PAD SO VDD
SPI_SI_R R466 0_4 SPI_SI 5
SI HOLD
7 SPI_HOLD# R471 3.3K/F_4 HM57/PM57
SPI_CLK_R R465 0_4 SPI_CLK 6 3 SPI_WP# R526 3.3K/F_4
+1.05V SCK WP QM57/QS57
+RTC_CELL SPI_CS0#_R R510 0_4 SPI_CS0# 1 4
R606 *51/F_4 PCH_JTAG_TMS CE VSS 0.1U/10V_4X C739

R609

R607
*51/F_4 PCH_JTAG_RST#

*51/F_4 PCH_JTAG_TDI
http://laptop-motherboard-schematic.blogspot.com/
R337
B2A 20K_6

C514 G2
SRTC_RST#
W25Q32BVSSIG

Quanta Computer Inc.


R608 *51/F_4 PCH_JTAG_TDO 1U/6.3V_4X *SHORT_ PAD PROJECT : BL6
Size Document Number Rev
R605 51/F_4 PCH_JTAG_TCK A1A
PCH 1/5 (SATA,HDA,LPC)
Date: Saturday, April 10, 2010 Sheet 7 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

IBEX PEAK-M (GND)


U24I
AY7 VSS[159] VSS[259] H49
B11 VSS[160] VSS[260] H5
B15 J24
B19
B23
VSS[161]
VSS[162]
VSS[261]
VSS[262] K11
K43
IBEX PEAK-M (PCI-E,SMBUS,CLK) +3V_S5
VSS[163] VSS[263] U24B
B31 K47
B35
VSS[164]
VSS[165]
VSS[264]
VSS[265] K7 C3A

2
B39 L14 Ibex-M
D
B43
VSS[166]
VSS[167]
VSS[266]
VSS[267] L18 TP63 BG30 PERN1 2 OF 10 SMBus D

B47 L2 TP61 BJ30 B9 SMBALERT# MBDATA2 1 3


B7
VSS[168] VSS[268]
L22 TP55 BF29
PERP1 (+3V_S5) SMBALERT# / GPIO11
H14 SCLK
2ND_MBDATA {30}
VSS[169] VSS[269] PETN1 SMBCLK SCLK {2,24,28,33}
BG12 L32 TP59 BH29 C8 SDATA
VSS[170] VSS[270] PETP1 SMBDATA SDATA {2,24,28,33}
BB12 L36 J14 SMBL0ALERT# Q15
VSS[171] VSS[271] TP19
(+3V_S5) SML0ALERT# / GPIO60 SMB_CLK_ME0 2N7002_200MA
BB16 VSS[172] VSS[272] L40 AW 30 PERN2 SML0CLK C6
BB20 L52 TP16 BA30 G8 SMB_DATA_ME0
VSS[173] VSS[273] TP14 PERP2 SML0DATA SML1ALERT# +3V_S5
BB24 VSS[174] VSS[274] M12 BC30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
BB30 M16 TP11 BD30 E10 MBCLK2
BB34
VSS[175] VSS[275]
M20
PETP2 (+3V_S5) SML1CLK / GPIO58
G12 MBDATA2
VSS[176] VSS[276] (+3V_S5) SML1DATA / GPIO75

2
BB38 N38 {24} PCIE_RXN3 PCIE_RXN3 AU30
VSS[177] VSS[277] PCIE_RXP3 PERN3
BB42 VSS[178] VSS[278] M34 {24} PCIE_RXP3 AT30 PERP3
BB49 M38 3G {24} PCIE_TXN3 C364 *3G@0.1U/10V_4X PCIE_TXN3_C AU32 MBCLK2 1 3
VSS[179] VSS[279] PETN3 2ND_MBCLK {30}
BB5 M42 {24} PCIE_TXP3 C365 *3G@0.1U/10V_4X PCIE_TXP3_C AV32
VSS[180] VSS[280] PETP3 CL_CLK1
BC10 M46 T13
BC14
VSS[181]
VSS[182]
VSS[281]
VSS[282] M49 B2A BA32 PERN4 Controller
CL_CLK1 CL_CLK1 {24}
Q13
BC18 M5 BB32 T11 CL_DATA1 2N7002_200MA
VSS[183] VSS[283] PERP4 CL_DATA1 CL_DATA1 {24}
BC2 VSS[184] VSS[284] M8 BD32 PETN4 Link
BC22 N24 BE32 T9 CL_RST#1
VSS[185] VSS[285] PETP4 CL_RST1# CL_RST#1 {24}
BC32 VSS[186] VSS[286] P11
BC36 AD15 {24} PCIE_RXN5 PCIE_RXN5 BF33
VSS[187] VSS[287] PCIE_RXP5 PERN5
BC40 VSS[188] VSS[288] P22 {24} PCIE_RXP5 BH33 PERP5
C343 0.1U/10V_4X PCIE_TXN5_C BG32 +3V
BC44 VSS[189] VSS[289] P30 WLAN{24} PCIE_TXN5 PETN5
BC52 P32 {24} PCIE_TXP5 C342 0.1U/10V_4X PCIE_TXP5_C BJ32
VSS[190] VSS[290] PETP5
BH9 VSS[191] VSS[291] P34
PCIE_RXN6 PCI-E* PEG
BD48 VSS[192] VSS[292] P42 {28} PCIE_RXN6 BA34 PERN6
BD49 P45 {28} PCIE_RXP6 PCIE_RXP6 AW 34 H1 PEG_CLKREQ# PCIE_CLK_REQ1# R588 10K_4
VSS[193] VSS[293] C379 0.1U/10V_4X PCIE_TXN6_C BC34 PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 PCIE_CLK_REQ2# R600 10K_4
BD5 VSS[194] VSS[294] P47 LAN{28} PCIE_TXN6 PETN6 CLKOUT_PEG_A_N AD43 CLK_PCIE_VGA# {15}
BE12 R2 {28} PCIE_TXP6 C378 0.1U/10V_4X PCIE_TXP6_C BD34 AD45
VSS[195] VSS[295] PETP6 CLKOUT_PEG_A_P CLK_PCIE_VGA {15}
C BE16 VSS[196] VSS[296] R52 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLLN {3} C
BE20 VSS[197] VSS[297] T12 AT34 PERN7 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLLP {3}
BE24 VSS[198] VSS[298] T41 AU34 PERP7
BE30 T46 AU36 +3V_S5
VSS[199] VSS[299] PETN7
BE34 VSS[200] VSS[300] T49 PCIE7/PCIE8 HM55 not support AV36 PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 CLK_DREFSSCLKN {3}
BE38 T5 AT3 CLK_DREFSSCLKP {3} SMBALERT# R650 10K_4
VSS[201] VSS[301] CLKOUT_DP_P / CLKOUT_BCLK1_P SCLK R311 2.2K_4
BE42 VSS[202] VSS[302] T8 BG34 PERN8
BE46 U30 BJ34 SDATA R654 2.2K_4
VSS[203] VSS[303] TP74 PERP8 SMBL0ALERT# R300 10K_4
BE48 U31 BG36 AW 24
BE50
VSS[204]
VSS[205]
VSS[304]
VSS[305] U32 B2A TP87 BJ36
PETN8
PETP8
CLKIN_DMI_N
CLKIN_DMI_P BA24
CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
{2}
{2} SMB_CLK_ME0 R631 2.2K_4
BE6 U34 AK48 SMB_DATA_ME0 R623 2.2K_4
VSS[206] VSS[306] CLKOUT_PCIE0N SML1ALERT# R310 10K_4
BE8 VSS[207] VSS[307] P38 AK47 CLKOUT_PCIE0P
BF3 V11 AP3 CLK_BUF_BCLKN {2} MBCLK2 R299 2.2K_4
VSS[208] VSS[308] PCIE_CLK_REQ0# CLKIN_BCLK_N MBDATA2 R313 2.2K_4
BF49 VSS[209] VSS[309] P16 P9 PCIECLKRQ0# / GPIO73 (+3V_S5) CLKIN_BCLK_P AP1 CLK_BUF_BCLKP {2}
BF51 V19 TP21 AM43

From CLK BUFFER


VSS[210] VSS[310] TP27 CLKOUT_PCIE1N
BG18 VSS[211] VSS[311] V20 AM45 CLKOUT_PCIE1P
BG24 VSS[212] VSS[312] V22 CLKIN_DOT_96N F18 CLK_BUF_DREFCLKN {2}
BG4 V30 PCIE_CLK_REQ1# U4 E18 CLK_BUF_DREFCLKP {2}
BG50
VSS[213] VSS[313]
V31
PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P
VSS[214] VSS[314] TP28 +3V_S5
BH11 VSS[215] VSS[315] V32 AM47 CLKOUT_PCIE2N
BH15 V34 TP20 AM48 AH13 CLK_BUF_DREFSSCLKN {2}
VSS[216] VSS[316] CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N PCIE_CLK_REQ0# R309 10K_4
BH19 VSS[217] VSS[317] V35 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLKP {2}
BH23 V38 PCIE_CLK_REQ2# N4
BH31
VSS[218] VSS[318]
V43
PCIECLKRQ2# / GPIO20 (+3V)
VSS[219] VSS[319] PCIE_CLK_REQ3# R653 *10K_4
BH35 V45 AH42 P41
BH39
VSS[220]
VSS[221]
VSS[320]
VSS[321] V46 LAN
{28} CLK_PCIE_LAN#
{28} CLK_PCIE_LAN AH41
CLKOUT_PCIE3N
CLKOUT_PCIE3P
REFCLK14IN CLK_PCH_14M {2}
B2A
BH43 VSS[222] VSS[322] V47
BH47 V49 {28} PCIE_CLK_REQ3# PCIE_CLK_REQ3# A8 J42 CLK_PCI_FB CLK_PCI_FB {9} PCIE_CLK_REQ4# R276 10K_4
VSS[223] VSS[323] PCIECLKRQ3# / GPIO25 (+3V_S5) CLKIN_PCILOOPBACK PCIE_CLK_REQB# R301 10K_4
BH7 VSS[224] VSS[324] V5
C12 V7 AM51 PCIE_CLK_RQ5# R619 10K_4
B VSS[225] VSS[325] {24} CLK_PCIE_3G# CLKOUT_PCIE4N B
C50 VSS[226] VSS[326] V8 3G {24} CLK_PCIE_3G AM53 CLKOUT_PCIE4P XTAL25_IN AH51 XTAL25_IN
D51 VSS[227] VSS[327] W2 XTAL25_OUT AH53 XTAL25_OUT PEG_CLKREQ# R615 IV@10K_4
E12 W 52 {24} PCIE_CLK_REQ4# PCIE_CLK_REQ4# M9
VSS[228] VSS[328] PCIECLKRQ4# / GPIO26 (+3V_S5)
E16 VSS[229] VSS[329] Y11 XCLK_RCOMP AF38 XCLK_RCOMP R226 90.9/F_4 +1.05V PEG_CLKREQ# R610 EV@10K_4
E20 VSS[230] VSS[330] Y12
E24 VSS[231] VSS[331] Y15 {24} CLK_PCIE_MINI# AJ50 CLKOUT_PCIE5N
E30 Y19 WLAN {24} CLK_PCIE_MINI AJ52 T45 CLK_FLEX0 R235 10K_4 +3V
E34
VSS[232] VSS[332]
Y23
CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64 P43 CLK_FLEX1 T34
VSS[233] VSS[333] PCIE_CLK_RQ5# (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65 CLK_FLEX2 T33
E38 Y28 {24} PCIE_CLK_RQ5# H6 T42
E42
VSS[234] VSS[334]
Y30
PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66 N50 CLK_FLEX3 R257 22_4
VSS[235] VSS[335] (+3V) CLKOUTFLEX3 / GPIO67 48M_CARD {29}
E46 VSS[236] VSS[336] Y31
E48 Y32 TP70 AK53
VSS[237] VSS[337] TP71 CLKOUT_PEG_B_N
E6 VSS[238] VSS[338] Y38 AK51 CLKOUT_PEG_B_P Clock Flex 48M_Card Reserve for
E8 Y43 Placement close
F49
VSS[239] VSS[339]
Y46 PCIE_CLK_REQB# P13 cardreader 48MHZ
VSS[240] VSS[340] PEG_B_CLKRQ# / GPIO56(+3V_S5)
F5 VSS[241] VSS[341] P49
G10 Y5 R560 EV@0_4
VSS[242] VSS[342] IbexPeak-M_Rev1_0
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 P24 XTAL25_IN C749 IV@27P/50V_4N
VSS[245] VSS[345]
G22 VSS[246] VSS[346] T43

2
G32 VSS[247] VSS[347] AD51
G36 AT8 Y4
VSS[248] VSS[348] R552
G40 VSS[249] VSS[349] AD47
G44 Y47 IV@1M/F_4 IV@25MHZ_30

1
VSS[250] VSS[350]
G52 VSS[251] VSS[351] AT12
AF39 AM6 XTAL25_OUT C747 IV@27P/50V_4N
VSS[252] VSS[352]
H16 VSS[253] VSS[353] AT13
H20 AM5
A H30
VSS[254]
VSS[255]
VSS[354]
VSS[355] AK45 B2A A
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_Rev1_0

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
A1A
PCH 2/5 (PCIE, SMBUS, CK)
Date: Saturday, April 10, 2010 Sheet 8 of 45
5 4 3 2 1
1 2 3 4 5 6 7 8

IBEX PEAK-M (DMI,FDI,GPIO)


U24C
BA18
IBEX PEAK-M (PCI,USB,NVRAM) {3}
{3}
DMI_RXN0
DMI_RXN1
BC24
BJ22
DMI0RXN Ibex-M
3 OF 10
FDI_RXN0
FDI_RXN1 BH17
BD16
FDI_TXN0
FDI_TXN1
FDI_TXN2
{3}
{3}
{3}
A DMI1RXN FDI_RXN2 A
{3} DMI_RXN2 AW 20 DMI2RXN FDI_RXN3 BJ16 FDI_TXN3 {3}
U24E {3} DMI_RXN3 BJ20 BA16 FDI_TXN4 {3}
DMI3RXN FDI_RXN4
H40 AD0 Ibex-M NV_CE#0 AY9 FDI_RXN5 BE14 FDI_TXN5 {3}
N34 AD1 5 OF 10 NV_CE#1 BD1 {3} DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 {3}
C44 AD2 NV_CE#2 AP15 {3} DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 {3}
A38 AD3 NV_CE#3 BD8 {3} DMI_RXP2 BA20 DMI2RXP
C36 AD4 {3} DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 {3}
J34 AD5 NV_DQS0 AV9 FDI_RXP1 BF17 FDI_TXP1 {3}
A40 BG8 BE22 BC16
D45
E36
AD6
AD7 NVRAM NV_DQS1
AP7
{3}
{3}
DMI_TXN0
DMI_TXN1 BF21
BD20
DMI0TXN
DMI1TXN DMI FDI
FDI_RXP2
FDI_RXP3 BG16
AW 16
FDI_TXP2
FDI_TXP3
{3}
{3}
AD8 NV_DQ0 / NV_IO0 {3} DMI_TXN2 DMI2TXN FDI_RXP4 FDI_TXP4 {3}
H48 AD9 NV_DQ1 / NV_IO1 AP6 {3} DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 {3}
E40 AD10 NV_DQ2 / NV_IO2 AT6 FDI_RXP6 BB14 FDI_TXP6 {3}
C40 AD11 NV_DQ3 / NV_IO3 AT9 {3} DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 {3}
M48 AD12 NV_DQ4 / NV_IO4 BB1 {3} DMI_TXP1 BH21 DMI1TXP
M45 AD13 NV_DQ5 / NV_IO5 AV6 {3} DMI_TXP2 BC20 DMI2TXP
F53 AD14 NV_DQ6 / NV_IO6 BB3 {3} DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT {3}
M40 AD15 NV_DQ7 / NV_IO7 BA4 FDI_FSYNC0 BF13 FDI_FSYNC0 {3}
M43 AD16 NV_DQ8 / NV_IO8 BE4 FDI_FSYNC1 BH13 FDI_FSYNC1 {3}
J36 AD17 NV_DQ9 / NV_IO9 BB6 BH25 DMI_ZCOMP FDI_LSYNC0 BJ12 FDI_LSYNC0 {3}
K48 BD6 +1.05V R483 49.9/F_4 DMI_COMP BF25 BG14 FDI_LSYNC1 {3}
AD18 NV_DQ10 / NV_IO10 DMI_IRCOMP FDI_LSYNC1
&Žƌ CLK_PCI_FB
F40
C42
AD19 NV_DQ11 / NV_IO11 BB7
BC8 +3V R432 1K_4
AD20 NV_DQ12 / NV_IO12
D/ K46
M51
AD21 NV_DQ13 / NV_IO13 BJ8
BJ6 {3,33} SYS_RESET# T6
System Power Management
P12 SUSB# {30}
AD22 NV_DQ14 / NV_IO14 SYS_PWROK R273 *SHORT_4 SYS_RESET# SLP_S3#
J52 AD23 NV_DQ15 / NV_IO15 BG6 M6 SYS_PW ROK SLP_S4# H7 SUSC# {30}
R267 K51 R262 *SHORT_4 B17
AD24 NV_ALE R270 *SHORT_4 PW ROK SLP_M#
*22_4 L34 AD25 NV_ALE BD3 NV_ALE {10} K5 MEPW ROK SLP_M# K8 TP50
F42 AY6 N2
B J40
AD26
AD27
NV_CLE C3A RSV_ICH_LAN_RST# A10
LAN_RST#
TP23 TP73 B
G46 {3} PM_DRAM_PWRGD D9 M1 SUS_PWR_ACK_R
F44
AD28
AU2 NV_RCOMP R520 *32.4/F_4 RSMRST# C16
DRAMPW ROK (+3V_S5) SUS_PW R_DN_ACK / GPIO30 P7 AC_PRESENT
AD29 NV_RCOMP {30} RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31
C473 M47 Y1 CLKRUN#
*10P/50V_4C H36
AD30
AD31 PCI NV_RB# AV7 {30,33} DNBSWON# DNBSWON# P5 PW RBTN#
(+3V) CLKRUN# / GPIO32
(+3V_S5) SUS_STAT# / GPIO61 P8
F3
RSV_SUS_SATA#
SUSCLK_R
CLKRUN# {30}
TP42
J50 AY8
(+3V_S5) SUSCLK / GPIO62
E4 SLP_S5#
C/BE0# NV_W R#0_RE# PM_RI#
(+3V_S5) SLP_S5# / GPIO63 PM_BATLOW# TP75
G42 AY5 F14 A6
H47
C/BE1# NV_W R#1_RE# PCIE_WAKE# J12
RI# (+3V_S5) BATLOW # / GPIO72
C/BE2# {24,28} PCIE_WAKE# W AKE#
G34 C/BE3# NV_W E#_CK0 AV11 {3} PM_SYNC BJ10 PMSYNCH SLP_LAN# / GPIO29 F6
BF5 (+3V_S5) TP46
PCI_PIRQA# NV_W E#_CK1
G38 PIRQA#
PCI_PIRQB# H51 IbexPeak-M_Rev1_0
PCI_PIRQC# PIRQB#
B37 H18
PCI_PIRQD# A44
PIRQC# USBP0N
J18
USBP0-
USBP0+
{23}
{23}

PIRQD# USBP0P TP78 +3V_S5
USBP1N A18
REQ0# F51 C18 TP79
REQ1# REQ0# USBP1P PM_RI# R307 10K_4
REQ2#
A46
B45
REQ1# / GPIO50 (+5V) USBP2N N20
P20
USBP2-
USBP2+
{31}
{31}
ůƵĞƚŽŽƚŚ PM_BATLOW# R628 10K_4
REQ3# REQ2# / GPIO52 (+5V) USBP2P +3V_S5 PCIE_WAKE# R312 10K_4
M53 REQ3# / GPIO54 (+5V) USBP3N J20
L20
USBP3- {29} ĂƌĚ SUS_PWR_ACK_R R265 10K_4
USBP3P USBP3+ {29}
F20 USBP4-_R R293 *0_4 AC_PRESENT R266 10K_4
{10} GNT0# F48 GNT0# USBP4N
G20 USBP4+_R R294 *0_4
USBP4- ZĞĂĚĞƌ
{24}
DNBSWON# R264 *10K_4
{10} GNT1#
TP44
K45
F36
GNT1# / GPIO51 (+3V) USBP4P
A20
USBP4+
USBP5- {24}
{24} ^/D U28 C807
GNT2# / GPIO53 (+3V) USBP5N *TC7SH08FU(F)
{10} GNT3# H53 GNT3# / GPIO55 (+3V) USBP5P C20 USBP5+ {24} t>E *0.1U/10V_4X

5
M22 TP36
PIRQE# USBP6N TP49 PLT_RST-R# RSMRST# R303 10K_4
B41 PIRQE# / GPIO2 (+5V) USBP6P N22 USB6/SUB7 HM55 not support 2
PIRQF# K53 B21 TP80 4 RSV_ICH_LAN_RST# R635 10K_4
PIRQF# / GPIO3 (+5V) USBP7N PLTRST# {3,24,28,29,30}
PIRQG# A36 D21 TP77 1
PIRQH# PIRQG# / GPIO4 (+5V) USBP7P
C
A48 PIRQH# / GPIO5 (+5V) USBP8N H22
J22
USBP8- {31} h^ R624 R630 C
USBP8+ {31}

3
R652 8.2K_4 USBP8P
+3V K6 PCIRST# USBP9N E22
F22
USBP9-
USBP9+
{31}
{31}
h^ 100K_4
*100K_4
C3A
PCI_SERR# USBP9P R629 0_4
E44 A22
PCI_PERR# E50
SERR#
USB USBP10N
C22
USBP10-
USBP10+
{24}
{24}
ϯ' SUSCLK_R R705 *SHORT_4 SUSCLK {30}
PERR# USBP10P TP47
G24
USBP11N
USBP11P H24 TP37 E3A
PCI_IRDY# A42 L24 TP40
TP43 H44
IRDY#
PAR
USBP12N
USBP12P M24 TP35 C3A +3V_S5
PCI_DEVSEL# R625 0_4
PCI_FRAME#
F46
C46
DEVSEL# USBP13N A24
C24
USBP13- {25} ^d VGA_PLTRST# {15}
C799 0.1U/10V_4X
FRAME# USBP13P USBP13+ {25}
PCI_PLOCK# D49 PLOCK#
USBRBIAS# B25 USB_BIAS R641 22.6/F_4
PCI_STOP# D41 +3V_S5
PCI_TRDY# STOP#
C48 TRDY# USBRBIAS D25

5
USB OC table {3,39} DELAY_VR_PWRGOOD 1

2
TP41 M7 4 SYS_PWROK
PME# USB_OC0#
N16 {3,30} MPWROK 2
PLT_RST-R# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1# 3 1 SUS_PWR_ACK_R U30
{30} SUS_PWR_ACK

3
PLTRST# (+3V_S5)OC1# / GPIO40 USB_OC2# TC7SH08FU(F) R633
F16
R261 22_4 PCLK_DEBUG_R N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3# Q14
{24} PCLK_DEBUG CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42
TP76 P53 E14 USBOC#8_9 2N7002_200MA R656 100K_4 10K_4
CLKOUT_PCI1 (+3V_S5)OC4# / GPIO43 USBOC#8_9 {30,31}
TP39 P46 G16 USB_OC5#
CLK_PCI_FB R263 22_4 CLKOUT_PCI2 (+3V_S5) OC5# / GPIO9 USBOC#13
{8} CLK_PCI_FB P51 F12 USBOC#13 {25,30}
R259 22_4 P48
CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10 T15 SCI# R115 *0_4
{30} PCLK_591 CLKOUT_PCI4 (+3V_S5) OC7# / GPIO14 SCI# {30}

IbexPeak-M_Rev1_0
D D

+3V +3V +3V_S5


RP18 RP17 +3V RP8
5 6 PCI_PIRQD# 5 6 PCI_PLOCK# 5 6 USB_OC0#
PCI_IRDY# 4 7 PCI_SERR# REQ3# 4 7 PCI_PERR# REQ2# R287 8.2K_4 USBOC#8_9 4 7 USB_OC1#
PCI_STOP#
PCI_PIRQA#
3 8 REQ1#
PCI_FRAME#
PCI_DEVSEL#
PCI_TRDY#
3 8 REQ0#
PCI_PIRQB#
PIRQE#
PIRQF#
R286
R620
8.2K_4
8.2K_4
USB_OC5#
USBOC#13
3 8 USB_OC2#
USB_OC3#
Quanta Computer Inc.
http://laptop-motherboard-schematic.blogspot.com/
2 9 2 9 2 9
PCI_PIRQC# 1 10 PIRQH# 1 10 CLKRUN# R569 8.2K_4 SCI# 1 10
+3V +3V
PIRQG# R285 8.2K_4
+3V_S5 PROJECT : BL6
8.2KX8 8.2KX8 8.2KX8 Size Document Number Rev
A1A
PCH 3/5 (PCI,ONFI,USB,DMI)
Date: Saturday, April 10, 2010 Sheet 9 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) IBEX PEAK-M (GND)


U24F
Ibex-M
U24H 3&+6WUDS3LQ&RQILJXUDWLRQ7DEOH
BOARD_ID1 Y3 6 OF 10 AH45 AB16 AK30
BMBUSY# / GPIO0 (+3V) CLKOUT_PCIE6N VSS[0] VSS[80]
AH46 AA19 AK31
BOARD_ID6 CLKOUT_PCIE6P VSS[1] VSS[81]
C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
GPIO6 VSS[3] VSS[83]
D37 (+3V) AM19 AK35
TACH2 / GPIO6 VSS[4] VSS[84]
BOARD_ID4 CLKOUT_PCIE7N
AF48 AA24
VSS[5] VSS[85]
AK38 SPKR
J32 AF47 AA26 AK43

GPIO8
TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87]
AK46 {7,27} PCBEEP R592 *1K_4 +3V
F10 AA30 AK49
GPIO8(+3V_S5) MISC AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89]
AK5
A GPIO12 K9 U2 GATEA20 GATEA20 {30} AA32 AK8 0 = Default Mode (Internal weak Pull-down) A
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE VSS[10] VSS[90]
AB11
VSS[11] VSS[91]
AL2 Reboot option at power-up 1 = No Reboot Mode with TCO Disabled
GPIO15 T7 AB15 AL52
GPIO15 (+3V_S5) VSS[12] VSS[92]
AB23 AM11
GPIO16 VSS[13] VSS[93]
AA2 AM3 CLK_CPU_BCLKN {3} AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N VSS[14] VSS[94]
GPIO17
AB31
VSS[15] VSS[95]
AD24 GNT3#/
F38 AM1 CLK_CPU_BCLKP {3} AB32 AM20
TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P VSS[16] VSS[96] GPIO55 R622 *10K_4
AB39 AM22 {9} GNT3#
GPIO22 PCH_PECI_R VSS[17] VSS[97]
Y7 BG10 H_PECI {3} AB43 AM24
SCLOCK / GPIO22(+3V) PECI VSS[18] VSS[98]
AB47 AM26
GPIO27 RCIN# VSS[19] VSS[99]
AB12
GPIO27 (+3V_S5) RCIN#
T1 RCIN# {30} AB5
VSS[20] VSS[100]
AM28 Top-Block 0 = Top Block Swap Mode
AB8 BA42
GPIO28 V13 GPIO28 (+3V_S5)
CPU PROCPWRGD BE10 H_PWRGOOD {3,33} AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102] AM30
Swap Override 1 = Default Mode (Internal pull-up)
AC52 VSS[23] VSS[103] AM31
ESATA_DN# AB7 BD10 PCH_THRMTRIP#_R R180 56.2/F_4 AD11 AM32
C3A {25} ESATA_DN# SATA2GP / GPIO36 (+3V) THRMTRIP# PM_THRMTRIP# {3}
AD12
VSS[24]
VSS[25]
VSS[104]
VSS[105] AM34 HDA_DOCK_EN
E3A JP1 *SHORT PAD
GPIO37 AB13 BA22 AD16 AM35
SATA3GP / GPIO37 (+3V) TP1
AW22 R181 56.2/F_4 AD23
VSS[26] VSS[106]
AM38
#/GPIO33 R282 1K_4 2 1
TP2 +VTT VSS[27] VSS[107] {7,30} PCH_GPIO33
GPIO39 P3 BB22 AD30 AM39
SDATAOUT0 / GPIO39 (+3V) TP3 VSS[28] VSS[108]
TP4 AY45 AD31 VSS[29] VSS[109] AM42
TP5 AY46 AD32 VSS[30] VSS[110] AU20
{3} DDR3_DRAMRST#_PCH GPIO46 F1 AV43 AD34 AM46 Flash Descriptor 0 = Flash Descriptor Security will be overridden
PCIECLKRQ7# / GPIO46 (+3V_S5) TP6 VSS[31] VSS[111]
AV45 AU22 AV22
BOARD_ID5 AB6
TP7
AF13 AD42
VSS[32] VSS[112]
AM49
Security Override 1 = Security measure defined in the Flash Descriptor will be enabled.
SDATAOUT1 / GPIO48 (+3V) TP8
M18 AD46
VSS[33] VSS[113]
AM7
TEMP_ALERT# TP9 VSS[34] VSS[114]
{3,30} TEMP_ALERT# AA4 SATA5GP / GPIO49 (+3V) TP10 N18 AD49 VSS[35] VSS[115] AA50
RSVD TP11 AJ24 AD7 VSS[36] VSS[116] BB10 GNT0#,
TP12 AK41 AE2 VSS[37] VSS[117] AN32
TP13 AK42 AE4 VSS[38] VSS[118] AN50 GNT1# {9} GNT0# GNT0# R272 *1K_4
M32 AF12 AN52 {9} GNT1# GNT1# R621 *1K_4
GPIO24 TP14 VSS[39] VSS[119]
H10 GPIO24 TP15 N32 Y13 VSS[40] VSS[120] AP12
GPIO45 H3 (+3V_S5) M30 AH49 AP42
GPIO57 PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 VSS[41] VSS[121]
F8 GPIO57 TP17 N30 AU4 VSS[42] VSS[122] AP46
BOARD_ID2 M11 (+3V_S5) H12 AF35 AP49 Boot BIOS Strap
BOARD_ID3 STP_PCI# / GPIO34 (+3V) TP18 VSS[43] VSS[123]
B
V6 SATACLKREQ# / GPIO35(+3V) TP19 AA23 AP13 VSS[44] VSS[124] AP5 B
BOARD_ID7 V3 AB45 AN34 AP8 PCI_GNT0# GNT#1 Boot BIOS Location
SLOAD / GPIO38 (+3V) NC_1 VSS[45] VSS[125]
NC_2 AB38 AF45 VSS[46] VSS[126] AR2
AB42 AF46 AR52 0 0 LPC
NC_3 VSS[47] VSS[127]
NC_4 AB41 AF49 VSS[48] VSS[128] AT11
T39 AF5 BA12 0 1 PCI
NC_5 TP38 VSS[49] VSS[129]
INIT3_3V# P6 AF8 VSS[50] VSS[130] AH48
C10 AG2 AT32 1 0 Reserved (NAND)
TP24 VSS[51] VSS[131]
AG52 AT36
VSS[52] VSS[132] SPI
A4
VSS_NCTF_1 VSS_NCTF_16
BH2 AH11
VSS[53] VSS[133]
AT41 1 1
A49 BH52 AH15 AT47
VSS_NCTF_2 VSS_NCTF_17 VSS[54] VSS[134]
A5 BH53 AH16 AT7
VSS_NCTF_3 VSS_NCTF_18 VSS[55] VSS[135]
A50
VSS_NCTF_4 NCTF VSS_NCTF_19
BJ1 AH24
VSS[56] VSS[136]
AV12
A52
VSS_NCTF_5 VSS_NCTF_20
BJ2 AH32
VSS[57] VSS[137]
AV16 SPI_MOSI
A53 BJ4 AV18 AV20
VSS_NCTF_6 VSS_NCTF_21 VSS[58] VSS[138] R504 *1K_4
B2 BJ49 AH43 AV24 {7} SPI_SI_R +3V
VSS_NCTF_7 VSS_NCTF_22 VSS[59] VSS[139]
B4 BJ5 AH47 AV30
VSS_NCTF_8 VSS_NCTF_23 VSS[60] VSS[140]
B52 BJ50 AH7 AV34
VSS_NCTF_9 VSS_NCTF_24 VSS[61] VSS[141]
B53
VSS_NCTF_10 VSS_NCTF_25
BJ52 AJ19
VSS[62] VSS[142]
AV38 TPM Functionality 1 = Enabled
BE1 BJ53 AJ2 AV42 Disable
BE53
VSS_NCTF_11 VSS_NCTF_26
D1 AJ20
VSS[63] VSS[143]
AV46
0 = Disable
VSS_NCTF_12 VSS_NCTF_27 VSS[64] VSS[144]
BF1 D2 AJ22 AV49
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53
VSS_NCTF_14 VSS_NCTF_29
D53 AJ23
VSS[66] VSS[146]
AV5 NV_ALE
BH1 E1 AJ26 AV8
VSS_NCTF_15 VSS_NCTF_30 VSS[67] VSS[147] R496 *10K_4
E53 AJ28 AW14 {9} NV_ALE +1.8V
VSS_NCTF_31 VSS[68] VSS[148]
AJ32 AW18
IbexPeak-M_Rev1_0 VSS[69] VSS[149]
AJ34
VSS[70] VSS[150]
AW2 IntelR Anti-Theft Technology 1 = Enabled
AT5 BF9
AJ4
VSS[71] VSS[151]
AW32
HDD Data Protection 0 = Disabled (Default)
VSS[72] VSS[152] (Intel AT-d) Enable
AK12 AW36
VSS[73] VSS[153]
AM41 AW40
VSS[74] VSS[154]
AN19 AW52
VSS[75] VSS[155]
AK26
VSS[76] VSS[156]
AY11 GPIO8 GPIO8 R298 10K_4
AK22 AY43 +3V_S5
VSS[77] VSS[157]
AK23 AY47
VSS[78] VSS[158]
C AK28 C
VSS[79]
IbexPeak-M_Rev1_0 Reserved This signal has a weak internal pull up.
NOTE: This signal should not be pulled low

+3V_S5 +3V
GPIO15 GPIO15 R248 1K_4
+3V +3V_S5
GPIO57 R297 10K_4 RCIN# R590 10K_4
Reserved 0 = Intel ME Crypto Transport Layer Security (TLS) cipher
GPIO12 R278 10K_4 GATEA20 R589 10K_4
suite with no confidentiality
GPIO27 R222 *10K_4 ESATA_DN# R238 10K_4 1 = Intel ME Crypto Transport Layer Security (TLS) cipher
GPIO28 R245 10K_4 GPIO6 R296 10K_4
C3A GPIO37 R244 10K_4
suite with confidentiality

GPIO46 R618 10K_4 GPIO16 R568 10K_4 GPIO39 R591 10K_4 GPIO27
GPIO24 R284 *10K_4 GPIO17 R279 10K_4 TEMP_ALERT# R567 10K_4 GPIO27 R232 *10K_4

GPIO45 R616 *10K_4 GPIO22 R258 10K_4

On-Die PLL Voltage 0 = Disables the VccVRM. Need to use


Regulator on-board filter circuits for analog rails.
BOARD ID SETTING 1 = Enables the internal VccVRM to have a clean supply for analog rails.
No need to use on-board filter circuit.
%RDUG,' ,' ,' ,' ,' ,' ,' ,' This signal has a weak internal pull-up.
+3V +3V +3V +3V +3V +3V +3V
UMA SKU H
VGA SKU L
B2A
W/ MDC H
W/O MDC L R290 R231 R280 R240 R274 R570 R586 +RTC_CELL R644 330K_6 PCH_INVRMEN
D PCH_INVRMEN {7} D
10K_4 10K_4
W/ HDMI H 10K_4 HM@10K_4 MDC@10K_4 IV@10K_4 2C@10K_4
W/O HDMI L INTVRMEN - Integrated SUS 1.1V VRM Enable
BOARD_ID6 BT_Detect# {31} BOARD_ID5 BOARD_ID4 CPUSB# {24} BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID7 High - Enable Internal VRs
W/O 3G H
W/ 3G L
15" H R239 R247 R277 R571 R728
14"
W/O BT
W/ BT
L
H
L
http://laptop-motherboard-schematic.blogspot.com/
*10K_4 HM@10K_4 MDC@10K_4 EV@10K_4 *4C@10K_4 Quanta Computer Inc.
PROJECT : BL6
2 Core H Size Document Number Rev
4 Core L A1A
PCH 4/5 (GPIO & Strap)
Date: Saturday, April 10, 2010 Sheet 10 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCCA_DAC_1_2=69mA(15mils)

R599 HCB1608KF-181T15_1.5A +3V

VCCCORE = 1.432A(80mils)
+3V_LDO

+1.05V R467 *SHORT_8 +1.05V_VCCCORE_ICH


C770 10U/6.3V_8X VCCTX_LVDS= 59mA(15mils) VCCIO = 3.062A(150mils)
C3A U24G POWER U24J POWER
AB24 AE50 C766 0.1U/10V_4X Ibex-M
C447 1U/6.3V_4X VCCCORE[1] VCCADAC[1] TP69 VCCACLK +1.05V_VCCUSBCORE R295 *SHORT_6 +1.05V
A
AB26 VCCCORE[2] Ibex-M AP51 VCCACLK[1] 10 OF 10VCCIO[5] V24 A
AB28 7 OF 10 AE52 C767 0.01U/25V_4X V26
C446 4.7U/6.3V_6X AD26
VCCCORE[3]
VCCCORE[4]
VCCADAC[2]
AP53 VCCACLK[2]
VCCIO[6]
VCCIO[7] Y24 C453 1U/6.3V_4X C3A
AD28 AF53 DCPSUSBYP Y20 Y26
AF26
VCCCORE[5] CRT VSSA_DAC[1]
VCCALVDS= 59mA(15mils) C451 0.1U/10V_4X DCPSUSBYP VCCIO[8]
AF28
VCCCORE[6]
AF51
USB V28 +3V_S5_VCCPUSB R268 *SHORT_6 +3V_S5
VCCCORE[7] VSSA_DAC[2] R218 EV@0_6 VCCSUS3_3[1]
AF30 VCCCORE[8] VCCLAN = 0.32A(30mils) VCCSUS3_3[2] U28
C3A
AF31 U26 C467 0.1U/10V_4X
VCCCORE[9] VCCALVDS R214 IV@0_6 R559 *SHORT_6 +1.05V_VCCAUX VCCSUS3_3[3]
AH26 AH38 AF23 U24
AH28
VCCCORE[10]
VCCCORE[11]
VCCALVDS
VSSA_LVDS AH39 R192 EV@0_6
+3V
C3A +1.05V VCCLAN[1] VCCSUS3_3[4]
VCCSUS3_3[5] P28 C466 0.1U/10V_4X
AH30 R207 IV@0.1uh_8_250MA C445 *1U/6.3V_4X AF24 P26
AH31
VCCCORE[12] LVDS AP43 VCCTX_LVDS
+1.8V VCCLAN[2] VCCSUS3_3[6]
N28 C460 *0.047U/10V_4X
VCCCORE[13] VCCTX_LVDS[1] C418 IV@4.7U/6.3V_6X VCCSUS3_3[7]
AJ30 VCCCORE[14] VCCTX_LVDS[2] AP45 VCCSUS3_3[8] N26
AJ31 AT46 C430 IV@0.1U/10V_4X R281 +1.05V_VCCEPW
*SHORT_8 AD38 M28
40mA(15mils)
VCCCORE[15] VCCTX_LVDS[3]
VCCTX_LVDS[4] AT45 C419 IV@0.01U/25V_4X B2A C3A +1.05V VCCME[1] VCCSUS3_3[9]
VCCSUS3_3[10] M26
C449 4.7U/6.3V_6X AD39 L28 VCCSUS3_3 = 0.163A(20mils)
VCC CORE VCCME[2] VCCSUS3_3[11]
L26
R529 *SHORT_6 +1.05V_PCH_VCCDPLL_EXP AK24 +3V_VCC_GIO R236 *SHORT_6 +3V C456 4.7U/6.3V_6X VCCSUS3_3[12]
AB34 AD41 J28
+1.05V VCCIO[24] VCC3_3[2] C3A VCCME[3] VCCSUS3_3[13]
VCCSUS3_3[14] J26
TP65 +V1.1LAN_VCCAPLL_EXP BJ24 AB35 C454 0.1U/10V_4X C468 1U/6.3V_4X AF43 H28
VCCAPLLEXP VCC3_3[3] VCCME[4] VCCSUS3_3[15]
*SHORT_1206 +V1.1S_VCC_EXP HVCMOS VCCSUS3_3[16] H26
R462 C462 1U/6.3V_4X
+1.05V AN20 VCCIO[25] VCC3_3[4] AD35 VCC3_3 = 0.357A(30mils) AF41 VCCME[5] VCCSUS3_3[17] G28
AN22 VCCIO[26] VCCSUS3_3[18] G26
R463 *SHORT_1206 C469 1U/6.3V_4X
AN23 VCCIO[27] AF42 VCCME[6] VCCSUS3_3[19] F28

Clock and Miscellaneous


C703 4.7U/6.3V_6X AN24 VCCVRM= 196mA(15mils) F26
C3A AN26
VCCIO[28]
VCCIO[29]
C3A VCCME = 1.849A(100mils) V39 VCCME[7]
VCCSUS3_3[20]
VCCSUS3_3[21] E28
C385 1U/6.3V_4X AN28 AT24 +1.8S_VCCADMI_VRM R481 *SHORT_6 +1.8V E26
VCCIO[30] VCCVRM[2] VCCSUS3_3[22]
BJ26 VCCIO[31] V41 VCCME[8] VCCSUS3_3[23] C28
C437 1U/6.3V_4X BJ28 AT16 VCCDMI R482 *SHORT_6 +VTTVCCDMI= 61mA(15mils) C26
VCCIO[32] VCCDMI[1] VCCSUS3_3[24]
AT26 VCCIO[33] DMI V42 VCCME[9] VCCSUS3_3[25] B27
B C426 1U/6.3V_4X AT28 AU16 C435 1U/6.3V_4X A28 B
VCCIO[34] VCCDMI[2] VCCSUS3_3[26]
AU26 VCCIO[35] Y39 VCCME[10] VCCSUS3_3[27] A26
C432 1U/6.3V_4X AU28 V5REF_SUS< 1mA
VCCIO[36]
AV26 VCCIO[37] VCCPNAND= 156mA(15mils) Y41 VCCME[11] VCCSUS3_3[28] U23
C716 0.1U/10V_4X AV28 AM16
AW 26
VCCIO[38] PCI E* VCCPNAND[1]
AK16 Y42 V23 +1.05V_VCCUSBCORE
C711 0.1U/10V_4X VCCIO[39] VCCPNAND[2] VCCME[12] VCCIO[56]
AW 28 VCCIO[40] VCCPNAND[3] AK20
C699 BA26 AK19 +V_NVRAM_VCCQ R213 *SHORT_6 +1.8V +VCCRTCEXT V9 F24 V5REF_SUS R315 100/F_4
+ C436 0.1U/10V_4X BA28
VCCIO[41]
VCCIO[42]
VCCPNAND[4]
VCCPNAND[5] AK15 C3A C461 0.1U/10V_4X DCPRTC V5REF_SUS +5V_S5
BB26 AK13 C441 0.1U/10V_4X D18 CH501H-40PT_100MA +3V_S5
*330U/2V_7343P_E9c VCCIO[43] VCCPNAND[6] R484 *SHORT_4VCCVRM
BB28 AM12 AU24
BC26
VCCIO[44]
VCCIO[45]
VCCPNAND[7]
VCCPNAND[8] AM13 C3A +1.8V VCCVRM[3] C484 1U/6.3V_4X
BC28 VCCIO[46] VCCPNAND[9] AM15 68mA(15mils)
BD26 +V1.1LAN_VCCA_A_DPL BB51 V5REF< 1mA
VCCIO[47] VCCADPLLA[1]
BD28 VCCIO[48] BB53 VCCADPLLA[2]
BE26 VCCME3_3= 85mA(15mils) +V1.1LAN_VCCA_B_DPL K49 V5REF R283 100/F_4
BE28
VCCIO[49] NAND / SPI V5REF +5V
VCCIO[50] D17 CH501H-40PT_100MA
VCCIO = 3.062A(150mils) BG26 VCCIO[51] VCCME3_3[1] AM8 BD51 VCCADPLLB[1] +3V
BG28 AM9 +3.3V_VCCME_SPI R209 *SHORT_6 +3V C439 1U/6.3V_4X BD53 PCI/GPIO/LPC
BH27
VCCIO[52]
VCCIO[53]
VCCME3_3[2]
VCCME3_3[3] AP11 C3A VCCADPLLB[2] C475 1U/6.3V_4X
C433 *1U/6.3V_4X AN30 AP9 C431 0.1U/10V_4X +1.05V R219 *SHORT_6 +1.05V_SSCVCC AH23
VCCIO[54] VCCME3_3[4] R224 *SHORT_6 +1.05V_SSCVCC1 VCCIO[21] +3V_VCCPPCI R271 *SHORT_6
AN31 VCCIO[55] +1.05V AJ35 VCCIO[22] VCC3_3[8] J38 +3V
+1.05V_SSCVCC AH35 L38 VCC3_3 = 0.357A(30mils)
+3V R211 *SHORT_6 +3V_VCCA3GBG AN35 VCC3_3[1]
C448 1U/6.3V_4X AF34
VCCIO[23]
VCCIO[2]
VCC3_3[9]
VCC3_3[10] M36 C3A
VCCIO = 3.062A(150mils) C444 1U/6.3V_4X AH34 N36 C465 0.1U/10V_4X
C442 1U/6.3V_4X VCCIO[3] VCC3_3[11] C474 0.1U/10V_4X
AF32 VCCIO[4] VCC3_3[12] P36
+1.8V R480 *SHORT_6
+VCCAFDI_VRM AT22 Isolate the power supply for pins AF32,AF34,AH34 U35
VCCVRM[1] VCC3_3[13]
FDI AD13
TP64 +V1.1LAN_VCCAPLL_FDI BJ18 Reduce the jitter on HDMI interface for C452 0.1U/10V_4X +VCCSST V12
VCC3_3[14]
VCCFDIPLL DCPSST
C
1080P 60Hz Deep color mode. C
37mA(15mils) AM23 +V1.1LAN_INT_VCCSUS Y22
VCCIO[1] C450 0.1U/10V_4X DCPSUS
C3A VCCSUS3_3 = 0.163A(20mils)
IbexPeak-M_Rev1_0 PCI/GPIO/LPC AK3
R539 +1.05V_VCCDPLL_FDI
*SHORT_6 R308 *SHORT_6 +3V_S5_VCCPSUS VCCSATAPLL[1] +V1.1LAN_VCCAPLL
P18 AK1
+1.05V
C3A +3V_S5 U19
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSATAPLL[2] TP72

VCC3_3 = 0.357A(30mils) U20 VCCSUS3_3[31]


68mA(15mils) C470 0.1U/10V_4X U22 AT20 VCCVRM1 R485 *SHORT_4 +1.8V
VCCSUS3_3[32] VCCVRM[4]
+1.05V L31 10uh_8_100MA +V1.1LAN_VCCA_A_DPL
C3A +3V R304 *SHORT_6 +3V_VCCPCORE V15 VCC3_3[5] VCCIO[9] AH22 +VCC_SATA R468 *SHORT_8 +1.05VC3A
V16 VCC3_3[6] VCCIO[10] AH19
+ C733 Y16 AD20 C443 1U/6.3V_4X
C396 C464 0.1U/10V_4X VCC3_3[7] VCCIO[11]
V_CPU >1mA(15mils) VCCIO[12] AF22
*220U/2.5V_3528P_E35b R470 AD19
1U/6.3V_4X R205 *SHORT_6 +VTT_VCCPCPU VCCIO[13]
0_8
C3A +VTT AT18 V_CPU_IO[1] VCCIO[14] AF20 VCCIO = 3.062A(150mils)
C425 4.7U/6.3V_6X AU18 AF19
C423 0.1U/10V_4X V_CPU_IO[2] SATA VCCIO[15]
L30 *10uh_8_100MA +V1.1LAN_VCCA_B_DPL C422 0.1U/10V_4X
CPU VCCIO[16] AH20
VCCRTC= 2mA(15mils) VCCIO[17] AB19
VCCIO[18] AB20
+ C723 C405 A12 AB22
+RTC_CELL VCCRTC VCCIO[19]
C801 0.1U/10V_4X RTC AD22
*220U/2.5V_3528P_E35b 1U/6.3V_4X +3V_LDO C806 0.1U/10V_4X VCCIO[20]
VCCME = 1.849A(100mils)
R269 *SHORT_6 +V3.3A_1.5A_HDA_IO L30 AA34 +1.05V_VCCEPW
C3A +3V_S5 VCCSUSHDA VCCME[13]
VCCME[14] Y34
R659 *0_6 HDA Y35
Reserve for clear CRT Power +1.5V_S5 VCCME[15]
AA35
U25 C3A C773 C472 1U/6.3V_4X VCCME[16]
1 4 R578
{3,30,37,38,40} MAINON SHDN VO IV@10U/6.3V_8X *52.3K/F_4 IbexPeak-M_Rev1_0
+5V
D 2 GND VCCSUSHDA= 6mA(15mils) D

3 VIN SET 5

C780 *G913C R563

*0.1U/10V_4X *0_4
Plcaement close to U52 Quanta Computer Inc.
http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
A1A
PCH 5/5 (POWER)
Date: Saturday, April 10, 2010 Sheet 11 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

H=4 +1.5VSUS

JDIM1A M_A_DQ[63:0] {4}


{4} M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0
M_A_A1 A0 DQ0 M_A_DQ1 JDIM1B
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ2 75 44
M_A_A3 A2 DQ2 M_A_DQ3 VDD1 VSS16
95 A3 DQ3 17 76 VDD2 VSS17 48
M_A_A4 92 4 M_A_DQ4 81 49
M_A_A5 A4 DQ4 M_A_DQ5 VDD3 VSS18
91 A5 DQ5 6 82 VDD4 VSS19 54
M_A_A6 90 16 M_A_DQ6 87 55
M_A_A7 A6 DQ6 M_A_DQ7 VDD5 VSS20
86 A7 DQ7 18 88 VDD6 VSS21 60
M_A_A8 89 21 M_A_DQ8 93 61
A
M_A_A9 A8 DQ8 M_A_DQ9 VDD7 VSS22 A
85 A9 DQ9 23 94 VDD8 VSS23 65
M_A_A10 107 33 M_A_DQ10 99 66
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD9 VSS24
84 A11 DQ11 35 100 VDD10 VSS25 71
M_A_A12 83 22 M_A_DQ12 105 72
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD11 VSS26
119 A13 DQ13 24 106 VDD12 VSS27 127
M_A_A14 M_A_DQ14

PC2100 DDR3 SDRAM SO-DIMM


80 A14 DQ14 34 111 VDD13 VSS28 128
M_A_A15 78 36 M_A_DQ15 112 133
A15 DQ15 M_A_DQ16 VDD14 VSS29
DQ16 39 117 VDD15 VSS30 134

PC2100 DDR3 SDRAM SO-DIMM


{4} M_A_BS#0 109 41 M_A_DQ17 118 138
BA0 DQ17 M_A_DQ18 VDD16 VSS31
{4} M_A_BS#1 108 BA1 DQ18 51 123 VDD17 VSS32 139
{4} M_A_BS#2 79 53 M_A_DQ19 124 144
BA2 DQ19 M_A_DQ20 VDD18 VSS33
{4} M_A_CS#0 114 S0# DQ20 40 VSS34 145
{4} M_A_CS#1 121 42 M_A_DQ21 +3V 199 150
S1# DQ21 M_A_DQ22 VDDSPD VSS35
{4} M_A_CLKP0 101 CK0 DQ22 50 VSS36 151
{4} M_A_CLKN0 103 52 M_A_DQ23 77 155
CK0# DQ23 M_A_DQ24 for S3 power reduction NC1 VSS37
{4} M_A_CLKP1 102 CK1 DQ24 57 122 NC2 VSS38 156
{4} M_A_CLKN1 104 59 M_A_DQ25 125 161
CK1# DQ25 M_A_DQ26 NCTEST VSS39
{4} M_A_CKE0 73 CKE0 DQ26 67 VSS40 162
{4} M_A_CKE1 74 69 M_A_DQ27 {3} PM_EXTTS#0 PM_EXTTS#0 198 167
CKE1 DQ27 M_A_DQ28 EVENT# VSS41
{4} M_A_CAS# 115 CAS# DQ28 56 {3,13} DDR3_DRAMRST# 30 RESET# VSS42 168
{4} M_A_RAS# 110 58 M_A_DQ29 172
RAS# DQ29 M_A_DQ30 VSS43
{4} M_A_WE# 113 W E# DQ30 68 VSS44 173
R44 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 R8 *0_6 SMDDR_VREF_DQ0 1 178
R42 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 {6} DDR_VREF_DQ0 SMDDR_VREF_DIMM 126 VREF_DQ VSS45
201 SA1 DQ32 129 VREF_CA VSS46 179
{2,13,24} CGCLK_SMB 202 131 M_A_DQ33 184
SCL DQ33 M_A_DQ34 VSS47
{2,13,24} CGDAT_SMB 200 SDA DQ34 141 VSS48 185
143 M_A_DQ35 R7 2 189
DQ35 M_A_DQ36 VSS1 VSS49
{4} M_A_ODT0 116 ODT0 DQ36 130 100K_4 3 VSS2 VSS50 190
{4} M_A_ODT1 120 132 M_A_DQ37 8 195
ODT1 DQ37 M_A_DQ38 VSS3 VSS51
140 9 196

(204P)
B {4} M_A_DM[7:0] B
M_A_DM0 DQ38 M_A_DQ39 VSS4 VSS52
11 DM0 DQ39 142 13 VSS5
M_A_DM1 28 147 M_A_DQ40 14
M_A_DM2 DM1 DQ40 M_A_DQ41 VSS6
46 DM2 DQ41 149 19 VSS7
M_A_DM3 63 157 M_A_DQ42 20
(204P)
M_A_DM4 DM3 DQ42 M_A_DQ43 VSS8
136 DM4 DQ43 159 25 VSS9
M_A_DM5 153 146 M_A_DQ44 26 203 +SMDDR_VTERM
M_A_DM6 DM5 DQ44 M_A_DQ45 VSS10 VTT1
170 DM6 DQ45 148 31 VSS11 VTT2 204
M_A_DM7 187 158 M_A_DQ46 32
DM7 DQ46 M_A_DQ47 VSS12
{4} M_A_DQSP[7:0] DQ47 160 37 VSS13
M_A_DQSP0 12 163 M_A_DQ48 38
M_A_DQSP1 DQS0 DQ48 M_A_DQ49 VSS14
29 165 43

GND

GND
M_A_DQSP2 DQS1 DQ49 M_A_DQ50 VSS15
47 DQS2 DQ50 175
M_A_DQSP3 64 177 M_A_DQ51
M_A_DQSP4 DQS3 DQ51 M_A_DQ52 DDRRK-20401-TP4B
137 164

205

206
M_A_DQSP5 DQS4 DQ52 M_A_DQ53
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ54
M_A_DQSP7 DQS6 DQ54 M_A_DQ55
{4} M_A_DQSN[7:0] 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ56
M_A_DQSN1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ58
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60 +SMDDR_VTERM
M_A_DQSN5 DQS#4 DQ60 M_A_DQ61
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ62
M_A_DQSN7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194
R69
22_4
DDRRK-20401-TP4B
C C
SMDDR_VREF_DIMM {13}

3
Q4 C107 470P/50V_4X R30 0_4 +SMDDR_VREF
2N7002_200MA
{3,5,40,41} MAINON_ON_G 2 R32 *10K/F_4 R29 *10K/F_4 +1.5VSUS

1
Place these Caps near So-Dimm0.
+1.5VSUS

SMDDR_VREF_DQ0 +SMDDR_VTERM
C62 4.7U/6.3V_6X
C26 0.1U/10V_4X
C51 4.7U/6.3V_6X C170 1U/6.3V_4X
C34 2.2U/6.3V_6X +1.5VSUS
C42 4.7U/6.3V_6X C182 1U/6.3V_4X

C80 4.7U/6.3V_6X C168 1U/6.3V_4X


+1.5VSUS
C85 4.7U/6.3V_6X SMDDR_VREF_DIMM C171 1U/6.3V_4X R9
1K/F_4
C99 4.7U/6.3V_6X C108 0.1U/10V_4X C166 *10U/6.3V_8X
SMDDR_VREF_DQ0
C43 0.1U/10V_4X C124 2.2U/6.3V_6X C174 *10U/6.3V_8X
D + C599 D
C79 0.1U/10V_4X C125 *0.047U/10V_4X C179 4.7U/6.3V_6X
R6 C25 C32 *330U/2.5V_7343P_E9a
C53 0.1U/10V_4X C181 *0.047U/10V_4X 1K/F_4 0.1U/10V_4X *0.047U/10V_4X

C67 0.1U/10V_4X +3V C165 *0.047U/10V_4X

C95 0.1U/10V_4X C167 2.2U/6.3V_6X Quanta Computer Inc.


C47

C89
*0.047U/10V_4X

*0.047U/10V_4X
C162

C156
http://laptop-motherboard-schematic.blogspot.com/
*0.1U/10V_4X

*0.047U/10V_4X Size Document Number


PROJECT : BL6
Rev
A1A
DDR3 DIMM-0
Date: Thursday, April 08, 2010 Sheet 12 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

H=8 +1.5VSUS H=8


JDIM2A M_B_DQ[63:0] {4} JDIM2B
{4} M_B_A[15:0]
M_B_A0 98 5 M_B_DQ0 75 44
M_B_A1 A0 DQ0 M_B_DQ1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_B_A2 96 15 M_B_DQ2 81 49
M_B_A3 A2 DQ2 M_B_DQ3 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ4 87 55
A
M_B_A5 A4 DQ4 M_B_DQ5 VDD5 VSS20 A
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ6 93 61
M_B_A7 A6 DQ6 M_B_DQ7 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 89 21 M_B_DQ8 99 66
M_B_A9 A8 DQ8 M_B_DQ9 VDD9 VSS24
85 A9 DQ9 23 100 VDD10 VSS25 71
M_B_A10 107 33 M_B_DQ10 105 72
M_B_A11 A10/AP DQ10 M_B_DQ11 VDD11 VSS26
84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 M_B_DQ12

PC2100 DDR3 SDRAM SO-DIMM


83 A12/BC# DQ12 22 111 VDD13 VSS28 128
M_B_A13 119 24 M_B_DQ13 112 133
M_B_A14 A13 DQ13 M_B_DQ14 VDD14 VSS29
80 A14 DQ14 34 117 VDD15 VSS30 134
M_B_A15 78 36 M_B_DQ15 118 138
A15 DQ15 M_B_DQ16 VDD16 VSS31
DQ16 39 123 VDD17 VSS32 139

PC2100 DDR3 SDRAM SO-DIMM


{4} M_B_BS#0 109 41 M_B_DQ17 124 144
BA0 DQ17 M_B_DQ18 VDD18 VSS33
{4} M_B_BS#1 108 BA1 DQ18 51 VSS34 145
{4} M_B_BS#2 79 53 M_B_DQ19 199 150
BA2 DQ19 +3V VDDSPD VSS35
{4} M_B_CS#0 114 40 M_B_DQ20 151
S0# DQ20 M_B_DQ21 VSS36
{4} M_B_CS#1 121 S1# DQ21 42 77 NC1 VSS37 155
{4} M_B_CLKP0 101 50 M_B_DQ22 122 156
CK0 DQ22 M_B_DQ23 NC2 VSS38
{4} M_B_CLKN0 103 CK0# DQ23 52 125 NCTEST VSS39 161
{4} M_B_CLKP1 102 57 M_B_DQ24 162
CK1 DQ24 M_B_DQ25 VSS40
{4} M_B_CLKN1 104 CK1# DQ25 59 {3} PM_EXTTS#1 198 EVENT# VSS41 167
{4} M_B_CKE0 73 67 M_B_DQ26 {3,12} DDR3_DRAMRST# 30 168
CKE0 DQ26 M_B_DQ27 RESET# VSS42
{4} M_B_CKE1 74 CKE1 DQ27 69 VSS43 172
{4} M_B_CAS# 115 56 M_B_DQ28 173
CAS# DQ28 M_B_DQ29 R4 *0_6 SMDDR_VREF_DQ1 VSS44
{4} M_B_RAS# 110 RAS# DQ29 58 {6} DDR_VREF_DQ1
1 VREF_DQ VSS45 178
{4} M_B_WE# 113 68 M_B_DQ30 126 179
R77 10K/F_4 DIMM1_SA0 197 W E# DQ30 M_B_DQ31 {12} SMDDR_VREF_DIMM VREF_CA VSS46
SA0 DQ31 70 VSS47 184
+3V R83 10K/F_4 DIMM1_SA1 201 129 M_B_DQ32 185
SA1 DQ32 M_B_DQ33 R5 VSS48
{2,12,24} CGCLK_SMB 202 SCL DQ33 131 2 VSS1 VSS49 189
B {2,12,24} CGDAT_SMB 200 141 M_B_DQ34 *4C@100K_4 3 190 B
SDA DQ34 M_B_DQ35 VSS2 VSS50
DQ35 143 8 VSS3 VSS51 195
116 130 M_B_DQ36 9 196

(204P)
{4} M_B_ODT0 ODT0 DQ36 VSS4 VSS52
{4} M_B_ODT1 120 132 M_B_DQ37 13
ODT1 DQ37 M_B_DQ38 VSS5
{4} M_B_DM[7:0] DQ38 140 14 VSS6
M_B_DM0 11 142 M_B_DQ39 19
M_B_DM1 DM0 DQ39 M_B_DQ40 VSS7
28 DM1 DQ40 147 20 VSS8
M_B_DM2 46 149 M_B_DQ41 25
M_B_DM3 DM2 DQ41 M_B_DQ42 VSS9
63 157 26 203
(204P)

DM3 DQ42 VSS10 VTT1 +SMDDR_VTERM


M_B_DM4 136 159 M_B_DQ43 31 204
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_B_DM6 170 148 M_B_DQ45 37
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS13
187 DM7 DQ46 158 38 VSS14
160 M_B_DQ47 43

GND

GND
{4} M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ48
M_B_DQSP1 DQS0 DQ48 M_B_DQ49
29 DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ50 DDRRK-20401-TP8D

205

206
M_B_DQSP3 DQS2 DQ50 M_B_DQ51
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ52
M_B_DQSP5 DQS4 DQ52 M_B_DQ53
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ54
M_B_DQSP7 DQS6 DQ54 M_B_DQ55
{4} M_B_DQSN[7:0] 188 DQS7 DQ55 176
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 DQS#0 DQ56 M_B_DQ57
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ58
M_B_DQSN3 DQS#2 DQ58 M_B_DQ59
62 DQS#3 DQ59 193
M_B_DQSN4 135 180 M_B_DQ60
M_B_DQSN5 DQS#4 DQ60 M_B_DQ61
152 DQS#5 DQ61 182
M_B_DQSN6 169 192 M_B_DQ62
M_B_DQSN7 DQS#6 DQ62 M_B_DQ63
C
186 DQS#7 DQ63 194 C

DDRRK-20401-TP8D

Place these Caps near So-Dimm1.

+1.5VSUS SMDDR_VREF_DIMM +SMDDR_VTERM

C87 4.7U/6.3V_6X C121 0.1U/10V_4X C176 1U/6.3V_4X


+1.5VSUS
C48 4.7U/6.3V_6X C123 2.2U/6.3V_6X C187 1U/6.3V_4X

C56 4.7U/6.3V_6X C122 *0.047U/10V_4X C175 1U/6.3V_4X

C83 4.7U/6.3V_6X C188 1U/6.3V_4X R3 +1.5VSUS


1K/F_4
C88 4.7U/6.3V_6X SMDDR_VREF_DQ1 C190 *10U/6.3V_8X
SMDDR_VREF_DQ1
C64 4.7U/6.3V_6X C31 0.1U/10V_4X C185 4.7U/6.3V_6X

D C52 0.1U/10V_4X C27 2.2U/6.3V_6X C180 4.7U/6.3V_6X + C580 D


R2 C24 C33
C66 0.1U/10V_4X C177 *0.047U/10V_4X 1K/F_4 0.1U/10V_4X *0.047U/10V_4X *330U/2.5V_7343P_E9a

C44 0.1U/10V_4X +3V C178 *0.047U/10V_4X

C78 0.1U/10V_4X C163 2.2U/6.3V_6X

C45 0.1U/10V_4X C169 *0.1U/10V_4X


Quanta Computer Inc.
C97

C75
*0.047U/10V_4X

*0.047U/10V_4X
C164 *0.047U/10V_4X http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
A1A
DDR3 DIMM-1
Date: Thursday, April 08, 2010 Sheet 13 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

+'0,/HYHO6KLIW +'0,''& +3V

+3V U23
R225 R228 R474 R489
{7} TMDSD_DATA1 TMDSD_DATA1 39
IN_D+ OUT_D1+
22 HDMITX1P C3A
TMDSD_DATA1# HDMITX1N IHM@2.2K_4 IHM@2.2K_4 EHM@4.7K_4 EHM@4.7K_4
+3V R614
{7} TMDSD_DATA1# 38
IN_D1- OUT_D1-
23 Port D Enable
{7} TMDSD_DATA2 TMDSD_DATA2 42 19 HDMITX2P SDVO_CTRLCLK
IHM@10K_4 TMDSD_DATA2# IN_D2+ OUT_D2+ HDMITX2N SDVO_CTRLDATA
{7} TMDSD_DATA2# 41 20
IN_D2- OUT_D2- EV_HDMI_DDCCK
{7} TMDSD_DATA0 TMDSD_DATA0 45 16 HDMITX0P EV_HDMI_DDCDAT
R553 R551 OE# TMDSD_DATA0# IN_D3+ OUT_D3+ HDMITX0N
{7} TMDSD_DATA0# 44 17
IN_D3- OUT_D3-

3
IHM@1.5K/F_4 *IHM@1.5K/F_4 {7} TMDSD_CLK TMDSD_CLK 48 13 HDMICLK+
TMDSD_CLK# IN_D4+ OUT_D4+ HDMICLK-
{7} TMDSD_CLK# 47 14
D R612 IN_D4- OUT_D4- D
HDMI_LF_HPOUT 2 Q56 {7} SDVO_CTRLCLK SDVO_CTRLCLK 9 28 HDMI_CON_DDCCLK
*IHM@10K_4 SDVO_CTRLDATA SCL SCL_SINK HDMI_CON_DDCDATA
IHM@2N7002_200MA {7} SDVO_CTRLDATA 8 29
TMDSD_CLK SDA SDA_SINK
TMDSD_CLK# HDMI_LF_HPOUT 7 30 HDMI_CON_HP
HPD HPD_SINK

1
2 +3V
VCC[1]
11
OE# VCC[2]
25 15
OE# VCC[3]
VCC[4]
21 0.1A(20mils)
DDC_EN +3V
32 26
DDC_EN VCC[5]
33
OC_3 VCC[6]
10 40
+3V
C3A +3V
NC(OC_3) VCC[7]
VCC[8]
46

SR0 3
B2A SR1 4
SR0
SR1 GND[1]
1
R594 *IHM@10K_4 SR0 R486 IHM@4.7K_4 DDC_EN 5
OC_2 GND[2]
6 12
R555 *IHM@0_4 R499 *IHM@4.7K_4 NC(OC_2) GND[3]
18
GND[4]
27 24
R580 *IHM@10K_4 SR1 GND GND[5]
31

2
R501 *IHM@4.7K_4 OE# GND[6] Q51
36
R556 *IHM@0_4 EQ_0 GND[7]
34 37
EQ_1 NC(EQ_0) GND[8] HDMI_CON_DDCDATA
35 43 3 1 EV_HDMI_DDCDAT {16}
R500 *IHM@4.7K_4 NC(EQ_1) GND[9]
49
GND[10] C3A
IHM@PI3VDP411LSRZBE EHM@FDV301N_200MA
R169 *EHM@0_4
C3A +3V

2
Slew Rate Control Function Q45
Reserve C3A E3A
SR1 SR0 Rise/Fall Time HDMI_CON_DDCCLK 3 1 EV_HDMI_DDCCK {16}
R557 IHM@3.9K/F_4 OC_2
1 1 140ps C751 C729 C746 C730 C3A
R558 *IHM@0_4 OC_3 EHM@FDV301N_200MA
1 0 130ps IHM@0.1U/16V_4Y IHM@0.01U/25V_4X IHM@0.1U/16V_4Y IHM@0.01U/25V_4X R163 *EHM@0_4
R498 *IHM@0_4 EQ_0
0 1 120ps R505 *IHM@0_4 EQ_1

C
0 0 110ps C

'LVFUHWH+'0, +'0,+3' +3V

C404 EHM@0.1U/10V_4X HDMITX2P


{16} EXT_HDMITX2P
C399 EHM@0.1U/10V_4X HDMITX2N
{16} EXT_HDMITX2N

2
C394 EHM@0.1U/10V_4X HDMITX1P HDMI_LF_HPOUT R603 *SHORT_4 3 1 Port-D_HPD
{16} EXT_HDMITX1P Port-D_HPD {7}
C382 EHM@0.1U/10V_4X HDMITX1N
{16} EXT_HDMITX1N C3A
Q58
{16} EXT_HDMITX0P
C412 EHM@0.1U/10V_4X HDMITX0P IHM@2N7002_200MA C3A
C408 EHM@0.1U/10V_4X HDMITX0N R598 R617
{16} EXT_HDMITX0N
IHM@100K_4 IHM@100K_4

C427 EHM@0.1U/10V_4X HDMICLK+


{16} EXT_HDMICLK+
C420 EHM@0.1U/10V_4X HDMICLK-
{16} EXT_HDMICLK-
+3V

3
R210 R212 R191 R206 R171 R176 R183 R189 2 R564 EHM@200K_4 HDMI_CON_HP
+5V
3

EHM@499/F_4 EHM@499/F_4 EHM@499/F_4 EHM@499/F_4 EHM@499/F_4 EHM@499/F_4 EHM@499/F_4 EHM@499/F_4

1
Q53
EXT_HDMI_HPD R561
2 {16} EXT_HDMI_HPD EHM@MMBT3904-7-F_200MA *EHM@200K_4

Q18 R584
EHM@2N7002_200MA
EV@10K_4
1

R161
EHM@100K_4

B B

Close to HDMI CONN

ESD2
HDMITX0P RN34 2 1 IEHM@0X2 HDMITX0P_R HDMITX0P_R 1 10 +'0,7;3B5
HDMITX0N HDMITX0N_R HDMITX0N_R 1 10 +'0,7;1B5
4 3 2 9
2 9 CN19
3 8
HDMITX2P RN35 IEHM@0X2 HDMITX2P_R HDMITX2P_R VCC GND +'0,7;3B5
2 1 4 7 20
HDMITX2N HDMITX2N_R HDMITX2N_R 4 7 +'0,7;1B5 HDMITX2P_R SHELL1
4 3 5 6 1
5 6 D2+
2
*IEHM@CM1213-04MR HDMITX2N_R D2 Shield
3
HDMITX1P_R D2-
4
D1+
5
HDMITX1N_R D1 Shield
6
C3A HDMITX0P_R 7
D1-
D0+
8
HDMITX0N_R D0 Shield
9 23
HDMICLK+_R D0- GND
10
CK+
11 22
ESD1 HDMICLK-_R CK Shield GND
12
HDMITX1P RN36 IEHM@0X2 HDMITX1P_R HDMITX1P_R +'0,7;3B5 +5V CK-
2 1 1 10 13
HDMITX1N HDMITX1N_R HDMITX1N_R 1 10 +'0,7;1B5 CE Remote
4 3 2 9 14
2 9 R581 IEHM@2.2K_4 HDMI_CON_DDCCLK NC
3 8 15
HDMICLK+ HDMICLK+_R HDMI_CON_DDCCLK VCC GND HDMI_CON_DDCCLK R595 IEHM@2.2K_4 HDMI_CON_DDCDATA DDC CLK
2 1 4 7 16
HDMICLK- HDMICLK-_R HDMI_CON_DDCDATA 4 7 HDMI_CON_DDCDATA DDC DATA
3 4 5 6 17
5 6 DDC5V GND
18
RN37 IEHM@DLP11SN900HL2L_150MA *IEHM@CM1213-04MR HDMI_CON_HP +5V
19
HP DET
21
A
E3A SHELL2
A
IEHM@C12826-11905-L

ESD3
+5V HDMICLK+_R 1 10 +'0,&/.B5
D3A 30mils HDMICLK-_R 2
1
2
10
9
9 +'0,&/.B5
3 8
F3 IEHM@NANOSMDC110F-2 D33 VCC GND
2 1 IEHM@RSX101M-30_1A DDC5V 4 7 DDC5V
HDMI_CON_HP 4 7 HDMI_CON_HP
5 6
E3A 5 6

C774

*IEHM@10U/6.3V_8X
http://laptop-motherboard-schematic.blogspot.com/
C421

IEHM@0.1U/16V_4Y
*IEHM@CM1213-04MR
Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
A1A
HDMI CONN
Date: Saturday, April 10, 2010 Sheet 14 of 45
5 4 3 2 1
5 4 3 2 1

U20A PEG_TXP[0..15] PEG_RXP[0..15]


{3} PEG_TXP[0..15] {3} PEG_RXP[0..15]
PEG_TXN[0..15] PEG_RXN[0..15]
{3} PEG_TXN[0..15] {3} PEG_RXN[0..15]

PEG_TXP0 AA38 Y33 CPEG_RXP0 C200 EV@0.1U/10V_4X


{3} PEG_TXP0 PCIE_RX0P PCIE_TX0P PEG_RXP0 {3}
PEG_TXN0 Y37 Y32 CPEG_RXN0 C201 EV@0.1U/10V_4X
{3} PEG_TXN0 PCIE_RX0N PCIE_TX0N PEG_RXN0 {3}
D D
PEG_TXP1 Y35 W33 CPEG_RXP1 C228 EV@0.1U/10V_4X
{3} PEG_TXP1 PCIE_RX1P PCIE_TX1P PEG_RXP1 {3}
PEG_TXN1 W36 W32 CPEG_RXN1 C229 EV@0.1U/10V_4X
{3} PEG_TXN1 PCIE_RX1N PCIE_TX1N PEG_RXN1 {3}

PEG_TXP2 W38 U33 CPEG_RXP2 C230 EV@0.1U/10V_4X


{3} PEG_TXP2 PCIE_RX2P PCIE_TX2P PEG_RXP2 {3}
PEG_TXN2 V37 U32 CPEG_RXN2 C231 EV@0.1U/10V_4X
{3} PEG_TXN2 PCIE_RX2N PCIE_TX2N PEG_RXN2 {3}

PEG_TXP3 V35 U30 CPEG_RXP3 C233 EV@0.1U/10V_4X


{3} PEG_TXP3 PCIE_RX3P PCIE_TX3P PEG_RXP3 {3}
PEG_TXN3 U36 U29 CPEG_RXN3 C232 EV@0.1U/10V_4X
{3} PEG_TXN3 PCIE_RX3N PCIE_TX3N PEG_RXN3 {3}

PEG_TXP4 U38 T33 CPEG_RXP4 C234 EV@0.1U/10V_4X


{3} PEG_TXP4 PCIE_RX4P PCIE_TX4P PEG_RXP4 {3}
PEG_TXN4 T37 T32 CPEG_RXN4 C235 EV@0.1U/10V_4X
{3} PEG_TXN4 PCIE_RX4N PCIE_TX4N PEG_RXN4 {3}

PCI EXPRESS INTERFACE


PEG_TXP5 T35 T30 CPEG_RXP5 C203 EV@0.1U/10V_4X
{3} PEG_TXP5 PCIE_RX5P PCIE_TX5P PEG_RXP5 {3}
PEG_TXN5 R36 T29 CPEG_RXN5 C202 EV@0.1U/10V_4X
{3} PEG_TXN5 PCIE_RX5N PCIE_TX5N PEG_RXN5 {3}

PEG_TXP6 R38 P33 CPEG_RXP6 C236 EV@0.1U/10V_4X


{3} PEG_TXP6 PCIE_RX6P PCIE_TX6P PEG_RXP6 {3}
PEG_TXN6 P37 P32 CPEG_RXN6 C237 EV@0.1U/10V_4X
{3} PEG_TXN6 PCIE_RX6N PCIE_TX6N PEG_RXN6 {3}
C C

PEG_TXP7 P35 P30 CPEG_RXP7 C209 EV@0.1U/10V_4X


{3} PEG_TXP7 PCIE_RX7P PCIE_TX7P PEG_RXP7 {3}
PEG_TXN7 N36 P29 CPEG_RXN7 C210 EV@0.1U/10V_4X
{3} PEG_TXN7 PCIE_RX7N PCIE_TX7N PEG_RXN7 {3}

PEG_TXP8 N38 N33 CPEG_RXP8 C238 EV@0.1U/10V_4X


{3} PEG_TXP8 PCIE_RX8P PCIE_TX8P PEG_RXP8 {3}
PEG_TXN8 M37 N32 CPEG_RXN8 C239 EV@0.1U/10V_4X
{3} PEG_TXN8 PCIE_RX8N PCIE_TX8N PEG_RXN8 {3}

PEG_TXP9 M35 N30 CPEG_RXP9 C204 EV@0.1U/10V_4X


{3} PEG_TXP9 PCIE_RX9P PCIE_TX9P PEG_RXP9 {3}
PEG_TXN9 L36 N29 CPEG_RXN9 C205 EV@0.1U/10V_4X
{3} PEG_TXN9 PCIE_RX9N PCIE_TX9N PEG_RXN9 {3}

PEG_TXP10 L38 L33 CPEG_RXP10 C240 EV@0.1U/10V_4X


{3} PEG_TXP10 PCIE_RX10P PCIE_TX10P PEG_RXP10 {3}
PEG_TXN10 K37 L32 CPEG_RXN10 C241 EV@0.1U/10V_4X
{3} PEG_TXN10 PCIE_RX10N PCIE_TX10N PEG_RXN10 {3}

PEG_TXP11 K35 L30 CPEG_RXP11 C207 EV@0.1U/10V_4X


{3} PEG_TXP11 PCIE_RX11P PCIE_TX11P PEG_RXP11 {3}
PEG_TXN11 J36 L29 CPEG_RXN11 C208 EV@0.1U/10V_4X
{3} PEG_TXN11 PCIE_RX11N PCIE_TX11N PEG_RXN11 {3}

PEG_TXP12 J38 K33 CPEG_RXP12 C206 EV@0.1U/10V_4X


{3} PEG_TXP12 PCIE_RX12P PCIE_TX12P PEG_RXP12 {3}
PEG_TXN12 H37 K32 CPEG_RXN12 C199 EV@0.1U/10V_4X
{3} PEG_TXN12 PCIE_RX12N PCIE_TX12N PEG_RXN12 {3}
B B

PEG_TXP13 H35 J33 CPEG_RXP13 C224 EV@0.1U/10V_4X


{3} PEG_TXP13 PCIE_RX13P PCIE_TX13P PEG_RXP13 {3}
PEG_TXN13 G36 J32 CPEG_RXN13 C225 EV@0.1U/10V_4X
{3} PEG_TXN13 PCIE_RX13N PCIE_TX13N PEG_RXN13 {3}

PEG_TXP14 G38 K30 CPEG_RXP14 C226 EV@0.1U/10V_4X


{3} PEG_TXP14 PCIE_RX14P PCIE_TX14P PEG_RXP14 {3}
PEG_TXN14 F37 K29 CPEG_RXN14 C227 EV@0.1U/10V_4X
{3} PEG_TXN14 PCIE_RX14N PCIE_TX14N PEG_RXN14 {3}

PEG_TXP15 F35 H33 CPEG_RXP15 C198 EV@0.1U/10V_4X


{3} PEG_TXP15 PCIE_RX15P PCIE_TX15P PEG_RXP15 {3}
PEG_TXN15 E37 H32 CPEG_RXN15 C197 EV@0.1U/10V_4X
{3} PEG_TXN15 PCIE_RX15N PCIE_TX15N PEG_RXN15 {3}

CLOCK
{8} CLK_PCIE_VGA AB35 PCIE_REFCLKP
{8} CLK_PCIE_VGA# AA36 PCIE_REFCLKN
For M97 only Madison and Park the PWRGOOD ball
CALIBRATION
is for test purposes and must be conneccted to ground R119 EV@1.27K/F_4
AJ21 NC#1 PCIE_CALRP Y30
AK21 NC#2
R509 MP@10K_4 AH16 Y29 R123 EV@2K/F_4
A B2A PWRGOOD PCIE_CALRN +1V_GPU
A

AA30 PERSTB
Ball AH16(PWRGOOD)
M92,M96-->NC Quanta Computer Inc.
Madison,Park-->10K PD.
EV@Madison/Park_M2
PROJECT : BL6
R430 *EV@SHORT_4 Size Document Number Rev
C3A {9} VGA_PLTRST#
Madison/Park-HOST I/F A1A
No stuff when Debug Mode
Date: Saturday, April 10, 2010 Sheet 15 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

B2A
U20B U20G

AU24 LVDS CONTROL AK27


TXCAP_DPA3P EXT_HDMICLK+ {14} VARY_BL EV_LVDS_BRIGHT {23}
AV23 EXT_HDMICLK- {14} AJ27 EV_LVDS_VDDEN {23}
TXCAM_DPA3N DIGON
AT25 EXT_HDMITX0P {14}
MUTI GFX TX0P_DPA2P
AR24
DPA TX0M_DPA2N EXT_HDMITX0N {14} HDMI
AU26 EXT_HDMITX1P {14} AK35
TX1P_DPA1P TXCLK_UP_DPF3P T37
AV25 EXT_HDMITX1N {14} AL36
TX1M_DPA1N TXCLK_UN_DPF3N T38
B2A AR8
DVPCNTL_MVP_0 TX2P_DPA0P
AT27 EXT_HDMITX2P {14} TXOUT_U0P_DPF2P
AJ38
AU8 AR26 AK37 T39
D DVPCNTL_MVP_1 TX2M_DPA0N EXT_HDMITX2N {14} TXOUT_U0N_DPF2N D
NC on Park AP8 T35
DVPCNTL_0
M92,M96,Madison support AW8 AR30 AH35
DVPCNTL_1 TXCBP_DPB3P T43 TXOUT_U1P_DPF1P T4
AR3 AT29 AJ36
DVPCNTL_2 TXCBM_DPB3N T44 TXOUT_U1N_DPF1N T36
AR1
DVPCLK
AU1 AV31 AG38
{22}
{22}
RAM_STRAP0
RAM_STRAP1 AU3
DVPDATA_0
DVPDATA_1 DPB
TX3P_DPB2P
TX3M_DPB2N
AU30 T42 TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AH37 T40 LVDS
AW3 T41 T5
{22} RAM_STRAP2 DVPDATA_2
{22} RAM_STRAP3 AP6 AR32 AF35
DVPDATA_3 TX4P_DPB1P T1 TXOUT_U3P
{22} RAM_STRAP4 AW5 AT31 AG36
DVPDATA_4 TX4M_DPB1N T8 TXOUT_U3N
AU5
DVPDATA_5
AR6 AT33
DVPDATA_6 TX5P_DPB0P T2 LVTMDP
1.8V GPIO AW6
DVPDATA_7 TX5M_DPB0N
AU32
AU6 T7
DVPDATA_8
AT7 AU14 AP34 EV_TXLCLKOUT+ {23}
DVPDATA_9 TXCCP_DPC3P TXCLK_LP_DPE3P
AV7 AV13 AR34 EV_TXLCLKOUT- {23}
DVPDATA_10 TXCCM_DPC3N TXCLK_LN_DPE3N
AN7
DVPDATA_11
AV9 AT15 AW37 EV_TXLOUT0+ {23}
DVPDATA_12 TX0P_DPC2P TXOUT_L0P_DPE2P
AT9 AR14 AU35 EV_TXLOUT0- {23}
DVPDATA_13 TX0M_DPC2N TXOUT_L0N_DPE2N
AR10
DVPDATA_14 DPC
AW10 AU16 AR37 EV_TXLOUT1+ {23}
DVPDATA_15 TX1P_DPC1P TXOUT_L1P_DPE1P
AU10 AV15 AU39
B2A AP10
DVPDATA_16
DVPDATA_17
TX1M_DPC1N
B2A
TXOUT_L1N_DPE1N EV_TXLOUT1- {23}
AV11 AT17 AP35 EV_TXLOUT2+ {23}
DVPDATA_18 TX2P_DPC0P TXOUT_L2P_DPE0P
NC on Park AT11
DVPDATA_19 TX2M_DPC0N
AR16 Park Channel D-->No support TXOUT_L2N_DPE0N
AR35 EV_TXLOUT2- {23}
M92,M96,Madison support AR12 M92 Channel C&D-->No support
DVPDATA_20
AW12 AU20 AN36
DVPDATA_21 TXCDP_DPD3P TXOUT_L3P
AU12 AT19 AP37
DVPDATA_22 TXCDM_DPD3N TXOUT_L3N
AP12
+3V_D DVPDATA_23
AT21
TX3P_DPD2P
AR20
TX3M_DPD2N
DPD AU22
TX4P_DPD1P EV@Madison/Park_M2
AV21
R473 R469 TX4M_DPD1N
SCL must be tied high I2C
EV@10K/F_4 EV@10K/F_4 AT23
if not used TX5P_DPD0P
AR22
TX5M_DPD0N
AK26
SCL
C AJ26 C
SDA
{22} SCL
SYS_SHDN# {22} SDA AD39
SYS_SHDN# {3,35} GENERAL PURPOSE I/O R EXT_CRT_RED {23}
AD37
RB
{22} GPU_GPIO0 AH20
GPIO_0
3

{22} GPU_GPIO1 AH18 AE36 EXT_CRT_GRN {23}


GPIO_1 G
{22} GPU_GPIO2 AN16 AD35
GPIO_2 GB
{22} GPIO3_SMBDAT AH23
VGA_TEMP_FAIL Q46 GPIO_3_SMBDATA
2 AJ23 AF37
*EV@2N7002_200MA
B2A {22} GPIO4_SMBCLK
{22} PWR_PSI# AH17
GPIO_4_SMBCLK
GPIO_5_AC_BATT DAC1
B
BB
AE38
EXT_CRT_BLU {23}

{22} GFX_CORE_CNTRL2 AJ17


GPIO_6 EXT_HSYNC R438 R437 R436
{22,23} LVDS_BLON AK17 AC36 EXT_HSYNC {22,23}
GPIO_7_BLON HSYNC EXT_VSYNC
{22} GPU_GPIO8 AJ13 AC38 EXT_VSYNC {22,23} EV@150/F_4 EV@150/F_4 EV@150/F_4
1

GPIO_8_ROMSO VSYNC
{22} GPU_GPIO9 AH15
GPIO_9_ROMSI
{22} GPU_GPIO10 AJ16
GPIO_10_ROMSCK R105 EV@499/F_4
{22} RAM_CFG0 AK16 AB34
GPIO_11 RSET
{22} RAM_CFG1 AL16
GPIO_12 AVDD
{22} RAM_CFG2 AM16 AD34
T32 GPIO_13 AVDD
AM14 AE34
GPIO_14_HPD2 AVSSQ
{41} GFX_CORE_CNTRL1 AM13
CLK_VGA_27M_SS_R GPIO_15_PWRCNTL_0 VDD1DI
AK14 AC33
GPIO_16_SSIN VDD1DI
AG30 AC34
TjMax = 110
VGA_TEMP_FAIL
C3A {22} ALT#_GPIO17
T29 AN14
GPIO_17_THERMAL_INT
GPIO_18_HPD3
VSS1DI
R478 *EV@SHORT_4 AM17
change by VBIOS GPIO_19_CTF
{41} GFX_CORE_CNTRL0 AL13 AC30
T28 GPIO_20_PWRCNTL_1 R2
AJ14 AC31
R479 GPIO_21_BB_EN R2B
{22} GPU_GPIO22 AK13
EV@10K/F_4 T49 GPIO_22_ROMCSB
AN13 AD30
B2A B2A R724 *EV@10K_4 AM23
GPIO_23_CLKREQB
JTAG_TRSTB
G2
G2B
AD31
M92,M96 GPIO_21 pin T47 AN23
JTAG_TDI
control BB {2} JTAG_TCK AK23 AF30
R723 *EV@10K_4 JTAG_TCK B2
function.Park,Madison no +3V_D AL24 AF31
T15 JTAG_TMS B2B
AM24
CLK_VGA_27M_SS_R suport. T23 JTAG_TDO
JTAG need Option2 for AJ19
GENERICA
T27
Park,Madison Engineer sample. AK19 AC32
R172 T21 GENERICB C
AJ20 AD32
*EV@10K/F_4 T22 GENERICC Y
AK20 AF32
B
B2A T14 AJ24
GENERICD
GENERICE_HPD4 DAC2
COMP
B
M96,Madison-->support AH26
GENERICF
Ball AH26-->HPD5 AH24 AD29 T10
GENERICG H2SYNC
Ball AH24-->HPD6 AC29 V2SYNC {22}
V2SYNC
M92,Park-->No support AK24
HPD1 VDD1DI
AG31
VDD2DI +1.8V_GPU
+1.8V(20mA) VSS2DI
AG32
120 ohm/300mA
+1.8V_GPU L5 EV@BLM15BD121SN1D_300MA TS_VDD (1.8V@70mA AVDD) 120 ohm/300mA
AG33 +3V_D (3.3V@130mA A2VDD) AVDD L4 EV@BLM15BD121SN1D_300MA
+1.8V_GPU {14} EXT_HDMI_HPD A2VDD
C218 C242 C279
AD33 A2VDDQ
EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X A2VDDQ C275 C220 C214 C211
Place close to Chip AH13
VREFG
AF33 EV@0.1U/10V_4X EV@0.1U/10V_4X EV@1U/6.3V_4X EV@10U/6.3V_8X
R514 A2VSSQ
EV@499/F_4
AA29 R121 EV@715/F_4 (1.8V@45mA VDD1DI/ 50mA VFF2D)
VREFG R2SET 120 ohm/300mA
5mA (5mils)
120 ohm/300mA VDD1DI L3 EV@BLM15BD121SN1D_300MA
+1.8V_GPU L12 EV@BLM15BD121SN1D_300MA DPLL_PVDD
R517 C735 DDC/AUX AM26
PLL/CLOCK DDC1CLK EV_HDMI_DDCCK {14}
C265 C267 C268 EV@249/F_4 AN26 C193 C196 C189
EV@0.1U/10V_4X DPLL_PVDD AM32
DPLL_PVDD
DDC1DATA EV_HDMI_DDCDAT {14}
HDMI EV@0.1U/10V_4X EV@1U/6.3V_4X EV@10U/6.3V_8X
EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X AN32 AM27
DPLL_PVSS AUX1P T6
AL27

DPLL_VDDC
AUX1N T13 B2A
AN31 AM19 +1.8V_GPU
C3A DPLL_VDDC DDC2CLK
DDC2DATA
AL19
EV_CRTDCLK
EV_CRTDDAT
{23}
{23} CRT (1.8V@1.5mA A2VDDQ)
120 ohm/300mA
R108 EV@100/F_4 R451 *EV@SHORT_4
{2} 27M_CLK
XTALI_27M AV33 AN20 A2VDDQ L10 EV@BLM15BD121SN1D_300MA
R445 EV@120/F_4 XTALO_27M XTALIN AUX2P T20
AU34
XTALOUT AUX2N
AM20 Port 3
T46 M96,Madison,Park-->support
AL30 T25 C276 C255
C684 *EV@27P/50V_4N DDCCLK_AUX3P T48
M92-->No support *EV@0.1U/10V_4X *EV@1U/6.3V_4X
AM30
DDCDATA_AUX3N
2

R449 *EV@0_4 AL29 Port 4


Y3 R448 R447 *EV@0_4 DDCCLK_AUX4P
AF29 AM29 M96,Madison-->support
A *EV@27MHZ_20 *EV@1M/F_4
{22}
{22}
GPU_D+
GPU_D- AG29
DPLUS
DMINUS
THERMAL DDCDATA_AUX4N
M92,Park-->No support
B2A A
AN21
1

T9 DDCCLK_AUX5P T45
AM21
C682 *EV@27P/50V_4N DDCDATA_AUX5N T18
AK32
TS_VDD TS_FDO
AJ32 AJ30
AJ33
TSVDD
TSVSS
DDC6CLK
DDC6DATA
AJ31
EV_LVDS_DDCCLK
EV_LVDS_DDCDAT
{23}
{23}
LVDS
AK30
NC_DDCCLK_AUX7P T11
AK29 Port7
120 ohm/300mA B2A NC_DDCDATA_AUX7N T3

http://laptop-motherboard-schematic.blogspot.com/
Madison-->support
L14 EV@BLM15BD121SN1D_300MA DPLL_VDDC Madison,Park-->125mA (10mils)
+1V_GPU
M92,M96-->300mA(20mils) B2A M92,M96,Park-->No support Quanta Computer Inc.
C274 C272 C273
EV@Madison/Park_M2
EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X PROJECT : BL6
Size Document Number Rev
A1A
Madison/Park-HOST I/F
Date: Saturday, April 10, 2010 Sheet 16 of 45
5 4 3 2 1
5 4 3 2 1

VMA_DQ[63..0] VMB_DQ[63..0]
{18} VMA_DQ[63..0] {19} VMB_DQ[63..0]
VMA_DM[7..0] VMB_DM[7..0]
{18} VMA_DM[7..0] {19} VMB_DM[7..0]
U20C U20D
VMA_RDQS[7..0] DDR2 DDR2 VMB_RDQS[7..0] DDR2 DDR2
{18} VMA_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3 {19} VMB_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3
VMA_WDQS[7..0] DDR3 DDR3 VMB_WDQS[7..0] DDR3 DDR3
{18} VMA_WDQS[7..0] {19} VMB_WDQS[7..0]
VMA_DQ0 C37 G24 VMA_MA0 VMB_DQ0 C5 P8 VMB_MA0
VMA_DQ1 DQA0_0/DQA_0 MAA0_0/MAA_0 VMA_MA1 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 VMB_MA1
C35 J23 C3 T9

MEMORY INTERFACE A
D
VMA_DQ2 DQA0_1/DQA_1 MAA0_1/MAA_1 VMA_MA2 VMB_MA[13..0] VMB_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1 VMB_MA2 D
A35 H24 E3 P9

MEMORY INTERFACE B
VMA_MA[13..0] DQA0_2/DQA_2 MAA0_2/MAA_2 {19} VMB_MA[13..0] DQB0_2/DQB_2 MAB0_2/MAB_2
VMA_DQ3 E34 J24 VMA_MA3 VMB_DQ3 E1 N7 VMB_MA3
{18} VMA_MA[13..0] DQA0_3/DQA_3 MAA0_3/MAA_3 DQB0_3/DQB_3 MAB0_3/MAB_3
VMA_DQ4 G32 H26 VMA_MA4 VMB_DQ4 F1 N8 VMB_MA4
VMA_DQ5 DQA0_4/DQA_4 MAA0_4/MAA_4 VMA_MA5 VMB_BA0 VMB_DQ5 DQB0_4/DQB_4 MAB0_4/MAB_4 VMB_MA5
D33 J26 {19} VMB_BA0 F3 N9
VMA_BA0 VMA_DQ6 DQA0_5/DQA_5 MAA0_5/MAA_5 VMA_MA6 VMB_BA1 VMB_DQ6 DQB0_5/DQB_5 MAB0_5/MAB_5 VMB_MA6
{18} VMA_BA0 F32 H21 {19} VMB_BA1 F5 U9
VMA_BA1 VMA_DQ7 DQA0_6/DQA_6 MAA0_6/MAA_6 VMA_MA7 VMB_BA2 VMB_DQ7 DQB0_6/DQB_6 MAB0_6/MAB_6 VMB_MA7
{18} VMA_BA1 E32 G21 {19} VMB_BA2 G4 U8
VMA_BA2 VMA_DQ8 DQA0_7/DQA_7 MAA0_7/MAA_7 VMA_MA8 VMB_DQ8 DQB0_7/DQB_7 MAB0_7/MAB_7 VMB_MA8
{18} VMA_BA2 D31 H19 H5 Y9
VMA_DQ9 DQA0_8/DQA_8 MAA1_0/MAA_8 VMA_MA9 VMB_DQ9 DQB0_8/DQB_8 MAB1_0/MAB_8 VMB_MA9
F30 H20 H6 W9
VMA_DQ10 DQA0_9/DQA_9 MAA1_1/MAA_9 VMA_MA10 VMB_DQ10 DQB0_9/DQB_9 MAB1_1/MAB_9 VMB_MA10
C30 L13 J4 AC8
VMA_DQ11 DQA0_10/DQA_10 MAA1_2/MAA_10 VMA_MA11 VMB_DQ11 DQB0_10/DQB_10 MAB1_2/MAB_10 VMB_MA11
A30 G16 K6 AC9
VMA_DQ12 DQA0_11/DQA_11 MAA1_3/MAA_11 VMA_MA12 VMB_DQ12 DQB0_11/DQB_11 MAB1_3/MAB_11 VMB_MA12
F28 J16 K5 AA7
VMA_DQ13 DQA0_12/DQA_12 MAA1_4/MAA_12 VMA_BA2 VMB_DQ13 DQB0_12/DQB_12 MAB1_4/MAB_12 VMB_BA2
C28 H16 L4 AA8
VMA_DQ14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 VMA_BA0 VMB_DQ14 DQB0_13/DQB_13 MAB1_5/BA2 VMB_BA0
A28 J17 M6 Y8
VMA_DQ15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 VMA_BA1 VMB_DQ15 DQB0_14/DQB_14 MAB1_6/BA0 VMB_BA1
E28 H17 M1 AA9
VMA_DQ16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMB_DQ16 DQB0_15/DQB_15 MAB1_7/BA1
D27 M3
VMA_DQ17 DQA0_16/DQA_16 VMA_DM0 VMB_DQ17 DQB0_16/DQB_16 VMB_DM0
F26 A32 M5 H3
VMA_DQ18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMA_DM1 VMB_DQ18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 VMB_DM1
C26 C32 N4 H1
VMA_DQ19 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 VMA_DM2 VMB_DQ19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 VMB_DM2
A26 D23 P6 T3
VMA_DQ20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 VMA_DM3 VMB_DQ20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 VMB_DM3
F24 E22 P5 T5
VMA_DQ21 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 VMA_DM4 VMB_DQ21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 VMB_DM4
C24 C14 R4 AE4
VMA_DQ22 DQA0_21/DQA_21 WCKA1_0/DQMA_4 VMA_DM5 VMB_DQ22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 VMB_DM5
A24 A14 T6 AF5
VMA_DQ23 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 VMA_DM6 VMB_DQ23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 VMB_DM6
E24 E10 T1 AK6
VMA_DQ24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 VMA_DM7 VMB_DQ24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 VMB_DM7
C22 D9 U4 AK5
VMA_DQ25 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 VMB_DQ25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
A22 V6
VMA_DQ26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMA_RDQS0 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
F22 C34 V1 F6
VMA_DQ27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 VMA_RDQS1 VMB_DQ27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 VMB_RDQS1
D21 D29 V3 K3
VMA_DQ28 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 VMA_RDQS2 VMB_DQ28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 VMB_RDQS2
A20 D25 Y6 P3
VMA_DQ29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 VMA_RDQS3 VMB_DQ29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 VMB_RDQS3
F20
DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3
E20 QSA[7..0] Y1
DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3
V5 QSB[7..0]
VMA_DQ30 D19 E16 VMA_RDQS4 VMB_DQ30 Y3 AB5 VMB_RDQS4
VMA_DQ31 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 VMA_RDQS5 VMB_DQ31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 VMB_RDQS5
E18 E12 Y5 AH1
VMA_DQ32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 VMA_RDQS6 VMB_DQ32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 VMB_RDQS6
C18 J10 AA4 AJ9
VMA_DQ33 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 VMA_RDQS7 VMB_DQ33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 VMB_RDQS7
A18 D7 AB6 AM5
VMA_DQ34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 AB1
VMA_DQ35 DQA1_2/DQA_34 VMA_WDQS0 VMB_DQ35 DQB1_2/DQB_34 VMB_WDQS0
D17 A34 AB3 G7
VMA_DQ36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMA_WDQS1 VMB_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMB_WDQS1
A16 E30 AD6 K1
VMA_DQ37 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 VMA_WDQS2 VMB_DQ37 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 VMB_WDQS2
F16 E26 AD1 P1
VMA_DQ38 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 VMA_WDQS3 VMB_DQ38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 VMB_WDQS3
D15
DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3
C20 QSA#[7..0] AD3
DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3
W4 QSB#[7..0]
C VMA_DQ39 E14 C16 VMA_WDQS4 VMB_DQ39 AD5 AC4 VMB_WDQS4 C
VMA_DQ40 DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 VMA_WDQS5 VMB_DQ40 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 VMB_WDQS5
F14 C12 AF1 AH3
VMA_DQ41 DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 VMA_WDQS6 VMB_DQ41 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 VMB_WDQS6
D13 J11 AF3 AJ8
VMA_DQ42 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 VMA_WDQS7 VMB_DQ42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 VMB_WDQS7
F12 F8 AF6 AM3
VMA_DQ43 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 VMB_DQ43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 AG4
VMA_DQ44 DQA1_11/DQA_43 VMB_DQ44 DQB1_11/DQB_43
D11 J21 VMA_ODT0 {18} AH5 T7 VMB_ODT0 {19}
VMA_DQ45 DQA1_12/DQA_44 ADBIA0/ODTA0 VMB_DQ45 DQB1_12/DQB_44 ADBIB0/ODTB0
F10 G19 VMA_ODT1 {18} AH6 W7 VMB_ODT1 {19}
VMA_DQ46 DQA1_13/DQA_45 ADBIA1/ODTA1 VMB_DQ46 DQB1_13/DQB_45 ADBIB1/ODTB1
A10 AJ4
VMA_DQ47 DQA1_14/DQA_46 VMA_CLK0 VMB_DQ47 DQB1_14/DQB_46 VMB_CLK0
C10 H27 VMA_CLK0 {18} AK3 L9 VMB_CLK0 {19}
VMA_DQ48 DQA1_15/DQA_47 CLKA0 VMA_CLK0# VMB_DQ48 DQB1_15/DQB_47 CLKB0 VMB_CLK0#
G13 G27 VMA_CLK0# {18} AF8 L8 VMB_CLK0# {19}
VMA_DQ49 DQA1_16/DQA_48 CLKA0B VMB_DQ49 DQB1_16/DQB_48 CLKB0B
H13 AF9
VMA_DQ50 DQA1_17/DQA_49 VMA_CLK1 VMB_DQ50 DQB1_17/DQB_49 VMB_CLK1
J13 J14 VMA_CLK1 {18} AG8 AD8 VMB_CLK1 {19}
VMA_DQ51 DQA1_18/DQA_50 CLKA1 VMA_CLK1# VMB_DQ51 DQB1_18/DQB_50 CLKB1 VMB_CLK1#
H11 H14 VMA_CLK1# {18} AG7 AD7 VMB_CLK1# {19}
VMA_DQ52 DQA1_19/DQA_51 CLKA1B VMB_DQ52 DQB1_19/DQB_51 CLKB1B
G10 AK9
VMA_DQ53 DQA1_20/DQA_52 VMA_RAS0# VMB_DQ53 DQB1_20/DQB_52 VMB_RAS0#
G8 K23 VMA_RAS0# {18} AL7 T10 VMB_RAS0# {19}
VMA_DQ54 DQA1_21/DQA_53 RASA0B VMA_RAS1# VMB_DQ54 DQB1_21/DQB_53 RASB0B VMB_RAS1#
K9 K19 AM8 Y10
B2A VMA_DQ55 K10
DQA1_22/DQA_54
DQA1_23/DQA_55
RASA1B VMA_RAS1# {18}
VMB_DQ55 AM7
DQB1_22/DQB_54
DQB1_23/DQB_55
RASB1B VMB_RAS1# {19}
VMA_DQ56 G9 K20 VMA_CAS0# VMB_DQ56 AK1 W10 VMB_CAS0#
DQA1_24/DQA_56 CASA0B VMA_CAS0# {18} DQB1_24/DQB_56 CASB0B VMB_CAS0# {19}
+1.5V_GPU VMA_DQ57 A8 K17 VMA_CAS1# VMB_DQ57 AL4 AA10 VMB_CAS1#
DQA1_25/DQA_57 CASA1B VMA_CAS1# {18} DQB1_25/DQB_57 CASB1B VMB_CAS1# {19}
VMA_DQ58 C8 +1.5V_GPU VMB_DQ58 AM6
C3A VMA_DQ59
VMA_DQ60
E8
DQA1_26/DQA_58
DQA1_27/DQA_59 CSA0B_0
K24 VMA_CS0#
VMA_CS0# {18} C3A VMB_DQ59
VMB_DQ60
AM1
DQB1_26/DQB_58
DQB1_27/DQB_59 CSB0B_0
P10 VMB_CS0#
VMB_CS0# {19}
R168 R745 A6 K27 AN4 L10
VMA_DQ61 DQA1_28/DQA_60 CSA0B_1 R748 VMB_DQ61 DQB1_28/DQB_60 CSB0B_1
C6 AP3
VMA_DQ62 DQA1_29/DQA_61 VMA_CS1# VMB_DQ62 DQB1_29/DQB_61 VMB_CS1#
Ra E6
DQA1_30/DQA_62 CSA1B_0
M13 VMA_CS1# {18} AP1
DQB1_30/DQB_62 CSB1B_0
AD10 VMB_CS1# {19}
9X@100/F_4 VMA_DQ63 A5 K16 Ra R194 VMB_DQ63 AP5 AC10
MP@40.2/F_4 Place close to Chip
MVREFDA
DQA1_31/DQA_63 CSA1B_1
VMA_CKE0
MP@40.2/F_4 9X@100/F_4 DQB1_31/DQB_63 CSB1B_1
VMB_CKE0
B2A
L18
MVREFDA CKEA0
K21 VMA_CKE0 {18} Place close to Chip CKEB0
U10 VMB_CKE0 {19} Ball H23,T8
MVREFSA L20 J20 VMA_CKE1 MVREFDB Y12 AA11 VMB_CKE1 M92,M96-M2-->RSVD.Can
MVREFSA CKEA1 VMA_CKE1 {18} MVREFDB CKEB1 VMB_CKE1 {19}
MVREFSB AA12
R125 MP@243/F_4 VMA_WE0# MVREFSB VMB_WE0#
not support 128M*16
L27 K26 VMA_WE0# {18} N10 VMB_WE0# {19}
R162 C369 R187 MP@243/F_4 MEM_CALRN0 WEA0B VMA_WE1# WEB0B VMB_WE1# VMEM
Rb N12
MEM_CALRN1 WEA1B
L15 VMA_WE1# {18} WEB1B
AB11 VMB_WE1# {19}
EV@100/F_4 EV@0.1U/10V_4X R202 M@243/F_4 AG12 Rb R193 C401
MEM_CALRN2 EV@100/F_4 EV@0.1U/10V_4X R428 *EV@10K_4
+1.5V_GPU +3V_D
R204 EV@243/F_4 VMA_MA13 R427 EV@10K_4 VMB_MA13 for Park/Madison 128x16 support
GDDR5

M12 H23 AD28 T8

GDDR5
R128 MP@243/F_4 MEM_CALRP1 MAA0_8 TESTEN MAB0_8
M27 J19 W8
R223 M@243/F_4 AH12
MEM_CALRP0 MAA1_8 CLKTESTA AK10
MAB1_8 [16M x 16 x 8] = 2048MBits
MEM_CALRP2 CLKTESTB CLKTESTA R577 EV@51_4
only for Madison 128x16 support AL10
CLKTESTB DRAM_RST
AH11 MEM_RST# {18,19}
+1.5V_GPU
B
C3A B2A [16M x 16 x 8] = 2048MBits +1.5V_GPU
B

AL31 R627 9X@4.7K_4


R746 RSVD C3A +1.5V_GPU
R747
Ra R156 EV@Madison/Park_M2 C789 R562 C3A
MP@40.2/F_4 9X@100/F_4 EV@Madison/Park_M2 Ra R188 EV@68P/50V_4C
MP@40.2/F_4 9X@100/F_4 C440 C434 MP@10K_4
*EV@0.1U/10V_4X *EV@0.1U/10V_4X
B2A CLKTESTA/CLKTESTB B2A
R221 R215 Differemtial only
Rb R155 C345
Ball Name Madison Park M96 M92 *EV@51.1/F_6 *EV@51.1/F_6 Single 50 ohm
EV@100/F_4 EV@0.1U/10V_4X Rb R182 C398 Diff 100 ohm
EV@100/F_4 EV@0.1U/10V_4X
MVREFDA V V V V
MVREFSA V V V V
DDR3/GDDR3 Memory Stuff Option
Madsion/Park GDDR3 DDR3 MVREFDB V V V V
MVDDQ 1.8V/1.5 1.5V
Ra 40.2R 40.2R
MVREFSB V V V V
Rb 100R 100R
TESTEN Description
MEM_CALRN0 V V Internal Debug use only
0
MEM_CALRN1 V V 1 JTAG signals enable

M96/M92 GDDR3 DDR3 MEM_CALRN2 V


MVDDQ 1.8V/1.5 1.5V
Ra 40.2R 100R
MEM_CALRP0 V V
A A
Rb 100R 100R MEM_CALRP1 V V V V

C3A MEM_CALRP2 V

http://laptop-motherboard-schematic.blogspot.com/ Quanta Computer Inc.


PROJECT : BL6
Size Document Number Rev
A1A
Madison/Park-MEM I/F
Date: Saturday, April 10, 2010 Sheet 17 of 45
5 4 3 2 1
5 4 3 2 1

VMA_DQ[63..0]

CHANNEL A: 512MB DDR3 (64M*16*4pcs)


{17} VMA_DQ[63..0]
VMA_DM[7..0]
{17} VMA_DM[7..0]
VMA_RDQS[7..0] QSA[7..0]
{17} VMA_RDQS[7..0]
VMA_WDQS[7..0] QSA#[7..0]
{17} VMA_WDQS[7..0]
VMA_MA[13..0] U6 U19 U9 U22
{17} VMA_MA[13..0]
VREFC_VMA1 M8 E3 VMA_DQ30 VREFC_VMA2 M8 E3 VMA_DQ19 VREFC_VMA3 M8 E3 VMA_DQ38 VREFC_VMA4 M8 E3 VMA_DQ57
VREFD_VMA1 VREFCA DQL0 VMA_DQ27 VREFD_VMA2 VREFCA DQL0 VMA_DQ22 VREFD_VMA3 VREFCA DQL0 VMA_DQ34 VREFD_VMA4 VREFCA DQL0 VMA_DQ60
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 VMA_DQ29 VREFDQ DQL1 VMA_DQ18 VREFDQ DQL1 VMA_DQ36 VREFDQ DQL1 VMA_DQ58
F2 F2 F2 F2
VMA_MA0 DQL2 VMA_DQ26 VMA_MA0 DQL2 VMA_DQ21 VMA_MA0 DQL2 VMA_DQ35 VMA_MA0 DQL2 VMA_DQ62
{17} VMA_MA0 N3 F8 N3 F8 N3 F8 N3 F8
VMA_MA1 A0 DQL3 VMA_DQ28 VMA_MA1 A0 DQL3 VMA_DQ16 VMA_MA1 A0 DQL3 VMA_DQ39 VMA_MA1 A0 DQL3 VMA_DQ56
{17} VMA_MA1 P7 H3 P7 H3 P7 H3 P7 H3
VMA_MA2 A1 DQL4 VMA_DQ24 VMA_MA2 A1 DQL4 VMA_DQ20 VMA_MA2 A1 DQL4 VMA_DQ32 VMA_MA2 A1 DQL4 VMA_DQ63
{17} VMA_MA2 P3 H8 P3 H8 P3 H8 P3 H8
VMA_MA3 A2 DQL5 VMA_DQ31 VMA_MA3 A2 DQL5 VMA_DQ17 VMA_MA3 A2 DQL5 VMA_DQ37 VMA_MA3 A2 DQL5 VMA_DQ59
{17} VMA_MA3 N2 G2 N2 G2 N2 G2 N2 G2
D
VMA_MA4 A3 DQL6 VMA_DQ25 VMA_MA4 A3 DQL6 VMA_DQ23 VMA_MA4 A3 DQL6 VMA_DQ33 VMA_MA4 A3 DQL6 VMA_DQ61 D
{17} VMA_MA4 P8 H7 P8 H7 P8 H7 P8 H7
VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7
{17} VMA_MA5 P2 P2 P2 P2
VMA_MA6 A5 VMA_MA6 A5 VMA_MA6 A5 VMA_MA6 A5
{17} VMA_MA6 R8 R8 R8 R8
VMA_MA7 A6 VMA_DQ12 VMA_MA7 A6 VMA_DQ4 VMA_MA7 A6 VMA_DQ51 VMA_MA7 A6 VMA_DQ43
{17} VMA_MA7 R2 D7 R2 D7 R2 D7 R2 D7
VMA_MA8 A7 DQU0 VMA_DQ15 VMA_MA8 A7 DQU0 VMA_DQ3 VMA_MA8 A7 DQU0 VMA_DQ50 VMA_MA8 A7 DQU0 VMA_DQ44
{17} VMA_MA8 T8 C3 T8 C3 T8 C3 T8 C3
VMA_MA9 A8 DQU1 VMA_DQ8 VMA_MA9 A8 DQU1 VMA_DQ7 VMA_MA9 A8 DQU1 VMA_DQ49 VMA_MA9 A8 DQU1 VMA_DQ40
{17} VMA_MA9 R3 C8 R3 C8 R3 C8 R3 C8
VMA_MA10 A9 DQU2 VMA_DQ13 VMA_MA10 A9 DQU2 VMA_DQ0 VMA_MA10 A9 DQU2 VMA_DQ48 VMA_MA10 A9 DQU2 VMA_DQ42
{17} VMA_MA10 L7 C2 L7 C2 L7 C2 L7 C2
VMA_MA11 A10/AP DQU3 VMA_DQ10 VMA_MA11 A10/AP DQU3 VMA_DQ5 VMA_MA11 A10/AP DQU3 VMA_DQ55 VMA_MA11 A10/AP DQU3 VMA_DQ45
{17} VMA_MA11 R7 A7 R7 A7 R7 A7 R7 A7
VMA_MA12 A11 DQU4 VMA_DQ11 VMA_MA12 A11 DQU4 VMA_DQ1 VMA_MA12 A11 DQU4 VMA_DQ54 VMA_MA12 A11 DQU4 VMA_DQ46
{17} VMA_MA12 N7 A2 N7 A2 N7 A2 N7 A2
VMA_MA13 A12/BC DQU5 VMA_DQ9 VMA_MA13 A12/BC DQU5 VMA_DQ6 VMA_MA13 A12/BC DQU5 VMA_DQ52 VMA_MA13 A12/BC DQU5 VMA_DQ41
{17} VMA_MA13 T3 B8 T3 B8 T3 B8 T3 B8
A13 DQU6 VMA_DQ14 A13 DQU6 VMA_DQ2 A13 DQU6 VMA_DQ53 A13 DQU6 VMA_DQ47
T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU

VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2


{17} VMA_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA1 N8 D9
{17} VMA_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7
{17} VMA_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 VDD#K2 VDD#K2 VDD#K2
K8 K8 K8 K8
VDD#K8 VDD#K8 VDD#K8 VDD#K8
N1 N1 N1 N1
VMA_CLK0 VDD#N1 VMA_CLK0 VDD#N1 VMA_CLK1 VDD#N1 VMA_CLK1 VDD#N1
{17} VMA_CLK0 J7 N9 J7 N9 {17} VMA_CLK1 J7 N9 J7 N9
VMA_CLK0# CK VDD#N9 VMA_CLK0# CK VDD#N9 VMA_CLK1# CK VDD#N9 VMA_CLK1# CK VDD#N9
{17} VMA_CLK0# K7 R1 K7 R1 {17} VMA_CLK1# K7 R1 K7 R1
VMA_CKE0 CK VDD#R1 VMA_CKE0 CK VDD#R1 VMA_CKE1 CK VDD#R1 VMA_CKE1 CK VDD#R1
{17} VMA_CKE0 K9 R9 K9 R9 {17} VMA_CKE1 K9 R9 K9 R9
CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU

VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_ODT1 K1 A1 VMA_ODT1 K1 A1


{17} VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 {17} VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_CS0# L2 A8 VMA_CS0# L2 A8 VMA_CS1# L2 A8 VMA_CS1# L2 A8
{17} VMA_CS0# CS VDDQ#A8 CS VDDQ#A8 {17} VMA_CS1# CS VDDQ#A8 CS VDDQ#A8
VMA_RAS0# J3 C1 VMA_RAS0# J3 C1 VMA_RAS1# J3 C1 VMA_RAS1# J3 C1
{17} VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 {17} VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMA_CAS0# K3 C9 VMA_CAS0# K3 C9 VMA_CAS1# K3 C9 VMA_CAS1# K3 C9
{17} VMA_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 {17} VMA_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMA_WE0# L3 D2 VMA_WE0# L3 D2 VMA_WE1# L3 D2 VMA_WE1# L3 D2
{17} VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 {17} VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 VDDQ#E9 VDDQ#E9 VDDQ#E9
F1 F1 F1 F1
VMA_RDQS3 VDDQ#F1 VMA_RDQS2 VDDQ#F1 VMA_RDQS4 VDDQ#F1 VMA_RDQS7 VDDQ#F1
F3 H2 F3 H2 F3 H2 F3 H2
VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS0 DQSL VDDQ#H2 VMA_RDQS6 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9

VMA_DM3 E7 A9 VMA_DM2 E7 A9 VMA_DM4 E7 A9 VMA_DM7 E7 A9


VMA_DM1 DML VSS#A9 VMA_DM0 DML VSS#A9 VMA_DM6 DML VSS#A9 VMA_DM5 DML VSS#A9
C D3 B3 D3 B3 D3 B3 D3 B3 C
DMU VSS#B3 DMU VSS#B3 DMU VSS#B3 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 VSS#E1 VSS#E1 VSS#E1
G8 G8 G8 G8
VMA_WDQS3 VSS#G8 VMA_WDQS2 VSS#G8 VMA_WDQS4 VSS#G8 VMA_WDQS7 VSS#G8
G3 J2 G3 J2 G3 J2 G3 J2
VMA_WDQS1 DQSL VSS#J2 VMA_WDQS0 DQSL VSS#J2 VMA_WDQS6 DQSL VSS#J2 VMA_WDQS5 DQSL VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 VSS#M1 VSS#M1 VSS#M1
M9 M9 M9 M9
VSS#M9 VSS#M9 VSS#M9 VSS#M9
P1 P1 P1 P1
MEM_RST# VSS#P1 MEM_RST# VSS#P1 MEM_RST# VSS#P1 MEM_RST# VSS#P1
T2 P9 T2 P9 T2 P9 T2 P9
{17,19} MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
VMA_ZQ1 VSS#T1 VMA_ZQ2 VSS#T1 VMA_ZQ3 VSS#T1 VMA_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

B1 B1 B1 B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
B9 B9 B9 B9
R113 VSSQ#B9 R472 VSSQ#B9 R151 VSSQ#B9 R516 VSSQ#B9
D1 D1 D1 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
MEV@243/F_4 D8 MEV@243/F_4 D8 MEV@243/F_4 D8 EV@243/F_4 D8
VSSQ#D8 VSSQ#D8 VSSQ#D8 VSSQ#D8
E2 E2 E2 E2
VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 F9 L1 F9 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 J9 G1 J9 G1 J9 G1
NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
L9 G9 L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
MEV@VRAM _DDR3 MEV@VRAM _DDR3 MEV@VRAM _DDR3 MEV@VRAM _DDR3

TOP Left BOT Left BOT Right TOP Right


Group-A0 VREF Group-A1 VREF
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

B B

R124 R138 R477 R452 R166 R179 R497 R507


MEV@4.99K/F_4 MEV@4.99K/F_4 MEV@4.99K/F_4 MEV@4.99K/F_4 MEV@4.99K/F_4 MEV@4.99K/F_4 MEV@4.99K/F_4 MEV@4.99K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4

R120 C286 R147 C314 R475 C700 R450 C683 R154 C351 R186 C406 R503 C734 R506 C732
MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X MEV@4.99K/F_4 MEV@0.1U/10V_4X

Group-A0 decoupling CAP Group-A1 decoupling CAP MEM_A1 CLK


MEM_A0 CLK
+1.5V_GPU
+1.5V_GPU
VMA_CLK1
VMA_CLK0
VMA_CLK1#
VMA_CLK0# C249 C350 C253 C706 C327 C407 C748 C741
C674 C260 C262 C665 C671 C664 C695 C686 MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X
MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X R195 R208
R112 R110 MEV@56.2/F_4 MEV@56.2/F_4
MEV@56.2/F_4 MEV@56.2/F_4
+1.5V_GPU
+1.5V_GPU

C429
C266 C737 C717 C714 C334 C750 C745 C753 C381 MEV@0.01U/25V_4X
MEV@0.01U/25V_4X C303 C687 C685 C254 C251 C257 C667 C681 MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X
A MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X MEV@1U/6.3V_4X A

+1.5V_GPU
+1.5V_GPU

C778 C367 C713 C438 C701


C309 C675 C252 C676 C689 MEV@10U/6.3V_8X MEV@10U/6.3V_8X MEV@10U/6.3V_8X MEV@10U/6.3V_8X MEV@10U/6.3V_8X
MEV@10U/6.3V_8X MEV@10U/6.3V_8X

http://laptop-motherboard-schematic.blogspot.com/
MEV@10U/6.3V_8X MEV@10U/6.3V_8X MEV@10U/6.3V_8X
Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
A1A
VRAM_A: DDR3-64M*16*4PCS
Date: Saturday, April 10, 2010 Sheet 18 of 45
5 4 3 2 1
5 4 3 2 1

{17} VMB_DQ[63..0]
VMB_DQ[63..0] CHANNEL B: 512MB DDR3 (64M*16*4pcs)
VMB_DM[7..0]
{17} VMB_DM[7..0]
VMB_RDQS[7..0] QSA[7..0]
{17} VMB_RDQS[7..0]
VMB_WDQS[7..0] QSA#[7..0]
{17} VMB_WDQS[7..0]
U26 U12 U11 U27
VMB_MA[13..0]
{17} VMB_MA[13..0]
VREFC_VMB1 M8 E3 VMB_DQ3 VREFC_VMB2 M8 E3 VMB_DQ16 VREFC_VMB3 M8 E3 VMB_DQ55 VREFC_VMB4 M8 E3 VMB_DQ39
VREFD_VMB1 VREFCA DQL0 VMB_DQ5 VREFD_VMB2 VREFCA DQL0 VMB_DQ17 VREFD_VMB3 VREFCA DQL0 VMB_DQ51 VREFD_VMB4 VREFCA DQL0 VMB_DQ33
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 VMB_DQ2 VREFDQ DQL1 VMB_DQ20 VREFDQ DQL1 VMB_DQ54 VREFDQ DQL1 VMB_DQ38
F2 F2 F2 F2
VMB_MA0 DQL2 VMB_DQ4 VMB_MA0 DQL2 VMB_DQ18 VMB_MA0 DQL2 VMB_DQ50 VMB_MA0 DQL2 VMB_DQ36
{17} VMB_MA0 N3 F8 N3 F8 N3 F8 N3 F8
VMB_MA1 A0 DQL3 VMB_DQ0 VMB_MA1 A0 DQL3 VMB_DQ22 VMB_MA1 A0 DQL3 VMB_DQ52 VMB_MA1 A0 DQL3 VMB_DQ35
{17} VMB_MA1 P7 H3 P7 H3 P7 H3 P7 H3
VMB_MA2 A1 DQL4 VMB_DQ7 VMB_MA2 A1 DQL4 VMB_DQ19 VMB_MA2 A1 DQL4 VMB_DQ48 VMB_MA2 A1 DQL4 VMB_DQ32
{17} VMB_MA2 P3 H8 P3 H8 P3 H8 P3 H8
VMB_MA3 A2 DQL5 VMB_DQ1 VMB_MA3 A2 DQL5 VMB_DQ21 VMB_MA3 A2 DQL5 VMB_DQ53 VMB_MA3 A2 DQL5 VMB_DQ37
{17} VMB_MA3 N2 G2 N2 G2 N2 G2 N2 G2
D
VMB_MA4 A3 DQL6 VMB_DQ6 VMB_MA4 A3 DQL6 VMB_DQ23 VMB_MA4 A3 DQL6 VMB_DQ49 VMB_MA4 A3 DQL6 VMB_DQ34 D
{17} VMB_MA4 P8 H7 P8 H7 P8 H7 P8 H7
VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7
{17} VMB_MA5 P2 P2 P2 P2
VMB_MA6 A5 VMB_MA6 A5 VMB_MA6 A5 VMB_MA6 A5
{17} VMB_MA6 R8 R8 R8 R8
VMB_MA7 A6 VMB_DQ15 VMB_MA7 A6 VMB_DQ24 VMB_MA7 A6 VMB_DQ41 VMB_MA7 A6 VMB_DQ61
{17} VMB_MA7 R2 D7 R2 D7 R2 D7 R2 D7
VMB_MA8 A7 DQU0 VMB_DQ10 VMB_MA8 A7 DQU0 VMB_DQ31 VMB_MA8 A7 DQU0 VMB_DQ47 VMB_MA8 A7 DQU0 VMB_DQ56
{17} VMB_MA8 T8 C3 T8 C3 T8 C3 T8 C3
VMB_MA9 A8 DQU1 VMB_DQ14 VMB_MA9 A8 DQU1 VMB_DQ28 VMB_MA9 A8 DQU1 VMB_DQ40 VMB_MA9 A8 DQU1 VMB_DQ63
{17} VMB_MA9 R3 C8 R3 C8 R3 C8 R3 C8
VMB_MA10 A9 DQU2 VMB_DQ8 VMB_MA10 A9 DQU2 VMB_DQ30 VMB_MA10 A9 DQU2 VMB_DQ45 VMB_MA10 A9 DQU2 VMB_DQ57
{17} VMB_MA10 L7 C2 L7 C2 L7 C2 L7 C2
VMB_MA11 A10/AP DQU3 VMB_DQ12 VMB_MA11 A10/AP DQU3 VMB_DQ26 VMB_MA11 A10/AP DQU3 VMB_DQ43 VMB_MA11 A10/AP DQU3 VMB_DQ60
{17} VMB_MA11 R7 A7 R7 A7 R7 A7 R7 A7
VMB_MA12 A11 DQU4 VMB_DQ9 VMB_MA12 A11 DQU4 VMB_DQ27 VMB_MA12 A11 DQU4 VMB_DQ42 VMB_MA12 A11 DQU4 VMB_DQ58
{17} VMB_MA12 N7 A2 N7 A2 N7 A2 N7 A2
VMB_MA13 A12/BC DQU5 VMB_DQ13 VMB_MA13 A12/BC DQU5 VMB_DQ25 VMB_MA13 A12/BC DQU5 VMB_DQ44 VMB_MA13 A12/BC DQU5 VMB_DQ62
{17} VMB_MA13 T3 B8 T3 B8 T3 B8 T3 B8
A13 DQU6 VMB_DQ11 A13 DQU6 VMB_DQ29 A13 DQU6 VMB_DQ46 A13 DQU6 VMB_DQ59
T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU

VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2


{17} VMB_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9
{17} VMB_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7
{17} VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 VDD#K2 VDD#K2 VDD#K2
K8 K8 K8 K8
VDD#K8 VDD#K8 VDD#K8 VDD#K8
N1 N1 N1 N1
VMB_CLK0 VDD#N1 VMB_CLK0 VDD#N1 VMB_CLK1 VDD#N1 VMB_CLK1 VDD#N1
{17} VMB_CLK0 J7 N9 J7 N9 {17} VMB_CLK1 J7 N9 J7 N9
VMB_CLK0# CK VDD#N9 VMB_CLK0# CK VDD#N9 VMB_CLK1# CK VDD#N9 VMB_CLK1# CK VDD#N9
{17} VMB_CLK0# K7 R1 K7 R1 {17} VMB_CLK1# K7 R1 K7 R1
VMB_CKE0 CK VDD#R1 VMB_CKE0 CK VDD#R1 VMB_CKE1 CK VDD#R1 VMB_CKE1 CK VDD#R1
{17} VMB_CKE0 K9 R9 K9 R9 {17} VMB_CKE1 K9 R9 K9 R9
CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU

VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1


{17} VMB_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 {17} VMB_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMB_CS0# L2 A8 VMB_CS0# L2 A8 VMB_CS1# L2 A8 VMB_CS1# L2 A8
{17} VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 {17} VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
{17} VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 {17} VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
{17} VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 {17} VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_WE0# L3 D2 VMB_WE0# L3 D2 VMB_WE1# L3 D2 VMB_WE1# L3 D2
{17} VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 {17} VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 VDDQ#E9 VDDQ#E9 VDDQ#E9
F1 F1 F1 F1
VMB_RDQS0 VDDQ#F1 VMB_RDQS2 VDDQ#F1 VMB_RDQS6 VDDQ#F1 VMB_RDQS4 VDDQ#F1
F3 H2 F3 H2 F3 H2 F3 H2
VMB_RDQS1 DQSL VDDQ#H2 VMB_RDQS3 DQSL VDDQ#H2 VMB_RDQS5 DQSL VDDQ#H2 VMB_RDQS7 DQSL VDDQ#H2
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9

VMB_DM0 E7 A9 VMB_DM2 E7 A9 VMB_DM6 E7 A9 VMB_DM4 E7 A9


VMB_DM1 DML VSS#A9 VMB_DM3 DML VSS#A9 VMB_DM5 DML VSS#A9 VMB_DM7 DML VSS#A9
C D3 B3 D3 B3 D3 B3 D3 B3 C
DMU VSS#B3 DMU VSS#B3 DMU VSS#B3 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 VSS#E1 VSS#E1 VSS#E1
G8 G8 G8 G8
VMB_WDQS0 VSS#G8 VMB_WDQS2 VSS#G8 VMB_WDQS6 VSS#G8 VMB_WDQS4 VSS#G8
G3 J2 G3 J2 G3 J2 G3 J2
VMB_WDQS1 DQSL VSS#J2 VMB_WDQS3 DQSL VSS#J2 VMB_WDQS5 DQSL VSS#J2 VMB_WDQS7 DQSL VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 VSS#M1 VSS#M1 VSS#M1
M9 M9 M9 M9
VSS#M9 VSS#M9 VSS#M9 VSS#M9
P1 P1 P1 P1
MEM_RST# VSS#P1 MEM_RST# VSS#P1 MEM_RST# VSS#P1 MEM_RST# VSS#P1
T2 P9 T2 P9 T2 P9 T2 P9
{17,18} MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
VMB_ZQ1 VSS#T1 VMB_ZQ2 VSS#T1 VMB_ZQ3 VSS#T1 VMB_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

B1 B1 B1 B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
B9 B9 B9 B9
R596 VSSQ#B9 R314 VSSQ#B9 R241 VSSQ#B9 R647 VSSQ#B9
D1 D1 D1 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
EV@240/F_4 D8 EV@240/F_4 D8 EV@240/F_4 D8 EV@240/F_4 D8
VSSQ#D8 VSSQ#D8 VSSQ#D8 VSSQ#D8
E2 E2 E2 E2
VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 F9 L1 F9 L1 F9 L1 F9
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 J9 G1 J9 G1 J9 G1
NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
L9 G9 L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3
EV@VRAM _DDR3

BOT Down TOP Down TOP Up BOT Up

Group-B0 VREF Group-B1 VREF


+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B

R583 R651 R323 R260 R243 R318 R648 R602


EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4

VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4

R582 C779 R646 C810 R322 C499 R246 C471 R242 C457 R317 C487 R649 C813 R613 C782
EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X

Group-B0 decoupling CAP Group-B1 decoupling CAP


MEM_B0 CLK MEM_B1 CLK
+1.5V_GPU +1.5V_GPU

VMB_CLK1

VMB_CLK0 VMB_CLK1#
C497 C784 C788 C498 C796 C476 C820 C815 C477 C455 C787 C809 C819 C491 C818
VMB_CLK0# EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
R316 R321
EV@56.2/F_4 EV@56.2/F_4
R319 R320
+1.5V_GPU +1.5V_GPU
EV@56.2/F_4 EV@56.2/F_4

C490
A EV@0.01U/25V_4X A
C459 C489 C812 C402 C817 C496 C816 C495 C781 C492 C814 C494 C811 C493 C795
C488 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
EV@0.01U/25V_4X

+1.5V_GPU +1.5V_GPU

C822
EV@10U/6.3V_8X
C775
EV@10U/6.3V_8X
C481
EV@10U/6.3V_8X
http://laptop-motherboard-schematic.blogspot.com/
C502
EV@10U/6.3V_8X
C823
EV@10U/6.3V_8X
C482
EV@10U/6.3V_8X
C501
EV@10U/6.3V_8X
C776
EV@10U/6.3V_8X
C500
EV@10U/6.3V_8X
C824
EV@10U/6.3V_8X
Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
A1A
VRAM_B: DDR3-64M*16*4PCS
Date: Saturday, April 10, 2010 Sheet 19 of 45
5 4 3 2 1
5 4 3 2 1

For Madison and Park VDDCI and VDDC can share one common regulator
+1.8V_GPU
(1.8V@400mA PCIE_VDDR) 180 ohm/1.5A
VDD/VDDQ =1.5V at 1333 PCIE_VDDR L27 EV@HCB1608KF-181T15_1.5A U20F
VDD/VDDQ =1.8V at 1600 and 1800 U20E

+1.5V_GPU MEM I/O C657 C656 C285 C277 C652


(1.5V@3.4A_VDDR1) PCIE EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@10U/6.3V_8X AB39 A3
PCIE_VSS#1 GND#1
AC7 AA31 E39 A37
VDDR1#1 PCIE_VDDR#1 PCIE_VSS#2 GND#2
AD11 AA32 F34 AA16
VDDR1#2 PCIE_VDDR#2 PCIE_VSS#3 GND#3
AF7 AA33 F39 AA18
VDDR1#3 PCIE_VDDR#3 PCIE_VSS#4 GND#4
C397 C736 C458 C680 C752 AG10 AA34 VDDC G33 AA2
EV@10U/6.3V_8X EV@10U/6.3V_8X EV@10U/6.3V_8X *EV@10U/6.3V_8X *EV@10U/6.3V_8X AJ7
VDDR1#4
VDDR1#5
PCIE_VDDR#4
PCIE_VDDR#5
V28 M92,M96-->1.1V B2A G34
PCIE_VSS#5
PCIE_VSS#6
GND#5
GND#6
AA21
AK8 W29 C659 C284 C278 Park,Madison-->1.0V H31 AA23
D VDDR1#6 PCIE_VDDR#6 EV@0.1U/10V_4X EV@0.1U/10V_4X EV@1U/6.3V_4X PCIE_VSS#7 GND#7 D
AL9 W30 H34 AA26
VDDR1#7 PCIE_VDDR#7 PCIE_VSS#8 GND#8
G11 Y31 H39 AA28
VDDR1#8 PCIE_VDDR#8 +1V_GPU PCIE_VSS#9 GND#9
G14 J31 AA6
VDDR1#9 PCIE_VSS#10 GND#10
G17
VDDR1#10 (1.0V@2A PCIE_VDDC) J34
PCIE_VSS#11 GND#11
AB12
G20 G30 K31 AB15
C416 C333 C738 C417 C393 C415 VDDR1#11 PCIE_VDDC#1 PCIE_VSS#12 GND#12
G23 G31 K34 AB17
EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X G26
VDDR1#12
VDDR1#13
PCIE_VDDC#2
PCIE_VDDC#3
H29 B2A K39
PCIE_VSS#13
PCIE_VSS#14
GND#13
GND#14
AB20
G29 H30 C219 C288 C287 C290 C291 C301 L31 AB22
VDDR1#14 PCIE_VDDC#4 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@10U/6.3V_6X PCIE_VSS#15 GND#15
H10 J29 L34 AB24
VDDR1#15 PCIE_VDDC#5 PCIE_VSS#16 GND#16
J7 J30 M34 AB27
VDDR1#16 PCIE_VDDC#6 PCIE_VSS#17 GND#17
J9 L28 M39 AC11
VDDR1#17 PCIE_VDDC#7 PCIE_VSS#18 GND#18
K11 M28 N31 AC13
VDDR1#18 PCIE_VDDC#8 PCIE_VSS#19 GND#19
K13 N28 N34 AC16
B2A K8
VDDR1#19
VDDR1#20
PCIE_VDDC#9
PCIE_VDDC#10
R28 C215 C289 P31
PCIE_VSS#20
PCIE_VSS#21
GND#20
GND#21
AC18
C414 C312 L12 T28 EV@1U/6.3V_4X EV@1U/6.3V_4X P34 AC2
EV@1U/6.3V_4X EV@1U/6.3V_4X VDDR1#21 PCIE_VDDC#11 PCIE_VSS#22 GND#22
L16 U28 P39 AC21
VDDR1#22 PCIE_VDDC#12 +VGPU_CORE PCIE_VSS#23 GND#23
L21 R34 AC23
VDDR1#23 PCIE_VSS#24 GND#24
L23
VDDR1#24 (30A or more) T31
PCIE_VSS#25 GND#25
AC26
L26 AA15 T34 AC28
VDDR1#25 CORE VDDC#1 PCIE_VSS#26 GND#26
L7 AA17 T39 AC6
VDDR1#26 VDDC#2 PCIE_VSS#27 GND#27
M11 AA20 U31 AD15
B2A N11
VDDR1#27
VDDR1#28
VDDC#3
VDDC#4
AA22 B2A C300 C352 C313 C371 U34
PCIE_VSS#28
PCIE_VSS#29
GND#28
GND#29
AD17
P7 AA24 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X V34 AD20
VDDR1#29 VDDC#5 PCIE_VSS#30 GND#30
R11 AA27 V39 AD22
VDDR1#30 VDDC#6 PCIE_VSS#31 GND#31
U11 AB16 W31 AD24
VDDR1#31 VDDC#7 PCIE_VSS#32 GND#32
U7 AB18 W34 AD27
VDDR1#32 VDDC#8 PCIE_VSS#33 GND#33
Y11 AB21 Y34 AD9
VDDR1#33 VDDC#9 PCIE_VSS#34 GND#34
Y7 AB23 Y39 AE2
VDDR1#34 VDDC#10 C318 C305 PCIE_VSS#35 GND#35
AB26 AE6
VDDC#11 EV@1U/6.3V_4X EV@1U/6.3V_4X GND#36
AB28 AF10
VDDC#12 GND#37
AC17 AF16
VDDC#13 GND#38
AC20 AF18
LEVEL VDDC#14 GND#39
AC22 AF21
120 ohm/300mA (1.8V@17mA VDD_CT) TRANSLATION VDDC#15
VDDC#16
AC24 GND GND#40
GND#41
AG17

POWER
L11 EV@BLM15BD121SN1D_300MA VDDC_CT AF26 AC27 F15 AG2
+1.8V_GPU VDD_CT#1 VDDC#17 GND#100 GND#42
AF27 AD18 F17 AG20
VDD_CT#2 VDDC#18 C299 GND#101 GND#43
AG26 AD21 F19 AG22
C C261 C292 C298 AG27
VDD_CT#3
VDD_CT#4
VDDC#19
VDDC#20
AD23 B2A EV@1U/6.3V_4X F21
GND#102
GND#103
GND#44
GND#45
AG6 C
EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X AD26 F23 AG9
VDDC#21 GND#104 GND#46
AF17 F25 AH21
B2A (3.3V@60mA) I/O VDDC#22
VDDC#23
AF20 F27
GND#105
GND#106
GND#47
GND#48
AJ10
+3V_D AF23 AF22 VDDCI:33.6A F29 AJ11
VDDR3#1 VDDC#24 GND#107 GND#49
AF24 AG16 F31 AJ2
VDDR3#2 VDDC#25 GND#108 GND#50
AG23 AG18 F33 AJ28
C315 C339 C332 C328 VDDR3#3 VDDC#26 C366 C307 C317 C356 C324 GND#109 GND#51
AG24 AG21 F7 AJ6
EV@10U/6.3V_6X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X VDDR3#4 VDDC#27 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X GND#110 GND#52
AH22 F9 AK11
VDDC#28 GND#111 GND#53 PowerXpress control signal for Madsion and Park only
AH27 G2 AK31
VDDC#29 GND#112 GND#54
AF13 AH28 G6 AK7 If not used, can be disconnected. (AL21 pin)
VDDR4#4 VDDC#30 GND#113 GND#55
AF15 M26 H9 AL11
120 ohm/300mA VDDR4#5 VDDC#31 GND#114 GND#56
(1.8V@170mA) AG13
VDDR4#7 VDDC#32
N24 J2
GND#115 GND#57
AL14 PX_EN = LOW, turn on
L18 EV@BLM15BD121SN1D_300MA VDDR4 AG15 N27 J27 AL17
+1.8V_GPU VDDR4#8 VDDC#33
VDDC#34
R18 B2A C316 J6
GND#116
GND#117
GND#58
GND#59
AL2
PX_EN = HIGH, turn off
R21 EV@1U/6.3V_4X J8 AL20
B2A C376 C383 AD12
VDDR4#1
VDDC#35
VDDC#36
R23 K14
GND#118
GND#119
GND#60
GND#61
AL21
VDDR4,VDDR5 EV@1U/6.3V_4X EV@0.1U/10V_4X AF11
VDDR4#2 VDDC#37
R26 K7
GND#120 GND#62
AL23 Ball AL21
Park,Madison-->1.8V only. AF12 T17 L11 AL26 M92,M96-->GND
VDDR4#3 VDDC#38 GND#121 GND#63 R454
M92,M96-->1.8V or 3.3V AG11 T20 L17 AL32 Madison,Park for Power Express,No use can NC.
VDDR4#6 VDDC#39 GND#122 GND#64 9X@0_4
T22 L2 AL6
(Default by DVO_LSB_VMODE set "1". +1.5V_GPU VDDC#40 R710 GND#123 GND#65
T24 L22 AL8
B2A VDDC#41
VDDC#42
T27 EV@0_6 C340 C322 C311 C354 C355 L24
GND#124
GND#125
GND#66
GND#67
AM11 B2A
VDDR4 for DVPDATA {12:23} VDDC#43
U16 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X L6
GND#126 GND#68
AM31
VDDR5 for DVPDATA {0:11} L46 96@BLM15BD121SN1D_300MA M20 U18 M17 AM9
NC_VDDRHA VDDC#44 BIF_VDDC GND#127 GND#69
M21 U21 M22 AN11
NC_VSSRHA VDDC#45 GND#128 GND#70
L47 9X@BLM15BD121SN1D_300MA
VDDC#46
U23 Ball N27,T27 M24
GND#129 GND#71
AN2
VDDRHA,VSSRHA,VDDRHB,VSSRHB U26 M92,M96-->VDDC N16 AN30
M92-->Need B C863 9X@1U/6.3V_4X V12
NC_VDDRHB
VDDC#47
VDDC#48
V17 B2A
Madison,Park-->VDDC if no support Power Xpress.Support need to separe it. N18
GND#130
GND#131
GND#72
GND#73
AN6 B2A
,M96-->Need A&B U12
NC_VSSRHB VDDC#49
V20 N2
GND#132 GND#74
AN8 Ball AW34
C864 96@1U/6.3V_4X V22 N21 AP11 M92,M96-->GND
Madison,M92-->NC VDDC#50 GND#133 GND#75
V24 N23 AP7 Madison,Park for 27MHz OSC Input,If no use can GND.
R706 96@0_4 VDDC#51 GND#134 GND#76
V27 N26 AP9
R707 9X@0_4 VDDC#52 C653 C660 C347 C341 C663 C654 GND#135 GND#77
(1.8V@40mA PCIE_PVDD) VDDC#53
Y16 N6
GND#136 GND#78
AR5
120 ohm/300mA PLL Y18 EV@10U/6.3V_8X EV@10U/6.3V_8X *EV@10U/6.3V_6X *EV@10U/6.3V_6X *EV@10U/6.3V_8X *EV@10U/6.3V_8X R15 AW34 R709 EV@0_4
L6 EV@BLM15BD121SN1D_300MA PCIE_PVDD VDDC#54 GND#137 GND#79
+1.8V_GPU AB37 Y21 R17 B11
PCIE_PVDD VDDC#55 GND#138 GND#80
Y23 R2 B13
B
MPV18 H7
MPV18#1
VDDC#56
VDDC#57
Y26 B2A R20
GND#139
GND#140
GND#81
GND#82
B15 B
C217 C247 C223 H8 Y28 R22 B17
EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X MPV18#2 VDDC#58 +VGPU_IO GND#141 GND#83
R24 B19
GND#142 GND#84
R27 B21
SPV18 GND#143 GND#85
AM10 R6 B23
120 ohm/300mA SPV18 GND#144 GND#86
VDDCI#1
AA13 (DDR3 1.12V@4A VDDCI) or more T11
GND#145 GND#87
B25
L38 MP@BLM15BD121SN1D_300MA (1.8V@150mA MPV18) SPV10 AN9 AB13 T13 B27
+1.8V_GPU SPV10 VDDCI#2 GND#146 GND#88
AC12 T16 B29
VDDCI#3 GND#147 GND#89
AN10 AC15 T18 B31
SPVSS VDDCI#4 GND#148 GND#90
MPV18 C771 C409 C768
VDDCI#5
AD13 C358 C359 C392 C390 C374 C321 T21
GND#149 GND#91
B33
M92,M96-->NC MP@10U/6.3V_8X MP@1U/6.3V_4X MP@0.1U/10V_4X AD16 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X T23 B7
VDDCI#6 GND#150 GND#92
Park,Madison-->1.8V@150mA M15 T26 B9
VDDCI#7 GND#151 GND#93
M16 U15 C1
VOLTAGE VDDCI#8 GND#153 GND#94
M18 U17 C39
120 ohm/300mA SENESE VDDCI#9 GND#154 GND#95
(1.8V@50mA SPV18) VDDCI#10
M23 U2
GND#155 GND#96
E35
+1.8V_GPU L16 MP@BLM15BD121SN1D_300MA N13 C373 C377 C348 U20 E5
VDDCI#11 EV@10U/6.3V_8X *EV@10U/6.3V_8X EV@10U/6.3V_8X GND#156 GND#97
AF28 N15 U22 F11
FB_VDDC VDDCI#12 GND#157 GND#98
SPV18 N17 U24 F13
M92,M96-->NC
B2A C386 C372 VDDCI#13
VDDCI#14
N20 U27
GND#158
GND#159
GND#99 B2A
Park,Madison-->1.8V@50mA MP@10U/6.3V_8X MP@0.1U/10V_4X T12 AG28 N22 U6
FB_VDDCI ISOLATED VDDCI#15 GND#160
R12 V11
CORE I/O VDDCI#16 R13 V16
GND#161
VDDCI#17 C375 C380 C395 C368 GND#163
AH29 R16 V18 M92 M96 Park Madison
120 ohm/300mA FB_GND VDDCI#18 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X GND#164
T12 V21
VDDCI#19 R712 EV@0_6 GND#165
T15 +VGPU_IO V23
VDDCI#20 GND#166
V15 V26
L48 9X@BLM15BD121SN1D_300MA VDDCI#21 R711 *0_6 GND#167
+VGPU_CORE VDDCI#22
Y13 +1.8V_GPU W2
GND#168 VDDRHA NC VDDR1 NC NC
(1.0V@100mA SPV10) W6
GND#169
+1V_GPU L17 MP@BLM15BD121SN1D_300MA Ball AA13,Y13 Y15
GND#170
EV@Madison/Park_M2 Park,Madison-->BB no support as VDDCI power. Y17
M92,M96-->BB disable as VDDCI power. B2A Y20
GND#171
GND#172
C389 C400 Y22 A39 VDDRHB VDDR1 VDDR1 NC NC
B2A EV@10U/6.3V_8X EV@0.1U/10V_4X
Route as differential Pair
M92,M96-->BB enable(default) Connector to +1.8V_GPU
Control register is GPIO_21_BB_EN
Y24
GND#173
GND#174
VSS_MECH#1
VSS_MECH#2
AW1
SPV10 Y27
GND#175 VSS_MECH#3
AW39
M92,M96-->VDDC +3V U13
+3V +3V GND#152
Madison,Park 1V@100mA V13
GND#162
B2A VSSRHA NC VSS NC NC
EV@Madison/Park_M2
A R458 A

1
9X@10K_4 R140
9X@4.7K_4
R459 R133 VSSRHB VSS VSS NC NC
{41} VGA_CORE_P +1.8V_GPU_PWGD
9X@10K_4 2 MP@0_8
+1.8V_GPU_PWGD {30}
3

FB_VDDC,FB_VDDCI
M92,M96-->NC
GPU +3V power
B2A
3

Park,Madison-->Can use or NC. R713 9X@0_4 9X@AO3413_3A 0.5A


2 Q16
Q43 +1.5V_GPU R157 *9X@0_4 2 Q17 3 +3V_D
3

9X@DDTC144EUA-7-F_30MA
{41} VSS_VCORE_P_SENSE
9X@DMN601K-7_300MA
{30,41} GPU_VRON
R164 *9X@0_4 C346 C310 C304 C370 Quanta Computer Inc.
R708 9X@0_4 +1.8V_GPU 2 Q44 9X@1U/6.3V_4X
1

M92,M96-->GND 9X@DDTC144EUA-7-F_30MA *EV@10U/6.3V_8X *EV@1U/6.3V_4X *EV@0.1U/10V_4X


PROJECT : BL6
B2A Park,Madison-->GND feedback or NC
Size Document Number Rev
1

A1A
Madison/Park PWR_GND
Date: Saturday, April 10, 2010 Sheet 20 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

DPA/B/C/D:110mA
+1.8V_GPU (1.8V@130mA DPA_VDD18) +1V_GPU
U20H (1.0V@110mA DPA_VDD10) 120 ohm/300mA
120 ohm/300mA DPA_VDD10 L13 EV@BLM15BD121SN1D_300MA
L28 MP@BLM15BD121SN1D_300MA DPA_VDD18 DP C/D POWER DP A/B POWER

DPC_VDD18 AP20 AN24 DPA_VDD18 C295 C293 C296


C673 C677 C678 DPC_VDD18#1 DPA_VDD18#1 EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
MP@10U/6.3V_8X MP@1U/10V_6X MP@0.1U/10V_4X
D D
Total 130mA DPC_VDD10 AP13 AP31 DPA_VDD10
DPC_VDD10#1 DPA_VDD10#1 120 ohm/300mA
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32 (1.0V@110mA DPC_VDD10)
(1.8V@130mA DPC_VDD18) DPC_VDD10 L15 EV@BLM15BD121SN1D_300MA
120 ohm/300mA
L33 MP@BLM15BD121SN1D_300MA DPC_VDD18 AN17 AN27
DPC_VSSR#1 DPA_VSSR#1 C362 C360 C353
AP16 DPC_VSSR#2 DPA_VSSR#2 AP27
AP17 AP28 EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X
C694 C704 C702 DPC_VSSR#3 DPA_VSSR#3
AW14 DPC_VSSR#4 DPA_VSSR#4 AW24
MP@10U/6.3V_8X MP@1U/10V_6X MP@0.1U/10V_4X AW16 AW26
DPC_VSSR#5 DPA_VSSR#5

DPA,B,C,D_18
B2A M92,M96-->NC DPC_VDD18 AP22 DPD_VDD18#1 DPB_VDD18#1 AP25 DPA_VDD18 DPA,B,C,D_10
B2A
Park,Madison-->Support AP23 DPD_VDD18#2 DPB_VDD18#2 AP26 M92,M96-->200mA
DPE,F Park,Madison-->110mA
All support DPE,F
DPC_VDD10 AP14 AN33 DPA_VDD10 M92,M96-->170mA(TMDS)
DPD_VDD10#1 DPB_VDD10#1 Park,Madison-->120mA(LVDS)
AP15 DPD_VDD10#2 DPB_VDD10#2 AP33

C AN19 DPD_VSSR#1 DPB_VSSR#1 AN29 C


AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
AW20 DPD_VSSR#4 DPB_VSSR#4 AW30
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32
Total 20mA
Place close to IC Place close to IC
R508 EV@150/F_4 DPCD_CALR AW18 AW28 DPAB_CALR R456 EV@150/F_4 +1.8V_GPU
DPCD_CALR DPAB_CALR 120 ohm/300mA
(1.8V@20mA DPA_PVDD)
DPA_PVDD L29 EV@BLM15BD121SN1D_300MA
+1.8V_GPU (1.8V@200mA DPE/F_VDD18) DP E/F POWER DP PLL POWER
180 ohm/1.5A AH34 AU28
L9 EV@HCB1608KF-181T15_1.5A DPE_VDD18 DPE_VDD18 DPE_VDD18#1 DPA_PVDD C690 C692 C691
AJ34 DPE_VDD18#2 DPA_PVSS AV27
EV@10U/6.3V_8X EV@1U/6.3V_4X EV@0.1U/10V_4X

C246 C245 C244 +1.8V_GPU


EV@0.1U/10V_4X EV@1U/6.3V_4X EV@10U/6.3V_8X AL33 AV29 DPB_PVDD (1.8V@20mA DPB_PVDD) 120 ohm/300mA
DPE_VDD10 DPE_VDD10#1 DPB_PVDD L32 EV@BLM15BD121SN1D_300MA
AM33 DPE_VDD10#2 DPB_PVSS AR28

C696 C697 C698


AN34 AU18 *EV@10U/6.3V_8X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
DPF_VSSR#5 DPE_VSSR#1 DPC_PVDD
AP39 AV17
B M92,M96-->VSS B2A AR39
DPE_VSSR#2
DPE_VSSR#3
DPC_PVSS
120 ohm/300mA
+1.8V_GPU B
Madison,Park-->100M AU37 DPC_PVDD (1.8V@20mA DPC_PVDD)
DPE_VSSR#4 L35 EV@BLM15BD121SN1D_300MA
OSC input, no use AW35 DPE_VSSR#5
R716 EV@0_4 AV19
connect to GND DPD_PVDD
DPD_PVSS AR18
C705 C708 C707
AF34 *EV@10U/6.3V_8X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
DPE_VDD18 DPF_VDD18#1
AG34 DPF_VDD18#2
+1V_GPU (1.0V@120mA DPE/F_VDD10) AM37 +1.8V_GPU
180 ohm/1.5A DPE_PVDD DPD_PVDD 120 ohm/300mA
DPE_PVSS AN38 (1.8V@20mA DPD_PVDD)
L8 EV@HCB1608KF-181T15_1.5A DPE_VDD10 L36 EV@BLM15BD121SN1D_300MA
AK33 DPE_PVDD
DPE_VDD10 DPF_VDD10#1
AK34 DPF_VDD10#2
C243 C221 C213 AL38 R714 MP@0_4 C718 C727
EV@0.1U/10V_4X EV@1U/6.3V_4X EV@10U/6.3V_8X NC_DPF_PVDD EV@10U/6.3V_8X EV@1U/6.3V_4X C726
NC_DPF_PVSS AM35
EV@0.1U/10V_4X
AF39 DPF_VSSR#1
AH39 +1.8V_GPU
DPF_VSSR#2 120 ohm/300mA
AK39 DPF_VSSR#3 (1.8V@40mA DPE/F_PVDD)
AL34 L7 EV@BLM15BD121SN1D_300MA
DPF_VSSR#4
AM34 DPF_VSSR#5
R715 C216 C222 C250
Place close to IC MP@0_4 *EV@10U/6.3V_8X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
A R104 EV@150/F_4 DPEF_CALR AM39 A
DPEF_CALR

EV@Madison/Park_M2
Quanta Computer Inc.
B2A PROJECT : BL6
DPF
M92,M96-->NC Size Document Number Rev
A1A
Madison,Park-->1.8V and GND Madison/Park DPPW_GND
Date: Saturday, April 10, 2010 Sheet 21 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

PIN STRAPS
CONFIGURATION STRAPS
+3V_D
Memory Aperture size ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
R153 EV@10K/F_4
{16} GPU_GPIO0
Add by ATI suggest RAM_CFG[2:0] Size
R141 EV@10K/F_4 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS DEFAULT REMARK
{16} GPU_GPIO1

{16} GPIO3_SMBDAT R137 *EV@10K/F_4 000 128MB TX_PWRS_ENB GPIO0 0 = 50% TX OUTPUT SWING 0
D 1 = FULL TX OUTPUT SWING D

{16} GPIO4_SMBCLK R136 *EV@10K/F_4


TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 0
001 256MB 0 = TX DE-EMPHASIS DISABLED
R165 *EV@10K/F_4 Remove by ATI suggest 1 = TX DE-EMPHASIS ENABLED
{16} PWR_PSI#
010 64MB ENABLE EXTERNAL BIOS ROM (Only for GDDR5)
BIOS_ROM_EN GPIO_22_ROMCSB 0 = DISABLE 0
B2A 1 = ENABLE
R142 *EV@10K/F_4 011 32MB
{16} GFX_CORE_CNTRL2
ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
NUMONYX M25P10A : 101
000 See ROM table
R148 *EV@10K/F_4
{16,23} LVDS_BLON
BIF_GEN2_EN_A GPIO2 0 = PCIE DEVICE AS 2.5GT/S CAPABLE 0
ROM Table 1 = PCIE DEVICE AS 5GT/S CAPABLE
R145 *EV@10K/F_4
{16} RAM_CFG2
EXT_HSYNC EXT_VSYNC GPIO_8_ROMSO GPIO8
{16} RAM_CFG1
R146 *EV@10K/F_4 Discription H2SYNC H2SYNC Reserved Only 0
GPIO_21_BB_EN GPIO21
R143 EV@10K/F_4 Change by ATI suggest No Audio
{16} RAM_CFG0
0 0 AUD[1] HSYNC
AUD[1:0]
00: NO AUDIO FUNCTION.

R149 *EV@10K/F_4 0 1 Any one by dectec AUD[0] VSYNC


01: AUDIO FOR DISPLAYPORT AND HDMI IF
See Audio table
{16} GPU_GPIO2 ADAPTER IS DETECTED. 11
10: AUDIO FOR DISPLAYPORT ONLY.

R435 EV@10K/F_4 1 0 DP only 11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.
{16,23} EXT_HSYNC
R434 EV@10K/F_4
{16,23} EXT_VSYNC
1 1 Both DP & HDMI GPIO_9_ROMSI GPIO9 0 = VGA controller capacity enable 0
C C

VIP_DEVICE_STRAP_ENA V2SYNC 0 = DRIVER would ignore the value sample on VHAD_0 during RESET. 0
R425 *EV@10K/F_4
{16} V2SYNC VIP: Video Capture Port Interface

R178 *EV@10K/F_4
{16} GPU_GPIO8
R131 *EV@10K/F_4
{16} GPU_GPIO9 +1.8V_GPU
{16} GPU_GPIO10
R144 *EV@10K/F_4 DDR3 Memory TYPE
RAM_STRAP4
R184 *EV@10K/F_4
RAM_STRAP3 RAM_STRAP2 RAM_STRAP1 RAM_STRAP0 R531 *EV@10K/F_4
{16} GPU_GPIO22 Vendor Vendor P/N STN B/S P/N Size {16} RAM_STRAP4
DVPDATA_3 DVPDATA_2 DVPDATA_1 DVPDATA_0 15" 14" R527 EV@10K/F_4

512MB 0 1 0 0 0 1 R522 *EV@10K/F_4


{16} RAM_STRAP3
Hynix H5TQ1G63BFR AKD5LZGTW00 R518 EV@10K/F_4
-12C (64M*16) 1GB 0 0 0 0 0 1
R541 EV@10K/F_4
2GB 0 0 1 0 0 1 {16} RAM_STRAP2
R537 EV@10K/F_4

B
512MB & 1GB take care B
512MB 0 1 0 1 0 1
K4W1G1646E AKD5LGGT502 R525 *EV@10K/F_4
{16} RAM_STRAP1
-HC12 (64M*16) R523 EV@10K/F_4
Samsung 1GB 0 0 0 1 0 1
Thermal Sensor K4W2G1646B R543 EV@10K/F_4
AKD5MGGT501 2GB
+3V_D
-HC12 0 0 1 1 0 1 R550 EV@10K/F_4
{16} RAM_STRAP0

R424 R426
EV@4.7K_4 EV@4.7K_4 +3V_D
EEPROM
2

Q40 EV@DMN601K-7_300MA
{30} 3ND_MBCLK 3 1 B2A U0

R717 B2A {16} GPU_GPIO9 5


D Q
2 GPU_GPIO8 {16}
EV@0_6
+3V_D 6
C3A {16} GPU_GPIO10 C
+3V_D_Thermal
2

{16} GPU_GPIO22 1
Q6 EV@DMN601K-7_300MA S
{30} 3ND_MBDATA 3 1 +3V_D 7
R443 R442 C661 EV@0.1U/10V_4X HOLD
EV@10K_4 EV@10K_4 R720 *EV@10K_4 3
A U18 W A
8 VCC VSS 4
{16} SCL R439 *EV@0_4 8 1 R721
SCLK VCC GPU_D+ {16}
{16} SDA R441 *EV@0_4 *EV@10K_4C98 *EV@M25P10-AVMN6TP
7 2 C670
SDA DXP *EV@0.1U/10V_4X
R431 *EV@0_4 6 3 EV@2200P/50V_4X
{16} GPIO4_SMBCLK
{16} GPIO3_SMBDAT R444 *EV@0_4 ALERT# DXN
GPU_D- {16}
Quanta Computer Inc.
{16} ALT#_GPIO17
http://laptop-motherboard-schematic.blogspot.com/
4 OVERT# GND

EV@LM95245CIMM NOPB
5

Size Document Number


PROJECT : BL6
Rev
{3} VGA_THERM# $''5(66+ Memory strip/Thermal/HDCP A1A

Date: Saturday, April 10, 2010 Sheet 22 of 45


5 4 3 2 1
5 4 3 2 1

/9'66LJQDOV &&' +$//6(1625 %$&./,*+76:,7&+

+3VPCU R685 100K_4


INT_TXLCLKOUT+ RP10 1 2 IV@0X2 LCD_TXLCLKOUT+ +3V +3V
{7} INT_TXLCLKOUT+
INT_TXLCLKOUT- 3 4 LCD_TXLCLKOUT-
{7} INT_TXLCLKOUT-

5
EV_TXLCLKOUT+ RP4 4 3 EV@0X2 USBP0+_LCD R357 *SHORT_6 R694
{16} EV_TXLCLKOUT+ USBP0+ {9}
EV_TXLCLKOUT- 2 1 USBP0-_LCD R358 *SHORT_6 1 2 LID591# 2
{16} EV_TXLCLKOUT- USBP0- {9}
1K_4 DISPON 4
MR1 1 LID591#
C3A C854
INT_TXLOUT2+ RP11 1 2 IV@0X2 LCD_TXLOUT2+ PT3661-BB U32 *TC7SH08FU(F)
{7} INT_TXLOUT2+

3
INT_TXLOUT2- 3 4 LCD_TXLOUT2- F2 2 1 *SMD1206P100TF 0.1U/16V_4Y
D
{7} INT_TXLOUT2-
DISPON {30}
E3A D
EV_TXLOUT2+ RP5 4 3 EV@0X2 D22 2 1 *B130L-13-F_1A
{16} EV_TXLOUT2+
EV_TXLOUT2- 2 1
{16} EV_TXLOUT2-
R367 0_8 DISPON D43 2 1 CH501H-40PT_100MA
INT_TXLOUT1+ RP12 1 2 IV@0X2 LCD_TXLOUT1+ 0.2A(20mils) LID591# {30}
{7} INT_TXLOUT1+
{7} INT_TXLOUT1-
INT_TXLOUT1- 3 4 LCD_TXLOUT1- E3A
+3V 1 3 CCD_POWER D46 *EV@SW1010CPT_100MA LCD_DISP_ON
EV_TXLOUT1+ RP6 1 2 EV@0X2
{16} EV_TXLOUT1+
EV_TXLOUT1- C549 10U/6.3V_8X

+
{16} EV_TXLOUT1- 3 4
Q34

2
C548 *1000P/50V_4X D42 IV@SW1010CPT_100MA R690 IV@0_4
+3V INT_LVDS_BLON {7}
INT_TXLOUT0+ RP13 4 3 IV@0X2 LCD_TXLOUT0+ *AO3413_3A
{7} INT_TXLOUT0+
INT_TXLOUT0- 2 1 LCD_TXLOUT0- C547 *0.1U/16V_4Y +3V R692 EV@0_4
{7} INT_TXLOUT0- C3A LVDS_BLON {16,22}

EV_TXLOUT0+ RP7 1 2 EV@0X2


{16} EV_TXLOUT0+
EV_TXLOUT0- 3 4 R366 R681 R693
{16} EV_TXLOUT0-
*4.7K_4

3
100K_4
INT_LVDS_EDIDCLK RP9 4 3 IV@0X2 LCD_EDIDCLK EV@10K_4
{7} INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA 2 1 LCD_EDIDDATA
{7} INT_LVDS_EDIDDATA

3
2

3
EV_LVDS_DDCCLK RP3 2 1 EV@0X2 2 Q63
{16} EV_LVDS_DDCCLK CCD_POWERON {30}
EV_LVDS_DDCDAT 4 3
{16} EV_LVDS_DDCDAT
2 EV@2N7002_200MA
EC_FPBACK# {30}

1
Q33 2

1
*DDTC144EUA-7-F_30MA Q64
+3V R75 2.2K_4 LCD_EDIDCLK Q62

1
DDTC144EUA-7-F_30MA
R68 2.2K_4 LCD_EDIDDATA EV@2N7002_200MA

1
LVDS Enable

C C

/&'3DQHO0RGXOH 0.3A (20mils) CN1


B2A /&'32:(56:,7&+
LCDVCC LCDVCC 1
1 +15V
2
2
+3V 3
LCD_EDIDCLK 3 +3V
VIN 4
LCD_EDIDDATA 4
5
5 R360
6
6

3
+ C543 C544 C545 LCD_TXLOUT0- 7
LCD_TXLOUT0+ 8
7
8
330K_6 1.5A(65mils)
10U/25V_1206X 1000P/50V_4X 0.1U/25V_6X 9 Q29
LCD_TXLOUT1- 9 +3VPCU LCDONG 2 LCDVCC
10
LCD_TXLOUT1+ 10 ME2306_4A
11
11
12
LCD_TXLOUT2- 12
13
LCD_TXLOUT2+ 13 R362 C546 LCDVCC1 L23 *SHORT_6
14

1
14

3
15
LCD_TXLCLKOUT- 15 100K_4 0.01U/25V_4X
16
B2A LCD_TXLCLKOUT+ 17
16
17
R361 C3A C542 C540 C541
18 2 Q31
R356 EV@0_4 LVDS_VADJ 18 22_8 0.1U/16V_4Y 0.01U/25V_4X 10U/6.3V_8X
{16} EV_LVDS_BRIGHT 19
DISPON 19 2N7002_200MA
20
20

3
21 LCDDISCHG
R355 IV@0_4 21 Q32
{7} INT_LVDS_PWM VIN 22

1
22

3
23 R364 IV@0_4 LCD_DISP_ON 2
23 {7} INT_LVDS_DIGON
24 34
R359 *EV@0_4 LVDS_VADJ USBP0+_LCD 24 34 R363 EV@0_4
{30} CONTRAST Add VIN Delete VIN pin24 25 {16} EV_LVDS_VDDEN
USBP0-_LCD 25 LCDON# Q30
26 33 2
B2A F3A

1
CCD_POWER 26 33 PDTC143TT_100MA
27
C539 *0.1U/16V_4Y R353 SBY100505T-221Y-N_300MA 27 2N7002_200MA
{27} INT_DMIC_CLK 28 32
R354 SBY100505T-221Y-N_300MA 28 32 R365
{27} INT_DMIC_DATA 29
29
30 31

1
30 31 100K_4
C3A B2A 50373-03001-001

B B

&57
C192 0.1U/16V_4Y

{7} INT_CRT_RED
R390 IV@0_4 CRT_R L24 BLM18BA470SN1D_300MA CRT_R1
+5V
D23 2 1 B130L-13-F_1A F1 2 1 SMD1206P100TF 5V_CRT2 B2A
R397 IV@0_4 CRT_G L25 BLM18BA470SN1D_300MA CRT_G1 CN15

16
{7} INT_CRT_GRN (30mils)
R416 IV@0_4 CRT_B L26 BLM18BA470SN1D_300MA CRT_B1 070546FR015S268ZR
{7} INT_CRT_BLU
6
CRT_R1 1 11 D5 *CH501H-40PT_100MA CRT_SENSE# {30}
R392 EV@0_4 R391 C635 R398 C644 R415 C647 C646 C643 C634 7
{16} EXT_CRT_RED
CRT_G1 2 12 CRTDDAT
R399 EV@0_4 150/F_4 6.8P/50V_4N 150/F_4 6.8P/50V_4N 150/F_4 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 8
{16} EXT_CRT_GRN
CRT_B1 3 13 CRTHSYNC
R413 EV@0_4 9
{16} EXT_CRT_BLU
4 14 CRTVSYNC
10
R94 IV@0_4 DDCCLK 5 15 CRTDCLK
{7} INT_CRT_DDCCLK
R86 IV@0_4 DDCDAT
{7} INT_CRT_DDCDAT

17
R74 IV@0_4 HSYNC
{7} INT_HSYNC
R90 IV@0_4 VSYNC
{7} INT_VSYNC
E3A
R96 EV@0_4
{16} EV_CRTDCLK
R85 EV@0_4
{16} EV_CRTDDAT +5V +3V
R79 EV@0_4
{16,22} EXT_HSYNC
U3
{16,22} EXT_VSYNC
R82 EV@0_4 0.01mA(15mils) 5V_CRT2 1
VCC_SYNC SYNC_OUT2
16 VSYNC1 R423 39/F_4 CRTVSYNC
A 14 HSYNC1 R420 39/F_4 CRTHSYNC C155 C173 A
+5V
2.05mA(20mils) 7
VCC_DDC
SYNC_OUT1
0.1U/16V_4Y 0.1U/16V_4Y
C642 0.22U/6.3V_4X 8 C650 C649
BYP VSYNC
15
+3V
R88 2.2K_4 DDCCLK
+3V
0.01mA(15mils) 2
VCC_VIDEO
SYNC_IN2
SYNC_IN1
13 HSYNC 5V_CRT2 10P/50V_4C 10P/50V_4C

R87 2.2K_4 DDCDAT R55 R67


CRT_R1 3 10 DDCCLK
CRT_G1 VIDEO_1 DDC_IN1 DDCDAT 2.7K_4 2.7K_4
4 11
CRT_B1 VIDEO_2 DDC_IN2
5
VIDEO_3 CRTDCLK
9
DDC_OUT1 CRTDDAT
6 12
GND DDC_OUT2
C154 C161
Quanta Computer Inc.
CM2009-02QR

10P/50V_4C 10P/50V_4C PROJECT : BL6


Size Document Number Rev
A1A
LCD/LED Panel/CCD
Date: Saturday, April 10, 2010 Sheet 23 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

MINI Card Slot#1 Before RAMP must to remove +1.5V WIMAX_P


D30 *ZD5.6V
(WiFi) debug card component
1 2 +3V_S5 +1.5V
+3V WIMAX_P 2.75A(120mils)
E3A 0.5A(30mils)
R576 *0_4 SERIRQ_debug
L34 PBY201209T-330Y-N_4A E3A {7,30}
{7}
SERIRQ
LDRQ#1
R574 *0_4 LDRQ#1__debug C728 C387 C725 C719
PLTRST# R528 *100K_4 PLTRST#_debug
+3V_S5 R573 *0_4 PCLK__debug_R 0.1U/16V_4Y *0.01U/25V_4X *0.1U/16V_4Y *10U/6.3V_8X
{9} PCLK_DEBUG

1
+3V_S5 1 3 CN18
51 NC +3.3V 52
Q47 *AO3413_3A D31 CL_RST#1 R575 *0_4 CL_RST#1_WLAN 49 50
{8} CL_RST#1 C-Link_RST GND
*ZD5.6V CL_DATA1 R538 *0_4 PLTRST#_PCIE 47 48
{8} CL_DATA1
2

R488 CL_CLK1 R572 *0_4 CL_CLK1_WLAN C-Link_DAT +1.5V


45 46

2
{8} CL_CLK1 C-Link_CLK LED_WPAN#
*4.7K_4 43 44
GND LED_WLAN#
D 41 42 D
NC NC
39 40
NC NC
37 38 USBP5+ {9}
Q48 GND USB_D+
35 36 USBP5- {9}
GND USB_D-

3
{8} PCIE_TXP5 33 34
PETp0 GND WL_SMDATA
{8} PCIE_TXN5 31 32
PETn0 SMB_DATA WL_SMCLK
2 WMAX_P {30} 29 30
GND SMB_CLK
27 28
GND +1.5V
25 26
*DDTC144EUA-7-F_30MA
{8} PCIE_RXP5
23
PERp0 GND
24 +3V_S5
0.33A(30mils)

1
{8} PCIE_RXN5 PERn0 +3.3Vaux
21 22 PLTRST#
GND PERST# RF_EN WIMAX_P
19 20 RF_EN {30}
NC W_DISABLE#
17 18
NC GND
15
GND NC
16 LFRAME#_PCIE R494 E3A *0_4 LFRAME# {7,30}
R734 *0_4 13 14 LAD3_PCIE R493 *0_4
E3A {8} CLK_PCIE_MINI REFCLK+ NC

2
4
11 12 LAD2_PCIE R492 *0_4 LAD3 {7,30}
{8} CLK_PCIE_MINI# REFCLK- NC
9 10 LAD1_PCIE R491 *0_4 LAD2 {7,30} RP14
GND NC LAD0_PCIE R490 *0_4 LAD1 {7,30}
{8} PCIE_CLK_RQ5# 3 1 7 8
CLKREQ# NC LAD0 {7,30}
5 6
Q70 *2N7002_200MA R733 *0_4 BT_CHCLK +1.5V *4.7KX2
3 4
BT_DATA GND

2
+3VPCU R730 10K_4 WLAN_WAKE# 1 2
2

1
3
R735 *10K_4 WAKE# +3.3V
WIMAX_P
3 1 80003-5121 3 1 WL_SMDATA
{30} BT_RFCTRL {2,8,28,33} SDATA
Intel module use S5 power for
Q69
+3.3V
E3A B2A Q67 2N7002_200MA Q50 *2N7002_200MA

3
Other module keep +3V for +3.3V

2
WIMAX_P R732 *10K_4 WL_SMDATA R159 *SHORT_4
CGDAT_SMB {2,12,13}
2 R744 *10K_4 WIMAX_P
{30} BT_RFCTRL
R737 *0_4
WIMAX_P WL_SMCLK R160 *SHORT_4
CGCLK_SMB {2,12,13}
{9,28} PCIE_WAKE# 3 1
*DDTC144EUA-7-F_30MA 1

2
Q54 *2N7002_200MA
C724 C758 C757 C720 C3A

2
C C
WIMAX_P R566 *10K_4 3 1 WL_SMCLK
{2,8,28,33} SCLK
0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X
Q49 *2N7002_200MA
C3A

MINI Card Slot#2 +1.5V_3G +3V_3G


3G SIM CARD board to board

+3V_3G +1.5V_3G
2.75A(120mils)
CN21
C764 C793 C760 C756 C761 C765 C755 51 52
NC +3.3V
49 50
*3G@0.01U/25V_4X *3G@0.1U/16V_4Y *3G@0.1U/16V_4Y *3G@10U/6.3V_8X *3G@0.01U/25V_4X *3G@0.1U/16V_4Y *3G@10U/6.3V_8X C-Link_RST GND
47 48
C-Link_DAT +1.5V
45 46
C-Link_CLK LED_WPAN#
43 44
GND LED_WLAN#
41 42
E3A 39
+3.3V
+3.3V
LED_WWAN#
CPUSB#
40 CPUSB# {10}
37 38 USBP10+ {9}
CPEE# USB_D+ CN11
35 36 USBP10- {9}
GND USB_D- UIM_CLK UIM_VPP
{8} PCIE_TXP3 33 34 1 2
PETp0 GND UIM_CLK UIM_VPP UIM_PWR
{8} PCIE_TXN3 31 32 3 4
PETn0 SMB_DATA UIM_DATA GND UIM_PWR UIM_RST
29 30 5 6
GND SMB_CLK UIM_DATA UIM_RST
27 28 7 8
GND +1.5V USBP4+ GND GND
{8} PCIE_RXP3 25 26 {9} USBP4+ 9 10
PERp0 GND USBP4- USB- USB+
{8} PCIE_RXN3 23 24 {9} USBP4- 11 12
RERn0 +3.3Vaux PLTRST# GND GND
21 22 PLTRST# {3,9,28,29,30}
GND RESET# 3G_EN *3G@88020-12101
19 20 3G_EN {30}
+3V_S5 +3V_3G +3V_S5 MMC_DAT W_DISABLE#
B 17 18 B
MMC_CMD GND
15
GND UIM_VPP
16 UIM_VPP_R E3A
13 14 UIM_RST_R
{8} CLK_PCIE_3G REFCLK+ UIM_RST
+1.5V +1.5V_3G 11 12 UIM_CLK_R C763 *3G@100P/50V_4N
{8} CLK_PCIE_3G# REFCLK- UIM_CLK
1 3 9 10 UIM_DATA_R
R593 GND UIM_DATA UIM_PWR_R
7 8
Q57 *3G@AO3413_3A *3G@4.7K_4 0.5A(30mils) {8} PCIE_CLK_REQ4#
5
CLKREQ#
BT_CHCLK
UIM_PWR
+1.5V
6
3 4
2

BT_DATA GND
1 2

54
53
R554 *3G@0_8 WAKE# +3.3V
*3G@80003-5121

54
53
E3A E3A
3

Q52
2 3G_P {30}
PCIE_WAKE# 3 1 3G_WAKE#
*3G@DDTC144EUA-7-F_30MA
Q55 *3G@2N7002_200MA
1

R579 *3G@10K_4
+3V_3G

3G CONN

Close to 3G MINI Card


CN5 CN8
A 1 UIM_CLK_R 1 A
2 2
3 UIM_DATA_R UIM_VPP_R R549 *3G@0_4 UIM_VPP_RR R536 *3G@0_4 UIM_VPP 3
4 UIM_RST_R R548 *3G@0_4 UIM_RST_RR R535 *3G@0_4 UIM_RST UIM_PWR 4
5 UIM_RST_R UIM_CLK_R R547 *3G@0_4 UIM_CLK_RR R534 *3G@0_4 UIM_CLK UIM_VPP 5
6 UIM_VPP_R UIM_DATA_R R546 *3G@0_4 UIM_DATA_RR R533 *3G@0_4 UIM_DATA UIM_RST 6
7 UIM_PWR_R C762 *3G@0.1U/16V_4Y UIM_PWR_R R545 *3G@0_4 UIM_PWR_RR R532 *3G@0_4 UIM_PWR 7
8 UIM_DATA 8
9 9
10
1411 E3A E3A UIM_CLK 10
1114
Quanta Computer Inc.
1312 1213
*3G@88511-120N *3G@88511-120N PROJECT : BL6
Size Document Number Rev
A1A
MINI CARD(WLAN/3G/SIM Card)
Date: Saturday, April 10, 2010 Sheet 24 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

ESATA Re-driver IC
Pin6/10/16/20 ESATA_VCC
1.5V Low Power =>AL004951003
3.3V Low Power =>AL004951004
C294 C693
C3A 0.055A(20mils) ESATA_VCC 0.01U/25V_4X 0.1U/16V_4Y
+3V R453 *SHORT_6

R455 *0_6 ESATA_VCC


+1.5V
D D

20

10

16

6
U7

VCC1

VCC2

VCC3

VCC4
SATA_TXN5 C283 0.01U/25V_4X SATA_TXN5_C 2 15 BSATA_TXP5_C C338 0.01U/25V_4X BSATA_TXP5
{7} SATA_TXN5 AI- AO+
SATA_TXP5 C282 0.01U/25V_4X SATA_TXP5_C 1 14 BSATA_TXN5_C C337 0.01U/25V_4X BSATA_TXN5
{7} SATA_TXP5 AI+ C3A AO-
SATA_RXP5 C280 0.01U/25V_4X SATA_RXP5_C 5 11 BSATA_RXP5_C C335 0.01U/25V_4X BSATA_RXP5
{7} SATA_RXP5 BO+ BI+
SATA_RXN5 C281 0.01U/25V_4X SATA_RXN5_C 4 12 BSATA_RXN5_C C336 0.01U/25V_4X BSATA_RXN5
{7} SATA_RXN5 BO- BI-
R752 0_4 ESATA_EN# 7 9 R135 *100_4

GND_P
ESATA_VCC 2 EN A_EM ESATA_VCC

GND1
GND2
GND3
GND4
Mode
8 R130 100_4 ESATA_VCC
B_EM
3 1
SN75LVCP412ARTJR
C3A

17

3
19
18
13

21
Q68 *FDV301N_200MA R139 R127
B2A 10K_4 *10K_4
R749 *0_4 R457 0_4
{10} ESATA_DN#
C3A
E3A
for disable TX emphasis
C USBP13+ R118 0_6 R_BUSBP13+ C
{9} USBP13+ USBP13- R114 R_BUSBP13-
0_6
{9} USBP13-

1.5A(70mils)
U4
G545A2P8U
+5VPCU USBPWRIN1 2 8 USBPWR1
IN1 OUT3
3 7
C258 IN2 OUT2
6
OUT1 C263
4
1U/25V_8X EN#
1
GND *10U/6.3V_8X
9 5
GND-C OC#
C3A
USB_EN#0
{30} USB_EN#0
B USBOC#13 B
{9,30} USBOC#13

ESATA CONN
12

14

CN17
Shield

Shield

USBPWR1 1 11
VCC GND BSATA_RXP5
10
R_BUSBP13- B+ BSATA_RXN5 R_BUSBP13- D26 *EGA10402V05AH BSATA_RXP5 D24 *EGA10402V05AH
2 9
C256 + C259 D- B-
8
R_BUSBP13+ GND BSATA_TXN5 R_BUSBP13+ D27 *EGA10402V05AH BSATA_RXN5 D25 *EGA10402V05AH
3 7
10U/6.3V_8X *100U/6.3V_3528P_E45b D+ A- BSATA_TXP5
6
A+ USBPWR1 D6 *VPORT 0603 220K-V05 BSATA_TXP5 D29 *EGA10402V05AH
4 5
GND GND
Shield

Shield

A
BSATA_TXN5 D28 *EGA10402V05AH A

3Q38111-R02C1B-7H
13

15

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/
PROJECT : BL6
Size Document Number Rev
A1A
TP/SW/ESATA/USB+Audio/LED
Date: Saturday, April 10, 2010 Sheet 25 of 45
5 4 3 2 1
5 4 3 2 1

6$7$2''

C3A
R62 *SHORT_1206

CN14
GND14 14
+5V 1 3 +5V_ODD
D 1 D
GND1 SATA_TXP1_C C212 0.01U/25V_4X
RXP 2 SATA_TXP1 {7}
3 SATA_TXN1_C C194 0.01U/25V_4X Q36

2
RXN SATA_TXN1 {7}
GND2 4
5 SATA_RXN1_C C191 0.01U/25V_4X *AO3413_3A +5V
TXN SATA_RXN1 {7}
6 SATA_RXP1_C C184 0.01U/25V_4X SATA_RXP1 {7}
TXP
GND3 7

8 R418 1K_4 R402


DP
+5V 9 1.6A(100mils) *4.7K_4
10 +5V_ODD
+5V
RSVD 11
GND 12

3
13 C633 C636 C628 + C143
GND
15 0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X *100U/6.3V_3528P_E45b 2
GND15 ODD_EN {30}
SLS-13DE1G
Q37

1
*DDTC144EUA-7-F_30MA

C C

6$7$+'' (0,

B2A CN20
VIN

1 C86 C90 C92 C94 C110


GND1 SATA_TXP0_C C794 0.01U/25V_4X
2
RXP
RXN
3 SATA_TXN0_C C792 0.01U/25V_4X
SATA_TXP0 {7}
SATA_TXN0 {7}
*0.1U/25V_4Y *0.1U/25V_4Y *0.1U/25V_4Y *0.1U/25V_4Y *0.1U/25V_4Y B2A
4
GND2 SATA_RXN0_C C786 0.01U/25V_4X
5 SATA_RXN0 {7}
TXN SATA_RXP0_C C783 0.01U/25V_4X
6 SATA_RXP0 {7}
TXP
7
GND3
(20mils)
8 +3.3VSATA1 R565 *0_8 +3V GND
3.3V
9
3.3V
10
3.3V C754 C772
11
GND
12
GND *10U/6.3V_8X *0.1U/16V_4Y
13
GND
14
5V
15
5V
B 16 +3V B
5V
17
GND C112 C115 C119
18
RSVD
19 0.94A(80mils)
GND
12V
20 C3A *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y
21 +5V_HDD1 R512 *SHORT_8 +5V
12V
22
12V
C743 C742 C744 + C731

127067FR022G205ZR 0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X *100U/6.3V_3528P_E45b


GND

A A

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ PROJECT : BL6
Size Document Number Rev
A1A
HDD/ODD/EMI
Date: Saturday, April 10, 2010 Sheet 26 of 45
5 4 3 2 1
5 4 3 2 1

AUDIO JACKS
˖̂˷˸˶ʳʻ˖˫˅˃ˈˋˊʼ Earphone
Output Output
FILT_1.65V AVDD_3.3 CN23
1
C835 C842 C846 C843 HPOUT-L R660 5.1/F_6 HPOUT-L2 L42 HCB1608KF-121T20_2A HPOUT-L3 2 7
6 8
1U/10V_6Y 0.1U/16V_4Y 10U/6.3V_8X 0.1U/16V_4Y HPOUT-R R666 5.1/F_6 HPOUT-R2 L44 HCB1608KF-121T20_2A HPOUT-R3 3 9
4 10

Port_A# 5
ADOGND ADOGND
D
+3V R658 0_6 1.2mA(20mils) +3AVDD JA6331-B13NS6B-7H D
C847 C832 C850 Normal Open Jack ADOGND
C830 C504 C518
*100P/50V_4N *100P/50V_4N *0.1U/25V_6X
10U/6.3V_8X 0.1U/16V_4Y 0.1U/16V_4Y

Near chip Layout Note: Path from +5V_IC to LPWR_5.0 and


RPWR_5.0 must be very low resistance ( <0.01 ohms).
AMD G HDA only +3V_S5 GND ADOGND
Intel either +1.5V_S5 or +3V_S5
GND Place bypass caps very close to device. Port_A#

+3V_S5 R697 0_6 0.061mA(15mils) +1.5AVDD_S5_VDD_IO +5AVDD (100mils) L45 PBY160808T-601Y-N_1A +5V D38
*VPORT 0603 220K-V05
C862 C534 C828 C503 D36 *VPORT 0603 220K-V05 HPOUT-L3
+1.5V_S5 R696 *0_6
10U/6.3V_8X 0.1U/16V_4Y 10U/6.3V_8X 0.1U/16V_4Y GND
Determining HDA use +1.5V/+3V R670
0.1/F_1206 D37 *VPORT 0603 220K-V05 HPOUT-R3
GND
GND GND

48.7mA(20mils)
C3A
+3V_S5 R347 0_6 +3AVDD_S5 PIN 20,23,25 CLOSE +5AVDD
C528 C857
Output CLASSD_5V (40mils)
10U/6.3V_8X 0.1U/16V_4Y

R698 C859 C532


FILT_1.8V

C852 C522 C521 C525 C529


SENSE PIN A
R677 0_4 +3AVDD_S5 External MIC
Note:
10K_4 SENSE_A_R
In order for the audio codec to Wake on Jack, the CODEC GND 10U/6.3V_8X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X 10U/6.3V_8X
MIC1-VREFO
VAUX pin (VAUX_3.3, pin 4) must be powered by a rail R340
that is not removed unless AC power is removed. 5.11K/F_4 C808
C3A GND R655 R643

11
24
34

37

35

36

17

20

22
7
2
6
U13 2.2K_4 2.2K_4 *4.7U/6.3V_6X
GND

VDD_IO

CLASSDREF
FILT_1.8
VAUX_3.3
VAUX_3.3

FILT_1.65
DVDD_3.3

AVDD_3.3

LPWR_5.0

RPWR_5.0
AVDD_HP

AVDD_5V
GND C535 0.1U/16V_4Y R338 39.2K/F_4 Port_A#
C C
SENSE_A R339 20K/F_4 Port_B# ADOGND CN22
{7} ACZ_RST#_AUDIO R736 33_4 ACZ_RST#_AUDIO_R 13 1
RESET# MIC1_L1 R328 100/F_6 MIC1_L2 L40 HCB1608KF-121T20_2A MIC1_L3
E3A SENSE PIN B 2 7
6 8
{7} BIT_CLK_AUDIO
E3A R688 0_4 BIT_CLK_AUDIO_R 9
BIT_CLK SENSE_A
50 MIC1_R1 R327 100/F_6 MIC1_R2 L41 HCB1608KF-121T20_2A MIC1_R3 3 9
R754 33_4 ACZ_SYNC_AUDIO_R 12 49 SENSE_B R676 5.11K/F_4 SENSE_B_R +3AVDD_S5 4 10
{7} ACZ_SYNC_AUDIO SYNC SENSE_B
{7} ACZ_SDIN0_AUDIO R687 33_4 SDATA_IN 10
R755 33_4 ACZ_SDOUT_AUDIO_R SDATA_IN TP88 Port_B#
8 48 5
{7} ACZ_SDOUT_AUDIO SDATA_OUT C3A PORTF_R
PORTF_L
47 TP89
DIB_P L22 MDC@0_4 C825 C805 JA6331-B13NS6B-7H
DIB_N L21 MDC@0_4 DIB_P_R 56 46 MIC1-RR C505 2.2U/6.3V_6X MIC1_R1 C486 Normal Open Jack ADOGND
C3A DIB_N_R 55
DIB_P
DIB_N
PORTB_R
PORTB_L
45 MIC1-LL C506 2.2U/6.3V_6X MIC1_L1 100P/50V_4N 100P/50V_4N
R342 100K_4 44 MIC1-VREFO_B R657 0_4 MIC1-VREFO *0.1U/25V_6X
B_BIAS
R691 33_4 PCBEEP_R C855 0.1U/16V_4Y PCBEEP_C 15 42 TP90
{7,10} PCBEEP PC_BEEP C_BIAS
41 TP91
PORTC_R TP92
TP97 54 40
SPDIF PORTC_L GND ADOGND Port_B#
R689 53 39 TP93
TP98 GPIO0/EAPD# PORTE_R
*10K_4 TP99 52 38 TP94
GPIO1/SPK_MUTE# PORTE_L D19
TP100 51
GPIO2/SPDIF2 TP95 D34
33 2 1 *VPORT 0603 220K-V05 MIC1_L3 *VPORT 0603 220K-V05
PORTD_R TP96
Place close to audio codec. PORTD_L
32
GND 3 GND
R345 100_4 DMIC DMIC_3/4 HPOUT-R
{23} INT_DMIC_CLK 4 31
INT_DMIC_DATA DMIC_CLK0 PORTA_R HPOUT-L
{23} INT_DMIC_DATA 5 30
DMIC_1/2 PORTA_L D35 2 1 *VPORT 0603 220K-V05 MIC1_R3 GND
23 27 AVEE
AUXENABLE AVEE FLY_N
1 26
AUX_CLK FLY_N
EXT_MUTE#

25 FLY_P C515 1U/10V_6Y


FLY_P C511 C845
Internal Speaker
EP_GND
RIGHT+

Close to CN2
HPFILT

RIGHT-
LEFT+

LEFT-

GND 0.1U/16V_4Y 10U/6.3V_8X CN2


GND
GND

SPK_R+ R346 PBY160808T-501Y-N_1.2A INSPKR+N 1


SPK_R- R344 PBY160808T-501Y-N_1.2A INSPKR-N 1
2
CX20587-11Z SPK_L- R341 PBY160808T-501Y-N_1.2A INSPKL-N 2
3
C3A
14

43

16

18

19

21

29
28

57

GND SPK_L+ R343 PBY160808T-501Y-N_1.2A INSPKL+N 3


4
DMIC 4
B B
MIC1-LL 88266-04001-06
INT_DMIC_DATA B2A
AMP_MUTE# MIC1-RR
{30} AMP_MUTE#
C30001 *0.1U/16V_4Y
C531 C858 Low Active INSPKL-N
C30000 *0.1U/16V_4Y INSPKL+N
*0.47U/6.3V_4X *0.47U/6.3V_4X INSPKR-N
C30002 *0.1U/16V_4Y INSPKR+N
C509 C510
C538 C527 C524 C520
GND GND ADOGND ADOGND GND *0.47U/6.3V_4X *0.47U/6.3V_4X *47P/50V_4N *47P/50V_4N *47P/50V_4N *47P/50V_4N

GND GND GND GND


GND ADOGND GND GND
For EMI
BIT_CLK_AUDIO ACZ_SDOUT_AUDIO ACZ_RST#_AUDIO SPK_R+
SPK_R- INSPKR+N INSPKR-N INSPKL+N INSPKL-N
C856 C533 C536 SPK_L-
SPK_L+ D4 D3 D1 D2
*10P/50V_4C *10P/50V_4C *10P/50V_4C

*VPORT 0603 220K-V05 *VPORT 0603 220K-V05 *VPORT 0603 220K-V05 *VPORT 0603 220K-V05
GND

INSPKL-N
INSPKL+N
INSPKR-N B2A
INSPKR+N CN24
B2A MDC GND 1
NC NC
2
C537 C526 C523 C519 3 4
220P/50V_4X NC NC
220P/50V_4X 220P/50V_4X 220P/50V_4X 5 6
DIB_P NC NC
7 8
DIB_N DIB_P NC
9 10
A GND GND GND GND DIB_N NC A
11 12 GND
NC NC
MDC@88019-12N0
C508 C507

Close to CHIP *10P/50V_4C *10P/50V_4C

GND GND
Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
A1A
Audio Codec (CX20583)
Date: Saturday, April 10, 2010 Sheet 27 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

0.163A(20mils)
Atheros Lan R103 *SHORT_4
LAN_VDD33 LAN_VDD33
U1
C3A C637 C638 C640 C639 C641
1 39 LAN_LINKLED#
PCIE_LAN_WAKE# 10U/6.3V_8X *10U/6.3V_8X 51@1000P/50V_4X 1U/10V_6Y 0.1U/16V_4Y VDD33 LED1/LED_LINK10/100n LAN_ACTLED
{9,24} PCIE_WAKE# 3 1 38
LED0/LED_ACTn CKREQ#
23
Q11 *2N7002_200MA LED2/CLKREQn
C3A C141 1U/10V_6Y

2
R102 *10K_4
LAN_VDD33
37 DVDDL C145 0.1U/16V_4Y
DVDD_REG DVDDL C627 0.1U/16V_4Y
24
DVDDL
3

$WKHURV
AVDDL C132 0.1U/16V_4Y
D AMD mount Q66, NO mount R727 {3,9,24,29,30} PLTRST# PCIE_LAN_WAKE#
2
PERSTn AVDDL
31
AVDDL C137 0.1U/16V_4Y D
/ 3
WAKEn AVDDL
34
INTEL mount R727, No mount Q66 CKREQ_G#
7
4
VDDCT_REG/CKRn CLK_PCIE_LAN_C R379 0_4
33
R727 *SHORT_4 C631 0.1U/16V_4Y 5AVDD_CEN 5
REFCLKP
32 CLK_PCIE_LAN#_C R378 0_4 CLK_PCIE_LAN {8}
VDDCT REFCLKN CLK_PCIE_LAN# {8}
6 36
B2A C3A B2A 7
RX_N
RX_P
35
PCIE_TXN6 {8}
PCIE_TXP6 {8}
AVDDL 6 30 PCIE_RXP6_C C128 0.1U/10V_4X
 AVDDL_REG TX_P PCIE_RXP6 {8}

{8} PCIE_CLK_REQ3#
PCIE_CLK_REQ3# 3 1 R387 51@0_4 CKREQ_G# R725 52@0_6 AVDD_CEN
AR8151/AR8152 TX_N
29 PCIE_RXN6_C C127 0.1U/10V_4X
PCIE_RXN6 {8}
C159 C160 C157 33P/50V_4N LAN_XTLO 7 28
Q66 *2N7002_200MA R377 52@0_4 CKREQ# C865 *52@1U/10V_6Y XTLO TEST_RST
27

2
0.1U/16V_4Y 1U/10V_6Y Y1 TESTMODE
2 C866 *52@10U/10V_8Y LAN_XTLI 8 26 SB_SMBDATA1_LAN
R731 10K_4 XTLI SMDATA SB_SMBCLK1_LAN
LAN_VDD33 25
C632 52@0.1U/16V_4Y 25MHZ_30 SMCLK

1
C158 39P/50V_4N 40 LX L2 51@4.7uh_C_1A AVDD_CEN
AVDDH LX
9
AVDDH_REG C151 C146 C149
R54 2.37K/F_4 RBIAS 10
RBIAS GND1
41 B2A
C630 C629 51@1000P/50V_4X 51@10U/6.3V_8X 51@0.1U/16V_4Y
TX0P 11
LAN_VDD33 0.1U/16V_4Y 1U/10V_6Y TX0N TRXP0
12
TRXN0 AVDDH C625 0.1U/16V_4Y
22
TX1P AVDDH
14
TX1N TRXP1
15
TRXN1 AVDDH C144 51@0.1U/16V_4Y
16
4
2

TX2P AVDDH AVDDL C150 51@0.1U/16V_4Y


17 19
RP2 TX2N TRXP2 AVDDL AVDDL C134 51@0.1U/16V_4Y
18 13
TRXN2 AVDDL
+3V_S5 LAN_VDD33 TX3P 20

GND10
TRXP3

GND2

GND3

GND4

GND5

GND6

GND7

GND8

GND9
*4.7KX2 TX3N 21
C3A
2

TRXN3
3
1

C Q5 *2N7002_200MA C
3 1 SB_SMBDATA1_LAN R80 *SHORT_6 +3V_S5 AR8151-AL1A-R

42

43

44

45

46

47

48

49

50
{2,8,24,33} SDATA
LAN_P {30}
R71 *SHORT_4
C3A 1 3
+3V_S5 R81
Q9 *AO3413_3A
C183 C195

2
*4.7K_4
*0.01U/25V_4X *0.01U/25V_4X Q8
2

*
Q7 *2N7002_200MA *DDTC144EUA-7-F_30MA
3 1 SB_SMBCLK1_LAN R91 *3.01K/F_4 3 1
{2,8,24,33} SCLK

R89 *SHORT_4
C3A ,
*
$ LED0 = LAN_ACTLED 1 Over-clocking enable (default = 1)
PLACE NEAR LAN IC SIDE
7 5  0 Over-clocking disable
CN13

5 - $ 1
SWR switch-mode regulator select
Giga LAN pull High (default = 1)
$
B2A
AVDD_CEN_T L1 PBY160808T-601Y-N_1A AVDD_CEN
 5 X-TX3N 8
LED1 = LAN_LINKLED#


NC4/3-
1C651  LDO linear regulator select
TX0N

TX1N
TX0P

TX1P

B 51@1000P/50V_4X X-TX3P B
7
U16 NC/3+ 0 10/100M LAN pull Low
6C81 0.1U/16V_4Y AVDD_CEN_T
TX3P
1
2
TCT1 MCT1
24
23
TERM4
X-TX3P $ X-TX1N 6
RX-/1-
TD1+ MX1+ B2A
2
4

2
4

5
C655 51@1000P/50V_4X TX3N X-TX3N X-TX2N Normal function
)C96
3 22 5
RN4 RN3 TD1- MX1- NC2/2- 1
0.1U/16V_4Y AVDD_CEN_T 4 21 TERM3 X-TX2P 4 CKREQ# or CKREQ_G#

TCT2 MCT2 NC1/2+
2C669
49.9X2 49.9X2 TX2P 5 20 X-TX2P
1
3

1
3

51@1000P/50V_4X TX2N TD2+ MX2+ X-TX2N X-TX1P


6
TD2- MX2-
19 3
RX+/1+ 0 ATE test mode
5C102 0.1U/16V_4Y AVDD_CEN_T
TX1P
7
8
TCT3
TD3+
MCT3
MX3+
18
17
TERM2
X-TX1P  X-TX0N 2
TX-/0-

$
C152 C153 C147 C148 C759 51@1000P/50V_4X TX1N X-TX1N X-TX0P
0C109
9 16 1
TD3- MX3- TX+/0+
9
1000P/50V_4X 0.1U/16V_4Y 1000P/50V_4X 0.1U/16V_4Y 0.1U/16V_4Y AVDD_CEN_T TERM1 GND
10 15 10

/
TCT4 MCT4 GND
( C3A
TX0P 11 14 X-TX0P
TX0N TD4+ MX4+ X-TX0N
12 13
TD4- MX4-

5 TRANSFORMER
 JM36111-R3E05-7H

$$
R33 R31 R28 R27 Power on Strapping pin
C3A E3A
75/F_8 75/F_8 LAN_ACTLED R25 5.1K/F_6
C3A
51_52@0_8 51_52@0_8 / LAN_LINKLED#

5
LAN_VDD33
R36 51@5.1K/F_6 R729 52@5.1K/F_6
B2A
TX2N

TX3N
TX2P

TX3P

C3A
$ C3A
2
4

2
4

A RN2 RN1
C591 1500P/3KV_1808X TERM9
 A

51@49.9X2 51@49.9X2
5
B2A
1
3

1
3

C3A Close to LED


R27,R28
GIGA = 75 ohm
$ LAN_ACTLED C59 *470P/50V_4X

C142 C138 C133 C131


10/100 = 0 ohm / LAN_LINKLED# C139 *470P/50V_4X
Quanta Computer Inc.
1000P/50V_4X 0.1U/16V_4Y 1000P/50V_4X 0.1U/16V_4Y
 B2A PROJECT : BL6
$
Size Document Number Rev
A1A
Atheros Lan
/
Date: Saturday, April 10, 2010 Sheet 28 of 45
5 4 3 2 1







http://laptop-motherboard-schematic.blogspot.com/ 


5 4 3 2 1

5 IN 1 CARD READER 3 IN 1 CARD READER VCC_XD 30mils


C517 C512 C516

0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y


+3V_Card
0.043A(20mils) +3V +3V_Card

R662 *SHORT_8

C839 C860 C838 C861 C836 VCC_XD

D
C3A D
10U/6.3V_8X *0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y +3V_Card CN26
11
SD_DAT0/XD_D6/MS_D0 R252 33_4 SD_DAT0/XD_D6/MS_D0_R SD-VCC
18
XD_D4/SD_D1 R251 33_4 XD_D4/SD_D1_R SD-DAT0
19
SD_DAT2/XD_RE# R256 33_4 SD_DAT2/XD_RE#_R SD-DAT1
1
SD_DAT3/XD_WE# R255 33_4 SD_DAT3/XD_WE#_R SD-DAT2
3
R686 SD_MS_CLK R253 33_4 SD_MS_CLK_R SD-DAT3
14
*100K_4 SD_CMD R254 33_4 SD_CMD_R SD-CLK
6
SD_CD# R250 33_4 SD_CD#_R SD-CMD
21 16
SD_WP R249 33_4 SD_WP_R SD-C/D MS-GND
20
SD-WP
17
SD-GND
22
GND

{3,9,24,28,30} PLTRST#
4
SD_DAT0/XD_D6/MS_D0 MS-VCC
12
C853 XD_D3/MS_D1 MS-DATA0
13
1U/10V_6Y XD_D2/MS_D2 MS-DATA1
10
XD_D7/MS_D3 MS-DATA2
7
SD_MS_CLK R230 33_4 SD_MS_CLK_RMS MS-DATA3
5
MS_INS# MS-SCLK
8
XD_D5/MS_BS MS-INS
Y7 Close to U31 Please close 15
MS-BS GND
23

C848 *18P/50V_4C XTLO R668 *0_4 2


SD_MS_CLK_R MS-GND
9
SD-GND

MODE_SEL

SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
Y7 R665
*12MHZ_30 *270K_4 CM3R-065
C463
C840 *18P/50V_4C XTLI R664 *0_4 *10P/50V_4C
C
B2A C

R663 *SHORT_4
{8} 48M_CARD
C3A

48

47

46

45

44

43

42

41

40

39

38

37
U31

AG_PLL

MODE_SEL

RST#

XD_CE#

SD_DAT2/XD_RE#

SD_DAT3/XD_WE#

SD_DAT4/XD_WP#/MS_D7
XTLI

XTLO

XD_CLE

XD_ALE

XD_RDY
(10mils) +1.8V_VDD +1.8V_VDD 1
AV_PLL SD_CMD
36 SD_CMD

R661 6.2K/F_4 CARDREF 2 35


C834 C837 C833 RREF SD_DAT5/XD_D0/MS_D6 C3A
3 34 XD_D1 R325 *SHORT_4 SD_MS_CLK
1U/10V_6Y 0.1U/16V_4Y 0.1U/16V_4Y NC SD_CLK/XD_D1/MS_CLK
{9} USBP3- 4 33 +3V_Card
DM D3V3
{9} USBP3+ 5 32
DP DGND
6 31 XD_D7/MS_D3
AGND SD_DAT6/XD_D7/MS_D3
7 30

+3V_Card 8
NC

3V3_IN
RTS5159-VDD-GR NC

MS_INS#
29 MS_INS#

B VCC_XD XD_D2/MS_D2 B
9 28
CARD_3V3 SD_DAT7/XD_D2/MS_D2
+1.8V_VDD 10 27 SD_DAT0/XD_D6/MS_D0 MODE_SEL
VREG SD_DAT0/XD_D6/MS_D0
+3V_Card 11 26 XD_D3/MS_D1
D3V3 XD_D3/MS_D1 R678 C851
12 25 XD_D5/MS_BS
DGND XD_D5/MS_BS *0_4 *680P/50V_4X
XTAL_CTR

XD_CD#

SD_CD#
SD_WP

MS_D4

MS_D5
XD_D4
GPIO0

EEDO

EECS

EESK

EEDI

B2A
MODE_SEL (Please refer to Realtek Application Notes for more detail description)
13

14

15

16

17

18

19

20

21

22

23

24
R678 C851 Power mode

RTS 5159 0-ohm NC USB Auto De-link mode:


XD_D4/SD_D1
RTS5159_LED#

+3V_Card
XTAL_CTR

SD_CD#
SD_WP
EEDO

EECS

EESK

EEDI

R669

*10K_4 +3V_Card R667 10K_4

B2A
{32} TP_XD_LED# RTS5159_LED#
A A
TP83

TP84

TP85

TP86

C849

0.1U/16V_4Y

XTAL_CTR CLK source

Pull-high 48MHz from CLK gen. Quanta Computer Inc.


Floating 12MHz from Crystal
PROJECT : BL6
Size Document Number Rev
A1A
RTS5159 (Card Reader)
Date: Thursday, April 08, 2010 Sheet 29 of 45
5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

60%8638
EC D16 *VPORT 0603 220K-V05 +3VPCU +3VPCU

MBCLK R134 4.7K_4


MBDATA R129 4.7K_4
+3VPCU +3VPCU_EC 2ND_MBCLK R122 4.7K_4
2ND_MBDATA R126 4.7K_4
0.03A(30mils) 0.03A(30mils) 0.01A(20mils) +3V 3ND_MBCLK R199 4.7K_4
3ND_MBDATA R200 4.7K_4
R109 2.2_6 L19 PBY160808T-601Y-N_1A +A3VPCU +3V_VDD_EC R173 *SHORT_6

C410 C424 C384 C391


C3A ,2%DVH$GGUHVV
0.1U/16V_4Y 10U/6.3V_8X 0.1U/16V_4Y 10U/6.3V_8X

I/O Address
C264 C411 C329 C363 C320 C271 8769AGND

115

102
D D
BADDR1-0 Index Data

19
46
76
88

4
10U/6.3V_8X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y U8
3 cell protect 00 XOR TREE TEST MODE

VCC1
VCC2
VCC3
VCC4
VCC5

AVCC

VDD
R513 *100K/F_4
H=1.6mm +3VPCU for VGA SKU 01 CORE DEFINED
TEMP_MBAT {34}
{7,24} LFRAME# 3
LFRAME AD0/GPI90
97 10 2Eh 2Fh
126 98 ICMNT +3VPCU
{7,24}
{7,24}
LAD0
LAD1 127
LAD0
LAD1
AD1/GPI91
AD2/GPI92
99 AC SET_EC
ICMNT {34}
AC SET_EC {34}
B2A 11 164Eh 164Fh
{7,24} LAD2 128
LAD2 A/D AD3/GPI93
100 USBOC#8_9 {9,31} SHBM=0: Enable shared memory with host BIOS
{7,24} LAD3 1 108 GPU_VRON {20,41}
LAD3 AD4/GPIO05 R718
{9} PCLK_591 2 96 GPU_MAINON {41}
LCLK AD5/GPIO04 NBSWON#
for 14"/15" AD6/GPIO03
95 NBSWON# {31}
8 94 IV@10K_4 BADDR0 BADDR0 R197 *10K_4
option {9} CLKRUN# CLKRUN/GPIO11 AD7/GPIO07 SUSB# {9}
121 BADDR1 BADDR1 R519 10K_4
+3VPCU {10} GATEA20 GA20
101 Cell_separate
DA0/GPI94 RF_EN R487 10K_4
{10} RCIN# 122
KBRST DA1/GPI95
105 VFAN1 {3} SHBM
D/A 106 TP6
{9} SCI#
D7 SW1010CPT_100MA SCI#_uR 29
ECSCI/GPIO54 LPC
DA2/GPI96
DA3/GPI97
107 C3A SUSLED_EC {32}
R719
R751
10K_4 6 EV@10K_4
{23} EC_FPBACK# LDRQ/GPIO24 Disabled ('1') if using FWH device on LPC.
80 BAT_SAT0
GPIO41(VBAT) BAT_SAT0 {32} Enabled ('0') if using SPI flash for both system BIOS and EC firmware
ECGPIO10 124
LPCPD/GPIO10
E3A GPIO GPIO42/TCK
17 RF_LED {32}
R753 7 20
{3,9,24,28,29} PLTRST# LRESET GPIO43/TMS AMP_MUTE# {27}
*10K_4 wake-up GPIO44/TDI
21 ID {34}
{25} USB_EN#0 123
PWUREQ/GPIO67
capability GPIO50/TDO
CIRTX2/GPIO52/RDY
25
27
D/C# {34}
DISPON {23}
,'
125 +3VPCU
{7,24} SERIRQ SERIRQ U5
no wake-up GPO82/TRIS 110 WMAX_P {24} For Intel
BAT_SAT1 9 capability GPO84/BADDR0 112 BADDR0 2ND_MBCLK 6 1
{32} BAT_SAT1 SMI/GPIO65 2ND_MBDATA 5
SCL
SDA
A0
A1
2 0.003A(20mils)
111 BADDR1 3
C3A {31} MX0 54
KBSIN0
SOUT_CR/GPO83/BADDR1
SIN_CR/CIRRX/GPIO87
113 TP_ON_OFF {31}
A2

{31} MX1 55
KBSIN1 SER GPIO06
93 LID591# {23} 7
WP VCC
8
{31} MX2 56 4
KBSIN2 GND C270
C
{31} MX3 57 32 CONTRAST {23}
C
KBSIN3 A_PWM/GPIO15 HWPG_VGA M24C08-WMN6TP
{31} MX4 58 118
KBSIN4 B_PWM/GPIO21 0.1U/16V_4Y
59 62
{31}
{31}
MX5
MX6 60
KBSIN5
KBSIN6
C_PWM/GPIO13
D_PWM/GPIO32
65
CCD_POWERON {23}
USBOC#13 {9,25}
C3A
{31} MX7 61
KBSIN7 PWM E_PWM/GPIO45
22 SUSON {36} ADDRESS: A0H
16 MAINON {3,11,37,38,40}
F_PWM/GPIO40/CLKIN48
{31} MY0 53 81 BT_POWERON {31}
KBSOUT0/JENK G_PWM/GPIO66 PWRLED# +3V
{31} MY1 52 66 PWRLED# {32}
KBSOUT1/TCK H_PWM/GPIO33
{31}
{31}
MY2
MY3
51
50
KBSOUT2/TMS
KBSOUT3/TDI
Q19
63,)/$6+ For Intel

2
49 KB 31 2N7002_200MA
{31} MY4 KBSOUT4/JEN0 TA1/GPIO56 3G_P {24}
{31} MY5 48 63 FANSIG1 {3}
KBSOUT5/TDO TB1/GPIO14
{31} MY6 47 117 3 1 TEMP_ALERT# {3,10}
KBSOUT6/RDY TA2/GPIO20
{31} MY7 43
KBSOUT7 TIMER TB2/GPIO01
64 ACIN {32,34}
{31} MY8 42 26 S5_ON {36,40}
KBSOUT8 TA3/GPIO51 R196 *0_4
{31} MY9 41 15 VRON {39}
KBSOUT9 TB3/GPIO36 +3VPCU
{31} MY10 40
KBSOUT10
39
{31}
{31}
MY11
MY12 38
KBSOUT11
KBSOUT12/GPIO64 SPI_DI/GPIO77
84 BT_RESET {31}
U10 0.025A(20mils)
37 SPI 83 RF_EN SPI_SDI_uR R170 33_4 SPI_SDI 2 8
{31}
{31}
MY13
MY14 36
KBSOUT13/GPIO63
KBSOUT14/GPIO62
SPI_DO/GPO76/SHBM
SPI_SCK/GPIO75
82 ODD_EN
RF_EN {24}
ODD_EN {26}
E3A SO VDD

{31} MY15 35 91 DNBSWON#_uR D14 SW1010CPT_100MA


DNBSWON# {9,33}
SPI_SDO_uR R216 33_4 SPI_SDO 5 7 C428
KBSOUT15/GPIO61/XOR_OUT GPIO81 SI HOLD
{31} MY16 34
KBSOUT16/GPIO60 RSMRST# R726 *10K_4 SPI_SCK_uR R217 33_4 SPI_SCK 0.1U/16V_4Y
{31} MY17 33 75 RSMRST# {9} +3VPCU 6 3
KBSOUT17/GPIO57 IRRX1/GPIO72/SIN2 SCK WP
FIR IRRX2_IRSL0/GPIO70
73 SUSC# {9}
74 MPWROK SPI_CS0#_uR 1 4
{34} MBCLK
MBCLK 70
SCL1/GPIO17
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST
23
MPWROK {3,9}
R750 C3A0_4 PCH_GPIO33 {7,10} CE VSS
MBDATA 69 14 +3VPCU R177 10K_4 W25X40BVSSIG
{34} MBDATA SDA1/GPIO22 GPIO34/CIRRXL
2ND_MBCLK 67 SMB CIR 114
{8} 2ND_MBCLK SCL2/GPIO73 CIRTX1/GPIO16 NUMLED {31}
2ND_MBDATA 68 109
{8} 2ND_MBDATA SDA2/GPIO74 CIRTX2/GPIO30 CAPSLED {31}
3ND_MBCLK 119
{22} 3ND_MBCLK SCL3/GPIO23
3ND_MBDATA 120 Intel 512KB W25X40BVSSIG
{22} 3ND_MBDATA SDA3/GPIO31
24 86 SPI_SDI_uR R167 100K_4
{24} 3G_EN SCL4/GPO47 F_SDI/F_SDIO1 BT_RFCTRL {24}
HWPG 28 87 SPI_SDO_uR
SDA4/GPIO53 F_SDO/SDIO0 SPI_CS0#_uR
FIU F_CS0
90
B2A AMD 2MB W25Q16BVSSIG
92 SPI_SCK_uR
F_SCK
For Intel 72
B
{31}
{31}
TPCLK
TPDATA 71
PSCLK1/GPIO37
PSDAT1/GPIO35
TP4 E3A B
{3} S3_Reduce 10
PSCLK2/GPIO26
{3} 2.5V_EN {31} USB_EN#1
{28} LAN_P
11
12
PSDAT2/GPIO27
PSCLK3/GPIO25
PS/2 CLKOUT/GPIO55
30 SUS_PWR_ACK {9} For Intel ,17(51$/.(<%2$5'675,36(7
For AMD 13 85 VCC_POR# R158 4.7K_4 +3VPCU +3VPCU
{23} CRT_SENSE# PSDAT3/GPIO12 VCC_POR
8768_32KX1 R703 *SHORT_4 8768_32KX1_R VREF_uR R190 0_4 +A3VPCU MY0 R111 10K_4
VCORF

77 104
32KX1/32KCLKIN VREF
AGND
GND1
GND2
GND3
GND4
GND5
GND6

R150 20M_6 8768_32KX2 R702 *SHORT_4 8768_32KX2_R 79


32KX2
C3A WPCE775LA0DG
5
18
45
78
89
116

103

44

R152 R704 *0_4


{9} SUSCLK
Y2 33K/F_4 +:3* +3V
VCORF_uR

1 4
2 3
L37 0_6 R198
C326 32.768KHZ_10 C344
C269 10K_6
18P/50V_4C 18P/50V_4C
1U/10V_6X D32 *EV@SW1010CPT_100MA
{41} VGPU_IO_PG
8769AGND 8769AGND B2A{20} +1.8V_GPU_PWGD
D45 *EV@SW1010CPT_100MA HWPG_VGA

+3V

R132

10K_6

60%867DEOH /('383'
+5V D13 IV@SW1010CPT_100MA
{42} HWPG_VAXG
SMBUS Devices Address R464 10K_4 TPCLK Intel D9 SW1010CPT_100MA HWPG
{35} SYS_HWPG HWPG {3}
1 Battery R461 10K_4 TPDATA
A +3VPCU Intel A
PCLK_591 B2A{38} HWPG_1.05V
D10 *4C@SW1010CPT_100MA
AMD {38} HWPG_NB_CORE
PCH SML1 PWRLED# R116 10K_4
2 •˜œŽȱ˜ȱŗŜ Intel {36} HWPG_1.5V
D8 SW1010CPT_100MA
AMD SMBus 98H DNBSWON#_uR C388 *0.1U/16V_4Y R185 R117 *10K_4
Intel D11 SW1010CPT_100MA
{37} HWPG_VTT
EC EEPROM A0H *22_4 AC SET_EC ICMNT
AMD {37} +1.1V_HWPG
VGA Board Thermal Sensor 98H NBSWON# SW1 *SHORT_ PAD

3
D15
*EGA10402V05AH
http://laptop-motherboard-schematic.blogspot.com/
C403

*10P/50V_4C
C740

*10U/6.3V_8X

8769AGND
C413

*10U/6.3V_8X
BAT_SAT0
BAT_SAT1
R476
R495
10K_4
10K_4 Quanta Computer Inc.
PROJECT : BL6
8769AGND Size Document Number Rev
A1A
EC-WPC8763LDG/WPC8769L(O)
Date: Saturday, April 10, 2010 Sheet 30 of 45
5 4 3 2 1
5 4 3 2 1

+3VPCU CN3
INT KeyBoard
36 TP board Bluetooth
R84
C3A
*SHORT_8
(20mils) CN6
B2A
K_LED_P +5V_TP 1
1 +5V 1
MY16 2 CN7
10 1 MX6 2
3
MY16 {30} {30}
{30}
TPCLK
TPDATA 3
2
3
BT_POWER C3A 1
1
MX0 9 2 MX1 MY17 4 R738 *SHORT_6 2
4 MY17 {30} {30} TP_ON_OFF 4 {9} USBP2+ 2
MX4 8 3 MX5 5 R739 *SHORT_6 3
5 5 {9} USBP2- 3
MX3 7 4 MX7 K_LED_P C136 C135 6 4
6 6 {30} BT_RESET 4
MX2 6 5 MY2 5
7 MY2 {30} {10} BT_Detect# 5
MY1 *10P/50V_4C *10P/50V_4C 6
8 MY1 {30} 6
RP1 10KX8 MY0 88513-064N
9 MY0 {30}
MY4 *87213-0600L
10 MY4 {30} +5V +5V
C8 *220P/50V_4X MX7 MY3 C104 *220P/50V_4X
D 11 MY3 {30} D
C4 *220P/50V_4X MX2 MY5 C55 *220P/50V_4X
C5 *220P/50V_4X MX3 12
13
MY14
MY5
MY14
{30}
{30}
E3A
C6 *220P/50V_4X MX4 MY6
14
15
MY7
MY6
MY7
{30}
{30}
C3A
MY13 C186 C172 R433 *SHORT_8
16
17
MY8
MY13
MY8
{30}
{30} 4.7U/6.3V_6X 0.1U/16V_4Y 0.2A(20mils)
C7 *220P/50V_4X MX0 MY9
18 MY9 {30}
C2 *220P/50V_4X MX5 MY10
19 MY10 {30}
C3 *220P/50V_4X MX6 MY11 +3V 1 3 BT_POWER
20 MY11 {30}
C1 *220P/50V_4X MX1 MY12
21 MY12 {30}
MY15 C666 *10U/6.3V_8X

+
22 MY15 {30}
MX7 Q42
MX7 {30}

2
23 MX2 C662 *1000P/50V_4X
24 MX2 {30}
C21 *220P/50V_4X MY7 MX3 *AO3413_3A
25 MX3 {30}
C22 *220P/50V_4X MY13 MX4 C658 *0.1U/16V_4Y
C9 *220P/50V_4X MY12 26 MX0
MX4 {30} USB board Power board
27 MX0 {30}
C10 *220P/50V_4X MY15 MX5
28 MX5 {30}
MX6
29 MX6 {30} +3V
MX1
30 MX1 {30}
K_LED_P CN9
31 CAPSLED
32 CAPSLED {30} 1 +5VPCU
C17 *220P/50V_4X MY3
C18 *220P/50V_4X MY5 33 2
C19 *220P/50V_4X MY14 34 3 R446
C20 *220P/50V_4X MY6 4 *4.7K_4
5
35 NUMLED 6
91504-340N
NUMLED {30} 7 B2A CN4

3
C13 *220P/50V_4X MY2 8
C14 *220P/50V_4X MY1 9 1
10 {30} NBSWON# 2
C15 *220P/50V_4X MY0 R740 0_6 2
11 USBP8+ {9} 3 BT_POWERON {30}
C16 *220P/50V_4X MY4 R741 0_6
C 12 USBP8- {9} 4 C
13 R742 0_6 88513-044N Q41
USBP9+ {9}

1
14 R743 0_6 +3V +3V *DDTC144EUA-7-F_30MA
15 USBP9- {9}
C12 *100P/50V_4N MY17
16
17 USB_EN#1 {30}
18 USBOC#8_9 {9,30}
C11 *100P/50V_4N MY16
19 C668 C672
20
*4.7U/6.3V_6X *0.1U/16V_4Y

88511-200N
(10mils)
+3V R1 150_4 K_LED_P

NUT HOLE
B2A
HOLE5 HOLE17 HOLE12 HOLE6 HOLE7
HOLE8 HOLE9 HOLE13 HOLE14 HOLE15 HOLE24 HOLE25 7 6 *H-C335D256P2 7 6 7 6 7 6
CPU *h-tc354bc217d150p2 *h-tc354bc217d150p2 *h-tc354bc217d150p2 *h-tc354bc217d150p2 VGA *EV@H-C236D142P2 *EV@H-C236D142P2 *EV@H-C236D142P2 8
9
5
4
8
9
5
4
8
9
5
4
8
9
5
4

1
2
3

1
2
3

1
2
3

1
2
3
1
1

1
*HG-TC335BC268D110P2 *HG-TC335BC268D110P2 *HG-TC335BC268D110P2 *HG-TC335BC268D110P2
B B

HOLE16 HOLE3
7 6 7 6 HOLE38 HOLE36 HOLE37 HOLE35
8 5 8 5 *h-c236d91p2 *h-c236d91p2 *h-c236d91p2 *h-c236d91p2
B2A 9 4 9 4

1
2
3

1
2
3
HOLE1 HOLE2 HOLE19 HOLE20
SIM *3G@H-C236D142P2 *3G@H-C236D142P2 3G Card *3G@H-C236D158P2 *3G@H-C236D158P2

1
*HG-TC335BC268D110P2 *HG-TC335BC268D110P2
B2A
HOLE26 HOLE23 HOLE11 HOLE4 HOLE30
1

7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3
B2A
*HG-TC268BC335D110P2 *HG-TC268BC335D110P2 *HG-TC268BC335D110P2 *HG-TC268BC335D110P2 *HG-TC268BC335D110P2

WLAN Card HOLE21


*H-TC217BC236D158P2
HOLE22
*H-TC217BC236D158P2
MDC 7
HOLE27
6 7
HOLE31
6 7
HOLE18
6 7
HOLE29
6 7
HOLE10
6
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3
1

A A
*MDC@HG-C236D146P2 *HG-TC268BC335D110P2 *HG-TC268BC335D110P2 *HG-TC268BC335D110P2 *HG-TC268BC335D110P2

C3A
HOLE28 HOLE32 HOLE33 HOLE34
HOLE39 HOLE40 HOLE41 HOLE42 *H-TC268BC335D110P2 *H-C87D87N *H-O102X83D102X83N *spad-re118x118p
*spad-re118x118p *spad-re118x118p *spad-re118x118p *spad-re118x118p
Quanta Computer Inc.
PROJECT : BL6
1

1
http://laptop-motherboard-schematic.blogspot.com/
Size Document Number Rev
1

A1A
C3A KB/TP/PB/USB/HOLE
Date: Saturday, April 10, 2010 Sheet 31 of 45
5 4 3 2 1
5 4 3 2 1

LED
˕˔˧˘˥˥ˬ C3A
˔˖ˀ˜ˡ Full Charge = White E3A 2mA BAT_SAT0

2
BAT_SAT0 {30}

ACIN_R R306 10K_4 2 -BATLED0 R335 1.5K/F_4 BATLED0_R 3 1


C3A E3A +5VPCU
Q24 ME2N7002DW_250MA

3
+5VPCU 1
2

3 1 ACIN_C R275 1.5K/F_4ACIN_A


+5VPCU 2 ACIN
LED3 12-11/T3D-CP1Q2B12Y/2C ACIN {30,34} 3 -BATLED1 R324 1.2K/F_4 BATLED1_R 3 1
D Q20 MMBT3906_NL_200MA Q22 LED4 12-12/S2ST3D-C30/2C Q23 ME2N7002DW_250MA D
DDTC144EUA-7-F_30MA

1
2mA

2
BAT_SAT1
Charging = Orange BAT_SAT1 {30}
B2A E3A
ˣˢ˪˘˥ ˖˔˥˗˥˘˔˗˘˥
TP_XD_LED
C3A TP_XD_LED# {29}

+5VPCU DC IN = White R334


2mA E3A *10K_4

2 -PWRLED R700 1.5K/F_4 PWRLED#_Q

1 C3A E3A

3
R699

2
0_4
3 -SUSLED R305 1.2K/F_4 -SUSLED_R -TP_XD_LED 3 1 TP_XD_LED_A R695 1.5K/F_4 +5V
LED5 12-12/S2ST3D-C30/2C Q61 2 PWRLED# Q26 MMBT3906_NL_200MA LED2 12-11/T3D-CP1Q2B12Y/2C
PWRLED# {30}

S3 Mode = Orange 2mA *ME2N7002DW_250MA B2A


B2A
3

1
2 SUSLED_EC
SUSLED_EC {30} ˛˗˗˂ˢ˗˗
Q21
DDTC144EUA-7-F_30MA
1

C C
+5V

R331
˥˙ʳ˟˘˗ *10K_4
ʳ˔̀˵˸̅ C3A E3A
2

+5V 1 3 -SATA_LED R330 1.5K/F_4 SATA_LED#_C HDDLED# Q27 MMBT3906_NL_200MA


3 1 RF_LED_R R701 560_4 LED1 12-11/T3D-CP1Q2B12Y/2C
LED6 12-21/S2C-AL1M2VY/2C/2C RF_LED {30}

2
+3V R333 10K_4
SATA_LED# {7}

ESD Protect
˙ˢ˥ʳˣˢ˪˘˥ʳ˟˘˗ ˙ˢ˥ʳ˕˔˧˧˘˥ˬʳ˟˘˗ ˙ˢ˥ʳ˛˗˗˂˥˙ʳ˟˘˗ ˙ˢ˥ʳ˖˔˥˗˥˘˔˗˘˥ʳ˟˘˗
B B
D41 D40 D39 D44
-PWRLED -BATLED1 RF_LED_R
1 1 1 1

3 3 3 3
-SUSLED -BATLED0 -SATA_LED -TP_XD_LED
2 *PJMBZ5V6 2 *PJMBZ5V6 2 *PJMBZ5V6 2 *PJMBZ5V6

A A

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
A1A
LED
Date: Thursday, April 08, 2010 Sheet 32 of 45
5 4 3 2 1
5 4 3 2 1

&38;'3

CN16

1 2
GND0 GND1
{3} XDP_PREQ# 3 4
OBSFN_A0 OBSFN_C0
{3} XDP_PRDY# 5 6
D OBSFN_A1 OBSFN_C1 D
7 8
GND2 GND3
{3} XDP_OBS0 9 10
OBSDATA_A0 OBSDATA_C0
{3} XDP_OBS1 11 12
OBSDATA_A1 OBSDATA_C1
13 14
GND4 GND5
{3} XDP_OBS2 15 16
OBSDATA_A2 OBSDATA_C2
{3} XDP_OBS3 17 18
OBSDATA_A3 OBSDATA_C3 +VTT
19 20
GND6 GND7
21 22
OBSFN_B0 OBSFN_D0
23 24
OBSFN_B1 OBSFN_D1
25 26
GND8 GND9
{3} XDP_OBS4 27 28
OBSDATA_B0 OBSDATA_D0
{3} XDP_OBS5 29 OBSDATA_B1 OBSDATA_D1 30
31 32 R440
GND10 GND11 51/F_4
{3} XDP_OBS6 33 OBSDATA_B2 OBSDATA_D2 34
{3} XDP_OBS7 35 OBSDATA_B3 OBSDATA_D3 36
37 38 +VTT
+VTT R460 *1K_4 H_CPUPWRGD_XDP GND12 GND13
{3,10} H_PWRGOOD 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_BCLK_ITP {3}
{9,30} DNBSWON# 41 HOOK1 ITPCLK#/HOOK5 42 CLK_CPU_BCLK_ITP# {3}
43 VCC_OBS_AB VCC_OBS_CD 44
45 46 XDP_RST#_R R429 *1K_4
{3} H_PWRGD_XDP HOOK2 RESET#/HOOK6 H_CPURST#_R {3}
47 HOOK3 DBR#/HOOK7 48 SYS_RESET# {3,9}
49 GND14 GND15 50
C688 51 52 C679
{2,8,24,28} SDATA SDA TDO XDP_TDO {3}
*0.1U/16V_4Y {2,8,24,28} SCLK 53 SCL TRSTN 54 XDP_TRST# {3} *0.1U/10V_4X
55 TCK1 TDI 56 XDP_TDI {3}
{3} XDP_TCLK 57 TCK0 TMS 58 XDP_TMS {3}
59 GND16 GND17 60

*Samtec BSH-030-01

C
C3A C

Feature SKU Name (S)


Set Q57 H57 H55 P55 P57

BraidWood Y Y N N Y

3&+;'3

+3V
Note: For ES1/ES2 version all stuff CN10
Production version all No stuff 3
5
OBSFN_A0 VCC_OBS_CD
44
43
OBSFN_A1 VCC_OBS_AB
9 21
OBSDATA_A0 OBSFN_B0
11 23
OBSDATA_A1 OBSFN_B1
15 4
OBSDATA_A2 OBSFN_C0
17 6
+3V_S5 OBSDATA_A3 OBSFN_C1
27 10
OBSDATA_B0 OBSDATA_C0
29 12
B OBSDATA_B1 OBSDATA_C1 B
33 16
OBSDATA_B2 OBSDATA_C2
35 18
OBSDATA_B3 OBSDATA_C3
41 22
HOOK1 OBSFN_D0
45 24
HOOK2 OBSFN_D1
40 28
R673 R672 R671 R674 ITPCLK/HOOK4 OBSDATA_D0
42 30
ITPCLK#/HOOK5 OBSDATA_D1
48 34
*200_6 *200_6 *200_6 *20K/F_4 DBR#/HOOK7 OBSDATA_D2
51 36
SDA OBSDATA_D3
53 47
PCH_JTAG_TDO SCL HOOK3
{7} PCH_JTAG_TDO 52 55
PCH_JTAG_RST# TDO TCK1
{7} PCH_JTAG_RST# 54 39
PCH_JTAG_TDI TRSTN PWRGOOD/HOOK0
{7} PCH_JTAG_TDI 56 46
PCH_JTAG_TMS TDI RESET#/HOOK6
{7} PCH_JTAG_TMS 58 1
PCH_JTAG_TCK TMS GND0
{7} PCH_JTAG_TCK 57 2
TCK0 GND1
60 7
R684 R683 R680 R682 59
50
49
GND17
GND16
GND15
GND14
PCH XDP GND2
GND3
GND4
GND5
8
13
14
*100/F_4 *100/F_4 *100/F_4 *10K/F_4 38 19
GND13 GND6
37 20
GND12 GND7
32 25
GND11 GND8
31 26
GND10 GND9
*Samtec BSH-030-01

A A

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
A1A
NVRAM Connector
Date: Wednesday, April 07, 2010 Sheet 33 of 45

5 4 3 2 1
5 4 3 2 1

PCN2 B2A
4 DC_JACK 1
PF1
TR/3216FF15-R_15A
2 VA0
PL1
HI0805R800R-00_5A
VA1

C3A
PD2
SBR1045SP5-13_10A
1
3 VA2 1
0.01_3720
PR49
R1
2 VA3 C3A
C3A
B2A
3
PQ20

4
VIN
AOD425_40A_P
C3A 3
PQ15
AOD425_40A_P
4
34
BAT-V

1
2 PD11

1
3 PL2
HI0805R800R-00_5A PC136 PC132 PR46

1
1
PC223 PC34 PR45 33K_6
2 PC221 0.1U/50V_6X 220K/F_6 PC224 0.1U/50V_6X PD8
C3A

2
4.7U/25V_8X 4.7U/25V_8X 4.7U/25V_8X *SMAJ20A_Little fuse_TVS 2200P/50V_6X

2
D
1 D
PD3 PD9 PR51 PR50

2
PC46 PC222 PC45 10/F_6 10/F_6 PC215
C3A 4.7U/25V_8X C3A PR47
20277-044L SW1010CPT_100MA 0.1U/50V_6X 0.1U/50V_6X ( Near by sense R side) *SMAJ20A_Little fuse_TVS 10K_6 *0.1U/50V_6X
PR40 1 6
SMAJ20A_Little fuse_TVS 220K/F_6
2 5

3
3 4 E3A
PQ1
PR52 CSIN PQ17 PR43 *SHORT_4 2 BAM7002_300MA
{30} D/C#
82.5K/F_6 IMD2AT108
+3VPCU
CSIP
{30} AC SET_EC

1
PR3 VIN
PC50 PR53 10K/F_6 PC30
10K_6 1U/16V_6X
10U/10V_8X

PR143
( Near by IC side) PC25 4.7_6 PC18
0.1U/50V_6X 1U/16V_6X

5
6
7
8
PC13 PC14
0.1U/50V_6X 10U/25V_1206X
ACIN PD7 PC12

33
32
31
30
28

27

26

21
C
{30,32} ACIN 4 C

1
PC1 +3VPCU RB500V-40_100MA 2200P/50V_6X
0.1U/50V_6X

CSSP

VDDP
NC
GND
GND
GND
GND

CSSN

VCC
PR37 PC32 PQ14
2.7_6 0.1U/50V_6X AO4468_11.4A_P
{30} MBDATA 11 25

3
2
1
VDDSMB BOOT
0.01_3720
{30} MBCLK 9 24 88731A_U_GATE PR148
SDA UGATE C3A
10 SCL PHASE 23 88731A_PHASE PL3 3.3uH_7x7 1 2 BAT-V C3A

5
6
7
8
13 20 88731A_L_GATE PR5
ACOK LGATE E3A
PC31 4 2.2/F_6
PR152 0.1U/50V_6X 19 PR28 PR27
49.9/F_6 PU1 PGND 10/F_6 10/F_6
DCIN 22 ISL88731A PQ12
DCIN AO4710_12.7A_P PC2 ( Near by sense R side)
PR146 2200P/50V_6X PC128
82.5K/F_6 3.2V 18 2200P/50V_6X

3
2
1
88731ACIN CSOP PC21 PC131 PC122 PC219
2
C3A ACIN PC3 10U/25V_1206X 10U/25V_1206X 10U/25V_1206X
0.1U/50V_6X CSOP 0.01U/50V_6X
PR141 3 ( Near by IC side)
22K/F_6 VREF CSON
+3VPCU CSON 17
B B
PC220 4
4.7U/25V_8X PL14 ICOMP
NC 16
PR20 PR14 HI0805R800R-00_5A PR4 0_4
C3A *100K_4 10K_6 5 NC
PCN1
PF2 PL15 C3A VBF 15 PR1 100_4 BAT-V
HI0805R800R-00_5A 6
11 MBAT+ BAT-V VCOMP
9 1 2 GND 29 (Please place this R near by battery pack side)

GND
8

ICM
ID TR/3216FF20-R_20A NC

NC
7 ID {30}
6 TEMP_MBAT_C PC214
7

14

12
5 M-DATA *0.1U/50V_6X
4 M-CLOCK PR7
3 2.21K/F_6
2 PC7 PC11 +3VPCU
1 47P/50V_6N 47P/50V_6N
10
PR18 PR19 PC5
BTJ-09WG0B 100/F_4 100/F_4 PR13 0.01U/50V_6X PR2
100K/F_6 ICMNT {30}
MBDATA {30} PC22 PC17 PC6 100_4
*1U/16V_6X 0.01U/50V_6X *0.01U/50V_6X
MBCLK {30} PC109
TEMP_MBAT {30}
10U/10V_8X
1

PU2 PR16
A CM1213-04SO *100K/F_6 PC8 A
1 6 MBDATA 0.01U/50V_6X
2

CH1 CH4
2 VN VP 5 +3VPCU
TEMP_MBAT_C3 4 MBCLK
CH2 CH3
Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
Charger (ISL88731) 1A

Date: Thursday, April 08, 2010 Sheet 34 of 45


5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

MAIND
MAIND {5,36,40}

39K/F_4 PR92
For RT8210B 0_4 & 10K_4
35
{3,16} SYS_SHDN# 1 2 2 1 VL
PR91 0_4
For ISL6237 ZD5.6V , 100K/F_4 & 200K/F_4
B2A C3A B2A

1
D VIN VIN D
*SHORT_4 *SHORT_4 VL

1
PR89 PR95

2
PR69 PD6 f : 500k Hz

2
0_4 *ZD5.6V

5V_EN

3V_EN
PC88

2
4.7U/25V_8X

1
(Peak 9A, AVG 7.623A)

0.1U/50V_6X
PR72 PC85 PC76 PC71 PC74

2
(Peak 10.2 ,AVG 8.135A) PC92 PC91 PC93 0.1U/50V_6X 1U/16V_6X 0.1U/50V_6X 10U/25V_1206X

2
0_4
PR81

PC72
0.1U/50V_6X 2200P/50V_6X 10U/25V_1206X 10K/F_4 PC69 OCP:11A

5
6
7
8
f : 400k Hz PC81 PR76 2200P/50V_4X
*1U/10V_4X 0_4
+3VPCU
OCP:11A

1
REF 4

1
3V_DH PQ29

8
7
6
5
PR73 *0_6 AO4468_11.4A_P

+5VPCU
PR78 B2A
*200K/F_4

8
7
6
5
4
3
2
1
4 5V_DH
PL8
7A

NC
LDO
VIN
NC
ONLDO
VCC
TON
REF

3
2
1
2.2uH_10x10

B2A E3A PQ33


AO4468_11.4A_P PR71 3V_LX
E3A C3A

5
6
7
8
+5VPCU_SRC 9 32 REFIN2 287K/F_6
6A PL10 C3A 10
BYP FB2
31 1 2 E3A
1
2
3
2.2uH_10x10 OUT1 ILIM2 PR80
C 11 FB1 OUT2 30 C
+5VPCU_SRC 5V_LX 1 2 12 PU5 29 SKIP 4
PR90 DDPWRGD_R 13 ILIM1 RT8210B SKIP# DDPWRGD_R 2.2/F_6 PC226
PGOOD1 PGOOD2 28
2

8
7
6
5
280K/F_6 5V_EN 14 27 3V_EN PR67 +

C3A PR93 PR87 15


EN1
DH1
EN2
DH2 26 C3A 0_6
PC225 16 25 PC64 PC145 10U/10V_8X
*0_6 2.2/F_6 5V_DL LX1 LX2 PC73 0.1U/50V_6X 330U/6.3V_105CE_f
4 37 PAD
10U/10V_8X 36 2200P/50V_6X
1

3
2
1
PAD

PGND
PVCC
+

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
PC99 PC89 PC70 PQ30

NC
2

PC163 PC90 0.1U/50V_6X 0.1U/50V_6X AO4710_12.7A_P


0.1U/50V_6X PR86 PQ32 PR79

35
34
33

17
18
19
20
21
22
23
24
330U/6.3V_105CE_f 2200P/50V_6X AO4710_12.7A_P PR84 1/F_6
1
2
3

0_6 1/F_6 1 2
1 2 3V_DL
1

PR68
*0_6
VL PR82 SKIP PR75 *0_6 REF
0_6
PC68
2 0.1U/50V_6X PC83 +3VPCU PR74 0_6
PD5 1U/16V_6X
CHN21UPT_100MA 3 B2A
10K/F_6 PR94
1

2 PR88
PC65
0.1U/50V_6X PD4 PR70 0_6 DDPWRGD_R
3 SYS_HWPG {30}
CHN21UPT_100MA
B B
PC67
1 0.1U/50V_6X *SHORT_4

PR66
+15V_ALWP
+15V +5VPCU

22_8 PC66
0.1U/50V_6X

+5VPCU

5
6
7
8
+3VPCU

MAIND 4

1
2
5
6
+3VPCU
PQ4
AO4496_10A S5D 3 PQ59
5
6
7
8

AO6402A_7A

3
2
1

4
S5D 4
{40} S5D
1
2
5
6

+5V_S5
PQ3 MAIND 3 PQ2
A AO4496_10A AO6402A_7A
+5V 0.001A A

2.744A~4.984A
3
2
1

+3V

1.984A Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/
4.253A
+3V_S5

Size Document Number


PROJECT : BL6
Rev
1A
System 5V/3V (ISL6237)
Date: Wednesday, April 07, 2010 Sheet 35 of 45
5 4 3 2 1
5 4 3 2 1

36
D D

PC54 10U/10V_8X

PC58
PR58
0.1U/50V_6X B2A
+SMDDR_VTERM VIN
2.2/F_6 1.5SUS_HG
0.35A PC51 PC52 C3A B2A
10U/10V_8X 10U/10V_8X

5
1.5SUS_LG

PQ26 PC61 PC59 PC57

25

24

23

22

21

20

19

1
2
3
AOL1428A_12.4A_P 2200P/50V_6X 10U/25V_1206X 10U/25V_1206X

E3A B2A
GND

VTT

VLDOIN

VBST

DRVH

LL

DRVL
PL7
1.5uH_10x10
1 18 1.5SUS_PHASE +1.5VSUS
VTTGND PGND

2 17
VTTSNS CS_GND
C3A C3A C3A PR62

5
PR64
3 UP6163 16 2.2/F_4
GND CS
C PU4 6.49K/F_6 4 + PC47 + PC43 PC216 C
+1.5VSUS 4 15
MODE V5IN +5V_S5
PQ27 *330U/2V_7343P_E9b 330U/2V_7343P_E9b 10U/10V_8X

1
2
3
PR65 5.1/F_6 AOL1412_17A_P
+SMDDR_VREF 5 VTTREF V5FILT 14 C3A C3A
PC60

1
2200P/50V_6X
VDDQSNS

VDDQSET

+5V_S5 6 13 PC63 PC62


0.07A COMP PGOOD 1U/10V_4X 1U/10V_4X

2
OCP 15A
NC

NC
S3

S5

PC53 PR63 100K/F_6 +3VPCU (Peak 12.96A, AVG 9.77A)


0.033U/50V_6X
7

10

11

12

FOR DDR III


HW PG_1.5V {30}
f : 400k Hz
PR61 For RT8207A 400KHZ
VIN
620K/F_4 F=400K
S5_1.5V PR60 Rilim=Ilim*LRdson/10uA
0/F_6 SUSON {30}
S3_1.5V Vout=0.75*[1+(R1+R2)]
S3_1.5V {3}
PR59
Be careful to this two net name.
+5VPCU
*0/F_6

PC56

PC55 PR57
Vout = (R1/R2) X 0.75 + 0.75
B *0.1U/50V_6X *33P/50V_6X *10K/F_4 B
R1

PT2 PR55 *0_6

PT1 PR54 *0_6


PR56
+1.5VSUS
0_4
R2 1
2
5
6

C3A
MAIND 3 PQ10
{5,35,40} MAIND AO6402A_7A

B2A PU13
4

PR245 *0/F_6 3 5 +1.5V_S5


{30,40} S5_ON SHDN VO
2
GND
1 4 PC204 0.000427A
Change to Page3 +1.5V
+3VPCU
VIN
*G909
NC *1U/16V_6X

PC206
*2.2U/10V_6X
A 0.35A A

PC205
*0.1U/50V_6X

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ PROJECT : BL6
Size Document Number Rev
DDR 1.5V(UP6163) 1A

Date: W ednesday, April 07, 2010 Sheet 36 of 45


5 4 3 2 1
5 4 3 2 1

PR25
+5V_S5
C3A B2A VIN 37
C3A

1
D 10/F_6 PD1 PC120 D

5
RB500V-40_100MA
4.7U/10V_6X F: 270k Hz

2
PC118 +1.05V
PR138 0.1U/50V_6X 4 (Peak 21.68, AVG 17.073A)
1M/F_6
C3A PQ13

1
2
3
PR30 PC117
AOL1428A_12.4A_P PC111 PC119 PC127
PU3 2.2_6 2200P/50V_4X 0.1U/50V_6X 10U/25V_1206X *10U/25V_1206X OCP 23A +VTT
UP6111AQDD-B3
C3A PC26 B2A
PR22 0_4 15 13 0.1U/50V_6X
{3,11,30,38,40} MAINON EN/DEM BOOT
+3V PC10 16 TON UGATE 12 UGATE-VTT E3A C3A C3A
PL4
0.1U/50V_6X 1 11 PHASE-VTT
VOUT PHASE 1.5uH_10x10
2 10 PR34 2.55K/F_6
B2A VDD OC B2A C3A

5
PR41 PR151
*100K/F_6 3 9 PR35 2.2_6 +5V_S5 PC142 PC218 PC217 PC143
FB VDDP + + +
R1

1
C 4 8 LGATE-VTT 4 4 PR155 C
{30} HWPG_VTT PGOOD LGATE PC123 PC139
6 7 C3A 2.2/F_4 4.02K/F_6 0.01U/50V_6X

1
2
3

1
2
3

2
GND PGND

1
PC33 PQ18 PQ23 *33P/50V_6X
5 NC TPAD 17
1U/16V_6X AOL1412_17A_P AOL1412_17A_P PC135

2
14 2200P/50V_6X PR33
NC
1

PC23 PC15 PC9 330U/2.5V_3528P_E35b 10U/10V_8X


1U/16V_6X PR21 330U/2.5V_3528P_E35b
100K/F_6 *330U/2.5V_3528P_E35b
R2
2

10K/F_6

0.01U/50V_6X
*1000P/50V_6X VTT_FB

VOUT=(1+R1/R2)*0.75

B B

A A

Quanta Computer Inc.


PROJECT : BL6
Size Document Number Rev
+VTT (UP6111A) 1A

Date: Wednesday, April 07, 2010 Sheet 37 of 45


5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

PR127
+5V_S5
B2A
VIN
38

1
*4C@10_6 PD10 PC187
C3A

5
D *4C@RB500V-40_100MA D
*4C@4.7U/10V_6X PQ44

2
*4C@AOL1428_12.4A_P
4

PR202

1
2
3
*4C@1M/F_6 PR205 PC196 PC194 PC107 PC108
PU7 *4C@2.2_6 *4C@2200P/50V_4X *4C@10U/25V_1206X*4C@10U/25V_1206X +1.05V
C3A *4C@UP6111AQDD *4C@0.1U/50V_6X OCP 7A
C3A PC171
PR203 *4C@10K_4 15 13 *4C@0.1U/50V_6X (Peak 6.34A, AVG 4.435A)
{3,11,30,37,40} MAINON EN/DEM BOOT
+3V PC176 16 TON UGATE 12 UGATE-VTT PL12 C3A
*4C@1uH_7x7 PJP6 *SHORT PAD
*4C@0.1U/50V_6X 1 11 PHASE-VTT +1.05_SRC 1 2
VOUT PHASE

B2A 2 VDD OC 10 PR124 *4C@1.2K/F_6 C3A

5
PR118 PR196
*4C@100K/F_6 3 9 PR193 *4C@2.2_6
+5V_S5 PC166
PC104 *4C@4.02K/F_6
FB VDDP +
R1

1
4 8 LGATE-VTT 4 PR194 PC170 PC101
{30} HWPG_1.05V PGOOD LGATE *4C@330U/2.5V_3528P_E35b
C 6 7 *4C@2.2/F_4 **4C@33P/50V_6X C

1
2
3

2
GND PGND

1
PC169 PQ40 *4C@0.01U/50V_6X
5 NC TPAD 17
*4C@1U/16V_6X *4C@AOL1412_17A_P PC168

2
14 *4C@2200P/50V_6X
NC
1

PC106 PC174 PC175 *4C@10U/10V_8X PR122


*4C@1U/16V_6X PR204 *4C@10K/F_6
*4C@1M/F_4
R2
2

*4C@0.01U/50V_6X
*4C@1000P/50V_6X VTT_FB

PR232
PU11 C3A
PR230 PR228 10K/F_4 PC202 1000P/50V_4X
+5VPCU 1 SHDN/RT COMP 10

806K/F_4
B 10K/F_6 B
2 GND FB 9
PR226
B2A +5VPCU 240K/F_6
3 LX1 VDD 8 R2
PR225
3

PC201 300K/F_6
4 7 *22P/50V_4N
MAINON LX2 PVDD2
2 VOUT=(1+R1/R2)*0.8
5 6
R1
PQ51 PGND PVDD1
OCP follow IC Spec~3.7A
1

DTC144EU_30MA 11 TH_PAD PC197 PC198


RT8015AGQW 10U/10V_8X 10U/10V_8X FOR UMA 0.194A
For VGA 1.345A
PL13 B2A
+1.8V
2.2uH_7x7

B2A
A A
C3A
PC203 PC199 PC200
10U/10V_8X 10U/10V_8X 0.1U/50V_6X Quanta Computer Inc.
PROJECT : BL6
Size Document Number Rev
+1.8V (RT8253) 1A

Date: Wednesday, April 07, 2010 Sheet 38 of 45


5 4 3 2 1

http://laptop-motherboard-schematic.blogspot.com/
5 4 3 2 1

VR_PWRGD_CK505# {2}

DELAY_VR_PWRGOOD {3,9}
C3A B2A VIN
39

1
B2A B2A

1
+
PC41 PC36 PC39 PC141
0.1U/50V_6X 4.7U/25V_8X 4.7U/25V_8X 100U/25V_105CE_f

2
5
C3A
4
D
PQ16 B2A D
AOL1428A_12.4A_P
C3A

1
2
3
+VCC_CORE
VIN +3VPCU C3A
PL5 0.36uH_10x10
CORE-PHASE1 1 2

2
PR42
OCP 58A

4
5

5
2.2_6 PR48
PR145 *2.2/F_4 + PC48 f:400k Hz
PR144
+5V_S5 4 4 330U/2V_7343P_E9b (Peak 58A,AVG 48A)

1
1.91K/F_4 1.91K/F_4 PQ21 PQ24
PC130 AOL1412_17A_P AOL1412_17A_P + PC42

1
2
3

1
2
3
PR39 0.22U/25V_6X PC37
10_6 *1500P/50V_4X 330U/2V_7343P_E9b
PR17 0_8

16

17

40

1
PU8
1 PC129

VDD

VIN

CLK_EN#

PGOOD
1U/16V_6X
2

41
+VTT PAD
20 UGATE1
UGATE1 PR134 10K/F_4
19 1 2
PR135 BOOT1
{5} PSI# PSI# PR140 10K/F_4 2 PR154 VSUM+ PR132 3.65K/F_6
68_4 PSI# 2.2_6 PC134
PR137 147K/F_6 3 0.22U/25V_6X
RBIAS VSUM- PR9 1/F_4
21
PHASE1
{3} H_PROCHOT# 4
VR_TT# LGATE1a
23
PR158 PR157 LGATE1a PR6 10K/F_4
Close to Phase 1 Inductor *470K_4 NTC *4.02K/F_4
C
5
NTC
C3A B2A VIN C

PC112
*0.01U/25V_4X 24 LGATE1b
LGATE1b

1
1 2
B2A B2A

1
22 +
VSSP1 PC35 PC40 PC38 PC140
11 0.1U/50V_6X 4.7U/25V_8X 4.7U/25V_8X 100U/25V_105CE_f

2
H_VID0 ISEN1
{5} H_VID0 31
VID0

1
H_VID1 32
{5} H_VID1 VID1 PC116

5
H_VID2 33 0.22U/10V_4X
{5} H_VID2
2
VID2

{5} H_VID3
H_VID3 34
VID3
VSUM- C3A
PR44 0_6 4
H_VID4 35 25
{5} H_VID4 VID4 ISL62882 VCCP +5V_S5
B2A

1
2
3
H_VID5 36 PC137 1U/16V_6X PQ19 +VCC_CORE
{5} H_VID5 VID5
1 2 C3A AOL1428A_12.4A_P
C3A
H_VID6 37
{5} H_VID6 VID6 PL6 0.36uH_10x10
VR_ON 38 1 2 1 2
{30} VRON VR_ON PC138 1U/10V_4X

5
DPRSLPVR 39 29 UGATE2
{5} ICH_DPRSTP#

4
DPRSLPVR UGATE2
2

2
PR149 30 1 2 PR159
PR150 499/F_4 BOOT2 + PC49
4 4 *2.2/F_4
100K/F_4 PR153
2.2_6 PC133 PQ22 PQ25 330U/2V_7343P_E9b
1

1
2
3

1
2
3

1
8 0.22U/25V_6X AOL1412_17A_P AOL1412_17A_P + PC44
FB CORE-PHASE2
28
PHASE2 330U/2V_7343P_E9b
PR131 PC114 26 LGATE2
*10K/F_4 22P/50V_4N LGATE2 PC144
9 27 *1500P/50V_4X
FB2 VSSP2
B B
PR10 10
412K/F_4 PC110 ISEN2
2 1
1

150P/50V_4N 7 PC113
COMP 0.22U/10V_4X
2

VSUM-
PC4
10P/50V_4N PR8 6
8.06K/F_4 VW
18 ISENSE {5}
IMON
PR136 10K/F_4
1

PR32 PC29
PC115 10.2K/F_4 0.033U/16V_4X
1000P/50V_4X VSUM+ PR133 3.65K/F_6
2
ISUM+
ISUM-
VSEN

VSSSENSE {5}
RTN

PR26 VSUM- PR11 1/F_4


12

13

14

15

2.8K/F_4 PR12 10K/F_4

Close to Pin 14,15


PR24 PC20
562/F_4 390P/50V_4X VSUM+
0.33U/6.3V_4X
1

+VCC_CORE 1 2 PR147 PC125 PC126 PR160


PR139 10_4 82.5/F_4 *0.1U/25V_4X 2.61K/F_4
2

PC16
PC27 PR38
PR15 0_4 330P/50V_4X 11K/F_4
{5} VCCSENSE
Parallel PC121 PC124 PR161
2700P/50V_4X
2

A PR23 0_4 330P/50V_4X 0.01U/25V_4X 10K _6_ NTC Panasonic A


{5} VSSSENSE
PC19
PR36 ERT-J1VR103J
1

1 2 1000P/50V_4X 0_4
PR142 10_4
VSUM-

PR29
1.24K/F_4 PC28
0.1U/25V_4X Close to Phase 1 Inductor
Quanta Computer Inc.
http://laptop-motherboard-schematic.blogspot.com/
PC24
*1000P/50V_4X
PR31
*100/F_4
Load Line setting to 2mV/A
Size Document Number
PROJECT : BL6
Rev
1A
CPU Core ( ISL62882)
Date: Wednesday, April 07, 2010 Sheet 39 of 45
5 4 3 2 1
5 4 3 2 1

40
VIN +3V_S5 +5V_S5 +15V

PR224 PR244 PR243 PR216


1M/F_6 22_8 22_8 1M/F_6
D D

S5D
S5D {35}

3
{30,36} S5_ON 2
2 2 2

PR229 PQ57

1
PQ48 1M/F_6 PQ58 BAM7002_300MA PQ45 PC193
PR221 DTC144EU_30MA BAM7002_300MA BAM7002_300MA 2200P/50V_4X

1
*100K_4

C3A
VIN +3V +5V +1.5V +VTT +1.8V +1.05V +15V

C PR156 PR235 PR223 PR109 PR162 PR240 PR231 PR211 C

1M/F_6 22_8 22_8 22_8 *22_8 22_8 *4C@22_8 1M/F_6

MAINON_ON_G MAIND
MAIND {5,35,36}

3
3

PR234
2 1M/F_6 2 2 2 2 2 2 2
{3,11,30,37,38} MAINON PC185
PQ52 PQ46 PQ9 PQ28 PQ55 PQ50 2200P/50V_4X
PQ53 BAM7002_300MA BAM7002_300MA BAM7002_300MA *BAM7002_300MA BAM7002_300MA *4C@BAM7002_300MA PQ42
1

DTC144EU_30MA BAM7002_300MA
1

1
PR233
*100K_4 B2A

{3,5,12,41} MAINON_ON_G

B B

A A

Quanta Computer Inc.


http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
Discharge (1.5V_S5/1.8V) 1A

Date: Wednesday, April 07, 2010 Sheet 40 of 45


5 4 3 2 1
5 4 3 2 1

B2A
41
+5VPCU
B2A
VIN OCP:30A
(Peak 28A, AVG 23.1A)

1
+3V PR104 PC79 PC77 F: 297k Hz
EV@0/F_6 PC156 PC152 PC151 PC82 PC78

EV@0.1U/50V_6X

EV@2200P/50V_4X
C3A

EV@4.7U/25V_8X

EV@4.7U/25V_8X

EV@4.7U/25V_8X

EV@4.7U/25V_8X

*EV@4.7U/25V_8X
PC97 PR99
C3A

5
EV@4.7U/10V_6X EV@200K/F_4 PL16
D D
PR108 EV@100K_4 2 7 8792TON HI0805R800R-00_5A
VDD TON

{30} VGPU_IO_PG
B2A 8792VCC DH
5 8792DH 4 PL17
+VGPU_IO
PR107 *EV@0_4 8792GND EV@1U/10V_4X PC98 13 PR100 HI0805R800R-00_5A
VCC EV@2.2_6 PQ31

1
2
3
PR102 6 8792BST1 2 PR83 EV@AOL1428_12.4A_P
GFXPG_1V_EN 8792PGD BST
14
PR174
8792EN
PGOOD PC157 *EV@10K/F_4 B2A
EV@0_4 1 PU6 EV@0.22U/25V_6X PL9 EV@0.36uH_10x10
{20,30} GPU_VRON EN 8792LX
4 1 2 +VGPU_CORE
EV@0_4 PC96 PR101 EV@MAX8792ETD+T LX
1 2 8792SKIP# 12 PQ35 PQ34

4
SKIP# 8792DL EV@AOL1412_17A_P EV@AOL1412_17A_P
3
DL

5
PR105 EV@0.1U/25V_4X *EV@0_4
C3A

2
*EV@100K_4 8792REFIN 10 PC146
REFIN

1
PR169 8 + PC75 + PC87 + PC149 + PC155
FB
EV@0_4 REF-2V 4 4 PR85

EV@330U/2V_7343P_E9b

*EV@330U/2V_7343P_E9b

EV@330U/2V_7343P_E9b

EV@330U/2V_7343P_E9b

EV@0.1U/25V_4X
*EV@2.2_8

2
8792REF 11 98792ILIM

1
2
3

1
2
3

1
REF ILIM
PC95 PC158

EP
8792GND 8792GND *EV@4700P/50V_4X PC80

EV@0.01U/25V_4X
PR168 *EV@1500P/50V_4X
C3A

15
R1
EV@39.2K/F_4
PR96 PR77 EV@0_4
EV@63.4K/F_4 {20} VSS_VCORE_P_SENSE

8792GND
+3V_S5 B2A {20} VGA_CORE_P PR97 EV@0_4

PR167 PC94 PR98


PR106 B2A
PR238
R3 EV@309K/F_4 R2 *EV@1000P/25V_4X
EV@10K/F_4 EV@60.4K/F_4 EV@75K/F_4
B2A B2A
C C
3

PQ60 GFX_CORE_CNTRL1 GFX_CORE_CNTRL0 Madison/Park Madison/Park Resistor M92 M92 Resistor M96 M96 Resistor
2 LOW LOW 0.9V R1=39.2K CS33922FB15 0.9V R1=39.2K CS33922FB15 0.9V R1=39.2K CS33922FB15
LOW HIGH 0.95V R2=60.4K CS36042FB10 0.95V R2=60.4K CS36042FB10 0.95V R2=49.9K CS34992FB10
EV@BAM7002_300MA 8792GND
HIGH LOW 1.12V R3=309K CS43092FB16 1.1V R3=270K CS42702FB10 1V R3=249K CS42492FB18
1
3

HIGH HIGH NA R4=88.7K CS38872FB18 1.2V R4=93.1K CS39312FB15 1.1V R4=140K CS41402FB14
PQ8
PR179 EV@0_4 PR170 PR103 EV@0_6
{16} GFX_CORE_CNTRL0 2 R4 EV@88.7K/F_4

8792GND
EV@BAM7002_300MA
1

PC160 EV@0.01U/25V_4X

PR175 EV@10K/F_4 +1.5VSUS

+1.8V_GPU
PQ36 0.996A
+1.8V EV@6402A_7A
B2A
8792GND 6
5 4
2
1 PU9
B2A PC162 PC164 PC165 EV@RT9018B-18PSP

1
+3V_S5 EV@10U/10V_8X 3 5

3
VIN NC

EV@10U/10V_8X

*EV@10U/10V_8X
PC153 PC84
EV@10U/10V_8X EV@0.1U/25V_4X
C3A B2A

2
GPU_MAIND 6
VOUT +1V_GPU
3

PR256 EV@10K/F_4
PQ61 GFXPG_1V_EN 2
1.791A
EN

1
PC154 PC150 PC147

1
B B
2 PR164 PC86 +5VPCU 4 8
VDD GND

*EV@10U/10V_8X

EV@10U/10V_8X

EV@0.1U/25V_4X
PC159 EV@0_4

2
ADJ
*EV@1000P/25V_4X
1 9

2
PGOOD GND1

*EV@0.015U/50V_6X
EV@BAM7002_300MA PC148
3

EV@1U/10V_4X
1

7
PR163

{16} GFX_CORE_CNTRL1
PR177 EV@0_4
2 PQ5 B2A 1.2VADJ R1 EV@25.5K/F_4
EV@BAM7002_300MA
1V_GPU_PG
PR166 VO=(0.8(R1+R2)/R2)
PR165 R2 EV@100K/F_4 R2<120Kohm
1

PC161 EV@0.01U/25V_4X EV@10K/F_4


+3V
PR176 EV@10K/F_4

B2A
PCIE_VDDC
M92,M96-->1.1V
Madison,Park-->1.0V
8792GND

VIN
Madison,Park M92,M96
+VGPU_CORE

C3A +1.5VSUS
PR172 PR173 25.5K/F_4 38.3K/F_4
*EV@1M/F_6 *EV@22_8 PR163 = R1
+1.5V_GPU +1.8V_GPU
CS32552FB11 CS33832FB08
VIN +15V

5
6
7
8
3

3
B2A PR236 PR220 PR242 PR219 GPU_MAIND 4
100K/F_4 100K/F_4
PR254 *EV@0_4 2
PR166 = R2
{3,5,12,40} MAINON_ON_G
EV@1M/F_6 EV@22_8 EV@22_8 EV@1M/F_6 {20,30} GPU_VRON
2
CS41002FB28 CS41002FB28
A PQ41 A
PR171 PQ7 EV@AO4430_15A
1

GPU_MAIND PQ6 *EV@1M/F_6 *EV@BAM7002_300MA


PR178 *EV@DTC144EU_30MA

3
2
1
3

*EV@100K_4

2
{30} GPU_MAINON 2 2 2
+1.5V_GPU
PR237 PQ47 PQ56 PQ43
1

PQ54 EV@1M/F_6 EV@BAM7002_300MA EV@BAM7002_300MA PC195


PR239 EV@DTC144EU_30MA EV@2200P/50V_4X
5.74A
Quanta Computer Inc.
1

EV@100K_4 EV@BAM7002_300MA

http://laptop-motherboard-schematic.blogspot.com/ Size

Date:
Document Number
+VGPU_CORE (MAX8792)
Saturday, April 10, 2010
PROJECT : BL6

Sheet 41 of 45
Rev
1A

5 4 3 2 1
5 4 3 2 1

VIN
42
PR199 +5VPCU
8152VCCGFX

D
*IV@Short_4
PR125
VIN
B2A D
IV@10_6
PC173
IV@1U/10V_4X PC105
IV@1U/10V_4X
PR197

19
IV@10_6

7
+VAXG
PC183 PC188 PC186 PC192
OCP 20A

VCC

PVDD

IV@2200P/50V_4X
8152TONGFX

IV@0.1U/25V_4X

IV@4.7U/25V_8X

IV@4.7U/25V_8X
17
TON PR201 IV@120K/F_4 C3A (Peak 19A, AVG 15.4A)
PC172

5
PR183 IV@0_4 GFXVR_VID_0_R 31 IV@0.1U/25V_4X f : 300k Hz
{5} GFXVR_VID_0 VID0 B2A
PR184 IV@0_4 GFXVR_VID_1_R 30
{5} GFXVR_VID_1 VID1
UGATE 23 8152UGATEGFX 4 B2A C3A
PR185 IV@0_4 GFXVR_VID_2_R 29
{5} GFXVR_VID_2 VID2
24 8152BOOTGFX
1 2 PQ39 PL11

1
2
3
PR186 IV@0_4 GFXVR_VID_3_R BOOT PR191 IV@2_6 IV@0.56uH_10x10
28
{5} GFXVR_VID_3 VID3 IV@AOL1428_12.4A_P 800 mils
PR187 IV@0_4 GFXVR_VID_4_R 27 PC167
{5} GFXVR_VID_4 VID4 C3A

2
IV@0.1U/25V_4X
E3A

1
PR188 IV@0_4 GFXVR_VID_5_R 26 PU10 22 8152PHASEGFX PR214
{5} GFXVR_VID_5 VID5 PHASE + + +
IV@RT8152C *IV@2.2_8
PR189 IV@0_4 GFXVR_VID_6_R 25 20 8152LGATEGFX 4 PR213 PC103 PC100 PC102 PC189
{5} GFXVR_VID_6 VID6 LGATE IV@3.74K/F_4

IV@0.1U/25V_4X
IV@330U/2V_7343P_E9b

IV@330U/2V_7343P_E9b

*IV@330U/2V_7343P_E9b
1

2
1
2
3
PQ38 PC190 PC184

*IV@1500P/50V_4X
IV@AOL1412_17A_P
{5} GFXVR_DPRSLPVR
PR192 IV@0_4 8152DPRSLPVRGFX 3 DPRSLPVR
E3A
C IV@0.1U/25V_4X C
{5} GFXVR_EN PR195 IV@0_4 GFXVR_EN_R 4 VRON PR206
6 16 8152ISENGFX RDSon=5m ohm *IV@6.65K/F_4
CLKEN ISEN 8152ISEN_NGFX
ISEN_N 15
+3VPCU PR126 IV@10K/F_4
PC180
PR198 IV@0_4 8152PGOODGFX 5 IV@0.1U/25V_4X
{30} HWPG_VAXG PGOOD
+1.05V PR182 IV@10K/F_4 8152VRTTGFX 32 PC179 *IV@56P/50V_4N
VRTT
11 8152CMSETGFX
8152NTCGFX CMSET PR209 IV@12K/F_4
1 NTC
12 8152VSENGFX
VSEN PC181 PC191
PR110 PR117 PR181
8152VCCGFX 8152OCSETGFX 2 13 8152FBGFX
OCSET FB
IV@10K/F_4 IV@2.2K/F_4 IV@5.6K/F_4
*IV@0.1U/25V_4X IV@56P/50V_4N
PR111 PR218 PR212
PR217 IV@10K/F_4 +VAXG
IV@10K _6_ NTC PR180 PC182 IV@14K/F_4 IV@10_4
IV@6.34K/F_4
B2A PR215
VCC_AXG_SENSE {5}
IV@82P/50V_4N IV@10K _6_ NTC

COMP 14 8152COMPGFX B2A VSS_AXG_SENSE {5}


PR207 IV@48.7K/F_4
PR210
RGND 9
IV@10_4
PC177
B B
8 8152SOFTGFX 1 2
PR123
B2A SOFT
GFXVR_EN_R IV@5600P/25V_4X
IV@470/F_4 10 8152CMGFX GFXVR_IMON {5}
CM VIN +VAXG
1

C3A
1

PR208
PR121
PGND

8152DPRSLPVRGFX IV@43K/F_4 PC178


GND
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

IV@10K/F_4 IV@0.022U/25V_4X PR128 PR190


2

*IV@1M/F_6 *IV@22_8
2
18
33
35
34
36
37
38
39
40
41
42
21

3
{5} GFXVR_EN 2
2
+VTT +VTT
PR129 PQ37

1
PQ11 *IV@1M/F_6 *IV@BAM7002_300MA
PR130 *IV@DTC144EU_30MA

1
*IV@100K_4
PR112 PR113 PR119 PR114 PR115 PR116 PR120
B2A *IV@0_4 *IV@0_4 *IV@0_4 *IV@0_4 *IV@0_4 *IV@0_4 *IV@0_4

A A
GFXVR_VID_6_R GFXVR_VID_5_R GFXVR_VID_4_R GFXVR_VID_3_R GFXVR_VID_2_R GFXVR_VID_1_R GFXVR_VID_0_R

PC207 PC208 PC209 PC210 PC211 PC212 PC213


270P/50V_4X 270P/50V_4X 270P/50V_4X 270P/50V_4X 270P/50V_4X 270P/50V_4X 270P/50V_4X
Quanta Computer Inc.
http://laptop-motherboard-schematic.blogspot.com/ Size Document Number
PROJECT : BL6
Rev
1A
UMA GPU CORE (RT8152C)
Date: Saturday, April 10, 2010 Sheet 42 of 45
5 4 3 2 1
5 4 3 2 1

Power Tree Table 2


ISL62882C
+VCC_CORE +-2%
VRON enable
(Peak 58A,AVG 48A) OCP 58A +5V_S5
S5D
+-5% 43
P.39 9
1 AO6402A
+5VPCU +-5% (AVG 0.001A) Inrush ?A
AC System AC/DC Insert enable P.35
Charger +5V +-5%
ISL88731 (Peak 10.2 ,AVG 8.135A) OCP 11A MAIND
D 10 D
DC P.34 AO4496
3 P.35 (AVG 4.984A) Inrush ?A
RT8210B
P.35 AC/DC Insert enable +3V +-5%
+3VPCU +-5% 11 MAIND
AO6402A
(Peak 9A, AVG 7.623A) OCP 11A P.35 (AVG 1.984A) Inrush ?A

+3V_S5 +-5%
+VTT +-5% 12
+1.05V +-5% AO4496
S5D
4 MAINON enable
P.35
UPI6111A (AVG 4.253A) Inrush ?A
P.37 (Peak 21.68, AVG 17.073A) OCP 23A

+SMDDR_VTERM
SUSON enable

C
5 +SMDDR_VREF C

UP6163 SUSON enable

P.36 +1.5V
13
+1.5VSUS MAIND
SUSON enable AO6402A
P.36 (AVG 0.35A) Inrush ?A
For VGA (Peak 12.5A, AVG 9.77A) OCP 15A

+1.5V_S5
14 S5_ON
+1.05V +-5% G909
P.36 (AVG 0.000427A) Inrush ?A
6 MAINON enable
UPI6111A +1.5V_GPU
P.38 (Peak 6.336, AVG 4.435A) OCP 7A
15 GPU_MAIND
+1.8V +-5% AO4430
MAINON enable P.41 (AVG 5.74A) Inrush ?A
RT8015A
FOR UMA 0.194A OCP 3.7A +1V_GPU
For VGA 1.345A 16 GFXPG_1V_EN
B RT9018B B
+VGPU_CORE+-2% (AVG 1.791A) Inrush ?A
7 MAINON enable P.41
MAX8792A OCP 30A
P.41 (Peak 28A, AVG 23.1A) +1.8V_GPU
17 GPU_MAIND
AO6402A
P.41 (AVG 0.966A) Inrush ?A
8 +VAXG +-2%
MAINON enable
RT8152C
P.42 (Peak 19A, AVG 15.4A) OCP 20A
Power Distribution List

Power Distribution

A A

http://laptop-motherboard-schematic.blogspot.com/ Quanta Computer Inc.


PROJECT : BL6
Size Document Number Rev
1A
Power Tree Table
Date: Wednesday, April 07, 2010 Sheet 43 of 45
5 4 3 2 1

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