Review of Modern Methods for Busbar Protection
Implementation
Borbad G. Mirzoevich 1, Murodbek S. Kholnazarovich2
1.4Relay Protection and Automation Department
1.42Tajik Technical University named after academician
M.S.Osimi
1,4 Dushanbe, Tajikistan
1borbadtjk@mail.ru, 2murodbek_03@mail.ru
Abstract—At present time, the introduction of digital
technologies has a significant impact on the building principles
of modern electrical substations. Thereby it is provided an
increasing interest to the standards of the IEC 61850 series.
The paper provides a comparative analysis of traditional
busbar protections and options for their modern
implementation carried out with the application of IEC 61850
standard. The digital model of DPBP capable of working with
modern digital CTs according to the protocols of the standard
family IEC 61850 has been developed.
Keywords— IEC 61850, differential busbar protection, relay
protection and automation, electric power system.
I. INTRODUCTION
The most important element of substations is busbars.
The average number of damages per year for one bus system
of a switchgear (SG) of 110 and 220 kV lies in the range
from 0.077 to 0.149, and for a network of 220 kV and above
- 0.104 or 0.01 per feeder per year [5]. Accidents’ resulting
from damage on the busbar is 19% of all accidents in the
electrical networks [5]. Thus, a time between damages on
110 and 220 kV buses is 6–13 years.
The failure rate of busbar differential protection (BDP) is
0.42 ∙ 10-2 failures per year that is BDP is more reliable than
distance protection (DP) with high-frequency blocking more
than 1,7 times [3]. However, in spite of the high degree of
reliability of BDP, large volumes of load are fall under its
action, which leads to great damage. It should be noted that
with the growth of the voltage class, the volume of load
connected to the bus system grows, as a result of which
proportionally increases the responsibility of BDP [4], which
confirms the relevance of the study.
The short-circuit currents at the 110 kV network buses
exceed short-circuit currents at the overhead lines of the
same voltage by more than 1.5 times [9-10]. It can lead to
failure of a large number of main and auxiliary equipment
[8], which also confirms an importance of the selection of
study object.
Currently, as the main protection of busbars of 110-750
kV network, BDP is mainly used [6-7], and as a backup – DP
of network elements, most often - AT. As a rule the relay
protection (RP) of busbar systems according to the
differential principle is not applied at the 6-35 kV networks
[4].
In the present work, a detailed analysis of the applied
methods of organizing BDP, their classification and
comparison is carried out. It is proposed to implement
relevant modern technologies, including standard IEC 61850
[11-15] as a solution for the mentioned main problems.
978-1-7281-5655-2/20/$31.00 ©2020 IEEE
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Ismoil O. Nazrimadovich 3, Rajabbek O. Ayombekovich 4
2,3Automated Electrical Systems Department
Ural Federal University
Ekaterinburg, Russia
3 i.n.odinaev91@mail.ru ,
4Rajabbek.Otashbekov@andritz.com
II. OPERATION PRINCIPLES OF ABSOLUTELY SELECTIVE
BUS PROTECTIONS
In the framework of the paper, a protection the buses is
implemented based on the following principles: differential
current, differential current with percentage restraint, using a
partial operating current, as well as differential-phase.
Differential busbar current protection.
The differential busbar current protection is called
protection based on a comparison of the directions of the
currents of the connections of the protected buses. When the
sum of the currents at the connections is greater than the
setting value, which is possible with an internal short circuit
and is shown in Fig. 1a, at point K1, the protection is
activated. With an external short circuit at point K2, as
shown in Fig. 1a, the current in the relay winding tends to
zero and the protection does not work.
The main disadvantage of differential current protection
is the offset need of the unbalance current that occurs in the
relay winding with external short-circuit, as well as in
normal conditions. An unbalance current is the current
flowing through the winding of the current relay of BDP due
to the difference between the primary current and the
magnetization current adjusted to the secondary winding of
the CT. The main reason for the occurrence of an unbalance
current is the non-identical characteristics of the CTs, which
is especially manifested in external short-circuit due to the
large value of the aperiodic component, as shown in Fig. 1b.
The unbalance current in the relay is defined by the formula
(1).
I1
I2
ΔI
а) б)
Fig. 1. Operating principle of differential current protection
𝐼𝐾𝐴 = 𝜀 ∗ 𝐼𝐾 = 𝐼𝑢𝑛𝑏 , (1)
where: I_K – short-circuit current for external damage.
Traditionally, the offset of an unbalance current is laid
down in the procedure for selecting the settings using the
formula: I_(unb,max)=0,1×I_(K,max), which follows from
the condition for providing of 10% accuracy by the condition
ɛ≤10% at the maximum current of the external fault [5]. In
this case, the trip current of the protection is detuned from
the unbalance current using the reliability factor: I_P: I_(tr.
 pr.)=0,1kn IK, max which further reduces the sensitivity
during short-circuit in the protection zone, especially in the SC
minimum modes [5].
Busbar differential protection with restraint. CT4 F4 CT5 F5
The restrained differential is called protection, the i4 i5
principle of which is based on the excess of the operating SC
current over restraint current. The restrained protection is

PCR
characterized by the presence of restraint signals. Fig. 2
shows the block diagram of the restrained protection, where
i1 i2 i3
the operating current – Ioper. is formed by the operating
signal shaping network (OSSN), the restraint (bias) current - CT1 F1 CT2 F2 CT3 F3
Trip
Ibias is segregated by the restrained signal shaping network
(RSSN). The operating and biased signals are fed to the input G1 G2 G3
of the signal comparison (SC) and when (Io.) > (Ir) the output
unit (OU) is actuated. Fig. 4 Block diagram of the DPBP
1 2 n The flow of currents in the protection circuits is shown in
OSSN:
Fig. 4, Fig. 5 shows the time-current characteristic at the
CT2 CTn
CT1
Io input of the PCR. Fig. 5a shows that during a fault in the
protection zone (point K1 in Fig. 4), the compared currents
SС:
OU are approximately the same in phase, the protection is
Io˃ Ir tripped, and the PCR generates a tripping signal. In case of
RSSN: external short-circuit (point K2 in Fig. 4), the phase shift
Ir between the damaged feeder 5 and the currents of the
remaining feeders is close to 180°, which is shown in Fig.
5.b. In this case, the trip protection does not operate.
Fig. 2. Block diagram of the restrained protection
i
The protection feature is that it has an adapted setting. In
i i1
i1
case of internal short circuit in minimum mode, the setting is i2 i2
automatically reduced, which indicates to the high
t
sensitivity.
t
i5
а) б)

Fig. 5. Operating principle of the DPBP а) internal SC; б) external SC

The protection feature is that the correctness of its

Fig. 3. Change trajectory operating/restrain point in case of external SC
The main disadvantage of the protection is that the
restrained BDP can falsely trip in case of an external short-
circuit near the protected buses, in the case of saturation of
the CT within the first cycle [16-17]. It can be seen from the
bias characteristic in Fig. 3 that with deep saturation of the
CT, with an external short circuit accompanied by an
aperiodic component, a false tripping is occurred.
Differential-phase busbar protection
Differential-phase protection (DPBP) is called protection,
based on the principle of comparing the phases of the
currents of the protected feeders. The current transformers
included in the protection scheme power supply the F1 ÷ F5
sharpers, whose function is to determine the current phase of
the corresponding feeders, which is shown in Fig. 4. The
output signals of the sharpers are fed to the phase
comparison relay (PCR), which determines the short circuit
location.
operation is affected only by the angular error of the current
transformer, which in transient conditions usually does not
exceed 41° (12.8%), while the current error can reach up to
81% i.e. CT current error of 6.3 is greater than the angular
error [5].
A significant disadvantage of the protection is the
possibility of its failure in case of internal short-circuits with
high transition resistance. Calculations using a model that
takes into account CT saturation [16] show that in case of
internal short-circuit (K(1) , K(2) or K(3))with a transition
resistance of 0.01 Ohms, the protection operates correctly,
but in case of internal SC K(1)) with a transition resistance of
10 ohms or more, the protection does not trip.
Buses protection using partial operating currents
method.
Bus protection, in which for n feeders there are n-1
differential currents and at each differential current there is a
cumulative increasing the current of the subsequent feeder, is
called differential protection with partial operating currents
(POC). The calculation of the differential current is made by
the formula (2). The zone protected by differential protection
is shown in Fig. 6b.
 k
j 1 I j  I k 1 I D ( k 1)  I k 1 (2)

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 where: 𝐼𝐷(𝑘) – k-th differential current with initial condition
𝐼𝐷(0) = 𝐼1 ; 𝐼𝐷(𝑘−1) − differential current of order k-1;
𝐼𝑘+1 − POC.
Based on the formula (2), the relationship between two
consecutive POC can be expressed as follows:
This characteristic provides the adaptive functioning of
the protection. When СT is saturated, caused by periodic and
aperiodic components, an automatic increase of the bias ratio
k occurs (transition to section S1 and S2, Fig. 7) [19].
Adaptability of operation allows to offset from the CT’s
errors in transient conditions.

I D ( k )  I D ( k 1)  I k 1 (3) Iр
S2
Fault No
Fig. 6a shows a block diagram of the considered fault

protection, it consists of five blocks: a Data Processor, a I p  I p0 S1

I p  S 2 ( IT  IT 1 )  S1 ( IT  IT 0 )  I p 0
Fault Detector, a Fault Discriminator, a Current Transformer
Saturation Detector, and an emergency shutdown unit (Trip Iр0 I p  S1 ( IT  IT 0 )  I p 0
Logic). The function of the data processor is to digitize Iт0 Iт1
Iт
analog signals, and the damage detector, damage
discriminator and CT saturation detector are designed to Fig. 7. Fault Detector Definition Characteristic
detect short-circuit, determine the position relative to
protection and, accordingly, detect CT saturation. The The CT Saturation Detector contains two saturation
function of the emergency shutdown unit is to generate a trip detection algorithms. There is fast saturation detection
signal. algorithm and saturation detection algorithm with time
interval [13]. The first algorithm compares the phases of the
Data
I / dt I / dt
processor currents Р , Т on the second harmonic. The
second saturation detection algorithm with a time interval
Fault Fault CT saturation I
monitors the movement of the trajectory Т from the zone
discriminator detector detector
F
“No fault” to zone “fault”. When the trajectory enters to the
IEF
Trip logic
SAT I
“Fault” zone through Р 0 and S1, the time delay of 6 ms (8
unit ms for 50 Hz) is accepted and when the trajectory enters to
а) the “Fault” zone through S2, the time delay of 36 ms (45 ms
TRIP
for 50 Hz) is accepted [13].
The main disadvantage of protection is that the current
vector is high-priority information. The error of vector
measurement, as mentioned above, is 6.3 times larger
relative to the angular error in CT. This is significant for
internal SC or false tripping in case of external faults close to
the protection zone.

III. DIFFERENTIAL-PHASE BUSBAR PROTECTION

ACCORDING TO IEC 61850

б)
Fig. 6. а) Block diagram of the POC; б) differential zone with n feeders
The first condition for protection operation is expression
(4), according to that, in case of internal short-circuit, the k-
th order differential current module must be greater than the
k-1 module of the previous maximum differential current k-1
order 𝐼𝐷(𝑘−1) and module of POC 𝐼𝑘+1
I D ( k )  max( I D ( k 1) , I k 1 )
The characteristic in Fig. 7 illustrates the operating
principle of the Fault Detector. It is seen that the bias
characteristic consists of 3 areas with different angle of
slope:
0  IТ  IТ 0
IТ 0  IТ  I Т 1
IТ  IТ 1
Currently, works are ongoing to implement a “digital
substation” within the framework of the standard IEC 61850
[11-17]. The specified standard serves to standardize the
exchange protocols between systems such as RP&A,
information acquisition & transmission system (IATS),
process control system (PCS) [15].
The main advantage of the standard is to reduce the
number of control cables at the substation by 3.5 times and
reduce the total number of low-current cables and terminal
connections by about 3 times, the absence of bulky cable
(4) trays and the integration of smart devices from different
manufacturers [12].
Values measured by busbar protection device using the
standard IEC 61850 can be used, including for electricity
metering and power measurement flowing through buses.
In addition, a result of the transmission of information
from CTs in protocols IEC 61850 in digital form is a
(5) potential reduction the number of windings used. Whereas
for RP&A and electricity metering (EM) using CTs
(6) transmitting information through copper channels, different
accuracy classes of secondary windings are needed, for
(7) example: for RP&A the CTs with accuracy classes of 5P or
10P are used, while for EM of 0.1; 0.2; 0.2S; 0.5; 0.5S; 1; 3;

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 5 and 10 classes [1]. At the same time, an additional
restriction is created, it is necessary to use different sampling
frequencies: for RP&A 80 samples per period, and for EM
256 samples per period [14], for which theoretically one
secondary winding is enough.
It is known that more than 50% of failures or incorrect
actions of busbar protections are associated with damage or
erroneous switching in current circuits [4]. In case of short
circuits near buses using traditional current transformers in
the protection arms, an unbalance current appears which
causes false tripping. However, the use of CTs that transmit
information according to the protocols of the standard IEC
61850 for BDP will allow offsetting from unbalance in the
circuit of current circuits and reducing the load on the CTs,
which will simplify operation and reduce the likelihood of
protection false tripping.
Fig. 8. CT block diagram
Fig. 8 shows a block diagram of a CT using a
communication on protocol IEC 61850. The Fig. shows the
process of digitizing the primary current. As can be seen
from the diagram in Fig. 8, analog signals are received at the
input of the “merging unit”, and digitized signals are
generated at the output with a discretization of 80 samples
per period transmitted to the smart devices.
IV. DIFFERENTIAL-PHASE BUSBAR PROTECTION
ACCORDING TO IEC 61850
The elimination of the deficiencies identified in Chapter
2 is possible using IEC 61850. In the frame of this work, a
DPBP model was constructed. The circuit diagram of the
protected network is represented in Fig. 9a, where four
feeders are connected to the protected 110 kV busbar system.
а)
b)
Fig. 9 а) SLD of the protected BB, в) Sampling of continuous-time signal
Information from feeders is transmitted digitally with the
discretization interval =0.25 ms, which is seen in Fig. 9b.
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Description of the DPBP logic circuit diagram
For comparison of the instantaneous values with a
setting, blocks of positive (I_ust_positive) and negative
(I_ust_negative) half-waves are used, which allow
immediately to determine the moment of fault inception.
Then, if the signals “1” are reached to both inputs of the
logic element “AND” from the two previous comparison
blocks, the signal “1” will also appear at the output. When
“1” appears on any of the inputs of the “OR” logic element,
the signal “1” will also appear on its output, when it enters
the input of the time delay element “Z-12”, after a specified
time, the protection circuit diagram will give a signal to trip
the circuit breakers. The conditional direction of current flow
is defined as follows: the currents flowing to the bus are
taken positive, and the currents flowing from the bus to the
network elements are taken negative.
Fig. 10 DPBP logic diagram for phase A
This logic diagram is tripped if the protection threshold is
exceeded and the input signals coincide in phase, taking into
account that this situation should be maintained for 3 ms (12
samples according to IEC 61850). The described delay is
necessary to ensure the reliability of protection.
In the process of this circuit diagram operation, in case of
beginning internal fault, “AND” and “OR” are activated,
then a short circuit signal “INTERNAL FAULT (IF)” is sent
to the input of the time delay element, if this signal persists
for 3 ms, then a TRIP signal will be issued, which gives a
command to trip the circuit breakers.
The top part of the diagram, fig. 10 (blue color) is tripped
when a positive half-wave of the internal fault occurs,
otherwise the lower part of the circuit diagram (red) will
operate.
In case of an external short circuit, the currents flowing into
the bus and the currents flowing from it are shifted by 180 °
relative to each other, which leads to a violation of one of the
tripping conditions, and the protection is blocked.
Protection circuit testing
Any malfunctions can occur on the buses, as well as on
any network element, including SC(1), SC(2) and SC(3).
Further, each type of short circuit is considered in detail,
including external short circuit SC(3).
a) Internal Short Circuit SC(3)
Operating Schedules of the circuit for phase A are shown
in Fig. 11. In this case, currents of the arms of phase A
increase on the positive half-wave ( A1(  ) , A2(  ) ) and
coincide in phase, at the moment of short circuit (40 ms), the
top part of the protection circuit diagram is activated – Fig.
10 (blue part), which will lead to the appearance of the IF
signal, and after 3 ms the circuit diagram generates a TRIP
signal to trip the circuit breakers.

Fig. 11 Internal SC(3)
a) Internal Short Circuit SC(2) between phases A and C
Fig. 12 presents graphs illustrating the operation of the
circuit diagram for this type of short circuit. At the moment
of short-circuit inception (50 ms), on negative half-waves
A1(  ) , A2(  ) of input signals coinciding in phases, the lower
part of the logic circuit diagram is activated – Fig. 10 (red
part). The tripping conditions are met, so an IF signal is
generated, and then a TRIP signal is produced.
Fig. 12 Internal SC (2)
Fig. 13 illustrates the operation of the circuit diagram in
case of an external short-circuit SC (3) that occurs at a time
of 50 ms. It can be seen from the waveform that in case of
an external short circuit causing CT saturation (through
which the currents of the other feeders flow), the formation
of the IF signal does not occur, like the TRIP signal, which
satisfies the protection requirement on differential principle.
Fig. 13 External SC (3)
In case of currents increasing caused by an external short
circuit, the second condition for the protection operation is
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violated - the signals received to the input of the circuit
A A
diagram 1(  ) и 2(  ) at the initial time (until the CT is
saturated) are shifted on phase by 180° that leads to the
protection blocking.
This section presents the developed model of DPBP
using digital CTs according to the standard IEC 61850. Its
distinctive feature is the lack of information transfer via
copper wires. The proposed scheme operates in case of
internal faults under minimum network modes and is blocked
in case of the external faults in maximum network modes.
The lack of traditional analog transmission channels allows
to obtain more accurate information for further processing
and determining the status of the protection zone.
V. CONCLUSION
The proposed research work can be concluded as
follows:
1) The analysis of circuit designs for busbar
protection performed in this work shows that protections
using traditional current circuits are characterized by
disadvantages such as CT saturation, the effects of
electromagnetic interference on analog signals transmitted
through cable channels, and damage of the current circuits.
2) Microprocessor bus protection made using
traditional CTs, in order to avoid the influence of CT
saturation, include a number of additional algorithms for
matching and processing the measured values, which cause
of requirement more calculations. Since the digital CTs
make it possible to exclude the effect caused by saturation,
their use in relay protection systems can solve these
problems.
3) When analyzing the feasibility of using devices
including digital CTs, a number of issues arise, such as:
writing differential bus protection algorithms according to
IEC 61850, developing mathematical models within the
framework of the proposed standard, comparing the results
with the proposed options for DPBP that meet the
requirements of the standard.
4) In the course of the work, a digital model of DPBP
capable of working with modern digital CTs according to
the protocols of the standard family IEC 61850 has been
developed. The principles of the functioning of the
algorithm are explained and its testing is executed.
ACKNOWLEDGEMENTS
The authors would like to thank the reviewers for their
very useful comments, which helped us to improve the
quality of the paper. There viewers' efforts are gratefully
appreciated.
The reported study was funded by RFBR, project
number 19-38-90204.
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