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H. No: 2-3-647/A/63, Email:sushmareddy1397@gmail.com New Prem Nagar, Amberpet, Hyderabad–
500013. Seeking a position in an organization within the VLSI industry where I can contribute my
knowledge and skills for organization’s growth as well as myself. Good Knowledge about ASIC
design flow. Good at implementation of efficient floorplan with high macro count with the help of
data flow diagram and achieving optimum IR drop. Performing Power aware Placement with less
congestion which ensures good routability. Proficient in implementing Physical Design flow stages
like Power Planning, Clock Tree Synthesis, Routing. Good at understanding and analysing STA
timing reports at each stage of PnR flow. Comprehensive Knowledge on Static Timing Analysis and
terminologies like Setup and Hold, OCV, AOCV, CRPR, Clock Uncertainty etc. Comprehensive
knowledge on Digital design concepts and fundamentals of CMOS . Have hands-on experience in
industry standard EDA tools like IC Compiler II and Prime Time from Synopsys. Good at working
with Linux environment. Degree Board / University Year CGPA / Percentage Advanced Diploma in
ASIC Design RV-VLSI Design Center 2020 - B. Tech [Electronics and Communication Engineering] CVR
College of Engineering,Ibrahimpatnam 2015 - 2019 9.56 /10 Intermediate [MPC] Narayana Junior
College, Dilsukhnagar 2013 - 2015 97.5% SSC Swamy Dayanand High School, Amberpet 2013 10 /10\