Mixed-Signal Circuits and Systems-on-Chip

Cadence Assignment-1
16IE10034(JITENDRA BHANDARI)

Ques1-
a) Path- /user_data1/common/group3/umc180_oa/16IE10034/Assign1_q1/
b) Screenshot of the schematic-
c) Table-

TYPE Aspect Ratio/ Values

M0 NMOS (w/l)=(240nm/240nm), nf=3

gm Trans- 251 uA/V

conductance

R0(Rd) Resistor 10kohm

d) Gain and Phase Plot

Ques2:
a) Path- /user_data1/common/group3/umc180_oa/16IE10034/Assign1_q2/

b) Screenshot of the schematic-

c) Gain and Phase plot at Vcm=800mV

Gain and Phase plot at Vcm=1.6V

d) Table-

TYPE Aspect Ratio

M0 NMOS (w/l)=(240nm/400nm), nf=2

M1 NMOS (w/l)=(480nm/240nm), nf=30

M2 NMOS (w/l)=(240nm/400nm), nf=2

M3 NMOS (w/l)=(480nm/240nm), nf=30

M4 NMOS (w/l)=(240nm/180nm), nf=100

M5 NMOS (w/l)=(240nm/180nm), nf=100

f) From Bode plot at Common Mode Voltage=1.2V

Unity gain frequency= 127MHz

e) Output Voltage swing-

Vo < Vgp + I Vthp I
Vo > Vgn - Vthn
By using the above two-equation, for dc operating points
Vgn= 1.2V
Vthn= 491mV
Vthp= -486mV
Vgp= 1.324V
0.71 < Vo < 1.8