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  • DFT Course - Syllabus

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    Mayur Mestry
    63 views2 pages
    The document outlines a course on digital design for test (DFT) consisting of 15 modules. The modules cover topics such as digital basics, Verilog, Linux commands, DFT basics, ASIC flow, chip fabrication, ATE basics, scan insertion, scan architectures, scan compression techniques, on-chip clocking, at-speed testing, ATPG basics and algorithms, fault models, ATPG DRC checks, pattern generation, simulations, at-speed ATPG and simulations, LOC/LOS, scan simulations debugging, and revision of scan and ATPG concepts with guidance for a project.

    Original Description:

    DFT training syllabus of various institutes in bangalore.

    Original Title

    DFT course _Syllabus

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    The document outlines a course on digital design for test (DFT) consisting of 15 modules. The modules cover topics such as digital basics, Verilog, Linux commands, DFT basics, ASIC flow, chip fabrication, ATE basics, scan insertion, scan architectures, scan compression techniques, on-chip clocking, at-speed testing, ATPG basics and algorithms, fault models, ATPG DRC checks, pattern generation, simulations, at-speed ATPG and simulations, LOC/LOS, scan simulations debugging, and revision of scan and ATPG concepts with guidance for a project.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    63 views2 pages

    DFT Course - Syllabus

    Uploaded by

    Mayur Mestry
    The document outlines a course on digital design for test (DFT) consisting of 15 modules. The modules cover topics such as digital basics, Verilog, Linux commands, DFT basics, ASIC flow, chip fabrication, ATE basics, scan insertion, scan architectures, scan compression techniques, on-chip clocking, at-speed testing, ATPG basics and algorithms, fault models, ATPG DRC checks, pattern generation, simulations, at-speed ATPG and simulations, LOC/LOS, scan simulations debugging, and revision of scan and ATPG concepts with guidance for a project.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 2

    Course-1: DFT Course

    Module1:

    Digital Basics and Verilog basics

    Basic Linux commands

    Module2:

    Introduction To DFT, DFT Basics

    ASIC Flow
    DFT Basics

    Chip Fabrication Process

    ATE Basics
    Module3:

    Scan Insertion

    Scan architecture overview


    Scan Design Basics
    Module 4:

    Scan Golden Rules

    Scan DRC Checks

    Scan Insertion

    Module 5:

    Scan Compression

    Basics/Need for Compression


    Compression Techniques
    Module 6:

    On-Chip-Clocking

    At-Speed Testing

    Module 7:

    Introduction To ATPG

    ATPG Basics

    Faults Collapsing

    ATPG Algorithms
    Module8:

    Fault Models, Fault Classes

    Fault Models,

    Module 9:

    ATPG DRC,

    Fault Classes,

    ATPG

    Module 10:

    Pattern Generation And Simulations

    Simulation Basics

    Module 11:

    Atpg Simulations

    Coverage Improvement

    Module 12:

    At- Speed ATPG And Simulations

    At-Speed ATPG

    Module 13:

    LOC and LOS

    At-Speed Simulations

    Module14:

    Simulations and Debugging

    Scan Simulations Debug (no timing examples)

    Fault Simulation

    Module 15:

    Revision of scan and ATPG

    Doubt clarifications

    Guidance for the institute project.

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