ATPG IMP Questions
Created By: Er.Manjeet Singh
1. What is pattern optimization.
2. What is pattern retargeting.
3. How to reduce power dissipation as
DFT engineer
4. How to share EDT clock & scan clock
5. How to test BB.
6. How to test reset.
7. How to improve coverage.
8. Drc’s result in low coverage.
9. Why stuck@ coverage is more than
transition coverage.
10. Difference Between LOC & LOS
11. Difference Between stuck@ and
transition fault model.
12. What are the input & output files of
atpg.
13. Explain Fault classes.
14. Explain Fault Models.
15. Difference Between combinational &
sequential atpg
16. Difference Between transition & path
delay.
17. What spf/test procedure file contains.
18. Explain fault collapsing.
19. Drc’s faced during atpg
20. What is test coverage & fault coverage.
21. Why we measure po before capture
clock.
22. Explain abort limit & possible credit
limit.
23. What command you used for fixing the
clock,set,reset violation during scan
24. What are the steps for converting the
library from synopsis to mentor.
25. What are the commands for creating
user defined scan ports.
26. What is the command for creating the
no. of scan chains.
27. Commands for setting the abort limit &
possible credit limit.
28. Generate Loc pattern for 2 i/p or gate.
29. What are different atpg modes.
30. What is atpg , why we use it.
31. What is atpg effectiveness.
32. What is robust /non-robust path delay
faults
33. What does do file contain
34. How many fault site are there for 2 i/p
AND gate
35. What is pseudo random pattern
generator.
36. What is iddq test.
37. Have you ever seen condition statements
in spf.
38. If we have cover all transition faults
along a critical path already ,then should
we check path delay.
39. What are the advantages of modular
atpg.
40. What is hierarchical & flattened atpg.
41. What is sequential depth, how
increasing sequential depth helps in
improving coverage.
42. On what basis we select LOC & LOS.
43. What are the techniques to reduce
pattern count with out loosing coverage.
44. Why we have both transition & path
delay fault model
45. Are the fault on reset of flops are
detected.
46. How to toggle reset to get coverage.
47. What is scan chain tracing.
48. Can you write atpg run script
49. Can you write atpg test procedure file.
50. What are the tools you used for atpg.
51. How 2 pulses are generated for
transition faults
52. How will you increase transition test
coverage.
53. How DFT vectors are different from
functional vectors.
54. Explain T3,T4,T5 violation
55. Explain P27,P6,P8,P11 violation.