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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

General Description Features

The Maxim ICL7116 and ICL7117 are 3½ digit monolithic
analog-to-digital converters. They differ from the Maxim
ICL7106 and ICL7107 in that the ICL7116 and ICL7117
have a Hold pin, which makes it possible to hold or
“freeze” a reading. These integrating ADCs have very
high input impedances and directly drive LCD (ICL7116)
and LED (ICL7117) displays.
Versatility and accuracy are inherent features of these
converters. The dual-slope conversion technique auto­
matically rejects interference signals common in industrial
environments. The true differential input is particularly
useful when making ratiometric measurements (ohms or
bridge transducers). Maxim has added a zero-integrator
phase to the ICL7116 and ICL7117, eliminating overrange
hangover and hysteresis effects. Finally, these devices
offer high accuracy by lowering rollover error to less than
one count and zero reading drift to less than 1µV/ºC.
●● Improved 2nd Source!
●● Hold Pin Allows Indefinite Display Hold
●● Guaranteed First Reading Recovery from Overrange
●● On-Board Display Drive Capability—No External
Circuitry Required: LCD (ICL7116), LED (ICL7117)
●● High-Impedance CMOS Differential Inputs
●● Low Noise (< 15µVP-P) Without Hysteresis or
Overrange Hangover
●● Clock and Reference On-Chip
●● Zero Input Gives Zero Reading
●● True Polarity Indication for Precision Null Applications
Ordering Information appears at end of data sheet.

Applications
These devices can be used in a wide range of digital
panel meter applications. Most applications, however, Pin Configurations
involve the measurement and display of analog data:
TOP VIEW
●● Pressure ●● Conductance
1 HOLD OSC1 40
●● Voltage ●● Current
2 D1 OSC2 39
●● Resistance ●● Speed 3 C1 OSC3 38
●● Temperature ●● Material Thickness 4 B1 TEST 37
ICL7116
Typical Operating Circuit
5 A1 REF HI 36
ICL7117
6 F1 V+ 35

LCD DISPLAY 7 G1 C+REF 34

8 E1 C-REF 33
+
ANALOG 9 D2 COMMON 32
INPUT
- 10 C2 ON HI 31

11 B2 ON LO 30

ICL7116 CLOSED = HOLD 12 A2 A/Z 29

OPEN = RUN
13 F2 BUFF 28

14 E2 INT 27

15 D3 V- 26
9V
16 B3 G2 25
VREF
17 F3 C3 24

18 E3 A3 23

19 AB4 G3 22
TO ANALOG
COMMON PIN 20 POL BP/GND 21
[PIN 32]
PDIP

Detailed Circuit Diagram - see Figure 1 Pin Configurations continued at end of data sheet

19-0949; Rev 2; 1/17

ICL7116/ICL7117 3½ Digit ADCs with Display Hold

Absolute Maximum Ratings

Supply Voltage Power Dissipation (Note 2)
ICL7116, V+ to V-...................................................................15V Ceramic Package...........................................................1000mW
ICL7117, V+ to GND..............................................................+6V CERDIP Package.............................................................800mW
ICL7117, V- to GND............................................................... -9V Plastic Package................................................................800mW
Analog Input Voltage (either input) (Note 1)...................V+ to V- Operating Temperature Range................................ 0ºC to +70ºC
Reference lnput Voltage (either input)............................V+ to V- Storage Temperature Range..............................-65ºC to +160ºC
Clock Input Lead Temperature (soldering, 60s).................................. +300ºC
ICL7116.................................................................... Test to V+
ICL7117...................................................................GND to V+
Note 1: Input voltage may exceed supply voltages, provided the input current is limited to 100µA.
Note 2: Dissipation rating assumes device is mounted with all leads soldered to the PCB.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.

Electrical Characteristics (Note 3)

PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN = 0V Digital
Zero Input Reading -000.0 ±000.0 +000.0
Full Scale = 200.00mV Reading
999/ Digital
Ratiometric Reading VIN = VREF = 100mV 999 1000
1000 Reading

Rollover Error (Difference in Reading for Equal

Positive and Negative Reading Near Full -VIN = +VIN = 200mV -1 ±0.2 +1 Counts
Scale)

Linearity (Max. Deviation from Best Straight Full Scale = 200mV

-1 ±0.2 +1 Counts
Line Fit) or Full Scale = 2.00mV
VCM = 1V, VIN = 0V
Common-Mode Rejection Ratio (Note 4) 50 µV/V
Full Scale = 200.00mV
Noise (Pk-Pk Value Not Exceeded 95% of the VIN = 0V
15 µV
Time) Full Scale = 200.00mV
Leakage Current at Input VIN = 0V 1 10 pA
Zero Reading Drift VIN = 0V, 0°C < TA < 70°C 0.2 1 µV/°C

VIN = 199.0mV
Scale Factor Temperature Coefficient 0°C < TA < 70°C 1 5 ppm/°C
(Ext. Ref. 0ppm/°C)

V+ Supply Current (Does Not Include LED

VIN = 0V 0.8 1.8 mA
Current for ICL7117)
V- Supply Current for ICL7117 Only 0.6 1.8 mA
Analog Common Voltage (With Respect to
25Ω Between Common and Positive Supply 2.4 2.8 3.2 V
Positive Supply)
Temperature Coefficient of Analog Common
25Ω Between Common and Positive Supply 80 ppm/°C
(With Respect to Pos. Supply)
Input Resistance, Pin 1 (Note 6) 30 70 kΩ
VIL, Pin 1 (ICL7116 Only) TEST – 1.5 V

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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

Electrical Characteristics (continued) (Note 3)

PARAMETER CONDITIONS MIN TYP MAX
VIL, Pin 1 (ICL7117 Only) GND +1.5 V
VIH, Pin 1 (Both) V+ - 1.5 V
ICL7116 Only (Note 5) 4 5 6
Pk-Pk Segment Drive Voltage, V+ to V- = 9V V
Pk-Pk Backplane Drive Voltage 4 5 6

ICL7117 Only (Except Pin 19) Segment V+ = 5.0V

5 8.0
Sinking Current Segment Voltage = 3V mA
(Pin 19 Only) 10 16
Note 3: Unless otherwise noted, specifications apply to both the ICL7116 and ICL7117 at TA = +25°C, fCLOCK = 48kHz. ICL7116 is
tested in the circuit of Figure 1. ICL7117 is tested in the circuit of Figure 2.
Note 4: Refer to “Differential input” discussion (see Maxim’s ICL7106/ICL7107 data sheet).
Note 5: Backplane drive is in phase with segment drive for ‘off’ segment, 180º out of phase for on segment. Frequency is 20 times
the conversion rate. Average DC component is less than 50mV.
Note 6: The ICL7116 logic input has an internal pulldown resistor connected from HLDR, pin 1, to TEST, pin 37. The ICL7117 logic
input has an internal pulldown resistor connected from HLDR. Pin 1, to GROUND, pin 21.

Maxim Advantages
●● Guaranteed Overload Recovery Time ●● Negligible Hysteresis
●● Significantly Improved ESD Protection (Note 8) ●● Maxim Quality and Reliability
●● Low Noise ●● Increased Maximum Rating for Input Current (Note 9)
●● Key Parameters Guaranteed Over Temperature

Absolute Maximum Ratings

This device conforms to the Absolute Maximum Ratings on adjacent page.

Electrical Characteristics
(Specifications below satisfy or exceed all ‘tested’ parameters on adjacent page V+ = 9V, TA = +25ºC, fCLOCK = 48kHz; test circuit =
Figure 1 (ICL7116), Figure 2 (ICL7117), unless otherwise noted.)

PARAMETER CONDITIONS MIN TYP MAX UNITS

VIN = 0V
Full Scale = 200.00mV -000.0 ±000.0 +000.0 Digital
Zero Input Reading TA = +25°C (Note 7) Reading
0°C ≤ TA ≤ +70°C (Note 11) -000.0 ±000.0 +000.0
VIN = VREF = 100mV 999/
999 1000
TA = +25°C (Note 7) 1000 Digital
Ratiometric Reading
999/ Reading
0°C ≤ TA ≤ +70°C (Note 11) 999 1001
1000

Rollover Error (Difference in Reading for -VIN = +VIN = 200mV

-1 ±0.2 +1
Equal Positive and Negative Reading Near TA = +25°C (Note 7) Counts
Full Scale) 0°C ≤ TA ≤ +70°C (Note 11) ±0.2
Linearity (Max. Deviation from Best Straight Full Scale = 200mV
-1 ±0.2 +1 Counts
Line Fit) or Full Scale = 2.00mV

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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

Electrical Characteristics (continued)

Specifications below satisfy or exceed all ‘tested’ parameters on adjacent page V+ = 9V, TA = +25ºC, fCLOCK = 48kHz; test circuit =
Figure 1 (ICL7116), Figure 2 (ICL7117), unless otherwise noted.)

PARAMETER CONDITIONS MIN TYP MAX UNITS

VCM = ±1V, VIN = 0V
Common-Mode Rejection Ratio (Note 4) 50 µV/V
Full Scale = 200.00mV
Noise (Pk-Pk Value Not Exceeded 95% VIN = 0V
15 µV
of the Time) Full Scale = 200.00mV
VIN = 0V, TA = +25°C (Note 7) 1 10
Input Leakage Current pA
0°C ≤ TA ≤ +70°C 20 200
Zero Reading Drift VIN = 0V, 0°C ≤ TA ≤ +70°C 0.2 1 µV/°C
VIN = 199.0mV
Scale Factor Temperature Coefficient 0°C ≤ TA ≤ +70°C 1 5 ppm/°C
(Ext. Ref. 0ppm/°C)

V+ Supply Current (Does Not Include LED VIN = 0V, TA = +25°C 0.8 1.8
mA
Current for ICL7117) 0°C ≤ TA ≤ +70°C 2
V- Supply Current for ICL7117 Only 0.6 1.8 mA
Analog Common Voltage (With Respect to
25Ω Between Common and Positive Supply 2.4 2.8 3.2 V
Positive Supply)
Temperature Coefficient of Analog Common
25Ω Between Common and Positive Supply 80 ppm/°C
(With Respect to Pos. Supply)
Input Resistance, Pin 1 (Note 6) 30 70 kΩ
VIL, Pin 1 (ICL7116 Only) TEST + 1.5 V
VIL, Pin 1 (ICL7117 Only) GND + 1.5 V
VIH, Pin 1 (Both) V+ - 1.5 V
ICL7116 Only (Note 5)
Pk-Pk Segment Drive Voltage, V+ to V- = 9V 4 5 6 V
Pk-Pk Backplane Drive Voltage
ICL7117 Only (Except Pin 19) Segment V+ = 5.0V
5 8.0
Sinking Current Segment Voltage = 3V mA
(Pin 19 Only) 10 16
ICL7116 Only – Test Pin Voltage With respect to V+ 4 5 6 V
Measur-
Overload Recovery Time
VIN changing from ±10V to 0V 0 1 ement
(Note 10)
Cycles
Note 7: Test condition is VIN applied between pins IN HI and IN LO i.e., 1MΩ resistor in Figure 1 and Figure 2.
Note 8: All pins are designed to withstand electrostatic discharge (ESD) levels in excess of 2000V (Test circuit per MIL. Std. 883C.
Method 3015 2).
Note 9: Input voltages may exceed the supply voltage provided the input current is limited to ±1mA (This revises Note 1 on the
adjacent page).
Note 10: Number of measurement cycles for display to give accurate reading.
Note 11: 1MΩ resistor is removed in Figure 1 and Figure 2.

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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

Detailed Description
The Maxim ICL7116 and ICL7117 3½ digit ADCs are
similar to the Maxim ICL7106 and ICL7107, except for the
addition of a Hold pin. For a detailed product description,
package dimensions, and applications information (other
than the operation of the Hold pin described below) refer
to Maxim’s ICL7106 and ICL7107 data sheet
Hold Input
The Hold input is a digital input with a logic threshold
approximately midway between V+ and Test (ICL7116)
or V+ and Ground (ICL7117). The ICL7116/ICL7117 con-
tinuously performs conversions, independent of the Hold
input. When the Hold input is connected to V+, however,
the display latch pulse is inhibited, and the the display
latches are not updated. The Hold input has a 70kΩ pull-
down resistor to Test (ICL7116) or Ground (ICL7117) and
the Hold input will be pulled low if it is left open. When
Hold is low the ICL7116/ICL7117 updates the display
at the end of each conversion. The Hold input is CMOS
compatible and can also be driven by a switch connected
to V+ (Figure 1 and Figure 2) or by a PNP transistor.
Unlike the ICL7106 and the ICL7107, the ICL7116 and
ICL7117 do not have a Reference Low input. Apply the
reference voltage between Reference High (REF HI) and
Common.

0.1µF
LCD DISPLAY
34 33
SEGMENT
1MΩ C+REF C-REF DRIVE
31 2–19
+ IN HI
ANALOG 22–25
0.01µF
INPUT 30
- IN LO 20
POL BACKPLANE
32 21 MINUS SIGN
COMMON DRIVE
BP
ICL7116 HOLD
1 CLOSED = HOLD
35 OPEN = RUN
28 V+
BUFF
24kΩ
47kΩ
0.47µF
29 9V
A-Z
0.22µF 36 VREF 10kΩ
29 REF HI
INT
26
V-
OSC2 OSC3 OSC1
39 38 COSC 40
100pF
TO ANALOG
ROSC COMMON PIN
100kΩ
[PIN 32]

Figure 1. Maxim ICL7116 Typical Operating Circuit, 200mV Reference

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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

0.1µF
LCD DISPLAY
34 33
SEGMENT
1MΩ C+REF C-REF DRIVE
31 2–19
+ IN HI
ANALOG 22–25
0.01µF
INPUT 30
- IN LO 20
POL BACKPLANE
32 21
COMMON DRIVE
BP
ICL7117 1 CLOSED = HOLD
HOLD OPEN = RUN
28 35
BUFF V+
+5V
24kΩ
47kΩ
0.47µF
29
A-Z
0.22µF 36 VREF 10kΩ
29 REF HI
INT
26
V- +5V
OSC2 OSC3 OSC1
39 38 COSC 40
100pF

ROSC TO ANALOG
100kΩ COMMON PIN
[PIN 32]

Figure 2. Maxim ICL7117 Typical Operating Circuit, 200mV Reference

Chip Topography

D3 E2 F2 A2 B2 C2 D2 E1 G1 F1

B3
A1
F3
B1
E3 C1
AB4 D1
POL4 HLDR
BP/GND [7116/7117] OSC1
0.168"
(4.27mm) G3
A3 OSC2

OSC3
TEST
C3 REF HI
G2
V+

INT A/Z IN H1 C-REF

V- BUFF IN LO COMMONC+REF
0.130"
(3.30mm)

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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

Pin Configurations (continued)

TOP VIEW

REF HI
HOLD

OSC1
OSC2
OSC3
TEST
TOP VIEW
N.C.

COMMON
C1
D1
A1
B1

C+ REF
C- REF
REF HI

IN LO

BUFF
IN HI
6 5 4 3 2 1 44 43 42 41 40

A-Z

INT
V+

V-
44
43
42
41
40
39
38
37
36
35
34
F1 7 39 V+ N.C. 1 33 N.C.
G1 8 38 C+ REF N.C. 2 32 G2
E1 9 37 C- REF TEST 3 31 C3
D2 10 36 COMMON OSC3 4 30 A3
C2 11 35 IN HI N.C. 5 29 G3
ICL7116 ICL7117
OSC2 6 28 BP/GND
N.C. 12 ICL7117 34 N.C.
OSC1 7 27 POL
B2 13 33 IN LO
HOLD 8 26 AB4
A2 14 32 A/Z
D1 9 25 E3
F2 15 31 BUFF
C1 10 24 F3
E2 16 30 INT B1 11 + 23 B3
D3 17 29 V-

12
13
14
15
16
17
18
19
20
21
22
18 19 20 21 22 23 24 25 26 27 28

A1
F1
G1
E1
D2
C2
B2
A2
F2
E2
D3
B3
F3
E3
AB4
POL
N.C.
BP/GND
G3
A3
C3
G2

MQFP
PLCC

Ordering Information Chip Information

PROCESS: CMOS
PART TEMP RANGE PIN-PACKAGE
ICL7116CPL 0°C to +70°C 40 PDIP
ICL7116CJL 0°C to +70°C 40 CERDIP
ICL7116CQ 0°C to +70°C 44 LPCC
ICL7116C/D 0°C to +70°C Dice
ICL7117CPL 0°C to +70°C 40 PDIP
ICL7117CJL 0°C to +70°C 40 CERDIP
ICL7117CMH+ 0°C to +70°C 44 MQFP
ICL7117CQ 0°C to +70°C 44 LPCC
ICL7117C/D 0°C to +70°C Dice
+Denotes lead(Pb)-free/RoHS-compliant package.

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ICL7116/ICL7117 3½ Digit ADCs with Display Hold

Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
0 9/85 Initial release —
1 9/13 Added the 44 MQFP package to data sheet 1–8
2 1/17 Updated Figure 2 and Pin Configuration diagram 6, 7

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

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