Compal La-6842p r1.0 Schematics

A B C D E
1 1
PWWAA
2
LC Marseille 2
LA-6842P REV 1.0 Schematic

3
Intel Processor(ARD) /PCH(HM55) 3
2010-08-04 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/21 Deciphered Date 2011/06/21 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A6842
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401981
Date: Wednesday, September 01, 2010 Sheet 1 of 45
A B C D E
A B C D E
Compal Confidential Fan Control Clock Generator

Intel Arrandale APL5607 RTM890N-631-GRT
Model Name : PWWAA page 6 page 13
File Name : LA-6842P

1 1
rPGA-988 Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2

Dual Channel BANK 0, 1, 2, 3 page 11,12
page 5,6,7,8,9,10 1.5V DDRIII 800/1066 MT/s
USB
FDI X8 DMI X4 USB port 0,1
page 25
2.7GHz 2.5GHz
2IN1 RTS5137 Int. Camera

LCD Conn. USB port 10 USB port 11
page 13 USB page 26 page 13
5V 480MHz
CRT
2
page 14 2
PCIeMini Card
WiMax
USB
USB port 13
5V 480MHz page 27
PCIe 1x PCIeMini Card
1.5V 2.5GHz(250MB/s) WLAN
PCIe port 1
page 27
Intel Ibex Peak
SATA port 1 SATA HDD0
5V 3GHz(300MB/s) page 25
RJ45 RTL8105E-GR 10/100M PCIe 1x SATA port 4 SATA ODD

page 28 PCIe port 0 page 28 1.5V 2.5GHz(250MB/s) BGA-951 5V 3GHz(300MB/s) page 25
PCI
3 3
page 16~24
3.3V 33 MHz
LPC BUS
HD Audio 3.3V/1.5V 24MHz
Power/B conn. RTC CKT. HDA Codec

page 33 ALC259-GR
page 16 SPI ROM Debug Port ENE KB926 E0 page 29
page 16 page 32 page 31
DC/DC Interface CKT.

page 34
Int. Ext.
Touch Pad EC ROM MIC CONN MIC CONN HP CONN SPK CONN
Int.KBD (LVDS CONN) page 30 page 30 page 30
page 33 page 32 page 32 page 13
Power Circuit DC/DC
4 4
page 35~44

Size
Document Number Rev
B
401981
A B C D E
5 4 3 2 1
DESIGN CURRENT 0.1A +3VL

DESIGN CURRENT 0.1A +5VL
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9 DESIGN CURRENT 5A +5VALW
SUSP#
DESIGN CURRENT 2A +1.8VS
MP2121DQ
D SUSP D
N-CHANNEL DESIGN CURRENT 4A +5VS

SI4800
BCPWON
DESIGN CURRENT 0.5A +5VS_L_BCAS
P-CHANNEL
AO-3413
KB_LED
RT8205EGQW DESIGN CURRENT 400mA +5VS_LED
P-CHANNEL
AO-3413
+5VS
DESIGN CURRENT 300mA +3VS_HDP
LDO
G9191
ODD_EN#
DESIGN CURRENT 1.6A +5VS_ODD
P-CHANNEL
AO-3413
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW

WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN
SUSP AO-3413
C C
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800
LCD_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
AO-3415
BT_PWR#
DESIGN CURRENT 180mA +BT_VCC
P-CHANNEL
AO-3413
FELICA_PWR
DESIGN CURRENT 0.5A +FLICA_VCC
P-CHANNEL
AO-3413
VR_ON
DESIGN CURRENT 48A +CPU_CORE

ISL62883HRZ
GFXVR_EN
DESIGN CURRENT 15A +GFX_CORE

ADP3211AMNR2G
VTTP_EN
B B
Ipeak=18A, Imax=12.6A, Iocp min=19.8 DESIGN CURRENT 18A +VTT

APW7138NITRL
SUSP#
Ipeak=7A, Imax=4.9A, Iocp min=7.7 DESIGN CURRENT 7A +1.05VS

RT8209BGQW
SUSP#
Ipeak=15A, Imax=10.5A, Iocp min=16.5 DESIGN CURRENT 15A +1.5V
RT8209BGQW SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5V_CPU

FDS6676AS
SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5VS

FDS6676AS
SUSP or 0.75VR_EN#
DESIGN CURRENT 1.5A +0.75VS

A G2992F1U A

B
401981
5 4 3 2 1
A B C D E
( O MEANS ON X MEANS OFF )

Voltage Rails
+RTCVCC +B +5VL +5VALW +1.5V +5VS
+3VL +3VALW +3VS
+VSB +1.5VS
power
+VGA_CORE
1 plane BTO Option Table 1
+CPU_CORE
+VTT
Function MINI PCI-E SLOT LAN
+1.05VS
+1.8VS description SLOT1 LAN
+1.1VS
explain WLAN/BT 10/100M
State +0.75VS
BTO
Function Camera & Mic
description Camera & Mic

S0
O O O O O O explain Camera & Mic
S1 BTO CAM@
O O O O O O
2 2
S3
O O O O O X Function S3 Power Saving
S5 S4/AC description S3 Power Saving

O O O O X X
explain Power Saving
S5 S4/ Battery only
O O O X X X
BTO
S5 S4/AC & Battery
don't exist
O X X X X X
PCH SM Bus Address
Power Device HEX Address

+3VS DDR SO-DIMM 0 A0 H 1010 0000 b
3
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b 3
SIGNAL
+3VS Clock Generator D2 H 1101 0010 b STATE SLP_S3# SLP_S4# SLP_S5#
Full ON HIGH HIGH HIGH

+3VS WLAN/WIMAX
+3VS Clock Generator S1(Power On Suspend) HIGH HIGH HIGH
S3 (Suspend to RAM) LOW HIGH HIGH
S4 (Suspend to Disk) LOW LOW HIGH
S5 (Soft OFF) LOW LOW LOW

EC SM Bus1 Address EC SM Bus2 Address
G3 LOW LOW LOW
Power Device HEX Address Power Device HEX Address
+3VL Smart Battery 16 H 0001 0110 b +3VS PCH 96 H 1001 0110 b
4
Power Device HEX Address 4

Size Document Number
Rev
Custom B
401981
A B C D E
5 4 3 2 1
JCPUB
1 2 H_COMP3 AT23
R1 20_0402_1% COMP3
BCLK A16 CLK_CPU_BCLK <21>
MISC
1 2 H_COMP2 AT24 B16 CLK_CPU_BCLK# <21>
R2 20_0402_1% COMP2 BCLK#
CLOCKS
1 2 H_COMP1 G16 AR30 CLK_CPU_XDP_R 1 2 CLK_CPU_XDP
R4 49.9_0402_1% COMP1 BCLK_ITP CLK_CPU_XDP#_R 1 R41 @ 2 0_0402_5% CLK_CPU_XDP#
BCLK_ITP# AT30
1 2 H_COMP0 AT26 R42 @ 0_0402_5%
R3 49.9_0402_1% COMP0
PEG_CLK E16 CLK_PEG <17>
D16 +VTT
PEG_CLK# CLK_PEG# <17>
PAD T41 TP_SKTOCC# AH24
+VTT SKTOCC#
DPLL_REF_SSCLK A18 Unused by Clarksfield rPGA989
D A17 PM_EXTTS#0 R15 2 1 10K_0402_5% D
CATERR# DPLL_REF_SSCLK#
1 2 AK14 CATERR#
THERMAL
R18 49.9_0402_1% PM_EXTTS#_R R13 2 1 10K_0402_5%
F6 SM_DRAMRST#_CPU
SM_DRAMRST#
<21> PECI AT15 PECI
SM_RCOMP[0] AL1 SM_RCOMP_0 R6 1 2 100_0402_1%
AM1 SM_RCOMP_1 R7 1 2 24.9_0402_1% DDR3 Compensation Signals
Power has removed VR_TT# SM_RCOMP[1] Layout Note:Please these
SM_RCOMP[2] AN1 SM_RCOMP_2 R8 1 2 130_0402_1% resistors near Processor
+VTT 1 2 H_PROCHOT#_D AN26 R19 unmount for NPS@
+VTT R9 68_0402_5% PROCHOT#
AN15 PM_EXTTS#0
DDR3
MISC
PM_EXT_TS#[0]
PM_EXT_TS#[1] AP15 PM_EXTTS#_R 2 1 PM_EXTTS# <11,12> @
R12 0_0402_5% 2 1
AK15 R19 0_0402_5%
<21> H_THERMTRIP# THERMTRIP#
2
R10
68_0402_5% AT28 XDP_PRDY#
PRDY#
D
@ AP27 XDP_PREQ# SM_DRAMRST#_CPU 3 1
PREQ# SM_DRAMRST# <11,12>
1
1
AN28 XDP_TCK Q41
H_CPURST# XDP_RST#_R H_CPURST# TCK XDP_TMS BSS138_NL_SOT23-3
G
1 2 AP26 AP28
2
RESET_OBS# TMS
PWR MANAGEMENT
R36 1K_0402_5% AT27 XDP_TRST# Routed as a single daisy chain R127
TRST# 100K_0402_5%
JTAG & BPM

RST_GATE <21>
AL15 AT29 XDP_TDI_R
<18> PMSYNCH
2
PM_SYNC TDI XDP_TDO_R
TDO AR27 C301, Q41,
2
AR29 XDP_TDI_M 2 1 +3VS C301 R127 from PS@
+1.5V_CPU TDI_M
2 1 H_PWRGOOD1_R AN14 VCCPWRGOOD_1 TDO_M AP29 XDP_TDO_M R312 1K_0402_5% 0.047U_0402_16V7K
to mount
0_0402_5% R25
1
AN25 XDP_DBRESET#
DBR# XDP_DBRESET# <18>
C H_PWRGOOD AN27 C
<21> H_PWRGOOD VCCPWRGOOD_0
2
R28 @ AJ22 XDP_BPM#0 Add on 10/28

1.1K_0402_1% DRAMPWROK BPM#[0] XDP_BPM#1
<18> DRAMPWROK AK13 SM_DRAMPWROK BPM#[1] AK22
AK24 XDP_BPM#2
BPM#[2] XDP_BPM#3
AJ24
1
VTTPWROK_CPU AM15 BPM#[3]

<39> VTTPWROK_CPU VTTPWRGOOD BPM#[4] AJ25
DRAMPWROK AH22
BPM#[5]
BPM#[6] AK23
TAPPWRGD AM26 AH23 XDP_TDI_R 1 2 XDP_TDI
TAPPWRGOOD BPM#[7]
1
JTAG MAPPING R20 0_0402_5%

750_0402_1% BUF_PLT_RST#_R XDP_TDO_M
<20> BUF_PLT_RST# AL14 RSTIN# 1 @ 2 XDP_TDO
R29 1.5K_0402_1% R30 Scan Chain STUFF -> R20, R23, R27 R21 0_0402_5%
1
(Default) NO STUFF -> R21, R26
2
R31 R23
750_0402_1% IC,AUB_CFD_rPGA,R0P9 0_0402_5%
@ CPU Only STUFF -> R20, R21
NO STUFF -> R23, R26, R27
2
XDP_TDI_M 1 @ 2
R28 unmount for NPS@ R26 0_0402_5%
GMCH Only STUFF -> R26, R27
R29 always mount for PS@ NO STUFF -> R20, R21, R23 XDP_TDO_R 1 2
R27 0_0402_5%
@
B For S3 CPU Power Saving XDP_PRDY# R358 1 2 0_0402_5% XDP_PRDY#_R XDPSFF-24Pin
Connector B
@
XDP_PREQ# R359 1 2 0_0402_5% XDP_PREQ#_R
@ JXDP
XDP_TCK R360 1 2 0_0402_5% XDP_TCK_R XDP_PREQ#_R 1
@ XDP_PRDY#_R 1
place near JCPU 2 2
XDP_TMS R367 1 2 0_0402_5% XDP_TMS_R 3
+3VALW @ XDP_BPM#0_R 3
4 4
XDP_TRST# R370 1 2 0_0402_5% XDP_TRST#_R XDP_BPM#1_R 5
1000P_0402_50V7K 5
2 1 C487 DRAMPWROK 1 2 @ 6 6
C163 0.1U_0402_16V4Z XDP_BPM#0 R371 1 2 0_0402_5% XDP_BPM#0_R XDP_BPM#2_R 7
@ XDP_BPM#3_R 7
8 8
5
1000P_0402_50V7K 2 1 C488 VTTPWROK_CPU U16 XDP_BPM#1 R373 1 2 0_0402_5% XDP_BPM#1_R @ R32 1K_0402_5% 9
VTTPWROK @ H_PWRGOOD H_PWRGOOD_R 9
1 1 2 10
P
<34,39> VTTPWROK IN1 10

4 DRAMPWROK XDP_BPM#2 R374 1 2 0_0402_5% XDP_BPM#2_R TAPPWRGD 1 2 TAPPWRGD_R 11
O R33 1.5K_0402_1% @ @ R35 0_0402_5% CLK_CPU_XDP 11
2 IN2 12 12
G
XDP_BPM#3 R375 1 2 0_0402_5% XDP_BPM#3_R CLK_CPU_XDP# 13

SN74AHC1G08DCKR_SC70-5 @ 13
+VTT 14
3
XDP_DBRESET# R390 1 14
0715 --> change BOM structure to mount 2 0_0402_5% XDP_DBRESET#_R XDP_RST#_R 15 15
XDP_DBRESET#_R 16 16
17 17
2 @ 1 EMI request, close to JCPU 1 2 1 XDP_TDO 18
0_0402_5% R84 51_0402_5% R14 XDP_TRST#_R 18
19 19
1
C1 XDP_TDI 20
0.1U_0402_10V6K XDP_TMS_R 20
21 21
@ 2 R11 22
51_0402_5% 22
23 23 GND 25
XDP_TCK_R 24 26
2
24 GND
A A
MOLEX_52435-2472
@

Custom B
401981
5 4 3 2 1
5 4 3 2 1
D D
JCPUA
B26 PEG_COMP 1 2
PEG_ICOMPI R38 49.9_0402_1%
PEG_ICOMPO A26
<18> DMI_PTX_CRX_N0 A24 DMI_RX#[0] PEG_RCOMPO B27
C23 A25 PEG_RBIAS 1 2
<18> DMI_PTX_CRX_N1 DMI_RX#[1] PEG_RBIAS
B22 R39 750_0402_1%
<18> DMI_PTX_CRX_N2 DMI_RX#[2]
<18> DMI_PTX_CRX_N3 A21 DMI_RX#[3] PEG_RX#[0] K35
PEG_RX#[1] J34
<18> DMI_PTX_CRX_P0 B24 DMI_RX[0] PEG_RX#[2] J33
<18> DMI_PTX_CRX_P1 D23 DMI_RX[1] PEG_RX#[3] G35
DMI
<18> DMI_PTX_CRX_P2 B23 DMI_RX[2] PEG_RX#[4] G32
<18> DMI_PTX_CRX_P3 A22 DMI_RX[3] PEG_RX#[5] F34
PEG_RX#[6] F31
<18> DMI_CTX_PRX_N0 D24 DMI_TX#[0] PEG_RX#[7] D35
<18> DMI_CTX_PRX_N1 G24 DMI_TX#[1] PEG_RX#[8] E33
<18> DMI_CTX_PRX_N2 F23 DMI_TX#[2] PEG_RX#[9] C33
<18> DMI_CTX_PRX_N3 H23 DMI_TX#[3] PEG_RX#[10] D32
PEG_RX#[11] B32
<18> DMI_CTX_PRX_P0 D25 DMI_TX[0] PEG_RX#[12] C31
<18> DMI_CTX_PRX_P1 F24 DMI_TX[1] PEG_RX#[13] B28
<18> DMI_CTX_PRX_P2 E23 DMI_TX[2] PEG_RX#[14] B30
<18> DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31
PEG_RX[0] J35
PEG_RX[1] H34
PEG_RX[2] H33
<18> FDI_CTX_PRX_N0 E22 FDI_TX#[0] PEG_RX[3] F35
C D21 G33 C
<18> FDI_CTX_PRX_N1 FDI_TX#[1] PEG_RX[4]
<18> FDI_CTX_PRX_N2 D19 FDI_TX#[2] PEG_RX[5] E34
<18> FDI_CTX_PRX_N3 D18 FDI_TX#[3] PEG_RX[6] F32
<18> FDI_CTX_PRX_N4 G21 FDI_TX#[4] PEG_RX[7] D34
PCI EXPRESS -- GRAPHICS

<18> FDI_CTX_PRX_N5 E19 FDI_TX#[5] PEG_RX[8] F33
<18> FDI_CTX_PRX_N6 F21 FDI_TX#[6] PEG_RX[9] B33
<18> FDI_CTX_PRX_N7 G18 FDI_TX#[7] Intel(R) FDI PEG_RX[10] D31
A32
PEG_RX[11]
PEG_RX[12] C30
D22 A28
<18>
<18>
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1 C21
FDI_TX[0]
FDI_TX[1]
PEG_RX[13]
PEG_RX[14] B29 FAN Control Circuit
<18> FDI_CTX_PRX_P2 D20 FDI_TX[2] PEG_RX[15] A30
<18> FDI_CTX_PRX_P3 C18 FDI_TX[3]
<18> FDI_CTX_PRX_P4 G22 FDI_TX[4] PEG_TX#[0] L33
E20 M35 +5VS
<18> FDI_CTX_PRX_P5 FDI_TX[5] PEG_TX#[1]
<18> FDI_CTX_PRX_P6 F20 FDI_TX[6] PEG_TX#[2] M33
<18> FDI_CTX_PRX_P7 G19 FDI_TX[7] PEG_TX#[3] M30 1A
PEG_TX#[4] L31
<18> FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32
<18> FDI_FSYNC1 E17 FDI_FSYNC[1] PEG_TX#[6] M29
PEG_TX#[7] J31
<18> FDI_INT C17 FDI_INT PEG_TX#[8] K29 2
PEG_TX#[9] H30
C3 JFAN @
<18> FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
<18> FDI_LSYNC1 D17 F29 10U_0805_10V4Z +FAN1 1
FDI_LSYNC[1] PEG_TX#[11] 1 1
PEG_TX#[12] E28 2 2
PEG_TX#[13] D29 2 3 3
D27 U1
PEG_TX#[14] C4
PEG_TX#[15] C26 1 EN GND 8 4 GND
B @ 1000P_0402_25V8J B
2 VIN GND 7 5 GND
+FAN1 1
PEG_TX[0] L34 3 VOUT GND 6
PEG_TX[1] M34 <31> EN_DFAN1 4 VSET GND 5
M32 1 ACES_85204-0300N
PEG_TX[2] APL5607KI-TRG_SO8
PEG_TX[3] L30 10mil
M31 C5
PEG_TX[4] R34 10K_0402_5%
PEG_TX[5] K31 10U_0805_10V4Z
2
PEG_TX[6] M28 2 1 +3VS
PEG_TX[7] H31
PEG_TX[8] K28 FAN_SPEED1 <31>
PEG_TX[9] G30
PEG_TX[10] G29
F28 C6
PEG_TX[11] 0.01U_0402_25V7K
PEG_TX[12] E27
PEG_TX[13] D28
PEG_TX[14] C27
PEG_TX[15] C25
IC,AUB_CFD_rPGA,R0P9
@
Remove Cap, for EMI

A A

B B
401981
5 4 3 2 1
5 4 3 2 1
JCPUC JCPUD
<11> DDR_A_D[0..63] <12> DDR_B_D[0..63]
SA_CK[0] AA6 DDRA_CLK0 <11> SB_CK[0] W8 DDRB_CLK0 <12>

SA_CK#[0] AA7 DDRA_CLK0# <11> SB_CK#[0] W9 DDRB_CLK0# <12>
P7 DDR_B_D0 B5 M3
SA_CKE[0] DDRA_CKE0 <11> SB_DQ[0] SB_CKE[0] DDRB_CKE0 <12>
DDR_A_D0 A10 DDR_B_D1 A5
DDR_A_D1 SA_DQ[0] DDR_B_D2 SB_DQ[1]
C10 SA_DQ[1] C3 SB_DQ[2]
D DDR_A_D2 C7 DDR_B_D3 B3 V7 D
SA_DQ[2] SB_DQ[3] SB_CK[1] DDRB_CLK1 <12>
DDR_A_D3 A7 Y6 DDR_B_D4 E4 V6
SA_DQ[3] SA_CK[1] DDRA_CLK1 <11> SB_DQ[4] SB_CK#[1] DDRB_CLK1# <12>
DDR_A_D4 B10 Y5 DDR_B_D5 A6 M2
SA_DQ[4] SA_CK#[1] DDRA_CLK1# <11> SB_DQ[5] SB_CKE[1] DDRB_CKE1 <12>
DDR_A_D5 D10 P6 DDR_B_D6 A4
SA_DQ[5] SA_CKE[1] DDRA_CKE1 <11> SB_DQ[6]
DDR_A_D6 E10 DDR_B_D7 C4
A8 SA_DQ[7] D1 SB_DQ[8]
DDR_A_D8 D8 DDR_B_D9 D2
F10 SA_DQ[9] SA_CS#[0] AE2 DDRA_SCS0# <11> F2 SB_DQ[10] SB_CS#[0] AB8 DDRB_SCS0# <12>
DDR_A_D10 E6 AE8 DDR_B_D11 F1 AD6
SA_DQ[10] SA_CS#[1] DDRA_SCS1# <11> SB_DQ[11] SB_CS#[1] DDRB_SCS1# <12>
DDR_A_D11 F7 DDR_B_D12 C2
E9 SA_DQ[12] F5 SB_DQ[13]
DDR_A_D13 B7 DDR_B_D14 F3
E7 SA_DQ[14] SA_ODT[0] AD8 DDRA_ODT0 <11> G4 SB_DQ[15] SB_ODT[0] AC7 DDRB_ODT0 <12>
DDR_A_D15 C6 AF9 DDR_B_D16 H6 AD1
SA_DQ[15] SA_ODT[1] DDRA_ODT1 <11> SB_DQ[16] SB_ODT[1] DDRB_ODT1 <12>
DDR_A_D16 H10 DDR_B_D17 G2
G8 SA_DQ[17] J6 SB_DQ[18]
DDR_A_D18 K7 DDR_B_D19 J3
J8 SA_DQ[19] G1 SB_DQ[20] DDR_B_DM[0..7] <12>
DDR_A_D20 G7 DDR_B_D21 G5 D4 DDR_B_DM0
SA_DQ[20] DDR_A_DM[0..7] <11> SB_DQ[21] SB_DM[0]
DDR_A_D21 G10 DDR_B_D22 J2 E1 DDR_B_DM1
DDR_A_D22 SA_DQ[21] DDR_A_DM0 DDR_B_D23 SB_DQ[22] SB_DM[1] DDR_B_DM2
J7 SA_DQ[22] SA_DM[0] B9 J1 SB_DQ[23] SB_DM[2] H3
DDR_A_D23 J10 D7 DDR_A_DM1 DDR_B_D24 J5 K1 DDR_B_DM3
DDR_A_D24 SA_DQ[23] SA_DM[1] DDR_A_DM2 DDR_B_D25 SB_DQ[24] SB_DM[3] DDR_B_DM4
L7 SA_DQ[24] SA_DM[2] H7 K2 SB_DQ[25] SB_DM[4] AH1
DDR_A_D25 M6 M7 DDR_A_DM3 DDR_B_D26 L3 AL2 DDR_B_DM5
DDR_A_D26 SA_DQ[25] SA_DM[3] DDR_A_DM4 DDR_B_D27 SB_DQ[26] SB_DM[5] DDR_B_DM6
M8 SA_DQ[26] SA_DM[4] AG6 M1 SB_DQ[27] SB_DM[6] AR4
DDR_A_D27 L9 AM7 DDR_A_DM5 DDR_B_D28 K5 AT8 DDR_B_DM7
DDR_A_D28 SA_DQ[27] SA_DM[5] DDR_A_DM6 DDR_B_D29 SB_DQ[28] SB_DM[7]
L6 SA_DQ[28] SA_DM[6] AN10 K4 SB_DQ[29]
DDR_A_D29 K8 AN13 DDR_A_DM7 DDR_B_D30 M4
DDR_A_D30 SA_DQ[29] SA_DM[7] DDR_B_D31 SB_DQ[30]
N8 SA_DQ[30] N5 SB_DQ[31]
C DDR_A_D31 P9 DDR_B_D32 AF3 C
AH5 SA_DQ[32] AG1 SB_DQ[33] DDR_B_DQS#[0..7] <12>
DDR_A_D33 AF5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
SA_DQ[33] DDR_A_DQS#[0..7] <11> SB_DQ[34] SB_DQS#[0]
DDR_A_D34 AK6 C9 DDR_A_DQS#0 DDR_B_D35 AK1 F4 DDR_B_DQS#1
DDR SYSTEM MEMORY A
DDR_A_D35 SA_DQ[34] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D36 SB_DQ[35] SB_DQS#[1] DDR_B_DQS#2

AK7 SA_DQ[35] SA_DQS#[1] F8 AG4 SB_DQ[36] SB_DQS#[2] J4
DDR_A_D36 AF6 J9 DDR_A_DQS#2 DDR_B_D37 AG3 L4 DDR_B_DQS#3
DDR_A_D37 SA_DQ[36] SA_DQS#[2] SB_DQ[37] SB_DQS#[3]
AG5 N9 DDR_A_DQS#3 DDR_B_D38 AJ4 AH2 DDR_B_DQS#4
DDR SYSTEM MEMORY - B

AJ7 SA_DQ[38] SA_DQS#[4] AH7 DDR_A_DQS#4 DDR_B_D39 AH4 SB_DQ[39] SB_DQS#[5] AL4 DDR_B_DQS#5
DDR_A_D39 AJ6 AK9 DDR_A_DQS#5 DDR_B_D40 AK3 AR5 DDR_B_DQS#6
AJ10 SA_DQ[40] SA_DQS#[6] AP11 DDR_A_DQS#6 DDR_B_D41 AK4 SB_DQ[41] SB_DQS#[7] AR8 DDR_B_DQS#7
DDR_A_D41 AJ9 AT13 DDR_A_DQS#7 DDR_B_D42 AM6
DDR_A_D42 SA_DQ[41] SA_DQS#[7] DDR_B_D43 SB_DQ[42]
AL10 SA_DQ[42] AN2 SB_DQ[43]
DDR_A_D43 AK12 DDR_B_D44 AK5
AK8 SA_DQ[44] AK2 SB_DQ[45]
DDR_A_D45 AL7 DDR_B_D46 AM4
SA_DQ[45] DDR_A_DQS[0..7] <11> SB_DQ[46]
DDR_A_D46 AK11 C8 DDR_A_DQS0 DDR_B_D47 AM3
SA_DQ[46] SA_DQS[0] SB_DQ[47] DDR_B_DQS[0..7] <12>
DDR_A_D47 AL8 F9 DDR_A_DQS1 DDR_B_D48 AP3 C5 DDR_B_DQS0
DDR_A_D48 SA_DQ[47] SA_DQS[1] DDR_A_DQS2 DDR_B_D49 SB_DQ[48] SB_DQS[0] DDR_B_DQS1
AN8 SA_DQ[48] SA_DQS[2] H9 AN5 SB_DQ[49] SB_DQS[1] E3
DDR_A_D49 AM10 M9 DDR_A_DQS3 DDR_B_D50 AT4 H4 DDR_B_DQS2
AR11 SA_DQ[50] SA_DQS[4] AH8 AN6 SB_DQ[51] SB_DQS[3] M5
DDR_A_D51 AL11 AK10 DDR_A_DQS5 DDR_B_D52 AN4 AG2 DDR_B_DQS4
AM9 SA_DQ[52] SA_DQS[6] AN11 AN3 SB_DQ[53] SB_DQS[5] AL5
DDR_A_D53 AN9 AR13 DDR_A_DQS7 DDR_B_D54 AT5 AP5 DDR_B_DQS6
DDR_A_D54 SA_DQ[53] SA_DQS[7] DDR_B_D55 SB_DQ[54] SB_DQS[6] DDR_B_DQS7
AT11 SA_DQ[54] AT6 SB_DQ[55] SB_DQS[7] AR7
DDR_A_D55 AP12 DDR_B_D56 AN7
AM12 SA_DQ[56] DDR_A_MA[0..15] <11> AP6 SB_DQ[57]
DDR_A_D57 AN12 DDR_B_D58 AP8
DDR_A_D58 SA_DQ[57] DDR_A_MA0 DDR_B_D59 SB_DQ[58]
AM13 SA_DQ[58] SA_MA[0] Y3 AT9 SB_DQ[59]
DDR_A_D59 AT14 W1 DDR_A_MA1 DDR_B_D60 AT7
B DDR_A_D60 SA_DQ[59] SA_MA[1] DDR_A_MA2 DDR_B_D61 SB_DQ[60] B
AT12 SA_DQ[60] SA_MA[2] AA8 AP9 SB_DQ[61]
DDR_A_D61 AL13 AA3 DDR_A_MA3 DDR_B_D62 AR10
SA_DQ[61] SA_MA[3] SB_DQ[62] DDR_B_MA[0..15] <12>
DDR_A_D62 AR14 V1 DDR_A_MA4 DDR_B_D63 AT10 U5 DDR_B_MA0
DDR_A_D63 SA_DQ[62] SA_MA[4] DDR_A_MA5 SB_DQ[63] SB_MA[0] DDR_B_MA1
AP14 SA_DQ[63] SA_MA[5] AA9 SB_MA[1] V2
V8 DDR_A_MA6 T5 DDR_B_MA2
SA_MA[6] DDR_A_MA7 SB_MA[2] DDR_B_MA3
SA_MA[7] T1 SB_MA[3] V3
Y9 DDR_A_MA8 R1 DDR_B_MA4
<11> DDR_A_BS0 AC3 SA_BS[0] SA_MA[9] U6 <12> DDR_B_BS0 AB1 SB_BS[0] SB_MA[5] T8
AB2 AD4 DDR_A_MA10 W5 R2 DDR_B_MA6
<11> DDR_A_BS1 SA_BS[1] SA_MA[10] <12> DDR_B_BS1 SB_BS[1] SB_MA[6]
U7 T2 DDR_A_MA11 R7 R6 DDR_B_MA7
<11> DDR_A_BS2 SA_BS[2] SA_MA[11] <12> DDR_B_BS2 SB_BS[2] SB_MA[7]
U3 DDR_A_MA12 R4 DDR_B_MA8
SA_MA[13] AG8 SB_MA[9] R5
T3 DDR_A_MA14 AC5 AB5 DDR_B_MA10
SA_MA[14] <12> DDR_B_CAS# SB_CAS# SB_MA[10]
AE1 V9 DDR_A_MA15 Y7 P3 DDR_B_MA11
<11> DDR_A_CAS# SA_CAS# SA_MA[15] <12> DDR_B_RAS# SB_RAS# SB_MA[11]
AB3 AC6 R3 DDR_B_MA12
<11> DDR_A_RAS# SA_RAS# <12> DDR_B_WE# SB_WE# SB_MA[12]
AE9 AF7 DDR_B_MA13
<11> DDR_A_WE# SA_WE# SB_MA[13]
P5 DDR_B_MA14
SB_MA[14] DDR_B_MA15
SB_MA[15] N1
@
A A
@

B B
401981
5 4 3 2 1
5 4 3 2 1
Material Note (+VTT):

JCPUF 390uF/ 10mohm, number are 3,
power x1, HW x2
+CPU_CORE Clarksfield: 65A Clarksfield: 21A (Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)
+VTT
Auburndale:48A Auburndale:18A +CPU_CORE
AG35 VCC1 VTT0_1 AH14
AG34 AH12 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K
D VCC2 VTT0_2 D
AG33 VCC3 VTT0_3 AH11
AG32 VCC4 VTT0_4 AH10 1 1 1 1 1 1 1 1 1
C144 1 2 390U_2.5V_M_R10 C81 1 2 10U_0805_10V4K
+
AG31 VCC5 VTT0_5 J14
AG30 VCC6 VTT0_6 J13
C267 1 2 390U_2.5V_M_R10 C83 1 2 10U_0805_10V4K C71 C72 C73 C74 C75 C76 C77 C78 C79
+
AG29 VCC7 VTT0_7 H14
2 2 2 2 2 2 2 2 2
AG28 VCC8 VTT0_8 H12
AG27 G14 C85 1 2 10U_0805_10V4K
VCC9 VTT0_9 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K
AG26 VCC10 VTT0_10 G13
AF35 G12 C87 1 2 10U_0805_10V4K
VCC11 VTT0_11
AF34 VCC12 VTT0_12 G11
AF33 F14 C89 1 2 22U_0805_6.3V6M C88 1 2 10U_0805_10V4K
VCC13 VTT0_13
AF32 VCC14 VTT0_14 F13
AF31 F12 C91 1 2 22U_0805_6.3V6M C90 1 2 10U_0805_10V4K
VCC15 VTT0_15
AF30 VCC16 VTT0_16 F11 (Place these capacitors under CPU socket, top layer)
AF29 E14 C92 1 2 10U_0805_10V4K
VCC17 VTT0_17
AF28 VCC18 VTT0_18 E12 SF000002O00 +CPU_CORE
AF27 D14 C94 1 2 10U_0805_10V4K@
AF26
VCC19 VTT0_19
D13
ESR 10m-ohm
VCC20 VTT0_20
H6.3
1.1V RAIL POWER
AD35 D12 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K
VCC21 VTT0_21
AD34 VCC22 VTT0_22 D11
AD33 VCC23 VTT0_23 C14 1 1 1 1 1 1 1
AD32 VCC24 VTT0_24 C13
AD31 VCC25 VTT0_25 C12
AD30 C11 C98 C99 C100 C101 C102 C103 C104
VCC26 VTT0_26 2 2 2 2 2 2 2
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12
AD27 A14 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K 10U_0805_10V4K
VCC29 VTT0_29
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 VCC33 Power team request for F-Din
C
AC32 VCC34 (Place these capacitors on CPU cavity, Bottom Layer) C
AC31 VCC35
AC30 VCC36 VTT0_33 AF10
AC29 AE10 +CPU_CORE
VCC37 VTT0_34 +CPU_CORE
AC28 VCC38 VTT0_35 AC10
CPU CORE SUPPLY
AC27 AB10 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M

VCC39 VTT0_36 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
AC26 VCC40 VTT0_37 Y10
AA35 VCC41 VTT0_38 W10 1 1 1 1 1 1
AA34 U10 1 1 1 1 1 1 1 C105 C106 C107 C108 C109 C110
VCC42 VTT0_39 C114 C179 C131 C116 C132 C129 C149
AA33 VCC43 VTT0_40 T10
AA32 VCC44 VTT0_41 J12
2 2 2 2 2 2
2 2 2 2 2 2 2
AA29 J15 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
VCC47 VTT0_44 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
AA28 VCC48
AA27 VCC49
AA26 VCC50
Y35 +CPU_CORE
VCC51
Y34 VCC52
Y33 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
VCC53
Y32 VCC54
Y31 VCC55 1 1 1 1 1 1
Y30 C111 C112 C113 C130 C115 C148
VCC56
Y29 VCC57
Y28 VCC58 2 2 2 2 2 2
Y27 VCC59
Y26 VCC60 CRB default setting:
V35 AN33 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
VCC61 PSI# H_PSI# <42>
V34 VID[6:0]=[0100111]
POWER
VCC62
V33 VCC63
V32 VCC64 VID[0] AK35 CPU_VID0 <42>
B B
V29 VCC67 VID[3] AL35 CPU_VID3 <42> VTT Rail
CPU VIDS
V28 VCC68 VID[4] AL33 CPU_VID4 <42> TOP side (under inductor)
V27 VCC69 VID[5] AM33 CPU_VID5 <42>
V26 VCC70 VID[6] AM35 CPU_VID6 <42> Auburndale +1.1VS_VTT=1.05V
U35 AM34 H_DPRSLPVR_R 1 2 H_DPRSLPVR <42>
U34
VCC71 PROC_DPRSLPVR R62 0_0402_5% Clarksfield +1.1VS_VTT=1.1V
VCC72 +CPU_CORE
U33 VCC73
U32 VCC74
U31 G15 H_VTTSELECT T3 PAD 330U_D2_2.5VM_R9M 330U_D2_2.5VM_R9M
VCC75 VTT_SELECT
U30 VCC76 H_VTTSELECT = low, 1.1V 1 1 1 1
U29 VCC77
U28 H_VTTSELECT = high, 1.05V C121 + C122 + C123 + C124 +
VCC78
U27 VCC79
U26 330U_D2_2.5VM_R9M 330U_D2_2.5VM_R9M
VCC80 2 2 2 2
R35 VCC81
R34 VCC82
R33 VCC83
R32 VCC84 ISENSE AN35 IMVP_IMON <42>
R31 VCC85
R30 VCC86 1 2 +CPU_CORE
R29 R64 100_0402_1%
VCC87 VCCSENSE_R R65 VCCSENSE
2 0_0402_5%
SENSE LINES
R28 VCC88 VCC_SENSE AJ34 1 VCCSENSE <42> Check list:

R27 AJ35 VSSSENSE_R R66 1 2 0_0402_5% VSSSENSE
VCC89 VSS_SENSE VSSSENSE <42>
R26 VCC90
P35
P34
VCC91
B15 R67
1 2
100_0402_1%
+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF
VCC92 VTT_SENSE VTT_SENSE <39>
P33 VCC93 VSS_SENSE_VTT A15 VSS_SENSE_VTT <39>
P32 VCC94 near CPU +VTT: 4x 330uF, 7x 22uF, 8x 10uF
P31 VCC95
P30 VCC96
P29 VCC97
P28 VCC98
A A
P27 VCC99
P26 VCC100

@
Custom B
401981
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU +1.5V
For EMI request 3A Q33
1 S D 8 form PS@ to mount
2 S D 7
2
+GFX_CORE 3 6
+1.5V_CPU +1.5VS R424 S D
1 4 G D 5
470_0805_5% C273
47P_0402_50V8J 47P_0402_50V8J PJ32 @ FDS6676AS_SO8 R418
2 1 10U_0805_10V4K 1 2 +VSB
1
1 2 1
1
C97 C118 C119 C93 2 220K_0402_5%
@ @ @ @ JUMP_43X79
6
1
2
0.1U_0402_25V6
D Q46B R417 Q46A D
C472
47P_0402_50V8J 47P_0402_50V8J 820K_0402_5%
7/22 modified for cost down. SUSP 5 2 SUSP
SUSP <34,41>
2
2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
1
Change C271 to 4.5mm height OS-CON at PVT
+GFX_CORE JCPUG
1 2 +GFX_CORE
22U_0805_6.3V6M 1U_0402_6.3V4Z AT21 R69 100_0402_1%
VAXG1 VCC_AXG_SENSE_R R365 1
AT19 VAXG2 VAXG_SENSE AR22 2 0_0402_5% VCC_AXG_SENSE <43>
VSS_AXG_SENSE_R R384 1 2 0_0402_5%
SENSE
LINES
1 AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE <43>
1 1 1 1 1 1 AT16 VAXG4
C271 + C95 C127 C117 C96 C120 C86 AR21 1 2
330U_2.5V_M_R17 10U_0805_6.3V6M VAXG5 For Power request R82 100_0402_1%
AR19 VAXG6
2 2 2 2 2 2 2
AR18 VAXG7 near CPU
AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 <43>
AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 <43>
GRAPHICS VIDs
22U_0805_6.3V6M 1U_0402_6.3V4Z 10U_0805_6.3V6M AP19 AN22 C230 1 2 0.1U_0402_16V4Z
VAXG10 GFX_VID[2] GFXVR_VID_2 <43>
AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 <43> Change R136 to 470
AP16 AM23 C314 1 2 0.1U_0402_16V4Z
VAXG12 GFX_VID[4] GFXVR_VID_4 <43> ohm
AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 <43>
GRAPHICS
AN19 AN24 for GFX issue C205 1 2 0.1U_0402_16V4Z
VAXG14 GFX_VID[6] GFXVR_VID_6 <43>
Add C496 Co-Layout with C271 AN18 VAXG15
AN16 GFXVR_EN 1 2 C186 1 2 0.1U_0402_16V4Z
VAXG16 R50 470_0402_5%
AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN <43>
C +GFX_CORE AM19 AT25 GFXVR_DPRSLPVR C
VAXG18 GFX_DPRSLPVR T8 PAD
AM18 AM24 GFXVR_IMON
VAXG19 GFX_IMON GFXVR_IMON <43>
AM16 VAXG20 remove PJ30
1 AL21 R687 2 1 1K_0402_5%
@ VAXG21 @
AL19 VAXG22
C496 + AL18 +1.5V_CPU
330U_D2_2VM_R6M VAXG23 PJ31 @
AL16 VAXG24
AK21 AJ1 1U_0402_6.3V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M 2 1 +1.5V
2 VAXG25 VDDQ1 2 1
AK19 VAXG26 VDDQ2 AF1 1
JUMP_43X79
- 1.5V RAILS
AK18 VAXG27 VDDQ3 AE7 1 1 1 1 1 1 1
+ C216
AK16 VAXG28 Clarksfield: 5A VDDQ4 AE4
C133 C134 C135 C136 C137 C138 C139 390U_2.5V_M_R10
AJ21 VAXG29 VDDQ5 AC1
For POLY Cap. AJ19 VAXG30 Auburndale:3A VDDQ6 AB7
2 2 2 2 2 2 2 2
PJ31 need to open for
AJ18 VAXG31 VDDQ7 AB4 S3 CPU Power Saving
AJ16 VAXG32 VDDQ8 Y1
0714 --> C271 mount, AH21 VAXG33 VDDQ9 W7
POWER
AH19 W4 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 22U_0805_6.3V6M
C496 unmount AH18
VAXG34 VDDQ10
U1
VAXG35 VDDQ11
AH16 VAXG36 VDDQ12 T7
VDDQ13 T4
+VTT Auburndale:22A VDDQ14 P1
VDDQ15 N7
VDDQ16 N4
DDR3
VDDQ17 L1
J24 VTT1_45 VDDQ18 H1
FDI
J23 VTT1_46
H25 +VTT
1 1 VTT1_47
C141 C142
B
(Place these capacitors under CPU socket Edge, top layer) B
22U_0805_6.3V6M 22U_0805_6.3V6M P10 1
2 2 VTT0_59 C143
VTT0_60 N10
VTT0_61 L10
K10 10U_0805_10V4K
VTT0_62 2
Clarksfield: 21A
+VTT
+VTT Auburndale:18A
1.1V
VTT1_63 J22
K26 VTT1_48 VTT1_64 J20
J27 VTT1_49 VTT1_65 J18 1
PEG & DMI
1 1 J26 H21 C145

C146 C147 VTT1_50 VTT1_66
J25 VTT1_51 VTT1_67 H20
H27 H19 22U_0805_6.3V6M
22U_0805_6.3V6M 22U_0805_6.3V6M VTT1_52 VTT1_68 2
G28 VTT1_53
2 2
G27 VTT1_54 (Place these capacitors under CPU socket, top layer)
G26 VTT1_55
F26 +1.8VS
VTT1_56
E26 VTT1_57 VCCPLL1 L26
1.8V
E25 VTT1_58 VCCPLL2 L27

M26 +1.8VS_H_PLL 1U_0402_6.3V4Z 4.7U_0603_6.3V6K 2 1
VCCPLL3 R71 0_0805_5%
1 1 1 1
(Place these capacitors under CPU socket, top layer) Clarksfield: 0.6A C151 C152 C153 C154 C155
Auburndale:1.35A 1U_0402_6.3V4Z
2 2 2 2 22U_0805_6.3V6M
IC,AUB_CFD_rPGA,R0P9 2.2U_0603_6.3V4Z
A A
@

B B
401981
5 4 3 2 1
5 4 3 2 1
JCPUI JCPUH JCPUE
AT20 VSS1 VSS81 AE34 RSVD32 AJ13

AT17 VSS2 VSS82 AE33 RSVD33 AJ12
K27 VSS161 AR31 VSS3 VSS83 AE32
K9 VSS162 AR28 VSS4 VSS84 AE31 AP25 RSVD1
K6 VSS163 AR26 VSS5 VSS85 AE30 AL25 RSVD2 RSVD34 AH25
D K3 VSS164 AR24 VSS6 VSS86 AE29 AL24 RSVD3 RSVD35 AK26 D
J32 VSS165 AR23 VSS7 VSS87 AE28 AL22 RSVD4
J30 VSS166 AR20 VSS8 VSS88 AE27 AJ33 RSVD5 RSVD36 AL26
J21 VSS167 AR17 VSS9 VSS89 AE26 AG9 RSVD6 RSVD_NCTF_37 AR2
J19 VSS168 AR15 VSS10 VSS90 AE6 M27 RSVD7
H35 VSS169 AR12 VSS11 VSS91 AD10 L28 RSVD8 RSVD38 AJ26
H32 VSS170 AR9 VSS12 VSS92 AC8 J17 RSVD9 (SA_DIMM_VREF) RSVD39 AJ27
H28 VSS171 AR6 VSS13 VSS93 AC4 H17 RSVD10(SB_DIMM_VREF)
H26 VSS172 AR3 VSS14 VSS94 AC2 G25 RSVD11
H24 VSS173 AP20 VSS15 VSS95 AB35 G17 RSVD12
H22 VSS174 AP17 VSS16 VSS96 AB34 E31 RSVD13 RSVD_NCTF_40 AP1
H18 VSS175 AP13 VSS17 VSS97 AB33 E30 RSVD14 RSVD_NCTF_41 AT2
H15 VSS176 AP10 VSS18 VSS98 AB32
H13 VSS177 AP7 VSS19 VSS99 AB31 RSVD_NCTF_42 AT3
H11 VSS178 AP4 VSS20 VSS100 AB30 RSVD_NCTF_43 AR1
H8 VSS179 AP2 VSS21 VSS101 AB29 WW41 Recommend not pull down
H5 VSS180 AN34 VSS22 VSS102 AB28 PCIE2.0 Jitter is over on ES1
H2 VSS181 AN31 VSS23 VSS103 AB27
G34 VSS182 AN23 VSS24 VSS104 AB26 RSVD45 AL28
G31 AN20 AB6 3.01K_0402_1% 1 @ R74 2 AM30 AL29
VSS183 VSS25 VSS105 CFG[0] RSVD46
G20 VSS184 AN17 VSS26 VSS106 AA10 AM28 CFG[1] RSVD47 AP30
G9 VSS185 AM29 VSS27 VSS107 Y8 AP31 CFG[2] RSVD48 AP32
G6 AM27 Y4 3.01K_0402_1% 1 @ R75 2 AL32 AL27
VSS186 VSS28 VSS108 3.01K_0402_1% 1 @ R76 CFG[3] RSVD49
G3 VSS187 AM25 VSS29 VSS109 Y2 2 AL30 CFG[4] RSVD50 AT31
F30 VSS188 AM20 VSS30 VSS110 W35 AM31 CFG[5] RSVD51 AT32
F27 VSS189 AM17 VSS31 VSS111 W34 AN29 CFG[6] RSVD52 AP33
F25 VSS190 AM14 VSS32 VSS112 W33 AM32 CFG[7] RSVD53 AR33
F22 VSS191 AM11 VSS33 VSS113 W32 AK32 CFG[8] RSVD_NCTF_54 AT33
F19 AM8 W31 AK31 AT34
RESERVED
C
VSS192 VSS34 VSS114 CFG[9] RSVD_NCTF_55 C
F16 VSS193 AM5 VSS35 VSS115 W30 AK28 CFG[10] RSVD_NCTF_56 AP35
E35 VSS194 AM2 VSS36 VSS116 W29 AJ28 CFG[11] RSVD_NCTF_57 AR35
E32 AL34 W28 AN30 AR32
E29
E24
VSS195
VSS196
VSS197
VSS AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
E21 VSS198 AL20 VSS40 VSS120 W6 AJ29 CFG[15] RSVD_TP_59 E15

E18 VSS199 AL17 VSS41 VSS121 V10 AJ30 CFG[16] RSVD_TP_60 F15
E13 VSS200 AL12 VSS42 VSS122 U8 AK30 CFG[17] KEY A2
E11 VSS201 AL9 VSS43 VSS123 U4 H16 RSVD_TP_86 RSVD62 D15
E8 VSS202 AL6 VSS44 VSS124 U2 RSVD63 C15
E5 VSS203 AL3 VSS45 VSS125 T35 RSVD64 AJ15
E2 AT35 H_NCTF1 PAD T4 AK29 T34 AH15
VSS204 VSS_NCTF1 H_NCTF2 VSS46 VSS126 RSVD65
D33 VSS205 VSS_NCTF2 AT1 PAD T5 AK27 VSS47 VSS127 T33
D30 VSS206 VSS_NCTF3 AR34 AK25 VSS48 VSS128 T32 B19 RSVD15
D26 VSS207 VSS_NCTF4 B34 AK20 VSS49 VSS129 T31 A19 RSVD16
D9 B2 AK17 T30
NCTF
VSS208 VSS_NCTF5 H_NCTF6 VSS50 VSS130

D6 VSS209 VSS_NCTF6 B1 PAD T6 AJ31 VSS51 VSS131 T29 A20 RSVD17
D3 A35 H_NCTF7 PAD T7 AJ23 T28 B20
VSS210 VSS_NCTF7 VSS52 VSS132 RSVD18
C34 VSS211 AJ20 VSS53 VSS133 T27 RSVD_TP_66 AA5
C32 VSS212 AJ17 VSS54 VSS134 T26 U9 RSVD19 RSVD_TP_67 AA4
C29 VSS213 AJ14 VSS55 VSS135 T6 T9 RSVD20 RSVD_TP_68 R8
C28 VSS214 AJ11 VSS56 VSS136 R10 RSVD_TP_69 AD3
C24 VSS215 AJ8 VSS57 VSS137 P8 AC9 RSVD21 RSVD_TP_70 AD2
C22 VSS216 AJ5 VSS58 VSS138 P4 AB9 RSVD22 RSVD_TP_71 AA2
C20 VSS217 AJ2 VSS59 VSS139 P2 CFG0 - PCI-Express Configuration Select RSVD_TP_72 AA1
C19 VSS218 AH35 VSS60 VSS140 N35 RSVD_TP_73 R9
C16 VSS219 AH34 VSS61 VSS141 N34 RSVD_TP_74 AG7
B31 VSS220 AH33 VSS62 VSS142 N33 *1:Single PEG C1 RSVD_NCTF_23 RSVD_TP_75 AE3
B25 VSS221 AH32 VSS63 VSS143 N32 0:Bifurcation enabled A3 RSVD_NCTF_24
B B
B21 VSS222 AH31 VSS64 VSS144 N31
B18 VSS223 AH30 VSS65 VSS145 N30 RSVD_TP_76 V4
B17 VSS224 AH29 VSS66 VSS146 N29 RSVD_TP_77 V5
B13 VSS225 AH28 VSS67 VSS147 N28 RSVD_TP_78 N2
B11 VSS226 AH27 VSS68 VSS148 N27 CFG3 - PCI-Express Static Lane Reversal J29 RSVD26 RSVD_TP_79 AD5
B8 VSS227 AH26 VSS69 VSS149 N26 J28 RSVD27 RSVD_TP_80 AD7
B6 VSS228 AH20 VSS70 VSS150 N6 RSVD_TP_81 W3
B4 VSS229 AH17 VSS71 VSS151 M10 *1 :Normal Operation A34 RSVD_NCTF_28 RSVD_TP_82 W2
A29 VSS230 AH13 VSS72 VSS152 L35 0 :Lane Numbers Reversed A33 RSVD_NCTF_29 RSVD_TP_83 N3
A27 VSS231 AH9 VSS73 VSS153 L32 15 -> 0, 14 -> 1, ... RSVD_TP_84 AE5
A23 VSS232 AH6 VSS74 VSS154 L29 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
A9 VSS233 AH3 VSS75 VSS155 L8 B35 RSVD_NCTF_31
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2 VSS AP34
AF4 VSS78 VSS158 K34 CFG4 - Display Port Presence
AF2 VSS79 VSS159 K33
AE35 VSS80 VSS160 K30
*1:Disabled; No Physical Display Port
attached to Embedded Display Port IC,AUB_CFD_rPGA,R0P9
0:Enabled; An external Display Port @
IC,AUB_CFD_rPGA,R0P9 IC,AUB_CFD_rPGA,R0P9 device is connected to the Embedded

@ @ Display Port
*:Default
A A

Custom B
401981
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
1
JDDRL
2
DDR3 SO-DIMM A M1 Circuit
+VREF_DQA
DDR_A_D0
3
VREF_DQ
VSS
VSS
DQ4 4 DDR_A_D4
DDR_A_D5
Standard Type <7> DDR_A_DQS[0..7] +1.5V
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
5 DQ0 DQ5 6 <7> DDR_A_DQS#[0..7] 2 1 +VREF_DQB
1 1 DDR_A_D1 7 8 R78 0_0402_5%
DQ1 VSS
1
9 10 DDR_A_DQS#0 <7> DDR_A_D[0..63]
VSS DQS0# +1.5V
C156
C157
DDR_A_DM0 11 12 DDR_A_DQS0 R79
DM0 DQS0 1K_0402_1%
13 VSS VSS 14 <7> DDR_A_DM[0..7]
2 2 DDR_A_D2 DDR_A_D6 +V_DDR3_DIMM_REF
15 DQ2 DQ6 16
1
DDR_A_D3 17 18 DDR_A_D7 <7> DDR_A_MA[0..15]
2
DQ3 DQ7 R83
19 VSS VSS 20 2 1 +VREF_DQA
DDR_A_D8 21 22 DDR_A_D12 1K_0402_1% R80 0_0402_5%
DQ8 DQ12
1
D DDR_A_D9 23 24 DDR_A_D13 D
DQ9 DQ13 R81
25 26 R83 from PS@ to mount
2
DDR_A_DQS#1 VSS VSS DDR_A_DM1 1K_0402_1%
close to JDDRL.1 27 DQS1# DM1 28
DDR_A_DQS1 29 30
DQS1 RESET# SM_DRAMRST# <5,12>
31 32
2
DDR_A_D10 VSS VSS DDR_A_D14
33 DQ10 DQ14 34
DDR_A_D11 35 36 DDR_A_D15
DQ11 DQ15
37 VSS VSS 38
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 DQ17 DQ21 42
43 VSS VSS 44
DDR_A_DQS#2 45 46 DDR_A_DM2
DDR_A_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS DDR_A_D28
55 VSS DQ28 56
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS 60
61 62 DDR_A_DQS#3
DDR_A_DM3 VSS DQS3# DDR_A_DQS3
63 DM3 DQS3 64
65 VSS VSS 66
DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS VSS 72
<7> DDRA_CKE0 73 CKE0 CKE1 74 DDRA_CKE1 <7>

75 VDD VDD 76
C 77 78 DDR_A_MA15 C
NC A15 DDR_A_MA14
<7> DDR_A_BS2 79 BA2 A14 80
81 VDD VDD 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
87 VDD VDD 88
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 VDD VDD 100
<7> DDRA_CLK0 101 CK0 CK1 102 DDRA_CLK1 <7>
<7> DDRA_CLK0# 103 CK0# CK1# 104 DDRA_CLK1# <7>
105 VDD VDD 106
DDR_A_MA10 107 108
A10/AP BA1 DDR_A_BS1 <7>
<7> DDR_A_BS0 109 BA0 RAS# 110 DDR_A_RAS# <7>
111 VDD VDD 112
<7> DDR_A_WE# 113 WE# S0# 114 DDRA_SCS0# <7>
<7> DDR_A_CAS# 115 CAS# ODT0 116 DDRA_ODT0 <7>
117 VDD VDD 118
DDR_A_MA13 +V_DDR3_DIMM_REF
119 A13 ODT1 120 DDRA_ODT1 <7>
<7> DDRA_SCS1# 121 S1# NC 122
123 124 R89
VDD VDD +DDR_VREF_CA_DIMMA
125 TEST VREF_CA 126 1 2
127 128 0_0402_5%
DDR_A_D32 VSS VSS DDR_A_D36
129 DQ32 DQ36 130
DDR_A_D33 DDR_A_D37
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
131 DQ33 DQ37 132

133 VSS VSS 134
B DDR_A_DQS#4 DDR_A_DM4 B
135 DQS4# DM4 136
DDR_A_DQS4 137 138 1 1 Layout Note: Layout Note: Place these 4 Caps near Layout Note:
DQS4 VSS DDR_A_D38
139 VSS DQ38 140
Place near JDDRL Command and Control signals of DIMMA Place near JDDRL1.203 and 204
C161
C162
DDR_A_D34 141 142 DDR_A_D39

DDR_A_D35 DQ34 DQ39
143 DQ35 VSS 144
DDR_A_D44 2 2
145 VSS DQ44 146
DDR_A_D40 147 148 DDR_A_D45 +1.5V
DDR_A_D41 DQ40 DQ45 C218 1 +1.5V +0.75VS
2 390U_2.5V_M_R10
+
149 DQ41 VSS 150
151 152 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
153 DM5 DQS5 154 close to JDDRL.126
155 156 C164 1 2 0.1U_0402_16V4Z C165 1 2 10U_0805_6.3V6M
DDR_A_D42 VSS VSS DDR_A_D46 C166 1
157 DQ42 DQ46 158 2 10U_0805_6.3V6M
DDR_A_D43 159 160 DDR_A_D47 C167 1 2 0.1U_0402_16V4Z
DQ43 DQ47 C168 1
161 VSS VSS 162 2 10U_0805_6.3V6M C169 2 1 1U_0402_6.3V4Z
DDR_A_D48 163 164 DDR_A_D52 C170 1 2 0.1U_0402_16V4Z
DDR_A_D49 DQ48 DQ52 DDR_A_D53 C171 1
165 DQ49 DQ53 166 2 10U_0805_6.3V6M C172 2 1 1U_0402_6.3V4Z
167 168 C173 1 2 0.1U_0402_16V4Z
DDR_A_DQS#6 VSS VSS DDR_A_DM6 C174 1
169 DQS6# DM6 170 2 10U_0805_6.3V6M C175 2 1 1U_0402_6.3V4Z
DDR_A_DQS6 171 172
DQS6 VSS DDR_A_D54 C176 1
173 VSS DQ54 174 2 10U_0805_6.3V6M C177 2 1 1U_0402_6.3V4Z
DDR_A_D50 175 176 DDR_A_D55
DDR_A_D51 DQ50 DQ55 C178 1
177 DQ51 VSS 178 2 10U_0805_6.3V6M
179 180 DDR_A_D60
DDR_A_D56 VSS DQ60 DDR_A_D61
181 DQ56 DQ61 182
DDR_A_D57 183 184
DQ57 VSS DDR_A_DQS#7
185 VSS DQS7# 186
DDR_A_DM7 187 188 DDR_A_DQS7
DM7 DQS7
189 VSS VSS 190
DDR_A_D58 191 192 DDR_A_D62
A DQ58 DQ62 A
DDR_A_D59 193 194 DDR_A_D63
R90 1 DQ59 DQ63
2 195 VSS VSS 196
10K_0402_5% 197 198
SA0 EVENT# PM_EXTTS# <5,12>
+3VS 199 VDDSPD SDA 200 PM_SMBDATA <12,13,17,27>
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
201 SA1 SCL 202 PM_SMBCLK <12,13,17,27>

10K_0402_5%
203 204
1 1 +0.75VS VTT VTT +0.75VS Security Classification Compal Secret Data Compal Electronics, Inc.
1
C182
C181 205 206 2010/06/21 2011/06/21 Title
GND1 BOSS1 Issued Date Deciphered Date
R91
207 208
2 2 GND2 BOSS2
2
FOX_AS0A626-U2SN-7F_204P Custom B
@
401981
5 4 3 2 1
A B C D E
+1.5V +1.5V
1
JDDRH
2
Standard Type
+VREF_DQB
DDR_B_D0
3
5
VREF_DQ
VSS
VSS
DQ4 4
6
DDR_B_D4
DDR_B_D5
DDR3 SO-DIMM B
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS 8 <7> DDR_B_DQS#[0..7]
DDR_B_DQS#0
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z 9 10
DDR_B_DM0 VSS DQS0# DDR_B_DQS0
11 DM0 DQS0 12 <7> DDR_B_DQS[0..7]
1 1 13 VSS VSS 14
DDR_B_D2 15 16 DDR_B_D6 <7> DDR_B_D[0..63]
DDR_B_D3 DQ2 DQ6 DDR_B_D7
17 DQ3 DQ7 18
C183
C184
19 VSS VSS 20 <7> DDR_B_DM[0..7]
2 2 DDR_B_D8 DDR_B_D12
21 DQ8 DQ12 22
1 DDR_B_D9 23 24 DDR_B_D13 <7> DDR_B_MA[0..15] 1
DQ9 DQ13
25 VSS VSS 26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS1# DM1
29 DQS1 RESET# 30 SM_DRAMRST# <5,11>
31 VSS VSS 32
DDR_B_D10 33 34 DDR_B_D14
close to JDDRH.1 35 DQ11 DQ15 36
37 VSS VSS 38
41 DQ17 DQ21 42
43 VSS VSS 44
47 DQS2 VSS 48
49 50 DDR_B_D22
DDR_B_D18 VSS DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS DDR_B_D28
55 VSS DQ28 56
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS 60
61 62 DDR_B_DQS#3
63 DM3 DQS3 64
65 VSS VSS 66
69 DQ27 DQ31 70
71 VSS VSS 72
<7> DDRB_CKE0 73 CKE0 CKE1 74 DDRB_CKE1 <7>

75 VDD VDD 76
2 77 78 DDR_B_MA15 2
NC A15 DDR_B_MA14
<7> DDR_B_BS2 79 BA2 A14 80
81 VDD VDD 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD VDD 88
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD VDD 100
<7> DDRB_CLK0 101 CK0 CK1 102 DDRB_CLK1 <7>
<7> DDRB_CLK0# 103 CK0# CK1# 104 DDRB_CLK1# <7>
105 VDD VDD 106
DDR_B_MA10 107 108
A10/AP BA1 DDR_B_BS1 <7>
<7> DDR_B_BS0 109 BA0 RAS# 110 DDR_B_RAS# <7>
111 VDD VDD 112
<7> DDR_B_WE# 113 WE# S0# 114 DDRB_SCS0# <7>
<7> DDR_B_CAS# 115 CAS# ODT0 116 DDRB_ODT0 <7>
117 VDD VDD 118
DDR_B_MA13 119 120
A13 ODT1 DDRB_ODT1 <7> +V_DDR3_DIMM_REF
<7> DDRB_SCS1# 121 S1# NC 122
123 124 R97
VDD VDD +DDR_VREF_CA_DIMMB
125 TEST VREF_CA 126 1 2 0_0402_5% Layout Note: Layout Note: Place these 4 Caps near Layout Note:
127 VSS VSS 128
DDR_B_D32 DDR_B_D36 Place near JDDRH Command and Control signals of DIMMB Place near JDDRH.203 and 204
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
129 DQ32 DQ36 130

DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37
133 VSS VSS 134 1 1
3 DDR_B_DQS#4 135 136 DDR_B_DM4 +1.5V 3
DDR_B_DQS4 DQS4# DM4 @ +1.5V +0.75VS
137 DQS4 VSS 138
C187
C188
DDR_B_D38 C189 1 2 330U_B2_2.5VM_R15M
+
139 VSS DQ38 140
DDR_B_D34 DDR_B_D39 2 2
141 DQ34 DQ39 142
DDR_B_D35 143 144 C190 1 2 0.1U_0402_16V4Z C191 1 2 10U_0805_6.3V6M
DQ35 VSS DDR_B_D44 C192 1
145 VSS DQ44 146 2 10U_0805_6.3V6M
DDR_B_D40 147 148 DDR_B_D45 C193 1 2 0.1U_0402_16V4Z
DDR_B_D41 DQ40 DQ45 C194 1
149 DQ41 VSS 150 2 10U_0805_6.3V6M C195 2 1 1U_0402_6.3V4Z
151 152 DDR_B_DQS#5 C196 1 2 0.1U_0402_16V4Z
DDR_B_DM5 VSS DQS5# DDR_B_DQS5 C197 1
153 DM5 DQS5 154 close to JDDRH.126 2 10U_0805_6.3V6M C198 2 1 1U_0402_6.3V4Z
155 156 C199 1 2 0.1U_0402_16V4Z
DDR_B_D42 VSS VSS DDR_B_D46 C200 1
157 DQ42 DQ46 158 2 10U_0805_6.3V6M C201 2 1 1U_0402_6.3V4Z
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47 C202 1
161 VSS VSS 162 2 10U_0805_6.3V6M C203 2 1 1U_0402_6.3V4Z
DDR_B_D48 163 164 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53 C204 1
165 DQ49 DQ53 166 2 10U_0805_6.3V6M
167 VSS VSS 168
171 DQS6 VSS 172
173 174 DDR_B_D54
DDR_B_D50 VSS DQ54 DDR_B_D55
175 DQ50 DQ55 176
DDR_B_D51 177 178
DQ51 VSS DDR_B_D60
179 VSS DQ60 180
DDR_B_D56 181 182 DDR_B_D61
DDR_B_D57 DQ56 DQ61
183 DQ57 VSS 184
185 186 DDR_B_DQS#7
187 DM7 DQS7 188
189 VSS VSS 190
DDR_B_D58 191 192 DDR_B_D62
4 DQ58 DQ62 4
DDR_B_D59 193 194 DDR_B_D63
R98 1 DQ59 DQ63
2 195 VSS VSS 196
10K_0402_5% 197 198
SA0 EVENT# PM_EXTTS# <5,11>
+3VS 199 VDDSPD SDA 200 PM_SMBDATA <11,13,17,27>
201 SA1 SCL 202 PM_SMBCLK <11,13,17,27>
2.2U_0603_6.3V4Z 1 R99 2 203 204
1 1
10K_0402_5%
+0.75VS VTT VTT +0.75VS Security Classification Compal Secret Data Compal Electronics, Inc.
205 GND1 BOSS1 206 Issued Date 2010/06/21 Deciphered Date 2011/06/21 Title
C207 C208 207 208
2 2 GND2 BOSS2
0.1U_0402_16V4Z AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
FOX_AS0A626-UASN-7F_204P Custom B
@
401981
A B C D E
A B C D E F G H
Clock Generator For SED For SED

+3VS_CK505
1
For SED For SED
FBMH1608HM601-T_0603 FBMH1608HM601-T_0603 R110
+3VS 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VS_CK505 +1.05VS 1 2 10U_0805_10V4Z 0.1U_0402_16V4Z +1.05VS_CK505 10K_0402_5%
R100 1 1 1 1 R101 1 1 1 1
1
C252
2
2
C209 C210 C211 C212 C251 C219 C220 C221 C222 47P_0402_50V8J CK_PWRGD
@ R401 47P_0402_50V8J
2
0_0603_5% 2 2 2 2 2 2 2 2
1
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z D
1 2 1
1
FBMH1608HM601-T_0603 G CLK_ENABLE# <42>
+1.5VS 1 2 0.1U_0402_16V4Z +1.5VS_CK505 2N7002_SOT23-3 S Q37
3
R126 1 1 1
For SED C213 C214 C215

2 2 2
1U_0402_6.3V4Z 0.1U_0402_16V4Z
+3VS_CK505
Add C213 for NALA eSATA transmit issue Silego Have Internal Pull-Up
+1.05VS_CK505
+3VS_CK505 H_STP_CPU# 10K_0402_5% 2 1 R105

+1.5VS_CK505
+1.05VS_CK505 U5
10K_0402_5% 2 @ 1 R119 +1.05VS
+3VS_CK505 1 32
VDD_USB_48 SCL PM_SMBCLK <11,12,17,27>
2 VSS_48M SDA 31 PM_SMBDATA <11,12,17,27>
3 30 CPU_SEL 1 2
<17> CLK_DOT DOT_96 REF_0/CPU_SEL CLK_14M_PCH <17>
4 29 33_0402_5% R102 CPU_SEL 10K_0402_5% 2 1 R106
<17> CLK_DOT# DOT_96# VDD_REF
5 28 CLK_XTAL_IN
VDD_27 XTAL_IN CLK_XTAL_OUT
6 27MHZ XTAL_OUT 27 IDT Have Internal Pull-Down
7 27MHZ_SS VSS_REF 26
1 2 CLK_48M_CR_R 8 25 CK_PWRGD
<26> CLK_48M_CR USB_48 CKPWRGD/PD#
R400 33_0402_5%
9 VSS_27M VDD_CPU 24
<17> CLK_SATA 10 SATA CPU_0 23 CLK_BCLK <17>
2
<17> CLK_SATA# 11 SATA# CPU_0# 22 CLK_BCLK# <17> Remove C484 (for RF) 2
12 VSS_SRC VSS_CPU 21
<17> PCH_CLK_DMI 13 SRC_1 CPU_1 20
<17> PCH_CLK_DMI# 14 SRC_1# CPU_1# 19
15 18 CLK_XTAL_OUT
H_STP_CPU# VDD_SRC_IO VDD_CPU_IO
16 CPU_STOP# VDD_SRC 17 +1.5VS_CK505
Y1 CPU_SEL CPU_0/0# CPU_1/1#
33 CLK_XTAL_IN 1 2
TGND
2 2
RTM890N-631-GRT QFN 32P 14.318MHZ_16PF_7A14300083 0 (Default) 133MHz 133MHz
C223 C224
22P_0402_50V8J 22P_0402_50V8J
1 1
1 100MHz 100MHz
LVDS / Int.Camera / Int.MIC Conn

0618 --> change camera power rail to +3VS
+LCD_VDD +3VS D84 @
0_0603_5%
W=20mils 0.1U_0402_16V4Z 2
+3VS R398 1 2 +3VS_LVDS_CAM 1 2 1
1
CAM@ C231 CAM@ 3

R107 +3VS JLVDS @
150_0603_5% R120 1 2 LCD_EDID_CLK <19> PACDN042Y3R_SOT23-3
100K_0402_5% USB20_P11_R 1 2
3 W=60mils USB20_N11_R
3 3 4 4
INT_MIC_CLK
LCD_EDID_DATA <19> 3
Camera 5 6 INT_MIC_CLK <29>
6 2
5 6 INT_MIC_DATA
2 7 7 8 8 INT_MIC_DATA <29>
C228 9 10
<19> LCD_TXOUT0+ 9 10 PCH_PWM <19>
0.1U_0402_16V7K 11 12 BKOFF#_R
<19> LCD_TXOUT0- 11 12
3
S
Q1A 13 14
1 G <19> LCD_TXOUT1+ 13 14
2N7002DW-T/R7_SOT363-6 2 1 2 2 Q17 15 16 BKOFF#_R 2 1
<19> LCD_TXOUT1- 15 16 BKOFF# <31>
R109 47K_0402_5% 1 AO3413_SOT23 17 18 R137 33_0402_5%
<19> LCD_TXOUT2+ 17 18
3
C229 D 19 20 +3VS
<19> LCD_TXOUT2-
1
19 20
1
0.01U_0402_25V7K +LCD_VDD 21 22 1
<19> LCD_TXCLK+ 21 22
23 24 +LCDVDD_R R113
2 <19> LCD_TXCLK- 23 24
5 25 26 C232 10K_0402_5%
<19> UMA_ENVDD 25 26
Q1B W=60mils 27 28 +LCD_INV 0.1U_0402_16V4Z
2N7002DW-T/R7_SOT363-6 27 28 2
1 29 30
4
2
29 30
2
C233 31
R112 0.1U_0402_16V4Z GND1
32 GND2
100K_0402_5% 2 B+
ACES_87242-3001-09 Rated Current MAX:600mA 1.5A, 60mils
1
UMA PD 100K ohm L2 2 1 +LCDVDD_R 2 L1 1 +LCD_VDD

DIS PD 10K ohm FBMA-L11-201209-221LMA30T_0805 0_0805_5%
1 1 1 1
C234 C235 C226 C227
68P_0402_50V8J 0.1U_0402_25V6 0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 2 2 2
remove choke co-layout for DFB request

4 4
R93 CAM@
<20> USB20_N11 1 2 USB20_N11_R
0_0402_5%
R92 CAM@
<20> USB20_P11 1 2 USB20_P11_R
0_0402_5%
Custom B
401981
A B C D E F G H
A B C D E
CRT CONNECTOR
1
D3 D4 D5
+3VS
1 DAN217_SC59 DAN217_SC59 DAN217_SC59 1
3
@ @ @
L3
1 2 CRT_R_L
<19> UMA_CRT_R
NBQ100505T-800Y_0402
L4
1 2 CRT_G_L
<19> UMA_CRT_G
NBQ100505T-800Y_0402
L5
1 2 CRT_B_L
<19> UMA_CRT_B
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
2.2P_0402_50V8C
NBQ100505T-800Y_0402
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1
1
1
R138 R139 R140 C238 C239 C240 C241 C242 C243
2 2 2 2 2 2 +5VS
D6 +CRT_VCC_R +CRT_VCC
2
2
2 F1 30mil
1 1 2
3 RB491D_SOT23-3 1
1.1A_6V_MINISMDC110F-2
If=1A C237
@ 0.1U_0402_16V4Z
2 2 2
+CRT_VCC
1 2 2 1 JCRT
C244 0.1U_0402_16V4Z R141 10K_0402_5% 6 6
5
1
11 11
CRT_R_L 1
P
OE#
D_CRT_HSYNC HSYNC 1
<19> UMA_CRT_HSYNC 2 A Y 4 1 2 7 7
L6 10_0402_5% CRT_DDC_DAT 12 12
G
U6 CRT_G_L 2
SN74AHCT1G125GW_SOT353-5 D_CRT_VSYNC VSYNC 2
1 2 8
3
L7 10_0402_5% HSYNC 8
13 13
10P_0402_50V8J
10P_0402_50V8J
CRT_B_L 3
+CRT_VCC 3
1 1 +CRT_VCC 9 9
VSYNC 14 16
C245 C246 14 G
4 4 G 17
5
1
@ @ 10
2 2 CRT_DDC_CLK 10
15
P
OE#
15
<19> UMA_CRT_VSYNC 2 A Y 4 5 5
G
U7 ALLTO_C10532-11505-L_15P-T
SN74AHCT1G125GW_SOT353-5 @
3
3 3
+3VS
+CRT_VCC 將R146 and R147阻值改為2.2k-ohm

1
R146 R147
2.2K_0402_5% 2.2K_0402_5%
2
Q2A
2
<19> UMA_CRT_DATA 1 6 CRT_DDC_DAT

5
Q2B 2N7002DW-T/R7_SOT363-6
<19> UMA_CRT_CLK 4 3 CRT_DDC_CLK

1 1
1 1 2N7002DW-T/R7_SOT363-6
C249 C250
C247 C248 470P_0402_50V8J 470P_0402_50V8J
33P_0402_50V8K 33P_0402_50V8K @ 2 2 @
@ 2 2 @
4 4

B
401981
A B C D E
5 4 3 2 1
0624 --> Remove BIOS ROM Debug Circuit
D D
C C
B B
A A

Size
Document Number Rev
B
401981
5 4 3 2 1
5 4 3 2 1
C287
15P_0402_50V8J
RTC schematic for non-chargeable
CMOS Setting, near DDR Door
JCMOS 2 1
+RTCVCC 1 2PCH_RTCRST# 1 2
10M_0402_5%
R282 20K_0402_1% Y3
1
1 2 3 NC OSC 4
+RTCBATT
R283
C288 1U_0402_6.3V4Z +RTCVCC D10
iME Setting. J2
2 NC OSC 1 U11A 2 +3VL
1
1 2PCH_SRTCRST# 1 2 32.768KHZ_12.5PF_Q13MC14610002 1 3 2 1
2
R284 20K_0402_1% PCH_RTCX1 B13 D33 R277 1K_0402_5%
RTCX1 FWH0 / LAD0 LPC_AD0 <31,32>
1 2 2 1 PCH_RTCX2 D13 B33 C291 CHN202UPT SC-70
RTCX2 FWH1 / LAD1 LPC_AD1 <31,32>
1
C289 1U_0402_6.3V4Z C290 15P_0402_50V8J C32 0.1U_0402_16V4Z
FWH2 / LAD2 LPC_AD2 <31,32> 2
D A32
+
LPC_AD3 <31,32> D
PCH_RTCRST# FWH3 / LAD3
C14 RTCRST#
FWH4 / LFRAME# C34 LPC_FRAME# <31,32>
+RTCVCC PCH_SRTCRST# D17 SRTCRST# @ JRTC
A34
RTC
LPC
SM_INTRUDER# LDRQ0# remove FELICA_PWR# LOTES_AAA-BAT-054-K01
Integrated SUS 1.05V VRM Enable 1
R285
2
1M_0402_5%
A16 INTRUDER# LDRQ1# / GPIO23 F34
High - Enable Internal VRs 1 2 PCH_INTVRMEN A14 AB9 SERIRQ

INTVRMEN SERIRQ SERIRQ <31,32>
PCH_INTVRMEN (must be always pulled high) R275 330K_0402_5%
1 2 +3VS
R286 10K_0402_5%
AZ_BITCLK
-
A30 HDA_BCLK
AK7
2
AZ_SYNC SATA0RXN
D29 AK6
HDA_SYNC HDA_SYNC SATA0RXP
AK11 0812 -> Add R277 for RTC reserve charge
PCH_SPKR SATA0TXN
This signal has a weak internal pull down. <19,29> PCH_SPKR P1 SPKR SATA0TXP AK9
H=>On Die PLL is supplied by 1.5V
AZ_RST#
*L=>On Die PLL is supplied by 1.8V C30 HDA_RST#
SATA1RXN AH6 SATA_PRX_C_DTX_N1 <25>
SATA1RXP AH5 SATA_PRX_C_DTX_P1 <25>
HDA_SDO <29> AZ_SDIN0_HD G30 HDA_SDIN0 SATA1TXN AH9 SATA_PTX_DRX_N1 <25> 1ST HDD
SATA1TXP AH8 SATA_PTX_DRX_P1 <25>
This signal has a weak internal pull down. remove SDN1 for MDC F30 HDA_SDIN1
This signal can't PU SATA2RXN AF11
E32 AF9
IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
F32 HDA_SDIN3 SATA2TXP AF6
Flash Descriptor Security Overide Desktop Only
SATA3RXN AH3
C Low = Enabled @ R118 1K_0402_5% AZ_SDOUT B29 AH1 C
HDA_SDO SATA3RXP
HDA_DOCK_EN# High = Disabled * 1 2 SATA3TXN AF3
SATA3TXP AF1
<31> PWRME_CTRL# H32
SATA
HDA_DOCK_EN# / GPIO33
SATA4RXN AD9 SATA_PRX_C_DTX_N4 <25>
remove CR_CPPE# for JM385 J30 HDA_DOCK_RST# / GPIO13 SATA4RXP AD8 SATA_PRX_C_DTX_P4 <25>
R288 1 SATA4TXN AD6 SATA_PTX_DRX_N4 <25> SATA ODD
<29> AZ_BITCLK_HD 2 33_0402_5% AZ_BITCLK
SATA4TXP AD5 SATA_PTX_DRX_P4 <25>
PCH_JTAG_TCK M3 AD3
R290 1 JTAG_TCK SATA5RXN
<29> AZ_SYNC_HD 2 33_0402_5% AZ_SYNC
SATA5RXP AD1
PCH_JTAG_TMS K3 AB3 remove eSATA SATA
JTAG_TMS SATA5TXN
SATA5TXP AB1
R292 1 2 33_0402_5% AZ_RST# PCH_JTAG_TDI K1 +3VS
<29> AZ_RST_HD# JTAG_TDI
JTAG
PCH_JTAG_TDO J2 AF16
R294 1 JTAG_TDO SATAICOMPO
<29> AZ_SDOUT_HD 2 33_0402_5% AZ_SDOUT
PCH_JTAG_RST# J4 AF15 SATAICOMP 1 2 PCH_GPIO21 R302 2 1 10K_0402_5%
TRST# SATAICOMPI +1.05VS
R295 37.4_0402_1%
PCH_SPI_CLK BA2 SATA_LED# R301 2 1 10K_0402_5%

SPI_CLK
PCH_SPI_CS0# AV3 SPI_CS0#
ITPM Enabled Internal: Pull down 20k AY3 T3 SATA_LED# PCH_GPIO19 R306 1 2 10K_0402_5%
+3VS SPI_CS1# SATALED#
High = Enabled
SPI_MOSI 2 @ 1PCH_SPI_MOSI AY1 Y9 PCH_GPIO21
B Low = Disabled (Default) R273 1K_0402_5% SPI_MOSI SATA0GP / GPIO21 B
SPI
PCH_SPI_MISO AV1 V1 PCH_GPIO19
SPI_MISO SATA1GP / GPIO19
IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@
+3VALW +3VALW +3VALW +3VALW +3VS
4MB
1
@ @ @
R386 R363 @ R643 For EMI 1
200_0402_5% 200_0402_5% R536 20K_0402_5% Place near U13 U13
200_0402_5% C293 8 4
VCC VSS
0.1U_0402_16V4Z
2
PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI PCH_JTAG_RST# PCH_SPI_CLK 2

3 W
1
@ @ @ 7
@ R364 R385 HOLD
R355 R535
100_0402_5% 100_0402_5% R537 10K_0402_5% @ 10_0402_5% PCH_SPI_CS0# 1
100_0402_5% S
PCH_SPI_CLK 6
2
C
1
@ C16 PCH_SPI_MOSI 5 2 PCH_SPI_MISO
10P_0402_50V8J D Q
MX25L3205DM2I-12G SO8
2
1 2 PCH_JTAG_TCK SA00003K800 (WINBOND)
R156 51_0402_5%
A 06/01 change R125 from 4.7K to 51 ohm A
PCH JTAG Enable PCH JTAG Disable (Default)

PCH Pin RefDes ES1 ES2 ES1 ES2
PCH_JTAG_TDO R358 No Install 200ohm No Install No Install
R535 No Install 100ohm No Install No Install
PCH_JTAG_TMS R355 200ohm 200ohm No Install No Install Security Classification Compal Secret Data Compal Electronics, Inc.
R354 100ohm 100ohm No Install No Install 2010/06/21 2011/06/21 Title
PCH_JTAG_TDI R536 200ohm 200ohm 20Kohm No Install Issued Date Deciphered Date
R537 100ohm 100ohm 10Kohm No Install
PCH_JTAG_TCK R156 51ohm 51ohm 51ohm 51ohm Size Document Number Rev
PCH_JTAG_RST# R643 20Kohm 20Kohm No Install No Install B B
R353 10Kohm 10Kohm No Install No Install
401981
5 4 3 2 1
5 4 3 2 1
+3VS
+3VALW 2 R229 1 2.2K_0402_5%
2 R230 1 2.2K_0402_5% R231 4.7K_0402_5%
5
Q3B R232 4.7K_0402_5%
PCH_SMBDATA 3 4 PM_SMBDATA <11,12,13,27>
2
Q3A 2N7002DW-T/R7_SOT363-6
PCH_SMBCLK 6 1 PM_SMBCLK <11,12,13,27>

2N7002DW-T/R7_SOT363-6
D U11B D
PCIE_PRX_C_LANTX_N1 BG30 B9 EC_LID_OUT# EC_LID_OUT# <31>

<28> PCIE_PRX_C_LANTX_N1 PERN1 SMBALERT# / GPIO11
For LAN PCIE_PRX_C_LANTX_P1 BJ30
<28> PCIE_PRX_C_LANTX_P1 PERP1
<28> PCIE_PTX_C_LANRX_N1 C371 2 1 0.1U_0402_16V7K PCIE_PTX_LANRX_N1 BF29 H14 PCH_SMBCLK
C340 2 PETN1 SMBCLK
<28> PCIE_PTX_C_LANRX_P1 1 0.1U_0402_16V7K PCIE_PTX_LANRX_P1 BH29 PETP1
C8 PCH_SMBDATA
SMBDATA
<27> PCIE_PRX_WLANTX_N2 AW30 PERN2
<27> PCIE_PRX_WLANTX_P2 BA30 PERP2 +3VS
For WLAN <27> PCIE_PTX_C_WLANRX_N2 C274 2 1 0.1U_0402_16V7K PCIE_PTX_WLANRX_N2 BC30 J14 PCH_GPIO60 +3VALW 2 R233 1 2.2K_0402_5%
C275 2 PETN2 SML0ALERT# / GPIO60
<27> PCIE_PTX_C_WLANRX_P2 1 0.1U_0402_16V7K PCIE_PTX_WLANRX_P2 BD30
PETP2 2 R234 1 2.2K_0402_5%
5
C6 PCH_SMLCLK0 Q4B
SML0CLK
AU30
SMBus
PERN3 PCH_SMLDATA0 PCH_SMLDATA1
AT30 PERP3 SML0DATA G8 3 4 EC_SMB_DA2 <31>
remove NewCard PCIE AU32 PETN3
2
AV32 Q4A 2N7002DW-T/R7_SOT363-6
PETP3 PCH_GPIO74
SML1ALERT# / GPIO74 M14
BA32 PCH_SMLCLK1 6 1
PERN4 EC_SMB_CK2 <31>
BB32 E10 PCH_SMLCLK1
PERP4 SML1CLK / GPIO58 2N7002DW-T/R7_SOT363-6
remove JET PCIE BD32 PETN4
BE32 G12 PCH_SMLDATA1
PETP4 SML1DATA / GPIO75
PCI-E*
BF33 PERN5
BH33 PERP5 CL_CLK1 T13
Controller
remove CardReader PCIE BG32 PETN5
BJ32 PETP5 CL_DATA1 T11
+3VALW
Link
BA34 PERN6 CL_RST1# T9
C AW34 C
PERP6 PCH_SMLCLK0 2.2K_0402_5% R237
BC34 PETN6 2 1
BD34 PCH_SMLDATA0 2.2K_0402_5% 2 1 R238
PETP6 CLKREQ_PEG# PCH_GPIO60 10K_0402_5% R239
PEG_A_CLKRQ# / GPIO47 H1 1 2 +3VALW 2 1
AT34 R260 10K_0402_5% PCH_GPIO74 10K_0402_5% 2 1 R240
PERN7 EC_LID_OUT# 10K_0402_5% R241
AU34 PERP7 2 1
AU36 PETN7 CLKOUT_PEG_A_N AD43
AV36 PETP7 CLKOUT_PEG_A_P AD45
NC BG34 AN4 CLK_PEG# <5>
PERN8 CLKOUT_DMI_N
PEG
BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_PEG <5>
BG36 PETN8
BJ36 PETP8
CLKOUT_DP_N / CLKOUT_BCLK1_N AT1
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3
<28> CLK_LAN# AK48 CLKOUT_PCIE0N
LAN <28> CLK_LAN AK47 CLKOUT_PCIE0P
From CLK BUFFER

CLKIN_DMI_N AW24 PCH_CLK_DMI# <13>
CLKREQ_LAN# P9 BA24 PCH_CLK_DMI <13>
<28> CLKREQ_LAN# PCIECLKRQ0# / GPIO73 CLKIN_DMI_P
<27> CLK_WLAN# AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_BCLK# <13>

WLAN <27> CLK_WLAN AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_BCLK <13> FROM CLK GEN FOR: 133/100/96/14.318 MHZ
CLKREQ_WLAN# U4
<27> CLKREQ_WLAN# PCIECLKRQ1# / GPIO18
CLKIN_DOT_96N F18 CLK_DOT# <13>
CLKIN_DOT_96P E18 CLK_DOT <13>
remove NEWCARD CLK AM47 CLKOUT_PCIE2N
AM48 CLKOUT_PCIE2P
B B
CLKIN_SATA_N / CKSSCD_N AH13 CLK_SATA# <13>
PCH_GPIO20 N4 AH12 CLK_SATA <13> R247 1M_0402_5%
+3VS PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P
2 1
1 2 PCH_GPIO20 form CLKREQ_NEW# to PCH_GPIO20 remove JET CLK AH42 P41 CLK_14M_PCH <13> Y2
10K_0402_5% R244 CLKOUT_PCIE3N REFCLK14IN PCH_X1 PCH_X2
AH41 CLKOUT_PCIE3P 1 2
1 2 CLKREQ_WLAN# PCH_GPIO25 A8 J42 1 25MHZ_20PF_7A25000012 1

PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCILOOP <20>
10K_0402_5% R248 C277 C278
AM51 AH51 PCH_X1 27P_0402_50V8J 27P_0402_50V8J

CLKOUT_PCIE4N XTAL25_IN PCH_X2 2 2
AM53 CLKOUT_PCIE4P XTAL25_OUT AH53
PCH_GPIO26 M9 AF38 XCLK_RCOMP 1 2 +1.05VS
PCIECLKRQ4# / GPIO26 XCLK_RCOMP R252 90.9_0402_1%
+3VALW
1 2 CLKREQ_LAN#
AJ50
AJ52
CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64 T45
C277 @
Note: Stuff 0 ohm if
CLKOUT_PCIE5P
10K_0402_5% R246 0_0402_5% 25MHz crystal un-stuff
PCH_GPIO44 H6 P43
Clock Flex
PCH_GPIO25 PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65

1 2 form CLKREQ_JET# to PCH_GPIO25
10K_0402_5% R245
AK53 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 T42 for EMI request
1 2 PCH_GPIO26 form CLKREQ_CR# to PCH_GPIO26 AK51
10K_0402_5% R249 CLKOUT_PEG_B_P @
PCH_GPIO56 P13 N50 CLK_PCILOOP 1 @ 2 1 2
PCH_GPIO44 PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 R125 10_0402_5%
1 2
10K_0402_5% R250 C265 22P_0402_50V8J
IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@ @
A A
1 2 PCH_GPIO56 CLK_14M_PCH 1 @ 2 2 1
10K_0402_5% R251 R70 100_0402_5%
C206 100P_0402_50V8J

B B
401981
5 4 3 2 1
5 4 3 2 1
D D
U11C
FDI_RXN0 BA18 FDI_CTX_PRX_N0 <6>
<6> DMI_CTX_PRX_N0 BC24 DMI0RXN FDI_RXN1 BH17 FDI_CTX_PRX_N1 <6>
<6> DMI_CTX_PRX_N1 BJ22 DMI1RXN FDI_RXN2 BD16 FDI_CTX_PRX_N2 <6>
<6> DMI_CTX_PRX_N2 AW20 DMI2RXN FDI_RXN3 BJ16 FDI_CTX_PRX_N3 <6>
<6> DMI_CTX_PRX_N3 BJ20 DMI3RXN FDI_RXN4 BA16 FDI_CTX_PRX_N4 <6>
FDI_RXN5 BE14 FDI_CTX_PRX_N5 <6>
<6> DMI_CTX_PRX_P0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_CTX_PRX_N6 <6>
<6> DMI_CTX_PRX_P1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_CTX_PRX_N7 <6>
<6> DMI_CTX_PRX_P2 BA20 DMI2RXP
<6> DMI_CTX_PRX_P3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_CTX_PRX_P0 <6>
FDI_RXP1 BF17 FDI_CTX_PRX_P1 <6>
<6> DMI_PTX_CRX_N0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_CTX_PRX_P2 <6>
<6> DMI_PTX_CRX_N1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_CTX_PRX_P3 <6>
+3VALW BD20 AW16
<6> DMI_PTX_CRX_N2 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P4 <6>
<6> DMI_PTX_CRX_N3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_CTX_PRX_P5 <6>
FDI_RXP6 BB14 FDI_CTX_PRX_P6 <6>
1 2 PCH_SUSPWRDN BD22 BD12
<6> DMI_PTX_CRX_P0 DMI0TXP FDI_RXP7 FDI_CTX_PRX_P7 <6>
R316 10K_0402_5% BH21
<6> DMI_PTX_CRX_P1 DMI1TXP
1 2 PCH_LOW_BAT# BC20
<6> DMI_PTX_CRX_P2 DMI2TXP
R318 10K_0402_5% BD18 BJ14
<6> DMI_PTX_CRX_P3 DMI3TXP FDI_INT FDI_INT <6>
1 2 IBEX_RI#
DMI
FDI
R320 10K_0402_5% BF13
FDI_FSYNC0 FDI_FSYNC0 <6>
+1.05VS 1 2 DMI_COMP BH25
R311 49.9_0402_1% DMI_ZCOMP
FDI_FSYNC1 BH13 FDI_FSYNC1 <6>
2 1 PM_PWROK BF25
R329 10K_0402_5% DMI_IRCOMP
Close to PCH FDI_LSYNC0 BJ12 FDI_LSYNC0 <6>
C 2 1 PWROK C
R322 10K_0402_5% BG14
FDI_LSYNC1 FDI_LSYNC1 <6>
2 1 LAN_RST#
R323 10K_0402_5%
2 @ 1
0_0402_5% R256
+3VS XDP_DBRESET# T6 J12 PCH_WAKE# PCH_WAKE# 2 1

<5> XDP_DBRESET# SYS_RESET# WAKE# PCH_WAKE# <28> +3VALW
0.1U_0402_16V4Z R313 10K_0402_5%
1 2
C272 VGATE M6 Y1 PM_CLKRUN# 2 1 +3VS
<31,42> VGATE SYS_PWROK CLKRUN# / GPIO32
5
U12 R319 8.2K_0402_5%

1 IN1
P
<31> PM_PWROK
System Power Management

4 PWROK B17
VGATE O PWROK
2 IN2
G
SN74AHC1G08DCKR_SC70-5 1 2 K5 P8 SUS_STAT# PADT38

PADT38
3
R321 0_0402_5% MEPWROK SUS_STAT# / GPIO61
LAN_RST# A10 F3 EC_CLK For EC Crystal cost down

LAN_RST# SUSCLK / GPIO62 EC_CLK <31>
<5> DRAMPWROK D9 DRAMPWROK SLP_S5# / GPIO63 E4 PM_SLP_S5# <31>
PCH_RSMRST# C16 H7
RSMRST# SLP_S4# PM_SLP_S4# <31>
B B
PCH_SUSPWRDN M1 P12
<31> PCH_SUSPWRDN SUS_PWR_DN_ACK / GPIO30 SLP_S3# PM_SLP_S3# <31>
<31> PBTN_OUT# P5 PWRBTN# SLP_M# K8
+3VALW 1 2 PCH_ACIN P7 N2
R324 330K_0402_5% ACPRESENT / GPIO31 TP23
D26 R330 @
1 2 1 2 PCH_LOW_BAT# A6 BJ10
<31,37> ACIN ACIN_D <31> BATLOW# / GPIO72 PMSYNCH PMSYNCH <5>
CH751H-40PT_SOD323-2 0_0402_5%
IBEX_RI# F14 F6
RI# SLP_LAN# / GPIO29

+3VALW
1 2
@ R690 1K_0402_5% D29
0_0402_5% 1 2 R325 PWROK 2 1 PCH_RSMRST#
0716 --> Unmount : R327, Q26,
Q26 1 PCH_RSMRST# CH751H-40PT_SOD323-2
C
<31> EC_RSMRST# 3
@ D15A, D15B, R328, R690
E
2 1
MMBT3906_SOT23-3 R326 D28 Mount : R325, D29, D28
10K_0402_5%
B
1 2
2
<36,38> POK
+3VALW 2 1
R327 CH751H-40PT_SOD323-2
A A
1
@ 4.7K_0402_5%
@ D15A D15B @ for abnormal shutdowm from s3 resume
BAV99DW-7_SOT363 BAV99DW-7_SOT363

6
1 2
RSMRST# circuit @ R328
2.2K_0402_5%
B B
401981
5 4 3 2 1
5 4 3 2 1
U11D
EC_ENBKL T48 BJ46
<31> EC_ENBKL L_BKLTEN SDVO_TVCLKINN
1 2 EC_ENBKL T47 BG46
<13> UMA_ENVDD L_VDD_EN SDVO_TVCLKINP
R124 100K_0402_5%
<13> PCH_PWM Y48 L_BKLTCTL SDVO_STALLN BJ48
SDVO_STALLP BG48
<13> LCD_EDID_CLK AB48 L_DDC_CLK
<13> LCD_EDID_DATA Y45 L_DDC_DATA SDVO_INTN BF45
SDVO_INTP BH45
1 2 LCTL_CLK AB46
+3VS L_CTRL_CLK
+3VS 1 R1433 2 10K_0402_5% LCTL_DATA V48 L_CTRL_DATA
R54 10K_0402_5%
1 2 LVDS_IBG AP39 T51
LCD_EDID_CLK R55 2.37K_0402_1% LVD_IBG SDVO_CTRLCLK
D 2 1 AP41 LVD_VBG SDVO_CTRLDATA T53 D
R59 2.2K_0402_5% T15 PAD
AT43 LVD_VREFH
2 1 LCD_EDID_DATA AT42 BG44
R60 2.2K_0402_5% LVD_VREFL DDPB_AUXN R68 100K_0402_5%
DDPB_AUXP BJ44
DDPB_HPD AU38 1 2
LVDS
<13> LCD_TXCLK- AV53 LVDSA_CLK#
<13> LCD_TXCLK+ AV51 LVDSA_CLK DDPB_0N BD42
DDPB_0P BC42
<13> LCD_TXOUT0- BB47 LVDSA_DATA#0 DDPB_1N BJ42
Digital Display Interface

<13> LCD_TXOUT1- BA52 LVDSA_DATA#1 DDPB_1P BG42
<13> LCD_TXOUT2- AY48 LVDSA_DATA#2 DDPB_2N BB40
AV47 LVDSA_DATA#3 DDPB_2P BA40
DDPB_3N AW38
<13> LCD_TXOUT0+ BB48 LVDSA_DATA0 DDPB_3P BA38
<13> LCD_TXOUT1+ BA50 LVDSA_DATA1
<13> LCD_TXOUT2+ AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49
AP48 LVDSB_CLK# For INTEL issue (pending interrupts from the PCH for unused HDMI ports)
AP47 LVDSB_CLK DDPC_AUXN BE44
BD44 R343 100K_0402_5%
DDPC_AUXP
AY53 LVDSB_DATA#0 DDPC_HPD AV40 1 2
AT49 LVDSB_DATA#1
+3VS AU52 BE40
LVDSB_DATA#2 DDPC_0N
AT53 LVDSB_DATA#3 DDPC_0P BD40
DDPC_1N BF41
2 1 UMA_CRT_CLK AY51 BH41
C R63 2.2K_0402_5% LVDSB_DATA0 DDPC_1P C
AT48 LVDSB_DATA1 DDPC_2N BD38
AU50 LVDSB_DATA2 DDPC_2P BC38
2 1 UMA_CRT_DATA AT51 BB36
R61 2.2K_0402_5% LVDSB_DATA3 DDPC_3N
DDPC_3P BA36
<14> UMA_CRT_B AA52 CRT_BLUE DDPD_CTRLCLK U50

1 2 UMA_CRT_B AB53 U52
<14> UMA_CRT_G CRT_GREEN DDPD_CTRLDATA
R56 150_0402_1% AD53
<14> UMA_CRT_R CRT_RED
1 2 UMA_CRT_G
R57 150_0402_1% BC46
UMA_CRT_R DDPD_AUXN R77 100K_0402_5%
1 2 <14> UMA_CRT_CLK V51 CRT_DDC_CLK DDPD_AUXP BD46
R58 150_0402_1% <14> UMA_CRT_DATA V53 AT38 1 2
CRT_DDC_DATA DDPD_HPD
DDPD_0N BJ40
<14> UMA_CRT_HSYNC Y53 CRT_HSYNC DDPD_0P BG40
<14> UMA_CRT_VSYNC Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38
CRT
DDPD_2N BF37
2 R266 1CRT_IREF AD48 DAC_IREF DDPD_2P BH37
AB51 CRT_IRTN DDPD_3N BE36
1K_0402_1% BD36
DDPD_3P
PCH Strap Pin

B B
Internal: Pull down 20k Internal: Pull down 20k

+3VS
During Reset: HZ NO REBOOT Strap During Reset: Low
Initial: Low +1.8VS_PCH_NAND Initial: Low Danbury Technology Enabled
PCH_SPKR Low= Disable
1 @ 2 PCH_SPKR High = Enabled
R269 1K_0402_5%
PCH_SPKR <16,29> High= Enable
NV_ALE Low = Disabled (Default)
Internal: Pull up 20k 2 @ 1 NV_ALE NV_ALE <20>
R267 1K_0402_5%
During Reset: High
Boot BIOS Strap
Initial: High 2 @ 1 NV_CLE NV_CLE <20>
PCI_GNT#1 PCI_GNT#0 Boot BIOS Loaction R268 1K_0402_5% DMI Termination Voltage
1K_0402_5% 2 @ 1 R270 PCI_GNT#0
PCI_GNT#0 <20>
0 0 LPC Low= Set to Vss (Default)
1K_0402_5% 2 @ 1 R271 PCI_GNT#1 Internal: Pull down 20k NV_CLE
PCI_GNT#1 <20> High= Set to Vcc
Internal: Pull up 20k
0 1 Reserved (NAND) During Reset: Low
Initial: Low
During Reset: High 1 0 PCI
Initial: High
1 1 SPI (Default)
2 @ 1 PCI_GNT#3
PCI_GNT#3 <20>
R272 1K_0402_5%
Internal: Pull up 20k A16 Swap Override Strap
During Reset: High
Initial: High Low= A16 swap override Enable
PCI_GNT#3 High= A16 swap override Disable
A A

Custom B
401981
5 4 3 2 1
5 4 3 2 1
1 2
R253 0_0402_5%
U11E
H40 AY9 +3VS C477
AD0 NV_CE#0 0.1U_0402_16V4Z
N34 AD1 NV_CE#1 BD1
D C44 AD2 NV_CE#2 AP15 1 2 D
A38 AD3 NV_CE#3 BD8
5
C36 U8 @
AD4 PLT_RST#
J34 AV9 1
P
AD5 NV_DQS0 IN1
2
A40 AD6 NV_DQS1 BG8 <5> BUF_PLT_RST# 4 O
D45 2 R51
AD7 IN2
G
E36 AP7 100K_0402_5%
AD8 NV_DQ0 / NV_IO0
1
H48 AP6
3
AD9 NV_DQ1 / NV_IO1 SN74AHC1G08DCKR_SC70-5
E40 AT6
1
AD10 NV_DQ2 / NV_IO2 R129
C40 AD11 NV_DQ3 / NV_IO3 AT9
M48 BB1 100K_0402_5%
AD12 NV_DQ4 / NV_IO4 @
M45 AV6
2
AD13 NV_DQ5 / NV_IO5
F53 AD14 NV_DQ6 / NV_IO6 BB3
M40 AD15 NV_DQ7 / NV_IO7 BA4
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
J36 AD17 NV_DQ9 / NV_IO9 BB6
K48 AD18 NV_DQ10 / NV_IO10 BD6
F40 AD19 NV_DQ11 / NV_IO11 BB7
+3VS C42 BC8
RP1 AD20 NV_DQ12 / NV_IO12
K46 AD21 NV_DQ13 / NV_IO13 BJ8
1 8 PCI_REQ#1 M51 BJ6
PCI_REQ#2 AD22 NV_DQ14 / NV_IO14
2 7 add PCI_REQ#2 for non-ODD_EN# J52 AD23 NV_DQ15 / NV_IO15 BG6
3 6 PCI_PIRQD# K51
PCI_IRDY# AD24
4 5 L34 AD25 NV_ALE BD3 NV_ALE <19>
F42 AD26 NV_CLE AY6 NV_CLE <19>
8.2K_0804_8P4R_5% J40 AD27
G46 AD28
RP2 F44 AU2 NV_RCOMP 1 @ 2
PCI_PIRQH# AD29 NV_RCOMP R276 32.4_0402_1%
1 8 M47 AD30
PCI
C 2 7 PCI_TRDY# H36 AV7 C
PCI_FRAME# AD31 NV_RB#
3 6
4 5 PCI_PIRQA# J50 AY8
C/BE0# NV_WR#0_RE#
G42 C/BE1# NV_WR#1_RE# AY5
8.2K_0804_8P4R_5% H47 C/BE2#
G34 C/BE3# NV_WE#_CK0 AV11
RP3 BF5
PCI_STOP# PCI_PIRQA# NV_WE#_CK1
1 8 G38 PIRQA#
2 7 PCI_PIRQE# PCI_PIRQB# H51
PCI_PIRQC# PCI_PIRQC# PIRQB#
3 6 B37 PIRQC# USBP0N H18 USB20_N0 <25>
4 5 PCI_PIRQG# PCI_PIRQD# A44 J18 USB-LIGHT1
PIRQD# USBP0P USB20_P0 <25>
USBP1N A18 USB20_N1 <25>
8.2K_0804_8P4R_5% PCI_REQ#0 F51 C18 USB-LIGHT2
REQ0# USBP1P USB20_P1 <25>
PCI_REQ#1 A46 N20
PCI_REQ#2 REQ1# / GPIO50 USBP2N
B45 REQ2# / GPIO52 USBP2P P20 USB-Left1
PCI_REQ#3 M53 J20
REQ3# / GPIO54 USBP3N
USBP3P L20 remove eSATA
<19> PCI_GNT#0 F48 GNT0# USBP4N F20
<19> PCI_GNT#1 K45 GNT1# / GPIO51 USBP4P G20 remove NewCard
GNT2#: Not pull low, internal pull up 20K F36 GNT2# / GPIO53 USBP5N A20
<19> PCI_GNT#3 H53 GNT3# / GPIO55 USBP5P C20 remove BT
USBP6N M22
PCI_PIRQE# B41 N22
PCI_PIRQF# PIRQE# / GPIO2 USBP6P
K53 PIRQF# / GPIO3 USBP7N B21 HM55 USB port6/7 NC
PCI_PIRQG# A36 D21
PCI_PIRQH# PIRQG# / GPIO4 USBP7P
A48 PIRQH# / GPIO5 USBP8N H22
+3VS J22 remove FingerPr
USBP8P
USB
RP4 T37 PAD TP_PCI_RST# K6 E22
PCI_REQ#3 PCIRST# USBP9N
1 8 USBP9P F22 remove FELICA
B PCI_PIRQF# PCI_SERR# B
2 7 E44 SERR# USBP10N A22 USB20_N10 <26>
3 6 PCI_PIRQB# PCI_PERR# E50 C22 Card reader(2 in 1)
PERR# USBP10P USB20_P10 <26>
4 5 PCI_REQ#0 G24
USBP11N USB20_N11 <13>
8.2K_0804_8P4R_5% PCI_IRDY# USBP11P H24 USB20_P11 <13> Int. Camera
A42 IRDY# USBP12N L24
H44 PAR USBP12P M24 remove 3G/TV#1
PCI_DEVSEL# F46 A24
+3VS DEVSEL# USBP13N USB20_N13 <27>
PCI_FRAME# C46 C24 WiMax(WLAN)
FRAME# USBP13P USB20_P13 <27>
RP5
1 8 PCI_DEVSEL# PCI_PLOCK# D49
PCI_PERR# PLOCK#
2 7 USBRBIAS# B25
3 6 PCI_SERR# PCI_STOP# D41 +3VALW
PCI_PLOCK# PCI_TRDY# STOP# USBBIAS
4 5 C48 TRDY# USBRBIAS D25 2
R278
1
22.6_0402_1%
Within 500 mils RP6
8.2K_0804_8P4R_5% M7 USB_OC#6 4 5
PME# USB_OC#0 USB_OC#4
OC0# / GPIO59 N16 USB_OC#0 <25,31> (USB-Right) 3 6
D5 J16 USB_OC#1 USB_OC#0 2 7
<27,28,31,32> PLT_RST# PLTRST# OC1# / GPIO40
F16 USB_OC#2 USB_OC#5 1 8
OC2# / GPIO41 USB_OC#3
N52 CLKOUT_PCI0 OC3# / GPIO42 L16
P53 E14 USB_OC#4 10K_0804_8P4R_5%
CLKOUT_PCI1 OC4# / GPIO43
2 1 CLK_SIO P46 CLKOUT_PCI2 OC5# / GPIO9 G16 USB_OC#5
<32> CLK_PCI_DDR 22_0402_5% R280
2 1 CLK_EC P51 CLKOUT_PCI3 OC6# / GPIO10 F12 USB_OC#6
RP8
<31> CLK_PCI_EC 22_0402_5% R281
<17> CLK_PCILOOP 2 1 CLK_PCH P48 CLKOUT_PCI4 OC7# / GPIO14 T15 EXP_CPPE#
22_0402_5% R279 USB_OC#2 4 5
USB_OC#1 3 6
IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@ USB_OC#3 2 7
EXP_CPPE# 1 8
10K_0804_8P4R_5%
A A

B B
401981
5 4 3 2 1
5 4 3 2 1
pull down 100k to GND

U11F
GPIO8 R189 100K_0402_5%
Not pull down 1 2 PCH_HDMI_HPD Y3 AH45
BMBUSY# / GPIO0 CLKOUT_PCIE6N
CLKOUT_PCIE6P AH46
D Internal: Pull up 20k PCH_GPIO1 C38 D
TACH1 / GPIO1
During Reset: High PCH_GPIO6 D37 TACH2 / GPIO6
Initial: High AF48
CLKOUT_PCIE7N
MISC
<31> EC_SCI# EC_SCI# J32 AF47
TACH3 / GPIO7 CLKOUT_PCIE7P
GPIO15 <31> EC_SMI# EC_SMI# F10 GPIO8
a Strong pull up may be needed
PCH_GPIO12 K9 U2 GATEA20
for GPIO Functionality LAN_PHY_PWR_CTRL / GPIO12 A20GATE GATEA20 <31>
Internal: Pull down 20k PCH_GPIO15 T7 GPIO15
During Reset: Low PCH_GPIO16 AA2 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3 CLK_CPU_BCLK# <5>
Initial: Low
PCH_GPIO17 F38 AM1
TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK <5>
On-Die PLL VR BT_DET# Y7 BG10

SCLOCK / GPIO22 PECI PECI <5>
GPIO
High = Enabled (Default) H10 T1 KB_RST#
GPIO24 RCIN# KB_RST# <31>
PCH_GPIO27 Low = Disabled 2 @ 1 PCH_GPIO27 AB12 BE10
GPIO27 PROCPWRGD H_PWRGOOD <5>
CPU
R274 1K_0402_5%
PCH_GPIO28 V13 BD10 THRMTRIP_PCH# 1 2
GPIO28 THRMTRIP# H_THERMTRIP# <5>
PROJECT_ID R212 56_0402_1%
<27> BT_PWR# M11 STP_PCI# / GPIO34
Name ID0 ID1
remove BT_RST# V6 SATACLKREQ# / GPIO35
NBQAA 11.6/13.3" L L 1 2 +VTT
PROJECT_ID0 AB7 BA22 R210 56_0402_1%
SATA2GP / GPIO36 TP1
C NBQAA 14" L H C
PROJECT_ID1 AB13 AW22
SATA3GP / GPIO37 TP2
*NWQAA 16" H L
PCH_GPIO38 V3 BB22
SLOAD / GPIO38 TP3
NALAA 17.3" H H
PCH_GPIO39 P3 AY45
SDATAOUT0 / GPIO39 TP4
LVDS_SEL H3 AY46
PCIECLKRQ6# / GPIO45 TP5
RST_GATE F1 AV43
+3VS <5> RST_GATE PCIECLKRQ7# / GPIO46 TP6
PCH_GPIO48 AB6 AV45
SDATAOUT1 / GPIO48 TP7
1 2 PCH_GPIO1 <31> THM_ALT#
THM_ALT# AA4 SATA5GP / GPIO49 TP8 AF13
10K_0402_5% R214
1 2 PCH_GPIO6 PCH_GPIO57 F8 GPIO57 TP9 M18
10K_0402_5% R218
1 2 EC_SCI# N18
10K_0402_5% R224 TP10
1 2 PCH_GPIO16 A4 VSS_NCTF_1 TP11 AJ24
10K_0402_5% R221 A49
NCTF
VSS_NCTF_2
RSVD
1 2 PCH_GPIO17 change Netname from A5 VSS_NCTF_3 TP12 AK41
10K_0402_5% R220 RF_OFF# to PCH_GPIO17
A50 VSS_NCTF_4
1 2 BT_DET# A52 AK42
8.2K_0402_5% R215 VSS_NCTF_5 TP13
A53 VSS_NCTF_6
1 2 PCH_GPIO38 B2 VSS_NCTF_7 TP14 M32
10K_0402_5% R217 B4 VSS_NCTF_8
1 2 PCH_GPIO39 change R254 to 10k and B52 VSS_NCTF_9 TP15 N32
10K_0402_5% R254 Netname from CIR_EN# to PCH_GPIO39
B53 VSS_NCTF_10
B B
1 2 PROJECT_ID0 BE1 VSS_NCTF_11 TP16 M30
10K_0402_5% R255 BE53 VSS_NCTF_12
1 2 PROJECT_ID1 BF1 VSS_NCTF_13 TP17 N30
10K_0402_5% R216 BF53 VSS_NCTF_14
1 2 PCH_GPIO48 change Netname from BH1 VSS_NCTF_15 TP18 H12
10K_0402_5% R257 ISDBT_DET to PCH_GPIO39
BH2 VSS_NCTF_16
1 2 THM_ALT# BH52 VSS_NCTF_17 TP19 AA23
10K_0402_5% R259 BH53 VSS_NCTF_18
BJ1 VSS_NCTF_19 NC_1 AB45
BJ2 VSS_NCTF_20
1 2 BT_PWR# add R261 10k BJ4 AB38
10K_0402_5% R261 for BT fun VSS_NCTF_21 NC_2
BJ49 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50 VSS_NCTF_24
+3VALW BJ52 AB41
VSS_NCTF_25 NC_4
BJ53 VSS_NCTF_26
D1 VSS_NCTF_27 NC_5 T39
1 2 EC_SMI# D2 Not pull low
R225 10K_0402_5% VSS_NCTF_28
D53 VSS_NCTF_29
1 2 PCH_GPIO57 E1 P6 internal pull up
R226 10K_0402_5% VSS_NCTF_30 INIT3_3V#
E53 VSS_NCTF_31
1 2 PCH_GPIO15 TP24 C10 Internal: Pull up 20k
R227 1K_0402_5%
During Reset: High
1 2 PCH_GPIO28 IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@
R242 10K_0402_5% LVDS_SEL=H Initial: High
1 2 LVDS_SEL
R222 10K_0402_5% for Single Channel LVDS
1 2 RST_GATE
R223 10K_0402_5%
A A
1 2 PCH_GPIO12
10K_0402_5% R219
1 @ 2 PROJECT_ID0
R416 10K_0402_5% 2010/06/21 2011/06/21 Title
@
Issued Date Deciphered Date
1 2 PROJECT_ID1
R415 10K_0402_5%
B B
401981
5 4 3 2 1
5 4 3 2 1
Add R52 for CRT wave issue at pre-MP

+1.05VS +3VS
U11G POWER +3VS_VCCADAC
R52 L12
AB24 VCCCORE[1] VCCADAC[1] AE50 1 2 2 1
1 1 AB26 69mA 2 1 0_0603_5% 2.2_0603_1%
C295 C294 VCCCORE[2]
AB28 VCCCORE[3] VCCADAC[2] AE52
10U_0805_10V4Z 1U_0402_6.3V4Z AD26 C296 C297 C298 Change L12 to 2.2 ohm
VCCCORE[4]
CRT
D AD28 AF53 0.01U_0402_25V7K 0.1U_0402_16V4Z 10U_0805_10V4Z D
2 2
AF26
VCCCORE[5] VSSA_DAC[1] 1 2 for CRT issue at pre-MP
VCCCORE[6]
VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51
AF30 VCCCORE[8] close to AE50
AF31 VCCCORE[9]
AH26 VCCCORE[10]
AH28 VCCCORE[11]
AH30 VCCCORE[12]
AH31 VCCCORE[13] > 1mA VCCALVDS AH38 +3VS
AJ30 VCCCORE[14]
AJ31 VCCCORE[15] VSSA_LVDS AH39
+1.05VS 1432mA
VCCTX_LVDS[1] AP43 +1.8VS
59mA VCCTX_LVDS[2] AP45
AT46
LVDS
VCCTX_LVDS[3] C300 C299
AK24 VCCIO[24] VCCTX_LVDS[4] AT45
0.01U_0402_25V7K 0.01U_0402_25V7K
+3VS
BJ24 VCCAPLLEXP 40mA
VCC3_3[2] AB34
AN20 VCCIO[25] 375mA VCC3_3[3] AB35

AN22 2
HVCMOS
VCCIO[26] 0.1U_0402_16V4Z
AN23 VCCIO[27] VCC3_3[4] AD35
AN24 C303
VCCIO[28]
AN26 VCCIO[29] 1
AN28 VCCIO[30] close to AB34
BJ26 VCCIO[31]
C BJ28 C
VCCIO[32]
AT26 VCCIO[33]
AT28 VCCIO[34]
+1.05VS AU26 VCCIO[35] +PCH_VRM
AU28 VCCIO[36]
1 2 AV26 VCCIO[37]
C304 10U_0805_10V4Z AV28 196mA VCCVRM[2] AT24
VCCIO[38]
1 2 AW26 VCCIO[39]
C305 1U_0402_6.3V4Z AW28 3062mA
VCCIO[40] +VTT
DMI
1 2 BA26 VCCIO[41] VCCDMI[1] AT16
C306 1U_0402_6.3V4Z +PCH_VRM +1.8VS
BA28 VCCIO[42] 61mA +PCH_VCCDMI
1 2 BB26 VCCIO[43] VCCDMI[2] AU16 1 2
C307 1U_0402_6.3V4Z BB28 1 R335 0_0603_5%
VCCIO[44] C309
1 2 BC26 VCCIO[45] 2 1
PCI E*
C308 1U_0402_6.3V4Z BC28 1U_0402_6.3V4Z R336 0_0402_5%
VCCIO[46]
BD26 VCCIO[47] 2
BD28 VCCIO[48] close to AT16
BE26 VCCIO[49] VCCPNAND[1] AM16
BE28 VCCIO[50] VCCPNAND[2] AK16
BG26 VCCIO[51] VCCPNAND[3] AK20
BG28 AK19 +1.8VS_PCH_NAND +1.8VS
VCCIO[52] VCCPNAND[4]
BH27 VCCIO[53] VCCPNAND[5] AK15
156mA VCCPNAND[6] AK13 1
R338
2
0_0603_5%
AN30 VCCIO[54] VCCPNAND[7] AM12 2
NAND / SPI
AN31 VCCIO[55] VCCPNAND[8] AM13
+3VS AM15 C311
VCCPNAND[9] 0.1U_0402_16V4Z
1
2 1 AN35 VCC3_3[1] 375mA close to Ak13
C310 0.1U_0402_16V4Z
B B
+PCH_VRM AT22 VCCVRM[1] +3VS

BJ18 VCCFDIPLL 37mA VCCME3_3[1] AM8
VCCME3_3[2] AM9
FDI
+1.05VS AM23 VCCIO[1] 85mA VCCME3_3[3] AP11 2

VCCME3_3[4] AP9
C313 0.1U_0402_16V4Z
1
close to AM8
A A

B B
401981
5 4 3 2 1
5 4 3 2 1
U11J POWER +1.05VS
AP51 VCCACLK[1] VCCIO[5] V24

52mA VCCIO[6] V26 1
C316
AP53 VCCACLK[2] 3062mA VCCIO[7] Y24
VCCIO[8] Y26
1U_0402_6.3V4Z
2
AF23 VCCLAN[1] VCCSUS3_3[1] V28
VCCSUS3_3[2] U28
VccLAN may be grounded if Intel LAN is disabled AF24 VCCLAN[2] 320mA VCCSUS3_3[3] U26
VCCSUS3_3[4] U24
D VCCSUS3_3[5] P28 D
2 1 +TP_PCH_VCCDSW Y20 P26 +3VALW
C320 0.1U_0402_16V4Z DCPSUSBYP VCCSUS3_3[6]
VCCSUS3_3[7] N28
Near AD38 VCCSUS3_3[8] N26
+1.05VS AD38 VCCME[1] VCCSUS3_3[9] M28
1 1 1 VCCSUS3_3[10] M26 2 2
AD39 L28 C321 C325
USB
C391 C322 C318 VCCME[2] VCCSUS3_3[11]
VCCSUS3_3[12] L26
If two VccME rails can be 22U_0805_6.3V6M 22U_0805_6.3V6M 1U_0402_6.3V4Z AD41 J28 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 VCCME[3] VCCSUS3_3[13] 1 1
J26
combined, only total 2 x 22 µF and AF43
VCCSUS3_3[14]
H28
2 x 1 µF caps are necessary VCCME[4] VCCSUS3_3[15]
163mA VCCSUS3_3[16] H26
AF41 VCCME[5] VCCSUS3_3[17] G28
1849mA VCCSUS3_3[18] G26
AF42 VCCME[6] VCCSUS3_3[19] F28
Near V39 VCCSUS3_3[20] F26
V39 E28 +3VALW +5VALW
VCCME[7] VCCSUS3_3[21]
Clock and Miscellaneous

1 1 1 VCCSUS3_3[22] E26
V41 C28
CH751H-40PT_SOD323-2
C447 C323 C324 VCCME[8] VCCSUS3_3[23]
VCCSUS3_3[24] C26
1
22U_0805_6.3V6M 22U_0805_6.3V6M 1U_0402_6.3V4Z V42 B27
2 2 2 VCCME[9] VCCSUS3_3[25] D16 R344
VCCSUS3_3[26] A28
Y39 VCCME[10] VCCSUS3_3[27] A26
100_0402_1%
Y41 U23
2
VCCME[11] VCCSUS3_3[28] +3VS +5VS
Y42 VCCME[12] VCCIO[56] V23 +1.05VS
1
F24 +PCH_VCC5REFSUS 2 1
V5REF_SUS C326 1U_0402_6.3V4Z D17 R346
Reseve R349 for L17 Filter Cap. > 1mA
C 1 2 +VCCRTCEXT V9 CH751H-40PT_SOD323-2 C
C327 0.1U_0402_16V4Z DCPRTC 100_0402_1%
R349 0_0603_5%
2
+1.05VS 1 2 196mA > 1mA K49 +PCH_VCC5REF +PCH_VCC5REF
V5REF
+PCH_VRM AU24
PCI/GPIO/LPC
VCCVRM[3]
1 1
1
C329 +3VS C330

1U_0402_6.3V4Z R347 +1.05VS_PCHDPLL_A
68mA VCC3_3[8] J38
BB51 VCCADPLLA[1]
0_0603_5% BB53 L38 1U_0402_6.3V4Z
2 @ VCCADPLLA[2] VCC3_3[9] 2
2
69mA M36 C333
2
L18 1 +1.05VS_PCHDPLL_B VCC3_3[10] 0.1U_0402_16V4Z

2
10UH_LB2012T100MR_20%
BD51 VCCADPLLB[1] 375mA
BD53 VCCADPLLB[2] VCC3_3[11] N36
1
1 1
C80 C332 +1.05VS 1U_0402_6.3V4Z AH23 P36
10U_0805_10V4K 1U_0402_6.3V4Z VCCIO[21] VCC3_3[12]
1 1 1 AJ35 VCCIO[22]
AH35 VCCIO[23] VCC3_3[13] U35
2 2 C334 C335 C336 +3VS
1U_0402_6.3V4Z AF34 3062mA
2 2 2 VCCIO[2]
VCC3_3[14] AD13 2 1
change cap to 10uf for cost 1U_0402_6.3V4Z AH34 C337 0.1U_0402_16V4Z
VCCIO[3]
Short AF34, AH34 and AF32 power
AF32
for HDMI Deep Color VCCIO[4]
AK3
+VCCSST VCCSATAPLL[1]
1
C338
2
0.1U_0402_16V4Z
V12 DCPSST 31mA VCCSATAPLL[2] AK1
+1.05VS
1 2 +V1.1A_INT_VCCSUS Y22 DCPSUS
C341 0.1U_0402_16V4Z AH22
B VCCIO[9] B
+3VALW 163mA
P18 VCCSUS3_3[29] 196mA VCCVRM[4] AT20 +PCH_VRM
1 2 U19
SATA
VCCSUS3_3[30]
PCI/GPIO/LPC
C343 0.1U_0402_16V4Z AH19 +1.05VS
VCCIO[10]
U20 VCCSUS3_3[31] 1
AD20 C342
VCCIO[11] 1U_0402_6.3V4Z
U22 VCCSUS3_3[32]
VCCIO[12] AF22
+3VS 2
375mA VCCIO[13] AD19
1
C344
2
0.1U_0402_16V4Z
V15 VCC3_3[5] 3062mA VCCIO[14] AF20
VCCIO[15] AF19
V16 VCC3_3[6] VCCIO[16] AH20
+VTT Y16 AB19
VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
1 2 VCCIO[19] AB22
C345 4.7U_0603_6.3V6K +1.05VS
Remove HDA power rail to +1.5V > 1mA VCCIO[20] AD22
1 2 AT18 V_CPU_IO[1]
C346 0.1U_0402_16V4Z AA34 +PCH_VCCME1 R351 1 2 0_0402_5%
CPU
VCCME[13]
1 2 VCCME[14] Y34 +PCH_VCCME2 R352 1 2 0_0402_5%
C347 0.1U_0402_16V4Z AU18 1849mA Y35 +PCH_VCCME3 R353 1 2 0_0402_5%
V_CPU_IO[2] VCCME[15]
VCCME[16] AA35 +PCH_VCCME4 R354 1 2 0_0402_5%
+RTCVCC
RTC
1 2 A12 2mA 6mA L30 +VCC_HDA R356 1 2 0_0402_5% +3VALW

VCCRTC VCCSUSHDA
HDA
C351 0.1U_0402_16V4Z
A 1 A
IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@ C350
1
C348
2
1U_0402_6.3V4Z
Remove VCCSUSHDA can be
2
1U_0402_6.3V4Z either 1.5V or 3.3V
1 2
C349 0.1U_0402_16V4Z
Custom B
401981
5 4 3 2 1
5 4 3 2 1
U11I
AY7 VSS[159] VSS[259] H49
B11 H5 U11H
VSS[160] VSS[260]
B15 VSS[161] VSS[261] J24 AB16 VSS[0]
B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43 AA19 VSS[1] VSS[80] AK30
B39 VSS[166] VSS[266] L14 AM19 VSS[4] VSS[83] AK34
B43 VSS[167] VSS[267] L18 AA24 VSS[5] VSS[84] AK35
B47 VSS[168] VSS[268] L2 AA26 VSS[6] VSS[85] AK38
D B7 VSS[169] VSS[269] L22 AA28 VSS[7] VSS[86] AK43 D
BG12 VSS[170] VSS[270] L32 AA30 VSS[8] VSS[87] AK46
BB12 VSS[171] VSS[271] L36 AA31 VSS[9] VSS[88] AK49
BB16 VSS[172] VSS[272] L40 AA32 VSS[10] VSS[89] AK5
BB20 VSS[173] VSS[273] L52 AB11 VSS[11] VSS[90] AK8
BB24 VSS[174] VSS[274] M12 AB15 VSS[12] VSS[91] AL2
BB30 VSS[175] VSS[275] M16 AB23 VSS[13] VSS[92] AL52
BB34 VSS[176] VSS[276] M20 AB30 VSS[14] VSS[93] AM11
BB38 VSS[177] VSS[277] N38 AB31 VSS[15] VSS[94] BB44
BB42 VSS[178] VSS[278] M34 AB32 VSS[16] VSS[95] AD24
BC10 VSS[181] VSS[281] M46 AB47 VSS[19] VSS[98] AM24
BC2 VSS[184] VSS[284] M8 AC2 VSS[22] VSS[101] BA42
BC22 VSS[185] VSS[285] N24 AC52 VSS[23] VSS[102] AM30
BC32 VSS[186] VSS[286] P11 AD11 VSS[24] VSS[103] AM31
BC36 VSS[187] VSS[287] AD15 AD12 VSS[25] VSS[104] AM32
BH9 VSS[191] VSS[291] P34 AD31 VSS[29] VSS[108] AM39
BD48 VSS[192] VSS[292] P42 AD32 VSS[30] VSS[109] AM42
BD49 VSS[193] VSS[293] P45 AD34 VSS[31] VSS[110] AU20
BD5 VSS[194] VSS[294] P47 AU22 VSS[32] VSS[111] AM46
BE12 VSS[195] VSS[295] R2 AD42 VSS[33] VSS[112] AV22
BE16 VSS[196] VSS[296] R52 AD46 VSS[34] VSS[113] AM49
BE20 VSS[197] VSS[297] T12 AD49 VSS[35] VSS[114] AM7
C BE24 T41 AD7 AA50 C
VSS[198] VSS[298] VSS[36] VSS[115]
BE30 VSS[199] VSS[299] T46 AE2 VSS[37] VSS[116] BB10
BE34 VSS[200] VSS[300] T49 AE4 VSS[38] VSS[117] AN32
BE38 VSS[201] VSS[301] T5 AF12 VSS[39] VSS[118] AN50
BE42 VSS[202] VSS[302] T8 Y13 VSS[40] VSS[119] AN52
BE46 VSS[203] VSS[303] U30 AH49 VSS[41] VSS[120] AP12
BE48 VSS[204] VSS[304] U31 AU4 VSS[42] VSS[121] AP42
BE50 VSS[205] VSS[305] U32 AF35 VSS[43] VSS[122] AP46
BE6 VSS[206] VSS[306] U34 AP13 VSS[44] VSS[123] AP49
BE8 VSS[207] VSS[307] P38 AN34 VSS[45] VSS[124] AP5
BF3 VSS[208] VSS[308] V11 AF45 VSS[46] VSS[125] AP8
BF49 VSS[209] VSS[309] P16 AF46 VSS[47] VSS[126] AR2
BF51 VSS[210] VSS[310] V19 AF49 VSS[48] VSS[127] AR52
BG18 VSS[211] VSS[311] V20 AF5 VSS[49] VSS[128] AT11
BG24 VSS[212] VSS[312] V22 AF8 VSS[50] VSS[129] BA12
BG4 VSS[213] VSS[313] V30 AG2 VSS[51] VSS[130] AH48
BG50 VSS[214] VSS[314] V31 AG52 VSS[52] VSS[131] AT32
BH11 VSS[215] VSS[315] V32 AH11 VSS[53] VSS[132] AT36
BH31 VSS[219] VSS[319] V43 AH32 VSS[57] VSS[136] AV12
BH35 VSS[220] VSS[320] V45 AV18 VSS[58] VSS[137] AV16
BH7 VSS[224] VSS[324] V5 AJ19 VSS[62] VSS[141] AV34
C12 VSS[225] VSS[325] V7 AJ2 VSS[63] VSS[142] AV38
C50 VSS[226] VSS[326] V8 AJ20 VSS[64] VSS[143] AV42
B B
D51 VSS[227] VSS[327] W2 AJ22 VSS[65] VSS[144] AV46
E12 VSS[228] VSS[328] W52 AJ23 VSS[66] VSS[145] AV49
E16 VSS[229] VSS[329] Y11 AJ26 VSS[67] VSS[146] AV5
E20 VSS[230] VSS[330] Y12 AJ28 VSS[68] VSS[147] AV8
E24 VSS[231] VSS[331] Y15 AJ32 VSS[69] VSS[148] AW14
E30 VSS[232] VSS[332] Y19 AJ34 VSS[70] VSS[149] AW18
E34 VSS[233] VSS[333] Y23 AT5 VSS[71] VSS[150] AW2
E38 VSS[234] VSS[334] Y28 AJ4 VSS[72] VSS[151] BF9
E42 VSS[235] VSS[335] Y30 AK12 VSS[73] VSS[152] AW32
E46 VSS[236] VSS[336] Y31 AM41 VSS[74] VSS[153] AW36
E48 VSS[237] VSS[337] Y32 AN19 VSS[75] VSS[154] AW40
E6 VSS[238] VSS[338] Y38 AK26 VSS[76] VSS[155] AW52
E8 VSS[239] VSS[339] Y43 AK22 VSS[77] VSS[156] AY11
F49 VSS[240] VSS[340] Y46 AK23 VSS[78] VSS[157] AY43
F5 VSS[241] VSS[341] P49 AK28 VSS[79] VSS[158] AY47
G10 VSS[242] VSS[342] Y5
G14 Y6 IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@
VSS[243] VSS[343]
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
A H30 VSS[255] VSS[355] AK45 A
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]

IBEXPEAK-M QV20 A0_FCBGA1071 HM55R1@ 2010/06/21 2011/06/21 Title
Issued Date Deciphered Date
Custom B
401981
5 4 3 2 1
5 4 3 2 1
SATA HDD Conn. SATA ODD Conn

+5VS
Place closely JHDD SATA CONN.
1.2A
1 1 1 1
C356 C357 C358 C359 JODD @
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
GND 1
2 2 2 2 SATA_PTX_C_DRX_P4 C378 1
A+ 2 2 0.01U_0402_25V7K SATA_PTX_DRX_P4 <16>
3 SATA_PTX_C_DRX_N4 C377 1 2 0.01U_0402_25V7K
D A- SATA_PTX_DRX_N4 <16> D
GND 4
5 SATA_PRX_DTX_N4 C376 1 2 0.01U_0402_25V7K
B- SATA_PRX_C_DTX_N4 <16>
SSD HDD need 400mA for 3V(PHISON) 6 SATA_PRX_DTX_P4 C375 1 2 0.01U_0402_25V7K
+3VS B+ SATA_PRX_C_DTX_P4 <16>
GND 7
+3VS rail reserve for SSD
1 1 1 1 DP 8
C363 C364 C365 C366 9
+5V +5VS
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10
@ @ @ @ +5V
MD 11
2 2 2 2
15 GND GND 12
14 GND GND 13
SANTA_206401-1_RV
JHDD @
GND 1
2 SATA_PTX_C_DRX_P1 C369 1 2 0.01U_0402_25V7K
A+ SATA_PTX_DRX_P1 <16>
3 SATA_PTX_C_DRX_N1 C367 1 2 0.01U_0402_25V7K
A- SATA_PTX_DRX_N1 <16>
GND 4
5 SATA_PRX_DTX_N1 C368 1 2 0.01U_0402_25V7K
B- SATA_PRX_C_DTX_N1 <16> +5VS
6 SATA_PRX_DTX_P1 C370 1 2 0.01U_0402_25V7K Place components closely ODD CONN.
B+ SATA_PRX_C_DTX_P1 <16>
GND 7 1.1A
1 1 1 1 1
8 C352 C353 C354
V33 +3VS
9 @ C355 C360
V33 10U_0805_10V4Z 10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
V33 10
2 2 2 2 2
GND 11
GND 12
C C
GND 13
V5 14 +5VS
V5 15
V5 16
GND 17
Reserved 18
GND 19
V12 20
24 GND V12 21
23 GND V12 22
SANTA_191201-1
this is temp. footprint
USB Conn. (2 Port)

Reserve for EMI request
B B
@ R73 0_0402_5%
1 2 +USB_VCCA +USB_VCCA
C18
220U_6.3V_M W=60mils
+
W=80mils W=60mils L53 2 1 W=60mils
1 2 USB20_N0_R
+5VALW 1.4A +USB_VCCA
<20> USB20_N0 1 2
U48 For EMI request C19 C21
1 8 @ 2 1 <20> USB20_P0 4 3 USB20_P0_R 2 1 2 1
GND VOUT C361 1000P_0402_50V7K 4 3
2 VIN VOUT 7
3 6 WCM-2012-900T_0805 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VIN VOUT C20 C22
<31> USB_EN# 4 EN FLG 5 USB_OC#0 <20,31>
1 @ R86 0_0402_5% 2 1 USB-LIGHT1 2 1 USB-LIGHT2
RT9715BGS_SO8 1 2
C362 1000P_0402_50V7K JUSB1 @ 1000P_0402_50V7K JUSB2 @
4.7U_0805_10V4Z 1 5 1 5
2 @ USB20_N0_R VCC GND USB20_N1_R VCC GND
2 D- GND 6 2 D- GND 6
USB20_P0_R 3 7 USB20_P1_R 3 7
D+ GND D+ GND
Reserve for EMI request 4 GND GND 8 4 GND GND 8
@ R88 0_0402_5% ALLTOP C107L8-10405-L ALLTOP C107L8-10405-L

1 2
2
D7@
D8@
L54 PJDLC05_SOT23-3
<20> USB20_N1 1 2 USB20_N1_R PJDLC05_SOT23-3
1 2
<20> USB20_P1 4 3 USB20_P1_R

4 3
A WCM-2012-900T_0805 A
1
@ R87 0_0402_5%
1 2

B
401981
5 4 3 2 1
5 4 3 2 1
For EMI request
1 2 @ RC6 10_0402_5% @ CC10 10P_0402_50V8J

@ CC2 100P_0402_50V8J CLK_48M_CR 1 2 1 2
D D
RC2
6.19K_0402_1% UC1
2 1 1 REFE
GPIO0 17 0620 --> remove CR_LED#
USB20_N10 2
+3VS +3VS_CR <20> USB20_N10 DM
USB20_P10 3 24 CLK_48M_CR < 48MHz >
<20> USB20_P10 DP CLK_IN CLK_48M_CR <13>
RC3
0_0603_5% +3VS_CR 4 23
3V3_IN XD_D7
+VCC_3IN1 5 CARD_3V3
1 1 CC3 +V1_8 6 V18 SP14 22
CC4 0.1U_0402_16V4Z 1 21 SD_DATA2_MS_DATA5
CC7 SP13 MS_DATA1_SD_DATA3
7 XD_CD# SP12 20 0620 --> remove CARD-RADER LED
4.7U_0805_10V4Z 1U_0402_6.3V4Z 19
2 2 SDWP_MSCLK SP11 SDCMD
8 SP1 SP10 18
2
9 SP2 SP9 16
SD_DATA1 10 15 MS_DATA2_SDCLK
SP3 SP8
EPAD
SD_DATA0 11 14
SP4 SP7 SDCD#
CC3, CC4, CC5, CC6, 12 SP5 SP6 13
CC7, RC2, RC3, UC1 RTS5137-GR_QFN24_4X4
25
form CARD@ to mount
0715 --> change P/N to RTS5137 (SA000043500)

C C
< 2 in 1 Card Reader >

0624 --> change CARDREADER conn.
JREAD @
MS_DATA1_SD_DATA3
D3 1 SDCMD
CMD 2
VSS1 3
VDD 4 MS_DATA2_SDCLK
+VCC_3IN1
CLK 5
VSS2 6 1
CC6
1
CC5
7 SD_DATA0
D0 SD_DATA1 0.1U_0402_16V4Z 1U_0402_6.3V4Z
D1 8
SD_DATA2_MS_DATA5 2 2
D2 9
10 SDWP_MSCLK
WP SDCD#
CD 11
GND1 12
GND2 13
GND3 14
GND4 15
B B
TAITW_PSDAT3-09GLAS1N14N
For EMI request
@ RC4 10_0402_5% @ CC8 10P_0402_50V8J

MS_DATA2_SDCLK 1 2 1 2
@ RC5 10_0402_5% @ CC9 10P_0402_50V8J
SDWP_MSCLK 1 2 1 2
A A

B
401981
5 4 3 2 1
PCIe Mini Card-WLAN/WiMax
Slot#1 Half PCIe Mini Card-WLAN/WiMax

+1.5VS +3V_WLAN 2 1
+3VALW +3V_WLAN
WLAN&BT Combo module circuits JWLAN 1 A 2 A @ PJ27 2 1 JUMP_43X79
1 1 2 2
BT BT 3 3 4 4 +3VS 2 1
on module on module BT_CTRL 5 6 @ PJ26 2 1 JUMP_43X79
5 6
7 8
Enable Disable
<17> CLKREQ_WLAN#
9
7 8
10
Short PJ27 for WiFi(WLAN)/WiMax combo module
9 10
11 12
<17> CLK_WLAN#
13
11 12
14
Short PJ26 for WiFi(WLAN) module only.
<17> CLK_WLAN 13 14
BT_CRTL HI LO 15 15 16 16
17 17 18 18
19 19 20 20 WL_OFF# <31>
BT_PWR# LO HI 21 22 PLT_RST#
21 22 PLT_RST# <20,28,31,32>
<17> PCIE_PRX_WLANTX_N2 23 23 24 24
<17> PCIE_PRX_WLANTX_P2 25 25 26 26
+1.5VS +3V_WLAN
**If +3V_WLAN is +3VS, please 27 27 28 28 For SED For SED
29 29 30 30 PM_SMBCLK <11,12,13,17>
remove D24. 31 32 PM_SMBDATA <11,12,13,17> 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<17> PCIE_PTX_C_WLANRX_N2 31 32
<17> PCIE_PTX_C_WLANRX_P2 33 33 34 34 1 1 1 1 1 1
1
35 36 USB20_N13 <20> @ @
D24 @ 35 36 CM7 CM8 CM9 C254 CM1 CM2 CM3 C253
BT_CTRL
WLAN/ WiFi 37 37 38 38 USB20_P13 <20> WiMax 47P_0402_50V8J 47P_0402_50V8J
<31,34,41> SUSP# 1 2 +3V_WLAN 39 40
2
39 40 2 2 2 2 2 2
41 41 42 42
CH751H-40PT_SOD323-2 43 44 0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z
43 44
1
D
45 45 46 46
<21> BT_PWR# 2 47 47 48 48
G 1 2 49 50
<31> E51_TXD 49 50
Q36 S 2N7002_SOT23-3 1R16 0_0402_5%
2 51 52
<31> E51_RXD
3
BT@ R17 0_0402_5% 51 52

53 GND1 GND2 54
Debug card using
@ FOX_AS0B226-S40N-7F

B
401981
A B C D E
3/19 --> Change JLAN for don't support LAN LED fuction 0715 --> LL1, CL13, CL9, LL3, CL28,
UL1
--> Pin40, 37 change to NC Pin CL29 are unmount for RTL8105E-VC C10,CL4,CL5,CL6,CL7 close to
CL1 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_P1 22 31 LL1,CL13 will be changed to Pin 27,39,12,47,48
<17> PCIE_PRX_C_LANTX_P1 HSOP LED3/EEDO +LAN_VDD10 +3V_LAN
LED1/EESK 37 2.2uH&4.7uF after EVT test
<17> PCIE_PRX_C_LANTX_N1 CL2 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_N1 23 HSON LED0 40
LL1 @ 1 2
17 30 RL2 2 1 10K_0402_5% +LAN_REGOUT 1 2 0.1U_0402_16V4Z CL10
<17> PCIE_PTX_C_LANRX_P1 HSIP EECS/SCL
18 32 RL1 2 1 10K_0402_5% 2.2UH +-5% NLC252018T-2R2J-N
<17> PCIE_PTX_C_LANRX_N1 HSIN EEDI/SDA
1 1 2 1 2 1
Layout Note: LL1 must be 0.1U_0402_16V4Z CL4
RL19 0_0402_5% 16 1 LAN_MDI0+ within 200mil to Pin36, @CL13
@ CL13 CL9 @ 1 2
<17> CLKREQ_LAN# CLKREQB MDIP0
2 LAN_MDI0- CL13,CL9 must be within 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL5
MDIN0 LAN_MDI1+ 200mil to LL1 2 1
<20,27,31,32> PLT_RST# 25 PERSTB MDIP1 4 1 2
5 LAN_MDI1- +LAN_REGOUT: Width =60mil 0.1U_0402_16V4Z CL6
MDIN1
<17> CLK_LAN 19 REFCLK_P NC/MDIP2 7 1 2
20 8 0.1U_0402_16V4Z CL7
<17> CLK_LAN# REFCLK_N NC/MDIN2
NC/MDIP3 10
NC/MDIN3 11
+3V_LAN LAN_X1 43 CKXTAL1
1 2 PCH_WAKE# LAN_X2 44 CKXTAL2 DVDD10 13 +LAN_VDD10
RL3 @ 100K_0402_5% 29 +LAN_VDD10 +LAN_EVDD10
DVDD10
DVDD10 41
PCH_WAKE# 28 2 1
<18> PCH_WAKE# LANWAKEB 0_0603_5% LL2 1 2 CL19,CL20,CL21,CL22 close to
ISOLATEB 26 27 +3V_LAN
ISOLATEB DVDD33
39 CL18 CL17 Pin 3,13,29,45
+3V_LAN DVDD33 1U_0402_6.3V4Z 0.1U_0402_16V4Z +LAN_VDD10
2 1
14 NC/SMBCLK AVDD33 12 +3V_LAN
15 NC/SMBDATA AVDD33 42 1 2
1 RL22 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 Close to Pin 21 0.1U_0402_16V4Z CL19
RL22 need always pull-high 48 1 2
AVDD33 0.1U_0402_16V4Z CL20
for RTL8105E Efuse mode
ENSWREG 33 1 2
ENSWREG 0.1U_0402_16V4Z CL21
EVDD10 21 +LAN_EVDD10
+LAN_VDDREG 34 VDDREG 1 2
35 3 +LAN_VDD10 0.1U_0402_16V4Z CL22
VDDREG AVDD10
AVDD10 6
+3VS 9 +3V_LAN +LAN_VDDREG
AVDD10
1 2 46 RSET AVDD10 45
2 RL5 2.49K_0402_1% 2
2 1
1
24 36 +LAN_REGOUT 0_0603_5% LL3@ 1 2

RL6 GND REGOUT
49 PGND
1K_0402_1% @ @CL28
@ CL28 CL29 @
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
RTL8105E-GR QFN _6X6 2 1
2
ISOLATEB
0715 --> change P/N to SA00003PO20 (RTL8105E-VC )
RL7
15K_0402_5%
+3V_LAN
ISOLATEB RL10
LAN Conn.
WOL_EN# <31,34>
@ 0_0402_5% 4/2->remove RL8, RL9, CL11
@ RL4
0_0402_5%
JLAN @
RL11 YL1
WOL_EN <31>
0_0402_5% ENSWREG LAN_X1 1 2 LAN_X2 8 PR4-
25MHZ_20PF_7A25000012 7
RL23 PR4+
1 1
Add RL10 for +3V_LAN power enable signal 0_0402_5% RJ45_MIDI1- 6
CL26 CL27 PR2-
Add RL11 for wake on LAN function enable signal 27P_0402_50V8J 27P_0402_50V8J 5
2 2 PR3-
3 4 3
PR3+
0715 --> RL4 is unmount, RJ45_MIDI1+ 3 PR2+
3/29 --> swap Line and PHY signal RL23 mount for RJ45_MIDI0- 2 PR1-
RTL8105E-VC RJ45_MIDI0+ 1 PR1+
SHLD1 9
SHLD2 10
UL3
SANTA_130452-C
LAN_MDI1- 1 16 RJ45_MIDI1-
LAN_MDI1+ TD+ TX+ RJ45_MIDI1+ CL42 1000P_0402_50V7K
2 TD- TX- 15
3 CT CT 14 2 1 1 2
4 13 RL15 75_0402_1%
NC NC CL41 1000P_0402_50V7K
5 NC NC 12
6 11 2 1 1 2 RJ45_GND
LAN_MDI0- CT CT RJ45_MIDI0- RL13 75_0402_1% RJ45_GND CL36 1 LANGND
7 RD+ RX+ 10 2
LAN_MDI0+ 8 9 RJ45_MIDI0+ 2 1 1
RD- RX- 1000P_1808_3KV7K CL37 @ CL38 @
2
CL39
Place these components 1 LFE8456E-R 120P_0402_50V8J 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
D69 1 2 2
colsed to LAN chip CL34
0.1U_0402_25V6 PJDLC05_SOT23-3
2
4 4
1
8/16->Add CL39 for EMI request
8/16 --> change P/N to SP050006E00(MHPC NS681610) Add D69 for ESD

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401981 B
A B C D E
A B C D
Pin36 Pin25
Codec
600 mA RA2
+PVDD1 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z +5VS
Pin37 Pin24
1 1 0_0603_5% 1 1
CA57 CA44 Pin38
+DVDD_IO JA1 place on +5vs source side CA56 CA43
2
Pin39
JA1 2 2 2 2
2
+3VS 1 2 0.1U_0402_16V4Z JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z
1
RA19 0_0603_5% 1
1
1 1 @ place close to chip
CA2 CA1
1
Del RA20 with connect to +1.5VS
10U_0805_10V4Z
2 2
+3VS_DVDD
+PVDD2 2
RA11
1 0.1U_0402_16V4Z +5VS
ALC259-GR
1 1 0_0603_5% 1 1
RA1 0.1U_0402_16V4Z 35 mA CA61 @ CA62
+3VS 2 1 CA63 @ @ CA58
0_0603_5% 1 1 0.1U_0402_16V4Z
2 2 2 2
CA8 CA7 +AVDD 10U_0805_10V4Z 10U_0805_10V4Z
10U_0805_10V4Z 68 mA RA3
2 2 10U_0805_10V4Z 0.1U_0402_16V4Z 2 1 +5VS
0_0603_5%
Pin48 Pin13
place close to chip
35mA for 3.3V level
39
46
25
38
1 1 1 1
9
UA1 CA3 CA4 CA5 CA6
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
DVDD_IO
2 2 2 2 place close to chip Pin1 Pin12
ANALOG
10U_0805_10V4Z 0.1U_0402_16V4Z Moat
DIGITAL
23 40 SPKL+ <30>
24
LINE1_L SPK_OUT_L+
41
(Include Themal PAD)
LINE1_R SPK_OUT_L- SPKL- <30>
Ext. Mic 14 LINE2_L SPK_OUT_R+ 45 SPKR+ <30>

15 LINE2_R SPK_OUT_R- 44 SPKR- <30>
4.7U_0805_10V4Z 2 1 CA23
<30> MIC1_R_L
21 32 RA4 75_0402_1%
MIC1_L HP_OUT_L HP_L <30>
<30> MIC1_R_R 2 1 CA29 22 MIC1_R HP_OUT_R 33
4.7U_0805_10V4Z RA5 75_0402_1%
2
16 MIC2_L
HP_R <30>
Beep sound 2
17 MIC2_R
Int. Mic SYNC 10 AZ_SYNC_HD <16> EC Beep
INT_MIC_DATA RA7
<13> INT_MIC_DATA 2 GPIO0/DMIC_DATA BCLK 6 AZ_BITCLK_HD <16> <31> EC_BEEP# 1 2
47K_0402_5%
2 1 EC_MUTE# INT_MIC_CLK_R 3
4.7K_0402_5% RA45 GPIO1/DMIC_CLK
SDATA_OUT 5 AZ_SDOUT_HD <16>
<31> EC_MUTE# 4 PD# SDATA_IN 8 AZ_SDIN0_HD_R 2 1 AZ_SDIN0_HD <16>

PCI Beep RA8
CA13
RA6 33_0402_5% 1 2 1 2 MONO_IN
<16,19> PCH_SPKR
47K_0402_5%
11 47 0.1U_0402_16V4Z
<16> AZ_RST_HD# RESET# EAPD
2 1 2 @ 1 AZ_BITCLK_HD
48 @C23
@ C23 10P_0402_50V8J R391 10_0402_5%
MONO_IN SPDIFO
1 2 12 PCBEEP
CA12 100P_0402_50V8J 20 2 1 2 @ 1 AZ_RST_HD#
MONO_OUT
1
@C24
@ C24 10P_0402_50V8J R402 10_0402_5% 1
SENSE_A 13 SENSE A RA12 CA18
MIC2_VREFO 29 For EMI, place near codec
0620 --> remove SENSE_B 18 0618 --> remove +MIC2_VREFO for analoh IntMIC 10K_0402_5% 0.1U_0402_16V4Z
SENSE B 2
30 +MIC1_VREFO_R CA28 10U_0805_10V4Z
2
MIC1_VREFO_R
1 2 36 CBP LDO_CAP 28 1 2
CA47 1 2 0.1U_0603_50V7K CA15
2.2U_0603_6.3V4Z 35 27 AC_VREF
CA48 1 CBN VREF
2 0_0603_5%
+MIC1_VREFO_L 31 19 AC_JDREF2 RA9 1 20K_0402_1%
CA49 1 MIC1_VREFO_L JDREF
2 0.1U_0603_50V7K 1 1
43 PVSS2 CPVEE 34 1 2
CA50 1 2 0.1U_0603_50V7K 42 CA14 2.2U_0603_6.3V4Z CA17 CA16 Place close to chip
PVSS1 10U_0805_10V4Z
49 DVSS2 AVSS1 26
2 2 @
3 1 2 7 DVSS1 AVSS2 37 3
RA18 0.1U_0603_50V7K 0.1U_0402_16V4Z

ALC259-GR_QFN48_7X7
place close to chip +MIC1_VREFO_R +MIC1_VREFO_L
CA48 --> SD013000080 0_0603_5% (Resistor) DGND AGND
RA18 --> SE025104K80 0.1U_0603_50V7K (Cap)
ALC259Q PN IS NOT READY 1 1 0618 --> remove +MIC2_VREFO
@ @
CA37 CA36 for analog IntMIC
1U_0402_6.3V4Z 1U_0402_6.3V4Z
2 2
Sense Pin Impedance Codec Signals Function place close to chip

39.2K PORT-I (PIN 32, 33) Headphone out <30> MIC_SENSE 2 1 SENSE_A
RA10 20K_0402_1%
For EMI
20K PORT-B (PIN 21, 22) Ext. MIC RA41
SENSE A INT_MIC_CLK_R
<13> INT_MIC_CLK
10K PORT-C (PIN 23, 24) <30> NBA_PLUG FBMA-10-100505-301T
RA21 39.2K_0402_1% CAM@
1
5.1K (PIN 48) CA30
4
27P_0402_50V8J 4
0620 --> remove RA13 for SENSE_B @

2
39.2K PORT-E (PIN 14, 15)
Security Classification Compal Secret Data

Size
Document Number Rev
B
401981
A B C D
5 4 3 2 1
Speaker Connector
placement near Audio Codec

D D
RA26
SPKL+ 1 2 SPK_L1
<29> SPKL+
0_0603_5% 2
@DA4
@ DA4 PJDLC05_SOT23-3
CA22 @ 2
470P_0402_50V8J 2 1
1 CA24 3
2 1U_0402_6.3V4Z
@ JSPK @
CA21 @ 1 SPK_L1 1 1
RA27 470P_0402_50V8J SPK_L2 2
SPKL- 1 SPK_L2 SPK_R1 2
<29> SPKL- 1 2 3 3
0_0603_5% SPK_R2 4 4
@DA5
@ DA5 PJDLC05_SOT23-3 ACES_85204-0400N
3
RA28 1
SPKR+ 1 2 SPK_R1 2
<29> SPKR+
0_0603_5% 2
CA25 @
470P_0402_50V8J 2
1 CA27
2 1U_0402_6.3V4Z place near JSPK conn.
@
CA26 @ 1
RA29 470P_0402_50V8J
SPKR- 1 SPK_R2
<29> SPKR- 1 2
C 0_0603_5% C
Ex.MIC JACK
JEXMIC @
5 5
AGND
<29> MIC_SENSE 4 4 GND 10
9
MIC1_R LA6 1 2
KC FBM-L11-160808-121LMT 0603
MIC1_L_R 3 3
GND
8 8 Ext.MIC/LINE IN
6 6 7 7
MIC1_L LA8 1 2 MIC1_L_L 2 2
KC FBM-L11-160808-121LMT 0603 1 1
1 1 RA23 2 RA22 1 +MIC1_VREFO_R
DA6 @ FOX_JA63331-B39S4-7F 1K_0402_5% 2.2K_0402_5%
B CA9 CA10 2 2 1 MIC1_R B
<29> MIC1_R_R
100P_0402_50V8J 100P_0402_50V8J 1
2 2
3
2 1 MIC1_L
<29> MIC1_R_L
PJDLC05_SOT23-3 1K_0402_5%
RA24 2 RA25 1 +MIC1_VREFO_L
2.2K_0402_5%
Head Phone JACK JLINE @

Int. Mic
5 5
AGND 0618 --> remove Analog IntMIC, and change to DIGITAL MIC
<29> NBA_PLUG 4 4 GND 10
GND 9
<29> HP_R LA9 1 2 HP_R_R 3 8
3 8
KC FBM-L11-160808-121LMT 0603 6 7
6 7
<29> HP_L LA101 2 HP_L_R 2 2
KC FBM-L11-160808-121LMT 0603 1 1
1 1
DA7 @ FOX_JA63331-B39S4-7F
CA11 CA19 2
100P_0402_50V8J 100P_0402_50V8J 1
2 2
3
PJDLC05_SOT23-3
A 0812 --> change CA9, CA10, CA11 and CA12 to mount A

Size
Document Number Rev
B
401981
5 4 3 2 1
5 4 3 2 1
+3VL
+3VL
0.1U_0402_16V4Z 0.1U_0402_16V4Z BATT_TEMPA 1 2
1 1 1 1 2 2 C442 C445 100P_0402_50V8J
C436 1 2 ACIN_D 1 2
C437 C438 C439 C440 C441 C446 100P_0402_50V8J
0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z
2 2 2 2 1 1
111
125
0.1U_0402_16V4Z 1000P_0402_50V7K
22
33
96
67
9
U19
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
D for EMI request D
GATEA20 1 21 remove KB LED

<21> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F
CLK_PCI_EC KB_RST# 2 23 EC_BEEP#
<21> KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 EC_BEEP# <29>
SERIRQ 3 26 remove SM_SENSE
<16,32> SERIRQ SERIRQ# FANPWM1/GPIO12
1
LPC_FRAME# 4 27 ACOFF
<16,32> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <35,37>
R377 LPC_AD3 5
<16,32> LPC_AD3 LAD3
@ 10_0402_5% LPC_AD2 7 PWM Output
<16,32> LPC_AD2 LAD2
LPC_AD1 8 63 BATT_TEMPA
<16,32> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA <36>
LPC_AD0 Remove CEC_INT# pull high
<16,32> LPC_AD0 10 LAD0 LPC & MISC 64
2
BATT_OVP/AD1/GPIO39 ADP_I
1 ADP_I/AD2/GPIO3A 65 ADP_I <37>
CLK_PCI_EC 12 AD Input 66 ADP_V
<20> CLK_PCI_EC PCICLK AD3/GPIO3B ADP_V <37>
C443 PLT_RST# 13 75
<20,27,28,32> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
@ 22P_0402_50V8J ECRST# 37 76
2 EC_SCI# ECRST# SELIO2#/AD5/GPIO43
<21> EC_SCI# 20 SCI#/GPIO0E
38 VTTP_EN 1 2
CLKRUN#/GPIO1D VTTP_EN R337 100K_0402_5%
DAC_BRIG/DA0/GPIO3C 68 VTTP_EN <39>
70 EN_DFAN1
+3VL EN_DFAN1/DA1/GPIO3D EN_DFAN1 <6>
R378 DA Output 71 IREF
IREF/DA2/GPIO3E IREF <37>
47K_0402_5% KSI0 55 72 CHGVADJ
KSI0/GPIO30 DA3/GPIO3F CHGVADJ <37>
2 1 ECRST# KSI1 56
+3VL KSI2 KSI1/GPIO31
57 KSI2/GPIO32
2 1 KSI3 58 83 EC_MUTE# +5VS
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <29>
C444 0.1U_0402_16V4Z 1 2 KSO1 KSI4 59 84 USB_EN#
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# <25>
R380 47K_0402_5% KSI5 60 85
KSO2 KSI6 KSI5/GPIO35 PSCLK2/GPIO4C TP_CLK
1 2 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 1 2
R382 47K_0402_5% KSI7 62 87 TP_CLK R379 4.7K_0402_5%
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <33>
KSO0 39 88 TP_DATA TP_DATA 1 2
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <33>
to avoid EC entry ENE test mode KSO1 40 R381 4.7K_0402_5%
KSO2 KSO1/GPIO21
41 KSO2/GPIO22
2 1 @ PLT_RST# KSO3 42 97 VGATE
KSI[0..7] KSO3/GPIO23 SDICS#/GPXOA00 VGATE <18,42> +3VALW
C455 0.1U_0402_16V4Z KSO4 43 98 WOL_EN#
C <32> KSI[0..7] KSO4/GPIO24 SDICLK/GPXOA01 WOL_EN# <28,34> C
KSO5 PWRME_CTRL#
KSO[0..17] KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
PWRME_CTRL# <16>
LID_SW#
<32> KSO[0..17] 45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <32> 1 2
2 1 KB_RST# KSO7 46 SPI Device Interface R383 47K_0402_5%
C456 0.1U_0402_16V4Z KSO8 KSO7/GPIO27
47 KSO8/GPIO28
@ KSO9 48 119 EC_SI_SPI_SO
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO <32>
KSO10 49 120 EC_SO_SPI_SI
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI <32>
For ESD KSO11 50 SPI Flash ROM 126 SPI_CLK
KSO11/GPIO2B SPICLK/GPIO58 SPI_CLK <32>
KSO12 51 128 SPI_CS#
KSO12/GPIO2C SPICS# SPI_CS# <32>
KSO13 52
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73 SYSON 1 2
KSO16 KSO15/GPIO2F CIR_RX/GPIO40 R5 4.7K_0402_5%
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74
KSO17 82 89 FSTCHG
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG <37>
90 BATT_FULL_LED#
BATT_CHGI_LED#/GPIO52 BATT_FULL_LED# <33>
RP7 91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# <32>
+3VL 1 8 EC_SMB_CK1 EC_SMB_CK1 77 GPIO 92 BATT_CHG_LOW_LED#
<36> EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW_LED# <33>
2 7 EC_SMB_DA1 EC_SMB_DA1 78 93 0621->remove PWR_ON_LED# VR_ON 1 2
<36> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55
+3VS 3 6 EC_SMB_CK2 EC_SMB_CK2 79 SM Bus 95 SYSON R462 10K_0402_5%
<17> EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON <40>
4 5 EC_SMB_DA2 EC_SMB_DA2 80 121 VR_ON
<17> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <42>
127 ACIN_D
2.2K_0804_8P4R_5% AC_IN/GPIO59
For prevent leakage for CPU_CORE
PM_SLP_S3# 6 100 EC_RSMRST#
<18> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <18>
PM_SLP_S5# 14 101 EC_LID_OUT#
<18> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# <17>
EC_SMI# 15 102 EC_ON
<21> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <33,38>
THM_ALT# 16 103
<21> THM_ALT# LID_SW#/GPIO0A EC_SWI#/GPXO06
for Wake on LAN <28> WOL_EN 17 104 PM_PWROK R341 330K_0402_5%
SUSP#/GPIO0B ICH_PWROK/GPXO06 PM_PWROK <18>
18 GPO 105 BKOFF# +3VL 1 2
PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# <13>
PCH_SUSPWRDN 19 GPIO 106 WL_OFF#
<18> PCH_SUSPWRDN EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# <27>
25 107 D21
FAN_SPEED1 EC_THERM#/GPIO11 GPXO10 EC_SEL
<6> FAN_SPEED1 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108 <18> ACIN_D 2 1 ACIN <18,37>
B R342 100K_0402_5% 29 B
E51_TXD E51_TXD FANFB2/GPIO15 CH751H-40PT_SOD323-2
1 2 <27> E51_TXD 30 EC_TX/GPIO16
E51_RXD 31 110 PM_SLP_S4#
<27> E51_RXD EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# <18>
ON/OFFBTN# 32 112 EC_ENBKL
<33> ON/OFFBTN# ON_OFF/GPIO18 ENBKL/GPXID2 EC_ENBKL <19>
<33> PWR_LED# 34 PWR_LED#/GPIO19 GPXID3 114
NUM_LED# 36 GPI 115
<32> NUM_LED# NUMLED#/GPIO1A GPXID4
116 SUSP# SUSP# 1 2
GPXID5 SUSP# <27,34,41>
117 PBTN_OUT# R423 10K_0402_5%
GPXID6 PBTN_OUT# <18>
118 USB_OC#0
GPXID7 USB_OC#0 <20,25>
CRY1 @ R104 1
@R104 2 0_0402_5% 122
R389 CRY2 @R108
@ R108 1 XCLK1 +EC_V18R
2 0_0402_5% 123 XCLK0 V18R 124
CRY1 1 2CRY2
AGND
+3VALW
GND
GND
GND
GND
GND
@ 10M_0402_5% 1 2 C448
<18> EC_CLK
R103 0_0402_5% 1 4.7U_0805_10V4Z
1
@ KB926QFE0_LQFP128_14X14
11
24
35
94
113
69
2
C480
R624 R435
18P_0402_50V8J
1 1 2
@ @ 100K_0402_5% 100K_0402_5%
1
C449 C450 @ EC SEL EC Version

2
18P_0402_50V8J
Y4
18P_0402_50V8J
OSC
OSC
1
2 2 EC_SEL
@ High KB926D3
2
R436
NC
NC
100K_0402_5% Low KB926E0

2
For EC Crystal cost down
1
32.768KHZ_12.5PF_Q13MC14610002
A A

Remove PM_SLP_S4#/S5# AND Gate Size
Document Number Rev
B
401981
5 4 3 2 1
SPI Flash (256KB) Lid SW LPC Debug Port Please place the PAD under DDR DIMM.
+3VS H7
+3VALW
+3VL 6 5
U21
APX9132ATI-TRL_SOT23-3
1 20mils 1 2 7 4
<16,31> SERIRQ PLT_RST# <20,27,28,31>
C451 U22 2 3 R392 0_0402_5%
GND
VDD VOUT LID_SW# <31>
8 VCC VSS 4
0.1U_0402_16V4Z 8 3
2 <16,31> LPC_AD3 LPC_AD2 <16,31>
3 1 1
1
W
7 C453 C452 9 2
HOLD <16,31> LPC_AD1 LPC_AD0 <16,31>
0.1U_0402_16V4Z 10P_0402_50V8J
2 2
<31> SPI_CS# 1 S
<16,31> LPC_FRAME# 10 1 CLK_PCI_DDR <20>
SPI_CLK 6
<31> SPI_CLK C
2
<31> EC_SO_SPI_SI 5 D Q 2 EC_SI_SPI_SO <31>
DEBUG_PAD @ R393
MX25L2005CMI-12G SOP 8P 22_0402_5%
1
2
SPI_CLK 1 R394 @2 1 2
10_0402_5% C454 @ 10P_0402_50V8J C457
22P_0402_50V8J
reserve for EMI, close to U22 1
reserve for EMI
KEYBOARD CONN.
please close to JKB
KSI[0..7]
KSI[0..7] <31>
KSO[0..17] KSO16 1 2
KSO[0..17] <31>
C401 100P_0402_50V8J
JKB @ KSO17 1 2
JKB34 1 2 +3VS C402 100P_0402_50V8J
34 KSO16 R372 300_0402_5% KSO2
33 1 2
C404 100P_0402_50V8J
32 KSO17 KSO1
31 1 2
C405 100P_0402_50V8J
30 KSO0
29 1 2
KSO2 C406 100P_0402_50V8J
28 KSO1 KSO4
27 1 2
KSO0 C407 100P_0402_50V8J
26 KSO4 KSO3
25 1 2
KSO3 C408 100P_0402_50V8J
24 KSO5 KSO5
23 1 2
KSO14 C409 100P_0402_50V8J
22 KSO6 KSO14
21 1 2
KSO7 C410 100P_0402_50V8J
20 KSO13 KSO6
19 1 2
KSO8 C411 100P_0402_50V8J
18 KSO9 KSO7
17 1 2
KSO10 C412 100P_0402_50V8J
16 KSO11 KSO13
15 1 2
KSO12 C413 100P_0402_50V8J
14 KSO15 KSO8
13 1 2
KSI7 C415 100P_0402_50V8J
12 KSI2 KSO9
11 1 2
KSI3 C416 100P_0402_50V8J
10 KSI4 KSO10
9 1 2
KSI0 C417 100P_0402_50V8J
8 KSI5 KSO11
7 1 2
KSI6 C418 100P_0402_50V8J
6 KSI1 KSO12
5 1 2
JKB4 2 1 +3VS C419 100P_0402_50V8J
4 CAPS_LED# R376 300_0402_5% KSO15
3 CAPS_LED# <31> 1 2
C420 100P_0402_50V8J
2 NUM_LED# KSI7
1 NUM_LED# <31> 1 2
C421 100P_0402_50V8J
ACES_88170-3400 KSI2 1 2
C422 100P_0402_50V8J
KSI3 1 2
C423 100P_0402_50V8J
KSI4 1 2
C424 100P_0402_50V8J
KSI0 1 2
C425 100P_0402_50V8J
KSI5 1 2
C427 100P_0402_50V8J
KSI6 1 2
C429 100P_0402_50V8J
KSI1 1 2
C431 100P_0402_50V8J
CAPS_LED# 1 2
C433 100P_0402_50V8J
NUM_LED# 1 2
C435 100P_0402_50V8J

B
401981
5 4 3 2 1
Power Button 51_ON# <35>

TP Button/Conn.
1
D
<31,38> EC_ON 2
G
LEFT
2
+3VL Q38 S 2N7002_SOT23-3 SW1
3
R396 SW_L 1 3
10K_0402_5%
2
2 4 JTOUCH @
debug phase using R395 1
1
SMT1-05_4P +5VS 1
<31> TP_CLK 2
6
5
100K_0402_5% 2
<31> TP_DATA 3 3
D SW2 @ SW_L D
4
1
ON/OFFBTN# SW_R 4
1 3 ON/OFFBTN# <31> 5 5 G7 7
TOP side 6 6 G8 8
2 4 1 RIGHT 2
C458 SW4 1 P-TWO_161021-06021_6P-T
SMT1-05_4P 0.1U_0402_25V6 SW_R 1 3 3
PWR/B to MB Conn.
6
5
@
2 D19 @
2 4
SW3 @ AZ5125-02S.R7G_SOT23-3
1 3 JPOWER @ SMT1-05_4P
6
5
3
2
ON/OFFBTN# 0816->change JTOUCH connector
1 1
BTM side 2 4 For EMI request 2 2 D20 @
3 3
3
SMT1-05_4P AZ5125-02S.R7G_SOT23-3
4 4
6
5
D83 @
G1 5
G2 6 AZ5125-02S.R7G_SOT23-3 0827 --> change SW1, SW2
1
ACES_85201-0405N P/N to SN100002Y00 for
PWR button H1.5 160g
1
For EMI request
For ESD
POWER/SUSPEND LED Screw Hole

H5 H6 H8 H9 H10 H11 H12 H13
C C
Vf=1.9V~2.4V H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
If=5mA @ @ @ @ @ @ @ @
1
D22
+5VALW 1 2 2 1 PWR_LED# <31>

R397 510_0402_5% YG
H1 H26 H17 H14
HT-110UYG5_YELLOW GREEN H_2P7x3P2N H_2P7N
3
@ @
H_1P0N H_3P0
1
@ @
CPU MINI CARD SB

BATT CHARGE/FULL LED
H20 H21 H18 H19 H15 H16
H_4P2 H_4P2x4P7 H_3P3 H_3P3 H_5P0N H_5P0N
@ @ @ @ @ @
1
1
Vf=1.8V~2.0V
If=5mA(max)
D25 H22 H23

H_4P2x4P7 H_4P7
2 1 2 @ @
A BATT_CHG_LOW_LED# <31>
+5VALW 1 R399 510_0402_5%
1
B 3 1 2 BATT_FULL_LED# <31> B
YG R403 510_0402_5%
HT-210UD5-UYG5_AMBER-YEL GRN For Codec AGND

Dummy PCB Fedical Mark PAD
3G
FD1 FD2 FD3 FD4
MDC
@ @ @ @
1
ISPD
ZZZ PJP1 U11
PCB DC-IN PCH
PCB LA-6842P REV1 PJP1 45@ PCH

HM55R3@
A A

B
401981
5 4 3 2 1
A B C D E
+3VALW TO +3VS +5VALW TO +5VS +1.5V to +1.5VS

+3VALW +3VS Vgs=-0V,Id=9A,Rds=18.5mohm +5VALW +5VS
4.7U_0805_10V4Z +1.5V +1.5VS
4.7U_0805_10V4Z
1 1 1 1 Vgs=10V,Id=14.5A,Rds=6mohm
Q29 C459 C460 4.7U_0805_10V4Z Q30 C461 C462 1 1
470_0805_5%
470_0805_5%
8 1 +5VS 8 1 Q31 C463 C464
D S D S
470_0805_5%
7 D S 2 7 D S 2 8 D S 1
2
2 2 R406 +3VS 2 2 R407
6 D S 3 6 D S 3 7 D S 2
2 2 R408
1 5 D G 4 5 D G 4 6 D S 3 1
1U_0402_6.3V4Z 1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5 D G 4
SI4800BDY_SO8 1 R409 2 +VSB 1 2 SI4800BDY_SO8 1 R410 2 +VSB 1U_0402_6.3V4Z
3 1
3 1
0.022U_0402_25V7K
0.01U_0402_25V7K
47K_0402_5% C292 C821 47K_0402_5% SI4800BDY_SO8 1 R411
4.7U_0805_10V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
1 1 1 1 2 +VSB
3 1
1
6
C466 220K_0402_5%
4.7U_0805_10V4Z
1 1 1
6
0.1U_0402_25V6
C465 R412 Q10A C315 C467 C468 R413 Q11A FDS6676AS
2 1
C470
330K_0402_5% Q10B 200K_0402_5% Q11B C469 R414 Q12A
2 2 SUSP @ 2 2 @ SUSP 5 820K_0402_5% Q12B
2 5 2
2N7002DW-T/R7_SOT363-6 2 2N7002DW-T/R7_SOT363-6 2 2 SUSP 5
2
2
2
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
1
2
2N7002DW-T/R7_SOT363-6
4
For EMI request
For EMI request
0715 --> Q31 change to SB548000310 the same as +5VS
+3VALW TO +3V_LAN
For S3 CPU Power Saving
+3VALW
+3VALW
+3VALW
2
2
2 @ Vgs=-4.5V,Id=3A,Rds<97mohm 2
R419 R425
100K_0402_5% @ 2 100K_0402_5%
C471 @ Q32
2
0.1U_0402_16V7K AO3413_SOT23
0.75VR_EN# <41>
1
1
3
S
PJ24
2
1 G
<28,31> WOL_EN# 1 2 2 JUMP_43X79
3
@ R420 47K_0402_5% 1
@ Q48B
1
D 2N7002DW-T/R7_SOT363-6
1
@ C474
1
0.01U_0402_25V7K +3V_LAN 1 2 0.75VR_EN 5

<5,39> VTTPWROK
R169 100K_0402_5% Q48A,B
2
R169, R425 form PS@ to mount
4
6
Q48A
1 1 1 1 2N7002DW-T/R7_SOT363-6
@ C476 @ C479 C125 C126 SUSP 2

4.7U_0805_10V4Z 1U_0402_6.3V4Z
2 2 2 2
1
10U_0805_10V4K 10U_0805_10V4K
For EMI test
Reserve for EMI test

3 3
+5VALW +0.75VS
+3VS +5VS +5VALW
2
R421 form PS@ to mount
R422 R421
@ 2 @ 2 2 100K_0402_5% 47_0805_5% 0715 --> change R412 from 470ohm to 47ohm
C473 C475 C478
0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
1
SUSP
1 1 1 <9,41> SUSP
3
Q5B
Q5A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2 5 SUSP
<27,31,41> SUSP#
4
+3VS +3VS +3VS +3VS +3VS
2 2 2 2 2
C481 C482 C483 C484 C485
0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
4 1 1 1 1 1 4
+5VALW +1.05VS

0816 --> Add C481~C485 for EMI request Issued Date 2010/06/21 Deciphered Date 2011/06/21 Title
B
401981
A B C D E
A B C D
VIN
PL1
PF1 SMB3025500YA_2P
DC301001M80 DC_IN_S1 1 2 DC_IN_S2 1 2
PJP1 7A_24VDC_429007.WRML
1000P_0402_50V7K
1000P_0402_50V7K
680P_0402_50V7K
+ 1
680P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1
1
1 1
PC5
+ 2
1
PC1
PC2
PC3
PC4
PC6
3
2
-
@
2
4 @
-
@ SINGA_2DW-0005-B03
VIN
2
PD2
RLS4148_LL34-2
PreCHG
1
@PQ2
@ PQ2
@ PD1 TP0610K-T1-E3_SOT23-3
1
PR1
PR9 PR10 1 2 2 1 3 1
PQ1 68_1206_5% 68_1206_5%
VIN B+
TP0610K-T1-E3_SOT23-3 0_1206_5%
RLS4148_LL34-2
@PR2
@PR2
2
1 2
2
2 1 N1 3 1 VS 1K_1206_5%
2
1
BATT+
PD3 @PR5 @ PR3 @ PR4
2
1
RLS4148_LL34-2 1 2 100K_0402_5%
1
1
PC10 1K_1206_5% 100K_0402_5%
PR13 PC9 0.1U_0603_25V7K
2
100K_0402_1% 0.22U_0603_25V7K @PR6
@ PR6
2
2
1 2
2
1
1K_1206_5%
<33> 51_ON# 1 2
PR15 @PR8
@ PR8 @PR7
22K_0402_1% 1 2 100K_0402_5%
1K_1206_5%
1 2
1
@ PD4
<31,37> ACOFF 2
1 2 2
<38> +5VALWP 3
RB715F_SOT323-3 @PQ30 @ PQ3
3
DTC115EUA_SC70-3 DTC115EUA_SC70-3
3 3
PJ1 PJ4 PJ3

+3VALWP 2 2 1 1 +3VALW +1.5VP 2 2 1 1 +1.5V +1.8VSP 2 2 1 1 +1.8VS
@ JUMP_43X118 @ JUMP_43X118 @ JUMP_43X79
(5A,200mils ,Via NO.= 10) (2A,80mils ,Via NO.= 4)
(9A,360mils ,Via NO.= 18)
OCP(min)=7.7A
OCP(min)=9.8A
PJ5
PJ9
+5VALWP 2 1 +5VALW PJ8
2 1 +GFX_COREP +GFX_CORE
2 2 1 1 +3VLP 2 2 1 1 +3VL
@ JUMP_43X118
(5A,200mils ,Via NO.= 10) @ JUMP_43X118 @ JUMP_43X39
(100mA,40mils ,Via NO.= 2)
OCP(min)=7.9A PJ10
PJ7 2 2 1 1
+VSBP 2 1 +VSB @ JUMP_43X118

2 1
@ JUMP_43X39 (22A,880mils ,Via NO.=44)
(120mA,40mils ,Via NO.= 1) OCP(min)=26A
PJ17
4
PJ11 +0.75VSP 2 1 +0.75VS
4
2 1
2 2 1 1
@ JUMP_43X79
@ JUMP_43X118 (1.5A,60mils ,Via NO.= 4)
PJ13
+VTTP 2 2 1 1 +VTT
@ JUMP_43X118
(20A,800mils ,Via NO.=40)
OCP(min)=27.49A Size
Document Number Rev
B
401981
A B C D
A B C D
1 1
VMB
PL2
PH1 under CPU botten side :
PJP2 PF2 SMB3025500YA_2P
1 BATT_S1 1 2 1 2
CPU thermal protection at 90degree C
1 BATT+
2 2
3 10A_125V_451010MRL
Recovery at 56 degree C
3 +3VLP
4 BATT_P4
4
1
5 BATT_P5
5
1
10 6 EC_SMDA PC16 PC17
GND 6 EC_SMCA @PC18
@ PC18 1000P_0402_50V7K 0.01U_0402_25V7K
11 7
2
GND 7
1
12 8 0.1U_0402_25V6K
2
GND 8 PR30
13 GND 9 9
1K_0402_1%
@ SUYIN_200045MR009G171ZR
2
VL
PD7
1
PJSOT24C_SOT23-3
1
PD6 2
1
1 PR31
PJSOT24C_SOT23-3 3 PC19 23.2K_0402_1%
PR32 0.1U_0402_16V4Z
2
6.49K_0402_1%
2
2
2 1 +3VLP
2
PR34
1
10.7K_0402_1%
PR35 PU4
2
1K_0402_1% 1 8 2
1
VCC TMSNS1
1
2 7
2
GND RHYST1
2
PR36 PR37 3 6 PH1

BATT_TEMPA <31> OT1 TMSNS2
100_0402_1% 100_0402_1% 100K_0402_1%_NCP15WF104F03RC
4 5
2
<38> VS_ON OT2 RHYST2
1
G718TM1U_SOT23-8
EC_SMB_DA1 <31>
EC_SMB_CK1 <31>
PQ4
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
3 3
100K_0402_1%
0.22U_0603_25V7K
0.1U_0603_25V7K
1
1
PR41
PC20
PC21
@ @
2
2
2
VL PR42
22K_0402_1%
1 2
2
PR43
100K_0402_1%
PR44
1
0_0402_5% D
1 2 2 PQ5
<18,38> POK
G SSM3K7002FU_SC70-3
.1U_0402_16V7K
S
3
1
@ PC22
2
4 4

Size
Document Number Rev
B
401981
A B C D
A B C D
B+
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
PQ6
AO4435_SO8
1
PC73
PC74
PC75
1 8
2 7
PQ8 PR45
B+ PL19 3 6
2
PQ7 P2 P3 HCB4532KF-800T90_1812 CHG_B+
SI4483ADY-T1-GE3_SO8 0.02_1206_1% 5
AO4435_SO8
VIN 8 1 1 8 1 4 2 1
4
7 2 2 7
0.1U_0402_25V6K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
6 3 3 6 2 3 CSIN PR49
5 5 47K_0402_1%
1 2
CSIP VIN
4
1
1 1
2
VIN PreCHG
RB751V-40_SOD323-2
3
5600P_0402_25V7K
PQ10 PR46 PR52
2
0.1U_0603_25V7K
DTA144EUA_SC70-3 200K_0402_1% 10K_0402_1%
2
PC28
2
1
2
PD8
PC23
PC24
PC25
PC26
2
1
PC27
PR47
PR48 191K_0402_1%
1000P_0402_25V8J
1
200K_0402_1% 6251VDD @
1
2.2U_0603_6.3V6K
ACSETIN
2
1
1
1
1
PC29
PC77
1
PR50 PQ15
10_1206_5% PR51 DTC115EUA_SC70-3 2
2
ACSETIN 14.3K_0402_1%
BATT_ON 2 PR53
2
PQ13 10K_0402_1%
2200P_0402_25V7K
100K_0402_1%
DTC115EUA_SC70-3 2 1 PU5
2
<31> FSTCHG
1
PC31
PC33
100K_0402_1%
PR54
1 24 2 1
3
VDD DCIN
1
2
PR56
0.1U_0603_25V7K
6
D PR55 2 23
1
ACSET ACPRN ACPRN <38>
2 PQ18A 150K_0402_1% PR57 BATT_ON
G 20_0603_5%
DMN66D0LDW-7_SOT363-6
2
2
3 22 1 2 CSON
EN CSON
1
PC32 D
S
1
5
6
7
8
0.047U_0603_16V7K ACPRN 2 PQ16
4 21 1 2 CSOP PQ17 G SSM3K7002FU_SC70-3
1
CELLS CSOP PR58
DMN66D0LDW-7_SOT363-6
3
PC35 6800P_0402_25V7K 20_0603_5%
2 2
1 2 5 ICOMP CSIN 20 2 1 AO4466L_SO8
3
2
D PR59 4
PQ18B
5 PC36 PR60 10K_0402_1% PC37 20_0603_5%

G 1 2 1 2 6 19 0.1U_0603_25V7K
1 2
1
VCOMP CSIP PL3 PR63
S 0.01U_0402_25V7K PR62 47K_0402_1% PR61 10UH_MSCDRI-104A-100M-E_4.6A_20% 0.02_1206_1% BATT+
4
3
2
1
PR64 1 2 7 18 LX_CHG 2.2_0603_1% 1 2 CHG 1 4
<31> ADP_I ICM PHASE
1
47K_0402_5%
5
6
7
8
680P_0603_50V8J 4.7_1206_5%
PACIN 1 2 1 2 2 3
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
PR65
PC39 6251VREF 8 17 DH_CHG
PR66 .1U_0402_16V7K VREF UGATE PR67 PC40
154K_0402_1% 0_0603_5% 0.1U_0603_25V7K PQ19
1
PC41
PC42
PC107
2 1 9 16 BST_CHG 1 2 BST_CHGA 2 1 AO4466L_SO8
<31> IREF CHLIM BOOT
1
1
PR68 4
1
0.01U_0402_25V7K
75K_0402_1% PD12
2
PC43
6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2 @
ACLIM VDDP
1
2
1
1
PC44
ACOFF 2 PQ20 PR69 1 26251VDD

<31,35> ACOFF
3
2
1
DTC115EUA_SC70-3 120K_0402_1% PR70 11 14 DL_CHG
VADJ LGATE
2
20K_0402_1% PR71
2
4.7_0603_5%
2
12 13 PC45
3
1
GND PGND 4.7U_0805_6.3V6K
G5209S31U_SSOP24
PR72
15.4K_0402_1%
1 2
<31> CHGVADJ
1
3
PR73 3
31.6K_0402_1%
VIN
2
CP mode
1
Iada=0~3.42A(65W) CP= 92%*Iada; CP=3.147A @PR74
Vaclim=1.08V(65W) PR68=75k PR45=0.02 309K_0402_1%
6251VDD
@ PR75
2
10K_0402_1%
1 2
CC=0.25A~3A CHGVADJ=(Vcell-4)/0.10627 ADP_V <31>
1
PR251
IREF=1.016*Icharge Vcell CHGVADJ
1
1
10K_0402_1% @ PR76
PR252 1 2 47K_0402_1% @ PC46
IREF=0.254V~3.048V 4V 0V 47K_0402_1% PR250 ACIN <18,31>
.1U_0402_16V7K
2
10K_0402_1%
VCHLIM need over 95mV 4.2V 1.882V 2
2
PACIN
4.35V 3.2935V
1
Vin Detector
1
ACPRN 2 PR249
PQ214
14.3K_0402_1% High 18.089V
DTC115EUA_SC70-3 Low 17.44V
2
4 4
3

Size
Document Number Rev
B
401981
A B C D
5 4 3 2 1
2VREF_51125
1U_0603_10V6K
D D
1
PC47
2
PR77 PR78
13K_0402_1% 30K_0402_1%
1 2 1 2
PR79 PR80
B++
20K_0402_1% 19.1K_0402_1%
PL20 1 2 1 2 B++
HCB4532KF-800T90_1812
ENTRIP2
ENTRIP1
B+ 2 1 +3VLP
PR81 PR82
2200P_0402_50V7K
150K_0402_1% 150K_0402_1%
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
1 2 1 2
1
1
1
PC61
1
PC48
PC49
PC121
4.7U_0805_10V6K
2
1
2
PU6
5
6
7
8
PC50
ENTRIP2
REF
FB2
FB1
ENTRIP1
TONSEL
8
7
6
5
1
C PQ22 C
PQ21 25 P PAD
AO4466L_SO8
2
AO4466L_SO8
POK <18,36>
7 VO2 VO1 24 4
4
8 23 PC52
PR83 VREG3 PGOOD PR84 .1U_0402_16V7K
1 2 BST_3V11 2 BST_3V 9 22 BST_5V 1 2BST_5V1
1 2
3
2
1
BOOT2 BOOT1 0_0603_5%
2.2_0603_1%
1
2
3
PL4 PC51 UG_3V 10 21 UG_5V PL5

4.7UH_SIL1045R-4R7PF_6.3A_30% .1U_0402_16V7K UGATE2 UGATE1 4.7UH_SIL1045R-4R7PF_6.3A_30% +5VALWP
1 2 LX_3V 11 20 LX_5V 1 2
+3VALWP PHASE2 PHASE1
1
8
7
6
5
5
6
7
8
1
4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR85
PR86
PQ23
Ipeak=5A
SKIPSEL
PQ24
VREG5
Imax=3.5A
330U_6.3V_M
330U_6.3V_M
1 AO4712L_SO8
GND
AO4712L_SO8 1
S IC UP6182CQAG VQFN 24P PWM
VIN
NC
EN
F=305kHZ
2
2
+ +
PC53
PC54
4 4
PR87
Total capacitor
13
14
15
16
17
18
1
1
680P_0603_50V8J
680P_0603_50V8J
499K_0402_1%
2 2
PC55
PC56
330u B+ 1 2
2
1
2
3
3
2
1
2
ESR=15m ohm
1
1
100K_0402_5%
1U_0402_6.3V6K
VL
PC57
PR88
2
PC58
4.7U_0805_10V6K
B B
2
Ipeak=5A
2
ENTRIP1 ENTRIP2 B++ Imax=3.5A
F=245kHZ
0.1U_0603_25V7K
Total capacitor
2
PC59
330u
6
D D 2VREF_51125
PQ25A 2 5 PQ25B ESR=15m ohm
G G
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
S S
1
VL 2 1
1
PR90
100K_0402_1% PQ27
<36> VS_ON DTC115EUA_SC70-3
VS 1 2 2
42.2K_0402_1%
2.2U_0603_10V6K
PR91
SSM3K7002FU_SC70-3
1
100K_0402_1%
1
D
PR92
PC60
A A
PQ9
<37> ACPRN 1 2 2
G
2
1
PR105 S
3
200K_0402_1%
<31,33> EC_ON 2
PQ31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3
B
DTC115EUA_SC70-3
401981
5 4 3 2 1
A B C D
TPCA8030-H_SOP-ADV8-5
1 PL801 1
HCB2012KF-121T50_0805
1.05VS_51117_B+ 1 2
B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
10U_1206_25V6M
1
1
5
1
PC801
PC803
PC802
PQ801
PC62
PR801
PC122
255K_0402_1%
2
2
2
1 2
4
PR802
0_0402_5%
<31> VTTP_EN 1 2
3
2
1
1
PR803 PC805 PL802
15
14
1
@ PC804 PU800 2.2_0603_1% 0.1U_0603_25V7K 1.0UH_PCMC104T-1R0MN_20A_20%
.1U_0402_16V7K BST_1.05VS_VCCP
1 2 BST_1.05VS_VCCP1
1 2 1 2 +VTTP
EN_SKIP
TP
BST
2
DH_1.05VS_VCCP
MDU2653RH_POWERDFN56-8-5
2 TON DH 13
1
5
3 12 LX_1.05VS_VCCP PR804
OUT LX
PQ802
PR805 4.7_1206_5%
4 VCC ILIM 11 1 2 +5VALW
1
0_0402_5%
5 VFB=0.75V 10 13.7K_0402_1% 1 2
FB VDD +
PR806
4 PC807
1
PR807
680P_0603_50V7K
6 9 PC806 390U_2.5V_M
PGOOD DL
AGND
PGND
100_0603_1%
PC808
4.7U_0805_10V6K
1 2 DL_1.05VS_VCCP 2
2
+5VALW 2
1
3
2
1
G5603RU1U_TQFN14_3P5X3P5
1
8
PC809 <5,34> VTTPWROK
4.7U_0603_6.3V6K
2
<5> VTTPWROK_CPU
PR812 PR811
2.43K_0402_1% 3.4K_0402_1%
2 1 2 1 1 2
+5VS
PR814
PR808 4.53K_0402_1% PR809
4.02K_0402_1% 10_0402_5%
1 2 2 1
VTT_SENSE <8>
1
PR810
10K_0402_1%
2
PR813
3 10_0402_5% 3
2 1
<8> VSS_SENSE_VTT
PJ20
+VTTP 2 1 +1.05VS
2 1
@ JUMP_43X79
(7.0A,280mils ,Via NO.=14)
4 4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401981 B
A B C D
5 4 3 2 1
PL21
HCB2012KF-121T50_0805
1.5V_B+ 2 1 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
1
1
PC91
PC92
PC123
D D
5
6
7
8
2
PQ34
PR127
255K_0402_1% 4
1 2
PR128
0_0402_5%
1 2 BST_1.5V 1 2BST_1.5V1 AO4466L_SO8
<31> SYSON
3
2
1
PR129
1
2.2_0603_1% PC94 PL10
15
14
1
@PC93
@ PC93 PU10 0.1U_0603_25V7K 1.8UH_SIL104R-1R8PF_9.5A_30%
.1U_0402_16V7K 1 2 1 2
EN_SKIP
TP
BST
+1.5VP
4.7_1206_5%
2 13 DH_1.5V
TON DH
1
Ipeak=9A
PR130
330U_6.3V_M
PR131 3 12 LX_1.5V 1
OUT LX
5
6
7
8
100_0603_1%
+
Imax=6.3A
PC95
+5VALW 1 2 4 11 1 2 +5VALW PQ35
VCC ILIM PR132 F=313kHZ
2
5 10 18K_0402_1%
FB VDD 2 Total capacitor
1
680P_0603_50V8J
6 PGOOD DL 9 DL_1.5V 4 1110u
AGND
PGND
PC97
PC96
4.7U_0603_6.3V6K ESR=5m ohm
2
2
1
C C
G5603RU1U_TQFN14_3P5X3P5 PC98 AO4712L_SO8
3
2
1
4.7U_0805_10V6K
2
PR133
10K_0402_1%
1 2
10K_0402_1%
1
PR134
B B
A A
Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401981 B
5 4 3 2 1
A B C D
+1.5V
1
PJ23
1
@ JUMP_43X79
1 1
2 2
PU11
1 VIN VCNTL 6 +5VALW
4.7U_0805_6.3V6K
2 GND NC 5
1
3 VREF NC 7
1
1K_0402_1%
PC100
PR135
@ PR136 4 8 PC99
2
0_0402_5% VOUT NC 1U_0603_10V6K
2
1 2 9
<9,34> SUSP
2
TP
UP7711U8_PSOP8
0.1U_0402_10V7K
PR137
+0.75VSP
1
D
1K_0402_1%
0_0402_5%
SSM3K7002FU_SC70-3
PQ36
PR138
PC102
1 2 2
<34> 0.75VR_EN# G
1
S
3
1
PC103
2
@ PC101 10U_0805_6.3V6M
2
.1U_0402_16V7K
2
2 2
+3VALW +5VALW
1
PJ181
@ JUMP_43X39
1
1
2
1U_0603_10V6K
PC181
2
2
1
PC182
2
3 3
4.7U_0805_25V6-K
PU180
6 VCNTL
5 VIN VOUT 3 +1.8VSP
PR181 9 4
<27,31,34> SUSP# VIN VOUT
1
0_0402_5% 0.01U_0402_25V7K
1
PC183
1 2 8 EN
22U_0805_6.3V6M
7 2 PR182
GND
POK FB
1
3K_0402_1%
2
1
PC184
@ PC187
2
APL5930KAI-TRG_SO8
1
2
0.47U_0402_6.3V6K
2
PR184
2.4K_0402_1%
2
4 4

B
401981
A B C D
8 7 6 5 4 3 2 1
CPU_VID0 2 1 PR142 1K_0402_1% CPU_VID0 2 1 @ PR143 1K_0402_1% +CPU_B+

PL11
CPU_VID1 2 1 PR144 1K_0402_1% CPU_VID1 2 1 @ PR145 1K_0402_1% HCB4532KF-800T90_1812
1 2 B+
CPU_VID2 2 1 PR146 1K_0402_1% CPU_VID2 2 1 @ PR147 1K_0402_1%
2200P_0402_50V7K
CPU_VID3 CPU_VID3
470P_0603_50V8J
1@ PR148 1K_0402_1% PR149 1K_0402_1%
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2 2 1
68U_25V_M_R0.36
68U_25V_M_R0.36
68U_25V_M_R0.36
H <8> CPU_VID0 1 1 1 H
CPU_VID4 2 1@ PR151 1K_0402_1% CPU_VID4 2 1 PR152 1K_0402_1%
1
+ + +
PC112
PC120
PC116
PC113
PC114
PC111
PC185
@ PC115
<8> CPU_VID1
PC110
CPU_VID5 2 1 PR154 1K_0402_1% CPU_VID5 2 1 @ PR155 1K_0402_1%
<8> CPU_VID2
2
5
CPU_VID6 CPU_VID6 2 2 2
1@ PR157 1K_0402_1% PR158 1K_0402_1%
2 2 1
<8> CPU_VID3
H_DPRSLPVR 2 1 PR160 1K_0402_1% H_DPRSLPVR 2 1 @ PR161 1K_0402_1%
PQ37
<8> CPU_VID4
H_PSI# 2 1 PR163 1K_0402_1%
<8> CPU_VID5 4
+VTT
<8> CPU_VID6
PC117
3
2
1
PR166 2.2_0603_1% 0.22U_0603_25V7K
PR167 0_0402_5% BOOT2 1 2 BOOT2_2 1 2
<31> VR_ON 1 2 PL12
UGATE2
G PR168 0_0402_5% 0.36UH_FDU1040J-H-R36M=P3_33A_20% G
1 2 PHASE2 4 1 +CPU_CORE
<8> H_DPRSLPVR
3 2 V2N
<13> CLK_ENABLE#
10K_0402_5%
PR169
4.7_1206_5%
1
1
3.65K_0805_1%
+3VS PR172 PR171
PR170
PR173
PQ38
1.91K_0402_1% 1_0402_5%
1 2 CLK_ENABLE# @ PR175
LGATE2 4 0_0402_5%
2
2
1 2 V1N
PR174
1.91K_0402_1%
PR177 VSUM+
3
2
1
680P_0603_50V8J
0_0402_5%
<18,31> VGATE
1
PC118
1 2 VSUM-
2
@ PR178 1K_0402_1%
F
1 2 ISEN2 F
+VTT
PR179 0_0402_5%
<8> H_PSI# 1 2
PR180
1 2 ISL62883CHRZ-T_QFN40_5X5~D
147K_0402_1%
PC119 +5VALW
1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31
PU13 1 2
CLK_EN#
DPRSLPVR
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VR_ON
2
30 PR183
BOOT2
UGATE2 29 0_0402_5%
1 PGOOD PHASE2 28
2 27
1
PSI# VSSP2
3 RBIAS LGATE2 26
4 VR_TT# VCCP 25
E 5 NTC PWM3 24 E
6 VW LGATE1 23
7 COMP VSSP1 22
8 FB PHASE1 21
9 ISEN3
UGATE1
1 2 10 PR186 0_0402_5%
BOOT1
ISUM+
ISEN2
ISEN1
ISUM-
VSEN
249K_0402_1%
1000P_0402_50V7K
IMON
8.06K_0402_1%
1U_0603_10V6K
1 2
VDD
RTN
VIN
PC126 41 AGND
1
1
PC127
PC128
22P_0402_50V8J
PR189
PR188
11
12
13
14
15
16
17
18
19
20
PR194
2
562_0402_1% PC130
@ 1 2 1 2
2
390P_0402_50V7K
PR196 PR195 0_0402_5%
2.43K_0402_1% 1 2
1 2
PC131
1 2
PR198 0_0402_5%
<8> IMVP_IMON Arrandale -- 2 phase 1H1L
D 10P_0402_50V8J 1 2 +CPU_B+ D
0.22U_0603_25V7K
1 2 1 2
PR201 1_0402_5%
PC132 PR199 1 2 +5VALW +CPU_B+
150P_0402_50V8J 412K_0402_1% ISEN2 1 2
1
1
PC133
PC134
PC135
1U_0603_10V6K
0.22U_0603_25V7K
PR202 0_0402_5%
PC137 0.22U_0402_6.3V6K
PC138 0.22U_0402_6.3V6K
ISEN1 1 2 PR204
2
470P_0603_50V8J
8.87K_0402_1%
BOOT1
5
PR203 0_0402_5%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
Layout Note:
2
PH3 place near
1
1
PC139
VSSSENSE
PC140
PC141
PC142
Phase1 L-MOS
PQ43
2
2
VSUM+ UGATE1 4
+CPU_CORE 1 2
PC143
1
@ PR205 10_0402_5% PR207 2.2_0603_1% 0.22U_0603_25V7K

0.047U_0402_16V7K
C C
3
2
1
1
VSUM-
2.61K_0402_1%
2 BOOT1_1
0.22U_0603_10V7K
1 1 2
PR208
PL14
@ PR206
0.36UH_FDU1040J-H-R36M=P3_33A_20%
1
1
PC144
PC145
1 2 82.5_0402_1%
<8> VCCSENSE
2
PHASE1 4 1 +CPU_CORE
2
PR209 0_0402_5%
2
2
1
3 2 V1N
1
PC146
330P_0402_50V7K
10K_0402_1%_ERTJ0EG103FA
2
1
4.7_1206_5%
10K_0402_5%
3.65K_0805_1%
@ PC147
2
1
PR210
0.01U_0402_25V7K PR213
PQ44
1_0402_5%
PR212
330P_0402_50V7K
LGATE1 4
1
2
11K_0402_1%
PR211
@ PR216
2
1
PH4
PC149
PR215
PC148 0_0402_5%
2
1000P_0402_50V7K 1 2 1 2 V2N
PR217 0_0402_5%
2
3
2
1
680P_0603_50V8J
1 2 PR214 VSUM-
<8> VSSSENSE
2
B B
PC150
1.2K_0402_1%
2
@ PR219 10_0402_5%
1 2 1 2 1 2 VSUM-
@ PC186 @ PR220 VSUM+ ISEN1
Layout Note:
1200P_0402_50V7K 100_0402_1%
Place near Phase1 Choke
.1U_0402_16V7K
1
PC151
2
A A
C B
401981
8 7 6 5 4 3 2 1
A B C D E F G H
1 1
<9>
<9>
<9>
<9>
<9>
<9>
<9>
GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6
<9>
GFXVR_EN
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
+5VALW
+GFX_B+ PL15
HCB4532KF-800T90_1812
2
+1.05VS
PR221
PR222
PR223
PR224
PR225
PR226
PR227
PR231
2 1 B+
1
PR228
@ PR229 10_0603_1%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
300K_0402_5%
1
PC168
PC152
PC153
GFX_EN
2
2
<9> GFXVR_IMON GFXVR_IMON
GFX_VCC
5
+3VS PC154
1
1U_0805_25V6K
0.056U_0402_16V7K
32
31
30
29
28
27
26
25
2
1
PR232
PQ46
PC155
6.98K_0402_1%
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
1
2
24 PR234 PC157 4
2
PR233 VCC 0_0603_5% 0.22U_0603_25V7K

1 PWRGD
10K_0402_1%
BST 23 GFX_BOOST 1 2GFX_BOOST-1
1 2
1
GFXVR_IMON 2
2
PC156 IMON GFX_DRVH PL16

22
3
2
1
1000P_0402_50V7K DRVH 0.36UH_PCMC104T-R36MN1R105_30A_20%
2 3 2
2
VSS_AXG_SENSE CLKEN# GFX_SW

21 1 2
4
SW +GFX_COREP
FBRTN ADP3211AMNR2G_QFN32_5X5
PVCC 20 +5VALW
1
1 2 GFX_FB 5 FB PU15 GFX_DRVL
PC158 PC160 1 GFX_COMP 6 DRVL 19 2 1
PR235
1 Ipeak=22A
COMP
220P_0402_50V7K 47P_0402_50V8J 18 PC159 4.7_1206_5% + PC161 Imax=15.4A
PQ47
GFX_VCC 7 PGND 2.2U_0603_10V6K 390U_2.5V_M
F=350kHZ
2
12
GPU
1 2 1 2GFX_COMP-1
1 2 AGND 17 4
GFX_ILIM 8 PC163 2
Total capacitor
CSCOMP
PR236 PC162 PR237 ILIM 680P_0603_50V8J
33
CSREF
2
AGND
RAMP
LLINE
720u
CSFB
1K_0402_1% 470P_0402_50V8J 20K_0402_1%
IREF
RPM
RT
3
2
1
ESR=3.75m ohm
10
11
12
13
14
15
16
2
PR238
10.7K_0402_1%
GFX_IREF
GFX_RAMP
GFX_CSCOMP
GFX_CSFB
GFX_CSCOMP
GFX_RT
2 GFX_RPM
PH5
GFX_CSCOMP 1
220K_0402_5%_ERTJ0EV224J~D
80.6K_0402_1%
1 2
237K_0402_1%
340K_0402_1%
2
2
PR239
Avoid high dV/dt

PR240
PR241
Place RTH1 close to inductor

PR242
71.5K_0402_1% on the same layer
1
422K_0402_1%
2 1
1
1
2
PR245
1
PR243 PR244
1
0_0402_5% 0_0402_5% PC165
560P_0402_50V7K PR246
2
PC164 165K_0402_1%
1
2
1000P_0402_50V7K
2
PR248 2 1
1K_0402_1%
3 3
+GFX_B+ 2 1 GFX_RAMP-1 PR247
40.2K_0603_1%
<9>
<9>
VSS_AXG_SENSE
VCC_AXG_SENSE
Connect to input caps

1
PC166 PC167
1000P_0402_50V7K 1000P_0402_50V7K
2
Shortest the
Switchable -- mount
net trace Non Swithchable--non mount @
4 4

B
401981
A B C D E F G H
NO DATE PAGE MODIFICATION LIST PURPOSE
--------------------------------------------------------------------------------------------------------------------------------
2010/07/13 42 Change PL12,PL14 to SH00000IN00 BOM modify
2010/07/13 43 Change PL16 to SH00000IN00 BOM modify
2010/07/23 36 Change PC19 to SE070104Z80 BOM modify
2010/07/26 36 Add PD6,PD7 EMI request
2010/07/26 37 Add PC73,PC74,PC75(10U_1206) EMI request
2010/07/26 38 Add PC121(2200P_0402),PC61(10U_1206) EMI request
2010/07/26 39 Add PC122(2200P_0402),PC62(10U_1206) EMI request
2010/07/26 40 Add PC123(2200P_0402) EMI request
2010/07/28 35 Change PD1 to SC11N414880 BOM modify
2010/07/28 36 Change PD6,PD7 to SCA00000R00 BOM modify
2010/07/28 37 Change PQ16 to SB000009610 BOM modify
2010/07/28 38 Change PQ32 to SB000009610,PC53,PC54 to SF000002000 BOM modify
2010/07/28 39 Change PQ802 to SB00000NT00 BOM modify
2010/07/28 40 BOM modify
Change PC95 to SF000002000
2010/07/28 42 Change PQ38,PQ44 to SB00000NT00 BOM modify
2010/07/28 43 Change PQ47 to SB00000NT00 BOM modify
2010/08/10 36 Change PR31 to SD034232280,PR34 to SD034107280 Thermal request
2010/08/10 37 Add PR65(4.7 ohm),PC43(680PF) EMI request
2010/08/10 38 Add PR85,PR86(4.7ohm),PC55,PC56(680PF), EMI request
Change PR83 to 2.2 ohm
2010/08/10 39 Add PR804(4.7ohm),PC808(680PF), Change PR803 to 2.2 ohm EMI request
2010/08/10 40 Add PR130(4.7ohm),PC97(680PF), Change PR129 to 2.2 ohm EMI request
2010/08/10 43 Add PR235(4.7ohm),PC163(680PF) EMI request
2010/08/12 35 Add PR8 Circuit modify
2010/08/25 35 Remove PR2,PR3,PR4,PR5,PR6,PR7,PR8,PD1,PD4,PQ2,PQ3,PQ30 Pre-charge issue
Change PR1 to 0_1206_5%
2010/08/25 37 Change PQ8 to SI4483(SB00000MW00) Circuit modify

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401981 B
5 4 3 2 1
PIR (Product Improve Record)
PWWAA LA-6842P SCHEMATIC CHANGE LIST

REVISION CHANGE: 0.1 TO 0.2
--------------------------------------------------------------------------------------------------------------------------------------------------------
D 7/22 33 change D22, D25 to 5mA LED, R397,R399 form 120 to Change to 5mA LED D
510ohm,PU power plane form +3VALW to +5VALW.
7/22 32 change U22 P/N form SA00003GM10 to SA00003GK00.

(Change back on 7/27 due to SA00003GK00 is
EOL.)
7/22 9 add PJ32 to connect +1.5V_CPU and +1.5VS. For cost down plan
7/22 27 D24 change from BT@ to @
7/23 28 Change UL3 P/N to SP050003N00 For EMI request

7/23 30 Change LEXMIC and JLINE symbol For ME request
7/26 29 Add RA41 and reserve CA30 For EMI request

7/26 31 Change ACIN_D PU form +3VALW to +3VL. Design change
7/27 30 Change JLINE and JEXMIC footprint For ME request
7/28 31 unstuff Y4, C449,C450 Design change

C 7/28 31 unstuff C456 For Ctrl+Alt+Del reboot fail issue C
PWWAA LA-6842P SCHEMATIC CHANGE LIST

REVISION CHANGE: 0.2 TO 1.0
--------------------------------------------------------------------------------------------------------------------------------------------------------
8/03 33 Add R403 Change to 5mA LED
8/03 33 unstuff SW2, SW3 For MP use
8/12 30 change componment from unmount to mount --> CA9, CA10, For EMI request
CA11 and CA19
8/12 16 Add R277 For RTC reserve charge issue
8/13 34 Add C125 and C126 For EMI request

8/13 28 change CL37 and CL38 from mount to unmount For EMI request
B B
8/13 28 Add D69 For ESD request
8/16 34 Add C481, C482, C483, C484 and C485 For EMI request
8/16 33 change JTOUCH footprint to SP010015G00 (S 161021-06021) For ME request
8/16 28 change UL3 LAN tranfromer P/N to SP050006E00(MHPC For EMI request
NS681610)
8/16 28 Add CL39 For EMI request
8/23 29 change CA63 BOM structure to always mount For +PVDD1 and +PVDD2 ripple noise
8/23 29 exchange RA18 and CA48 P/N for +AVDD ripple noise For +AVDD ripple noise
a. change RA18 P/N from SD013000080 (0_0603_5%) to
SE025104K80 (0.1U_0603_50V7K)
b. change CA48 P/N from SE025104K80 (0.1U_0603_50V7K)

to SD013000080 (0_0603_5%)
8/16 16 change U13 P/N to SA00003K800 (WINBOND) For SPI ROM EOL
A A

Custom B
401981
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Compal La-6842p r1.0 Schematics

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Compal La-6842p r1.0 Schematics

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A B C D E

LA-6842P REV 1.0 Schematic

2010-08-04 Rev 1.0

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal Confidential Fan Control Clock Generator

File Name : LA-6842P

rPGA-988 Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2

page 5,6,7,8,9,10 1.5V DDRIII 800/1066 MT/s

2IN1 RTS5137 Int. Camera

RJ45 RTL8105E-GR 10/100M PCIe 1x SATA port 4 SATA ODD

HD Audio 3.3V/1.5V 24MHz

Power/B conn. RTC CKT. HDA Codec

DC/DC Interface CKT.

Security Classification Compal Secret Data Compal Electronics, Inc.

DESIGN CURRENT 0.1A +3VL

N-CHANNEL DESIGN CURRENT 4A +5VS

Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW

DESIGN CURRENT 48A +CPU_CORE

DESIGN CURRENT 15A +GFX_CORE

Ipeak=18A, Imax=12.6A, Iocp min=19.8 DESIGN CURRENT 18A +VTT

Ipeak=7A, Imax=4.9A, Iocp min=7.7 DESIGN CURRENT 7A +1.05VS

N-CHANNEL DESIGN CURRENT 2A +1.5V_CPU

N-CHANNEL DESIGN CURRENT 2A +1.5VS

DESIGN CURRENT 1.5A +0.75VS

Security Classification Compal Secret Data Compal Electronics, Inc.

( O MEANS ON X MEANS OFF )

Function Camera & Mic

description Camera & Mic

S5 S4/AC description S3 Power Saving

PCH SM Bus Address

Power Device HEX Address

Full ON HIGH HIGH HIGH

S3 (Suspend to RAM) LOW HIGH HIGH

S4 (Suspend to Disk) LOW LOW HIGH

S5 (Soft OFF) LOW LOW LOW

Security Classification Compal Secret Data Compal Electronics, Inc.

JTAG & BPM

R28 @ AJ22 XDP_BPM#0 Add on 10/28

VTTPWROK_CPU AM15 BPM#[3]

JTAG MAPPING R20 0_0402_5%

<34,39> VTTPWROK IN1 10

XDP_BPM#3 R375 1 2 0_0402_5% XDP_BPM#3_R CLK_CPU_XDP# 13

Security Classification Compal Secret Data Compal Electronics, Inc.

PCI EXPRESS -- GRAPHICS

Remove Cap, for EMI

Security Classification Compal Secret Data Compal Electronics, Inc.

<11> DDR_A_D[0..63] <12> DDR_B_D[0..63]

SA_CK[0] AA6 DDRA_CLK0 <11> SB_CK[0] W8 DDRB_CLK0 <12>

DDR_A_D35 SA_DQ[34] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D36 SB_DQ[35] SB_DQS#[1] DDR_B_DQS#2

DDR SYSTEM MEMORY - B

Security Classification Compal Secret Data Compal Electronics, Inc.

Material Note (+VTT):

AC27 AB10 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M

R28 VCC88 VCC_SENSE AJ34 1 VCCSENSE <42> Check list:

Security Classification Compal Secret Data Compal Electronics, Inc.

1 1 J26 H21 C145

E25 VTT1_58 VCCPLL2 L27

Security Classification Compal Secret Data Compal Electronics, Inc.

JCPUI JCPUH JCPUE

AT20 VSS1 VSS81 AE34 RSVD32 AJ13

E21 VSS198 AL20 VSS40 VSS120 W6 AJ29 CFG[15] RSVD_TP_59 E15

VSS208 VSS_NCTF5 H_NCTF6 VSS50 VSS130

IC,AUB_CFD_rPGA,R0P9 IC,AUB_CFD_rPGA,R0P9 device is connected to the Embedded