5 4 3 2 1

Benetton_EDU(ZHNB) SHB ULT SYSTEM BLOCK DIAGRAM 01

Memory Down Dual Channel DDR3L
Channel A 1Rx16 1600 MHZ SMBUS
D D

IMC Haswell ULT 15W

P14 eDP
eDP EDP Conn.
MCP 1168pins
Channel B 1Rx16 USB2-2
CCD(Camera) PWR GATED
DC+GT3
P15
40 mm X 24 mm P16
SATA0
NGFF SATA SATA
P20 PWR GATED DDI1
DDI HDMI Conn. P18

USB3-1 USB3 Port

USB2-1 MB side
PWR GATED P10
Daughter Board
USB3.0/2.0 PWR GATED
USB2-6 USB2-0 LTE
C
I/O Board Conn. Mini Card C
Integrated PCH
P21
USB2.0
Cardreader PCIECLOCK-0 SIM card
GL823 CLK

PCI-E x1 PCIE-1
USB2-4
LGA
USB2 Port USB2-3 Wireless-AC 7260

Vinafix.com
DB side
PWR GATED X'TAL PWR GATED
32.768KHz P19
P28

X'TAL 24MHz
ALS
ISL29023
P28
I2C1
I2C
TOUCH
B
SCREEN B

Google Debug conn I2C0

P28
TRACKPAD
Azalia P2~P13 PWR GATED
IHDA P25
SPI
LPC SPI ROM
W25Q64FVSSIG P8

BQ24707A TPS51216
Batery Charger P29 PP1350 P30

TPS51225 TPS54318
Int. MIC ALC283 TI TM4E1G31H6ZRBI SLB9655TT1.2 FW4.32 PP3300_DSW/PP5000 P34 PP1500_PCH_TS P33
AMIC
AUDIO CODEC EC TPM P22
P23 P23 PWR GATED P26 TPS51622 Thermal Protection
+VCCIN P32 Discharger P33

A
X'TAL TPS51211 A

32.768KHz PP1050_PCH_SUS
P31

Thermal IC Quanta Computer Inc.

Combo HP Speaker P28
Fan Driver HALL
K/B Con. (PWM Type) SENSOR P27
P25 P25
PROJECT : ZHNB
Size Document Number Rev
A
Block Diagram
Date: Thursday, December 04, 2014 Sheet 1 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT (DISPLAY,eDP)

U24A HSW_ULT_DDR3L
02

eDP Panel
C54 C45 EDP_TXN0
[18] INT_HDMITX2N DDI1_TXN0 EDP_TXN0 EDP_TXN0 [16]
D [18] INT_HDMITX2P C55 B46 EDP_TXP0 EDP_TXP0 [16] D
B58 DDI1_TXP0 EDP_TXP0 A47
HDMI

[18] INT_HDMITX1N DDI1_TXN1 EDP_TXN1

[18] INT_HDMITX1P C58 B47
B55 DDI1_TXP1 EDP_TXP1
[18] INT_HDMITX0N DDI1_TXN2
A55 C47
[18] INT_HDMITX0P DDI1_TXP2 EDP_TXN2
[18] INT_HDMICLK- A57 C46
B57 DDI1_TXN3 EDP_TXP2 A49
[18] INT_HDMICLK+ DDI1_TXP3 EDP_TXN3
DDI EDP B49
C51 EDP_TXP3
C50 DDI2_TXN0 A45 EDP_AUXN
DDI2_TXP0 EDP_AUXN EDP_AUXN [16]
C53 B45 EDP_AUXP
DP

DDI2_TXN1 EDP_AUXP EDP_AUXP [16]

B54
C49 DDI2_TXP1 D20 EDP_RCOMP R25 24.9/F_4
DDI2_TXN2 EDP_RCOMP +VCCIOA_OUT
B50 A43 DP_UTIL R343 *0_4 PCH_BL_PWM
A53 DDI2_TXP2 EDP_DISP_UTIL
B53 DDI2_TXN3
DDI2_TXP3
eDP_RCOMP
R356 *0_4
Trace length < 100 mils
Trace width = 20 mils
1 OF 19 DP_UTIL [16] Trace spacing = 25 mils

C C

HSW_ULT_DDR3L
U24I

[16,26] PCH_BL_PWM PCH_BL_PWM B8 B9 HDMI_DDCCLK_SW [18]

PCH_BL_EN A9 EDP_BKLCTL DDPB_CTRLCLK C9
[16,26] PCH_BL_EN EDP_BKLEN DDPB_CTRLDATA HDMI_DDCDATA_SW [18] PP3300_PCH
PCH_EDP_VDD_EN C6 eDP SIDEBAND D9

Vinafix.com
[16,26] PCH_EDP_VDD_EN EDP_VDDEN DDPC_CTRLCLK D11
DDPC_CTRLDATA
PCH_GPIO77 R30 10K_4
PCH_GPIO77 U6 +3V PCH_GPIO78 R391 10K_4
PCH_GPIO78 P4 PIRQA/GPIO77 C5 PCH_GPIO79 R27 10K_4
PIRQB/GPIO78 +3V DDPB_AUXN
PCH_GPIO79 N4 +3V B6 PCH_GPIO80 R383 10K_4
PCH_GPIO80 N2 PIRQC/GPIO79 DISPLAY DDPC_AUXN B5 SIM_DET R376 10K_4
PIRQD/GPIO80 +3V DDPB_AUXP
PCI_PME# AD4 +3V_S5 A6 TOUCH_INT_L_DX R378 10K_4
TP97 PME PCIE DDPC_AUXP ALS_INT_L R24 10K_4
U7 +3V TRACKPAD_INT_DX R385 10K_4
SIM_DET L1 GPIO55
[21] SIM_DET GPIO52 +3V
TOUCH_INT_L_DX L3 +3V C8 INT_HDMI_HPD [18]
[16] TOUCH_INT_L_DX GPIO54 DDPB_HPD
ALS_INT_L R5 +3V A8
[28] ALS_INT_L GPIO51 DDPC_HPD
TRACKPAD_INT_DX L4 +3V D6
[25] TRACKPAD_INT_DX GPIO53 EDP_HPD EDP_HPD [16]
B B

R342

9 OF 19 100K_4 DDPB/C_CTRLDATA has an iPD 20K,

When PU at rising edge of
Haswell C-1 2c BGA 1.6GHz ULV 15W 2+2 i5-4200U QS for proto/AJ0QEVEVT01 PCH_PWROK, the DDI port will
be detected

A A

Quanta Computer Inc.

PROJECT :ZHNB
Size Document Number Rev
A
Haswell 1/5 (DDI/eDP)
Date: Thursday, December 04, 2014 Sheet 2 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT
U24C HSW_ULT_DDR3L
(DDR3L)
U24D
Haswell Processor (DDR3L)
HSW_ULT_DDR3L
03
[14] M_A_DQ<0> AH63 AU37 M_A_DIM0_CK_DDR0_DN [14]
AH62 SA_DQ0 SA_CLK#0 AV37 AY31 AM38
[14] M_A_DQ<1> SA_DQ1 SA_CLK0 M_A_DIM0_CK_DDR0_DP [14] [15] M_B_DQ<0> SB_DQ0 SB_CK#0 M_B_DIM0_CK_DDR0_DN [15]
[14] M_A_DQ<2> AK63 AW36 [15] M_B_DQ<1> AW31 AN38 M_B_DIM0_CK_DDR0_DP [15]
AK62 SA_DQ2 SA_CLK#1 AY36 AY29 SB_DQ1 SB_CK0 AK38
[14] M_A_DQ<3> SA_DQ3 SA_CLK1 [15] M_B_DQ<2> SB_DQ2 SB_CK#1
[14] M_A_DQ<4> AH61 [15] M_B_DQ<3> AW29 AL38
AH60 SA_DQ4 AU43 AV31 SB_DQ3 SB_CK1
D
[14] M_A_DQ<5> SA_DQ5 SA_CKE0 M_A_DIM0_CKE0 [14] [15] M_B_DQ<4> SB_DQ4 D
[14] M_A_DQ<6> AK61 AW43 [15] M_B_DQ<5> AU31 AY49 M_B_DIM0_CKE0 [15]
SA_DQ6 SA_CKE1 TP127 SB_DQ5 SB_CKE0
[14] M_A_DQ<7> AK60 AY42 [15] M_B_DQ<6> AV29 AU50
SA_DQ7 SA_CKE2 TP128 SB_DQ6 SB_CKE1 TP130
[14] M_A_DQ<8> AM63 AY43 [15] M_B_DQ<7> AU29 AW49
SA_DQ8 SA_CKE3 TP129 SB_DQ7 SB_CKE2 TP131
[14] M_A_DQ<9> AM62 [15] M_B_DQ<8> AY27 AV50
SA_DQ9 SB_DQ8 SB_CKE3 TP132
[14] M_A_DQ<10> AP63 AP33 M_A_DIM0_CS0_N [14] [15] M_B_DQ<9> AW27
AP62 SA_DQ10 SA_CS#0 AR32 AY25 SB_DQ9 AM32
[14] M_A_DQ<11> SA_DQ11 SA_CS#1 TP41 [15] M_B_DQ<10> SB_DQ10 SB_CS#0 M_B_DIM0_CS0_N [15]
[14] M_A_DQ<12> AM61 [15] M_B_DQ<11> AW25 AK32
SA_DQ12 SB_DQ11 SB_CS#1 TP35
[14] M_A_DQ<13> AM60 AP32 [15] M_B_DQ<12> AV27
SA_DQ13 SA_ODT0 TP40 SB_DQ12
[14] M_A_DQ<14> AP61 [15] M_B_DQ<13> AU27 AL32
SA_DQ14 SB_DQ13 SB_ODT0 TP31
[14] M_A_DQ<15> AP60 AY34 M_A_RAS_N [14] [15] M_B_DQ<14> AV25
AP58 SA_DQ15 SA_RAS AW34 AU25 SB_DQ14 AM35
[14] M_A_DQ<16> SA_DQ16 SA_WE M_A_WE_N [14] [15] M_B_DQ<15> SB_DQ15 SB_RAS M_B_RAS_N [15]
[14] M_A_DQ<17> AR58 AU34 M_A_CAS_N [14] [15] M_B_DQ<16> AM29 AK35 M_B_WE_N [15]
AM57 SA_DQ17 SA_CAS AK29 SB_DQ16 SB_WE AM33
[14] M_A_DQ<18> SA_DQ18 [15] M_B_DQ<17> SB_DQ17 SB_CAS M_B_CAS_N [15]
[14] M_A_DQ<19> AK57 AU35 M_A_BS0 [14] [15] M_B_DQ<18> AL28
AL58 SA_DQ19 SA_BA0 AV35 AK28 SB_DQ18 AL35
[14] M_A_DQ<20> SA_DQ20 SA_BA1 M_A_BS1 [14] [15] M_B_DQ<19> SB_DQ19 SB_BA0 M_B_BS0 [15]
[14] M_A_DQ<21> AK58 AY41 M_A_BS2 [14] [15] M_B_DQ<20> AR29 AM36 M_B_BS1 [15]
AR57 SA_DQ21 SA_BA2 AN29 SB_DQ20 SB_BA1 AU49
[14] M_A_DQ<22> SA_DQ22 [15] M_B_DQ<21> SB_DQ21 SB_BA2 M_B_BS2 [15]
[14] M_A_DQ<23> AN57 AU36 M_A_A<0> [14] [15] M_B_DQ<22> AR28
AP55 SA_DQ23 SA_MA0 AY37 AP28 SB_DQ22 AP40
[14] M_A_DQ<24> SA_DQ24 SA_MA1 M_A_A<1> [14] [15] M_B_DQ<23> SB_DQ23 SB_MA0 M_B_A<0> [15]
[14] M_A_DQ<25> AR55 AR38 M_A_A<2> [14] [15] M_B_DQ<24> AN26 AR40 M_B_A<1> [15]
AM54 SA_DQ25 SA_MA2 AP36 AR26 SB_DQ24 SB_MA1 AP42
[14] M_A_DQ<26> SA_DQ26 SA_MA3 M_A_A<3> [14] [15] M_B_DQ<25> SB_DQ25 SB_MA2 M_B_A<2> [15]
[14] M_A_DQ<27> AK54 AU39 M_A_A<4> [14] [15] M_B_DQ<26> AR25 AR42 M_B_A<3> [15]
AL55 SA_DQ27 SA_MA4 AR36 AP25 SB_DQ26 SB_MA3 AR45
[14] M_A_DQ<28> SA_DQ28 SA_MA5 M_A_A<5> [14] [15] M_B_DQ<27> SB_DQ27 SB_MA4 M_B_A<4> [15]
[14] M_A_DQ<29> AK55 AV40 M_A_A<6> [14] [15] M_B_DQ<28> AK26 AP45 M_B_A<5> [15]
AR54 SA_DQ29 SA_MA6 AW39 AM26 SB_DQ28 SB_MA5 AW46
[14] M_A_DQ<30> SA_DQ30 SA_MA7 M_A_A<7> [14] [15] M_B_DQ<29> SB_DQ29 SB_MA6 M_B_A<6> [15]
[14] M_A_DQ<31> AN54 DDR CHANNEL A AY39 M_A_A<8> [14] [15] M_B_DQ<30> AK25 AY46 M_B_A<7> [15]
AY58 SA_DQ31 SA_MA8 AU40 AL25 SB_DQ30 SB_MA7 AY47
[14] M_A_DQ<32> SA_DQ32 SA_MA9 M_A_A<9> [14] [15] M_B_DQ<31> SB_DQ31 SB_MA8 M_B_A<8> [15]
[14] M_A_DQ<33> AW58 AP35 M_A_A<10> [14] [15] M_B_DQ<32> AY23 DDR CHANNEL B AU46 M_B_A<9> [15]
AY56 SA_DQ33 SA_MA10 AW41 AW23 SB_DQ32 SB_MA9 AK36
[14] M_A_DQ<34> SA_DQ34 SA_MA11 M_A_A<11> [14] [15] M_B_DQ<33> SB_DQ33 SB_MA10 M_B_A<10> [15]
[14] M_A_DQ<35> AW56 AU41 M_A_A<12> [14] [15] M_B_DQ<34> AY21 AV47 M_B_A<11> [15]
AV58 SA_DQ35 SA_MA12 AR35 AW21 SB_DQ34 SB_MA11 AU47
[14] M_A_DQ<36> SA_DQ36 SA_MA13 M_A_A<13> [14] [15] M_B_DQ<35> SB_DQ35 SB_MA12 M_B_A<12> [15]
[14] M_A_DQ<37> AU58 AV42 M_A_A<14> [14] [15] M_B_DQ<36> AV23 AK33 M_B_A<13> [15]
C AV56 SA_DQ37 SA_MA14 AU42 AU23 SB_DQ36 SB_MA13 AR46 C
[14] M_A_DQ<38> SA_DQ38 SA_MA15 M_A_A<15> [14] [15] M_B_DQ<37> SB_DQ37 SB_MA14 M_B_A<14> [15]
[14] M_A_DQ<39> AU56 [15] M_B_DQ<38> AV21 AP46 M_B_A<15> [15]
AY54 SA_DQ39 AJ61 AU21 SB_DQ38 SB_MA15
[14] M_A_DQ<40> SA_DQ40 SA_DQSN0 M_A_DQS_DN<0> [14] [15] M_B_DQ<39> SB_DQ39
[14] M_A_DQ<41> AW54 AN62 M_A_DQS_DN<1> [14] [15] M_B_DQ<40> AY19 AW30 M_B_DQS_DN<0> [15]
AY52 SA_DQ41 SA_DQSN1 AM58 AW19 SB_DQ40 SB_DQSN0 AV26
[14] M_A_DQ<42> SA_DQ42 SA_DQSN2 M_A_DQS_DN<2> [14] [15] M_B_DQ<41> SB_DQ41 SB_DQSN1 M_B_DQS_DN<1> [15]
[14] M_A_DQ<43> AW52 AM55 M_A_DQS_DN<3> [14] [15] M_B_DQ<42> AY17 AN28 M_B_DQS_DN<2> [15]
AV54 SA_DQ43 SA_DQSN3 AV57 AW17 SB_DQ42 SB_DQSN2 AN25
[14] M_A_DQ<44> SA_DQ44 SA_DQSN4 M_A_DQS_DN<4> [14] [15] M_B_DQ<43> SB_DQ43 SB_DQSN3 M_B_DQS_DN<3> [15]
[14] M_A_DQ<45> AU54 AV53 M_A_DQS_DN<5> [14] [15] M_B_DQ<44> AV19 AW22 M_B_DQS_DN<4> [15]
AV52 SA_DQ45 SA_DQSN5 AL43 AU19 SB_DQ44 SB_DQSN4 AV18
[14] M_A_DQ<46> SA_DQ46 SA_DQSN6 M_A_DQS_DN<6> [14] [15] M_B_DQ<45> SB_DQ45 SB_DQSN5 M_B_DQS_DN<5> [15]
[14] M_A_DQ<47> AU52 AL48 M_A_DQS_DN<7> [14] [15] M_B_DQ<46> AV17 AN21 M_B_DQS_DN<6> [15]
AK40 SA_DQ47 SA_DQSN7 AU17 SB_DQ46 SB_DQSN6 AN18
[14] M_A_DQ<48> SA_DQ48 [15] M_B_DQ<47> SB_DQ47 SB_DQSN7 M_B_DQS_DN<7> [15]
[14] M_A_DQ<49> AK42 AJ62 M_A_DQS_DP<0> [14] [15] M_B_DQ<48> AR21
AM43 SA_DQ49 SA_DQSP0 AN61 AR22 SB_DQ48 AV30
[14] M_A_DQ<50> SA_DQ50 SA_DQSP1 M_A_DQS_DP<1> [14] [15] M_B_DQ<49> SB_DQ49 SB_DQSP0 M_B_DQS_DP<0> [15]
[14] M_A_DQ<51> AM45 AN58 M_A_DQS_DP<2> [14] [15] M_B_DQ<50> AL21 AW26 M_B_DQS_DP<1> [15]
AK45 SA_DQ51 SA_DQSP2 AN55 AM22 SB_DQ50 SB_DQSP1 AM28
[14] M_A_DQ<52> SA_DQ52 SA_DQSP3 M_A_DQS_DP<3> [14] [15] M_B_DQ<51> SB_DQ51 SB_DQSP2 M_B_DQS_DP<2> [15]

Vinafix.com
[14] M_A_DQ<53> AK43 AW57 M_A_DQS_DP<4> [14] [15] M_B_DQ<52> AN22 AM25 M_B_DQS_DP<3> [15]
AM40 SA_DQ53 SA_DQSP4 AW53 AP21 SB_DQ52 SB_DQSP3 AV22
[14] M_A_DQ<54> SA_DQ54 SA_DQSP5 M_A_DQS_DP<5> [14] [15] M_B_DQ<53> SB_DQ53 SB_DQSP4 M_B_DQS_DP<4> [15]
[14] M_A_DQ<55> AM42 AL42 M_A_DQS_DP<6> [14] [15] M_B_DQ<54> AK21 AW18 M_B_DQS_DP<5> [15]
AM46 SA_DQ55 SA_DQSP6 AL49 AK22 SB_DQ54 SB_DQSP5 AM21
[14] M_A_DQ<56> SA_DQ56 SA_DQSP7 M_A_DQS_DP<7> [14] [15] M_B_DQ<55> SB_DQ55 SB_DQSP6 M_B_DQS_DP<6> [15]
[14] M_A_DQ<57> AK46 [15] M_B_DQ<56> AN20 AM18 M_B_DQS_DP<7> [15]
AM49 SA_DQ57 AP49 AR20 SB_DQ56 SB_DQSP7
[14] M_A_DQ<58> SA_DQ58 SM_VREF_CA +VREF_CA_CPU [15] M_B_DQ<57> SB_DQ57
[14] M_A_DQ<59> AK49 AR51 +VREFDQ_SA_M3 [15] M_B_DQ<58> AK18
AM48 SA_DQ59 SM_VREF_DQ0 AP51 AL18 SB_DQ58
[14] M_A_DQ<60> SA_DQ60 SM_VREF_DQ1 +VREFDQ_SB_M3 [15] M_B_DQ<59> SB_DQ59
[14] M_A_DQ<61> AK48 [15] M_B_DQ<60> AK20
AM51 SA_DQ61 AM20 SB_DQ60
[14] M_A_DQ<62> SA_DQ62 [15] M_B_DQ<61> SB_DQ61
[14] M_A_DQ<63> AK51 [15] M_B_DQ<62> AR18
SA_DQ63 AP18 SB_DQ62
[15] M_B_DQ<63> SB_DQ63

B B

3 OF 19 4 OF 19

A A

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
Haswell 2/5 (DDR3 I/F)
Date: Thursday, December 04, 2014 Sheet 3 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT (SIDEBAND)

04
H_PECI (50ohm)
D D
Route on microstrip only
Spacing >18 mils
Trace Length: 0.4~6.125 iches

H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches HSW_ULT_DDR3L
U24B

CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches PROC_DETECT D61
TP71 PROC_DETECT
CATERR# K61 MISC
TP80 CATERR
[26] H_PECI H_PECI N62 J62 XDP_PRDY# XDP_PRDY# [13]
PECI PRDY K62 XDP_PREQ#
PREQ XDP_PREQ# [13]
E60 XDP_TCK0 TCK,TMS
PROC_TCK XDP_TCK0 [8,13]
E61 XDP_TMS_CPU Trace Length < 9000mils
H_PROCHOT# R380 56_4 H_PROCHOT#_R K63 JTAG PROC_TMS E59 XDP_TRST# XDP_TMS_CPU [13]
[17,26,29,32] H_PROCHOT# PROCHOT PROC_TRST XDP_TRST# [8,13]
THERMAL F63 XDP_TDI_CPU
PROC_TDI F62 XDP_TDO_CPU XDP_TDI_CPU [8,13]
PROC_TDO XDP_TDO_CPU [8,13]

[26] CPU_PGOOD R360 *Short_4 H_PWRGOOD_R C61

PROCPWRGD PWR
C J60 XDP_BPM#0 C
BPM#0 XDP_BPM#0 [13]
H60 XDP_BPM#1
BPM#1 XDP_BPM#1 [13]
SM_RCOMP[0:2] H61 XDP_BPM#2 BPM#[0:7]
BPM#2 TP73
Trace length < 500 mils H62 XDP_BPM#3 Trace Length 1~6 inches
BPM#3 TP75
SM_RCOMP_0 AU60 K59 XDP_BPM#4
Trace width = 12~15 mils SM_RCOMP_1 AV60 SM_RCOMP0 DDR3L BPM#4 H63 XDP_BPM#5
TP76 Length match < 300 mils
Trace spacing = 20 mils SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60 XDP_BPM#6
TP74
SM_RCOMP2 BPM#6 TP10
CPU_DRAMRST# AV15 DSW J61 XDP_BPM#7
SM_DRAMRST BPM#7 TP9
DDR_PG_CTRL AV61
TP108 SM_PG_CNTL1

Vinafix.com
2 OF 19

DRAM COMP XDP PU/PD

+1.05V_VCCST
R90 200/F_4 SM_RCOMP_0
XDP_TDO_CPU R29 *51_4

B R91 120/F_4 SM_RCOMP_1 B

XDP_TCK0 R433 51_4
XDP_TRST# R462 *51_4
R92 100/F_4 SM_RCOMP_2

PU/PD of CPU DRAMRST

PP1350
+1.05V_VCCST
1

H_PROCHOT# R386 62_4

R130
470_4

CPU DRAM
2

A CPU_DRAMRST# R140 *Short_4 A

DDR3_DRAMRST# [14,15]
1

H_PWRGOOD_R R359 10K_4 C285

*0.1u/10V_4
Quanta Computer Inc.
2

PROJECT : ZHNB
Size Document Number Rev
A
Haswell 3/5 (SideBand)
Date: Thursday, December 04, 2014 Sheet 4 of 39
5 4 3 2 1
 5 4 3 2 1

PP1350
VDDQ Output Decoupling Recommendations
330uFx2
22uFx11
7343
0805
BOT socket side
5 onTOP, 6 on BOT inside socket cavity
Haswell ULT (POWER) 05
10uFx10 0805 5 onTOP, 5 on BOT inside socket cavity

HSW_ULT_DDR3L
U24L
D D
+1.35V_CPU 1.4A +VCCIN 32A
TP5 ULT_RVSD_61 L59 C36 +VCCIN
ULT_RVSD_62 J58 RSVD VCC C40
TP8 RSVD VCC C44
AH26 VCC C48 C35 C266 C244 C62 C248
C388 C91 C281 C92 C90 AJ31 VDDQ VCC C52 *22u/6.3V_8 *22u/6.3V_8 47u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8
2.2u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AJ33 VDDQ VCC C56
AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29
AY35 VDDQ VCC E31
C385 C384 C386 C387 C283 C282 AY40 VDDQ VCC E33 C49 C262 C260 C41 C46 C42
22u/6.3V_8 10u/6.3V_6 10u/6.3V_6 2.2u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AY44 VDDQ VCC E35 47u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8
AY50 VDDQ VCC E37
VDDQ VCC E39
F59 VCC E41
+VCCIN VCC VCC
TP17 ULT_RVSD_63 N58 E43
R367 100/F_4 ULT_RVSD_64 AC58 RSVD VCC E45
+VCCIN TP29 RSVD VCC E47
R368 *Short_4 VCC_SENSE_R E63 VCC E49 C246 C21 C267 C23 C20 C25
[32] VCC_SENSE VCC_SENSE VCC
TP30 ULT_RVSD_65 AB23 E51 *22u/6.3V_8 47u/6.3V_8 *22u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
+VCCIO_OUT A59 RSVD VCC E53
300mA TP69 VCCIO_OUT VCC
300mA +VCCIOA_OUT E20 E55
ULT_RVSD_66 AD23 VCCIOA_OUT VCC E57
TP36 RSVD VCC
TP24 ULT_RVSD_67 AA23 F24
C RSVD VCC C
TP42 ULT_RVSD_68 AE59 F28
R358 *10K_4 RSVD VCC F32
+1.05V_VCCST VCC
H_CPU_SVIDART# L62 F36 C44 C27 C26 C24 C43 C45
VRON_CPU R357 10K_4 VCORE_PGOOD H_CPU_SVIDCLK N63 VIDALERT HSW ULT POWER VCC F40 *22u/6.3V_8 47u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8
H_CPU_SVIDDAT L63 VIDSCLK VCC F44
VCCST_PWRGD B59 VIDSOUT VCC F48
[13] VCCST_PWRGD VCCST_PWRGD VCC
VRON_CPU F60 F52
[32] VRON_CPU VR_EN VCC
[10,32] VCORE_PGOOD VCORE_PGOOD C59 F56
VR_READY VCC G23
D63 VCC G25
[13] PWR_DEBUG VSS VCC

Vinafix.com
+1.05V_VCCST R26 150_6 PWR_DEBUG H59 G27 C22 C247 C245
P62 PWR_DEBUG VCC G29 *22u/6.3V_8 47u/6.3V_8 *22u/6.3V_8
ULT_RVSD_69 P60 VSS VCC G31
TP12 RSVD_TP VCC
TP13 ULT_RVSD_70 P61 G33
ULT_RVSD_71 N59 RSVD_TP VCC G35
TP11 RSVD_TP VCC
TP81 ULT_RVSD_72 N61 G37
ULT_RVSD_73 T59 RSVD_TP VCC G39
TP22 RSVD VCC
PP1050_PCH +1.05V_VCCST ULT_RVSD_74 AD60 G41
TP34 RSVD VCC
TP33 ULT_RVSD_75 AD59 G43 VCC Output Decoupling Recommendations
R59 *SHORT_8 ULT_RVSD_76 AA59 RSVD VCC G45
TP25 RSVD VCC
TP39 ULT_RVSD_77 AE60 G47 470uFx4 7343 TOP socket side
ULT_RVSD_78 AC59 RSVD VCC G49
TP32 RSVD VCC
C68 TP43 ULT_RVSD_79 AG58 G51 22uFx8 0805 4 on TOP, 4 on BOT near socket edge
*4.7u/6.3V_6 ULT_RVSD_80 U59 RSVD VCC G53
TP15 RSVD VCC
TP26 ULT_RVSD_81 V59 G55 22uFx11 0805 TOP, inside socket cavity
RSVD VCC G57
B B
AC22 VCC H23
VCCST VCC 10uFx11 0805 BOT, inside socket cavity
AE22 J23
AE23 VCCST VCC K23
+1.05V_VCCST VCCST VCC K57
AB57 VCC L22
AD57 VCC VCC M23
AG57 VCC VCC M57
C24 VCC VCC P57
C28 VCC VCC U57
C32 VCC VCC W57
+VCCIN VCC VCC
12 OF 19

SVID +1.05V_VCCST VCCST PWRGD

Layout note: need routing together PP3300_DSW
U20
R379 and ALERT need between CLK and DATA. +1.05V_VCCST
130/F_4 5 1
VCC NC
H_CPU_SVIDDAT R381 *Short_4 VR_SVID_DATA [32] C1 R306 *0_4 PP1050_PGOOD [26,31] G Path
R336 0.1u/10V_4 2 VCCST_PWRGD_EN R307 *Short_4 PCH_PWROK [7,26]
A +1.05V_VCCST 10K_4 A R305 *0_4 A
Place PU resistor SYS_PWROK [7,13,26]
close to CPU
VCCST_PWRGD R312 VCCST_PWRGD_R 4 3
*Short_4 Y GND
Place PU resistor
close to CPU R387
75_4
C233
*0.1u/10V_4
74AUP1G07GW Quanta Computer Inc.
H_CPU_SVIDART# R389 43_4 VR_SVID_ALERT# [32]
PROJECT : ZHNB
Size Document Number Rev
H_CPU_SVIDCLK R388 *Short_4 A
VR_SVID_CLK [32] Haswell 4/5 (POWER)
Date: Thursday, December 04, 2014 Sheet 5 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT (CFG,RSVD)

U24S HSW_ULT_DDR3L
06
D CFG0 AC60 AV63 D
[13] CFG0 CFG0 RSVD_TP
CFG1 AC62 AU63
[13] CFG1 CFG1 RSVD_TP
CFG2 AC63
[13] CFG2 CFG2
[13] CFG3 CFG3 AA63
CFG4 AA60 CFG3 C63
[8,13] CFG4 CFG4 RSVD_TP
[13] CFG5 CFG5 Y62 C62
CFG6 Y61 CFG5 RSVD_TP B43
[13] CFG6 CFG6 RSVD
CFG7 Y60
[13] CFG7 CFG7
[13] CFG8 CFG8 V62 A51
CFG9 V61 CFG8 RSVD_TP B51
[13] CFG9 CFG9 RSVD_TP
[13] CFG10 CFG10 V60
CFG11 U60 CFG10 L60
[13] CFG11 CFG11 RSVD_TP
CFG12 T63
[13] CFG12 CFG12 RESERVED
[13] CFG13 CFG13 T62 N60
CFG14 T61 CFG13 RSVD
[13] CFG14 CFG14
[13] CFG15 CFG15 T60 W23
CFG15 RSVD Y22
NOA_STBN_0 AA62 RSVD AY15 OPI_COMP1 R461 49.9/F_4
[13] NOA_STBN_0 CFG16 PROC_OPI_RCOMP
NOA_STBN_1 U63
[13] NOA_STBN_1 AA61 CFG18 AV62
NOA_STBP_0
[13] NOA_STBP_0 CFG17 RSVD
NOA_STBP_1 U62 D58
[13] NOA_STBP_1 CFG19 RSVD
R57 49.9/F_4 CFG_RCOMP V63 P22
CFG_RCOMP VSS N21
C VSS C
A5
RSVD P20
E1 RSVD R20
D1 RSVD RSVD
J20 RSVD
H18 RSVD
R352 8.2K_4 TD_IREF B12 RSVD
TD_IREF
19 OF 19

Processor Strapping
1 0
CFG0
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
(DEFAULT) NORMAL OPERATION; NO STALL Vinafix.com
STALL CFG0 R417 *1K_4

CFG1 CFG1
(DEFAULT) NORMAL OPERATION PCH-LESS MODE R423 *1K_4
PCH/ PCH LESS MODE SELECTION
B B

CFG3 DISABLED ENABLED CFG3 R409 *1K_4

PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) NO PHYSICAL DISPLAY PORT ATTACHED AN EXTERNAL DISPLAY PORT DEVICE IS
TO CONNECTED
EMBEDDED DISPLAY PORT TO THE EMBEDDED DISPLAY PORT

CFG 8 DISABLED(DEFAULT); IN THIS CASE, NOA ENABLED; NOA WILL BE AVAILABLE

ALLOW THE USE OF NOA ON LOCKED UNITS WILL BE DISABLED IN LOCKED UNITS AND REGARDLESS OF THE LOCKING OF THE UNIT CFG8 R403 *1K_4
ENABLED IN UN-LOCKED UNITS

CFG9 NO VR SUPPORTING SVID IS PRESENT. THE CFG9

VRS SUPPORTING SVID PROTOCOL ARE R394 *1K_4
NO SVID PROTOCOL CAPABLE VR CHIP WILL NOT GENERATE (OR RESPOND TO)
CONNECTED PRESENT SVID ACTIVITY

A A
CFG10 POWER FEATURES ACTIVATED POWER FEATURES (ESPECIALLY CLOCK
CFG10 R56 *1K_4
SAFE MODE BOOT DURING RESET GATINE ARE NOT ACTIVATED
Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
Haswell 5/5 (CFG/GND)
Date: Thursday, December 04, 2014 Sheet 6 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT PCH (PM)

D
[26]
[13,17]
PCH_SUSACK_L
SYS_RESET#
C265
R428 *0_4 SUSACK#_R

*1u/6.3V_4
SYS_RESET#
AK2
AC3
U24H

SUSACK
HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

DSWVRMEN
AW7 DSWVREN
AV5 DPWROK_R R477
Deep Sx
*Short_4
07
DSWVREN
PCH_DPWROK
[8]
[26]
D

SYS_PWROK R421 *Short_4 SYS_PWROK_R AG2 SYS_RESET DPWROK AJ5 PCIE_PCH_WAKE# R74 *Short_4
[5,13,26] SYS_PWROK SYS_PWROK DSW WAKE PCH_WAKE_L [26]
PCH_PWROK_R AY7
PCH_PWROK R482 *Short_4 APWROK_R AB5 PCH_PWROK
PCI_PLTRST# AG7 APWROK V5 CLKRUN# R38 *Short_4 LPC_CLKRUN_L
PLTRST +3V_S5 +3V CLKRUN/GPIO32 AG4 PCH_SUS_STAT
LPC_CLKRUN_L [26]
+3V_S5 SUS_STAT/GPIO61 TP27
+3V_S5 AE6 PCH_SUSCLK
SUSCLK/GPIO62 PCH_SUSCLK [19]
DSW AP5 PCH_SLP_S5_L PCH_SLP_S5_L [13,26,30,35]
R478 *Short_4 PCH_RSMRST# AW6 SLP_S5/GPIO63
[26] PCH_RSMRST_L RSMRST
R453 *0_4 PCH_SUSPWRACK AV4 +3V_S5
[26] PCH_SUSWARN_L AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6
[26] PCH_PWRBTN_L R147 *Short_4 PCH_PWRBTN# DSW DSW PCH_SLP_S4_L PCH_SLP_S4_L [13]
R61 *Short_4 PCH_ACPRESENT AJ8 PWRBTN SLP_S4 AT4 PCH_SLP_S3_L
[29] ACPRESENT ACPRESENT/GPIO31 DSW DSW SLP_S3 PCH_SLP_S3_L [13,26,30,31,33,35]
PCH_BATLOW# AN4 DSW DSW AL5 PCH_SLP_A_L PCH_SLP_A_L [13]
R415 *Short_4 PCH_SLP_S0#_R AF3 BATLOW/GPIO72 SLP_A AP4 PCH_SLP_SUS_L
[13,26] PCH_SLP_S0_L SLP_S0 +3V_S5 DSW SLP_SUS PCH_SLP_SUS_L [26,35]
AM5 DSW DSW AJ7 PCH_SLP_LAN#
TP37 SLP_WLAN/GPIO29 SLP_LAN TP38

C C

PCH_SUSPWRACK R427 0_4 SUSACK#_R 8 OF 19

4/22 modify, default skip EC control

PCH PWROK
PCH PM PU/PD
[5,26] PCH_PWROK PCH_PWROK R483 *Short_4 PCH_PWROK_R
PP3300_PCH

Vinafix.com
R487
CLKRUN# R37 8.2K_4 PCH_RSMRST_LR474 *0_4 DPWROK_R
SYS_RESET# R406 10K_4 100K_4
B Non Deep Sx B

PCH_RSMRST# R479 10K_4

SYS_PWROK R80 *10K_4
DPWROK_R R473 100K/F_4 PLTRST# Buffer PCI_PLTRST# R152 *Short_4 PLTRST#

PP3300_PCH

5 C94 *0.1u/10V_4

PP3300_PCH_SUS
2
PCH_SUSPWRACK R454 10K_4 4
PLTRST# [13,19,21,22,26]
SYS_PWROK R426 *1K_4 PCI_PLTRST# 1

U6
3

*TC7SH08FU R155
A
PP3300_DSW 100K_4 Quanta Computer Inc. A

PCH_ACPRESENT R62 10K_4

PCH_BATLOW# R444 8.2K_4 PROJECT :ZHNB
PCIE_PCH_WAKE# R75 10K_4 4/22 modify, default is bypass PLTRST# Size Document Number Rev
PCH_PWRBTN# R151 *10K_4 A
PCH 1/6 (PM)
Date: Thursday, December 04, 2014 Sheet 7 of 39
5 4 3 2 1
 5 4 3 2 1

RTC Clock 32.768KHz (RTC)

08
C278 15p/50V_4 RTC_X1
Haswell ULT PCH (RTC/HDA/SATA/SPI)

2
1
Y3 R460 U24E HSW_ULT_DDR3L
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
32.768KHZ 10M_4

3
4
C286 15p/50V_4 RTC_X2 RTC_X1 AW5
RTC_X2 AY5 RTCX1
R475 1M_4 SM_INTRUDER# AU6 RTCX2 J5
+3V_RTC INTRUDER SATA_RN0/PERN6_L3 SATA_RXN0_SSD [20]
PCH_INTVRMEN AV7 H5
INTVRMEN SATA_RP0/PERP6_L3 SATA_RXP0_SSD [20] HSW_ULT_DDR3L
R157 *0_4 PCH_SRTCRST_R AV6 RTC B15 U24G
[26] PCH_SRTCRST SRTCRST SATA_TN0/PETN6_L3 SATA_TXN0_SSD [20]
+3V_RTC R156 *0_4 PCH_RTCRST_R AU7 A15
D [13,26] PCH_RTCRST RTCRST SATA_TP0/PETP6_L3 SATA_TXP0_SSD [20]
AU14 +3V_S5 SMBALERT/GPIO11 AN2 SMBALERT# LVDS Bridge D
RTC Circuitry (RTC) +3V_RTC Trace width = 30 mils J8
iSSD
[22,26]
[22,26]
LPC_LAD0
LPC_LAD1 AW12 LAD0
+3V_S5 AP2 SMB_PCH_CLK
SATA_RN1/PERN6_L2 LAD1 SMBCLK SMB_PCH_CLK [13]
R160 RTCRST_L and SRTCRST_L H8 AY12 LPC +3V_S5 AH1 SMB_PCH_DAT
SATA_RP1/PERP6_L2 [22,26] LPC_LAD2 LAD2 SMBDATA SMB_PCH_DAT [13]
R168 *SHORT_6 PCH_RTCRST_R A17 AW11 SMBUS
+3V_S5SML0ALERT/GPIO60 AL2 SMB0ALERT#
PP3300_RTC please take out layout SATA_TN1/PETN6_L2 B17
[22,26] LPC_LAD3
AV12 LAD3 AN1 SMB_ME0_CLK
SATA_TP1/PETP6_L2 [22,26] LPC_LFRAME# LFRAME +3V_S5 SML0CLK
20K/F_4 +3V_S5 AK1 SMB_ME0_DAT
HDA_BCLK_R AW8 J6 SML0DATA AU4 SMB1ALERT#
HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 +3V_S5 SML1ALERT/PCHHOT/GPIO73
C98 HDA_SYNC_R AV11 H6 +3V_S5 AU3 SMB_ME1_CLK
1u/6.3V_4 HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14 SML1CLK/GPIO75 AH3 SMB_ME1_DAT
HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 +3V_S5 SML1DATA/GPIO74
+3V_RTC [23] PCH_AZ_CODEC_SDIN0
AY10 AUDIO SATA C15 PCH_SPI_CLK AA3
R159 AU12 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 PCH_SPI_CS0# Y7 SPI_CLK AF2 CL_CLK
Trace width = 20 mils PCH_SRTCRST_R HDA_SDO_R AU11 HDA_SDI1/I2S1_RXD F5 PCH_SPI_CS1# Y4 SPI_CS0 CL_CLK AD2 CL_DAT
TP95
HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 TP93 SPI_CS1 CL_DATA TP96
20MIL AW10 E5 AC2 SPI C-LINK AF4 CL_RST#
HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 SPI_CS2 CL_RST TP102
20K/F_4 AV10 C17 PCH_SPI_SI AA2
AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17 PCH_SPI_SO AA4 SPI_MOSI
C105 C97 I2S1_SCLK SATA_TP3/PETP6_L0 PCH_SPI_IO2 Y6 SPI_MISO
TP14 SPI_IO2
1u/6.3V_4 1u/6.3V_4 PCH_SPI_IO3 AF1
TP94 SPI_IO3
+3V V1 EC_SMI_L
SATA0GP/GPIO34 EC_SMI_L [26]
+3V U1 PCH_NMI_DBG_L
SATA1GP/GPIO35 PCH_NMI_DBG_L [26]
+3V V6 EC_SCI_L EC_SCI_L [26] 7 OF 19
SATA2GP/GPIO36 AC1 GPIO37
+3V SATA3GP/GPIO37
AU62
HDA
[23] PCH_AZ_CODEC_RST# R488 33_4 HDA_RST#_R
[4,13] XDP_TRST#
XDP_TCK0 R82 *0_4 XDP_TCK1 AE62 PCH_TRST A12 SATA_IREF R351 *Short_4 +V1.05S_ASATA3PLL
XDP_TDI AD61 PCH_TCK SATA_IREF L11
[13] XDP_TDI PCH_TDI RSVD
[23] PCH_AZ_CODEC_SDOUT R492 33_4 HDA_SDO_R [13] XDP_TDO R55 *Short_4 PCH_JTAG_TDOAE61 K10
AD62 PCH_TDO RSVD C12 SATA_RCOMP R350 3.01K/F_4 PP3300_PCH
[23] PCH_AZ_CODEC_BITCLK R490 33_4 HDA_BCLK_R
[13] XDP_TMS
AL11 PCH_TMS
JTAG
SATA_RCOMP U3 SATA_LED# R395 10K_4
+V1.05S_ASATA3PLL
PP3300_PCH
SMBus
AC4 RSVD SATALED
R429 *Short_4 PCH_JTAGX AE63 RSVD EC_SMI_L R401 10K_4 PP3300_PCH_SUS
[4,13] XDP_TCK0 JTAGX
C C302 [4,13] XDP_TDO_CPU R35 *0_4 AV2 SATA_RCOMP C
*10p/50V_4 RSVD
Impedance = 50 ohm R430 10K_4 SMB0ALERT#
Trace length < 500 mils EC_SCI_L R32 10K_4 R448 10K_4 SMB1ALERT#
Trace spacing = 15 mils R437 10K_4 SMBALERT#
[23] PCH_AZ_CODEC_SYNC R494 33_4 HDA_SYNC_R 5 OF 19 PCH_NMI_DBG_L R396 10K_4

C312 *10p/50V_4
GPIO37 R404 10K_4 R106 2.2K_4 SMB_PCH_CLK
R110 2.2K_4 SMB_PCH_DAT
R126 2.2K_4 SMB_ME0_CLK
R121 2.2K_4 SMB_ME0_DAT
PCH JTAG MP remove(Intel) R118 2.2K_4 SMB_ME1_CLK
JTAG_TCK,JTAG_TMS R113 2.2K_4 SMB_ME1_DAT
Trace Length < 9000mils PP1050_PCH_SUS PCH dual I/O SPI ROM W25Q64FVSSIG(SOIC) / AKE3EFP0N06----->8MB

XDP_TMS R418 *51_4 PP3300_PCH R408 *SHORT_6D23 RB500V-40 +3V_PCH_ME

XDP_TDI R78 *51_4
PCH_JTAG_TDO R73 51_4 PP3300_DSW R407 *0_6
PCH_JTAGX R420 *1K_4
near SPI ROM as possible
[13] XDP_TCK1 XDP_TCK1 R83 *51_4
[17] PCH_SPI_CS0#_R R414 *Short_4 R424 4.7K_4 +3V_PCH_ME
[17] PCH_SPI_CLK_R R451 *Short_4
[17] PCH_SPI_SI_R R459 *Short_4
[4,13] XDP_TDI_CPU R47 *0_4 PCH_JTAG_TDO [17] PCH_SPI_SO_R R411 *Short_4
+3V_PCH_ME
U25
PCH_SPI_CS0# R413 33_4 1 8
B
PCH_SPI_CLK R450 33_4 6 CE# VDD B

ULT Strapping Table Note: R493 need stuff on MP. PCH_SPI_SI

PCH_SPI_SO
R449
R412
33_4
33_4
5
2
SCK
SI 7 SPI_HOLD_ME R452 100K_4
SO HOLD#
Pin Name Strap description Sampled Configuration note SPI_WP_ME_ROM 3 4
C280 WP# VSS C275
0 = Default enable (iPD 20K)

Vinafix.com
GPIO81(SPKR) No reboot on TCO Timer PWROK PP3300_PCH R400 *1K_4 SPKR SPKR [10,23] *22p/50V_4 ROM-8M 0.1u/10V_4
expiration 1 =Disable No-Reboot mode
+3V_PCH_ME
0 = Default can program ME (iPD 20K) HDA_SDO_R R493 *0_4
HDA_SDO Flash Descriptor Security PWROK PCH_HDA_SDO [26]
Override / Intel ME Debug Mode 1 =can't program ME C80 0.1u/10V_4

5
Integrated 1.05V VRM enable ALWAYS R484 330K_4 PCH_INTVRMEN R485 *330K_4 2
INTVRMEN 1=Should be always pull-up +3V_RTC
4 SPI_WP_ME_ROM
SPI_WP_ME 1
0 = Default disable (iPD 20K) [10] GPIO66
U3 R410
GPIO66 Top-Block Swap override

3
1 = Enable TBS function PP3300_PCH R330 *1K_4 GPIO66 R340 *1K_4 TC7SH08FU
10K_4
0 = Default SPI (iPD 20K) [10] GPIO86
GPIO86 Boot BIOS Strap Bit R1 *1K_4 GPIO86 R7 *1K_4
1 =LPC PP3300_PCH

0 = Default enable w/o

confidentiality(iPD 20K)
[10] GPIO15
GPIO15 TLS(Transport layer security) near SPI ROM as possible
A 1 =Default enable with PP3300_PCH_SUS R50 *8.2K_4 GPIO15 R58 *1K_4 A
x86 stuff SPI_WP_ME R105 *Short_4
confidentiality GPIO_SPI_WP [17]
SPI_HOLD_ME R458 *Short_4 SPI_HOLD#_BIOS
To
[17]
debug header
0 = Enable an external display
CFG4 port is connected to the eDP CFG4 R64 1K_4
DP presence strap
1 =disable
[6,13] CFG4 2N7002K
1
Q1
3
Quanta Computer Inc.
PCH_SPI_WP_D [10] To PCH
[7] DSWVREN PCH_SPI_WP_D connect to GPIO58 at GRB PROJECT : ZHNB
DSWVREN Deep Sx well on die VR enable 1=Should be always pull-up Size Document Number Rev

2
R476 330K_4 DSWVREN R472 *330K_4 SPI_WP_ME A
+3V_RTC SPI_WP_ME From Screw/EC
[26,27] PCH 2/6 (RTC/HDA/SATA/SPI)
Date: Thursday, December 04, 2014 Sheet 8 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT PCH (PCIE,USB3.0,USB2.0)

U24K HSW_ULT_DDR3L
Haswell ULT PCH (CLOCK) XTAL24_IN C253 12p/50V_4
09

3
4
R345 Y2
F10 DSW AN8 USBP0- [21] 1M_4 24MHz
D E10 PERN5_L0 USB2N0 AM8 D
PERP5_L0 DSW USB2P0 USBP0+ [21] LTE

1
2
C23 DSW AR7 USBP1- [27]
C22 PETN5_L0 USB2N1 AT7 XTAL24_OUT
PETP5_L0 DSW USB2P1 USBP1+ [27] MB USB3.0_A C252 12p/50V_4
HSW_ULT_DDR3L
F8 DSW AR8 USBP2- [16] U24F
E8 PERN5_L1 USB2N2 AP8
PERP5_L1 DSW USB2P2 USBP2+ [16] CCD
B23 DSW AR10 USBP3- [19]
A23 PETN5_L1 USB2N3 AT10

NGFF WLAN
PETP5_L1 DSW USB2P3 USBP3+ [19] BT
[19] CLK_PCIE_WLANN C43 A25 XTAL24_IN
H10 AM15 C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT
PERN5_L2 DSW USB2N4 USBP4- [28] [19] CLK_PCIE_WLANP CLKOUT_PCIE_P0 XTAL24_OUT
G10 DSW AL15 USBP4+ [28] MB USB2.0 CLK_PCIE_REQ2# U2 +3V
PERP5_L2 USB2P4 PCIECLKRQ0/GPIO18 K21
B21 AM13 B41 RSVD M21
PETN5_L2 DSW USB2N5 USBP5- [21] [21] CLK_PCIE_NGFFN CLKOUT_PCIE_N1 RSVD
C21 DSW AN13 USBP5+ [21] SIM USB2.0 [21] CLK_PCIE_NGFFP A41 C26 ICLK_BIAS R353 3.01K/F_4 +V1.05S_AXCK_LCPLL
PETP5_L2 USB2P5 CLK_PCIE_REQ1# Y5 CLKOUT_PCIE_P1 DIFFCLK_BIASREF
PCIECLKRQ1/GPIO19 +3V
E6 DSW AP11 USBP6- [28] C35 TESTLOW_C35
F6 PERN5_L3 USB2N6 AN11 CLK_PCIE_N0 C41 CLOCK TESTLOW_C35 C34 TESTLOW_C34
PERP5_L3 DSW USB2P6 USBP6+ [28] CardReader TP64 CLKOUT_PCIE_N2 TESTLOW_C34
TP66 CLK_PCIE_P0 B42 AK8 TESTLOW_AK8
B22 AR13 CLK_PCIE_REQ0# AD1 CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 AL8 TESTLOW_AL8
PETN5_L3 DSW USB2N7 PCIECLKRQ2/GPIO20 +3V TESTLOW_AL8
A21 DSW AP13
C PETP5_L3 USB2P7 B38 AN15 CLK_PCH_PCI3 22_4 R141 C
CLKOUT_PCIE_N3 CLKOUT_LPC_0 PCLK_TPM [22]
TP2 PCIE_RXN1 G11 C37 AP15 CLK_PCH_PCI4 22_4 R131 CLK_PCI_EC [26]
PCIE_RXP1 F11 PERN3 G20 CLK_PCIE_REQ3# N1 CLKOUT_PCIE_P3 CLKOUT_LPC_1
TP1 PERP3 USB3RN1 USB3_RXN0 [27] PCIECLKRQ3/GPIO21 +3V
H20 USB3_RXP0 [27] B35 CLK_PCIE_XDPN CLK_PCIE_XDPN [13]
PCIE_TXN1 C29 USB3RP1 A39 CLKOUT_ITPXDP A35 CLK_PCIE_XDPP
TP4
PCIE_TXP1 B30 PETN3 PCIE USB C33
MB USB3.0_A B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P CLK_PCIE_XDPP [13]
TP3 PETP3 +3V_S5 USB3TN1 USB3_TXN0 [27] CLKOUT_PCIE_P4
+3V_S5 B34 USB3_TXP0 [27] CLK_PCIE_REQ4# U5 +3V
F13 USB3TP1 PCIECLKRQ4/GPIO22
G13 PERN4 E18 B37
PERP4 USB3RN2 F18 A37 CLKOUT_PCIE_N5
B29 USB3RP2 CLK_PCIE_REQ5# T2 CLKOUT_PCIE_P5
PETN4 PCIECLKRQ5/GPIO23 +3V
A29 +3V_S5 B33
PETP4 USB3TN2 A33
+3V_S5 USB3TP2
G17 6 OF 19
WLAN

[19] PCIE_RX3-_WLAN PERN1/USB3RN3

F17
[19] PCIE_RX3+_WLAN PERP1/USB3RP3
[19] PCIE_CLKREQ_WLAN# R398 *Short_4 CLK_PCIE_REQ2#
[19] PCIE_TX3-_WLAN C256 0.1u/16V_4 PCIE_TX3- C30 +3V_S5 [21] PCIE_CLKREQ_NGFF# R253 *Short_4 CLK_PCIE_REQ1#
C257 0.1u/16V_4 PCIE_TX3+ C31 PETN1/USB3TN3 AJ10 USBCOMP R135 22.6/F_4
[19] PCIE_TX3+_WLAN PETP1/USB3TP3 +3V_S5 USBRBIAS AJ11
F15 USBRBIAS AN10
NGFF

[21] PCIE_RX2-_NGFF PERN2/USB3RN4 RSVD USBCOMP

G15 AM10
[21] PCIE_RX2+_NGFF PERP2/USB3RP4 RSVD Impedance = 50 ohm
B C254 0.1u/16V_4 PCIE_TX2- B31 +3V_S5 Trace length < 500 mils PP3300_PCH B
[21] PCIE_TX2-_NGFF PETN2/USB3TN4
[21] PCIE_TX2+_NGFF C255 0.1u/16V_4 PCIE_TX2+ A31 +3V_S5 Trace spacing = 15 mils
PETP2/USB3TP4 AL3 USB_OC0# CLK_PCIE_REQ0# R416 10K_4 CLK_PCI_EC PCLK_TPM
+3V_S5 OC0/GPIO40 USB_OC0# [26] MB U3
+3V_S5 AT1 USB_OC1# CLK_PCIE_REQ1# R43 10K_4
OC1/GPIO41 AH2 USB_OC2# CLK_PCIE_REQ2# R397 10K_4
20141126 EOD parts, change PN. +3V_S5 OC2/GPIO42 USB_OC2# [26] MB U2
E15 +3V_S5 AV3 USB_OC3# CLK_PCIE_REQ3# R384 10K_4
E13 RSVD OC3/GPIO43 CLK_PCIE_REQ4# R31 10K_4 C86 C89
R354 3.01K/F_4 PCIE_RCOMP A27 RSVD CLK_PCIE_REQ5# R390 10K_4 *18p/50V_4 *18p/50V_4
R355 *Short_4 PCIE_IREF B27 PCIE_RCOMP
+V1.05S_AUSB3PLL PCIE_IREF
TESTLOW_C35 R299 10K_4

Vinafix.com
TESTLOW_C34 R298 10K_4
11 OF 19 TESTLOW_AK8 R136 10K_4
USB Overcurrent TESTLOW_AL8 R137 10K_4

PP3300_PCH_SUS
RP2
10 1
USB_OC0# 9 2
USB_OC1# 8 3
USB_OC2# 7 4
USB_OC3# 6 5
A A
10K_10P8R

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
PCH 3/6 (PCIE/USB/CLK)
Date: Thursday, December 04, 2014 Sheet 9 of 39
5 4 3 2 1
 5 4 3 2 1

PCH GPIO PU/PD

Haswell ULT PCH (GPIO,CPU/MISC,NCTF)
U24J HSW_ULT_DDR3L

4/23 modify, those

PP3300_PCH
10
3 power enable pin EC_RCIN_L R44 10K_4
are PD 100K IRQ_SERIRQ R36 10K_4
PCH_GPIO76 P1 +3V D60 THRMTRIP# already PCH_SSD_12_EN R399 *10K_4
D LTE_WAKE_L_Q AU2 BMBUSY/GPIO76 THRMTRIP V4 EC_RCIN_L PCH_SSD_18_EN R33 *10K_4 D
GPIO8 +3V_S5 +3V RCIN/GPIO82 EC_RCIN_L [26]
TRACKPAD_INT_L AM7 T4 IRQ_SERIRQ DEVSLP0 R382 10K_4

useless GPIO
[25] TRACKPAD_INT_L LAN_PHY_PWR_CTRL/GPIO12 DSW SERIRQ IRQ_SERIRQ [22,26]
AD6 CPU/ AW15 OPI_COMP2 R463 49.9/F_4
[8] GPIO15
PCH_SSD_12_EN Y1 GPIO15 +3V_S5 MISC PCH_OPI_RCOMP AF20 PCH_GPIO76 R393 10K_4
PCH_SSD_18_EN T3 GPIO16 +3V RSVD AB21 ODD_PRSNT# R440 10K_4
GPIO24 AD5 GPIO17 +3V RSVD TPM_LP_EN_L R402 10K_4
TP19
WK_GPIO27 AN5 GPIO24 +3V_S5 PP3300_SSD_IO_EN R405 *10K_4
GPIO28 AD7 GPIO27 DSW GPIO50 R392 10K_4
TP20
ODD_PRSNT# AN3 GPIO28 +3V_S5 GPIO70 R348 10K_4
GPIO26 +3V_S5 R6 GPIO83 GPIO38 R375 10K_4
LTE_DISABLE_L need PU to +3V_LTE +3V
GPIO56 AG6 GSPI0_CS/GPIO83 L6 GPIO84 GPIO39 R6 10K_4
TP28
PP3300_CCD_EN AP1 GPIO56 +3V_S5 +3V GSPI0_CLK/GPIO84 N6 GPIO85
PCH_SPI_WP_D AL4 GPIO57 +3V_S5 +3V GSPI0_MISO/GPIO85 L8 GPIO86 GPIO83 R28 *10K_4
[8] PCH_SPI_WP_D GPIO58 +3V_S5 +3V GSPI0_MOSI/GPIO86 GPIO86 [8] strapping
LTE_DISABLE_L AT5 R7 GPIO87 GPIO84 R8 *10K_4
[21] LTE_DISABLE_L
PP3300_SSD_EN AK4 GPIO59 +3V_S5 GPIO
+3V GSPI1_CS/GPIO87 L5 GPIO88 GPIO85 R5 *10K_4
GPIO44 +3V_S5 +3V

GSP
RAM_ID2 AB6 GSPI1_CLK/GPIO88 N7 GPIO89 GPIO87 R20 *10K_4
TPM_LP_EN_L U4 GPIO47 +3V_S5 +3V GSPI1_MISO/GPIO89 K2 GPIO90 GPIO88 R2 *10K_4
PP3300_SSD_IO_EN Y3 GPIO48 +3V +3V GSPI_MOSI/GPIO90 J1 GPIO91 GPIO89 R4 *10K_4
GPIO50 P3 GPIO49 +3V +3V UART0_RXD/GPIO91 K3 GPIO92 GPIO90 R377 *10K_4
MODPHY_EN Y2 GPIO50 +3V +3V UART0_TXD/GPIO92 J2 GPIO93 GPIO91 R364 *10K_4
[11] MODPHY_EN
RAM_ID0 AT3 HSIOPC/GPIO71 +3V +3V
SERIAL IO UART0_RTS/GPIO93 G1 GPIO94
4/23 modify, follow
GPIO92 R369 *10K_4
R88 *Short_4 GPIO14 AH4 GPIO13 +3V_S5 +3V UART0_CTS/GPIO94 K4 GPIO0
Intel suggestion to GPIO93 R365 *10K_4
[25] EC_IN_RW
TOUCH_INT_L AM4 GPIO14 +3V_S5 +3V UART1_RXD/GPIO0 G2 GPIO1 un-stuff for unused GPIO94 R363 *10K_4

UART
[16] TOUCH_INT_L
AG5 GPIO25 DSW +3V UART1_TXD/GPIO1 J3
[23] PP5000_CODEC_EN GPIO45 +3V_S5 +3V UART1_RST/GPIO2
GPIO2 GPIO GPIO0 R3 *10K_4
AG3 J4 GPIO3 GPIO1 R362 *10K_4
[19] WLAN_DISABLE_L GPIO46 +3V_S5 +3V UART1_CTS/GPIO3 F2 I2C0_SDA_GPIO4 GPIO2 R366 *10K_4
C +3V I2C0_SDA/GPIO4 I2C0_SDA_GPIO4 [25] C
RAM_ID1 AM3 +3V_S5 +3V F3 I2C0_SCL_GPIO5 I2C0_SCL_GPIO5 [25] TRACKPAD GPIO3 R370 *10K_4
WLAN_WAKE_L_Q AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA_GPIO6 GPIO64 R329 *10K_4
DEVSLP0 P2 GPIO10 +3V_S5 +3V I2C1_SDA/GPIO6 F1 I2C1_SCL_GPIO7
I2C1_SDA_GPIO6 [16,28]
GPIO65 R349 *10K_4
+3V +3V [16,28]TOUCHSCREEN / ALS

SDIO
[20] DEVSLP0 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 I2C1_SCL_GPIO7
GPIO70 C4 +3V +3V E3 GPIO64 GPIO67 R335 *10K_4
GPIO38 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 GPIO65 GPIO68 R341 *10K_4
6/24 Connect DEVSLP0 to SSD. DEVSLP1/GPIO38 +3V +3V SDIO_CMD/GPIO65
GPIO39 N5 +3V +3V D3 GPIO66 GPIO66 [8] strapping GPIO69 R339 *10K_4
V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4 GPIO67
[8,23] SPKR SPKR/GPIO81 +3V +3V SDIO_D1/GPIO67
+3V C3 GPIO68
SDIO_D2/GPIO68 E2 GPIO69 I2C0_SDA_GPIO4 R333 4.7K_4
+3V SDIO_D3/GPIO69 I2C0_SCL_GPIO5 R334 4.7K_4

I2C
10 OF 19 I2C1_SDA_GPIO6 R331 4.7K_4

Vinafix.com
I2C1_SCL_GPIO7 R332 4.7K_4

PP3300_PCH_SUS RAM ID
PP3300_PCH_SUS CPU thermal trip
R146 10K_4 LTE_WAKE_L_Q
R145 10K_4 WLAN_WAKE_L_Q R39 RID@10K_4 RAM_ID2 R45 *RID@10K_4 +1.05V_VCCST PP3300_DSW
R434 RID@10K_4 RAM_ID1 R435 *RID@10K_4
R446 RID@10K_4 RAM_ID0 R447 *RID@10K_4 R96 10K_4

3
WK_GPIO27 R79 *10K_4

IMVP_PWRGD_3V 2 Q11
PP3300_PCH PP3300_PCH_SUS RAM_ID GPIO27 : If not used then use
B Vender Q PN Mfr. PN Freq. FDV301N 8.2-kΩ to 10-kΩ pull-down to GND. B
G Path I Path ID2 ID1 ID0
Micron(4G) 0 0 0 AKD5JGSTL10 MT41K256M16HA-125:E 1600MHz

1
PP3300_PCH_SUS
R97 R101 Hynix(4G) 0 0 1 AKD5JGETW04 H5TC4G63AFR-PBA 1600MHz +1.05V_VCCST
R313 GPIO28 R49 10K_4
0_4 *0_4 Hynix(4G) 0 1 0 AKD5PGSTW13 H5TC4G63AFR-PBA(25nm) 1600MHz 1K_4 PP3300_CCD_EN R16 *10K_4
PP3300_SSD_EN R575 *10K_4
Micron(2G) 1 0 0 AKD5JGSTL10 MT41K256M16HA-125:E 1600MHz R314

2
Hynix(2G) 1 0 1 AKD5JGETW04 H5TC4G63AFR-PBA 1600MHz 1K_4
R89 10K_4 PCH_SPI_WP_D
R81 10K_4 GPIO14 Hynix(2G) 1 1 0 AKD5PGSTW13 H5TC4G63AFR-PBA(25nm) 1600MHz THRMTRIP# 1 3 PP3300_CCD_EN R15 100K_4
SYS_SHDN# [26,33,34]
Q12 MMBT3904-7-F PP3300_SSD_EN R570 100K_4

PP3300_DSW PP3300_PCH_SUS
I Path G Path
U23 +1.05V_VCCST PP3300_PCH

1 5
R150 R144 NC VCC

1
R344
*0_4 0_4 2 C249 10K_4
[5,32] VCORE_PGOOD A 0.1u/10V_4

2
Q23
A
[19,26,35] PP3300_WLAN_EN 5 3 4 IMVP_PWRGD_3V [26]
A
R143 10K_4 TRACKPAD_INT_L GND Y
WLAN_WAKE_L_Q 3 4 WLAN_WAKE_L [19]
R139 10K_4 TOUCH_INT_L 74AUP1G07GW

[21,26] PP3300_LTE_EN 2 Quanta Computer Inc.

LTE_WAKE_L_Q 6 1 LTE_WAKE_L [21] PROJECT :ZHNB
Size Document Number Rev
2N7002DW A
PCH 4/6 (GPIO/MISC)
Date: Thursday, December 04, 2014 Sheet 10 of 39
5 4 3 2 1
 5 4 3 2 1

11
R67 *SHORT_6
Haswell ULT PCH (Power) PP3300_PCH_SUS

C74
C225 *1u/6.3V_4 1u/6.3V_4
C13 1u/6.3V_4
HSW_ULT_DDR3L
C29 1u/6.3V_4 U24M
1.838A K9
PP3300_RTC
PP1050_PCH +V1.05DX_MODPHY VCCHSIO
L10
M9 VCCHSIO C75 C57 C58
R48 *SHORT_8
1.741A +V1.05S_AIDLE N8 VCCHSIO HSIO RTC AH11 +V3.3A_DSW_PRTCSUS 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4
P9 VCC1_05 VCCSUS3_3 AG10 C47
D B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT D
+V1.05S_AUSB3PLL VCCUSB3PLL DCPRTC
C32 B11
+V1.05S_ASATA3PLL VCCSATA3PLL
*1u/6.3V_4 R42 *0_6 PP3300_DSW
0.1u/10V_4
Y20 SPI Y8 +V3.3M_PSPI
18mA R40 0_6
RSVD VCCSPI PP3300_PCH
AA21 OPI
+V1.05S_APLLOPI VCCAPLL
W21
VCCAPLL AG14 PCH_VCC_1_1_20 R52 *SHORT_6 C33
VCCASW PP1050_PCH
AG13 PCH_VCC_1_1_21 R53 *SHORT_6 PP1050_PCH 0.1u/10V_4
C5 C18 VCCASW
*10u/6.3V_6 *1u/6.3V_4 +1.05V_DCPSUS3 J13 USB3
DCPSUS3 J11 +V1.05S_CORE_PCH R34 *SHORT_8 PP1050_PCH
VCC1_05 H11
+1.05V_DCPSUS2 AH14 HDA VCC1_05 H15
+V3.3DX_1.5DX_1.8DX_AUDIO VCCHDA VCC1_05 AE8 C78 C52 C36
VCC1_05 C73
AF22 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 +VCCPDSW
C87 AH13 VRM VCC1_05 AG19 +PCH_VCCDSW
Deep Sx 0.114A DCPSUS2 CORE DCPSUSBYP
*1u/6.3V_4 PP3300_DSW R54 *SHORT_6 AG20
C84 22u/6.3V_8 DCPSUSBYP AE9 +V1.05M_VCCASW C63
R46 *0_6 VCCASW AF9 1u/6.3V_4 0.47u/25V_6
PP3300_PCH_SUS
AC9 VCCASW AG8 +V1.05M_VCCASW
0.658A R68 *SHORT_8
PP3300_PCH_SUS VCCSUS3_3 VCCASW PP1050_PCH
Non Deep Sx AA9 GPIO/LPC AD10 +1.05V_DCPSUS1 place near CPU
C37 +VCCPDSW AH10 VCCSUS3_3 DCPSUS1 AD8 +PCH_VCCDSW
1u/6.3V_4 +V3.3S_VCCPCORE V8 VCCDSW3_3 DCPSUS1 C61 C50
W9 VCC3_3 0.109A 1u/6.3V_4 22u/6.3V_8
VCC3_3 J15
R22 *SHORT_8
41mA THERMAL SENSOR VCCTS1_5 K14
PP3300_PCH VCC3_3 K16 C51
VCC3_3 *1u/6.3V_4
C14
C 22u/6.3V_8 J18 C
+V1.05S_AXCK_DCB VCCCLK
K19 SERIAL IO U8 +V1.5S_VCCATS R9 *SHORT_6
A20 VCCCLK VCCSDIO T9
3mA PP1500_PCH_TS
+V1.05S_AXCK_LCPLL VCCACLKPLL VCCSDIO
J17 +V3.3S_VCCPTS R18 *SHORT_6
PP1050_PCH
R21 VCCCLK 1mA PP3300_PCH
PP1050_PCH VCCCLK
C17 1u/6.3V_4 T21 LPT LP POWER
K18 VCCCLK SUS OSCILLATOR AB8 C31
C48 1u/6.3V_4 M20 RSVD DCPSUS4 0.1u/10V_4
V21 RSVD
63mA AE20 RSVD AC20
PP3300_PCH_SUS
AE21 VCCSUS3_3 RSVD AG16 +V3.3S_VCCSDIO
17mA R19 *SHORT_6
VCCSUS3_3 VCC1_05 PP3300_PCH
USB2 AG17
VCC1_05

Vinafix.com
0412 MOW-WW15 a 0.47uF cap between VccDSW3_3 +1.05V_DCPSUS4
and DcpSusByp is required if the 1.9A inrush C39
current requirement cannot meet 1u/6.3V_4
13 OF 19 C40
*1u/6.3V_4

+V1.05S_VCCUSBCORE R84 *SHORT_8

PCH VCCHSIO Power PP1050_PCH

C79
1u/6.3V_4
C227
1 2
PP5000 PP1050_PCH +V1.05S_AXCK_DCB

0.1u/10V_4 PP1050_PCH +V1.05S_AXCK_LCPLL

B L9 2.2uH/210mA_8
0.2A B

L10 2.2uH/210mA_8
31mA
U21
SLG59M1470V C241 C235 C30
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4
PP1050_PCH_SUS 1 8 +V1.05DX_MODPHY C236 C242 C251
VDD GND 1u/6.3V_4
47u/6.3V_8 47u/6.3V_8
PP3300_PCH 2 7 R303 *SHORT_8
D_01 S_01 R304 *SHORT_8
3 5 VCCAPLL power
PP3300_DSW D_02_03 S_02_03

PP1050_PCH +V1.05S_APLLOPI
ON
1

C228 57mA
9

R301 R295 1u/6.3V_4 C229 R17 *SHORT_8

2

100K_4 *100K_4 0.1u/10V_4

2
1

[10] MODPHY_EN R297 *Short_4

C226 C9 C15 C60
*0.047u/25V_4 *47u/6.3V_8 *47u/6.3V_8 1u/6.3V_4
2

R296
*100K_4
PCH HDA Power
+V1.05DX_MODPHY +V1.05S_AUSB3PLL +V1.05DX_MODPHY +V1.05S_ASATA3PLL
11mA
A L11 2.2uH/210mA_8
41mA L8 2.2uH/210mA_8
42mA A
PP3300_PCH +V3.3DX_1.5DX_1.8DX_AUDIO

+3V_ADO R125 *SHORT_6

C237 C243 C250 C240 C234 C258
22u/6.3V_8 *47u/6.3V_8 1u/6.3V_4 22u/6.3V_8 *47u/6.3V_8 1u/6.3V_4
R128 *0_6 C88
1u/6.3V_4 Quanta Computer Inc.
Place close to ball PROJECT : ZHNB
Size Document Number Rev
A
PCH 5/6 (POWER)
Date: Thursday, December 04, 2014 Sheet 11 of 39
5 4 3 2 1
 5 4 3 2 1

Haswell ULT (GND) 12

HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L HSW_ULT_DDR3L
U24N U24O U24P U24R
D H17 D
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10 N23
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22 RSVD R23
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59 RSVD T23
VSS VSS VSS VSS VSS VSS AT2 RSVD
A28 AJ45 AP3 AW33 D38 J63 RSVD U10
VSS VSS VSS VSS VSS VSS AU44 RSVD
A32 AJ47 AP31 AW35 D39 K1 RSVD
VSS VSS VSS VSS VSS VSS AV44
A36 AJ50 AP38 AW37 D41 K12 RSVD
VSS VSS VSS VSS VSS VSS D15
A40 AJ52 AP39 AW4 D42 L13 RSVD AL1
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15 RSVD AM11
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17 RSVD AP7
VSS VSS VSS VSS VSS VSS F22 RSVD
A52 AJ58 AP54 AW44 D46 L18 RSVD AU10
VSS VSS VSS VSS VSS VSS H22 RSVD
A56 AJ60 AP57 AW47 D47 L20 RSVD AU15
VSS VSS VSS VSS VSS VSS J21 RSVD
AA1 AJ63 AR11 AW50 D49 L58 RSVD AW14
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61 RSVD AY14
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7 RSVD
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10 18 OF 19
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF12 VSS VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
C AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9 C
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58

Vinafix.com
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 VSS_SENSE_R R374 *Short_4
VSS VSS VSS VSS VSS VSS_SENSE VSS_SENSE [32]
AH24 AN23 AU33 C11 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 16 OF 19 VSS R373 100/F_4
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
B AH57 VSS VSS AN52 AV39 VSS VSS D23 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31
VSS VSS VSS 15 OF 19 VSS

14 OF 19

HSW_ULT_DDR3L
U24Q

DC_TEST_AY2_AW 2 AY2 A3 DC_TEST_A3_B3

DC_TEST_AY3_AW 3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP67
TP106 TP_DC_TEST_AY60 AY60
DC_TEST_AY61_AW 61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP68
DC_TEST_AY62_AW 62 AY62 A61 DC_TEST_A61_B61
TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
A TP65 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP70 A
DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1 TP104
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 TP_DC_TEST_AW 1
DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP105
DC_TEST_B62_B63 B62 AW2 DC_TEST_AY2_AW 2
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW 3
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW 61
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW 62
DAISY_CHAIN_NCTF_C2
17 OF 19
DAISY_CHAIN_NCTF_AW62
DAISY_CHAIN_NCTF_AW63
AW63 TP_DC_TEST_AW 63 TP107 Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
PCH 6/6 (GND)
Date: Thursday, December 04, 2014 Sheet 12 of 39
5 4 3 2 1
 5 4 3 2 1

[4]
[4]
XDP_PREQ#
XDP_PRDY#
XDP_PREQ_N
XDP_PRDY_N
31
32
33
34
CN15
31
32
33
30
29
28
30
29
28
27
NOA_STBP_0
NOA_STBN_0 NOA_STBP_0
NOA_STBN_0
[6]
[6]
13
CFG0 35 34 27 26 CFG8
PP3300_PCH_SUS [6] CFG0 CFG1 36 35 26 25 CFG9 CFG8 [6]
[6] CFG1 37 36 25 24 CFG9 [6] PP3300_PCH
H_SYS_PWROK_XDP R591 *1K_4 CFG2 38 37 24 23 CFG10
D D
[6] CFG2 CFG3 39 38 23 22 CFG11 CFG10 [6] XDP_DBRESET_N R592 *1K_4
[6] CFG3 40 39 22 21 CFG11 [6]
41 40 21 20 NOA_STBP_1
[4] XDP_BPM#0 42 41 20 19 NOA_STBN_1 NOA_STBP_1 [6]
[4] XDP_BPM#1 43 42 19 18 NOA_STBN_1 [6]
CFG4 44 43 18 17 CFG12
[6,8] CFG4 CFG5 45 44 17 16 CFG13 CFG12 [6]
[6] CFG5 46 45 16 15 CFG13 [6]
CFG6 47 46 15 14 CFG14
[6] CFG6 CFG7 48 47 14 13 CFG15 CFG14 [6]
[6] CFG7 49 48 13 12 CFG15 [6]
R590 *1K_4 VCCST_PWRGD_XDP 50 49 12 11 CK_XDP_P_R R595 *0_4
[5,13] VCCST_PWRGD 50 11 CLK_PCIE_XDPP [9]
PWR_BTN_L 51 10 CK_XDP_N_R R596 *0_4 CLK_PCIE_XDPN [9]
PP1050_PCH_SUS 52 51 10 9 PP1050_PCH_SUS
53 52 9 8 XDP_RST_R_N R593 *1K_4
[5] PWR_DEBUG 53 8 PLTRST# [7,19,21,22,26]
R597 *0_4 H_SYS_PWROK_XDP 54 7 XDP_DBRESET_N R594 *0_4 SYS_RESET#
[5,7,26] SYS_PWROK 55 54 7 6
56 55 6 5 XDP_TDO
[8] SMB_PCH_DAT 56 5
[8] SMB_PCH_CLK 57 4 XDP_TRST_N
58 57 4 3 XDP_TDI
[8] XDP_TCK1 58 3
59 2 XDP_TMS
[4,8] XDP_TCK0 59 2
60 1
60 1
*SEC_BSH-030-01-L-D-A-TR
C C

20141021 Intel require modify ITP CN15 P9/P51 add PP1050_PCH_SUS, P50 PP1050_PGOOD change to VCCST_PWRGD.

Vinafix.com PP1050_PCH_SUS PP3300_PCH

R63 C230
*51_4 0.1u/10V_4

U22
14
VCC
XDP_TDO 2 3
[8] XDP_TDO 1A 1B XDP_TDO_CPU [4,8]
B B
1
1OE

[8] XDP_TDI XDP_TDI R72 XDP_TDI_R 5 6

2A 2B XDP_TDI_CPU [4,8]
*Short_4
APS1 R309 *0_6 APS3 R302 *0_6 APS7 4
2OE
XDP_TMS 9 8
APS [8] XDP_TMS 3A 3B XDP_TMS_CPU [4]
10
3OE
PP3300_PCH_SUS XDP_TRST_N 12 11
TP63 4A 4B XDP_TRST# [4,8]
CN2
1 APS1 R308 *0_6 13
1 2 R322 *0_4 4OE 15
2 3 APS3 R310 *0_6 PCH_SLP_S3_L [7,26,30,31,33,35] DPAD
3 PP3300_DSW
4 R321 *0_4 7
4 5 R320 *0_4 PCH_SLP_S5_L [7,26,30,35] GND
5 6 R319 *0_4 PCH_SLP_S4_L [7] *74CBTLV3126
6 7 APS7 R311 *0_6 PCH_SLP_A_L [7]
7 PP3300_DSW
8
8 9 R318 *0_4 PP1050_PCH PP3300_PCH
9 10 PCH_RTCRST [8,26] U19
10 11 R317 *0_4 PWR_BTN_L
11 12 PWR_BTN_L [17,25,26] 1 5
A 12 13 R316 *0_4 SYS_RESET# NC VCC R300 A
13 SYS_RESET# [7,17]
1

14 10K_4
14 15 R315 *0_4 2 C231
15 16 PCH_SLP_S0_L [7,26]
[5,13] VCCST_PWRGD A 0.1u/10V_4
Quanta Computer Inc.
2

16 17
17 18 3 4
18 GND Y
*APS conn_ACS_88511-180N
PROJECT :ZHNB
*74AUP1G07GW Size Document Number Rev
A
CPU/PCH XDP
Date: Thursday, December 04, 2014 Sheet 13 of 39
5 4 3 2 1
 1 2 3 4 5 6 7 8

<DDR> BYTE2_16-23 BYTE7_56-63 BYTE0_0-7 BYTE4_32-39

+SMDDR_VREF_DIMM M8
U9

E3
BYTE3_24-31
M_A_DQ<16> [3] +SMDDR_VREF_DIMM M8
U30

E3
BYTE5_40-47
M_A_DQ<60> [3] +SMDDR_VREF_DIMM M8
U31

E3
BYTE1_8-15
+SMDDR_VREF_DIMM M8
U10

E3
BYTE6_48-55
M_A_DQ<32> [3]
14
VREFCA DQL0 VREFCA DQL0 VREFCA DQL0 M_A_DQ<2> [3] VREFCA DQL0
+SMDDR_VREF_DQ0 H1 F7 +SMDDR_VREF_DQ0 H1 F7 +SMDDR_VREF_DQ0 H1 F7 +SMDDR_VREF_DQ0 H1 F7
VREFDQ DQL1 M_A_DQ<18> [3] VREFDQ DQL1 M_A_DQ<58> [3] VREFDQ DQL1 M_A_DQ<3> [3] VREFDQ DQL1 M_A_DQ<38> [3]
F2 F2 F2 F2
DQL2 M_A_DQ<21> [3] DQL2 M_A_DQ<56> [3] DQL2 M_A_DQ<6> [3] DQL2 M_A_DQ<35> [3]
M_A_A<0> N3 F8 M_A_DQ<19> [3] M_A_A<0> N3 F8 M_A_DQ<62> [3] M_A_A<0> N3 F8 M_A_DQ<1> [3] M_A_A<0> N3 F8 M_A_DQ<36> [3]
[3] M_A_A<0> A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
M_A_A<1> P7 H3 M_A_DQ<17> [3] M_A_A<1> P7 H3 M_A_DQ<61> [3] M_A_A<1> P7 H3 M_A_DQ<7> [3] M_A_A<1> P7 H3 M_A_DQ<33> [3]
[3] M_A_A<1> A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
M_A_A<2> P3 H8 M_A_A<2> P3 H8 M_A_A<2> P3 H8 M_A_A<2> P3 H8
[3] M_A_A<2> A2 DQL5 M_A_DQ<23> [3] A2 DQL5 M_A_DQ<63> [3] A2 DQL5 M_A_DQ<4> [3] A2 DQL5 M_A_DQ<37> [3]
M_A_A<3> N2 G2 M_A_A<3> N2 G2 M_A_A<3> N2 G2 M_A_A<3> N2 G2
[3] M_A_A<3> A3 DQL6 M_A_DQ<20> [3] A3 DQL6 M_A_DQ<57> [3] A3 DQL6 M_A_DQ<5> [3] A3 DQL6 M_A_DQ<34> [3]
M_A_A<4> P8 H7 M_A_A<4> P8 H7 M_A_A<4> P8 H7 M_A_A<4> P8 H7
[3] M_A_A<4> A4 DQL7 M_A_DQ<22> [3] A4 DQL7 M_A_DQ<59> [3] A4 DQL7 M_A_DQ<0> [3] A4 DQL7 M_A_DQ<39> [3]
M_A_A<5> P2 M_A_A<5> P2 M_A_A<5> P2 M_A_A<5> P2
[3] M_A_A<5> A5 A5 A5 A5
M_A_A<6> R8 M_A_A<6> R8 M_A_A<6> R8 M_A_A<6> R8
[3] M_A_A<6> A6 A6 A6 A6
M_A_A<7> R2 D7 M_A_A<7> R2 D7 M_A_A<7> R2 D7 M_A_A<7> R2 D7
[3] M_A_A<7> A7 DQU0 M_A_DQ<27> [3] A7 DQU0 M_A_DQ<45> [3] A7 DQU0 M_A_DQ<13> [3] A7 DQU0 M_A_DQ<48> [3]
M_A_A<8> T8 C3 M_A_A<8> T8 C3 M_A_A<8> T8 C3 M_A_A<8> T8 C3
[3] M_A_A<8> A8 DQU1 M_A_DQ<24> [3] A8 DQU1 M_A_DQ<42> [3] A8 DQU1 M_A_DQ<10> [3] A8 DQU1 M_A_DQ<53> [3]
M_A_A<9> R3 C8 M_A_A<9> R3 C8 M_A_A<9> R3 C8 M_A_A<9> R3 C8
A [3] M_A_A<9> A9 DQU2 M_A_DQ<26> [3] A9 DQU2 M_A_DQ<40> [3] A9 DQU2 M_A_DQ<8> [3] A9 DQU2 M_A_DQ<49> [3] A
M_A_A<10> L7 C2 M_A_DQ<28> [3] M_A_A<10> L7 C2 M_A_DQ<46> [3] M_A_A<10> L7 C2 M_A_DQ<14> [3] M_A_A<10> L7 C2 M_A_DQ<52> [3]
[3] M_A_A<10> A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
M_A_A<11> R7 A7 M_A_A<11> R7 A7 M_A_A<11> R7 A7 M_A_A<11> R7 A7
[3] M_A_A<11> A11 DQU4 M_A_DQ<30> [3] A11 DQU4 M_A_DQ<41> [3] A11 DQU4 M_A_DQ<9> [3] A11 DQU4 M_A_DQ<55> [3]
M_A_A<12> N7 A2 M_A_DQ<29> [3] M_A_A<12> N7 A2 M_A_DQ<47> [3] M_A_A<12> N7 A2 M_A_DQ<15> [3] M_A_A<12> N7 A2 M_A_DQ<51> [3]
[3] M_A_A<12> A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
M_A_A<13> T3 B8 M_A_DQ<31> [3] M_A_A<13> T3 B8 M_A_DQ<44> [3] M_A_A<13> T3 B8 M_A_DQ<12> [3] M_A_A<13> T3 B8 M_A_DQ<54> [3]
[3] M_A_A<13> A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
M_A_A<14> T7 A3 M_A_A<14> T7 A3 M_A_A<14> T7 A3 M_A_A<14> T7 A3
[3] M_A_A<14> A14 DQU7 M_A_DQ<25> [3] A14 DQU7 M_A_DQ<43> [3] A14 DQU7 M_A_DQ<11> [3] A14 DQU7 M_A_DQ<50> [3]
M_A_A<15> M7 M_A_A<15> M7 M_A_A<15> M7 M_A_A<15> M7
[3] M_A_A<15> A15 PP1350 A15 PP1350 A15 PP1350 A15 PP1350
[3] M_A_BS[2:0]
M_A_BS0 M2 B2 M_A_BS0 M2 B2 M_A_BS0 M2 B2 M_A_BS0 M2 B2
M_A_BS1 N8 BA0 VDD#B2 D9 M_A_BS1 N8 BA0 VDD#B2 D9 M_A_BS1 N8 BA0 VDD#B2 D9 M_A_BS1 N8 BA0 VDD#B2 D9
M_A_BS2 M3 BA1 VDD#D9 G7 M_A_BS2 M3 BA1 VDD#D9 G7 M_A_BS2 M3 BA1 VDD#D9 G7 M_A_BS2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_A_DIM0_CK_DDR0_DP J7 VDD#N1 N9 M_A_DIM0_CK_DDR0_DP J7 VDD#N1 N9 M_A_DIM0_CK_DDR0_DP J7 VDD#N1 N9 M_A_DIM0_CK_DDR0_DP J7 VDD#N1 N9
[3] M_A_DIM0_CK_DDR0_DP CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
M_A_DIM0_CK_DDR0_DN K7 R1 M_A_DIM0_CK_DDR0_DN K7 R1 M_A_DIM0_CK_DDR0_DN K7 R1 M_A_DIM0_CK_DDR0_DN K7 R1
[3] M_A_DIM0_CK_DDR0_DN CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
M_A_DIM0_CKE0 K9 R9 M_A_DIM0_CKE0K9 R9 M_A_DIM0_CKE0K9 R9 M_A_DIM0_CKE0K9 R9
[3] M_A_DIM0_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9

M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1

M_A_DIM0_CS0_N L2 ODT VDDQ#A1 A8 M_A_DIM0_CS0_N L2 ODT VDDQ#A1 A8 M_A_DIM0_CS0_N L2 ODT VDDQ#A1 A8 M_A_DIM0_CS0_N L2 ODT VDDQ#A1 A8
[3] M_A_DIM0_CS0_N CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
M_A_RAS_N J3 C1 M_A_RAS_N J3 C1 M_A_RAS_N J3 C1 M_A_RAS_N J3 C1
[3] M_A_RAS_N RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
M_A_CAS_N K3 C9 M_A_CAS_N K3 C9 M_A_CAS_N K3 C9 M_A_CAS_N K3 C9
[3] M_A_CAS_N CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
M_A_W E_N L3 D2 M_A_W E_N L3 D2 M_A_W E_N L3 D2 M_A_W E_N L3 D2
[3] M_A_W E_N WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
F3 VDDQ#F1 H2 F3 VDDQ#F1 H2 F3 VDDQ#F1 H2 F3 VDDQ#F1 H2
[3] M_A_DQS_DP<2> DQSL VDDQ#H2 [3] M_A_DQS_DP<7> DQSL VDDQ#H2 [3] M_A_DQS_DP<0> DQSL VDDQ#H2 [3] M_A_DQS_DP<4> DQSL VDDQ#H2
[3] M_A_DQS_DP<3>
C7 H9 [3] M_A_DQS_DP<5>
C7 H9 [3] M_A_DQS_DP<1>
C7 H9 [3] M_A_DQS_DP<6>
C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9

E7 A9 E7 A9 E7 A9 E7 A9
D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
G3 VSS#G8 J2 G3 VSS#G8 J2 G3 VSS#G8 J2 G3 VSS#G8 J2
[3] M_A_DQS_DN<2> DQSL VSS#J2 [3] M_A_DQS_DN<7> DQSL VSS#J2 [3] M_A_DQS_DN<0> DQSL VSS#J2 [3] M_A_DQS_DN<4> DQSL VSS#J2
[3] M_A_DQS_DN<3> B7 J8 [3] M_A_DQS_DN<5> B7 J8 [3] M_A_DQS_DN<1> B7 J8 [3] M_A_DQS_DN<6> B7 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9
[4,15] DDR3_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_A_ZQ1 L8 VSS#T1 T9 M_A_ZQ2 L8 VSS#T1 T9 M_A_ZQ3 L8 VSS#T1 T9 M_A_ZQ4 L8 VSS#T1 T9
B ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 B

B1 B1 B1 B1
2

2
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R183 VSSQ#B9 D1 R188 VSSQ#B9 D1 R495 VSSQ#B9 D1 R178 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
240/F_4 240/F_4 240/F_4 240/F_4
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
1

1
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
RAM _DDR3L RAM _DDR3L RAM _DDR3L RAM _DDR3L
Vendor P/N Micron/MT41K256M16HA-125:E/AKD5JGSTL02 for proto board

Vinafix.com
Hynix

AKD5JGST400 DDR3L 1333Mhz 4Gb

Elpida +DDR_VTT_RUN PP1350
AKD5JGST404 DDR3L 1600Mhz 4Gb
M_A_RAS_N R226 34.8/F_4 M_A_ODT0 R189 30/F_4
M_A_CAS_N R225 34.8/F_4
M_A_W E_N R524 34.8/F_4
M_A_BS0 R224 34.8/F_4
M_A_BS1 R223 34.8/F_4
PP1350 M_A_BS2 R232 34.8/F_4
Distributed around all DRAM devices (CHA and CHB) M_A_DIM0_CKE0 R545 34.8/F_4
M_A_DIM0_CS0_N R523 34.8/F_4 +DDR_VTT_RUN
M_A_A<0> R221 34.8/F_4
M_A_A<1> R528 34.8/F_4
C104 C167 C168 C99 C340 C341 C295 M_A_A<2> R234 34.8/F_4
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 M_A_A<3> R540 34.8/F_4
M_A_A<4> R543 34.8/F_4
M_A_A<5> R526 34.8/F_4
M_A_A<6> R527 34.8/F_4 M_A_DIM0_CK_DDR0_DP R236 26.1/F_4
M_A_A<7> R542 34.8/F_4 M_A_DIM0_CK_DDR0_DN R539 26.1/F_4
C M_A_A<8> R541 34.8/F_4 C
M_A_A<9> R235 34.8/F_4
Place these Caps near each X16 Memory Down M_A_A<10> R222 34.8/F_4
M_A_A<11> R231 34.8/F_4
M_A_A<12> R544 34.8/F_4
C114 C153 C100 M_A_A<13> R525 34.8/F_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 C334 C293 C305 C322 C292 C329 M_A_A<14> R230 34.8/F_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 M_A_A<15> R233 34.8/F_4

C107 C157 C116 C124 C166 C122 C101 C118 C150

1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4

M1 solution
M1 solution PP1350
PP1350

R481 Vref_DQ
R184 Vref_CA 1.8K/F_4
1.8K/F_4 +SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
+DDR_VTT_RUN +VREFDQ_SA_M3 R456 *SHORT_6 R468 5.1/F_6
+VREF_CA_CPU R149 *SHORT_6 R153 2/F_6

2
1

2
C284 R486 C300
C135 C146 C321 C147 C326 C142
M3 solution C96 R187 C144
M3 solution 0.022u/16V_4 1.8K/F_4 470p/50V_4

1
0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.022u/16V_4 1.8K/F_4 470p/50V_4
2

1
C358 C357 C356 C359 C354 R455
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 R154 24.9/F_4
+SMDDR_VREF_DQ0 Place these Caps near Memory Down CA & DQ pin 24.9/F_4

D D
1

C314 C319 C120 C123 C129

0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4 0.047u/25V_4
2

S_CLIP1 S_CLIP3 S_CLIP2 S_CLIP4

*SUL-12A2M *SUL-12A2M *SUL-12A2M *SUL-12A2M

Quanta Computer Inc.

1

1
PROJECT : ZHNB
Size Document Number Rev
A
DDR3L MEMORY DOWNx16 A
Date: Thursday, December 04, 2014 Sheet 14 of 39
1 2 3 4 5 6 7 8
 5 4 3 2 1

<DDR> BYTE1_8-15 BYTE5_40-47 BYTE0_0-7 BYTE4_32-39

+SMDDR_VREF_DIMM M8
U29

E3
BYTE2_16-23
M_B_DQ<23> [3] +SMDDR_VREF_DIMM M8
U28

E3
BYTE6_48-55
M_B_DQ<53> [3] +SMDDR_VREF_DIMM M8
U11

E3
BYTE3_24-31
M_B_DQ<1> [3] +SMDDR_VREF_DIMM M8
U12

E3
BYTE7_56-63
M_B_DQ<36> [3]
15
+SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 +SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 +SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7 +SMDDR_VREF_DQ1 H1 VREFCA DQL0 F7
VREFDQ DQL1 M_B_DQ<20> [3] VREFDQ DQL1 M_B_DQ<49> [3] VREFDQ DQL1 M_B_DQ<3> [3] VREFDQ DQL1 M_B_DQ<35> [3]
F2 F2 F2 F2
DQL2 M_B_DQ<18> [3] DQL2 M_B_DQ<50> [3] DQL2 M_B_DQ<2> [3] DQL2 M_B_DQ<32> [3]
M_B_A<0> N3 F8 M_B_DQ<17> [3] M_B_A<0> N3 F8 M_B_DQ<55> [3] M_B_A<0> N3 F8 M_B_DQ<7> [3] M_B_A<0> N3 F8 M_B_DQ<39> [3]
[3] M_B_A<0> A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
M_B_A<1> P7 H3 M_B_DQ<22> [3] M_B_A<1> P7 H3 M_B_DQ<48> [3] M_B_A<1> P7 H3 M_B_DQ<4> [3] M_B_A<1> P7 H3 M_B_DQ<37> [3]
[3] M_B_A<1> A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
M_B_A<2> P3 H8 M_B_A<2> P3 H8 M_B_A<2> P3 H8 M_B_A<2> P3 H8
[3] M_B_A<2> A2 DQL5 M_B_DQ<16> [3] A2 DQL5 M_B_DQ<51> [3] A2 DQL5 M_B_DQ<5> [3] A2 DQL5 M_B_DQ<34> [3]
M_B_A<3> N2 G2 M_B_A<3> N2 G2 M_B_A<3> N2 G2 M_B_A<3> N2 G2
[3] M_B_A<3> A3 DQL6 M_B_DQ<19> [3] A3 DQL6 M_B_DQ<54> [3] A3 DQL6 M_B_DQ<6> [3] A3 DQL6 M_B_DQ<33> [3]
M_B_A<4> P8 H7 M_B_A<4> P8 H7 M_B_A<4> P8 H7 M_B_A<4> P8 H7
[3] M_B_A<4> A4 DQL7 M_B_DQ<21> [3] A4 DQL7 M_B_DQ<52> [3] A4 DQL7 M_B_DQ<0> [3] A4 DQL7 M_B_DQ<38> [3]
M_B_A<5> P2 M_B_A<5> P2 M_B_A<5> P2 M_B_A<5> P2
[3] M_B_A<5> A5 A5 A5 A5
M_B_A<6> R8 M_B_A<6> R8 M_B_A<6> R8 M_B_A<6> R8
[3] M_B_A<6> A6 A6 A6 A6
M_B_A<7> R2 D7 M_B_A<7> R2 D7 M_B_A<7> R2 D7 M_B_A<7> R2 D7
[3] M_B_A<7> A7 DQU0 M_B_DQ<13> [3] A7 DQU0 M_B_DQ<45> [3] A7 DQU0 M_B_DQ<30> [3] A7 DQU0 M_B_DQ<58> [3]
M_B_A<8> T8 C3 M_B_A<8> T8 C3 M_B_A<8> T8 C3 M_B_A<8> T8 C3
[3] M_B_A<8> A8 DQU1 M_B_DQ<10> [3] A8 DQU1 M_B_DQ<42> [3] A8 DQU1 M_B_DQ<24> [3] A8 DQU1 M_B_DQ<61> [3]
M_B_A<9> R3 C8 M_B_A<9> R3 C8 M_B_A<9> R3 C8 M_B_A<9> R3 C8
D [3] M_B_A<9> A9 DQU2 M_B_DQ<8> [3] A9 DQU2 M_B_DQ<40> [3] A9 DQU2 M_B_DQ<26> [3] A9 DQU2 M_B_DQ<62> [3] D
M_B_A<10> L7 C2 M_B_DQ<14> [3] M_B_A<10> L7 C2 M_B_DQ<46> [3] M_B_A<10> L7 C2 M_B_DQ<29> [3] M_B_A<10> L7 C2 M_B_DQ<60> [3]
[3] M_B_A<10> A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
M_B_A<11> R7 A7 M_B_A<11> R7 A7 M_B_A<11> R7 A7 M_B_A<11> R7 A7
[3] M_B_A<11> A11 DQU4 M_B_DQ<9> [3] A11 DQU4 M_B_DQ<41> [3] A11 DQU4 M_B_DQ<31> [3] A11 DQU4 M_B_DQ<59> [3]
M_B_A<12> N7 A2 M_B_DQ<15> [3] M_B_A<12> N7 A2 M_B_DQ<47> [3] M_B_A<12> N7 A2 M_B_DQ<28> [3] M_B_A<12> N7 A2 M_B_DQ<56> [3]
[3] M_B_A<12> A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
M_B_A<13> T3 B8 M_B_DQ<12> [3] M_B_A<13> T3 B8 M_B_DQ<44> [3] M_B_A<13> T3 B8 M_B_DQ<27> [3] M_B_A<13> T3 B8 M_B_DQ<63> [3]
[3] M_B_A<13> A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
M_B_A<14> T7 A3 M_B_A<14> T7 A3 M_B_A<14> T7 A3 M_B_A<14> T7 A3
[3] M_B_A<14> A14 DQU7 M_B_DQ<11> [3] A14 DQU7 M_B_DQ<43> [3] A14 DQU7 M_B_DQ<25> [3] A14 DQU7 M_B_DQ<57> [3]
M_B_A<15> M7 M_B_A<15> M7 M_B_A<15> M7 M_B_A<15> M7
[3] M_B_A<15> A15 PP1350 A15 PP1350 A15 PP1350 A15 PP1350
[3] M_B_BS[2:0]
M_B_BS0 M2 B2 M_B_BS0 M2 B2 M_B_BS0 M2 B2 M_B_BS0 M2 B2
M_B_BS1 N8 BA0 VDD#B2 D9 M_B_BS1 N8 BA0 VDD#B2 D9 M_B_BS1 N8 BA0 VDD#B2 D9 M_B_BS1 N8 BA0 VDD#B2 D9
M_B_BS2 M3 BA1 VDD#D9 G7 M_B_BS2 M3 BA1 VDD#D9 G7 M_B_BS2 M3 BA1 VDD#D9 G7 M_B_BS2 M3 BA1 VDD#D9 G7
BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
M_B_DIM0_CK_DDR0_DP J7 VDD#N1 N9 M_B_DIM0_CK_DDR0_DP J7 VDD#N1 N9 M_B_DIM0_CK_DDR0_DP J7 VDD#N1 N9 M_B_DIM0_CK_DDR0_DP J7 VDD#N1 N9
[3] M_B_DIM0_CK_DDR0_DP CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
M_B_DIM0_CK_DDR0_DN K7 R1 M_B_DIM0_CK_DDR0_DN K7 R1 M_B_DIM0_CK_DDR0_DN K7 R1 M_B_DIM0_CK_DDR0_DN K7 R1
[3] M_B_DIM0_CK_DDR0_DN CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
M_B_DIM0_CKE0 K9 R9 M_B_DIM0_CKE0 K9 R9 M_B_DIM0_CKE0 K9 R9 M_B_DIM0_CKE0 K9 R9
[3] M_B_DIM0_CKE0 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9

M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1

M_B_DIM0_CS0_N L2 ODT VDDQ#A1 A8 M_B_DIM0_CS0_N L2 ODT VDDQ#A1 A8 M_B_DIM0_CS0_N L2 ODT VDDQ#A1 A8 M_B_DIM0_CS0_N L2 ODT VDDQ#A1 A8
[3] M_B_DIM0_CS0_N CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8 CS VDDQ#A8
M_B_RAS_N J3 C1 M_B_RAS_N J3 C1 M_B_RAS_N J3 C1 M_B_RAS_N J3 C1
[3] M_B_RAS_N RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
M_B_CAS_N K3 C9 M_B_CAS_N K3 C9 M_B_CAS_N K3 C9 M_B_CAS_N K3 C9
[3] M_B_CAS_N CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
M_B_W E_N L3 D2 M_B_W E_N L3 D2 M_B_W E_N L3 D2 M_B_W E_N L3 D2
[3] M_B_W E_N WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
F3 VDDQ#F1 H2 F3 VDDQ#F1 H2 F3 VDDQ#F1 H2 F3 VDDQ#F1 H2
[3] M_B_DQS_DP<2> DQSL VDDQ#H2 [3] M_B_DQS_DP<6> DQSL VDDQ#H2 [3] M_B_DQS_DP<0> DQSL VDDQ#H2 [3] M_B_DQS_DP<4> DQSL VDDQ#H2
[3] M_B_DQS_DP<1>
C7 H9 [3] M_B_DQS_DP<5>
C7 H9 [3] M_B_DQS_DP<3>
C7 H9 [3] M_B_DQS_DP<7>
C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9

E7 A9 E7 A9 E7 A9 E7 A9
D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
G3 VSS#G8 J2 G3 VSS#G8 J2 G3 VSS#G8 J2 G3 VSS#G8 J2
[3] M_B_DQS_DN<2> DQSL VSS#J2 [3] M_B_DQS_DN<6> DQSL VSS#J2 [3] M_B_DQS_DN<0> DQSL VSS#J2 [3] M_B_DQS_DN<4> DQSL VSS#J2
[3] M_B_DQS_DN<1> B7 J8 [3] M_B_DQS_DN<5> B7 J8 [3] M_B_DQS_DN<3> B7 J8 [3] M_B_DQS_DN<7> B7 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9 DDR3_DRAMRST# T2 VSS#P1 P9
[4,14] DDR3_DRAMRST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
M_B_ZQ1 L8 VSS#T1 T9 M_B_ZQ2 L8 VSS#T1 T9 M_B_ZQ3 L8 VSS#T1 T9 M_B_ZQ4 L8 VSS#T1 T9
C ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 C

B1 B1 B1 B1
2

2
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R496 VSSQ#B9 D1 R503 VSSQ#B9 D1 R208 VSSQ#B9 D1 R181 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
2CH@240/F_4 2CH@240/F_4 2CH@240/F_4 2CH@240/F_4
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
1

1
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
2CH@RAM _DDR3L 2CH@RAM _DDR3L 2CH@RAM _DDR3L 2CH@RAM _DDR3L
Vendor P/N
Micron/MT41K256M16HA-125:E/AKD5JGSTL02 for proto board

Vinafix.com
Hynix AKD5JGETW04 DDR3L 1600Mhz 4Gb

Elpida AKD5JGST407 DDR3L 1600Mhz 4Gb

+DDR_VTT_RUN PP1350
Micron AKD5JGSTL10 DDR3L 1600Mhz 4Gb
M_B_RAS_N R246 2CH@34.8/F_4 M_B_ODT0 R190 2CH@30/F_4
M_B_CAS_N R245 2CH@34.8/F_4
PP1350 M_B_W E_N R531 2CH@34.8/F_4
M_B_BS0 R530 2CH@34.8/F_4
M_B_BS1 R533 2CH@34.8/F_4
M_B_BS2 R227 2CH@34.8/F_4
M_B_DIM0_CKE0 R522 2CH@34.8/F_4
M_B_DIM0_CS0_N R529 2CH@34.8/F_4 +DDR_VTT_RUN
C164 C169 C338 C70 C339 C294 M_B_A<0> R534 2CH@34.8/F_4
2CH@10u/6.3V_6 2CH@10u/6.3V_6 2CH@10u/6.3V_6 M_B_A<1> R535 2CH@34.8/F_4
2CH@10u/6.3V_6 2CH@10u/6.3V_6 2CH@10u/6.3V_6 M_B_A<2> R537 2CH@34.8/F_4
M_B_A<3> R240 2CH@34.8/F_4
M_B_A<4> R238 2CH@34.8/F_4
M_B_A<5> R239 2CH@34.8/F_4
M_B_A<6> R237 2CH@34.8/F_4 M_B_DIM0_CK_DDR0_DP R242 2CH@26.1/F_4
Place these Caps near each X16 Memory Down M_B_A<7> R241 2CH@34.8/F_4 M_B_DIM0_CK_DDR0_DN R532 2CH@26.1/F_4
B M_B_A<8> R536 2CH@34.8/F_4 B
C125 C109 C71 C67 C66 C65 C110 C145 C103 M_B_A<9> R520 2CH@34.8/F_4
2CH@1u/6.3V_4 M_B_A<10> R244 2CH@34.8/F_4
2CH@1u/6.3V_4 2CH@2.2U/6.3V_4 2CH@2.2U/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 M_B_A<11> R521 2CH@34.8/F_4
2CH@2.2U/6.3V_4 2CH@2.2U/6.3V_4 2CH@1u/6.3V_4 M_B_A<12> R229 2CH@34.8/F_4
M_B_A<13> R243 2CH@34.8/F_4
M_B_A<14> R228 2CH@34.8/F_4
M_B_A<15> R538 2CH@34.8/F_4

C330 C163 C121 C111 C162 C102 C155 C308 C309

2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4

2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4

C315 C112 C304 C303 C320 C301 C311 C317 C328

2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4
M1 solution
2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4
PP1350

R163 Vref_DQ
C316 C306 C307 C333 C331 C296 C337 2CH@1.8K/F_4
2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 +SMDDR_VREF_DQ1
2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4
+VREFDQ_SB_M3 R466 2CH@0_6 R471 2CH@5.1/F_6

2
C290 R165 C108
M3 solution 2CH@0.022u/16V_4 2CH@1.8K/F_4 2CH@470p/50V_4

1
+DDR_VTT_RUN
R480
+SMDDR_VREF_DIMM 2CH@24.9/F_4
1

C184 C355 C183 C182

A C185 C186 C180 C134 C138 C324 C136 A
2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@10u/6.3V_6 2CH@0.047u/25V_4 2CH@0.047u/25V_4
2

2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@1u/6.3V_4 2CH@0.047u/25V_4 2CH@0.047u/25V_4

+SMDDR_VREF_DQ1 Place these Caps near Memory Down CA & DQ pin

1

C130 C318 C313 C119 C115

2CH@0.047u/25V_4 2CH@0.047u/25V_4 2CH@0.047u/25V_4
Quanta Computer Inc.
2

2CH@0.047u/25V_4 2CH@0.047u/25V_4

PROJECT : ZHNB
Size Document Number Rev
A
DDR3L MEMORY DOWNx16 B
Date: Thursday, December 04, 2014 Sheet 15 of 39
5 4 3 2 1
 1 2 3 4 5 6 7 8

LVDS Power(LDS) PP3300_DX LVDS(LDS)

LCD_VIN

C85

1u/6.3V_4 6
U5

IN OUT
1 LCDVCC_1 R76 *SHORT_8
C28
LCDVCC
C81

4.7u/25V_8
C72

1000p/50V_4
LVDS CONN (follow zqk)
DFHS40FS095
16
A 4 2 C82 C76 C38 A
IN GND 0.1u/10V_4 C16 DFHS40FS063
R94 *Short_4 3 5 *0.1u/10V_4 *2.2u/6.3V_6 22u/6.3V_8 footprint gs12401-1011-40p-r-nh-smt
[26] EC_EDP_VDD_EN ON/OFF GND 0.01u/16V_4
R77 *0_4 R104 *0_4 EC_BL_PWM_CONN
[2,26] PCH_EDP_VDD_EN [26] EC_BL_PWM
R87 G5243AT11U 20140912
EOD parts, change PN. eDP VIN R107 *SHORT_6 CN3
R93 *Short_4 R85 R103 *SHORT_6 LCD_VIN 1
[2,26] PCH_BL_PWM 1
100K_4 C64 2
3 2
R98 *0_4 *100K_4 *0.1u/10V_4 EC_BL_PWM_CONN 4 3
[2] DP_UTIL 4
EC_BL_EN_CONN 5
R425 *Short_4 EDP_HPD_CONN 6 5
PP3300_PCH_SUS PP3300_PCH_SUS [2] EDP_HPD 6
7
Touch Panel INT/RST(TPS) [2]
[2]
EDP_AUXN
EDP_AUXP
C264
C263
0.1u/16V_4 EDP_AUXN_C
0.1u/16V_4 EDP_AUXP_C
8
9
7
8
9
20140821 R51 *Short_4 EC_BL_EN_CONN 10
[26] EC_BL_EN 10
Q13 FET change to PJT138K R325 C261 0.1u/16V_4 EDP_TXP0_C 11
[2] EDP_TXP0 11
20141125 *TPL@10K_4 R60 C259 0.1u/16V_4 EDP_TXN0_C 12
[2] EDP_TXN0 12

2
Change TPS to un-stuff, R66 *0_4 13
[2,26] PCH_BL_EN 13
B
20141126 EOD parts, change PN. 14 B
because no touch panel. 3 1 TP_INT *100K_4 15 14
[10] TOUCH_INT_L LCDVCC 15
Q10 *TPL@2N7002K 16
17 16
D21 18 17
[2] TOUCH_INT_L_DX 18
*TPL@RB500V-40 R21 *TPL@10K_4 CCD 19
PP3300_PCH_SUS 19
USBP2+_R 20
D22 *TPL@RB500V-40 SOC3V3_RSTOUT_L USBP2-_R 21 20
[26] TOUCH_RST_L 21
22
23 22
CCD_PWR 23
24
R13 *Short_4 TOUCHPANEL_PWR_R 25 24
[26] TP_SHDN_L CCD(CCD) Touch Panel SOC3V3_RSTOUT_L 26 25

CCD power(CCD) C393 *15p/50V_4

TP_INT
I2C1_SDA_GPIO6_CONN
27
28
26
27
28
34
33
34
33
I2C1_SCL_GPIO7_CONN 29 32
L12 R361 *0_6 PP5000_TS 30 29 32 31
PP5000 30 31
R14 4 3 USBP2+_R
[9] USBP2+ 4 3
100K_4 1 2 USBP2-_R LCD CONN
[9] USBP2- 1 2
20140821
C DLW21HN900SQ2L_C/330mA/90ohm 20140827 Change CN3 footprint. C
Reserve C393 capacitor.
20141125
CCD_PWR Change R361 to un-stuff.
PP3300_DX 20141201 Stuff L12, remove R371/R372. because no touch panel.
R23 *SHORT_6 0.5A
C7 C11 C10 Touch Panel level shift(TPS)
PP3300_PCH_SUS
1U/6.3V_4 *10p/50V_4 1000p/50V_4

Vinafix.com
20140821 R337 *0_4 R346 R338
Q13 FET change to PJT138K. *4.7K_4 *4.7K_4
20141125 Q13
Change Q13 to un-stuff.
TP_PWR 1 6 I2C1_SDA_GPIO6_CONN
U2
PP3300_DSW 0.5A
A2 A1 R41 *SHORT_6 2
IN OUT PP3300_PCH
C12 [10,28] I2C1_SDA_GPIO6
D C8 TOUCHPANEL_PWR_R B2 B1 C19 D
EN GND [10,28] I2C1_SCL_GPIO7
4 3 I2C1_SCL_GPIO7_CONN
1U/6.3V_4 *TPL@10p/50V_4 TPL@1000p/50V_4
5
Quanta Computer Inc.
TPS22930
PROJECT : ZHNB
*PJT138K Size Document Number Rev
R347 *0_4 A
LVDS/CCD/DMIC/TS
Date: Thursday, December 04, 2014 Sheet 16 of 39
1 2 3 4 5 6 7 8
 5 4 3 2 1

PIN7 OD PIN39 OD PIN49 OD

17 D

PIN14 OD PIN41 OD PIN50 OD

PIN19 OD PIN43 OD

Debug Port(DBG) PIN22 OD

PIN28 OD
PIN30 OD
PIN37 OD
PIN44
PIN45
PIN46
PIN47
OD
OD
OD
OD
PIN38 OD PIN48 OD
CN11
PCH
1 2 SPI_CLK_BIOS SPI PCH_SPI_CLK_R [8]
SPI_CS#_BIOS 3 1 2 4 SPI_DI_BIOS
[8] PCH_SPI_CS0#_R 3 4 PCH_SPI_SI_R [8]
[8] PCH_SPI_SO_R SPI_DO_BIOS 5 6 +3V_PCH_ME
SPI_HOLD#_BIOS 7 5 6 8
[8] SPI_HOLD#_BIOS 7 8
9 10
11 9 10 12
PCH
C 13 11 12 14 GPIO_EC_RST# UART
R557 10_4 C
13 14 EC_RST# [25,26]
15 16 PCH_UART_RXD
PCH_UART_TXD 17 15 16 18 R559 *Short_4 PCH_UART_RXD [20,26]
[20,26] PCH_UART_TXD 17 18 PP3300_EC
R555 *Short_4 GPIO_SD_DECT 19 20
[28] SD_CDZ
EC_JTAG_TCK 21 19 20 22 GPIO_PWR_BTN#
EC JTAG
R560 10_4
[26] EC_JTAG_TCK 21 22 PWR_BTN_L [13,25,26]
[26] EC_JTAG_TMS EC_JTAG_TMS 23 24 EC_JTAG_TDI EC_JTAG_TDI [26]
EC_JTAG_TDO 25 23 24 26 EC_JTAG_RTCK R284 *Short_4 EC_JTAG_TCK
[26] EC_JTAG_TDO 25 26
27 28
29 27 28 30 GPIO_REC_MODE_L R561 10_4 SYS_RESET# [7,13]
PP3300_EC 29 30 RECOVERY_L [26]
31 32 EC_UART_RXD R562 *Short_4
EC_UARTRX [20,26]

Vinafix.com
R563 *Short_4 EC_UART_TXD 33 31 32 34
[20,26] EC_UARTTX 33 34 PP3300_EC
35 36
37 35 36 38
EC UART
10_4 R564 GPO_HPD 39 37 38 40 GPIO_SPI_WP
[18] HDMI_MB_HP 39 40 GPIO_SPI_WP [8]
[4,26,29,32] H_PROCHOT# 10_4 R565 GPIO_PROC_HOT# 41 42
43 41 42 44
43 44 LID_OPEN_L [26,27]
45 46
47 45 46 48
B
49 47 48 50 B
49 50
AXK750347G

A A
Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
Google Debug
Date: Thursday, December 04, 2014 Sheet 17 of 39
5 4 3 2 1
 5 4 3 2 1

HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)

[2]
[2]
INT_HDMITX2N
INT_HDMITX2P
C274
C277

C272
0.1u/16V_4
0.1u/16V_4

0.1u/16V_4
INT_HDMITX2N_C
INT_HDMITX2P_C

INT_HDMITX1N_C
INT_HDMITX2P_C

INT_HDMITX2N_C
INT_HDMITX1P_C
1
2
3
4
CN5
SHELL1
D2+SHELL3
D2 Shield
D2-
20
22 18
[2] INT_HDMITX1N D1+
C273 0.1u/16V_4 INT_HDMITX1P_C INT_HDMICLK+_C R445 *Short_4 INT_HDMICLK+_CONN 5
D [2] INT_HDMITX1P D1 Shield D
INT_HDMICLK-_C R443 *Short_4 INT_HDMICLK-_CONN INT_HDMITX1N_C 6
C276 0.1u/16V_4 INT_HDMITX0N_C INT_HDMITX0P_C 7 D1-
[2] INT_HDMITX0N D0+
C279 0.1u/16V_4 INT_HDMITX0P_C 8
[2] INT_HDMITX0P D0 Shield
INT_HDMITX0N_C 9
C271 0.1u/16V_4 INT_HDMICLK+_C INT_HDMICLK+_CONN 10 D0-
[2] INT_HDMICLK+ CK+
C269 0.1u/16V_4 INT_HDMICLK-_C 11
[2] INT_HDMICLK- CK Shield
INT_HDMICLK-_CONN 12
13 CK-
CE Remote

1
14
Layout Notes: 20141126 EOD parts, change PN. R142 R134 R127 R119 R138 R129 PP5000 HDMI_DDCCLK_MB 15 NC
DDC CLK
Place decoupling CAPs HDMI_DDCDATA_MB 16
DDC DATA
470_4 470_4 470_4 470_4 470_4 470_4 Q15 17
close to Connector 3 1 HDMI_5V 18 GND

2
IN OUT 2 HDMI_MB_HP R100 *Short_4 HP_DET_CN 19 +5V 23
GND HP SHELL4
DET 21
SHELL2

3
AP2331SA-7
R116 470_4 ABA-HDM-022-P05

1
Q19 1 2 INT_HDMICLK+_CONN
PP3300_HDMI 2 C268 D24 RV1 C83 C270
C R111 470_4 *220p/50V_4 *14V/100p_4 *5V/0.2p_4 C
2N7002K *1000p/50V_4 *1000p/50V_4
1 2 INT_HDMICLK-_CONN 20140827
R464

2
*100K/F_4 Change CN5 footprint.

1
HDMI DDC (HDM) PP5000 EMI (EMC) HDMI-detect (HDM)
PP3300_HDMI

PP3300_HDMI

R95 *SHORT_6 D6

PP3300_HDMI
PP3300_DX
RB500V-40 PP3300_HDMI
LCDVCC R86 *0_6 PP3300_HDMI R117 INT_HDMITX2P_C
*Short_4
R123 R133 *100/F_4 R422
2.2K_4 Q18 R120 *Short_4

2
B B
BSN20 2.2K_4 INT_HDMITX2N_C HDMI_MB_HP [17]
R124 HDMI_DDCCLK_COM 1 3 HDMI_DDCCLK_MB INT_HDMITX1P_C R431
[2] HDMI_DDCCLK_SW
*Short_4 1M_4

Vinafix.com

2
R122 *100/F_4
PP5000Follow CRB 1.0 change to
PP3300_HDMI 2.2K INT_HDMITX1N_C 1 3 HDMI_MB_HP
PP3300_HDMI

[2] INT_HDMI_HPD

1
D5 INT_HDMITX0P_C Q14
RB500V-40 2N7002K
R102 R457 *100/F_4 R419
*Short_4 20K_4
INT_HDMITX0N_C

2
R108 Q16 INT_HDMICLK+_CONN
2.2K_4 R99
2

BSN20 2.2K_4 R114 *100/F_4

R109 HDMI_DDCDATA_COM 1 3 HDMI_DDCDATA_MB INT_HDMICLK-_CONN

[2] HDMI_DDCDATA_SW
A *Short_4 A
Follow CRB 1.0 change to
2.2K Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
HDMI
Date: Thursday, December 04, 2014 Sheet 18 of 39
5 4 3 2 1
 1 2 3 4 5 6 7 8

WLAN\BT LGA Combo Card

19
A A
2014.08.25
+WL_VDD
Change capacitor value.

C95 C398 C394 C93

10u/6.3V_6 0.1u/10V_4 1U/6.3V_4 *0.1u/10V_4

127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93

89
88
87
86
85
84
83
82
81
+WL_VDD U27

GND_G35
GND_G34
GND_G33
GND_G32
GND_G31
GND_G30
GND_G29
GND_G28
GND_G27
GND_G26
GND_G25
GND_G24
GND_G23
GND_G22
GND_G21
GND_G20
GND_G19
GND_G18
GND_G17
GND_G16
GND_G15
GND_G14
GND_G13
GND_G12
GND_G11
GND_G10
GND_G9
GND_G8
GND_G7
GND_G6
GND_G5
GND_G4
GND_G3
GND_G2
GND_G1

GND
GND
GND
GND
GND
GND
GND
GND
GND
1 80
2 3.3V GND 79
68 3.3V GND 78
+WL_VDD 69 3.3V GND 77
3.3V GND 76 RF_OFF R631 *100K_4
GND 75
GND 74 BT_OFF R632 *100K_4
R216 PCH_SUSCLK 24 GND 73
[7] PCH_SUSCLK SUSCLK_32KHz GND
10K/J_4 72
R167 *Short_4RF_OFF 25 GND 71
(RF_On High) [26] WLAN_OFF_L W_DISABLE# GND 70
WLAN_WAKE_L 26 GND 67
B [10] WLAN_WAKE_L PEWAKE# GND 2014.08.27 B
64 Add 100K resistance pulldown.
PCIE_CLKREQ_WLAN#_Q 27 GND 59
[10,26,35] PP3300_WLAN_EN CLKREQ# GND 38 2014.09.02
R217 *Short_4 28 GND 35
[7,13,21,22,26] PLTRST# PERST# GND 100K resistance pulldown mark 「*」.
32
GND
2

30 29
[9] CLK_PCIE_WLANN REFCLKN0 GND 23
1 3 31 GND 20
[9] PCIE_CLKREQ_WLAN# [9] CLK_PCIE_WLANP REFCLKP0 GND 17
C396 0.1u/16V_4 PCIE_RX3- 33 GND 14
[9] PCIE_RX3-_WLAN PETN0 GND
2N7002K 3
R215 C397 0.1u/16V_4 PCIE_RX3+ 34 GND
Q4 [9] PCIE_RX3+_WLAN PETP0
10K/J_4 66
USB_D+ USBP3+ [9]

Vinafix.com
36
[9] PCIE_TX3-_WLAN PERN0 65
USB_D- USBP3- [9]
37
[9] PCIE_TX3+_WLAN PERP0 62 WLAN_LED1# TP45
39 LED#1
+WL_VDD CLINK_CLK 61 WLAN_OFF
2014.08.26 Swap TX/RX, and RX add capacitor. LED#2 TP44
40
CLINK_DATA 60 BT_OFF R161 *Short_4
20141126 EOD parts, change PN. W_DISABLE#2 WLAN_DISABLE_L [10]
41
CLINK_RST 58
PCMCLK (BT_On High)
42
SDIO_RESET 57
43 PCMOUT
C SDIO_WAKE C
56
44 PCMIN
SDIO_DAT3 55
45 PCMFR1
SDIO_DAT2 54
46 UART_RTS
SDIO_DAT1 53
47 UART_RX
SDIO_DAT0 52
48 UART_TX
SDIO_CMD 51
49 UART_CTS
SDIO_CLK 50
UART_WAKE

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
4
5
6
7
8
9
10
11
12
13
15
16
18
19
21
22
63
90
91
92
7260SDW

20140820 On board IC change to same as ZS8 connector

20140822 Return to another wifi onboard module 7260SDW
D
20140826 Change wifi onboard module 7260SDW footprint D

20140909 Change wifi onboard module 7260SDW footprint

20141014 Change wifi onboard module 7260SDW PN.
Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
WIFI / BT
Date: Thursday, December 04, 2014 Sheet 19 of 38
1 2 3 4 5 6 7 8
 5 4 3 2 1

NGFF SSD connector.

San Disk SSD Card.
PP3300_DX

1.5A
R289
+3V_SATA

*SHORT_8 +3V_SATA Close mSATA conn.

20
+3V_SATA

D
20141126 EOD parts, change PN. D
C216
C218 C373 C222 C223 C224 C383
10u/6.3V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4
*0.1u/10V_4 *10U/6.3V_8

rating = 1000mA @ 128G

+3V_SATA

CN14
C C

R580 *Short_4 SSD_PRESENCE 1

NGFF 2
3 PRESENCE 3.3Vaux 4
5 GND 3.3Vaux 6
7 NC NC 8
9 NC NC 10 DAS
NC DAS TP124
11 12
13 NC NOTCH 14
15 NOTCH NOTCH 16
17 NOTCH NOTCH 18
19 NOTCH NOTCH 20
21 NOTCH NC 22
23 SSD GND NC 24
25 NC NC 26
27 NC NC 28

Vinafix.com
R589 *0_4 29 GND NC 30
[17,26] PCH_UART_TXD NC NC
R588 *0_4 31 32
[17,26] PCH_UART_RXD 33 NC NC 34
35 GND NC 36 DEVSLP0 [10]
R587 *0_4
[17,26] EC_UARTTX NC NC
R586 *0_4 37 38 DEVSLP R577 *10K_4
[17,26] EC_UARTRX 39 NC DEVSLP 40
C379 0.01u/25V_4 SATA_RXP0_C 41 GND NC 42
[8] SATA_RXP0_SSD 43 SATA B+ NC 44
C381 0.01u/25V_4 SATA_RXN0_C
[8] SATA_RXN0_SSD 45 SATA B- NC 46
B B
C380 0.01u/25V_4 SATA_TXN0_C 47 GND NC 48
[8] SATA_TXN0_SSD 49 SATA A- NC 50
C382 0.01u/25V_4 SATA_TXP0_C
[8] SATA_TXP0_SSD SATA A+ NC
51 52
53 GND NC 54
20140912 NC NC
EOD parts, change PN. 55 56
57 NC MFG_DATA 58
59 GND MFG_CLK 60
61 NOTCH NOTCH 62
63 NOTCH NOTCH 64
65 NOTCH NOTCH 66
67 NOTCH NOTCH 68
R581 0_4 IFDET 69 NC SUSCLK(32KHz) 70
71 PEDET 3.3Vaux 72
73 GND 3.3Vaux 74
75 GND 3.3Vaux
GND
GND

IFDET Module Type GND

0 SSD - SATA NGFF CONN_SSD

76
77

1 SSD - PCIE

A A

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
NGFF SSD
Date: Thursday, December 04, 2014 Sheet 20 of 39
5 4 3 2 1
 1 2 3 4 5 6 7 8

NGFF 3G connector +3V_LTE

PP3300_DSW

C132
1

2
U13
*3G@TPS22965DSGR

VIN_01

VIN_02
VOUT_02

VOUT_01
8

7
C156
R598 *0_8
+3V_LTE

21
R582 *3G@0_4 CN8 *3G@1U/6.3V_4 LTE_PWREN_R 3 6
R218 ON CT *3G@0.1u/10V_4
R219 4 5
NGFF *3G@10K_4 PP5000_DSW

PAD
A LTE_CFG3 1 2 *3G@10K/J_4 VBIAS GND A
3 CONFIG_3 3.3Vaux 4
5 GND 3.3Vaux 6 C141 C140 C154

9
R201 *0_4 USBP0+_R 7 GND Power_On_Off 8 R248 *0_4
[9] USBP0+ USB_D+ W_DISABLE# LTE_DISABLE_L [10]
R207 *0_4 USBP0-_R 9 10 *3G@2200p/50V_4 *3G@0.1u/10V_4 *3G@470p/50V_4
[9] USBP0- USB_D- LED#
11 12
13 GND NC 14
15 NC NC 16
17 NC NC 18
19 NC NC 20
TP133 NC RESERVED
21 22
R263 *0_4 LTE_WAKE_L_R 23 CONFIG_0 RESERVED 24
[10] LTE_WAKE_L 25 Wake_On_WWAN# RESERVED 26 +3V_LTE
27 BODYSAR_N GPS_DISABLE# 28 UIM_VPP U32
29 GND RESERVED 30 UIM_RST USBP0+ 7 9
31 NC UIM-RESET 32 UIM_CLK USBP0- 6 D+ VCC
33 NC UIM-CLK 34 UIM_DATA 5 D- 1 USBP0+_R
35 GND UIM-DATA 36 UIM_PWR 4 M+ Y+ 2 USBP0-_R
37 NC UIM-PWR 38 M- Y- +3V_LTE
39 NC NC 40 PLTRST# R507 *3G@0_4 USB_SEL 10
41 GND RESERVED 42 8 SEL 3
[9] PCIE_RX2-_NGFF NC RESERVED OE# GND
[9] PCIE_RX2+_NGFF 43 44
45 NC RESERVED 46 *3G@PI3USB102 + C365 C353 R182 *0_4 LTE_PWREN_R
GND RESERVED [10,26] PP3300_LTE_EN
47 48
B [9] PCIE_TX2-_NGFF NC RESERVED B

1
49 50 PLTRST#_NGFF R280 *3G@0_4 PLTRST# *3G@330u/6.3V_7343 *3G@100U/6.3V_1206 C133
[9] PCIE_TX2+_NGFF NC NC +3V_LTE
51 52 CLKREQ_NGFF#
53 GND NC 54 NGFF_WAKE#_R R279 LTE_WAKE_L_R SEL OE# Y+ Y- R170 *3G@0.047u/25V_4
[9] CLK_PCIE_NGFFN

2
55 NC NC 56 *3G@0_4 X H Hi-ZHi-Z *100K_4
[9] CLK_PCIE_NGFFP NC NC
57 58 L L M+ M-
59 GND NC 60 H L D+ D- R508
ANTCTL0 RESERVED
Place near NGFF connector
61 62 *3G@10K_4 20130109 Add 3G SIM card hot swap
63 ANTCTL1 RESERVED 64 circuit.
65 ANTCTL2 RESERVED 66 SIM_DET
R251 *0_4 PLTRST#_3G 67 ANTCTL3 SIM_DET 68 USB_SEL
[7,13,19,22,26] PLTRST# Reset# NC
69 70 Peak:2.75A
TP134 CONFIG_1 3.3Vaux +3V_LTE
71 72 Normal:1.1A 2nd source: CH4471K9B03
73 GND 3.3Vaux 74
75 GND 3.3Vaux

GND
GND
C189 CONFIG_2

1
C151 C221 C220 C170 C219 C174 C152
*3G@33p/50V_4 *3G@LOTES_APCI0019-P00*A +3V_LTE
76
77

*3G@22u/6.3V_8 *3G@1u/10V_4 *3G@0.1u/16V_4 *3G@0.1u/16V_4 *3G@0.1u/16V_4 *3G@0.47u/6.3V_4 *3G@10p/50V_4

2
TP135

20140827 Change CN8 footprint.

R255

2
*10K/J_4
C C
R256 *10K/J_4 LTE_WAKE_L_R CLKREQ_NGFF# 3 1
+3V_LTE PCIE_CLKREQ_NGFF# [9]
Q5 *2N7002K

MultiMedia SIM (MNC) <Layout Notes> Keep USIM signals max length within 8000mils.

Vinafix.com
SIM_DET C217 *470P/50V_4
JSIM1 *3G@SIM-CONN Max: 7.5mA (Option)
UIM_CLK 6 1
USBP5-_R 7 CLK(C3) GND(C5) 2 UIM_PWR_R R65 *0_4UIM_PWR UIM_PWR C77 *3G@33p/50V_4
USBP5+_R 8 D-(C8) VCC(C1) 3 UIM_VPP +3V_LTE
9 D+(C4) VPP(C6) 4 UIM_RST
SIM_DET 10 CT RST(C2) 5 UIM_DATA UIM_DATA C55 *3G@33p/50V_4 U4
[2] SIM_DET CD DATA(C7) <20121004(A1A)_Huawei design guide>
Place 0.1uF near connector's VCC pin UIM_RST 1 6 UIM_VPP
GND
GND

GND
GND

CH1 CH4
+3V_LTE R69 *10K/J_4 UIM_PWR UIM_CLK C56 *3G@33p/50V_4 2 5
VN VP
13
11

12
14

UIM_CLK 3 4 UIM_DATA
UIM_RST C54 *3G@33p/50V_4 CH2 CH3
C59 C69 *3G@CM1293-04SO

D *3G@1u/6.3V_4 *3G@0.1u/16V_4 UIM_VPP C53 *3G@33p/50V_4 D

D4 1
SIM_DET 2 *5V/0.2p_4

R71 *0_4 USBP5+_R

<20110609> Un-stuff since EM820W doesn't use Vpp Quanta Computer Inc.
[9] USBP5+
R70 *0_4 USBP5-_R
[9] USBP5- PROJECT : ZHNB
Size Document Number Rev
A
NGFF/ SIM conn
Date: Thursday, December 04, 2014 Sheet 21 of 39
1 2 3 4 5 6 7 8
 1 2 3 4

20141201 Change TPM power.

TPM (TPM)

A
4 x100nF (place close to device VDD/GND pins)

TPM_VDD
PP3300_PCH

R470
2.2_6
22 A

TPM_VDD

1
C297 C287 C298 C288
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
R467
*20K_4
2

U7

TPM_GPIO 6 10
2 GPIO VDD[4] 5
NC2 VDD[3] 24
VDD[2]
near pin 21 as possible
B R465 0_4 TPM_PP 7 19 B
PP VDD[1] C291 *10p/50V_4
TPM_VDD R469 *4.7K_4 13
NC13 21
LCLK PCLK_TPM [9]
22
LFRAME# LPC_LFRAME# [8,26]
0411 FAE : install R80 value is 4K7, 14
NC14 17
and PIN7 wo an internal PD LAD3 LPC_LAD3 [8,26]
20
LAD2 LPC_LAD2 [8,26]
23
LAD1 LPC_LAD1 [8,26]
26
LAD0 LPC_LAD0 [8,26]

Vinafix.com
8 28
NC8 NC28
16 PLTRST# [7,13,19,21,26]
LRESET#[1] 9 TPM_RST_R R148 *Short_4
12 LRESET#[2]
TPM SLB9655
NC12 27 SERIRQ_R R491 *Short_4
SERIRQ IRQ_SERIRQ [10,26]
3 15
GND[1]
GND[2]
GND[3]
GND[4]
C NC3 NC15 C
1
NC1
0411 FAE : a 0ohm between pin9 to LRESET signals
SLB9655
4
11
18
25

D
Quanta Computer Inc. D

PROJECT : ZHNB
Size Document Number Rev
A
TPM SLB9655 / LED
Date: Thursday, December 04, 2014 Sheet 22 of 39
1 2 3 4
 5 4 3 2 1

Codec(ADO) Grounding circuit(ADO)

PP3300_RTC

R506
23
PIN1, PIN4, PIN3, PIN6 are ANALOG
PP3300_DX
Q22
HPR [24]
100K_4
1 6 SLEEVE
HPL [24]
R501
MIC1-VREFO 2

MIC1-VREFO-R
T5

3
D D
4 3 RING2 *100K_4
MIC2-VREFO
MIC2-VREFO [24] 5
20141112 C193 change to 0.1uF 2 R505 10K_4 PCH_AZ_CODEC_RST#
CODEC_VREF C193 0.1u/10V_4 ADOGND
ADOGND 2N7002DW Q21
INT_AMIC-VREFO C191 10u/6.3V_4 +5VA 2N7002K C327
ADOGND

C202

1u/10V_4 C200
placed close to codec *1u/10V_4

1
R630 100K_4
C206

10u/6.3V_4
20141029
1u/10V_4 C181
Add R620 100K C188 MIC1_INT_R_C
resistance 0.1u/10V_4 10u/6.3V_4
MIC1_INT_L_C
+AZA_VDD
Place next to pin 26 C345 C346 INT MIC array
*1000p/50V_4 *1000p/50V_4

36

35

34

33

32

31

30

29

28

27

26

25
+1.5VA
U16
ADOGND

CPVEE

HP-OUT-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HP-OUT-R

LINE1-VREFO-R

VREF
C215
C372 ADOGND ADOGND
10u/6.3V_4 0.1u/10V_4 DNQTZEA0000
ADOGND 37 24 LINE2-L mic-a-m-qtzea01hf-2p-top
CBP LINE2-L T3
38 23 LINE2-R CN1 R200
AVSS2 LINE2-R T1
ADOGND 1 MIC1_INTL1 MIC1-VREFO
39 22 MIC1_INT_R 1u/10V_6 MIC1_INT_R_C MIC1_INTL1 1 2
Place next to pin 40 C213 10u/6.3V_4 C172 R511 1K_4
LDO2-CAP LINE1-L 2 C239 2.2K_4
Analog 40 21 MIC1_INT_L C173 1u/10V_6 MIC1_INT_L_C R510 1K_4
AVDD2 LINE1-R INT_AMIC_SMD *22p/50V_4
Digital 41 20
+5VPVDD PVDD1 NC
L_SPK+ 42 19 C389 10u/6.3V_4 ADOGND
C368 SPK-L+ MIC1-CAP

0.1u/10V_4
L_SPK- 43
SPK-L-
ALC283 MIC2-R/SLEEVE
18 SLEEVE
SLEEVE [24]
ADOGND

C R_SPK- 44 17 RING2 C
SPK-R- MIC2-L/RING2 RING2 [24]
near Codec R_SPK+ 45 16
SPK-R+ MONO-OUT
46 15 CODEC_JDREF R211 20K/F_4 C238 0.1u/10V_4
+5VPVDD PVDD2 JDREF ADOGND
GPIO0/DMIC-DATA

PD# 47 14
GPIO1/DMIC-CLK

Low is power down

C367 amplifier output PDB Sense B
48 13 SENSEA R212 39.2K/F_4 HP_JD#
SDATA-OUT

TP59 SPDIFO/GPIO2 Sense A HP_JD# [24]

LDO3-CAP
0.1u/10V_4 ADOGND
SDATA-IN

DVDD-IO

PCBEEP
RESETB
BIT-CLK

Placement near Audio Codec

DVDD

SYNC
DVSS

49 cap place close to MIC-connector

DGND
near Codec Analog
1

10

11

12
Digital

+AZA_VDD

C205
C192

10u/6.3V_4 PCBEEP
1.6Vrms
C178 1u/10V_4 BEEP_1

C179
Vinafix.com
R247
R254 47K_4 BEEP_2 SPKR [8,10]
DMIC_DAT_L

DMIC_CLK_L

C199 4.7K_4
0.1u/10V_4 10u/6.3V_4 100p/50V_4

Place next to pin 1

PCH_AZ_CODEC_RST# HDA_DVDD-IO
PCH_AZ_CODEC_RST# [8]
TP58
TP57 PCH_AZ_CODEC_SYNC [8]

R204 *Short_4 ACZ_SDIN R262 33_4 C190 C187

PCH_AZ_CODEC_SDIN0 [8]
R567 *Short_4
R569 *Short_4 PCH_AZ_CODEC_BITCLK [8] 0.1u/10V_4 10u/6.3V_4
B B
R206 *Short_4
R519 *Short_4 C195 *22p/50V_4
R287 *Short_4
C369 *1000p/50V_4 PCH_AZ_CODEC_SDOUT [8] Place next to pin 9
C363 *1000p/50V_4

ADOGND
Codec PWR 3V/1.5V(ADO)
+1.5VA

Codec PWR 5V(ADO) Mute(ADO) +AZA_VDD

DIGITAL ANALOG

[10] PP5000_CODEC_EN R192 *Short_4 AUDIO_+5V_EN R566 PP1500_PCH_TS L7 HCB1608KF_1.5A_6

G *1K_4 20141118 Change D27 PN. C201

20140912
1

R193 C158 1U/6.3V_4 EOD parts, change PN.

100K_4 PD# BAS316 D27 PCH_AZ_CODEC_RST#
*0.047u/25V_4
2

R568
*10K_4 +3V_ADO HDA_DVDD-IO

PP3300_DX R264 *SHORT_6 R220 *SHORT_6

AVDD1
PP5000 U14 C194 +AZA_VDD
DIGITAL ANALOG
TPS22965DSGR +5VA
1U/6.3V_4 R252 *SHORT_6
1 8 +5V_ADO L4 HCB1608KF_1.5A_6
A
2
VIN_01

VIN_02
VOUT_02

VOUT_01
7 Internal Speaker footprint 88266-040xx-xxx-4p-l
20130520: Add R264 A

20140912
AUDIO_+5V_EN 3 6 EOD parts, change PN.
ON CT
PP5000_DSW R202 *SHORT_6 +5VPVDD 40mil for each signal
C160 4 5
PAD

C165 VBIAS GND CN12

C159 C175 C171 R_SPK+ R273 *SHORT_6 R_SPK+_1
1
1

*0.1u/10V_4 *10U/6.3V_8 C139 C148 470p/50V_4 R_SPK- R272 *SHORT_6 R_SPK-_1

9

0.1u/10V_4 10u/6.3V_4 L_SPK- R271 *SHORT_6 L_SPK-_1 2

0.1u/10V_4 0.047u/25V_4 L_SPK+ R270 *SHORT_6 L_SPK+_1 3 5
2

4 6
Quanta Computer Inc.
C212 C211 C210 C209 SPK_CONN_4P
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4 PROJECT : ZHNB
Size Document Number Rev
A
ALC283/HP/SPK
Date: Thursday, December 04, 2014 Sheet 23 of 39
5 4 3 2 1
 5 4 3 2 1

HEADPHONE/Mic combo(ADO)
24
[23] MIC2-VREFO MIC2-VREFO

R214 R283

2.2K_4 2.2K_4
D D

[23] RING2 RING2 L21 0_4 RING2_R

[23] SLEEVE SLEEVE L16 0_4 SLEEVE_R

CN7
SLEEVE_R 4
[23] HPR HPR R547 56_4 HPR-1 L17 *SHORT_6 HPR_SYS
HP_JD#
2
6
5
combo jack
C
[23] HPL HPL R553 56_4 HPL-1_TIP_SENSE L20 *SHORT_6 HPL_SYS
RING2_R
7
1
3
Normal open C

C349 C371 COMBOJACK_2SJ3080-003111F

DFTJ06FR463 SLEEVE_R D14 1 2 *VPORT 0402 151 MV05
2200P/50V_4 *100P/50V_4
R548 R554
C370 C344 Normal Open HPR_SYS D15 1 2 *VPORT 0402 151 MV05
*1K_4 *1K_4 PIN1 --> L
2200P/50V_4 *100P/50V_4 PIN2 --> R
PIN3 --> GND/MIC HPL_SYS D18 1 2 *VPORT 0402 151 MV05
PIN4 --> MIC/GND
PIN5 --> GND RING2_R
ADOGND ADOGND ADOGND D19 1 2 *VPORT 0402 151 MV05
PIN6 --> JD
HP_JD# PIN7 --> Shielding
[23] HP_JD# ESD 2'nd CY00G050B00
B B
ADOGND

Vinafix.com
A A
Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
Audio Headset SW
Date: Thursday, December 04, 2014 Sheet 24 of 39
5 4 3 2 1
 5 4 3 2 1

K/B (KBC) TOUCHPAD BOARD CONN (TPD)

CN13
TP_PWR L6 *SHORT_6
25

1
KB_ROW00 24 25 C203 D31
[26] KB_ROW00 KB_ROW01 23 26
[26] KB_ROW01 KB_ROW02_SW 22 0.1u/10V_4 *VPORT_6 DFFC08FR093

2
KB_ROW03 21 50501-0080n-001-8p-l
[26] KB_ROW03 KB_ROW04 20 R286 *Short_4
D [26] KB_ROW04 KB_ROW05 19 CN10 D
[26] KB_ROW05 Q8 30mil
KB_ROW06 18 +TPVDD 8
U33 [26] KB_ROW06 KB_ROW07 17 TPCLK_CN 7
KB_ROW00 1 6 KB_ROW03 [26] KB_ROW07 KB_ROW08 16 1 6 TPDATA_CN 6
I/O 1 I/O 4 [26] KB_ROW08 KB_ROW09 15 5
2 5 [26] KB_ROW09 KB_ROW10 14 2 I2C_TP_SDA_R 4
GND VDD PP5000_DSW [26] KB_ROW10 [10] I2C0_SDA_GPIO4
KB_ROW11 13 I2C_TP_SCL_R 3
[26] KB_ROW11 [10] I2C0_SCL_GPIO5
KB_ROW01 3 4 KB_ROW04 KB_ROW12 12 TRACKPAD_INT_L_CONN 2 9
I/O 2 I/O 3 [26] KB_ROW12 KB_COL07 11 4 3 1 10
[26] KB_COL07 10 TP110
KB_COL06
[26] KB_COL06 9 5
AZC099 KB_COL05 Touch_Pad_8P
[26] KB_COL05
U34 KB_COL04 8
KB_ROW05 1 6 KB_ROW07 [26] KB_COL04 KB_COL03 7
I/O 1 I/O 4 [26] KB_COL03
KB_COL02_SW 6 *2N7002DW 20140827 Change CN10 footprint.
2 5 KB_COL01 5 R278 *Short_4
GND VDD PP5000_DSW
[26] KB_COL01 KB_COL00 4 R277 *10K_4 I2C_TP_SDA_R D29 1 2 *5V/0.2p_4
[26] KB_COL00 TP_PWR
KB_ROW06 3 4 KB_ROW08 KB_PWR_ON_L 3 R288 *10K_4 I2C_TP_SCL_R D30 1 2 *5V/0.2p_4
I/O 2 I/O 3 PP3300_PCH
2 R266 *10K_4 TPCLK_CN
R276 *Short_4 1 TP_PWR TP_PWR R267 *10K_4 TPDATA_CN
[13,17,26] PWR_BTN_L
AZC099
U35
KB_ROW09 1 6 KB_ROW12 KB_CONN
I/O 1 I/O 4
2 5 Touch Panel interrupt R274
GND VDD PP5000_DSW
TPL@10K_4

2
KB_ROW10 3 4 KB_ROW11 U36
I/O 2 I/O 3 KB_COL04 1 6 KB_COL02_SW
I/O 1 I/O 4
DSW
3 1
[10] TRACKPAD_INT_L
AZC099 2 5 Q9 TPL@2N7002K
GND VDD PP5000_DSW
C C
U37 KB_COL00 3 4 KB_ROW02_SW D20
I/O 2 I/O 3 [2] TRACKPAD_INT_DX
KB_COL03 1 6 KB_COL06 TPL@RB500V-40
I/O 1 I/O 4
2 5 AZC099
GND VDD PP5000_DSW
DX
KB_COL07 3 4 KB_COL05 KB_PWR_ON_L D32 1 2 5V/0.2p_4
I/O 2 I/O 3
KB_COL01 D33 1 2 5V/0.2p_4
AZC099
PP5000

[26] FAN_GATED_EN

R599 R600

1
Vinafix.com
*1M_4

2
100K_4 Q27

HOLELESS RESET PP3300_RTC

1
*2N7002K
3
Q26
2
*AO3409 R432
0_8

2-CHIP(KBC)

3
R625 R624
*4.7K_4 +5V_FAN1
1M_4
PP3300_RTC
BATT_EN#
BATT_EN# [27,29]
B B
R626 4.7K_4 KB_ROW02_SW
R627 *4.7K_4 KB_COL02
CPU FAN1 (THM)
3
R628 *4.7K_4 EC_IN_RW Check pin define 0321
Pin 3,5,8,11 Open Drain Q33
footprint 88266-040xx-xxx-4p-l
BATT_ENABLE 2

2N7002K PP3300_FAN PP5000 PP3300_FAN

C392
1

PP3300_RTC 2.2U/6.3V_4 Check FAN power leakage

R442 R441 R438
1K_4
10K_4 10K_4

R268 C198 CN4

[26] EC_FAN_TACH
0.1U/16V_4 20141126 EOD parts, change PN. +5V_FAN1
1

2
10K_4 2
3 5
1

U17 1 3 FAN_PWM_CN1
[26] EC_FAN_PWM 4 6
VDD

Connect to EC reset pin Q17 30mil

PWR_BTN_L 2 12 EC_RST# MMBT3904-7-F FAN_CONN_4P
PW R_BTN_L EC_RST_L EC_RST# [17,26]
Connect to GPIO on CPU
BATT_ENABLE 3 11 EC_IN_RW with PU to GPIO power
BATT_ENABLE EC_IN_RW EC_IN_RW [10]
PP3300_DSW PP3300_DX
R285 *Short_4 ACPRESENT_4137 4 10 EC_ENTERING_RW
well
[26,29] ACIN AC_PRESENT EC_ENTERING_RW EC_ENTERING_RW [26]
Connect to EC pin C5 (must
A KB_ROW02_SW 5 9 be low when EC IN RESET) R439 *0_4 PP3300_FAN A
KSO_SW KSO_INV KB_ROW02 [26]
KB_COL02_SW 6 8
PAD_GND

R436 *Short_4
KSI_SW KSI KB_COL02 [26]
GND

SLG4K4350VTR Quanta Computer Inc.

7

13

20141119 co-layout 4K4108 and 4K4137

U17 change part NO. same as 0C7. SLG4K4108 (AL004108000) PROJECT : ZHNB
SLG4K4137 (AL004137000) Size Document Number Rev
4K4137 PIN3 is BATT_ENABLE
4K4137 PIN4 is AC_PRESENT KB/TP/FAN/HW Reset A

Date: Thursday, December 04, 2014 Sheet 25 of 39

5 4 3 2 1
 5 4 3 2 1

EC(KBC)
26
PP3300_EC_ANA PP3300_EC NMI_DBG_L D8 RB500V-40
PP3300_EC PCH_NMI_DBG_L [8]
PP3300_EC
C362 C149 C332 C342 C335 C343 C143 C137
L15 2 1 PP3300_DSW NMI_DBG_L R175 10K_4
1u/6.3V_4 1u/6.3V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1000p/50V_4 1000p/50V_4 BLM18AG121SN1D/0.2A/120ohm_6 2.2_6 R196 FAN_ALERT# R174 10K_4
C323 C336 C350 PWR_LED1 R210 *10K_4
20140912 EC_ACIN R259 10K_4
2.2U/6.3V_4 10u/6.3V_4 0.1U/10V_4 EOD parts, change PN. PP3300_EC_ANA 20140912 TOUCH_RST_L R177 10K_4
EOD parts, change PN. EC_RST#_R R504 10K_4

K13
F10
J10
D7

D3

D6
EC_LPCPD# R173 10K_4

E6
E8
E9

J7
J9

J1
J6
20141107 Change U5 PN. U15 20140912 LID_OPEN_R R10 10K_4
EOD parts, change PN. PP3300_RTC

VDDA
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDDC1
VDDC2
VDDC3
VDDC4
20141201 Change U5 new PN. C361
C348 C352 LID_OPEN_R D3 LID_OPEN_L R282 10K_4
D C347 1u/6.3V_4 0.1U/10V_4 0.01U/16V_4 RB500V-40 D
D2 C351 C360 [17,27] LID_OPEN_L
VREFA_P D1 1u/6.3V_4 0.1U/10V_4 0.01U/16V_4
B13 VREFA_M
[8,22] LPC_LAD0 PL3/LPC0AD0/T1CCP1/WT1CCP1 ECGND
A13 ECGND [25,29] ACIN ACIN D16 RB500V-40 EC_ACIN
[8,22] LPC_LAD1 PL2/LPC0AD1/T1CCP0/WT1CCP0
C12 E10 EC_SMB0_CLK EC_SMB0_CLK [29]
[8,22] LPC_LAD2 PL1/LPC0AD2/T0CCP1/WT0CCP1 PB2/I2C0SCL/T3CCP0
D11 D13 EC_SMB0_DATA EC_SMB0_DATA [29]
PP3300_EC [8,22] LPC_LAD3 PL0/LPC0AD3/T0CCP0/WT0CCP0 PB3/I2C0SDA/T3CCP1
H12 LPC C196
[9] CLK_PCI_EC PM5/LPC0CLK
D12 SMBUS INTF M4 EC_SMB1_CLK
[8,22] LPC_LFRAME# PL4/LPC0FRAME_L/T2CCP0/WT2CCP0 PA6/I2C1SCL
EC_LPCPD# F13 N2 EC_SMB1_DATA 0.1U/10V_4
RP1 10K_10P8R C13 PM0/LPC0PD_L/T4CCP0/WT4CCP0 PA7/I2C1SDA
[7,13,19,21,22] PLTRST# PL5/LPC0RESET_L/T2CCP1/WT2CCP1
10 1 KB_COL03 F12 F4 EC_SMB2_CLK EC_SMB2_CLK [28]
[8] EC_SCI_L PM1/LPC0SCI_L/T4CCP1/WT4CCP1 PB6/I2C5SCL/SSI2RX/T0CCP0
KB_COL07 9 2 KB_COL02 H13 F3 EC_SMB2_DATA EC_SMB2_DATA [28]
[10,22] IRQ_SERIRQ PM4/LPC0SERIRQ PB7/I2C5SDA/SSI2TX/T0CCP1
KB_COL06 8 3 KB_COL01
KB_COL05 7 4 KB_COL00 M9 PCH_WAKE_L D/C# R199 *100K_4
PF0/NMI/SSI1RX/T0CCP0/TRD2 PCH_WAKE_L [7]
KB_COL04 6 5 KB_COL00 G2 N9 PCH_RSMRST_L
[25] KB_COL00 PK0/AIN16/SSI3CLK PF1/SSI1TX/T0CCP1/TRD1 PCH_RSMRST_L [7]
KB_COL01 G1 L10 NMI_DBG_L
[25] KB_COL01 KB_COL02 H1 PK1/AIN17/SSI3FSS PF2/NMI/SSI1CLK/T1CCP0/TRD0 K10 PCH_SUSACK_L
[25] KB_COL02 PK2/AIN18/SSI3RX PF3/SSI1FSS/T1CCP1/TRCLK PCH_SUSACK_L [7]
KB_COL03 H2 L9 EC_SMI_L
PP1050_PCH
[25]
[25]
KB_COL03
KB_COL04
KB_COL04
KB_COL05
B11
B12
PK3/AIN19/SSI3TX
PK4/RTCCLK/U7RX
PF4/T2CCP0/TRD3
PF5/T2CCP1
K9
N8
PCH_PWROK
PCH_RTCRST
EC_SMI_L
PCH_PWROK
[8]
[5,7]
SM BUS/I2C PU(KBC)
[25] KB_COL05 PK5/U7TX PF6/I2C2SCL/T3CCP0 PCH_RTCRST [8,13]
KB_COL06 C11 M8 PCH_SRTCRST BATT and CHARGER / LCD BL PP3300_EC
[25] KB_COL06 PCH_SRTCRST [8]
3

KB_COL07 A12 PK6/FAN0PWM1/WT1CCP0 PF7/I2C2SDA/T3CCP1 L8 PCH_DPWROK

Q3 [25] KB_COL07 PK7/FAN0TACH1/WT1CCP1 TO PCH PG0/I2C3SCL/T4CCP0 K8 PCH_HDA_SDO
PCH_DPWROK [7]
EC_SMB0_CLK R185 4.7K_4
PG1/I2C3SDA/T4CCP1 PCH_HDA_SDO [8]
KB_ROW00 M13 N7 PCH_SUSWARN_L EC_SMB0_DATA R186 4.7K_4
[25] KB_ROW00 PP0/T4CCP0 PG2/I2C4SCL/T5CCP0 PCH_SUSWARN_L [7]
EC_PECI_TX 2 KB_ROW01 L12 M7 PCH_SLP_SUS_L
[25] KB_ROW01 PP1/T4CCP1 PG3/I2C4SDA/T3CCP1 PCH_SLP_SUS_L [7,35]
KB_ROW02 M5 K7 PCH_UART_RXD_R R558 *Short_4 PCH_UART_RXD [17,20] Light BAR PP3300_DX
[25] KB_ROW02 PP2/T5CCP0 PG4/I2C1SCL/U2RX/WT0CCP0
KB_ROW03 J12 L7 PCH_UART_TXD_R R512 *Short_4 PCH_UART_TXD [17,20]
[25] KB_ROW03 PP3/T5CCP1 PG5/I2C1SDA/U2TX/WT0CCP1
2N7002K KB_ROW04 J13 KB N4 PCH_SLP_S0_L EC_SMB1_CLK R209 4.7K_4
[25] KB_ROW04 PP4/WT0CCP0 PG6/I2C5SCL/WT1CCP0 PCH_SLP_S0_L [7,13]
KB_ROW05 L5 N3 PCH_SLP_S3_L EC_SMB1_DATA R213 4.7K_4
[25] KB_ROW05 PCH_SLP_S3_L [7,13,30,31,33,35]
1

43_4 R250 EC_PECI_RX KB_ROW06 D8 PP5/WT0CCP1 PG7/I2C5SDA/U2TX/WT1CCP0 K3 PCH_PWRBTN_L

[4] H_PECI [25] KB_ROW06 PP6/WT1CCP0 PH0/SSI3CLK/WT2CCP0 PCH_PWRBTN_L [7]
KB_ROW07 K6 K4 PCH_SLP_S5_L
[25] KB_ROW07 PP7/WT1CCP1 PH1/SSI3FSS/WT2CCP1 PCH_SLP_S5_L [7,13,30,35]
KB_ROW08 D4 J4 SYS_PWROK THERMAL SENSOR PP3300_DX
[25] KB_ROW08 PQ0/WT2CCP0 PH2/FAN0PWM5/SSI3RX/WT5CCP0 SYS_PWROK [5,7,13]
R249 KB_ROW09 E4 J2 EC_ACIN
C [25] KB_ROW09 PQ1/WT2CCP1 PH3/FAN0TACH5/SSI3TX/WT5CCP1 C
KB_ROW10 F5 G11 LPC_CLKRUN_L EC_SMB2_CLK R498 4.7K_4
[25] KB_ROW10 PQ2/WT3CCP0 PM2/LPC0CLKRUN_L/T5CCP0/WT5CCP0 LPC_CLKRUN_L [7]
330_4 KB_ROW11 N5 E12 EC_RCIN_L_R R578 0_4 EC_SMB2_DATA R499 4.7K_4
[25] KB_ROW11 PQ3/WT3CCP1 PL6/T3CCP0/WT3CCP0 EC_RCIN_L [10]
KB_ROW12 N6 E13 PCH_BL_PWM_R R172 *0_4
[25] KB_ROW12 PQ4/WT4CCP0 PL7/T3CCP1/WT3CCP1 PCH_BL_PWM [2,16]

[13,17,25] PWR_BTN_L PWR_BTN_L M2 G3 EC_FAN_PWM

PA2/SSI0CLK PN2/FAN0PWM2/WT2CCP0 EC_FAN_PWM [25]
LID_OPEN_R M3 D10 EC_FAN_TACH
PA3/SSI0FSS PN3/FAN0TACH2/WT2CCP1 EC_FAN_TACH [25] H_PROCHOT# [4,17,29,32]
EC_SPI_WP_D L4 FAN L11 BAT_LED1
BAT_LED1 [28]

3
RECOVERY_L N1 PA4/SSI0RX PN4/FAN0PWM3/WT3CCP0 N12
[17] RECOVERY_L PA5/SSI0TX PN5/FAN0TACH3/WT3CCP1 TP48
[28] FAN_ALERT# FAN_ALERT# F11 PERIPHERAL INTF Q24
PROCHOT_EC E11 PB0/T2CCP0/U1RX
BAT_TEMP B6 PB1/T2CCP1/U1TX C4 EC_PECI_RX PROCHOT_EC 2
[29] BAT_TEMP PB4/AIN10/SSI2CLK/T1CCP0 PJ7/PECI0RX
DC_LED A6 PECI C6 EC_PECI_TX
TP49 PB5/AIN11/SSI2FSS/T1CCP1 PJ6/PECI0TX
PP3300_LTE_EN C2
[10,21] PP3300_LTE_EN PD2/AIN13/SSI1RX/SSI3RX/WT3CCP0

Vinafix.com
EC_ENTERING_RW C1 R265 2N7002K
[25] EC_ENTERING_RW PD3/AIN12/SSI1TX/SSI3TX/WT3CCP1 H10 PCH_BL_EN_R R502 *Short_4
PCH_BL_EN [2,16]

1
TP_SHDN_L B8 PM3/T5CCP1/WT5CCP1 H11 EC_BL_PWM 100K_4
[16] TP_SHDN_L PN1/AIN22 PM6/FAN0PWM0/WT0CCP0 EC_BL_PWM [16]
PWR_LED1 N11 L13 EC_BL_EN
[28] PWR_LED1 PN6/FAN0PWM4/WT4CCP0 PM7/FAN0TACH0/WT0CCP1 EC_BL_EN [16]
PP3300_DX_EN A9 LOAD SW UNUSED M11 TOUCH_RST_L
[35] PP3300_DX_EN PJ2/T2CCP0/U5RX PN7/FAN0TACH4/WT4CCP1 TOUCH_RST_L [16]
FAN_GATED_EN C8 C9 PP3300_WLAN_EN
[25] FAN_GATED_EN PJ3/T2CCP1/U5TX PJ0/T1CCP0/U4RX PP3300_WLAN_EN [10,19,35]
WLAN_OFF_L D5 B9 PCH_EDP_VDD_EN_R R198 *Short_4
[19] WLAN_OFF_L PJ4/C2_P/T3CCP0/U6RX PJ1/T1CCP1/U4TX PCH_EDP_VDD_EN [2,16]
C5 EC_EDP_VDD_EN EC_EDP_VDD_EN [16]
CPU_PGOOD L2 PJ5/C2_M/T3CCP1/U6TX
[4] CPU_PGOOD PC4/C1_M/U1RX/U4RX/WT0CCP0
R261 *0_4 VCORE_EN_R L1
[32] VCORE_EN PC5/C1_P/U1TX/U4TX/WT0CCP1
R260 *Short_4 IMVP_PWRGD_3V_R K1 L3 EC_UART0_RX
[10]
[31]
IMVP_PWRGD_3V
SUSP_VR_EN
SUSP_VR_EN
PP1050_PGOOD
K2
J3
PC6/C0_P/U3RX/WT1CCP0
PC7/C0_M/U3TX/WT1CCP1 UART
PA0/U0RX
PA1/U0TX
M1 EC_UART0_TX
EC_UARTRX
EC_UARTTX
[17,20]
[17,20] EC HIB WAKE SOURCES
[5,31] PP1050_PGOOD PH4/SSI2CLK/WT3CCP0 PP3300_RTC
PP1350_EN H4 VR CTRL
[30] PP1350_EN PH5/SSI2FSS/WT3CCP1
PP1350_PGOOD H3 C10 EC_JTAG_TCK EC_JTAG_TCK [17]
[30] PP1350_PGOOD PH6/SSI2RX/WT4CCP0 PC0/SWCLK/T4CCP0/TCK
PP5000_EN G4 A10 EC_JTAG_TMS EC_JTAG_TMS [17]
[33,34] PP5000_EN PH7/SSI2TX/WT4CCP1 PC1/SWDIO/T4CCP1/TMS
PP5000_PGOOD A8 JTAG A11 EC_JTAG_TDO EC_JTAG_TDO [17]
[34] PP5000_PGOOD PN0/AIN23 PC3/SWO/T5CCP0/TDO
PP3300_DSW_EN M12 B10 EC_JTAG_TDI EC_JTAG_TDI [17] R281
[34] PP3300_DSW_EN HIB_L PC2/T5CCP1/TDI 1K_4
B BAT_LED0 B2 A2 TP53 B
[28] BAT_LED0 PD0/AIN15/I2C3SCL/SSI1CLK/SSI3CLK/WT2CCP0 NC
PWR_LED0 B1 K12 PP3300_RTC PP3300_RTC PWR_BTN_L D17 RB500V-40
[28] PWR_LED0 PD1/AIN14/I2C3SDA/SSI1FSS/SSI3FSS/WT2CCP1 VBAT
USB2_CTL3 A4 N13 EC_WAKE_L
TP50 PD4/AIN7/U6RX/WT4CCP0 WAKE_L
USB2_PWR_EN B4 EC32K_X1 C128 18p/50V_4
[28] USB2_PWR_EN PD5/AIN6/U6TX/WT4CCP1

1
USB2_ILIM_SEL A3 N10 EC_WAKE_L
TP52 PD6/AIN5/U2RX/WT5CCP0 XOSC1
USB2_STATUS_L B3 M10
TP54
USB2_OC_L F1 PD7/AIN4/NMI/U2TX/WT5CCP1 USB CHARGE CTRL XOSC0 K11
[28] USB2_OC_L PE0/AIN3/U7RX GNDX
R258 *Short_4 USB1_CTL1 F2 R180 Y1
[9] USB_OC2# TP55

3
USB1_CTL2 E1 PE1/AIN2/U7TX C3 20M_4 32.768KHZ
TP56 PE2/AIN1 GNDA1
ICMNT E2 E3 R546 *Short_4 Q7
[29] ICMNT

3
USB1_PWR_EN A5 PE3/AIN0 GNDA2 EC32K_X2 C127 18p/50V_4
[27] USB1_PWR_EN

2
USB1_ILIM_SEL B5 PE4/AIN9/I2CSCL/U5RX A1 Q6 LID_OPEN_L C208 0.01U/16V_4 2
TP51 PE5/AIN8/I2CSDA/U5TX GND1
D/C# A7 C7 ECGND
[29] D/C# PE6/AIN21 GND2
USB1_OC_L B7 D9 ECGND ACIN C197 0.1U/10V_4 2
[27] USB1_OC_L PE7/AIN20 GND3
R205 *Short_4 E5 R275 2N7002K
[9] USB_OC0#
EC_BRD_ID1 K5 GND4 F9 SM BUS ARRANGEMENT TABLE 47K_4

1
EC_BRD_ID2 M6 PQ5/WT4CCP1 GND5 H5 R269 2N7002K
EC_BRD_ID3 L6 PQ6/WT5CCP0 BRD ID GND6 H9 SM Bus 0 BATT and CHARGER 47K_4

1
PQ7/WT5CCP1 GND7 J11
GND8
20140912
J5 EOD parts, change PN.
G12 GND9 J8
TP47 OSC0 GND10
SM Bus 1 NA
G13
TP46 OSC1
R576 0_4 EC_RST#_R G10
[17,25] EC_RST# RST_L
SM Bus 2 THERMAL SENSOR
C325 0.1U/10V_4
[28] EC_RST#_R
TM4E1G31H6ZRBI

PP3300_EC
20141120 Change EC_BRD_ID, 20141118 Change D28 PN. For test only
ID2 change to High,
ID3 change to Low, J1
R518 R197 R514 EC_RST#_R D28 BAS316 SYS_SHDN#
SYS_SHDN# [10,33,34]
because EC change code. 2 1 PWR_BTN_L
A
PP3300_EC R517 100K_4 A
*100K_4 100K_4 *100K_4 *SHORT_ PAD1
EC_SPI_WP_D R515 100K_4 SPI_WP_ME [8,27]
EC_BRD_ID1 PP1350_EN
EC_BRD_ID2 PP5000_EN
EC_BRD_ID3 PP3300_DSW_EN

R516 R203 R509

R176
100K_4
R513
100K_4
R257
100K_4
Quanta Computer Inc.
100K_4 *100K_4 100K_4
PROJECT : ZHNB
Size Document Number Rev
A
KBC TI TM4E1G31H6ZRBI
Date: Thursday, December 04, 2014 Sheet 26 of 39
5 4 3 2 1
 5 4 3 2 1

PP5000
USB3.0(USB) 20140924 Add C399/D34
Lid Switch (HSR)
27

1
C399 D34
C117 BZT52-B5V6S(5.6V)
1u/6.3V_4 *100U/6.3V_3528

2
U8

2
2 8 USBPWR1 PP3300_RTC R12 *100K_4
3 IN1 OUT3 7
IN2 OUT2 6 C113
4 OUT1 + C310
[26] USB1_PWR_EN EN
1 1000p/50V_4 R11
D GND 5 220U/6.3V/ESR35_3528 *SHORT_6 D
OC#
UP7534ARA8-15
1 2 LID_OPEN_L
[26] USB1_OC_L LID_OPEN_L [17,26]

1
C6
D2 1u/6.3V_4 D1

3
*VPORT_6 MR1 *VPORT_6
USBP1- R497 *Short_4 USB 3.0 Connector YB8251ST23
[9] USBP1-

2
USBP1+ R500 *Short_4
[9] USBP1+
CN6
1
1 VBUS
USBP1-_R 2
2 D-
USBP1+_R 3
4 3 D+
USB3_RXN0 R194 *Short_4 USB3_RXN0_R 5 4 GND
[9] USB3_RXN0 5 SSRX-
USB3_RXP0 R191 *Short_4 USB3_RXP0_R 6
[9] USB3_RXP0 6 SSRX+
7
USB3_TXN0_R 8 7 GND
USB3_TXP0_R 9 8 SSTX-
9 SSTX+

13
12
11
10
USB3.0 CONN

13
12
11
10
C131 0.1u/16V_4 USB3_TXN0_C R179 *Short_4
[9] USB3_TXN0
C126 0.1u/16V_4 USB3_TXP0_C R171 *Short_4
[9] USB3_TXP0
C USBP1-_R D25 1 2 *5V/0.2p_4 C

20141126 EOD parts, change PN. USBP1+_R D26 1 2 *5V/0.2p_4 ADOGND

USB3_RXN0_R D13 1 2 *5V/0.2p_4

USB3_RXP0_R D12 1 2 *5V/0.2p_4

USB3_TXN0_R D11 1 2 *5V/0.2p_4

USB3_TXP0_R D7 1 2 *5V/0.2p_4

HOLE(OTH) Vinafix.com
20140909 Change HOLE19 footprint.
BATT Enable short pad
HOLE24 SW1
*O-ZHN_MB-3
HOLE20 HOLE16 HOLE18 HOLE21 HOLE17 HOLE23 3 2 BATT_EN#
BATT_EN# [25,29]
*HG-C295D197P2 *HG-C295D98P2 *HG-C295D98P2 *HG-C295D98P2 *HG-C295D98P2 *HG-C295D98P2 3 4 1
7 6 7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4 *Lid Switch

2
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

B B
20141119 HOLE24 remove BATT_EN# pin3.
SW1 change to un-stuff,
CPU HOLE25
*H-te295x295i98bc295d98pt
because enable control by U17.
HOLE22
*HG-C295D98P2
HOLE26
*OG-ZHN_MB-1
HOLE19
*h-c197d98p2
HOLE1
*H-C221D150P2
HOLE6
*H-C221D150P2
HOLE2
*H-C221D150P2
HOLE7
*H-C221D150P2
ROM WP# 3 SPI_WP_ME_R R573 1K_4
SPI_WP_ME [8,26]
7 6 7 6
8 5 8 5
9 4 9 4

2
1
2
3

1
2
3

EMI Cap C106 0.1u/50V_6

VIN 1 2 PP3300_DSW
C3 0.1u/50V_6
HOLE3 HOLE9 HOLE4 HOLE8 HOLE11 HOLE14 HOLE13 1 2 +VCCIN
*SPAD-C236PT *SPAD-C236PT *SPAD-C236PT *SPAD-C236PT *SPAD-C236PT *SPAD-C236PT *SPAD-C236PT C2 0.1u/50V_6
1 2 PP1050_PCH

C4 0.1u/10V_4
+VCCIN
1 2 PP1050_PCH
1

C34 0.1u/10V_4
PP3300_DSW 1 2 PP1050_PCH
A A

HOLE10 HOLE5 HOLE12 HOLE15

*SPAD-C236PT *SPAD-C236PT *SPAD-C236PT *H-C91D91NP

Quanta Computer Inc.

1

PROJECT : ZHNB
Size Document Number Rev
A
USB3/Hole
Date: Thursday, December 04, 2014 Sheet 27 of 39
5 4 3 2 1
 A B C D E

Thermal Sensor(THM) FUNCTION DB

PP3300_DX
PP5000

C214 1u/6.3V_4
USBPWR2
28
U26 U18
4 4
2 8 USBPWR2
8 1 C289 0.1u/10V_4 3 IN1 OUT3 7
[26] EC_SMB2_CLK

1
SCLK VCC IN2 OUT2 6 C204
7 2 THM_DXP 4 OUT1 C364
[26] EC_SMB2_DATA SDA DXP [26] USB2_PWR_EN EN
1 1000p/50V_4
R489 *Short_4 6 3 GND 5 *100u/6.3V_1206
[26] FAN_ALERT#

2
ALERT# DXN OC#

3
R583 *0_4 Q20
EC_RST#_Q R584 *Short_4 4 5 C299 2 UP7534ARA8-15
OVERT# OVERT# GND 2200p/50V_4
[26] USB2_OC_L
MMBT3904-7-F
Need place on DB side

1
G781P8 THM_DXN
ADDR=7H_0x4C
Place oo PCB TOP
Place oo PCB BOT Remote Temp.
Local Temp. L19 L18
USBP4- 4 3 USBP4-_R [9] USBP6+ 1 2 USBP6+_R
[9] USBP4- 4 3 1 2
USBP4+ 1 2 USBP4+_R 4 3 USBP6-_R
[9] USBP4+ 1 2 [9] USBP6- 4 3
3 EC_RST#_Q DLW21HN900SQ2L_C/330mA/90ohm DLW21HN900SQ2L_C/330mA/90ohm 3
2

1 3 PP3300_EC 20141201 stuff L18/L19, remove R549/R550/R551/R552.

[26] EC_RST#_R

OVERT# R585 *10K_4 footprint 88511-2001-20p-l

Q25
*AO3409 DFFC20FR043

PP3300_DSW
20140925 Q25/R585 mark 「*」」un-stuff. CN9
OVERT# power PP3300_DX change to PP3300_EC. 20
19 20
[26] BAT_LED0 19
[26] BAT_LED1 18
17 18
[26] PWR_LED0 17
+3VPCU [26] PWR_LED1 16
2 Light sensor & TP (SER) HSR
LID_OPEN_L PP3300_DX
15
14
13
16
15
14
2

12 13
GND USBPWR2 12
PP3300_DX 11

Vinafix.com
10 11
+3VPCU 10
9
8 9
LED LED x 4 [17] SD_CDZ 8
R327 7
USBP4+_R 6 7
*Short_4 GND 6
USBP4-_R 5
4 5
+3V x 2 4
+3V_LS USBP6+_R 3
U1 USBP6-_R 2 3 22
GND x 2 2 22
C232 USB 1 21
R324 SEN_SDATA 6 1 1 21
[10,16] I2C1_SDA_GPIO6 SDA VDD USBP0+
*Short_4 *0.1u/10V_4 FUNCTION/B
[10,16] I2C1_SCL_GPIO7 R323 SEN_SCLK 5 2 USBP0-
*Short_4 SCL GND
R326 ALS_INT_R 4 3 LS_SET R328 *499K/F_4 CR_DET
[2] ALS_INT_L INT REXT
1 *Short_4 1
CR +3V x 2
INT PU at CPU side *ISL29023 Quanta Computer Inc.
USBP6+
ADDR: 1000100 USBP6- PROJECT : ZHNB
Size Document Number Rev
GND x 2 A
DB/ALS/Thermal sensor
Date: Thursday, December 04, 2014 Sheet 28 of 39
A B C D E
 5 4 3 2 1

dcjk-2dc3079-007511f-2p

PJ1
2
1
3
VA
PL2
0_8
VA1

1
2
3
PQ12
AOL1413

5
VA2
PD3
SBR1045SP5-13
1

2
3 1
PR125
0.01/F_0612

2
VIN
1
2
3
PQ9
AOL1413

5
29
4 PR129

1
*Short_4
POWER_JACK PC9 PC10 PR26 24737_ACN PC62 PC61

4
0.1u/50V_6 0.1u/50V_6 220K/F_4 0.1u/50V_6 2200p/50V_6 PR127
PL1 PD2 33K/F_4
D 0_8 SMAJ20A 24737_ACP D

2
PC7 PC8 PR130
0.1u/50V_6 2200p/50V_6 1 6 *Short_4
PD4
1N4148WS PR27 2 5 PR131
D/C# [26]
220K/F_4 10K_4
20140912 EOD parts, change PN. recommend 200mA at least. 3 4 PR34

3
*Short_4
20141016 Change DC-in Part number. (new module) PQ3
20141201 Change DC-in footprint. IMD2AT108
2

PQ15
24737_ACP 2N7002K

1
24737_ACN

PR135
*SHORT_6 PC73 PC77 PC74
PR136 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
63.4K/F_4
PC79
PP3300_RTC 68n/10V_4

1
VIN
PR140 PC88

ACP

ACN
C 10K/F_4 1u/16V_6 C
24737_ACDET 6 16 24737_REGN
ACDET REGN
PR55 PR52 PR53 PC21
10K_4 4.7K_4 100K_4 0.1u/25V_4 PD5
24737_VCC 20 RB500V-40
VCC PC81 PC75
PR137 PC78 PR146 *SHORT_6 2200p/50V_6 10u/25V_8
20_1206 0.47u/25V_6 17 24737_BST
[25,26] ACIN

5
BTST
PC83 20141201
RB500V-40 D10 47n/50V_6 PQ19
[7] ACPRESENT
MDV1528
Capacitor 4.7uF Change to 10uF.
18 24737_DH 4
6

5 HIDRV
ACOK#
19 24737_LX

3
2
1
PHASE PR155
0.01/F_0612
EC_SMB0_DATA 8 PU13 PL7
PQ7 SDA BQ24707A 6.8uH_7X7X3

Vinafix.com
2N7002DW PR145 15 24737_DL 1 2 BAT-V
1

*Short_4 LCDRV
0410 please confirm battery_en EC_SMB0_CLK 9

5
SCL
PC25 PP3300_RTC PR147
0.1u/50V_6 PR153 *Short_4 14 PQ18 PR58
10K_4 PGND MDV1595S *4.7_6
24737_BM# 11 4 PR154 PR156
B BM# B
PC30 *Short_4 *Short_4
*100p/50V_4 PR139 PC93
*10K_4 24737_CMPOUT 3 0.1u/25V_4

3
2
1
CMPOUT 13 PR152 24737_SRP 24737_SRP PC26 PC98 PC94
BAT-V SRP 10_6 PC22 2200p/50V_6 10u/25V_1206 10u/25V_1206
24737_ILIM 10 PC91 *680p/50V_6 24737_SRN
C114F3-108A1-L_Batt_Conn

PJ2 ILIM 0.1u/25V_4

PR59
9 8 316K/F_4 24737_CMPIN 4 12 PR151 24737_SRN
7 BATT_EN# CMPIN SRN 7.5_6
6 BATT_EN# [25,27]
PR76 100_4 BAT_TEMP

IOUT

GND
GND
GND
GND
GND
5 BAT_TEMP [26]
PC92
4 0.1u/25V_4
3 PR77 PR138
7

21
22
23
24
25
2 1M_4 PR60 *100K_4
10 1 *100K_4
PP3300_EC
PC28 PC29
*47p/50V_4 *47p/50V_4 PP3300_DX

PR150 PC87
100K/F_4 0.01u/25V_4
REGN MAX voltage 6.5V
3

PR49
PR73 PR74 PR75 20140912
*0_4 100_4 100_4 EOD parts, change PN. PR56
*100K_4 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
24737_BM# 2 PR54
EC_SMB0_CLK [26]
*1.62K/F_4
*0_4
=0.793V for 3.965A current limit
H_PROCHOT# [4,17,26,32]
PQ8

3
A *2N7002K A
EC_SMB0_DATA [26]
[26] ICMNT Pin10 ILIM=0.793V
20140909 Implant for
1

battery enable. Rsr = 0.01ohm

24737_CMPOUT 2
20141119 Change PR73 PU6
to un-stuff, because enable 1 6 EC_SMB0_DATA PC82 PQ6
control by U17. 2
CH1 CH4
5
100p/50V_4 *2N7002K Quanta Computer Inc.
PP3300_RTC
1
VN VP
BAT_TEMP 3 4 EC_SMB0_CLK PROJECT : ZHNB
CH2 CH3 Size Document Number Rev
*IP4223-CZ6 A
Add ESD diode base on EC FAE suggestion
Limit set on 60W/3.16A Charger(BQ24737RGRR)
Date: Thursday, December 04, 2014 Sheet 29 of 39
5 4 3 2 1
 5 4 3 2 1

TDC : 0.75A
PEAK : 1A
Width : 40mil
+DDR_VTT_RUN

PR66 *SHORT_6
30
PC108 PC109
10u/6.3V_6 10u/6.3V_6
D D
TDC : 0.38A PP1350_VREF
PEAK : 0.5A
Width : 20mil
Greater than or equal 40mil
PC102
0.22u/10V_4 PP5000_DSW PP5000

PR160 PR159
PP3300_EC *Short_4 *0_4
PC104

22

21
10u/6.3V_6

2
PR164
VIN
100K/F_4

PAD

PAD

VTTGND

VLDOIN
VTTSNS
VTTREF

VTT
PC103 PQ21
1u/10V_4 MDV1528 20141201 1.35 Volt +/- 5%

5
20 12
PC106 PC31
Capacitor 4.7uF Change to 10uF. TDC : 3.35A
C
[26] PP1350_PGOOD PGOOD V5IN 2200p/50V_4 10u/25V_8 PEAK : 4.46A C

51216_S3 17 14 51216_DRVH 4
OCP : 6A
S3 DRVH PR161 PC105 Width : 140mil
2/F_6 0.1u/50V_6
PR162 51216_S5 16 15 51216_VBST
[26] PP1350_EN

3
2
1
*Short_4 S5 PU15 VBST PL9
TPS51216RUKR 3.3uH_7X7X3
PR78 51216_MODE 19 13 51216_SW 51216_SW PP1350
200K/F_4 MODE SW

5
PR79 51216_TRIP 18 11 51216_DRVL
61.9K/F_4 TRIP DRVL
VDDQSNS

PR72
26 10 4 *4.7_6
PAD PGND
REFIN

GND
Vinafix.com
PAD

PAD

PAD
REF

+
PQ20 PC107

3
2
1
VREF=1.8V MDV1595S PC27 0.1u/50V_6 PC99
6

25

24

23

7 *680p/50V_6 330u/2V_7343
51216_REF
51216_REFIN

PC101 PR158
B 0.1u/10V_4 *SHORT_6 B
51216_S3 PR81 51216_S5
*0_4
PR68
10K/F_4 Close to output cap

PR163 51216_S3
,31,33,35] PCH_SLP_S3_L
*Short_4
PR80
,13,26,35] PCH_SLP_S5_L
*0_4
PR67 PC100
30.1K/F_4 0.01u/25V_4 Mode Frequency Discharge mode

20140912 200K 400K Tracking Discharge

EOD parts, change PN.
100K 300K Tracking Discharge
OCP=6A
L ripple current
=(19-1.35)*1.35/(3.3u*400k*19)
A =0.95A S3 S5 +1.35VSUS REF VTT A

Vtrip=[6-(0.95/2)]*14mohm
=0.07735V
Rlimit=0.07335/10uA*8=61.88Kohm S0 1 1 ON ON ON Quanta Computer Inc.
S3 (mainon off) 0 1 ON ON OFF PROJECT : ZHNB
Size Document Number Rev
S4/S5 0 0 OFF OFF OFF A
DDR 1.35V(TPS51216)
Date: Thursday, December 04, 2014 Sheet 30 of 39
5 4 3 2 1
 5 4 3 2 1

PP5000_DSW PP5000
31
VIN
PR82 PR85
D *Short_4 D
*0_4

PP3300_EC

PC33 PC32 PC1

1u/10V_4 2200p/50V_6 10u/25V_8

5
PR90
100K/F_4 20141201

7
PQ10
MDV1528 Capacitor 4.7uF Change to 10uF.

V5IN
51211V_DRVH 4
1 9 PR91 PC36
[5,26] PP1050_PGOOD PGOOD DRVH *SHORT_6 0.1u/50V_6
51211V_EN 3 10 51211V_VBST PL3
[26] SUSP_VR_EN

3
2
1
PR88 *Short_4 EN VBST 3.3uH_7X7X3
51211V_TRIP 2 PU7 8 51211V_SW PP1050_PCH_SUS
PR89 61.9K/F_4 TRIP TPS51211DSCR SW
51211V_TST 5 6 51211V_DRVL
PR83 470K/F_4 TST DRVL

5
12 11
C PR87 20140912 GND GND PR1 PR84 1.05 Volt +/- 5% C

GND

GND

GND

GND
100K/F_4 EOD parts, change PN. *4.7_6 5.1K/F_4 TDC : 3.63A

FB
+
4 PC43 PEAK : 4.84A

13

14

15

16

4
PC38 330u/2V_7343
OCP=6A 51211V_FB 0.1u/50V_6 OCP : 6A
L ripple current PQ11 PC2 Width : 150mil

3
2
1
MDV1595S *680p/50V_6 PR86
=(19-1.05)*1.05/(3.3u*290k*19) 10K/F_4
=1.036A
Vtrip=[6-(1.036/2)]*14mohm
=0.0767V

Vinafix.com
Rlimit=0.0767/10uA*8=61.36Kohm

place at PQ37 area

B B
PP1050_PCH_SUS

PU8
A2 A1 PP1050_PCH PCH_SLP_S3_L
IN1 OUT1 [7,13,26,30,33,35] PCH_SLP_S3_L
B2 B1
PC39 IN2 OUT2
1u/10V_4 PCH_SLP_S3_L PCH_SLP_S3_L_R C2 C1
PR165 *Short_4 EN GND
PR92 TPS22964CYZPR
100K/F_4

A A

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
+1.05V(TPS51211)
Date: Thursday, December 04, 2014 Sheet 31 of 39
5 4 3 2 1
 5 4 3 2 1

PP3300_DSW 51622_VREF Place NTC close to the

PP5000_DSW

PP5000
PR23

PR22
*Short_4

*0_4
PP5000_DSW
20141201
Capacitor 4.7uF Change to 10uF.
VIN
32
VCORE Hot-Spot. PR128 *Short_4

2200p/50V_4
PC41 PCN1

10u/25V_8

10u/25V_8
0.1u/50V_6
100K/F_4_4250NTC
1

PC4

PC6
1u/10V_4

PC44

PC42
PP5000 1
2
PR134 *0_4 2

499K/F_4

*90.9K/F_4

*39.2K/F_4

2
PR7

PR96

PR17
ECAP_CONN

PR104

PR107

PR109

PR114

10K/F_4
9.31K/F_4
1_6

PR20
20/F_6

VDD
51622_SKIP# 1 5 PL4
SKIP# VIN 0.24uH_7X7X4
8 4 1 2
DCR= 1mOhm
51622_VRON 51622_PWM1 CS_SW1 +VCCIN
D PWM VSW D
CS_BSTR1 6 3

4
BOOT_R PGND

PR4
PC48

PC45

75K/F_4

39K/F_4
1u/6.3V_4

150K/F_4

150K/F_4
0.33u/6V_4

1000p/50V_4

2.21K/F_4
CS_BST1 7 9 +

PR13

PR15

PR18

2.2_6
PR8 2.2u/10V_4

9.09K/F_4
BOOT PAD

PC50

PR12

PR16

PC51
100K/F_4

*330u/2V_7343
*Short_4

0.1u/10V_4

47u/6.3V_8

47u/6.3V_8
PC3
PR93 PC40 PU9

PC35

PC37

PC34
1000p/50V_6
PC5
2.2/F_6 0.22u/25V_6 CSD97374CQ4M

20140827 Change PU9

PR2

PR3
footprint.
20141029
PC40 EOD, change PN. 51622_CSP1

2.94K/F_4
PR100 *Short_4

PR98
51622_B-RAMP

51622_SLEWA
51622_F-IMAX
Close to VR 51622_THERM PC55

51622_O-USR
PP1050_PCH

51622_VREF
*0.1u/25V_4

51622_VDD

0.12u/10V_4
51622_V5A

PC53
+VCCIN

10K/F_4_3435KNTC
51622_VBAT TDC : 10A
56_4

PR11
*56_4
PR103

PR106

PR108
130/F_4

*75/F_4
0.1u/10V_4

22.6K/F_4
51622_CSN1 PEAK : 32A
PC46

PR97

PR25
OCP : 40A

27

10

11

15

14

28

16
2

9
PC56
*0.1u/25V_4

VDD

O-USR
VREF

VBAT
F-IMAX

B-RAMP

SLEWA

V5A
THERM
VCORE Load Line :
[4,17,26,29] H_PROCHOT# 30
VR_HOT PWM1
6 51622_PWM1 -2mV/A
[5] VR_SVID_CLK VR_SVID_CLK 31 5 51622_PWM2 Close to the Close with
VCLK PWM2
VR side. phase1 inductor
VR_SVID_ALERT# 32 4 51622_NC
[5] VR_SVID_ALERT# ALERT N/C
VR_SVID_DATA 1 17 51622_CSP1
[5] VR_SVID_DATA VDIO CSP1
3 PU10 18 51622_CSN1
PGOOD TPS51622ARSM CSN1
C PP3300_DX PP3300_DX 51622_SKIP# 7 19 51622_CSN2 C
SKIP CSN2
51622_VRON 8 20 51622_CSP2
VR_ON CSP2
51622_VFB 24 21 51622_PU3
VFB PU3
*100K/F_4

*100K/F_4

23 22
PR5

51622_GFB
PR102

GFB N/C PR9

DROOP
COMP

OCP-I

IMON
*0_4
GND

PAD

PAD

PAD

PAD
51622_VREF
26

25

12

13

29

41
42

37
38

39
40

33
34
35
36
[5,10] VCORE_PGOOD
PR101 *Short_4
51622_DROOP

51622_OCP-I

51622_IMON

Vinafix.com
51622_COMP

[26] VCORE_EN
PR105 *0_4 PR14
*SHORT_8
2.55K/F_4
*Short_4

*Short_4

[5] VRON_CPU
PR6 *Short_4
+VCCIN
PC52

PR24

PR111
10K/F_4

523K/F_4
*100p/50V_4

PC58
4700p/25V_4
PC49

PR94 *330p/50V_4
PR116

PR115

PR112

*10_4
1500p/50V_4
PC54
PR113

PR110
100K/F_4
5.76K/F_4

[5] VCC_SENSE

[12] VSS_SENSE

Parallel
PR95
*10_4 PC57
B B
*0.01u/50V_4

Close to the
CPU side.
PP3300_DSW PP3300_DSW

PR118 PR117
*Short_4 *Short_4

51622_PU3 51622_CSP2

51622_PWM2

51622_CSN2

PR19 PR10
*Short_4 *0_4

A A

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
+VCCIN(TPS51622)
Date: Thursday, December 04, 2014 Sheet 32 of 39
5 4 3 2 1
 1 2 3 4 5

PP3300_DSW

PR141 *SHORT_8
customer's circuit is
VIN = PP3300_PCH
EN = PP3300_PCH
PP1500_PCH_TS
33
PP3300_DX 1.5Volt +/- 5%
PC80
10u/6.3V_6 PC76
TDC : 0.38A
0.1u/25V_6 PU14 TPS54318RTER PEAK : 0.5A PR157
PR148 16 10
*100K/F_4
VIN PH Width : 20mil *SHORT_8
A 1 11 A
PL8
VIN PH 1uH_7X7X3
2 12
VIN PH
14 13 PR149
PW RGD BOOT *SHORT_6
PCH_SLP_S3_L 15 6 PC90
EN VSNS 0.1u/50V_6 PR142
7 3
R1
PR143 100K/F_4
*Short_4 COMP GND PC95 PC96 PC97
8 4 0.1u/10V_4 10u/6.3V_6 10u/6.3V_6
RT/CLK GND 1.5V_VSNS

PAD
PAD
PAD
PAD
PAD
PAD
PC84 9 5
1000p/50V_4 PR57 PR61 SS AGND
8.06K/F_4 121K/F_4 R2 PR144

22
21
20
19
18
17
113K/F_4
V0=0.8*(R1+R2)/R2
PC86 PC85 PC89
*100p/50V_4 1500p/50V_4 0.01u/25V_4

PP3300_DSW
1,25,26,27,28,32,34,35] PP3300_DSW 20140912
EOD parts, change PN.
PCH_SLP_S3_L
[7,13,26,30,31,35] PCH_SLP_S3_L

B B

VIN
4/22 modify, SEL un-stuff.for thernal protection need
discuss before next build
PD1
DA2J10100L

PR33

Vinafix.com
Thermal protection 1M_6
1

PQ5
AO3409
2
3

PR28
3

PP5000_EN 2
[26,34] PP5000_EN
*Short_4
PQ2 PR39
1

DTC144EU *SHORT_6
C C

Need fine tune PP5000_DSW PP5000_DSW

for thermal protect point SYS_SHDN# [10,26,34]

PR38
Note placement position PR31 PC14 200K_6
PR30 200K/F_4 0.1u/50V_6
3

1.96K/F_4
8

PR99 2.469V 3
PP5000_EN 10K/F_4_4250NTC + 1 2
LM393_PIN2 2
- PQ4
3

PU11A 2N7002K
4

BA10393F PC13
1

PR21 0.1u/50V_6
2
PR32
*Short_4 PQ1 200K/F_4
2N7002K
1

D 5 D
+ 7
6
-
PU11B
BA10393F

Quanta Computer Inc.

For EC control thermal protection (output 3.3V) PROJECT : ZHNB
Size Document Number Rev
A
+1.2V/+1.5V/+1.8V/Thermal protect
Date: Thursday, December 04, 2014 Sheet 33 of 39
1 2 3 4 5
 5 4 3 2 1

SYS_SHDN#
SYS_SHDN# [10,26,33]
PP3300_DSW_EN
PP3300_DSW_EN [26]
34
PR123
*SHORT_6

PP3300_EC PP5000_DSW PP3300_RTC

PR45 SYS_SHDN#
D D
PP5000_PGOOD *SHORT_6
[26] PP5000_PGOOD
VIN VIN
SYS_SHDN# PR36

10u/6.3V_6

0.1u/25V_4

4.7u/6.3V_6
PCN2 *0_4
1
2 1
2 PR132 PR120 PR40
ECAP_CONN PC67 PC17 *0_4 *Short_4 100K/F_4 PP3300_DSW_EN

PC69

PC65
10u/25V_8 2200p/50V_6 PC16 PC64

51225_VIN

PC66
2200p/50V_6 4.7u/25V_8

PP5000 PP5000
[26,33] PP5000_EN

5
5 Volt +/- 5% 20141201 PP3300_DSW

5
TDC : 3.08A Capacitor 4.7uF Change to 10uF. PQ13
MDV1528 PP3300_DSW
PEAK : 4.1A

13

12

3
4 3.3 Volt +/- 5%
OCP : 5A PQ17 4

VREG5

VIN

VREG3
MDV1528 PR119 *Short_4 TDC : 5.01A
Width : 125mil 7 6
PEAK : 6.68A

3
2
1
PGOOD EN2

1
2
3
PP5000_EN 20
EN1 DRVH2
10 51225_DH2
PR121 PC60
OCP : 8A
PL6 51225_DH1 16
DRVH1 VBST2
9 51225_VBST2 PL5 Width : 210mil
2.2uH_7X7X3 PC70 PR133 2.2uH_7X7X3
51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6
VBST1 PU12 SW 2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW 1 DRVL2

5
C C
PR126 51225_DL1 15 4 51225_FB2 PR124
15.4K/F_4 DRVL1 VFB2 PQ14 6.81K/F_4
PQ16 51225_FB1 2 21 MDV1595S PR37
PC68 + PR48 MDV1595S 4 VFB1 GND 4 *4.7_6 +
*4.7_6 14 22
PC71 VO1 GND PC59 PC63

VCLK

GND

GND

GND

GND
CS1

CS2
150u/6.3V_3528 0.1u/50V_6 0.1u/50V_6 150u/6.3V_3528
1
2
3

3
2
1
PC15
PR44 *680p/50V_6 PR43

19

26

25

24

23
10K/F_4 PC18 10K/F_4
*680p/50V_6

51225_CS1

51225_CS2
Vinafix.com

38.3K/F_4

76.8K/F_4
OCP:8A
OCP:5A L(ripple current)
L(ripple current) =(9-3.3)*3.3/(2.2u*0.355M*9)
=(9-5)*5/(2.2u*0.3M*9) ~2.676A

PR47

PR42
Iocp=8-(2.676/2)=6.662A
=3.367A
PR122 Vth=(6.662A*14mOhm)+1mV=94.27mV
Iocp=5-(3.367/2)=3.316A *SHORT_6 R(Ilim)=(94.27mV*8)/10uA
B Vth=(3.316A*14mOhm)+1mV=47.43mV B
=75.41K
R(Ilim)=(47.43mV*8)/10uA
=37.94K

PR50 PR51
*0_6 PU3 *0_6
VIN
2 3 PP3300_RTC
IN OUT
5
NC
PC19 1 4
GND NC PC20
A A
*10u/25V_8 *TLV70433 *1u/10V_4

20141201
Capacitor 4.7uF Change to 10uF. Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
SYSTEM 5V/3V (TPS51225)
Date: Thursday, December 04, 2014 Sheet 34 of 39
5 4 3 2 1
 5 4 3 2 1

35
D D

PCH_SLP_S3_L PR166 *Short_4 PCH_SLP_S3_L_R

[7,13,26,30,31,33] PCH_SLP_S3_L

PP3300_DX_EN PR167 *Short_4 PP3300_DX_EN_R

[26] PP3300_DX_EN

PP3300_WLAN_EN PR168 *Short_4PP3300_WLAN_EN_R

[10,19,26] PP3300_WLAN_EN

PU2
PP3300_DSW
A2 A1 PR46 *SHORT_8PP3300_DX
IN1 OUT1
B2 B1
PC12 IN2 OUT2
1u/10V_4 PP3300_DX_EN_R C2 C1
EN GND
C PR41 TPS22964CYZPR C
100K/F_4

PU5 PU1

PP3300_DSW
A2 A1 PR70 *SHORT_8 PP3300_PCH
A2 A1 PR35 *SHORT_8 PP3300_PCH_SUS
IN OUT IN OUT
PCH_SLP_S3_L_R B2 B1 PCH_SLP_S5_L_R B2 B1

Vinafix.com
PC24 EN GND PC11 EN GND
1u/10V_4 PR65 1u/10V_4 PR29
*100K/F_4 TPS22930 100K/F_4 TPS22930
please near cpu

PR71 *SHORT_8 PR69 *0_8 4/24 modify

PP3300_WLAN +WL_VDD
R115 *Short_4 PCH_SLP_S5_L_R
PU4 [7,26] PCH_SLP_SUS_L

PP3300_DX PR62 *0_8 PP3300_WLAN_R A2 A1 PR64 *SHORT_8 PCH_SLP_S5_L R112 *0_4

IN1 OUT1 [7,13,26,30] PCH_SLP_S5_L
B2 B1
PC23 IN2 OUT2
1u/10V_4 PP3300_WLAN_EN_R C2 C1
B EN GND B
20140902 Power line layout width
PR63
non-enough, change to PP3300_DSW. 100K/F_4
TPS22964CYZPR
PR71 cancel 「*」」」PR62 mark 「*」 」
please near cpu

20140901 Change PU4 switch

A A

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
Load Switch
Date: Thursday, December 04, 2014 Sheet 35 of 39
5 4 3 2 1
 5 4 3 2 1

Battery Mode
36
D D

C C

Vinafix.com

B B

A A

Quanta Computer Inc.

PROJECT : ZHNB
Size Document Number Rev
A
Power Sequence
Date: Thursday, December 04, 2014 Sheet 36 of 39
5 4 3 2 1
 1 2 3 4 5 6 7 8

PP3300_PCH_SUS PP3300_DX
37
2.2K 2.2K 4.7K 4.7K
PP3300_DX
AP2 SMB_PCH_CLK CLK_SCLK
2N7002DW
A
AH1 SMB_PCH_DAT Level shift CLK_SDATA LVDS Bridge A

PP3300_PCH_SUS

XDP

2.2K 2.2K
SMBUS AN1 SMB_ME0_CLK
PP3300_PCH_SUS
AK1 SMB_ME0_DAT
Haswell ALS
ULT 2.2K 2.2K
AU3 SMB_ME1_CLK PP3300_PCH PP3300_PCH_SUS
AH3 SMB_ME1_DAT

B 4.7K 4.7K *10K *10K B

PP3300_PCH
G4 I2C1_SDA_GPIO6
2N7002DW
F1 I2C1_SCL_GPIO7 TOUCH SCREEN
Level shift
PP3300_PCH TP_PWR
I2C

F2 I2C0_SDA_GPIO4
4.7K
Vinafix.com
4.7K
PP3300_PCH
*10K *10K

2N7002DW
F3 I2C0_SCL_GPIO5 TRACK PAD
Level shift

PP3300_EC

C C
100
4.7K 4.7K
Battery
100
E10 EC_SMB0_CLK

D3 EC_SMB0_DATA Charger
PP3300_DX

KBC 4.7K 4.7K

M4 EC_SMB1_CLK PP3300_DX
TI
N2 EC_SMB1_DATA
SMBUS
D D
4.7K 4.7K
F4 EC_SMB2_CLK

F3 EC_SMB2_DATA Thermal sensor

Quanta Computer Inc.
PROJECT : ZHNB
Size Document Number Rev
A
SMBUS_I2C
Date: Thursday, December 04, 2014 Sheet 37 of 39
1 2 3 4 5 6 7 8
 5 4 3 2 1

(S0)

SYS_HWPG
(ALW)
PP5000_DSW PCH
TPS22965DSGR

PP3300_CODEC_EN
+5VA
38
UP7534ARA8-15 USBPWR1
PP5000_EN VREG5 PWRGD
(S3)
EC PP5000 EC USB1_PWR_EN
EN1
D D
S5_Vout
3V/5V UP7534ARA8-15 USBPWR2
TPS51225
PP3300_DSW_EN
EC (DSW) EC USB2_PWR_EN
EN2
Vin VREG3 S3_Vout PP3300_DSW
(S3)
(ALW) TPS22930
VIN PP3300_PCH_SUS
PP3300_RTC
PCH PCH_SLP_S5_L (S0)
TPS22965DSGR +3V_SATA

VCORE_PGOOD
(S0)
TPS22964CYZPR PP3300_DX

PWRGD (S0) EC PP3300_DX_EN

(S0)
VIN Vin
CPU VCCIN Vout
+VCCIN (S0) TPS22966DPUR
TPS51622
CCD_PWR
TPS22930
PP3300_PCH
C C
EN
VCORE_EN PCH PCH_SLP_S3_L
EC
TPS22964CYZPR
(S0)
PP3300_WLAN G5243AT11U LCDVCC
PCH PP3300_WLAN_EN
EC EC_EDP_VDD_EN

TPS22965DSGR
(S0)
+3V_LTE TPS22966DPUR +3V_ADO
PCH PP3300_LTE_EN

Vinafix.com
PP1350_PGOOD

(S3) (S3)
PP1350_EN PWRGD PP1350 TPS22930 TP_PWR
EC S5 EN
(S3)
S5_Vout PP1350_VREF
+1.35V_SUS EC TP_SHDN_L

B B
TPS51216
PCH_SLP_S3_L (S0)
PCH S3 EN +DDR_VTT_RUN
Vin S3_Vout
PWRGD
(S0) (S0)
Vin
+1.5V Vout TPS22966DPUR
TPS54318
PP1500_PCH_TS +1.5VA
VIN EN
PCH PCH_SLP_S3_L

PP1050_PGOOD

A A

PWRGD

VIN Vin
+1.05V_S3 Vout TPS22964CYZPR
TPS51211
PP1050_PCH_SUS PP1050_PCH
EN
PCH_SLP_S3_L Quanta Computer Inc.
SUSP_VR_EN
EC PROJECT : ZHNB
Size Document Number Rev
A
ULT PWR CONTROL
Date: Thursday, December 04, 2014 Sheet 38 of 39
5 4 3 2 1
 5 4 3 2 1

Model Version CHANGE LIST

1A-1 2014/08/21 Page16: LCD conn. I2C1_SDA_GPIO6_CONN pin reserve a 15pF capacitor.
ZHNB 2014/08/21 Page16: Touch panel level shift Q13 FET change to PJT138K.
2014/08/22 Page19: Wifi U27 change to another onboard module 7260SDW.
2014/08/22 Page21: NGFF 3G / SIM mark 「 *」 」.
1A-2 2014/08/27 Page19: Change wifi onboard module 7260SDW footprint.
2014/08/27 Page19: Pin W_DISABLE# / W_DISABLE#2 add 100K resistance pulldown.
2014/08/27 Page16: Change LVDS conn. CN3 footprint.
2014/08/27 Page18: Change HDMI conn. CN5 footprint.
2014/08/27 Page21: Change NGFF 3G conn. CN8 footprint.
2014/08/27 Page25: Change touchpad board conn. CN10 footprint.
2014/08/27 Page32: Change VCORE PU9 footprint.
1A-3 2014/09/1 Page34: Change LDO PU4 switch.
1A-4 2014/09/2 Page35: LDO PR71 cancel 「 *」 」 」 PR62 mark 「 *」」.
2014/09/2 Page19: Wifi 100K resistance R631/R632 mark 「 *」
」
1A-5 2014/09/9 Page29: Implant PR73 for battery enable.
D
2014/09/9 Page19: Change wifi onboard module 7260SDW footprint. D

1A-6 2014/09/12 Page16: C16 EOD, change PN.

2014/09/12 Page21: C379/C380/C381/C382 EOD, change PN.
2014/09/12 Page23: L4/L7 EOD, change PN.
2014/09/12 Page26: C208/C352/C360/L15 EOD, change PN.
2014/09/12 Page29: PC87/PJ1 EOD, change PN.
2014/09/12 Page30: PC100 EOD, change PN.
2014/09/12 Page31: PR83 EOD, change PN.
2014/09/12 Page33: PR89 EOD, change PN.
1B-1 2014/09/24 Page26: USB3.0 U8 P1/P2 add C399/D34.
1B-2 2014/09/25 Page28: Thermal MOSFET Q25/Resistance R585 mark 「 *」
」 un-stuff.
OVERT# power PP3300_DX change to PP3300_EC.
1B-3 2014/10/14 Page19: Change wifi onboard module 7260SDW PN.
1B-4 2014/10/16 Page29: Change DC-in PN. (new module)
1B-5 2014/10/21 Page13: Intel require modify ITP CN15 P9/P51 add PP1050_PCH_SUS, P50 PP1050_PGOOD change to VCCST_PWRGD.
1C-1 2014/10/29 Page23: Codec pin27 add 100K resistance
2014/10/29 Page31: PC40 EOD, change PN.
1C-2 2014/11/07 Page26: Change U5 EC PN.
1C-3 2014/11/12 Page23: C193 change to 0.1uF.
2014/11/12 Page all: 0 ohm resistance change to short pad.
1C-4 2014/11/18 Page23/Page26: change D27/D28 PN.
1C-5 2014/11/19 Page25: U17 change part NO. same as 0C7, add MOSFET Q33.
2014/11/19 Page27: Remove HOLE24 BATT_EN# pin3, because enable control by U17.
2014/11/19 Page27: Lid SW change to un-stuff, because enable by U17.
2014/11/19 Page29: PR73 change to un-stuff, because enable control by U17.
1C-6 2014/11/20 Page26 Change EC_BRD_ID, ID2 change to High, ID3 change to Low, because EC change code.
1C-7 2014/11/25 Page16 Change TPS/R361/Q13 to un-stuff, because no touch panel.
1C-8 2014/11/26 CH4102K1B03 EOS parts, change to CH4103K1B08
1D-1 2014/12/01 Page22 Change TPM power.
2014/12/01 Page26 Change EC new PN.
2014/12/01 Page27 Stuff L12/L18/L19, remove R371/R372/R549/R550/R551/R552.
2014/12/01 Page29 Change DC-in footprint.
2014/12/01 PC1/PC19/PC31/PC6/P67/PC75 4.7uF change to 10uF.

C C

2A

Vinafix.com

B B

3A

A A

DOC NO.
PROJECT MODEL : Quanta Computer Inc.
Chrome APPROVED BY: DATE:
PROJECT : ZHNB
Size Docum ent Num ber Rev
A
PART NUMBER: DRAWING BY: REVISON: Change list
Date: Thurs day, Decem ber 04, 2014 Sheet 39 of 39
5 4 3 2 1