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Digital Logic Gates
Digital Logic Gates
Logic symbols
Digital Logic Gates
AND
Type
Digital Logic Gates
AND
OR
NAND
NOR
XOR
XNOR
NOT
Digital Logic Gates
AND
OR
NAND
XNOR
NOT
Digital Logic Gates
AND
OR
NAND
NOR
XOR
XNOR
NOT
Digital Logic Gates
AND
OR
NAND
True table
NOR
XOR
XNOR
NOT
Digital Logic Gates
AND
OR
NAND
NOR
XOR
XNOR
NOT
Digital Logic Gates Boolean
expression
Logic symbols Type
True table
AND
OR
NAND
NOR
XOR
XNOR
NOT
Digital Logic Gates Boolean Rectangular
expression shape
Logic symbols Type
True table
AND
OR
NAND
NOR
XOR
XNOR
NOT
1-bit Multiplexer
1-bit Multiplexer
Input 0
OutPut
Input 1
Input
1-bit Multiplexer
Data Channel 1
Input 0 Data Channel
OutPut
Input 1
Data Channel 2
Input
Data Channel
Select
1-bit Multiplexer
Din1
0 Data Channel
OutPut
Input 1
Data Channel 2
Input
Data Channel
Select
1-bit Multiplexer
Din1
0 Data Channel
OutPut
1
Din2
Input
Data Channel
Select
1-bit Multiplexer
Din1
0 Data Channel
OutPut
1
Din2
Sel
1-bit Multiplexer
Din1
0
Out
1
Din2
Sel
1-bit Multiplexer
Din1
0
Out
1
Din2
Sel
1-bit Multiplexer
Din1
0
Out
1
Din2
Sel = 0
1-bit Multiplexer
Din1
0
Out
1
Din2
Sel = 1
1-bit Multiplexer
Din1 0 Out
Din2 1
Sel
Din1 0
Data stream 1 Out
Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer
Din1 0
Data stream 1 Out
Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
VA1_Sel
Data stream
Output
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 VA1_Out Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer
Din1 0
if ( VA1_Sel == 0 ) VA1_OUT = Din1; Out
Din2 1
Sel
Data stream 1
Din1 VA1_Out
0
0 VA1_Sel
1-bit Multiplexer
Din1 0
if ( VA1_Sel == 0 ) VA1_OUT = Din1; Out
Din2 1
Sel
Data stream 1
Din1 VA1_Out
1 VA1_Sel
1-bit Multiplexer
Din1 0
if ( VA1_Sel == 0 ) VA1_OUT = Din1; Out
Din2 1
Sel
Data stream 1
Din1 VA1_Out
0 1 VA1_Sel
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 VA1_Out Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
Data stream 2
Din2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
VA2_Sel Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
if ( VA2_Sel == 1 ) VA2_OUT = Din2;
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer
Din1 0 Out
if ( VA2_Sel == 1 ) VA2_OUT = Din2; Din2 1
Sel
Data stream 2
Din2 VA2_Out
1 VA2_Sel
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer
Din1 0 Out
Din2 1
Data stream 1 Sel
Din1 VA1_Out
0 1 VA1_Sel
1 VA2_Sel VA2_Out
Din2
Data stream 2
1-bit Multiplexer
Din1 0 Out
Din2 1
Data stream 1 Sel
Din1 VA1_Out
0 Sel
VA2_Out
0
Din2
Data stream 2
1-bit Multiplexer
Din1 0 Out
Din2 1
Data stream 1 Sel
Din1 VA1_Out 0
1 Sel
VA2_Out
Din2
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Out
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer
Din1 0 Out
Din2 1
Data stream 1 Sel
Din1 VA1_Out 0
Out
1 Sel
VA2_Out
Din2
Data stream 2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Out
Din1 Din2 1
Sel
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Pipe 1 (P1) Out
Din1 Din2 1
Sel
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Pipe 1 (P1) Out
Din1 Din2 1
Sel
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Pipe 1 (P1) Out
Din1 Din2 1
Sel
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2 Pipe 2 (P2)
Valve 2 (VA2)
1-bit Multiplexer
Din1 0 Out
Din2 1
Data stream 1 Sel
Din1 VA1_Out 0
Out
1 Sel
Din2
1-bit Multiplexer
Din1 0 Out
Din2 1
Data stream 1 Sel
Din1 VA1_Out 0
Out
0 Sel
Din2
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Pipe 1 (P1) Out
Din1 Din2 1
Sel
0
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2 Pipe 2 (P2)
Valve 2 (VA2)
1-bit Multiplexer Valve 1 (VA1)
Din1 0
Data stream 1 Pipe 1 (P1) Out
Din1 Din2 1
Sel
1
Mr. Sel
Pipe tee (PT)
Out
Data stream
Output
Data stream 2
Din2 Pipe 2 (P2)
Valve 2 (VA2)
1-bit Multiplexer
Din1 0 Out
Din2 1
Din1 0
Sel
Sel Out
0
Din2
Boolean expression ?
1-bit Multiplexer
Din1 0 Out
Din2 1
Din1 0
Sel
Sel Out
0
Din2