Combinational Logic:

DECODERS - ENCODERS

Digital Systems Design

OBJECTIVES
• Describe combinational logic circuits
• Design multiplexers and demultiplexers
• Design decoders and encoders
• Design code converters
• Design Arithmetic circuits
• Design comparison circuits
• Write VHDL codes for basic combinational
circuits
DECODERS

• A decoder is a multiple-input, multiple-output logic circuit that converts coded

inputs into coded outputs, where the input and output codes are different.
• The input code generally has fewer bits than the output code, and there is one-to-
one mapping from input code words into output code words.
2:4 DECODER
2:4 DECODER

Y1 Y2 Y3 Y4
en en en en
x1x2 0 1 x1x2 0 1 x1x2 0 1 x1x2 0 1
00 0 1 00 0 0 00 0 0 00 0 0
01 0 0 01 0 0 01 0 1 01 0 0
11 0 0 11 0 0 11 0 0 11 0 1
10 0 0 10 0 1 10 0 0 10 0 0

𝑦 = 𝑒𝑛 𝑥 𝑥 𝑦 = 𝑒𝑛 𝑥 𝑥 𝑦 = 𝑒𝑛 𝑥 𝑥 𝑦 = 𝑒𝑛 𝑥 𝑥
2:4 DECODER
Y1 Y2 Y3 Y4
en en en en
x1x2 0 1 x1x2 0 1 x1x2 0 1 x1x2 0 1
00 0 1 00 0 0 00 0 0 00 0 0
01 0 0 01 0 0 01 0 1 01 0 0
11 0 0 11 0 0 11 0 0 11 0 1
10 0 0 10 0 1 10 0 0 10 0 0

𝑦 = 𝑒𝑛 𝑥 𝑥 𝑦 = 𝑒𝑛 𝑥 𝑥 𝑦 = 𝑒𝑛 𝑥 𝑥 𝑦 = 𝑒𝑛 𝑥 𝑥
2:4 DECODER
2:4 Decoder – Gate Level Circuit generated by Quartus II

Designed Circuit using KMAPS

2:4 DECODER
2:4 Decoder – With/Select
Circuit generated by Quartus II
2:4 DECODER
2:4 Decoder – When/Else

Circuit generated by Quartus II

2:4 DECODER
2:4 Decoder – When/Else – Without Enable

Circuit generated by Quartus II

3:8 DECODER (Hierarchical)*

en

en

*Note: This implementation requires to include the enable input

ENCODERS
• A decoder’s output code normally has more bits than its input code.
• If the device’s output code has fewer bits than the input code, the device is
usually called an encoder.
• An encoder performs the function opposite to that of a decoder, encoding
the given information into a more compact form.
Binary Encoder
• A binary encoder encodes information from 2N inputs into an N-bit
code.
• Exactly one of the input signals should have a value of 1, and the
outputs present the binary number that identifies which input is
equal to 1.
Binary Encoder

*Why not to use Karnaugh maps in this case?

Priority Encoder
• A priority encoder is an encoder where more than one input can be activated
simultaneously.
• Each input is assigned a priority order.

X4 X3 X2 X1 Y2 Y1
0 0 0 1 0 0
0 0 1 X 0 1
0 1 X X 1 0
1 X X X 1 1

*x1 has the lowest priority and x4 the highest.

Priority Encoder
Y2 Y1
x2x1 x2x1
x4x3 00 01 11 10 x4x3 00 01 11 10
00 0 0 0 0 00 0 0 1 1
01 1 1 1 1 01 0 0 0 0
11 1 1 1 1 11 1 1 1 1
10 1 1 1 1 10 1 1 1 1
𝑦 =𝑥 +𝑥 𝑥 𝑦 =𝑥 +𝑥 𝑥 𝑥
Priority Encoder

*Can we use With-Select in this case?

CODE CONVERTERS
• A code converter is a circuit used to convert
from one type of input encoding to a different
output encoding.
• E.g, 2:4 decoder converts a 2-bit binary
number input to a one-hot encoding sequence
• BCD-to-seven-segment code converter,
• BCD-to-Gray code converter,
• BCD-to-excess-3 code converters, and so
on
BCD-to-Seven-Segment Code Converter

*It is assumed that the 7-segment module is active high

BCD-to-Seven-Segment Code Converter
BCD-to-Seven-Segment Code Converter
BCD-to-Seven-Segment Code Converter
BCD-to-Seven-Segment Code Converter

STD_LOGIC_VECTOR(6 DOWNTO 0)
sseg => “gfedcba”

*It is assumed that the 7-segment module is active low and it can reproduce hexadecimal digits.