Digital logic circuit

Class 04
2023-03-30
Choi Hyeon gyu
Ph.D. / Assistant Professor
Combinational logic technologies
 History
 Technology advancements of microprocessor

Khan, Fatima Hameed, Muhammad Adeel Pasha, and Shahid Masud. "Advancements in microprocessor architecture for ubiquitous
AI—An overview on history, evolution, and upcoming challenges in AI implementation." Micromachines 12.6 (2021): 665.

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Combinational logic technologies
 Technology metrics
 Gate delay
 Degree of integration
 Power dissipation
 Noise margin
 Component cost
 Fan-out
 Driving capability
 Configurability

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Combinational logic technologies
 Basic logic components
 Fixed logic
• NAND, NOR, AND, OR, …
• From catalog, designers pick and choose the best ones for their
needs
• Not all of the possible logic gates will be available in a given
catalog.

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Combinational logic technologies
 Basic logic components
 Look-up table
• Read Only Memory (ROM)
 PROM : Programmable ROM
 EPROM : Erasable programmable ROM

n address lines
Address
…
words 00…00
00…01
Memory array 00…10
Decoder 2n word lines
(2n words by m bits) 00…11
2n

…
… (size)
11…10
m data lines 11…11

m (word length)

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Combinational logic technologies
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 Basic logic components Pull-down transistor
if in = 0 or z  out = 1
 Look-up table if in = 1  out = 0
• Read Only Memory (ROM) in
 Internal structure of ROM

1 1 1 1 out

Word line
n
2 -1

i word[i] = 0011
Decoder
j word[j] = 1010

0
Bit line
0 n-1

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Combinational logic technologies
 Basic logic components
 Look-up table
• Don’t need to minimize or optimize the logic function
• In case when the function is too complicated to implement with
logic gates, look-up table may be a good solution.
• Example
A B C F0 F1 F2 F3
0 0 0 0 0 0 1
ROM 0 0 1 1 0 1 0
8 Words x 4 Bits/word 0 1 0 0 1 0 0
0 1 1 0 1 1 0
1 0 0 0 1 0 1
A B C F0 F1 F2 F3 1 0 1 1 1 1 0
1 1 0 0 1 1 1
1 1 1 1 0 0 0
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Combinational logic technologies
 Basic logic components
 Look-up table
• MUX (Multiplexer)
 Selector
 Sets its single output to the same value as one of its many inputs
under the direction of its control inputs. ̅

I0 I1 I0 A Z
2:1
n Single output I1 MUX Z 0 0 0 0
...

2 data inputs
0 0 1 0
0 1 0 1
... Control input A 0 1 1 0
n control inputs 1 0 0 0
A Z
1 0 1 1
0 I0
1 1 0 1
1 I1 1 1 1 1
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Combinational logic technologies
 Basic logic components I0
I1
 Look-up table I2
4:1
MUX
Z
• MUX (Multiplexer) I3
 Gate level implementation of MUX
A B
I0 2:1 ̅ ̅
I1 MUX Z
A
̅ A B

A
I0
I1
I0 I2 Z
I1 Z
I3
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Combinational logic technologies
̅ ̅ ̅ ̅ ̅ ̅
̅ ̅
 Basic logic components I0
 Look-up table I1
I2
• MUX (Multiplexer)
I3 8:1 Z
 Gate level implementation of 8:1 MUX
I4 MUX
- Hierarchical implementations
I5
I0 8:1 MUX I0 2:1 8:1 MUX I6
I1 4:1 I1 MUX
I7
I2 MUX I2 2:1
I3 I3 MUX A B C
2:1 4:1
I4 MUX Z I4 2:1
MUX Z
I5 I5 MUX
4:1
I6 MUX I6 2:1
I7 I7 MUX

B C A C B A

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Combinational logic technologies
 Basic logic components
 Look-up table
• MUX (Multiplexer)
 MUX as a logic building block
 Way to implement a truth table directly in hardware
 Example 1
1 A B C F
A B C F
0 0 0 1 0 0 0 0 1
̅
0 0 1 0 1 0 0 1 0 ̅
0 1 0 1 0 0 1 0 1 ̅
8:1 F ̅ 4:1
0 1 1 0 0 MUX 0 1 1 0 0 MUX
F
1 0 0 0 0 1 0 0 0 1
1 0 1 0 0
1 1 0 1 0
1 1 0 1 1 1 1 0 1
A B
1 1 1 1 1
1 1 1 1
A B C
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Combinational logic technologies
 Basic logic components
 Look-up table
• MUX (Multiplexer) A B C D G
 Example 2 0 0 0 0 1
1
- ̅ ̅ ̅ ̅ 0 0 0 1 1
0 0 1 0 0
1 0 0 1 1 1
D 0 1 0 0 0
0
0 1 0 1 0
0 0 1 1 0 1
1 1
8:1 0 1 1 1 1
D MUX F 1 0 0 0 1
D 1 0 0 1 0
1 0 1 0 0
D 1 0 1 1 1
D 1 1 0 0 1
1 1 0 1 0
A B C 1 1 1 0 1
1 1 1 1 0
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Combinational logic technologies
 Basic logic components
 Look-up table
• MUX (Multiplexer)
 Example 3 4:1
MUX Sum
- Full-adder

A B Cin Sum Cout

0 0 0 0 0
0
A B
0 0 1 1 0
0 1 0 1 0 0
0 1 1 0 1
4:1
1 0 0 1 0
MUX Cout
1 0 1 0 1
1 1 0 0 1
1
1
1 1 1 1 1
A B

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Combinational logic technologies
 Basic logic components
 Look-up table A B C D C2
• MUX (Multiplexer) 0 0 0 0 1
1
 Example 4 0 0 0 1 1 ̅
0 0 1 0 0
- C2 in 7 segment D
0 0 1 1 1
0 1 0 0 1
1
0 1 0 1 1
̅ 0 1 1 0 1
1
1
1 4:1 0 1 1 1 1
1 MUX C2 1 0 0 0 1
1
1 0 0 1 1
x 1
1 0 1 0 x
x
1 0 1 1 x
A B 1 1 0 0 x
x
1 1 0 1 x
x
1 1 1 0 x
x
1 1 1 1 x

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Combinational logic technologies
 Basic logic components
 Template-based logic
 Based on a template that we can customize to implement one of a
large set of possible functions.

• Decoder / Demultiplexer
S1 S2

O0 G
n O0
Single input 2 output O1
...

G 2:4 DEC O1
O2
Enable O2
... O3
O3
n control inputs Control input S1 S0

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Combinational logic technologies
 Basic logic components
 Template-based logic
• Decoder / Demultiplexer
 Example 1

F1
̅ ̅ ̅
̅ 4:16
̅ ̅ Enable
DEC

F2

F3

ABCD
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Combinational logic technologies
 Basic logic components Inputs
…
 Template-based logic
AND OR
• Programmable logic array (PLA) Product terms
array array
 Generalization of the decoders
 Multi input – multi output …
 Organized into an AND subarray and an OR subarray Outputs
A B C

4 input / 4 output PLA xx xx xx xx x x x x

xx xx xx xx x x x x
xx xx xx xx x x x x
xx xx xx xx x x x x
xx xx xx xx x x x x

Notation

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Combinational logic technologies
 Basic logic components
 Template-based logic
• Programmable logic array (PLA)
 Example 1
A B C
* UV erasable
̅
̅
̅

Common terms
: 2 times
: 2 times
̅ : 2 times

F0 F1 F2 F3 17
Combinational logic technologies
A B C

 Basic logic components x x x x x

 Template-based logic x x
x x
• Programmable logic array (PLA)
x x
 Example 2
x x

x x
x x
̅ ̅ x x x x x
̅ ̅
x x x x
̅ ̅ ̅ C
x x x x
̅ ̅ ̅ ̅
x x x x
x x x x
Common terms
x x x x
: 2 times
x x x x
̅ ̅ : 2 times

F1 F2 F3 F4 F5 F6
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Combinational logic technologies
 Basic logic components
 Template-based logic
• Monolithic memories’ Programmable array logic (PAL) Hardwired
 AND array : programmable
 OR array : hardwired (fixed)
 Product terms can not be shared
xx xx xx xx
 Logic constraint xx xx xx xx
 Faster, smaller, and cheaper
 than PLA xx xx xx xx
Programmable
xx xx xx xx

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Combinational logic technologies
A B C D

 Basic logic components x

 Template-based logic x x
x x
• PALs
xx xx xx xx
 Example 1 – BCD to Gray code x x
A B C D W X Y Z Logic : 0
0 0 0 0 0 0 0 0 xx xx xx xx
Too many AND gate
0 0 0 1 0 0 0 1 xx xx xx xx
0 0 1 0 0 0 1 1 is wasted
xx xx xx xx
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 0 x
0 1 0 1 1 1 1 0 x
0 1 1 0 1 0 1 0
xx xx xx xx
0 1 1 1 1 0 1 1
1 0 0 0 1 0 0 1 xx xx xx xx
1 0 0 1 1 0 0 0 x x x x
1 0 1 0 x x x x
x x x
1 0 1 1 x x x x
1 1 0 0 x x x x x x
1 1 0 1 x x x x x x x
1 1 1 0 x x x x
1 1 1 1 x x x x
W X Y Z
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Combinational logic technologies
 Basic logic components
 Template-based logic
• Example 2 – Two-bit magnitude comparator

A B C D EQ NE LT GT EQ (AB = CD)
0 0 0 0 1 0 0 0 ! ̅B ̅ ̅ ̅
0 0 0 1 0 1 1 0
0 0 1 0 0 1 1 0
NE (AB ≠ CD)
0 0 1 1 0 1 1 0 # ̅ ̅
0 1 0 0 0 1 0 1 LT (AB < CD)
0 1 0 1 1 0 0 0 $% ̅ ̅
0 1 1 0 0 1 1 0
0 1 1 1 0 1 1 0 GT (AB > CD)
1 0 0 0 0 1 0 1 % ̅ ̅
1 0 0 1 0 1 0 1
1 0 1 0 1 0 0 0
1 0 1 1 0 1 1 0 There are many common terms
1 1 0 0 0 1 0 1 ̅ : 2 times
1 1 0 1 0 1 0 1
̅ : 2 times
PLA
1 1 1 0 0 1 0 1
1 1 1 1 1 0 0 0
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Combinational logic technologies
A B C D

 Basic logic components x x x x x

 Template-based logic x x x x x
• Example 2 x x x x x
 Two-bit magnitude comparator x x x x x
- PLA implementation x x x x
x x x x
x x x
x x x
x x x x
x x x x
x x x x
x x x x

EQ NE LT GT
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Combinational logic technologies
x x x x xx xx

 Basic logic components x x x x xx xx

x x x x xx xx
x x x x xx xx
 Two-level and multilevel logic x x x x xx xx
x x x x xx xx
• 7-segment display decoder – PAL design x x x x xx xx
x x x x xx xx
 4-input, 7-output PAL x x x x xx xx

 There are 26 product terms x x x x xx xx

x x x x xx xx
- 0 x x x x xx xx

- 1 ̅ x x x x xx xx
x x x x xx xx
- 2 ̅ x x x x xx xx

- 3 ̅ x x x x xx xx
x x x x xx xx

- 4 x x x x xx xx
x x x x xx xx
- 5 ̅ ̅ x x x x xx xx

- 6 ̅ x x x x xx xx
x x x x xx xx
x x x x xx xx
x x x x xx xx
x x x x xx xx
x x x x xx xx

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 Combinational logic technologies
P16H8 PAL

OR array

8 AND array
per OR gate

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Combinational logic technologies
 Two-level and multilevel logic
 7-segment display decoder – PLA design
• It’s good strategy to reduce the number of unique product
terms
• even though the total number of product terms increases

̅
̅ CAD ̅
̅ (Espresso) ̅ ̅
̅ ̅

̅ ̅ ̅ ̅
̅ ̅

26 product terms 28 product terms

15 unique product terms 9 unique product terms

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Combinational logic technologies
 Two-level and multilevel logic
 Full adder – PAL design
• ,- ̅ ./
̅ ./ ./ ./
• 0,1 ./ ./

A B Cin
• 2 ̅ , 4
• ,- 2 ./ 2 ./
• 0,1 2 ./ 4
PAL
Only two product terms per OR gate

X Y
Sum Cout
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Combinational logic technologies
1
?
 Non-gate logic 0
ICs may melt down
 Tri-state outputs (short circuit)
• When control signal (output enable) is off, output state is z.
 What it means that output state is high-impedance (z)?
- Output wire is effectively disconnected! (=open circuit)
• When control signal (output enable) is on, it acts as buffer
1

A F A
Inverting tri-state buffer
OE
A OE F A F F
OE
X 0 z
0 1 0 OE
1 1 1
0
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Combinational logic technologies
 Non-gate logic
 Tri-state circuit
• Can select single output among multi-inputs without short
problem
 Circuit implementation of MUX

Input0 F
Input0

MUX
Input1 F
Input1

Select
Select

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Combinational logic technologies
 Non-gate logic
 Tri-state circuit
• 4:1 MUX with tri-state buffers
 For large N, using tri-state buffers can save many gates.

1G 1Y3
1Y2
1B 1Y1 D3
1A 1Y0
D2 Common output wire
2G 2Y3
2Y2 - connect selectively an input to
2B 2Y1 D1 an output wire
2A 2Y0
D0

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 Combinational logic technologies
 Non-gate logic Data [15:8] Data [7:0]
 Tri-state circuit
• 16384 x 16 ROM

tri-state output

Chip select
is used as
address 13 bit

Enable
2764 EPROM 2764 EPROM x 4
8192 x 8 ROM 16384 x 16 ROM
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Combinational logic technologies
 Non-gate logic
 Open-collector outputs and wired logic
• Combination of switches and pull-up (pull-down) resistors
 Wired-NAND gate and wired-and gate
1
1 1
G Y3
Y2
A B Y1
F F A
B Y0
F
A D3
A B F
0 0 1 D2
B
0 1 1
1 0 1 D1
0
1 1 0 D0
Wired NAND gate 4:1 MUX with wired OR gates
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Combinational logic technologies
 Homework
 Calendar subsystem using multiplexers

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Thank you