Computer Organization

and Architecture

Chapter 3 (Part II)

Addressing Modes
Chere L. (M.Tech)
Lecturer, AASTU
Chapter 1 1
Outline
1. An Overview of Addressing Modes
2. Types of Addressing Modes
 Implied Addressing mode.
 Immediate Addressing Mode.
 Register Addressing Mode
 Register Indirect Addressing Mode
 Auto-increment or Auto-decrement Addressing
 Direct Addressing Mode
 Indirect Addressing Mode
 Relative Addressing Mode
 PC Relative Addressing Mode
 Indexed Addressing Mode
 Base Register Addressing Mode
An Overview of Addressing Mode
 How the operands are selected during execution is dependent
upon the addressing mode of the instruction.
 The addressing mode specifies a rule for interpreting or modifying
the address field of the instruction before the operand is actually
referenced.
 Address of the operand found by applying these rules is called
effective address (EA).
 Addressing modes provide
 Programming flexibility
 Reduce bits in address field of instruction and allow to use
the bits in the address field of the instruction efficiently.
 A field ‘mode’ is added in instruction to tell the computer which
addressing mode is used in the instruction.
a) Implied Mode
 The operands are specified implicitly in the definition of the
instruction.
 No need to specify address in the instruction
 Example:
 COM : Complement Accumulator
 Operand in AC is implied in the definition of the instruction
 The operand in the accumulator register
 PUSH : Stack push
 Operand is implied to be on top of the stack
 All register reference instructions that use an accumulator are
implied-mode instructions.
 Zero-address instructions in a stack-organized computer are
implied-mode instructions since the operands are implied to be on
top of the stack.
b) Immediate Mode
 Instead of specifying the address of the operand, operand itself is
specified instruction itself.
 In other words, an immediate-mode instruction has an operand
field rather than an address field where, the operand to be used in
conjunction with the operation specified in the instruction.
 For example, LOD # RX,50 EA = AC
 This instruction load the index register by constant value 50
 Immediate-mode instructions are useful for initializing registers to
a constant value.
 Features
 No need to specify address in the instruction
 However, operand itself needs to be specified
 Sometimes, require more bits than the address
 Fast to acquire an operand
c) Register Mode
 Address specified in the instruction is the register address
 In other words, the operands are in registers within the CPU.
 EA = IR(R) (IR(R): Register field of IR)
 For example:
Add R1,R2 R1 R1 + R2
 Advantages
 No need to specify address in the instruction
 Designated operand need to be in a register
 Shorter address than the memory address
 Saving address field in the instruction
 Faster to acquire an operand than the memory addressing
 Disadvantages
 Very limited address space
 Using multiple registers helps performance but complicates the instructions
d) Register Indirect Mode
 Instruction specifies a register in the CPU whose contents/gives the
address of the operand in memory.
 In other words, the selected register contains the address of the
operand rather than the operand itself.
 EA = [IR(R)] ([x]: Content of x)
 For example, LDA (R1) AC M[R1]

 Saving instruction bits since

register address is shorter
than the memory address
 Slower to acquire an operand
than both the register
addressing or memory
addressing
e) Auto-increment or Auto-decrement Addressing
 Register used in Register Indirect Mode may have Auto-increment
or Auto-decrement features
 The address in the register that is used to access memory, the
value in the register is incremented after or decremented before
by 1 automatically
 Example:
 Auto-increment, LDA (R1)+
– AC M[R1] – R1 R1+1
 Auto-decrement, LDA -(R1)
– R1 R1-1 – AC M[R1]
 Useful to access table of data.
 When the address stored in the register refers to a table of data in
memory, it is necessary to increment or decrement the register
after every access to the table.
f) Direct Address Mode
 Instruction specifies the memory address which can be used
directly to the physical memory.
 The operand resides in memory and its address is given directly by
the address field of the instruction.
 Effective address is equal to the address field of the instruction
(Operand)
EA = IR(addr) (IR(addr): address field of IR)
 Example:
LDA add AC M[add]
 Features:
 Faster than the other memory
addressing modes
 Too many bits are needed to
specify the address for a large
physical memory space
g) Indirect Address Mode
 The address field of an instruction specifies the address of a
memory location that contains the address of the operand.
 When the abbreviated address is used large physical memory can be
addressed with a relatively small number of bits.
EA = M[IR(address)]
 Slow to acquire an operand because of an additional memory access
 Example:
LDA @add AC M[ M[add] ]
h) Displacement Address Mode
 The Address fields of an instruction specifies the part of the address
(abbreviated address) which can be used along with a designated
register to calculate the address of the operand.
 In other words, the contents of the indexed register is added to the
Address part of the instruction, to obtain the effective address of
operand.

 EA = f(IR(address), R),
R is sometimes implied
 EA = A + (R)

Features:
• Address field of the instruction is short
• Large physical memory can be accessed with a small number of address bits
Cont. . . 3 different Displacement Addressing Modes
 PC Relative Addressing Mode (R = PC)
 The content of the program counter is added to the address part of
the instruction in order to obtain the effective address.
 EA = PC + IR(address)
 Example: LDA $ add AC M[PC+add]
 Indexed Addressing Mode (R = IX, where IX: Index Register)
 The content of an index register XR is added to the address part of
the instruction to obtain the effective address.
 EA = IX + IR(address)
 Example: LDA add(x) AC M[XR+add]
 Base Register Addressing Mode (R = BAR, where BAR: Base Address Register)
 The content of an base register is added to the address part of the
instruction to obtain the effective address.
 EA = BAR + IR(address)
 Example: LDA add(x) AC M[XR+add]
Example of Addressing Mode

Numerical Example
 The two-word instruction address 200 and 201 is a "load to AC'
instruction with an address field equal to 500.
 The first word of the instruction specifies the operation code
and mode, and the second word specifies the address part.
 PC has the value 200 for fetching this instruction.
 The content of processor register R1 is 400, and the content of
an index register XR is 100
 AC receives the operand after the instruction is executed.
 The figure lists a few pertinent addresses and shows the
memory content at each of these addresses.
Example of Addressing Mode
Addressing Mode Effective Address Content of AC
Direct address 500 /* AC  (500) */ 800
Immediate operand - /* AC  500 */ 500
Indirect address 800 /* AC  ((500)) */ 300
Relative address 702 /* AC  (PC+500) */ 325
Indexed address 600 /* AC  (RX+500) */ 900
Register - /* AC  R1 */ 400
Register indirect 400 /* AC  (R1) */ 700
Auto-increment 400 /* AC  (R1)+ */ 700
Auto-decrement 399 /* AC  -(R) */ 450
How it works?
 In the direct address mode the effective address is the address part of the instruction 500 and the operand to be
loaded into AC is 800.
 In the immediate mode the second word of the instruction is taken as the operand rather than an address, so 500
is loaded into AC. (The effective address in this case is 201.).
 In the indirect mode the effective address is stored in memory at address 500. Therefore, the effective address is
800 and the operand is 300.
 In the relative mode the effective address is 500 + 202 = 702 and the operand is 325.
(Note that the value in PC after the fetch phase and during the execute phase is 202.)
 In the index mode the effective address is R + 500 = 100 + 500 = 600 and the operand is 900.
 In the register mode the operand is in R1 and 400 is loaded into AC. (There is no effective address in this case).
 The auto-increment mode is the same as the register indirect mode except that R1 is incremented to 401 after
the execution of the instruction.
 The auto-decrement mode decrements R1 to 399 prior to the execution of the instruction. The operand loaded
into AC is now 450
Exercise: Addressing Mode

For the instruction shown below, what value is loaded into the
accumulator for each addressing mode??
Data Transfer and Addressing Mode
Typical Data Transfer Instructions
Name Mnemonic
Load LD
Store ST
Move MOV
Exchange XCH
Input IN
Output OUT
Push PUSH
Pop POP Data Transfer Instructions with Different
Addressing Modes
Assembly
Mode Convention Register Transfer
Direct address LD ADR AC M[ADR]
Indirect address LD @ADR AC  M[M[ADR]]
Relative address LD $ADR AC  M[PC + ADR]
Immediate operand LD #NBR AC  NBR
Index addressing LD ADR(X) AC  M[ADR + XR]
Register LD R1 AC  R1
Register indirect LD (R1) AC  M[R1]
Auto-increment LD (R1)+ AC  M[R1], R1  R1 + 1
Auto-decrement LD -(R1) R1  R1 - 1, AC  M[R1]
 Reading Resources/Materials
Chapter 8: Central Processing Unit
 M. Marios Mano: Computer System Architecture (3rd edition),
Pearson, 1992

Chapter 13: Instruction Sets (Addressing Modes and Formats)

Stallings William: Computer Organization and Architecture:
Designing for Performance (10th ed.), Prentice Hall, 2016.

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THANKS!!

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