6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D U1001-E
MT6761V/CA
D
DVDD_MODEM

MT6762-SBS DVDD_CORE

DVDD_MODEM_6357_FB [8]
DVDD_MODEM_6357_GND [8]
MODEM GPU
R9 K20 C1006 22uF
DVDD_VDD_MODEM DVDD_MFGSYS
T10 DVDD_VDD_MODEM DVDD_MFGSYS L19
U9 DVDD_VDD_MODEM DVDD_MFGSYS L20
U13 DVDD_VDD_MODEM DVDD_MFGSYS M20
RS1016 RS1017 V10 N19 C1060 1uF
DVDD_VDD_MODEM DVDD_MFGSYS
V13 DVDD_VDD_MODEM DVDD_MFGSYS N20
W9 DVDD_VDD_MODEM DVDD_MFGSYS P20 C1061 1uF
W10 DVDD_VDD_MODEM DVDD_MFGSYS T20
C1017 22uF W8 T21
DVDD_VDD_MODEM DVDD_MFGSYS C1008
Y8 1uF
DVDD_VDD_MODEM
C1018 22uF
C1009 1uF

C1023 1uF

C1024 1uF

C1011 1uF C1055 NC

C1012 1uF

C1013 1uF
DVDD_DVFS
C1014 1uF
CPU
C1015 1uF
[8] DVDD_DVFS_6357_FB
C1016 1uF
[8] DVDD_DVFS_6357_GND
DVDD_DVFS U16
DVDD_DVFS U18
DVDD_DVFS U20
DVDD_DVFS U22
Y16 RS1011 RS1012
DVDD_DVFS
DVDD_DVFS Y18
DVDD_DVFS Y20
DVDD_DVFS Y21
DVDD_DVFS Y22
AA16 C1026 22uF
DVDD_DVFS
DVDD_DVFS AA18
AA20 C1027 22uF
VSRAM_OTHERS_PMU DVDD_DVFS
SRAM DVDD_DVFS
DVDD_DVFS
AA21
AA22
C C1100 470nF
DVDD_DVFS
DVDD_DVFS
AB16
AB18
C
C1029 1uF
R19 DVDD_MFG_SRAM
C1057 NC
C1030 1uF

VSRAM_OTHERS_PMU C1031 1uF

C1032 1uF
L13 DVDD_TOP_SRAM
V12 DVDD_TOP_SRAM
C1056 470nF

C1019 470nF
C1035 2.2uF

C1036 2.2uF
DVDD_SRAM_DVFS

C1021 1uF

V15 C1051 1uF

C1020
DVDD_MCUSYS_SRAM
1uF

C1052 1uF

C1062 1uF

CORE
DVDD_CORE
[8] DVDD_CORE_6357_FB
[8] DVDD_CORE_6357_GND

DVDD_TOP J21
DVDD_TOP K10
K13 RS1042 RS1043
DVDD_TOP
DVDD_TOP K14
DVDD_TOP K17
DVDD_TOP L17
DVDD_TOP M10
DVDD_TOP M14
M18 C1039 22uF
DVDD_TOP
DVDD_TOP N13
N17 C1040 22uF
DVDD_TOP
P10
B DVDD_TOP
DVDD_TOP P13
P14
B
VDRAM_PMU DVDD_TOP
VDDQ DVDD_TOP
DVDD_TOP
P18
P23
R13 C1041 1uF
DVDD_TOP
DVDD_TOP R17
T18 C1042 1uF
DVDD_TOP
C1043 1uF
C1022 H11 AVDDQ_EMI0 C1044
100nF H12 1uF
AVDDQ_EMI0
C1001
100nF C1045 1uF
H18 AVDDQ_EMI1
C1002 H19 AVDDQ_EMI1 C1046
100nF 1uF
C1004
100nF C1047 1uF

H10 C1048 1uF

AVDD2_EMI
C1025 2.2uF H13 AVDD2_EMI C1049
H17 1uF
AVDD2_EMI
H20 AVDD2_EMI C1050 1uF

C1003 4.7uF

C1005 10uF

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D U1001-F
D
VA12_PMU
MT6761V/CA
C1103
MT6762-SBS 100nF

GND AVDD & MD_A

AVDD12_MD AG21 AVDD18_SOC

A11 DVSS AVDD18_MD AG19 AVDD18_SOC

A13 DVSS AVDD18_SOC
A15 DVSS C1101
B3 AG18 C1102 C1104
DVSS AVDD18_AP
B21 DVSS AVDD18_CPU AC18 1uF
C2 1uF 1uF
DVSS
C6
C12
DVSS
DVSS
PLL
C16 DVSS
C20 DVSS AVDD18_DDR H21 EMI_VDD1
C23 DVSS C1105
C1106
D3 DVSS
D9 DVSS 100nF 1uF
D13 DVSS
D23 DVSS
D27 DVSS
E4 DVSS AVDD12_PLLGP T14 VA12_PMU
E24 DVSS
E25 DVSS AVDD18_PLLGP T16 AVDD18_SOC
F2 DVSS C1107
F4 DVSS C1108
F5 DVSS 100nF
F6 100nF
DVSS
F7 DVSS
F8
F10
DVSS
DVSS
PERI_D
F11 DVSS
F12 DVSS
F14 DVSS DVDD18_IOLT G28 VIO18_PMU
F17 DVSS DVDD18_IOLM W28
F19 DVSS
F20 DVSS DVDD18_IOBL AG27
F21 DVSS
F22 DVSS C1109 C1111
C1110 C1112
F23 DVSS C1113
G4 DVSS DVDD18_IORB U1 100nF 100nF 100nF 100nF
100nF
G6 DVSS DVDD18_IORB AG6 NC NC NC
G11 DVSS
G12 DVSS
C G13
G14
DVSS
DVSS
DVDD18_IORT J1
C
G15 DVSS
G21 DVSS DVDD_VQPS AD18 VEFUSE_PMU
G22 DVSS
G26 DVSS
H14 DVSS DVDD18_MSDC0 A27
H15 DVSS
H22 DVSS
H25 DVSS DVDD28_MSDC1 AD28 VMC_PMU
J22 DVSS
J23 DVSS
J24 DVSS DVDD28_SIM1 AE28 VSIM1_PMU
K9 DVSS
K11 DVSS
K12 DVSS DVDD28_SIM2 AC28
VSIM2_PMU
K15 DVSS
K16 C1114
DVSS C1117 C1115
K18 AA28 C1116
DVSS DVDD18_MSDC1 100nF
L8 1uF 100nF
DVSS 100nF
L11 DVSS DVDD18_SIM AB28
L15 DVSS
L16
L21
DVSS Note: 11-1 Note: 11-2
DVSS
L22 DVSS
L26 DVSS
M6 DVSS
M7 DVSS
M12 DVSS C1118 C1119
M16 DVSS 100nF 100nF
M22
M24
DVSS PERI_A
M28
DVSS Note: 11-3
DVSS
N6 DVSS
N7 DVSS AVDD12_CSI U2 VA12_PMU
N11 DVSS
N15 DVSS
N21 DVSS AVDD12_DSI R28 VA12_PMU
N22 DVSS C1120 C1121
P7 DVSS
P12 DVSS 1uF 1uF
P16 DVSS
P21 DVSS
P22 DVSS
R11 DVSS
R15 DVSS
R21 DVSS AVDD04_DSI T28 DVDD_CORE
R22 DVSS
T8 DVSS
T12 C1122
DVSS
T22
B U11
V8
DVSS
DVSS
1uF B
DVSS
V16 DVSS
V17 DVSS
V19 DVSS
V21 DVSS
W17 DVSS
W19 DVSS
W21 DVSS
AA9
AA11
DVSS Schematic design notice of "11_BB_POWER_IO" page.
DVSS
AA13 DVSS
AB10 DVSS
AB12 DVSS
AD7
AD11
DVSS AVDD18_USB D28 AVDD18_SOC Note 11-1: C1114 closed DVDD18_MSDC0 150mil
DVSS
AD14 DVSS
AE8 DVSS AVDD12_USB E28 VA12_PMU
AE11
AE14
DVSS Note 11-2: C1117 closed DVDD28_MSDC1 150mil
DVSS
AF8 DVSS AVDD33_USB B28 VUSB_PMU
AF11 DVSS
AF14
AF17
DVSS C1123 C1125 C1124 Note 11-3: C1118 closed DVDD18_MSDC1 150mil
DVSS
AF28 DVSS 1uF 100nF 1uF
AG26 DVSS

AVDD18_WBG H2 AVDD18_SOC

C1127
AVDD12_WBG C3 VA12_PMU
100nF
C1126

100nF

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 3OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U1001-A
MT6761V/CA U1001-B

D MT6762-SBS
MT6761V/CA
D
MT6762-SBS
PMU_IF SIM ABB_IF
[10] E27 SYSRSTB SIM1_SCLK [21] AA25 SIM1_SCLK MAIN_X26M_IN AB13 [10] PMIC_CLK_BB
SYSRSTB
SIM1_SIO [21]
Y25 SIM1_SIO
WATCHDOG K24 WATCHDOG SIM1_SRST [21] AA26 SIM1_SRST
[10,13] AE9 [25]
TX_BB_IP0 LTE_TX_BB0_IP
SIM2_SCLK [21] AC25 SIM2_SCLK TX_BB_IN0 AD9 [25] LTE_TX_BB0_IN
SRCLKENA0 [10] L25 SRCLKENA0 SIM2_SIO [21] AB25 SIM2_SIO TX_BB_QP0 AE10 [25] LTE_TX_BB0_QP
AC26 SIM2_SRST TX_BB_QN0 AD10
SRCLKENA1 [10,25] M25 SRCLKENA1
SIM2_SRST [21] [25] LTE_TX_BB0_QN
0829 T2
RTC32K_CK [10] H26 RTC32K_CK RFIC_Ctrl
AF13 6177_i0 6177m_iP [25] LTE_PRX_BB0_IP
PRX_BB_I0P
K27 [25] AE21 AG13 6177m_iN [25] LTE_PRX_BB0_IN
PWRAP_SPI0_CSN [4,10] PWRAP_SPI0_CSN RFIC0_BSI_EN RFIC0_BSI_EN PRX_BB_I0N
PWRAP_SPI0_CK [10] L27 PWRAP_SPI0_CK RFIC0_BSI_CK [25] AF22 RFIC0_BSI_CK PRX_BB_I1 AF15 6177_i1
M27 AE20 AF12 6177_q0 6177m_qP [25] LTE_PRX_BB0_QP
PWRAP_SPI0_MO [10] PWRAP_SPI0_MO RFIC0_BSI_D0 [25] RFIC0_BSI_D0 PRX_BB_Q0P
K28 AF21 AG12 6177m_qN [25] LTE_PRX_BB0_QN
PWRAP_SPI0_MI [4,10] PWRAP_SPI0_MI RFIC0_BSI_D1 [25] RFIC0_BSI_D1 PRX_BB_Q0N
AG22 RFIC0_BSI_D2 PRX_BB_Q1 AG15 6177_q1

AUD_CLK_MOSI [11] J25 AUD_CLK_MOSI

AUD_CLK_MISO [11] G27 AUD_CLK_MISO 6177_i0 6177m_iP
RF MIPI DRX_BB_I0P
DRX_BB_I0N
AD13
AE13 6177m_iN
[25] LTE_DRX_BB0_IP
[25] LTE_DRX_BB0_IN
J27 AG16
AUD_DAT_MISO0 [11] AUD_DAT_MISO0 DRX_BB_I1 6177_i1
6177m_qP
J28 [27] AG7 AD12 6177_q0 [25]
AUD_DAT_MISO1 [11] AUD_DAT_MISO1 MIPI0_SCLK MISC_BSI_CK_0 DRX_BB_Q0P LTE_DRX_BB0_QP
[27] AF7 AE12 6177m_qN [25]
MIPI0_SDATA MISC_BSI_DO_0 DRX_BB_Q0N LTE_DRX_BB0_QN
AF16 6177_q1
K26 MIPI1_SCLK [26] AF5
DRX_BB_Q1 Note: 12-5
AUD_DAT_MOSI0 [4,11] AUD_DAT_MOSI0 MISC_BSI_CK_1
AUD_DAT_MOSI1 [11] K25 AUD_DAT_MOSI1 MIPI1_SDATA [26] AF6 MISC_BSI_DO_1
MIPI2_SCLK AE6 MISC_BSI_CK_2 DET_IP0 AG9 [25] LTE_DET_BB0_IP
AUD_SYNC_MISO [11] H27 AUD_SYNC_MISO MIPI2_SDATA AD6 MISC_BSI_DO_2 DET_IN0 AF9 [25] LTE_DET_BB0_IN
AUD_SYNC_MOSI [11] J26 AUD_SYNC_MOSI DET_QP0 AF10 [25] LTE_DET_BB0_QP
AE5 MISC_BSI_CK_3 DET_QN0 AG10 [25] LTE_DET_BB0_QN
AD5 MISC_BSI_DO_3

Test Pin BPI RFIC_ET0_P AD8

RFIC_ET0_N AC9

F27 TESTMODE APC AC10 [26] VRAMP_DCDC

AE2 BPI_PA_VM1

C W13
AD3 BPI_PA_VM0 AUX IN C
TP_PLLGP
AF24 BPI_BUS15_ANT2
W12 TN_PLLGP AE3 BPI_BUS14_ANT1
AE25 BPI_BUS13_ANT0 AUXIN4 AE17

AE24 BPI_BUS12_OLAT1 AUXIN3 AE18

AD4 BPI_BUS11_OLAT0
AUXIN2 AE19
BPI_BUS10 [23] AF25 BPI_BUS10
AC5 GPIO56_BUS9 AF26 AF19 [27]
CDM3P5A [25] BPI_BUS9 AUXIN1 AUX_IN1_NTC
BPI_BUS8 [23] AD25 BPI_BUS8
AB6 CDM5P5A BPI_BUS7 [29] AC6 BPI_BUS7 AUXIN0 AF20 [7] AUX_IN0_NTC
AG4 BPI_BUS6
AG3 BPI_BUS5
AG2 C1201 C1202
BPI_BUS4
BPI_BUS3
BPI_BUS2
[29]
[29]
AF4
AF3
BPI_BUS3
BPI_BUS2
REF POWER 1uF 1uF

BPI_BUS1 [30] AF2 BPI_BUS1

BPI_BUS0 [30] AE4 BPI_BUS0
REFP AF18 REFP

C1203

100nF
Note: 12-2
A1 NC
A28 NC
AG1 NC
AG28 NC
Note: 12-1

B B

VIO18_PMU

PWRAP_SPI0_CSN [4,10]

R1201

R1202
NC
PWRAP_SPI0_MI

10K
[4,10]

NC

R1207
10K
AUD_DAT_MOSI0 [4,11]

10K
Schematic design notice of "12_BB_1" page.
Note 12-1: The de-coupling cap. for REFP (AF18 ball) have to be placed as close to BB as possible. Note: 12-3 Note: 12-4

Note 12-2: To shunt a 1uF capacitor in the AUXIN ADC input to prevent noise coupling. It should
be placed as close to BB as possible. Connect the unused AUX ADC input to GND.
Note 12-3: "PWRAP_SPI0_CSN" and "AUD_DAT_MOSI0" are bootstrap pin to select which interface will be the JTAG pin out.
PWRAP_SPI0_CSN AUD_DAT_MOSI0 JTAG Function
default=PU default=PD AP_JTAG MD_JTAG
HI LO N/A N/A
HI HI SPI0+EINT8 SPI1+SPI3
(by ext. PU)
LO LO SPI0+EINT8 N/A
(by ext. PD)
LO HI MSDC1 N/A
(by ext. PD) (by ext. PU)

A Note 12-4: PWRAP_SPI0_MI is DDR type feature in bootstrap

A
COMPANY:
PWRAP_SPI0_MI Booting interface <Company Name>
default=PU DDR MSDC0 pin mux
LO LPDDR3 follow LP3 Ref SCH. TITLE:
(by ext. PD)
HI LPDDR4X follow LP4X Ref SCH. MT6762
DRAWN: DATED:
Chunshen.zhou 20170417
Note 12-5: Please set unused IQ pins in NC CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 4OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D U1001-D
D
MT6761V/CA
U1001-C
MT6761V/CA
MT6762-SBS
MT6762-SBS
USB CONN_Dig.
CSI-0 DSI-0
USB_DP [23,24] C27 USB_DP CONN_TOP_CLK J6 [31] CONN_TOP_CLK
USB_DM B27 USB_DM CONN_TOP_DATA K7 [31] CONN_TOP_DATA
RDP2 [20] N3 CSI0A_L0P DSI0_CKP P25 [23] DSI0_CKP [23,24]
N4 P26
RDN2 [20] CSI0A_L0N DSI0_CKN [23] DSI0_CKN CONN_BT_CLK J5 [31] BT_CLK
CONN_BT_DATA K8 [31] BT_DATA
OTG_ID [23] AB27 IDDIG
RDP0 [20] N1 CSI0A_L1P DSI0_D0P N25 [23] DSI0_D0P AB26 DRVBUS CONN_WF_CTRL0 H5 [31] WF_CTRL0
RDN0 [20] N2 CSI0A_L1N DSI0_D0N N26 [23] DSI0_D0N CONN_WF_CTRL1 H4 [31] WF_CTRL1
CONN_WF_CTRL2 H3 [31] WF_CTRL2
RCP [20] P1 CSI0A_L2P DSI0_D1P N28
RCN [20] P2 CSI0A_L2N DSI0_D1N N27
[23]
[23]
DSI0_D1P
DSI0_D1N
BC CONN_WB_PTA
CONN_HRST_B
G2
G3
[31]
[31]
CONN_WB_PTA
CONN_HRST_B

CHD_DP [10] D26 CHD_DP XIN_WBG G7 [31] CONN_XO_IN_BB

RDP1 [20] P3 CSI0B_L0P DSI0_D2P R25 [23] DSI0_D2P CHD_DM [10] E26 CHD_DM
RDN1 [20] P4 CSI0B_L0N DSI0_D2N R26 [23] DSI0_D2N ANT_SEL0 K5
ANT_SEL1 K6
[23] ANT_SEL2 K4
RDP3 [20] R3 CSI0B_L1P DSI0_D3P P27 DSI0_D3P
RDN3 [20]
R4 CSI0B_L1N DSI0_D3N R27 [23] DSI0_D3N KEYPAD
FCAM_DVDD_EN [20] AA1 KPROW0
CONN_IQ
N5 CSI0B_L2P LCM_RST AD26 [23] LCM_RST
GPIO_GPS_LNA_EN [31] AB1 KPROW1
P5 CSI0B_L2N
GPS_I F1 [31] GPS_I
DSI_TE AE27
[23] DSI_TE KPCOL0 [22] AB3 KPCOL0 GPS_Q G1 [31] GPS_Q
AB2 KPCOL1
CSI-1 DISP_PWM AD27 [15,19] DISP_PWM
WF_IP A3 [31] WF_IP
WF_IN A2 [31] WF_IN
WF_QP B1 [31] WF_QP
L3
L4
CSI1A_L0P
CSI1A_L0N
GPIO I2C WF_QN B2 [31] WF_QN

BT_IP D2 [31] BT_IP

AD1 [19] FP_SPI0_MI
RDP0_A_2M [20] L1 CSI1A_L1P
SPI0_MI Touch BT_IN D1 [31] BT_IN
SCL0 [19,23] AB5 SCL0 BT_QP E3 [31] BT_QP
RDN0_A_2M [20] L2 CSI1A_L1N SPI0_CSB AC1 [19] FP_SPI0_CS
SDA0 [19,23] AC4 SDA0 BT_QN F3 [31] BT_QN
SPI0_MO AC2 [19] FP_SPI0_MO
RCP_A_2M [20] M1 CSI1A_L2P
RCN_A_2M [20] M2 CSI1A_L2N SPI0_CLK AD2 [19] FP_SPI0_CK GPIO
Sensor Hub GPIO_EXT0 G23
SCL1 [17] AE1 SCL1
L5 CSI1B_L0P AF1 F25
C M5 CSI1B_L0N SPI1_MI W24 BOARD_ID1
SDA1 [17] SDA1 GPIO_EXT1
F24 [23] GPIO_LCM_ID
C
U23 BOARD_ID2 GPIO_EXT2
SPI1_CSB
M3 CSI1B_L1P
GPIO_EXT3 G24
M4 Y24
CSI1B_L1N SPI1_MO [24] FAST_META Rear Cam
SCL2 [20] V4 SCL2 GPIO_EXT4 F26
SPI1_CLK V24
SDA2 [20] V3 SDA2
CSI-2 GPIO_EXT5 G25 [20] GPIO_CAM_AVDD_EN

GPIO_EXT6 H23
RDP2_B [20] R1 CSI2A_L0P SPI2_MI U24 I2S3_LRCK
R2
RDN2_B [20] CSI2A_L0N
SPI2_CSB T26 I2S3_DO NFC GPIO_EXT7 H24 [20] GPIO_FCAM_ID
SCL3 AC21 SCL3
SDA3 AC22 SDA3 GPIO_EXT8 AA24 [20] GPIO_MCAM_ID
RDP0_B [20] T1 CSI2A_L1P SPI2_MO T25 I2S0_DI
RDN0_B [20] T2 CSI2A_L1N
GPIO_EXT9 Y23 GPIO_NFC_RSTB
SPI2_CLK T24 I2S3_BCK
GPIO_EXT10 AA23 [20] MCAM1_ID
T3
RCP_B
RCN_B
[20]
[20] T4
CSI2A_L2P
CSI2A_L2N
Front Cam
SCL4 [20] U6 SCL4 GPIO_EXT11 AD21 [23] GPIO_CTP_RSTB
SPI3_MI U25
SDA4 [20] V6 SDA4
RDP1_B [20] U3 CSI2B_L0P
GPIO_EXT12 AD20 [14,25]CHG_OTG
RDN1_B [20] U4 CSI2B_L0N SPI3_CSB U26
GPIO_EXT13 AD19 [19] GPIO_BL_ENN
SPI3_MO V26
[20] R5
RDP3_B
RDN3_B [20] T5
CSI2B_L1P
CSI2B_L1N SPI3_CLK V25 Sub PMIC GPIO_EXT14 AC20 [19] GPIO_BL_ENP
SCL5 [13,14] AB23 SCL5
SDA5 [13,14] AC23 SDA5 GPIO_EXT15 AC19 GPIO_VCN33_EN

CSI Ctrl SPI4_MI U27 [17] SPI4_MI

SRCLKENAI Y1 SRCLKENAI

SPI4_CSB V28 [17] SPI4_CSB

PWM0 AC3
CAM_RST0 [20] V2 CAM_RST0 J3 SCL6
SPI4_MO T27 [17] SPI4_MO GPIO_VCAMA_F_EN [20]
J4 SDA6 INT_SIM1 AE26 INT_SIM1
CAM_PDN0 [20] W6 CAM_PDN0
SPI4_CLK V27 [17] SPI4_CLK
INT_SIM2 AF27 INT_SIM2
CAM_RST1 [20] V1 CAM_RST1
CAM_PDN1 [20] Y2 CAM_PDN1 UART EINT0 AB4 [23] EINT_CTP

EINT1 AA7 EINT_SD

CAM_RST2 [20] K3 CAM_RST2 GPO URXD0 [24] AA3 URXD0
EINT2 AA5 [24] EINT_RAMDUMP
CAM_PDN2 [20] K2 CAM_PDN2
UTXD0 [24] AA2 UTXD0
PERIPHERAL_EN0 AD22
EINT3 AA4 [19] FP_INT_N
AF23 CAM_RST3
PERIPHERAL_EN1 AD24 [20] CAM_STROBEN_HWEN
EINT4 Y6 [17] EINT_ACC
L24 CAM_PDN3
PERIPHERAL_EN2 AD23 [22] PCHG_LED_EN
SD (MSDC1) EINT5 Y7 [17] EINT_GRY
AC24 CAM_FLASH_HWEN
B CAM_CLK0 [20] W5 CAM_CLK0
PERIPHERAL_EN3
AE23
[20]

[18] GPIO_SPK_EN
EINT6 Y4 [17] EINT_ALPS B
PERIPHERAL_EN4 W26 Y3 EINT_SMARTPA
CAM_CLK1 [20] W2 MSDC1_CLK [21] MSDC1_CLK EINT7
CAM_CLK1
PERIPHERAL_EN5 AE22 [13,14] GPIO_CHG_EN_0
W27 MSDC1_CMD EINT8 AA6 NFC_WAKEUP_REQ
CAM_CLK2 [20] J2 CAM_CLK2 MSDC1_CMD [21]

EINT9 W4 [17] EINT_HALL

AG24 CAM_CLK3
MSDC1_DAT3 [21]
W25 MSDC1_DAT3
MSDC1_DAT2 [21]
AA27 MSDC1_DAT2 EINT10 W3 [19] FP_RST_N
Note: 13-1 MSDC1_DAT1 [21]
Y26
Y27
MSDC1_DAT1
W7 [13,18]
MSDC1_DAT0 EINT11 EINT_CHG_0
MSDC1_DAT0 [21]

EINT12 M26 [19] FP_ID

Schematic design notice of "13_BB_2" page.

Note 13-1: The enable pin of acoustic or optoelectronic devices (e.g. SPK AMP/Backlight/Charger
A OCP/OVP) suggest to use Peripheral_EN[0:5] A
If use other GPIOs as enable pin, suggest to reserve 0201 NC to GND COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U1001-G
MT6761V/CA

MT6762-SBS
EMI_DDR
EMI0_DQ0 [16] C13 EMI0_DQ0 EMI0_CS0_N A9 EMI0_CS0
[16]
EMI0_DQ1 [16] C15 EMI0_DQ1 EMI0_CS1_N E8 EMI0_CS1
[16]
EMI0_DQ2 [16] C14 EMI0_DQ2
EMI0_DQ3 E15 EMI0_DQ3 EMI0_CKE0 D8 EMI0_CKE0
[16] [16]
EMI0_DQ4 B15 EMI0_DQ4 EMI0_CKE1 E7 EMI0_CKE1
[16] [16]
EMI0_DQ5 D15 EMI0_DQ5
[16]
EMI0_DQ6 E16 EMI0_DQ6 EMI0_DM0 B16 EMI0_DM0
[16] [16]
EMI0_DQ7 B17 EMI0_DQ7 EMI0_DM1 C17 EMI0_DM1
[16] [16]
EMI0_DQ8 A17 EMI0_DQ8 EMI0_DM2 E10 EMI0_DM2
[16] [16]
EMI0_DQ9 E18 EMI0_DQ9 EMI0_DM3 B19 EMI0_DM3
[16] [16]
EMI0_DQ10 F18 EMI0_DQ10
[16]
EMI0_DQ11 C18 EMI0_DQ11 EMI0_CK_T F9 EMI0_CK_T
[16] [16]
EMI0_DQ12 D19 EMI0_DQ12 EMI0_CK_C E9 EMI0_CK_C
[16] [16]
EMI0_DQ13 E19 EMI0_DQ13
[16]
EMI0_DQ14 C19 EMI0_DQ14
[16] E14
EMI0_DQS0_C EMI0_DQS0_C
EMI0_DQ15 A19 EMI0_DQ15 [16]
[16] D14
EMI0_DQS0_T EMI0_DQS0_T
EMI0_DQ16 D10 EMI0_DQ16 [16]
[16]
EMI0_DQ17 C11 EMI0_DQ17 EMI0_DQS1_C D17 EMI0_DQS1_C
[16] [16]
EMI0_DQ18 C10 EMI0_DQ18 EMI0_DQS1_T E17 EMI0_DQS1_T
[16] [16]

C EMI0_DQ19
[16]
EMI0_DQ20
D12

B13
EMI0_DQ19
EMI0_DQS2_C E13 EMI0_DQS2_C
[16]
C
[16]
EMI0_DQ20
EMI0_DQS2_T F13 EMI0_DQS2_T
EMI0_DQ21 B11 EMI0_DQ21 [16]
[16]
EMI0_DQ22 B12 EMI0_DQ22 EMI0_DQS3_C E22 EMI0_DQS3_C
[16] [16]
EMI0_DQ23 E11 EMI0_DQ23 EMI0_DQS3_T D22 EMI0_DQS3_T
[16] [16]
EMI0_DQ24 D20 EMI0_DQ24
[16]
EMI0_DQ25 E20 EMI0_DQ25
[16]
EMI0_DQ26 E21 EMI0_DQ26 EMI0_CA0 B8 [16] EMI0_CA0
[16]
EMI0_DQ27 D21 EMI0_DQ27 EMI0_CA1 B7 [16] EMI0_CA1
[16]
EMI0_DQ28 B20 C7 [16] EMI0_CA2
[16]
EMI0_DQ28 EMI0_CA2
EMI0_DQ29 C22 EMI0_DQ29 EMI0_CA3 D6 [16] EMI0_CA3
[16]
EMI0_DQ30 C21 EMI0_DQ30 EMI0_CA4 B5 [16] EMI0_CA4
[16]
EMI0_DQ31 A21 EMI0_DQ31 EMI0_CA5 D5 [16] EMI0_CA5
[16]

EMI0_CA6 C5 [16] EMI0_CA6

EMI0_CA7 E6 [16] EMI0_CA7

EVREF F16 VREF_EMI EMI0_CA8 E5 EMI0_CA8

[16] [16]
G16 NC EMI0_CA9 A5 EMI0_CA9
[16]

E23 NC NC A7
Note: 14-1 NC B9
NC C4
NC C9
EMI_EXTR B4 D4

34.8¦¸
EMI_EXTR NC
NC D7
NC D11

LPDDR3/4 NC D18
R1401

LPDDR3 LPDDR4 Note: 14-2

eMMC (MSDC0)
B B
R1401 34.8¦¸ 60.4¦¸ MSDC0_DAT7 [16] A26 MSDC0_DAT7 MSDC0_RSTB C25 MSDC0_RSTB
MSDC0_DAT6 [16] B24 MSDC0_DAT6 [16]
MSDC0_DAT5 [16] B23 MSDC0_DAT5 MSDC0_CMD B25 MSDC0_CMD
MSDC0_DAT4 [16] A23 MSDC0_DAT4 [16]
MSDC0_DAT3 [16] C24 MSDC0_DAT3 MSDC0_CLK D25 MSDC0_CLK
MSDC0_DAT2 [16] A25 MSDC0_DAT2 [16]
MSDC0_DAT1 [16] D24 MSDC0_DAT1 MSDC0_DSL B26 MSDC0_DSL
MSDC0_DAT0 [16] C26 MSDC0_DAT0 [16]

Schematic design notice of "14_BB_3" page.

Note 14-1: R4001 please select 34.8 ohm (1%) resistor

Note 14-2: Please check eMCP LP3 and eMCP LP4X pin mux
A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 6OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

VIO18_PMU

390K
R1501

AUX_IN0_NTC [4]

1
RT1501
100K

2
C Thermistor to sense AP C
temperature
1. NTC1501must keep a distance about 6~8 mm away from AP and far from
other heat sources 10 mm at least.
2. The distance is the shortest distance from package edge to edge.

B B

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 7OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

Note: 20-2

U2000-A
MT6357MRV

MT6357
VBUCK CTRL
VSYS R2000 1¦¸ VSYS_SMPS B2 VSYS_SMPS

1uF
C2000
22uF
GND_SMPS B1 GND_SMPS

NC
L close to chip

C2008
RS2000

VPROC IN VPROC
A4 A6 L2000
VSYS_VPROC VSYS_VPROC VPROC VPROC
B4 VSYS_VPROC VPROC A7 DVDD_DVFS
C4 B6 1 0.47uH 2
VSYS_VPROC VPROC
VPROC B7
For EOS Optional VPROC C6

10uF
VPROC C7
differential and shielding

C2001
VPROC_FB C2 [2] DVDD_DVFS_6357_FB

C A5 GND_VPROC
GND_VPROC_FB D2 [2] DVDD_DVFS_6357_GND
C
GND_VPROC B5 GND_VPROC
RS2001 C5 GND_VPROC

L close to chip
VCORE IN VCORE
A8 A9 L2001
VSYS_VCORE VSYS_VCORE VCORE VCORE
B8 VSYS_VCORE VCORE A10 DVDD_CORE
C8 B10 1 0.47uH 2
VSYS_VCORE VCORE
VCORE C10

10uF
C9 GND_VCORE differential and shielding
B9 GND_VCORE
D3 [2]

C2002
VCORE_FB DVDD_CORE_6357_FB

GND_VCORE_FB E3 [2] DVDD_CORE_6357_GND

GND_VCORE
RS2002

L close to chip

VMODEM IN VMODEM L2002

VSYS_VMODEM A13 B11 VMODEM DVDD_MODEM
VSYS_VMODEM VMODEM
B13 C11 1uH
VSYS_VMODEM VMODEM

4.7uF
differential and shielding

VMODEM_FB E13 [2] DVDD_MODEM_6357_FB

C2003
A12 GND_VMODEM
GND_VMODEM B12 D14 [2] DVDD_MODEM_6357_GND
GND_VMODEM GND_VMODEM_FB
RS2003 C12 GND_VMODEM

VPA_PMU
Note: 20-1
VPA IN VPA L2003
PA Middle CAP
VSYS_VPA A2 A1 VPA
VSYS_VPA VPA
L close to PMIC

2.2uF
A3 1uH
VSYS_VPA
10uF

VPA_PMU
VPA_FB E4

C2005
B3
B GND_VPA
B
C2004

GND_VPA
RS2004

VS1 IN VS1 close to VPA Inductor

VSYS_VS1 B14 VSYS_VS1 VS1
A14 A16 L2004 L close to PMIC
VSYS_VS1 VS1
4.7uF C2007

VS1 B16 VS1_PMU

1uH

A15 GND_VS1
GND_VS1 B15 GND_VS1
RS2005 VS1_FB E14 VS1_PMU

A Schematic design notice of "20_POWER_MT6357_Buck" A

COMPANY:
Note 20-1: C2005, please choose 0402 size <Company Name>
Note 20-2: PMIC Part number notice for MT6765/62/61 platform TITLE:

DRAWN: DATED:
MT6762
MTK Platform PMIC Chunshen.zhou 20170417
MT6765 / 62 MT6357 CRV
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
MT6761 MT6357 MRV <Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 8OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

1. "Typical Cap" defined in design notice is the minimum cap. to LDO Cout.
2. NC cap can move to application, if (PCB L<20nH, PCB R<0.2 ohm)
VS2_PMU trace >40mil
VS1_PMU VS2_PMU => value and placement of Cap, please refer design notice
EXT_VS2
U2000-B
NC
MT6357MRV
EXT_VS2_FB R2102

0¦¸ R2101
MT6357
LDO IN LDO Close to PMIC
2 1
VS1_PMU C17 VS1_LDO1 VFE28 L14 40mA VFE28_PMU
SH1 25mA

4.7uF
T4

22uF

22uF
VXO22 VXO22_PMU

VCN28 K13 40mA VCN28_PMU

C2102
C2100

C2101
EXIT BUCK OPTION H16 145mA VCAMA_PMU
VCAMA
exit VS2 buck-mt6762 W/Oexit VS2 buck-mt6761 T5 20mA VAUX18_PMU
VAUX18
F15
C2100 10UF 22UF VS2_PMU VS2_LDO1
L7 50mA VAUD28_PMU
VAUD28
F17 VS2_LDO2

2.2uF
R2101 0OHM 0OHM ALDO

C2104 1uF

C2107 1uF

1uF

1uF
NC
C2120

/2.2UF
NC 0OHM

C2103
R2102

C2136
NC
C2140
U2000 MT6357CRV MT6357MRV

G14 P17 400mA VCN33_PMU

for EOS VSYS_LDO1 VCN33
VSYS N17 VSYS_LDO2 VLDO28 L16 360mA VLDO28_PMU

K7 VSYS_LDO3 VIO28 K15 200mA VIO28_PMU

C L15 200mA VMC_PMU
C

4.7uF
VMC

NC
22uF 22uF
F13 D_GND VMCH N16 800mA VMCH_PMU
C2109 C2110 G8 D_GND

C2111
G7 D_GND VEMC L17 400mA VEMC_PMU
G9 D_GND
G12 D_GND VSIM1 J17 50mA VSIM1_PMU
H6 D_GND
G10 D_GND VSIM2 K16 50mA VSIM2_PMU
G11 D_GND
H7 D_GND VIBR M16 200mA VIBR_PMU
H8 D_GND
H9 D_GND VUSB J14 50mA VUSB_PMU
All LDO Input Cap close to PMIC H10 D_GND
H11 D_GND VEFUSE H15 200mA VEFUSE_PMU

C2118 1uF
C2112 1uF

C2113 1uF

C2114 1uF

C2115 1uF

C2116 1uF

C2117 1uF

C2121 1uF
F12

1uF
D_GND

1uF

C2137 1uF
F11 D_GND
F10 D_GND DLDO
F9

C2143
D_GND

C2144
H12 D_GND
J6 D_GND
D7 D_GND VRF18 D16 450mA VRF18_PMU
D8 D_GND
D6 D_GND
D9 D_GND
F5 D_GND VCN18 E15 200mA VCN18_PMU
J7 D_GND
D10 D_GND VCAMD E17 200mA/350mA VCAMD_PMU
D11 D_GND
D12 D_GND VCAMIO A17 140mA VCAMIO_PMU
D13 D_GND
F6 D_GND VIO18 B17 600mA VIO18_PMU
J8 D_GND

C2142 1uF

1uF

1uF
K12

4.7uF
D_GND

4.7uF
RS2103
E6 D_GND AVDD18_SOC

C2141
E7

C2138
D_GND
E8 SLDO1

C2126
D_GND

C2127
RS2104
F7 D_GND EMI_VDD1
J9 D_GND
E11 D_GND MTK request not removed, close to PMIC CAP C2127
E9 D_GND
E10 D_GND VRF12 E16 200mA VRF12_PMU
E12 D_GND
F8 D_GND
J11 D_GND
VSRAM_PROC G15 200mA DVDD_SRAM_DVFS

VSRAM_OTHERS G16 200mA VSRAM_OTHERS_PMU

Close to PMIC VREF
B H17 1200mA VDRAM_PMU
B
C2128 VDRAM
100nF T14
VREF VREF

4.7uF

2.2uF

2.2uF

4.7uF
SLDO2
GND_VREF T13 GND_VREF

C2129

C2131
C2130

C2132
RS2100

DIG Power TREF R9

VIO18_PMU K10 DVDD18_IO

RS2101
DVDD18_DIG L10 DVDD18_DIG TREF_PMU
100nF
C2133 1uF

C2135 1uF

J10 DVSS18_IO Note: 21-1

Power Switch
C2134

RS2102

Schematic design notice of "21_POWER_MT6357-LDO"

Note 21-1:
If these power trace can meet LDO layout constraint, these CAP can be NC or removed.
Please refer to MT6357 design notice.

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 9OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

VRTC28
U2000-C

MT6357
Control I/F RTC
D2201
PWRKEY [13,22] K A R4 R12
PWRKEY VRTC28

1.5K
100nF
Note: 22-3 HOMEKEY [22] RB521CM-30T2R
N4
D SYSRSTB [4] R5
FCHR_ENB
D

C2200
RESETB
close to PMIC
WATCHDOG[4,13] T8 R2201
WDTRSTB_IN
22uF
R2202 220K N3 UVLO_VTH
C2201

W/O CHG:3.0V,W/I CHG:2.8V-----185k-270K RTC32K_1V8_0 P14 [4] RTC32K_CK

SRCLKENA0 [4] N7 SRCLKEN_IN0
RTC32K_1V8_1 R15
SRCLKENA1 [4,25] N8 SRCLKEN_IN1
RTC32K_2V8 P11

M5 EXT_PMIC_EN1
EXT_PMIC_EN2 N5
[12] EXT_PMIC_EN2
M6 EXT_PMIC_PG DCXO
Note: 22-2

PWRAP_SPI0_CSN [4] R8 M2 AVSS22_XO

SPI_CSN AVSS22_XO
PWRAP_SPI0_CK [4] M8 SPI_CLK
P1 AVSS22_XOBUF
AVSS22_XOBUF
PWRAP_SPI0_MO [4] M7 SPI_MOSI AVSS22_XOBUF R1

M9 P1 and R1 ball connect firstly

PWRAP_SPI0_MI [4] SPI_MISO

P5 N2 AVSS22_XO_ISO
PMU_TESTMODE AVSS22_XO_ISO
AVSS22_XO_ISO P2
P9 FSOURCE
VSYSSNS P2 and N2 ball connect firstly

Charger I/F
BATSNS XO_SOC R3 [4] PMIC_CLK_BB
RS2203
ISENSE N9 VSYSSNS
differential
RS2200 XO_CEL T1 [25] PMIC_CLK_RF
M13 BATSNS RS2204

N13 ISENSE XO_WCN P3 [31] PMIC_CLK_WCN

100nF

100nF
RS2205

C2204 1uF
R13 BATON
XO_NFC R2

C2202

C2203
VCDT T11 VCDT

C C

5pF
CHR_LDO R11 CHRLDO XO_EXT T2

5pF

5pF
C2205
NC

NC

NC
BATON [14] P13 VDRV

C2206

C2208
R2207 330K
VBUS

R2209
XTAL1 M1 [10] XTAL1
VCDT rating: 1.268V 7.5K
VBUS

1uF
R2208
XTAL2 N1 [10] XTAL2
Note: 22-4

39K
close to PMIC

C2209

R0402
CHD_DM [5] M10 CHG_DM AUXADC R2211
VAUX18_PMU
0¦¸
CHD_DP [5] M11 CHG_DP [10] AVDD18_AUXADC

C2210 1uF
AVDD18_AUXADC R7
ISINK1_LED_R [22] N12 PCHR_LED
AVSS18_AUXADC P7 [10] AVSS18_AUXADC

C2211
differential

RS2201
Gauge AUXADC_VIN T7

100nF
CS_P [14] T10 CS_P
close to PMIC
R10
CS_N [14] CS_N
[10] AUXADC_VIN

ISINK
ISINK0_LED_G [22] L12 ISINK1
DCXO
Connect to interface for reserving layout area Change to EPSON X1E000291002600

R2210 100K
AVDD18_AUXADC [10]
3mil trace width

EXS00A-CS11019
2 THERMISTOR_GND
AUXADC_VIN [10] 4 THERMISTOR
3mil trace width
B 3 IN OUT 1 [10] XTAL1
B
X2200

AVSS18_AUXADC [10]
15mil trace width

MT6357MRV
Note: 22-1
[10] XTAL2

Route AVDD18_AUXADC/AUXADC_VIN as differential trace (4 mil each)with well GND shielding

and route AVSS18_AUXADC with 20mil trace width under
AVDD18_AUXADC/AUXADC_VIN trace to provide return current path.

Schematic design notice of "22_POWER_MT6357-IF"

Note 22-1: Please implement 2520 & 2016 Size TMS PCB co-layout.
Please refer to MT6762_MT6357 Co-Clock Design Notice for co-layout guide

Note 22-2: 1. Please Connect P1 and R1 ball first and then to GND
2. Please Connect P2 and N2 ball first and then to GND
3. Please connect DCXO GND to main GND by independent L1-2 GND via.;
DO NOT connect it through L1 GND
A Note 22-3: Let floating if disable HOMEKEY function A
COMPANY:
Note 22-4: Please follow MT6762_MT6357 Co-Clock Design Notice for Layout guide of VAUX18, <Company Name>
then R2211 can use 0 ohm to replace BEAD.
Note 22-5: Please connect to battery connector TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 10
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U2000-D

MT6357
AUDIO IF UL POWER

AUD_CLK_MISO [4] R16 AUD_CLK_MISO AVDD28_AUD K1 VAUD28_PMU

C2300 1uF
AUD_DAT_MISO0 [4] T17 AUD_DAT_MISO0
RS2300
AUD_DAT_MISO1 [4] R17 AUD_DAT_MISO1 AVSS28_AUD H5

1uF C2301

C2302 1uF
AUD_SYNC_MISO [4] T16 AUD_SYNC_MISO

AU_MICBIAS0 L3 AU_MICBIAS0

[4] P16 AUD_CLK_MOSI

AUD_CLK_MOSI
AU_MICBIAS1 M3 AU_MICBIAS1
[4] P15 AUD_DAT_MOSI0
AUD_DAT_MOSI0
AVSS28_AUD
[4] N14 AUD_DAT_MOSI1 [18]
AUD_DAT_MOSI1
AUD_SYNC_MOSI [4] M14 AUD_SYNC_MOSI
Close to Chip
C C
AUDIO INPUT
differential
AU_VIN0_P [18] K3 AU_VIN0_P CHARGE PUMP
AU_VIN0_N [18] K4 AU_VIN0_N

differential
AVDD18_AUD G2 VIO18_PMU
[18] K5 C2303
AU_VIN1_P AU_VIN1_P
2.2uF RS2301
AU_VIN1_N [18] L5 AU_VIN1_N AVSS18_AUD F2 AVSS_AUD

differential C2304
D1

4.7uF
AU_V18N
AU_VIN2_P [18] J4 AU_VIN2_P AU_V18N
AU_VIN2_N [18] J5 AU_VIN2_N

FLYP F1 FLYP C2305 1. AVSS18_AUD is connected to GND with

4.7uF
very short trace
FLYN E2 FLYN
ACCDET
2. AVSS18_AUD is connected to de-couple
Close to Chip cap of AVDD18_AUD and AU_V18N with 6mil
ACCDET [18] M4 ACCDET
trace respectively
HP_EINT [18] J1 HP_EINT

AUDIO OUTPUT
dont' differential
AU_HPL[18] must add 3mil ground path to do line shielding J2 AU_HPL
AU_REFN [18] H3 AU_REFN
G3
AU_HPR [18] AU_HPR
differential
1nF

AU_LOLP [18] F4 AU_LOLP

B B
C2306

AU_LOLN [18] F3 AU_LOLN

differential
AU_HSP[18] G6 AU_HSP
AU_HSN[18] G5 AU_HSN

Close to Chip
MT6357MRV

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 11
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Ext. Bulk for VS2

D D
Note: 28-2
Suggest trace width > 25 mil
U2403
Suggest trace width > 40 mil
L2803
VSYS 7 VIN LX 6 1.46V EXT_VS2
1uH

100nF
C2411

R2417
TP9905

C2409
10uF

C2408
10uF
1 8 2 309K
PGOOD FB

C2410
10uF
1 EN

VOUT 4
5 PGND AGND 3

R2416
MT6690N 215K

VS1_PMU
MT6761 MT6762
0.6V x (1+R1/R2)
[21]
U2403 NC MT6690

[9] EXT_VS2_FB

LDO for VA12 Note: 28-1

Suggest trace width > 12 mil

C VSYS
1K R2401
C2401 U2401
1.2V
VA12_PMU
C

28K
MT6680P

10uF
R2403

C2403
1uF
C2 BIAS VOUT A1

EXT_PMIC_EN2 [10] B2 EN ADJ B1

20K
VS2_PMU
A2 VIN R2402

GND
Suggest trace width > 12 mil 0.5V x (1+R2403/R2402)

C1
4.7uF
C2402
B B

Schematic design notice of "28_POWER_ThirdParty-Power"

Note 28-1: VA12 Layout placement please close to AP

Note 28-2: VS2 Buck Layout placement please close to PMIC MT6357

Note 28-3: VCN33 LDO Layout placement please close to MT6631

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 12
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

U2501-A

MT6371
CTRL I/F Internal Pwr
NC PWR_SUBPMIC_VDDA
PWRKEY E8 CHG_QONB BL_VDDA C10
[10,22] R2501 10K
DB_VDDA K10
WATCHDOG [4,10] H8 MRSTB

VDDM K9
EINT_CHG_0 [5,18] J6 IRQB
VDDA J10

IDDIG B8 PD_IRQB

1uF

1uF

NCC25031uF

C2504 1uF
C2501
E9

C2502
GPIO_CHG_EN_0[5,14] CHG_ENB

NC

NC
NC
D8 CHG_OTG

F8 CHG_DSEL

A5 D+ AGND
C A4 D- AGND E5
C
AGND E6
AGND E7
AGND F5
AGND F6
AGND F7
J8 G5
SCL5 [5,14] SCL AGND
AGND G6
J9 SDA AGND G7
SDA5 [5,14]
AGND G9

NC

B B

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 13
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U2501-B

MT6371
D D
CHG PP+VSYS
E4 OVP_CTRL NC F4
PWR_SUBPMIC_VCHG_VMID
VBUS

A1 CHG_VIN CHG_VMID B1

C2613 4.7uF
A2 B2

C2611 2.2uF
CHG_VIN CHG_VMID
A3 CHG_VIN CHG_VMID B3
VBAT

NC
NC
D1 CHG_PGND
D2 CHG_PGND VBAT G1
D3 CHG_PGND VBAT G2
VBAT H1

10uF
VBAT H2

E2 D5 [14] PWR_SUBPMIC_VBATS

C2614
VBUS VBATS

NC
NC

CHG_BOOT D4
25v Close to battery connector
47nF NC
C2615
C1 L2605
CHG_VLX
CHG_VLX C2 VSYS
C3 1uH

22uF
CHG_VLX PWR_SUBPMIC_CHG_VLX

C2616
VSYS F1

NC
VSYS F2
B9 PD_VCONN5V VSYS E1

VSYS
R2619 0¦¸
NC

VBAT RS2020 VSYSSNS

PWR_SUBPMIC_CHG_VDDP
C9 PD_CC1 CHG_VDDP E3 RS2617
CS_IN [14]
A9 PD_CC2
C2610
Kelvin connection

51K
NC
2.2uF

NC
VBAT [14,26,27] 0¦¸ R2616
[10] ISENSE

R2621
C8 F3
C G4
CHG_ILIM CHG_VBATOVPB
CS_OUT [14] RS2615
NC
C
CHG_STAT
J3

1K
TS
NC

NC
ILIM=355/R2610 VSYS 0¦¸ R2614

51K
[10] BATSNS

NC
R2610
NC

R2622
MT6761+24157 MT6762 No 24157
R2617 0¦¸ NC
R2616 NC 0¦¸
R2615 0¦¸ NC OVP
R2614 NC 0¦¸
VBUS_USB_IN
R2619 NC 0¦¸ VBUS

R2620 0¦¸ NC NC

C2619
R2600 0¦¸

U2600

C0402_1UF+/-10%-25V
1uF
B2 VOUT VIN A1
A2 VOUT VIN B1
Switching Charger

1uF

T2602
R2612

R0201
68K

C2612

PTVSHC1SF24VBH
NC
C2 GND OVLO C1

2
WS3221C68

0¦¸
R2613

1
VBAT VSYS

VBUS
BQ24157 33nF
C304
PSC5415 100nF RS2618

B B
BLM18SG121TN1D
B2601

1.5a [14] PWR_SUBPMIC_VBATS

IC-CHARGE_2.1X2.0X0.625_BQ24157YFFR VBAT BATTERY CONNECTOR TREF_PMU

U2601 1.5a
A1
VBUS SW
C1
Close to Risense

2
L2601

16.9K
A2 C2 R2603

SH2602
VBUS SW
C2604

1uH 68m¦¸ VBAT

C0402_1UF+/-10%-16V
B1 C3
1uF

R0805
C2602 TP2600
PMID SW TP2601 TP2602 R2607
C2607 4.7uF
C0603_4.7UF+/-10%-16V
R0201
4.7uF

B2 A3 C2601 33nF

1
Note: 26-1
RS2602

PMID BOOT
RS2601

should be >=16V B3 D1 B63-AB03F20A

PMID PGND
[5,13] A4 D2 7
SCL5 SCL PGND GND4
6 3
GND3 VBAT R2606
1K
B4 D3 5 2 [10]
SDA PGND GND2 TEMP BATON
SDA5 [5,13] 4 1
GND1 GND

LTVS8H4.5CBT5G
CS_IN

ESDBL3V3AE1
C4 E1 N
STAT CSIN [14] 125mil
NC

T2606
ES45D3HP T2603
CS_OUT

100nF
0¦¸ D4 E4

22uF
CHG_OTG[5,25] OTG CSCUT J2601
[14]
R0201
R2604
E2 E3
GPIO_CHG_EN_0[5,13] CD VREF Rfg > 0.5W

C2618
100nF

100nF

T2601

C2617
10K

10K

1uF

BQ24157YFFR R2608 0.01¦¸ 125mil

C2606

R2601
C2603

R2605 NC
C2605

R2602
10K

RS2603
[10]CS_P
RS2604
[10]CS_N

4 mil trace with good shielding (Differential)

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 14
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D U2501-C
D
MT6371
LDO FLASH LED
VSYS J2 LDO_VIN FL_VINTORCH C6 VSYS

C2701 2.2uF
J1 LDO_VOUT FL_LEDCS1 A7 FLASH_LED1

FL_LEDCS2 A6 FLASH_LED2

NC
FL_VMID B4 PWR_SUBPMIC_VCHG_VMID
FL_VMID B5

C2703 4.7uF
FL_VMID B6

NC
FL_TORCH D7

FL_STROBE D6

FL_TXMASK G8

Note: 27-1
LED ISINK BL NC
PWR_SUBPMIC_BL_VLX PL2701
H5 RGB_ISINK1 BL_VLX A10 VSYS
10uH

C2704 22uF
NC
J5

22pF

B1040WS
RGB_ISINK2

D2701
Note: 27-1

NC
ISINK3_LED_G [22] J4 RGB_ISINK3

C2711

NC
ISINK4_LED_R [22] H4 RGB_ISINK4
NC
BL_VOUT D9 [19,23] LCD_LEDA

2.2uF
R2706 0¦¸

C2705
NC
BL_PGND B10
Note: 27-3
C NC
C
BL_LED1 D10 LCD_LEDK1
E10 R2701 0¦¸ [19,23]
BL_LED2
NC
BL_LED3 F10 [19,23] LCD_LEDK2
G10 R2700 0¦¸
BL_LED4

NC
BL_PWM H9 [5,19] DISP_PWM
R2702 0¦¸
BL_EN H10

VSP+5.8V

Display Bias NC
L2703
DB_POSVLX K7 PWR_SUBPMIC_DB_POSVLX VSYS
2.2uH

C2706 4.7uF
Note: 27-2

NC
DB_POSPGND K8

NC
DB_POSVOUT K5

R2704
R2707 0¦¸

C2712
C2707 10uF
NC
K6 PWR_SUBPMIC_DB_BSTVOUT

NC
DB_BSTVOUT

2.7pF
C0201
C2708 10uF

NC
100K
NC
VSN-5.8V
PWR_SUBPMIC_DB_NEGCF1 10uF C2709
DB_NEGCF1 K4

PWR_SUBPMIC_DB_NEGCF2 NC
DB_NEGCF2 K2 Note: 27-2

NC
DB_NEGVOUT K1

R2705
R2708 0¦¸
B B

C2713
10uF
NC

C2710

NC

2.7pF
C0201
NC

100K
DB_NEGPGND K3

DB_ENP H7

DB_ENN H6

NC

Schematic design notice of "27_POWER_SubPMIC-HV powers" page:

Note 27-1: To minimize RF de-sense, it is recommended to reserve 0-ohm and 0402 cap for BOM fine tuning.

Note 27-2: To minimize RF de-sense, it is recommended to reserve 0-ohm and 0201 cap. for BOM fine tuning.

Note 27-3: C2705 could be replaced with C / 1 / uF / 50V + C / 1 / uF / 50V

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 15
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

eMMC+LPDDR3 EMI_VDD1

U3000 KMQE60013M-B318
EMI0_CA0 [6] Y2 CA0 VDD1 F3
EMI0_CA1 [6] Y3 CA1 VDD1 F4
EMI0_CA2 [6] W2 CA2 VDD1 F9

2.2uF

100nF
EMI0_CA3 [6] W3 CA3 VDD1 G5 Note: 44-1
EMI0_CA4 [6] V3 CA4 VDD1 AA3
EMI0_CA5 [6] L3 CA5 VDD1 AA5

C3000

C3001
EMI0_CA6 [6] K3 CA6 VDD1 AB3
VDRAM_PMU
EMI0_CA7 [6] J3 CA7 VDD1 AB4
EMI0_CA8 [6] J2 CA8 VDD1 AB9
EMI0_CA9 [6] H2 CA9
VDD2 F5
EMI0_DQ0 [6] W12 DQ0 VDD2 F8
EMI0_DQ1 [6] V11 DQ1 VDD2 J5
EMI0_DQ2 [6] V13 DQ2 VDD2 K5
EMI0_DQ3 [6] U11 DQ3 VDD2 L2
EMI0_DQ4 [6] U13 DQ4 VDD2 L5
EMI0_DQ5 [6] T11 DQ5 VDD2 M5
EMI0_DQ6 [6] T13 DQ6 VDD2 N5
EMI0_DQ7 [6] R12 DQ7 VDD2 P5
EMI0_DQ8 [6] N12 DQ8 VDD2 P8 Note: 44-4
EMI0_DQ9 [6] M13 DQ9 VDD2 P11
EMI0_DQ10 [6] M11 DQ10 VDD2 R5
EMI0_DQ11 [6] L13 DQ11 VDD2 T5
EMI0_DQ12 [6] L11 DQ12 VDD2 U5
EMI0_DQ13 [6] K11 DQ13 VDD2 V5
EMI0_DQ14 [6] K13 DQ14 VDD2 W5
EMI0_DQ15 [6] J12 DQ15 VDD2 AB5
EMI0_DQ16 [6] AB12 DQ16 VDD2 AB8
EMI0_DQ17 [6] AB11 DQ17
EMI0_DQ18 [6] AB10 DQ18 VDDQ G9
EMI0_DQ19 [6] AA13 DQ19 VDDQ H8

C3003
EMI0_DQ20 [6] AA12 DQ20 VDDQ H12
EMI0_DQ21 [6] AA10 J11

100nF
DQ21 VDDQ

100nF
EMI0_DQ22 [6] Y13 K10

100nF

100nF
DQ22 VDDQ C3017
EMI0_DQ23 [6] Y11 Power K12

NC
DQ23 VDDQ
EMI0_DQ24 [6] H11 DQ24 VDDQ L8 C3002
C3004 22uF
EMI0_DQ25 H13 L9

C3005

C3006
[6] DQ25 VDDQ
EMI0_DQ26 [6] G10 DQ26 VDDQ M10
C EMI0_DQ27
EMI0_DQ28
[6]
[6]
G12
G13
DQ27
DQ28
VDDQ
VDDQ
M12
N11
C
EMI0_DQ29 [6] F10 DQ29 VDDQ R11
EMI0_DQ30 [6] F11 DQ30 VDDQ T10
Note: 44-2 EMI0_DQ31 [6] F12 DQ31 VDDQ T12
VDDQ U8
ZQ0 G2 ZQ0 VDDQ U9
240¦¸ R3000 ZQ1 G3 V10
ZQ1 VDDQ
240¦¸ R3001
VDDQ V12 Note: 44-3
F13 VSSQ VDDQ W11
G11 VSSQ VDDQ Y8
H10 VSSQ VDDQ Y12
J8 VSSQ VDDQ AA9
J13 VSSQ VEMC_PMU

100nF

100nF
K8 VSSQ VDDCA K2
K9 VSSQ VDDCA N2 4.7uF

C3009
L10 VSSQ VDDCA U2

C3008
L12 VSSQ VDDCA V2 C3007
M8 VSSQ
N13 VSSQ VCC B3
P9 VSSQ VCC B12
R13 VSSQ VCC B13 VIO18_PMU
T8 VSSQ VCC C4
U10 VSSQ VCC D8

100nF

100nF
U12 A4 2.2uF
VSSQ VCCQ
V8 VSSQ VCCQ B6
V9 B9 C3010
VSSQ VCCQ

C3013

C3016
W8 VSSQ VCCQ C7
W13 VSSQ VCCQ C11
Y10 VSSQ VCCI A11
AA11

100nF
VSSQ

1uF
CLKM B8
[6] MSDC0_CLK
F2 VSS RST C2
[6] MSDC0_RSTB
G4 A6

C3012
C3011
VSS CMD [6] MSDC0_CMD
G8 VSS eMMC
H3 VSS DAT7 B4 [6] MSDC0_DAT7
H5 VSS DAT6 A5 [6] MSDC0_DAT6
L4 VSS DAT5 A10 [6] MSDC0_DAT5
M3 VSS DAT4 C9 [6] MSDC0_DAT4
M4 VSS DAT3 B5 [6] MSDC0_DAT3
N4 VSS DAT2 C6 [6] MSDC0_DAT2
N8 VSS DAT1 B10 [6] MSDC0_DAT1
P4 VSS DAT0 A9 [6] MSDC0_DAT0
P12 VSS Note: 44-3
R3 VSS
R4
R8
VSS Schematic design notice of "44_Memory_eMMC_LPDDR3"
VSS
T4 VSS
Y4 VSS CS0# U3 [6] EMI0_CS0
Y5 VSS CS1# T3 [6] EMI0_CS1 Note 44-1: Please refer to power supply related page select VDRAM1 output
AA2 LP-DDR3
B AA4
AA8
VSS
VSS CKE0 T2
R2
[6]
[6]
EMI0_CKE0
EMI0_CKE1 voltage properly for LPDDR3 B
VSS CKE1
H4 VSSCA CLK P3 [6] EMI0_CK_T VDRAM_PMU
J4
K4
VSSCA CLK# N3 [6] EMI0_CK_C Note 44-2: DRAM ZQx resistor = 240ohm (1%) that must be connected to GND
VSSCA
P2 VSSCA DQS0 T9 [6] EMI0_DQS0_T
U4 VSSCA DQS0# R9 [6] EMI0_DQS0_C
V4
W4
VSSCA DQS1 M9
N9
[6]
[6]
EMI0_DQS1_T
EMI0_DQS1_C
Note: 44-5 Note 44-3: Please refer to eMCP vendor's datasheet or MTK common design notice to
VSSCA DQS1#
Y9 EMI0_DQS2_T
A3 VSSM
DQS2
DQS2# W9
[6]
[6] EMI0_DQS2_C get the recommendation bypass cap. value for VCC/VCCQ/VDDI power
A8 VSSM DQS3 H9 [6] EMI0_DQS3_T
A12 J9 [6] EMI0_DQS3_C domains of eMMC.

100nF
VSSM DQS3#
B2 VSSM
B7 VSSM DM0 R10 [6] EMI0_DM0
B11 N10 [6] EMI0_DM1 Note 44-4: VDD2 VDDQ VDDCA decoupling cap: closed to DRAM ball.

C3014
VSSM DM1
C3 VSSM DM2 W10 [6] EMI0_DM2
C5 J10 EMI0_DM3
C8
VSSM
VSSM
DM3 [6]
For other cap for PMIC [>10uF, at PMIC page]:
C10 VSSM VREFCA M2 [6] EVREF
C12
C13
VSSM VREFDQ P13 please also refer to MMD and layout guide for placement.
VSSM
D7 VSSM
Note 44-5: Please check MT6765, MT6762 and MT6761's capacitor value.
100nF
AB14
A2 VSF
DNU
DNU AB13 Project C3014 C3015
A13 AB2
B1
VSF
VSF
DNU
DNU AB1
C3015
MT6765 2.2uF 1uF
B14 AA14
D2
VSF
VSF
DNU
DNU AA1 MT6762 2.2uF 1uF
D3 A14
D4
VSF
VSF
DNU
DNU A1 MT6761 0.1uF 0.1uF
D5 VSF
D6 VSF
[6] A7 DS ODT P10
MSDC0_DSL

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 16
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

E-Compass
I2C addr
AF6113 0x0C
VIO28_PMU

Gry-sensor VIO18_PMU
VIO18_PMU
AKM09918 0x0C

Note: 77-1
D C3504
D

47K
C3503

100nF
100nF
NC
R3502

8
NC

VDDIO

VDD
U3501
12 VIO18_PMU
SPI4_CSB [5] CSB
SPI4_CLK [5] 13
14
SCX ASDX
2
3
For debugging
SPI4_MO [5] SDX ASCX
4 9
EINT_GRY [5] INT1 INT2 U3505
SPI4_MI [5] 1
SDO

GNDIO
B2 B1

GND1

GND2

GND3
SDA1 [5,17] SDA VDD
N

10

11
E
C3515

A2 S A1
SCL1 [5,17] SCL VSS 100nF
Note: 77-6 AK09918
SENSOR-MAGNETIC_0.76X0.76X0.583_AK09918
NC
Do not connect PIN7 RESV to GND

Proximity Sensor charge

I2C addr
C MN25713EKDN 0x49 C
G-sensor LTR-553ALS 0x23 VSYS VIO28_PMU

RS3506
STK8BA50: VDD2 Pin10 is not internally connected
KXTJ3-1057:VDD2 Pin10 is internally connected to VDD pin7.Both decouple with a 0.1uF to GND
DA218-A: VDD2 Pin10 is Digital input, keep floating or connected to 1.8V
LTR-2568ALS-WA
VIO18_PMU VIO28_PMU
VIO18_PMU

1uF
2.2uF C3510

R3505
C3511

100nF
0¦¸

C3509
100nF C3501
R3501

10K
J3501
VDDIO 11
VDDIO 3

VDD1 7

U3500
[5,17] 1
Z SDA1 1 HIROSE
VDD2 10 2
SCL1 [5,17] 2 6PIN
100nF [5] 3
C3502 EINT_ALPS 3
[5,17] 2 SDA X 4
SDA1 4
[5,17] 12 SCL GND2 9 NC 5
SCL1 5
GND1 8 C3512 C3524 6
C3523 6
5 INT GND0 4
EINT_ACC [5]

C0201
6 GND 1 100pF 18pF 7
Y ADDR NC
18pF
NC 8
7
NC 8
KXTJ3-1057-01 FH34SRJ-6S-0.5SH
CONT-FPC-S_6P_FH34SRJ-6S-0.5SH

I2C addr
DA218-A SA0=0(PIN 1), 0x26 SA0=1,0x27

B KXTJ3-1057 ADDR=0(PIN 1), 0x0E ADDR=1,0x0F B

Optional Hall Sensor VIO18_PMU

R3503 NC

G+Gyro Sensor

100nF
100K U3503

R0201
C3508
EINT_HALL [5] 1 3
OUT NC
2 4
GND VDD
OCH166AV4AD

NC

Schematic design notice of "77_PERI_SENSORS_MEMs_ALS/PS" page.

Note 77-1: [M sensor] Keep a minimum distance of 15mm from power ICs / PCB traces of more than 100mA / magnet component. Check HW design notice for more detail

Note 77-2: [A+G] For optmized GPS performance, please check HW design notice for Sensor selection guide

Note 77-3: [A+G] MUST use SPI for optmized sensor hub performance DO NOT USE i2C

A Note 77-4: [A+G] Suggest choose sensor support FIFO watermark interrupt otherwise we cannot support Hifi-sensor, daydream VR. And Sensor-location accuracy will become worse. A
COMPANY:

Note 77-5: [Baro] Reserve Baro sensor for LPPe feautre (Must for North America Operator / NA SKU) <Company Name>
TITLE:
Note 77-6: DO NOT share Sensor hub i2C to other non-SCP device
DRAWN: DATED:
MT6762
Note 77-7: Interrupt pin of MEMS sensor must be assign to ball EINT[12:0] Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 17
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Sub Mic
CTIA Mode
use ACC mode

AU_MICBIAS0

1K
D L-R-G-M D

R4024
Close to Codec Close to Mic

1.5K
C4027 close to IC
C4031 J4003
6

R4021
BLM15HD182SN1D
100pF BLM15HD182SN1D L4001 1
4.7uF HP_MIC [18]
AU_HPR L4000 L4002 BLM15HD182SN1D 3

R0402
[11] 0¦¸ R4032 [11]
AU_HPL L4003 BLM15HD182SN1D L4004 BLM15HD182SN1D 4
AU_VIN2_P 1 J4002
1uF C4025 + [11]
2 SOM4013SL-G443-RC-HFWP AU_REFN [11] L4010 BLM15HD182SN1D
-
N503-R43001-000

R0402
0¦¸ R4033 L4005 BLM15HD182SN1D 5

ESDBL5V0AE1
AU_VIN2_N [11] HP_EINT [11]

1.5K
1uF C4026 47K R4005

ESDBL5V0AE1
RS-0402

T4007

T4003 ESDBL5V0AE1
R0201
[31] C4023 1nF 2

T4008
C4032 C4033 FM_ANT_P

LESD8LL5.0T5G
RS4007 PH10-5BS5F35B

ESDBL5V0AE1
C0201
C0201
C4005

C4006
33pF 33pF

1KR4016

470¦¸

470¦¸

MMZ1608A252B

82nH

T4000
ESDBL5V0AE1
C4007C4008

T4004
NC

T4001
C0201
C0201
33pF 33pF 27pF

C0201_10NF+/-10%-10V
L4006 NC
ESDBL5V0AE1
C0201
C0201
33pF10nF

T4002
R4011

R4012
R0201
R0201
C4009

L4007
R4015
Tie together and single VIA to Ground Plane

AVSS28_AUD [11] [18]

RS4002
AUDIO_JACK_GND
RS4000

Main Mic use ACC mode

FM_ANT_N
[31]
AU_MICBIAS0 RS4001 Close to CODEC
connect to CODEC pin G14 and connect to GND at CODEC

1K
C CLOSE TO CODEC C

R4034
1.5K
R4035 C4012
Headset Mic
4.7uF
AU_MICBIAS1

R0402
AU_VIN0_P [11] 0¦¸ R4028
1uF C4002 [23] HS_MIC_P
1.5K

R0402
AU_VIN0_N [11] 0¦¸ R4037
1uF C4011 [23] HS_MIC_N

ACC mode
R4036

C4000

C0201
33pF

1K
NC
DCC ACC
1K

C4035 C4024

R4002
C0201
C0201
33pF 33pF

R0201
R4004 0R 1uF

R4003
NC
R4029

Close to Codec close to 6328

2.5K
1uF R4004 R4006 4.7uF
AU_VIN1_N[11] [18] AUDIO_JACK_GND

R4009 0R 1uF

C0402_4.7UF+/-20%-6.3V
C4001

1.5K
C0201
33pF
C4003
R4003 NC 1K

C0201
100pF C4004

SPK AMP

R4008
C0201
33pF

R4008 NC 1.5K

R0402
1uF R4009 0¦¸ R4014
AU_VIN1_P[11] [18] HP_MIC

C4022

33pF
R4002 2.5K NC
NC
VSYS RS4013
ACCDET[11]
R4006 0R 4.7uF
B R4013 NC 0R B
100nF

4.7uF
C0402_4.7UF+/-20%-6.3V
C4017 C4016
U4000
C4015 220pF

AU_LOLN [11]
C4019

C4018
15nF 3.3K R4001 A2
INN VDD
A3
NC
Handset Receiver E4002
C0201
15nF 3.3K R4010 A1 B3 E4001
AU_LOLP [11] INP VDD C4034 100pF P31-AB01F080
P31-AB01F080
C0201
C4028 2.2uF D2 B4 L4008 BLM18KG221SN1D [23] SPKR_OUT_P

ANT-SMD_2.5X1.0X0.8_P31-AB01F080
C1P VOP
Close to Codec Close to Receiver

ANT-SMD_2.5X1.0X0.8_P31-AB01F080
C1 D4 L4009 BLM18KG221SN1D [23] SPKR_OUT_M
C1N VON
C4029 2.2uF D1 D3
C2P PVDD
4.7uF

C4020 C4021
B1 C2 C4030
C2N GND
C0201
C0201
100pF 100pF AU_HSP [11] 0¦¸ R4017
C4010
RS4022 A4 C4

C0201
GPIO_SPK_EN [5] SHDN GND 100pF

LESD11D5.0CT5G

LESD11D5.0CT5G
RS-0201 AU_HSN [11] 0¦¸ R4019
100K

T4006
33pF 33pF
AW8737S

C0201
C0201
NC

T4005
C4013 C4014

NC
VIO18_PMU
R4023

10K

R6020

EINT_CHG_0 [5,13]

GPIO11
R6019 R0201
NC

A A
470¦¸

COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 18
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

LCD Connector
LCD Backlight
VSYS Compatible to HD LCD

RS5003

RS-0402
L5003

22uH
D D

1uF
C5000

C0402_10UF+/-10%-6.3V
B1040WS
C5001
10uF

D5000
6
VIN
U5000

LX
1
Fingerprint Connector
4 5 R5008
DISP_PWM [5,15] EN OVP
BLM15HD102SN1D
[15,23] LCD_LEDA
2
GND FB 3 RS5011
[15,23] LCD_LEDK1

5.1¦¸
[15,23] LCD_LEDK2
C5002 RS-0201 C5008
WD3139F-6/TR

100K
1uF 100pF

R5012
R0402
R5013

WD3139F is P2P Compatible to SGM3752

VIO28_PMU

VIO18_PMU

1 GND

RS5016

RS5017
LCD BIAS 2 HOME(NC)

RS-0201

RS-0201
3 GND
J5001
4 MISO ½Ý»Ê 1
1
2
C 13PIN 2
3 C
5 MOSI 3
4
5
4
5 0¦¸ R5004
[5] FP_SPI0_MI
[5] FP_SPI0_MO

R0201
Compatible to HD LCD 6
6 0¦¸ R5005 [5]
FP_SPI0_CK

R0201
NC VSYS
6 CLK 7
7 0¦¸ R5006 [5] FP_SPI0_CS

R0201
8 0¦¸ R5007
8 [5] FP_RST_N

R0201
9 0¦¸ R5009
9 [5] FP_INT_N

R0201
10

RS5021
L5002 7 CS 10
11
12
11
12
13
R5023
1K
[5] FP_ID

4.7uH 13
RS-0402 C5027
8 RST

T5008

T5010
14

T5009

T5011
14
4.7uF

ESDBL3V3AE1 T5005

T5006

T5007

ESDBL3V3AE1
15

ESDBL3V3AE1NC T5003

T5004
U5002 RS5010 15
C1 D1
9 INT

C5030
VIN LX
10uF

1uF
C5031 VSP+5.8V ZF3-AB13F10A
10uF

ESDBL3V3AE1

ESDBL3V3AE1
E3

ESDBL3V3AE1

ESDBL3V3AE1

ESDBL3V3AE1

ESDBL3V3AE1
CONT-FPC-S_13P_ZF3-AB13F10A

1uF
C0603_10UF+/-20%-10V
AVDD C5024
C0201
C5028

C5004
GPIO_BL_ENP [5] B1 100pF
C0603_10UF+/-20%-10V
NC
ENP D3
GPIO_BL_ENN [5]

SCL0
A1

B2
ENN
BSTO
BSTO
E2 10 VDD2V8
[5,23] SCL RS5014
C2 A2
SDA0 [5,23]
B3
SDA
PGND
AVEE
VSN-5.8V 11 ID(GND)
10uF
100K

100K

E1 C3 C5026
PGND CFLY1 C5029 C5032
D2 A3
C0603_10UF+/-20%-10V
12 DOVDD1V8
AGND CFLY2
C0402_4.7UF+/-20%-10V
C0201
4.7uF

100pF
NC

NC

OCP2131WPAD
R5019

R5002
R0201
R0201
cap use voltage need over 10V
13 GND

B B

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 19
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

AVDD DVDD DOVDD ID ADDR

AVDD DVDD DOVDD ID I2C ADDR(7bits) VCM:V88B8601 AF_VDD
GC5025(cameraking) 2.7~3.0V/20ma 1.15~1.25V/60ma 1.7~1.9V/2ma GND 0X37
S5K3L6XX SAMSUNG 2.8V 1.0.5V 1.8V 0X21H(R);0X20H(W) 2.8V
GC5025(SunWin) 2.7~3.0V/20ma 1.15~1.25V/60ma 1.7~1.9V/2ma DOVDD 0X37
sp2509(cameraking) 2.8V NC 1.8V
NC NC
D OV5670(SunWin) 2.7~3.0V/20ma 1.15~1.25V/60ma 1.7~1.9V/2ma DOVDD 0X36
D
GC030A(cameraking) 2.8V NC 1.8V GND 0X42(W),0X43(R)

VCAMD_PMU
VSYS VCAMA_AVDD_2V8 VSYS
VCAMA_AVDD
VCAMA_AVDD
NC
R5203

T_POINT_0.6MM
U5202 NC 0¦¸ TP13
4 1 R5209
VIN VOUT U5200

T_POINT_0.6MM
0¦¸ TP11
Max. Voltage:6.0V 4 VIN VOUT 1 300mA

C5225
C5224 2 U5203
GND FCAM_DVDD_1P2

C5206 1uF
3 5 VS1_PMU VS1_PMU 4 1

1uF
1uF EN GND VIN VOUT 2
GND
3 5
T_POINT_0.6MM
IC-LDO_1.0X1.0X0.6_RP114K281D-TRB
TP12 RP114K281D-TRB GPIO_CAM_AVDD_EN [5] EN GND

C5217
2

IC-LDO_1.0X1.0X0.6_RP114K281D-TRB
GND RP114K281D-TRB

1uF
C5209
FCAM_DVDD_EN 3 5

1uF
[5] EN GND

C5216

IC-LDO_1.0X1.0X0.4_S-1339D12-A4T4U3
GPIO_VCAMA_F_EN [5] S-1339D12-A4T4U3

1uF
Front camera AVDD share with rear camera
Front-CAMERA
VCAMIO_PMU VCAMD_PMU VCAMA_AVDD VLDO28_PMU
Main-CAMERA Depth-camera
power on sequence : IOVDD > AVDD
VCAMA_AVDD_2V8 VCAMIO_PMU
C VCAMA_AVDD_2V8 C

100nF
J5202

1uF
C5203 C5202 C5201 C5205

C0402_2.2UF+/-20%-6.3V
C0402_2.2UF+/-20%-6.3V
34 32

C5207
FCAM_DVDD_1P2 GND JAE GND 2.2uF 4.7uF 2.2uF
33 31
VCAMIO_PMU GND 0.4Pitch GND
Socket J5200
C5251
2 1 34 32 TP5
AF_VDD AGND GND JAE GND J5201

T_POINT_0.3MM
C5232 4 3 [20] RCP_F 33 31 TP6 4.7uF
T_POINT_0.6MM
T_POINT_0.6MM
AVDD MCP GND 0.4Pitch GND

C5254
TP3 TP4 TP18 TP19

100nF
T_POINT_0.3MM
NC

6 5 TP16TP17 32 34

T_POINT_0.3MM
T_POINT_0.3MM
2.7pF DVDD MCN [20] RCN_F Socket GND JAE GND

T_POINT_0.3MM
T_POINT_0.3MM
8 7 31 33
DOVDD DGND GND 0.4Pitch GND
10 9 [20] RDP2_F 2 1 AGND
C0201
L5210 NC MDP2 AF_VDD AGND Socket
CAM_CLK1 [5] 0¦¸ 12 11 [20] RDN2_F [5,20] RDP3 4 3 [5] RCP_B
MCLK MDN2 AVDD MCP
14 13 [5,20] RDN3 6 5 [5] RCN_B 1 2
FLASH DGND DVDD MCN AGND AF_VDD
16 15 [20] RDP0_F [5,20] RDP2 8 7 RCP_A_2M [5] 3 4
NC MDP0 DOVDD DGND MCP AVDD
18 17 RDN2 10 9 5 6
SCL4
[5,20] SIOC MDN0 [20] RDN0_F [5,20] R5210 NC MDP2 [5] RDP2_B RCN_A_2M [5] MCN DVDD
20 19 12 11 7 8
[5,20] SIOD DGND CAM_CLK0 [5] 0¦¸ MCLK MDN2 [5] RDN2_B TP20 TP21 DGND DOVDD

T_POINT_0.6MM
T_POINT_0.6MM
T_POINT_0.6MM
SDA4 [5] 22 21 [20] RDP3_F TP1 TP2 TP5203 14 13 9 10

T_POINT_0.3MM
T_POINT_0.3MM
CAM_RST1 RESET MDP3 FLASH DGND MDP2 NC L5230
24 23 16 15 [5] RDP0_B 11 12 0¦¸ [5] CAM_CLK2
CAM_PDN1 [5] PWDN MDN3 [20] RDN3_F NC MDP0 MDN2 MCLK

0¦¸

0¦¸

0¦¸

0¦¸
26 25 18 17 [5] RDN0_B 13 14

T_POINT_0.6MM
R5202 SHUTTER/NC DGND SCL2 [5] SIOC MDN0 DGND FLASH TP5200
28 27 [20] RDP1_F [5] 20 19 RDP0_A_2M [5] 15 16
GPIO_FCAM_ID [5] ID/DOVDD MDP1 SDA2 SIOD DGND MDP0 NC
1K 30 29 [20] [5] 22 21 [5] RDP3_B 17 18 [5,20] SCL4
NC MDN1 CAM_RST0 RESET MDP3 MDN0 SIOC
1uF

RDN1_F 24 23 RDN0_A_2M [5] 19 20

CAM_PDN0 RDN3_B
2.2uF

NC C5234 [5] PWDN MDN3 [5] DGND SIOD [5,20] SDA4

4.7uF VSYNC [20] 26 25
1 lane 21 22 [5] CAM_RST2

R5230

R5231

R5232
WP7A-S030VA1-R8000 SHUTTER/NC DGND MDP3 RESET

R5233
NC
C0402_2.2UF+/-20%-6.3V
C0402_4.7UF+/-20%-6.3V
28 27 23 24
C5233

NC 100pF
2.7pF
C0201
[5] [5] RDP1_B [5] CAM_PDN2
C5230CONT-BTB-S_CAM-TOP_30P_WP7A-S030VA1R6000 GPIO_MCAM_ID ID/DOVDD MDP1 MDN3 PWDN
C5229

C5228

NC 1K R5208 30 29 25 26
NC MDN1 [5] RDN1_B DGND SHUTTER/NC [20] VSYNC
C5223

2.7pF
C0201
C5212 27 28 R5223 [5]
MDP1 ID/DOVDD MCAM1_ID
C5213 29 30 C5248 C5249 1K
WP7A-S030VA1-R8000 MDN1 NC

R0201
18pF
CONT-BTB-S_CAM-A_30P_WP7A-S030VA1R6000
18pF
NC
1 lane WP7A-S030VA1-R8000
CONT-BTB-S_CAM-A_30P_WP7A-S030VA1R6000
NC 12pF

ºË¶ÔÉãÏñÍ·ºÍPCB pin½Å¶¨Òå
13M-CAM
ºË¶ÔÉãÏñÍ·ºÍPCB pin½Å¶¨Òå
2M CAM
8M/5M CAM ºË¶ÔÉãÏñÍ·ºÍPCB pin½Å¶¨Òå
5M CAM/16+2 8M CAM/32+2
R5230 0¦¸ NC
R5231 0¦¸ NC
RF requested caps for mcam desense ,close to connector R5232 0¦¸ NC
B R5233 0¦¸ NC B
E5201,E5202ÐͺŴýÈ·ÈÏ

NC
[5,20] 2 3 [20] RDP2_F
RDP2 I2 O2
1 4 [20] RDN2_F
RDN2 [5,20] I1 O1
L5201

R0201
R5250 EXC14CE900U
0¦¸

R0201
R5251 0¦¸

FLASH_LED1

E5201,E5202ÐͺŴýÈ·ÈÏ 2
NC EXC14CE900U
3

FLASH LED
E5201 RDP0 [5] I2 O2 [20]RDP0_F
R5200

[5] 1 4 [20]RDN0_F
RDN0 I1 O1
E5202
L5202
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
VSYS FLASH_LED
Slave Address : 0x63(7bit)

R0201
NC

R5252 0¦¸
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
R0201
R5253 0¦¸
FLASH_LED
0¦¸

NC
NC
EXC14CE900U
U5201 NC
TP5202
2 3
T_POINT_0.3MM
1 10 RDP3 [5,20] I2 O2 [20] RDP3_F
VIN VOUT 1 4
Rear LED RDN3 [5,20] I1 O1 [20] RDN3_F
C5226

2 9
C1 PGND
1uF

L5203
3 8 D5201

R0201
C2 SGND R5254 0¦¸

R0201
CAM_FLASH_HWEN [5] 4 7 [20] FLASH_FB [20] FLASH_FB R5255 0¦¸
FLASH FB
LESD8D5.0T5G
GND

0.47¦¸

5 6
CAM_STROBEN_HWEN [5] EN RSET EH01-DN03B0-000
R5204

NC EXC14CE900U
T5201

C5200
NC

4.7uF
47K

11

RDP1 2 3 RDP1_F
R5205
C0402_4.7UF+/-20%-6.3V
[5] I2 O2 [20]
1 4
C0603_10UF+/-20%-10V
10uF AW3641EDNR C5208 [5] I1 O1 [20] RDN1_F
RDN1
NC

R0603
L5204
27K

R0201
R5256 0¦¸
R5211

C5252
A A

18pF
R0201
0¦¸

NC
R5257

NC COMPANY:

RCP [5] 2
1
I2 O2
EXC14CE900U
3
4
[20] RCP_F
<Company Name>
RCN [5] I1 O1 [20] RCN_F
Torch current=50mV/R5205=106mA Front LED L5205
OCP8110 R5204=82K TITLE:

R0201
R5258 0¦¸
Flash current=(14uA*R5204)/(5*R5205)=489mA

R0201
0¦¸
R5259

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
Torch current=47mV/R5205=100mA
AW3641 R5204=56K CHECKED: DATED:
Flash current=(1.26V/R5204/R5205)*10.2K=488mA <Checked By> <Checked Date>
CODE: SIZE: DRAWING NO: REV:

AW3641 R5204=27K Flash current=(1.26V/R5204/R5205)*10.2K=1.01A QUALITY CONTROL: DATED:

<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 20
OF 31
 6 5 4 3 2 1
REVISION RECORD
SIM1 LTR ECO NO: APPROVED: DATE:

D D
J5403 VSIM1_PMU
VSIM1_PMU

C4 NC NC C8

15K
[4] C3 CLK DATA C7
SIM1_SCLK

NC
SIM1_SRST [4] C2 RST VPP C6

R5412
GND1
GND2
GND3
GND4
C1 VCC GND C5

CONT-MICRO-SIM_H1.5_S34-0B08F15A
[4] SIM1_SIO

1
2
3
4
S34-0B08F15A

T5400 ESDBL5V0AE1

ESDBL5V0AE1

T5402
T5401

ESDBL5V0AE1
ESDBL5V0AE1
C5402
C5401

C5403 1uF

C0201
C5404 18pF
18pF

C0201
NC
NC

C0201
18pF

T5403
NC

TF Card
Normal:0
VMCH_PMU

Insert:1
SIM2
C C

ESDBL5V0AE1
C5400

T5404
+
C5405

100nF
4.7uF

+
J5401
VSIM2_PMU
MSDC1_DAT2 [5] Close to CPU 1
DAT2
2
MSDC1_DAT3 [5] CD/DAT3 J5404
KWS6133N10TNR
[5] 3
MSDC1_CMD CMD
4 13 VSIM2_PMU
VDD GND4
C1 VCC
L5400 2.7nH 5 10
MSDC1_CLK [5] CLK GND3
C2 RST I/O C7

15K
C5416 2.7pF SIM2_SRST [4]
6 11
VSS2 GND1
[4] C3 CLK VPP C6
SIM2_SCLK

NC
[5] 7 12
MSDC1_DAT0 DAT0 GND2
C5 GND CD SW-B

GND
GND
GND
GND
GND
GND

R5407
[5] 8
DAT1
ESDBL5V0AE1

MSDC1_DAT1

CONT-NANO-SIM_H1.4_KWS6133N10TNR
ESDBL5V0AE1 T5412

9
T5413

ESDBL5V0AE1
+

4
5
3
2
1
6
ESDBL5V0AE1
DET_A [4] SIM2_SIO
T5415

T5417
+

+
T5414

T5418
+

ESDBL5V0AE1
+

ESDBL5V0AE1

T10-BB09F170
ESDBL5V0AE1

ESDBL5V0AE1
+

+
+

ESDBL5V0AE1

C5413

ESDBL5V0AE1
T5406

T5407
18pF

C0201
T5408
C5418

1uF
NC C5415

T5405

C0201
18pF

C5414
C0201
18pF NC
NC

Normal:0
B B
Insert:1

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 21
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

MP Test point

TP5500 TP5503 TP5501 TP5502

KEY

T_POINT_1.0MM
T_POINT_1.0MM
T_POINT_1.0MM
T_POINT_1.0MM
KPCOL0+GND=VOL+ J5500
HOMEKEY+GND=VOL- 1
1 HIROSE
2
[10,13]
PWRKEY 2 6PIN
1K R5502 3
3
4
HOMEKEY [10] 1K R5501 4
5
5
KPCOL0 [5] 6

100nF
1K R5500 6

ESDBL5V0AE1

ESDBL5V0AE1

ESDBL5V0AE1
7
7

T5500

T5501

T5502
8
C5500 8

FH34SRJ-6S-0.5SH
CONT-FPC-S_6P_FH34SRJ-6S-0.5SH

C C

VSYS

Charge Indicator
A-SP1942R5G2C-C01-2T

D5500

G R

B B
1

2
R0201
ISINK3_LED_G 0¦¸ R5513
[15]
NC
R0201
0¦¸ R5503
ISINK0_LED_G [10]
150¦¸ R5505
R5504
R0201
ISINK1_LED_R [10] 470¦¸

Power on light
R0201
NC
ISINK4_LED_R [15]
R5512 470¦¸
R0201
MT6357 MT6371 WNM3013
[5] PCHG_LED_EN
1K R5509
R5513 NC 0¦¸ Q5500
R5507 R0201
R5503 0¦¸ NC
47K

R5504 470¦¸ NC
R5512 NC 470¦¸

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 22
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

T5603

T5604
ESDBL7V0A1

ESDBL7V0A1
NC

NC
VSN-5.8V [15,19,23] Near pin27
VSP+5.8V [15,19,23] Near pin26

VIO18_PMU
[5,23] LCM_RST

1uF
C5604
NC

C5600

2.7pF
C0201
Near pin7

C Near pin6 C

EXC14CE900U
L5601
[5] 1 4 [23] DSI0_D3P_LCM
DSI0_D3P I1 O1
[5] 2 3 [23]
DSI0_D3N I2 O2 DSI0_D3N_LCM
NC

R0201
R5603 0¦¸

R0201
R5602 0¦¸

EXC14CE900U
L5602
1 4 50 50 1 1 [5,19] SCL0
[5] I1 O1 [23] DSI0_D2P_LCM VLDO28_PMU
DSI0_D2P 2 3 GPIO_CTP_RSTB [5] 49 49 2 2 [5,19] SDA0
[5] I2 O2 [23] 48 3
DSI0_D2N DSI0_D2N_LCM 48 3 VSN-5.8V
EINT_CTP [5] 47 4
NC 47 J5601 4 VSP+5.8V
46 5

R0201
R5604 0¦¸ [23] 46 5
DSI0_D3P_LCM 45 6
[23] 45 HRS 6

R0201
R5606 0¦¸ DSI0_D3N_LCM 44 7 R5601
44 0.35Pitch 7 [5] GPIO_LCM_ID VIO18_PMU

ESDBL3V3AE1 T5601
43 8 1K
DSI0_D2P_LCM [23] 43 Socket 8 [5,23] LCM_RST
[23] 42 42 9 9 [5] DSI_TE
EXC14CE900U DSI0_D2N_LCM 41 10

NC
41 10 [15,19]LCD_LEDA
L5604 VIO18_PMU DSI0_CKP_LCM [23] 40 40 11 11 [15,19] LCD_LEDK1
DSI0_CKP [5] 1 4 [23] DSI0_CKP_LCM DSI0_CKN_LCM [23] 39 39 12 12 [15,19] LCD_LEDK2
I1 O1
DSI0_CKN [5] 2 3 DSI0_CKN_LCM 38 38 13 13
I2 O2 [23]
DSI0_D1P_LCM [23] 37 37 14 14 [18] HS_MIC_N
NC 36 15
DSI0_D1N_LCM [23] 36 15 [18] HS_MIC_P

R0201
0¦¸

5.1K
R5607 35 16
35 16

R0201
R5608 0¦¸ 34 17
DSI0_D0P_LCM [23] 34 17 [18] SPKR_OUT_P
DSI0_D0N_LCM [23] 33 33 18 18

NC
EXC14CE900U 32 32 19 19 [18]
L5605 31 20 SPKR_OUT_M
USB_DM [5,24] 31 20

R5605
DSI0_D1P [5] 1 4 [23] DSI0_D1P_LCM [5,24] 30 30 21 21
I1 O1 USB_DP
[5] 2 3 29 29 22 22 [4] BPI_BUS8
DSI0_D1N I2 O2 [23] DSI0_D1N_LCM VIBR_PMU 28 28 23 23
NC 27 27 24 24 [4] BPI_BUS10
R0201
R5609 0¦¸ 26 25
OTG_ID [5] 26 25 VFE28_PMU
1K R5600
R0201
R5610 0¦¸
54 PWR2 PWR1 51 VBUS_USB_IN
53 PWR2 PWR1 52
B L5603
EXC14CE900U B
1 4
DSI0_D0P [5] I1 O1 [23] DSI0_D0P_LCM BM28B0.6-50DS/2-0.35V(51)
DSI0_D0N [5] 2 3 [23] DSI0_D0N_LCM GND
I2 O2 CONT-BTB-S_L-A_BM28B0.6-50DS/2-0.35V(51)
NC
R0201
R5611 0¦¸
R0201
R5612 0¦¸

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 23
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Debug Test Point Fixture Test Point

D D

RAM dump UART USB Batery CTP Key Fast META

TP5702 TP5703
T_POINT_0.6MM
T_POINT_0.6MM
TP5700 TP5701 TP5608

T_POINT_0.6MM
T_POINT_0.6MM
TP5712 TP5711 TP5710 TP5709
EINT_RAMDUMP [5]
UTXD0 [5]
URXD0 [5] FAST_META [5]
1K R5701

Refer to Page 26 Refer to Page 56 Refer to Page 55

ESDBL5V0AE1
T5701
VBUS_USB_IN

USB_DM [5,23]
USB_DP [5,23]

LESD8LL5.0T5G
T5702

T5700
LESD8LL5.0T5G
K

K
A

A
C C

Mark shielding can Metal Grounding

BB PDN
SB5700 SC5700 S5702
Top
M5701 M5702 M5703 SB SC S

S
SB
SC
PCB5700LAB5700
PCB Label
PCB
LABEL-A
M5710 M5711 M5712

B B

RF
SB5701 SC5701

E5701 E5702 SB SC
E5703
P35-AB01F190 P35-AB01F190
SB
SC
P35-AB01F190
ANT-SMD_2.2X1.0X1.9_P35-AB01F190
ANT-SMD_2.2X1.0X1.9_P35-AB01F190
ANT-SMD_2.2X1.0X1.9_P35-AB01F190
WCN1 WCN2
S5700
TCXO
S5703
S S
Bottom
S
S
A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 24
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

U6000

G10

G11

G12
E10

H10
K10

E11

H11

K11
E12
F11
MT6177MV/B

L10

J11
C3
D3

G3

C4
D4

C5
D5

G5

C6
D6

G6

C7
D7

G7

C8
D8

G8

C9
D9

G9
K2

H3

E4

H4

E5

H5

E6

H6

E7

H7

E8

H8

B9

E9

H9
F3

F4

F5

F6

F7

F8

F9
J7

J8

J9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D D
RF_B7_PRX_IC [28] B8 PRX1

RF_B20/B12/B17_PRX_IC [28] A8 PRX2

VDD_TXHF F12
VRF18_RFIC
B7

100nF
RF_B28A_PRX_IC [28] PRX3
C6000
RF_B8_GSM900_PRX_IC [28] A7 PRX4
VDD_STXLV L11 VRF12_RFIC

100nF
RF_B1_PRX_IC [28] B6 PRX5
C6002
RF_B40_B28B_PRX_IC [27] A5 PRX6
VDD_STXHF J10 VRF18_RFIC

100nF
B5 PRX7
RF_B3_DCS1800_PRX_IC [28]
C6005
RF_B41_B4_PRX_IC [27] A4 PRX8
PRX VDD_RXLV E3 VRF12_RFIC

100nF
RF_B2_PCS1900_PRX_IC [28] B4 SWHB
C6003
RF_B5_GSM850_PRX_IC [28] B3 SWLB
VDD_RXHF G2 VRF18_RFIC

100nF
RF_B1/B4_DRX_RFIC [29] A2 DRX1
C6004
RF_B2_DRX_RFIC [29] A1 DRX2
B2 DRX3 MT6177M BSI_D2 J2
RF_B3_DRX_RFIC [29] B1 DRX4
BSI_D1 J1
C2 [4] RFIC0_BSI_D1
RF_B7_DRX_RFIC [29] DRX5
BSI BSI_D0 H2
D1 [4] RFIC0_BSI_D0 The linear detection range is 0~39dBm,
RF_B40_B28_DRX_RFIC [29] DRX6
DRX BSI_CLK K1
D2 [4] RFIC0_BSI_CK coupling factor is 22~27dB. 6dB Attenuator
DRX7
BSI_EN H1
E1 [4] RFIC0_BSI_EN
RF_B41_B8_DRX_RFIC [29] DRX8

RF_B5_DRX_RFIC [29] E2 DRX9

L7 R6002 36¦¸
TXDET1 [26] RF_TXDET
RF_B12/B17/B20_DRX_RFIC [29] F2 DRX10

R6004 R6005
G1 R6003 2K
RCAL
RF_LTE_HB_TX_RFIC [27] D12 TXO1

150¦¸

150¦¸
RF_LTE_MB_TX_RFIC [27] C12 TXO2 EN_BB G4 [4,10] SRCLKENA1
TXO XO
RF_2G_HB_TX_RFIC [26] A12 TXO3(2G) VIO18_RFIC
DRX(I/Q) PRX(I/Q) TX(I/Q) DET(I/Q) VIO L1
RF_2G_LB_TX_RFIC [26] A10 TXO4(2G)

100nF
C C

RX2_BBQP

RX2_BBQN

RX1_BBQP

RX1_BBQN
C11 L2 C6001

RX2_BBIP

RX2_BBIN

RX1_BBIP

RX1_BBIN

STX_MON
TXO5 XO_IN [10] PMIC_CLK_RF

TX_BBQP

TX_BBQN
RF_LTE_LB_TX_RFIC [27]

TX_BBIP

TX_BBIN
TX_GND

TX_GND

TX_GND

TX_GND

TX_GND

DET_QP

DET_QN
DET_IP

DET_IN
B10

B12

C10

D10

D11

J3

J4

L4

K4

L5

K5

J6

J5

H12

J12

L12

K12

L9

K9

K7

K8

F10
No Connection, for PN test

Put LC filter (default L=0R, C=NC) close to PMIC output

due to harmonic rejection.
LPF R2204=22nH,C2206=5pf£¬center 0.5GHz

LTE_DRX_BB0_IP [4]

LTE_DRX_BB0_IN [4]

LTE_DRX_BB0_QP [4]

LTE_DRX_BB0_QN [4]

LTE_PRX_BB0_IP [4]

LTE_PRX_BB0_IN [4]

LTE_PRX_BB0_QP [4]

LTE_PRX_BB0_QN [4]

LTE_TX_BB0_IP [4]

LTE_TX_BB0_IN [4]

LTE_TX_BB0_QP [4]

LTE_TX_BB0_QN [4]

LTE_DET_BB0_IP [4]

LTE_DET_BB0_IN [4]

LTE_DET_BB0_QP [4]

LTE_DET_BB0_QN [4]
B B

VIO18_PMU
VIO18_PMU
Power domain of MT6177M
RS6000
47K

VIO18_RFIC VIO18_PMU

R6017
0¦¸ VIO18_PMU£¬line width>10mil
R0201
R6022
NC RS6002
VRF18_RFIC VRF18_PMU
GPIO56_BUS9 [4]
4.7uF

CHG_OTG [5,14]
C6006

VRF18_PMU current:0.35MA£¬line width>20mil

10K

GPIO175 R6018 NC
NC
R6021 470¦¸ RS6003
R0201
VRF12_RFIC VRF12_PMU
4.7uF

C6015

VRF12_PMU current:0.15MA£¬line width>12mil

DRDI 4.7uF close to RFIC for better Ripple Performance

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
WTR2965
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 25
OF 31
 6 5 4 3 2 1
REVISION RECORD
Main RF TRX Switch
LTR ECO NO: APPROVED: DATE:

D D
RF_SW VIO18_PMU LTE_VMIPI

RS6100
VFE28_PMU
LTE_VFE28
C6116

1uF

RS-0201

RS6105

C6114
VTCXO2 8mil
1uF

C C

VBAT 80mil [25] RF_TXDET

LTE_VMIPI VBAT

C6101

LTVS8H4.5CBT5G
10nF

T6100
C6108 1nF C6118 C6117
C6110

+
C0201
C0603_22UF+/-20%-6.3V
10pF 100pF 22uF

+
J6102
J6101 ECT818000500

12

13

14

15

16

17

18

19
L6102 33pF 1 2 1 IN
RF ANT
4 3
G1 G2

GND12

GND13

GND14

GND15

GND16

CPL

GND18

NC
L6103 C6107

2
3
4
0.5pF 818011998
11
GND11 GND20 20 39nH NC

10
VBAT GND21 21

B 9 22
B

Front-End Module
VBAT ANT
R6103 8 23
VRAMP_DCDC [4] VRAMP GND23
6.98K
7 24 [27] RF_B40_TRX_TXM
VIO TRX14
6 25
MIPI1_SDATA [4] SDATA TRX13 [27] RF_B41_TRX_TXM
MT6169 TX Ouput need a DC block(MUST).
MIPI1_SCLK [4]
R6102 5
SCLK TRX12
26
100¦¸
R0201
4 27
2G_PAIN_HB RF_2G_HB_TX_RFIC [25]
33pF C6112 L6104
0¦¸
3
GND4

HB_IN
TRX11

TRX10
28
[28] RF_B5_TRX_TXM

[28] RF_B2_TRX_TXM
C6102
C6111 2 29
10pF LB_IN TRX9 [28] RF_B4_TRX_TXM
18pF NC
NC 1 30 [28] RF_B28B_TRX_TXM
GND1 TRX8

GND38
39

TRX1

TRX2

TRX3

TRX4

TRX5

TRX6

TRX7
GND39
C6109 C6104 C6103 U6100
38

37

36

35

34

33

32

31
220pF 10pF
C0201
18pF AP6716M-51
R6107 NC
2G_PAIN_LB RF_2G_LB_TX_RFIC [25]
33pF
C6105 0¦¸

R6104 R6106 RF_B3_TRX_TXM

[28]
NC NC [28] RF_B1_TRX_TXM
[28] RF_B28A_TRX_TXM
453¦¸

453¦¸

[28] RF_B8_TRX_TXM
[28] RF_B20/B12/B17_TRX_TXM
[28] RF_B7_TRX_TXM

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 26
OF 31
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

Power Net Connection

FDD LTE: B1/3/5/7/20
TDD LTE: 40
WCDMA: B1/2/5/8
GSM: B2/3/5/8
TDS: NA
D close to MT6177M B41 PRX D

39pF
NC
R6204 1.8nH C6235
C6243 33pF [25] RF_B41_B4_PRX_IC

CO-lay C6243 C6247 C6247

3nH
33pF
C6229

B4 NC 33pF CO-lay
NC 0.5pF
B28B_RX [28] B28B_RX
L6223

33pF
B41 33pF NC C6248 33pF NC R6208 1.5nH C6241
[25] RF_B40_B28B_PRX_IC

B4_RX

2nH
L6227
[28] B4_RX 0.5pF

CO-lay C6240 NC

CO-lay C6248 C6249 C6239 C6242

B40 PRX C6239 33pF

B40_HBRX NC 33pF 33pF NC

CO-lay
B40_TXM NC 33pF NC 33pF
VCC1ÓëVCC2·Ö¿ª×ßÏß Z6201
SAFFB2G59MA3F0A B28B 33pF NC NC NC

R6206
B41

8.2pF
VPA_PMU VPA_PMU Band RX 1.8nH R6207 1 IN OUT 4 [26] RF_B41_TRX_TXM
VPA_VCC1
B41

GND
GND
GND
3.6nH
TRX1(pin41)

4.3nH
B40(pin37) C6232
L6225
L6226

2
3
5
C6231
0.5pF 22pF
B41(pin39) TRX2(42) pin33,pin35 NC

C6210 C6238C6209 C6237 C6206 C6207

470nF

470nF

470nF
100pF
100pF 100pF

Z6200 SAFFB2G35MA0F0AR1X

C U6202 2.2nH R6203 1 UNB

B40

UNB 4 R6202 1.0nH B40

[26] RF_B40_TRX_TXM
C
AP7219M-71

GND
GND
GND
AP7219M-41_ PHASE 2_Airoha L6222 8.2nH
VCC2_2 C6227
28 C6228

2
3
5
30 VCC2 TRX2 0.5pF 8.2nH L6221 22pF
42
NC
29 VCC1
VPA_PMU VPA_PMU
TRX1 41 RS6211
VPA_VCC1

3/4G_PAIN_HB HB_TX HB4 39 1.8nH L6220

[28] RF_B7_PA_DPX B7 C6244

4.7uF

6.2nH
HB3 37 C6225
L6219 4.3nH 3 RFIN_H
RF_LTE_HB_TX_RFIC [25] C6222

C6226
8.2pF HB2 35 0.5pF
C6224 C6223 LPF for more NC

1.2pF 1pF margin on Tx HB1 33

spurious
3/4G_PAIN_MB MB_TX MB1
MB2
21
23
1.5nH L6217
[28] RF_B1_PA_DPX
B1 VPA_PMU width>60mil;(min wideth>=20mil,length<=100mils)
RF_LTE_MB_TX_RFIC[25]
C6217 33pF 3.6nH L6214 12 RFIN_M MB3 25 C6221
L6218 VCC1>=10mil;VCC2>=50mil

NC
MB4 26
C6218
MB5 32 0.5pF
22nH VPA_PMU PA side load C 6.2UF+-5%
C6219
2.0pF
1.2pF
L6209 2nH
4G PA input need LPF for harmonic rejection
C6208 33pF L6211 9.1nH 13 RFIN_L1
LB_TX LB1
LB2
LB3
19
18
17 C6205 1pF L6210
[28] RF_B3_PA_DPX
B3
RF_LTE_LB_TX_RFIC [25] 14 RFIL_L2
LB4 16

33nH
LB5 20
C6215 C6214

3.3pF 3.3pF
3.3nH L6215
VBAT
LTE_VMIPI
8
7
6
VBAT
VIO
SCLK CTRL
¼æÈÝÂç´ïPA½ÓµØ GND4
NC
NC
4
9
10 1pF
C6220
L6216
[28] RF_B4_PA_DPX
B4
MIPI0_SCLK [4] 5 SDATA NC
11 NC
MIPI0_SDATA [4] 0.5pF
LTVS8H4.5CBT5G

100nF

C6213 C6216 C6252 C6251 3.6nH L6212

B2
T6200
+

[28] RF_B2_PA_DPX
GND15
GND22
GND24
GND27
GND31
GND34
GND36
GND38
GND40

GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
B B
GND1
GND2

C6212100pF 1nF 10pF 10pF

NC NC
+

C6211 0.5pF
1.2pF
L6213
1
2
15
22
24
27
31
34
36
38
40

43
44
45
46
47
48
49
50

L6203
33pF
GND
C6202 NC
[28] RF_B28B_PA_DPX
B28B

NC
L6204

12nH 1pF

R6201
27pF
7.5nH
[28] RF_B28A_PA_DPX
B28A

C6201
3.9pF

L6202

3.6nH L6200

L6201
[28] RF_B20/B12/B17_PA_DPX
B20/B12/B17
3.3pF NC
18nH
C6200

Thermistor / To sense board level temperature 3.6nH C6203

[28] RF_B8_PA_DPX
B8
L6206
3.3pF
NC
L6205 18nH
VIO18_PMU

L6207 6.2nH
[28] RF_B5_PA_DPX
B5
390K

C6204
L6208

4.7pF NC
15nH
R6200

Thermister have to be placed as close to B7&B1 PA AUX_IN1_NTC [4]

A A
100K

as possible, routing with ground guard.

RT900 close to PA , and located in the same layer C6246 COMPANY:
<Company Name>
RT6200

1uF

TITLE:

DRAWN: DATED:
MT6762
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 27
OF 31
 6 5 4 3 2 1
B5_BC0 PRX REVISION RECORD

LTR ECO NO: APPROVED: DATE:

B1 TRX RF_B1_TRX_TXM [26]

1.5nH L6300
B5 TRX

2nH
L6302 Z6300
R6301
close to MT6177M

ANT 6
NC SAYRH1G95BA0F0AR00 1.5nH
RF_B5_TRX_TXM [26]
L6301 B1
18nH Z6301
1 RX TX 3 C6303 L6304

ANT 6
[27] RF_B1_PA_DPX SFX836CYA02
B5

7.5nH
2.7pF

GND
GND
GND
GND
GND
NC 33pF
3 TX C6327 7.5nH C6304 33pF
RX 1 L6308 [25] RF_B5_GSM850_PRX_IC

2
4
5
7
8

GND
GND
GND
GND
GND
NC C6328 33pF

C6305
L6309

8
7
5
4
2

NC
close to MT6177M co_lay 10nH

12nH
RF_B5_PA_DPX[27]

L6303 C6325 33pF Z6312

2.2nH [25] RF_B1_PRX_IC
DEA160960LT-5059A1
D L6307
C6302
C6329 2.2nH 1 3
D
NC IN OUT
NC

GND

GND
18nH
4.3nH

4
co_lay
GND

B2 TRX B28B TRX

Z6318&Z6302 co-lay
1.0nH C6306
RF_B2_TRX_TXM [26]
L6310 Z6318 Z6302
new SD18-1880R8UUA1 RF_B28B_TRX_TXM [26]
L6312 1.0nH
L6311 SFHG60KQ602

ANT 6
D6DA1G960K2B1-Z
3.3nH

NC B2 B2 L6314 L6313
3.6nH 6 3
IN OUT 1 RX TX 3 [27] RF_B2_PA_DPX NC
8.2nH

GND
GND
GND
GND
GND
GND
GND
GND
GND
18nH

2
4
5
7
8
5
4
2
1
NC Z6303

ANT 6
close to MT6177M L6319 9.1nH
B28B
SAYEY733MBC0F0A

1
RF_B28B_PA_DPX [27] 3 TX RX [27] B28B_RX
1.5nH L6315 C6308 33pF
[25] RF_B2_PCS1900_PRX_IC

GND
GND
GND
GND
GND
L6318

8
7
5
4
2
C6309

18nH
co_lay

2.4nH
NC

C Z6319
B20/B12/B17 TRX C
SFHG42KQ602
B3 TRX Z6304&Z6319 co-lay B3 L6322 1.2nH
R6304 1.0nH RF_B20/B12/B17_TRX_TXM [26]
6 3
RF_B3_TRX_TXM [26] IN OUT
close to MT6177M
GND
GND
GND
GND

L6345 L6323
2.4nH
L6320 L6321 NC
R6305ºÍZ6305¹²º¸ÅÌ
5
4
2
1

NC
close to MT6177M 12nH
NC

Z6304
ANT 6

D6DA1G842K2C4-Z
3nH

3.9nH R6305
B3

C6322
Z6306 0¦¸

33pF

ANT 6
3 TX RX 1 3.6nH L6343 SAYEY806MBA0F0A
Z6305
[25] RF_B3_DCS1800_PRX_IC B20
LF0605-NR87NAA
GND
GND
GND
GND
GND

C6321
3 TX C6310 33pF 1 2 L6346 18nH C6324 33pF
NC
RF_B20/B12/B17_PA_DPX [27] RX 1 IN OUT [25] RF_B20/B12/B17_PRX_IC
L6344

5.1nH
GND
GND
GND
GND
GND
8
7
5
4
2

2.7pF NC

GND

GND
0.5pF L6347

5.1nH

8
7
5
4
2
L6349
NC 1pF

4
L6326 L6350
RF_B3_PA_DPX [27]
10nH

B4 TRX
B8 TRX RF_B8_TRX_TXM [26]
L6327 1.0nH

R6306 1.0nH
L6330
NC
L6328 close to MT6177M

6.8nH
RF_B4_TRX_TXM [26] Z6307 2.4nH
ANT 6

D6DA2G155K2T2
L6325 B4
L6324 Z6309
3.3nH 3 TX RX 1 [27] B4_RX

ANT 6
NC SAYEY897MBG0F0AR00
B8
GND
GND
GND
GND
GND

B 3.9nH L6354 33pF 3 TX RX 1

L6334 12nH C6313 33pF
B
close to B4 DPX RF_B8_PA_DPX [27] [25] RF_B8_GSM900_PRX_IC
8
7
5
4
2

GND
GND
GND
GND
GND

33nH
C6316

8
7
5
4
2
8.2pF
NC
RF_B4_PA_DPX [27] L6338

GND

B28A TRX GSM850 SAW

close to MT6177M new DEA160960LT-5059A1
L6329 1.0nH
RF_B28A_TRX_TXM [26] Z6308
9.1nH

ANT 6

SFX718BYJ02
L6331
B28A LBSW£ºBFDEA160960LT-5059A1;C6326_33PF;C6340_NC
NC
3.6nH L6332
3 TX RX 1
L6333 18pF C6312 33pF
[25] RF_B28A_PRX_IC HBSW_PCS1900 FI168B1888GL-T;C6340_33PF;C6326_NC
GND
GND
GND
GND
GND

C6314
L6336
8
7
5
4
2

8.2pF
NC
RF_B28A_PA_DPX [27] 9.1nH

A B7 TRX R6307 1.8nH A

RF_B7_TRX_TXM [26]
L6340 close to MT6177M COMPANY:
C6318

co_lay <Company Name>

3.3nH

18pF
NC

TITLE:
Z6310
ANT 6

SAYEY2G53BA0F0A

3 TX
B7

RX 1
C6319 15pF
DRAWN: DATED: PRI_TRX_DUPLEXER
RF_B7_PA_DPX [27] [25] RF_B7_PRX_IC Chunshen.zhou 20170417
L6341
2.0pF
GND
GND
GND
GND
GND

1.2nH

C6320 CHECKED: DATED:

CODE: SIZE: DRAWING NO: REV:
8
7
5
4
2

<Checked By> <Checked Date>

2.2nH

L6342

QUALITY CONTROL: DATED:

<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 28
OF 31
 6 5 4 3 2 1
REVISION RECORD

[29] RF_B1/B4_DRX_SWITCH B40 B28 DRX LTR ECO NO: APPROVED: DATE:

SWITCH [29]
[29]
[29]
RF_B2_DRX_SWITCH
RF_B3_DRX_SWITCH
RF_B7_DRX_SWITCH
½¨ÒéB40ÓÅÏÈÌùƬ
Z6400
SAFFB2G35AA0F0AR1X

close to MT6177M

12

11

10
U6400

L6400

33pF
RFASWDH2418ATF09

RF8

RF6

RF4

RF2
C6400 10pF 1 4 C6401 33pF
J6400 RF_B40/B28_DRX_SWITCH [29] UNBAL1 UNBAL2
C6433 33pF NC [25] RF_B40_B28_DRX_RFIC
2 1 8
DIV_ANT [30] ANT RF L6402

7.5nH
3 4 ANT B40 L6401
G2 G1 13 [4]
C6434 V1 BPI_BUS2 2 GND1
7

1.8nH
L6435 RF7
33pF 14 [4]
818011998 V2 BPI_BUS3
NC 6
EPAD 3 GND2 GND3 5 3nH
15 [4] L6403
39nH V3 BPI_BUS7
5

VDD
RF5

RF3

RF1
C6409 C6410 C6411

4
D 1nF 1nF 1nF D
RF_B20/B12/B17_DRX_SWITCH [29]

RF_B5_DRX_SWITCH[29]
RF_B41/B8_DRX_SWITCH [29] LTE_VFE28
RF_B40/B28_DRX_SWITCH [29]
C6413

1nF

RFASWDH2418ATF09 RF port V1(BUS9) V2(BUS8) V3(BUS7)

Band3 RF4 0 1 1 B5 DRX

Band40/28 RF1 0 0 0
×¢ÒâÍÁ¶úÆä¿Í»§B8 DRX×ßÕâһ·
Band1/4 RF8 1 1 1
Band2 RF6 1 0 1
Z6402
SFH881AA002
close to MT6177M
new HDFB05ARSS-B5 B5
Band20/12/17 RF7 1 1 0 RF_B5_DRX_SWITCH[29]
C6404 33pF
1 UNB UNB 4 L6408 12nH C6405 33pF
[25] RF_B5_DRX_RFIC

GND
GND
GND
RF2 L6410 L6411
Band7 0 0 1 L6409
NC NC

2
3
5
Band5 RF5 1 0 0 22nH 10nH 12nH

Band41/8 RF3 0 1 0

C C
B7 DRX
B1:DRX

Z6405
close to MT6177M Z6403
SFHG56BA002
close to MT6177M
F6BA2G155M6UU-J
B7

L6412

2.7pF
B66/B1 R6408 33pF
1 4 C6412 33pF
RF_B7_DRX_SWITCH [29] UNB UNB [25] RF_B7_DRX_RFIC
C6416 1.0nH 1 4 L6418 1.8nH C6417 33pF

GND
GND
GND
IN OUT [25] RF_B1/B4_DRX_RFIC
RF_B1/B4_DRX_SWITCH [29] L6414 L6415 L6416
GND
GND
GND

L6424 L6425

1.5nH
L6423 NC

2
3
5
NC
2
3
5

12nH 4.3nH
NC
10nH 7.5nH
18nH

B2 DRX B20/B12 /17DRX

B B

close to MT6177M R6409ºÍZ6406¹²º¸ÅÌ close to MT6177M

Z6407
R6409 Z6404
0¦¸
B2 SAFFB806MAA0F0A
33pF L6426 2.4nH Z6406
C6423 1 4 C6424 33pF

C6414
RF_B2_DRX_SWITCH [29] UNB UNB [25] RF_B2_DRX_RFIC B20

12pF
C6440 12nH LF0605-NR87NAA
RF_B20/B12/B17_DRX_SWITCH[29] 2 1 L6417 6.2nH C6415 33pF
1 4
GND

GND

GND

L6432 L6433 OUT IN UNB UNB [25] RF_B12/B17/B20_DRX_RFIC

GND
GND
GND
L6431
9.1nH

NC

GND

GND
NC
2

10nH 3.9pF L6419 L6421

2
3
5
3.9nH NC 2.7pF
L6459 NC

12nH
L6420
L6458 2.0pF 18nH
NC
L6422

3.9nH

GND

B41/B8 DRX Z6401

close to MT6177M
B3 DRX ½¨ÒéB41ÓÅÏÈÌùƬ new SAFFB2G59AA3F0A
SFH942AA002

B8
C6402 10pF L6404 12nH C6403 33pF
RF_B41/B8_DRX_SWITCH [29] 1 UNB UNB 4 [25] RF_B41_B8_DRX_RFIC

GND
GND
GND
L6405 L6406
L6407
NC

2
3
5
close to MT6177M

33nH
3.3nH

22nH
A Z6410
SAFFB1G84AB0F0AR1X
A
COMPANY:

C6431 18pF 1
B3
4 L6441 3.3nH C6432 33pF
<Company Name>
RF_B3_DRX_SWITCH[29] UNB UNB [25] RF_B3_DRX_RFIC
GND
GND
GND

L6443
L6448 L6449
B
TITLE:
9.1nH

5.6nH

NC
2
3
5

10nH
DRAWN: DATED:
DRX_ANT
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 29
OF 31
 LTE_VFE28

RS-0201
DIV_ANT

RS6501
E6501
E6505 E6502
E6500 P31-AB01F080 P31-AB01F080 P31-AB01F080
P31-AB01F080

ANT-SMD_2.5X1.0X0.8_P31-AB01F080
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
C6503
R6506

C0201
0¦¸

0¦¸
100pF

R0201
82nH
0¦¸ R6500 0¦¸ R6501 NC
DIV_ANT [29] 0¦¸ NC

R0201
R0201
C6501 R6504
C6500 R6505

R6502
18pF 18pF
NC NC

4
U6501

VDD
1
RF1 R6507 0¦¸ NC

R0201
2 R6508 0¦¸ NC
RF2

R0201
10 R6511 0¦¸ NC
RFC 9

R0201
RF3 R6512 0¦¸ NC

R0201
RS-0201 RS6513 5 RF4 8
BPI_BUS1 [4] RS6514 CTRL1
6
BPI_BUS0 [4] CTRL2

GND
GND
RS-0201

7
3
C6504 C6505

C0201
C0201
18pF 18pF
NC NC

GND
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

VCN33_PMU AVDD33_WBT

RS7010

VCN18_PMU
AVDD18_GPS

RS7011

AVDD18_WBT

1uF
RS7012

C7012
AVDD18_WBT
D FM_AVDD28 D
VCN28_PMU BLM15AG601SN1D

C7005

100nF
B7000 [5] BT_DATA [13]

[5] BT_CLK [13]

100pF
C7006
1uF
C7014
[5] WF_CTRL0 [13]

[5] WF_CTRL1 [13]

23WF_CTRL0

22WF_CTRL1

21WF_CTRL2
25BT_DATA

24BT_CLK
[5] WF_CTRL2 [13]
Close to Antenna U7000

30

29

28

27

26
GND

GND

WIFI_AUX_2G

WB_VDET_2G

WIFI_VDET_5G

AVDD18_WBT

AVDD18_WBT

BT_DATA

BT_CLK

WF_CTRL0

WF_CTRL1

WF_CTRL2
C7011
18pF

18pF
E7000 50 Ohm SAFQA2G45MA0G0A 1
E7001 R7000
IN 50 Ohm
E7002 P31-AB01F080
P31-AB01F080

GND
P35-AB01F190

OUT
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
C7010
ANT-SMD_2.5X1.0X0.8_P31-AB01F080
L7000

NC 9.1nH
ANT-SMD_2.2X1.0X1.9_P35-AB01F190
6.8nH

NC

5
18pF 6.8nH
L7008 FL7000 L7001 WB_ANT31 WB_RF_2G WF_IP 20WF_IP [5] WF_IP
NC [13]

NC
AVDD33_WBT
32 NC WF_IN 19 WF_IN [5] WF_IN[13]
R7021

C7003

4.7uF
MT6631N
0¦¸

33 AVDD33_WBT WF_QP 18 WF_QP [5] WF_QP[13]

Close to

100pF
C7004
NC
0¦¸ R7004
FL7001 MT6631 34 WF_RF_5G WF_QN 17 WF_QN [5] WF_QN[13]
R7007 R7020 J7001
1 6
2 1 GND WIFI
0¦¸ 0¦¸ ANT RF
C7023
3
G2 G1
4 0¦¸ R7003 50 Ohm
35 WF_AUX_5G
MT6631 BT_IP 16 BT_IP [5] BT_IP [13]

C7001

10nF
C7024 2 5
18pF
ANT GND
818011998
NC 18pF FM_AVDD28

C0201_10NF+/-10%-10V
NC 3 4 36 AVDD28_FM BT_IN 15 BT_IN [5] BT_IN [13]
L7006 GND GPS 50 Ohm
C7019
18pF
MDPX18M1524P69-D03
C 18pF
NC
NC

[62] FM_ANT_N [18]

37 FM_LANT_N BT_QP 14 BT_QP [5] BT_QP [13] C
L7002 38 13 BT_QN
[62] FM_ANT_P [18] FM_LANT_P BT_QN [5] BT_QN[13]
82nH

R7001
39 12 GPS_I [5] GPS_I [13]

L7003
GPS_RFIN GPS_IP

NC 9.1nH
50 Ohm

NC
100K
40 AVDD18_GPS GPS_IN 11

C7002

AVDD28_FSOURCE

CONN_TOP_DATA

CONN_TOP_CLK
C0201
4.7nF 41

CONN_HRST_B
DVSS

WB_PTA

GPS_QN

GPS_QP
RS7018
GPIO_GPS_LNA_EN [5]

XO_IN
CEXT
C7022

18pF

NC
NC
GPS xLNA VCN28_PMU

10
RS7009 MT6631
Close to ANT matching value depends on 10nF
C7018

AVDD18_GPS
GPS_Q
FL7002 LNA selected 33pF [5] GPS_Q [13]
SAFFB1G56AC0F0A
GPS_RF_LNA C7017 [13] CONN_HRST_B [5] CONN_HRST_B
50 Ohm AW5005DNRZ
33pF L7005 9.1nH 3
1 UNB UNB 4 RFIN VCC 4
R7002 0¦¸ 2 5 [5] CONN_TOP_DATA
C7015 [13] CONN_TOP_DATA
GND
GND
GND

GND EN
L7004 1 6 R7008 0¦¸
GND RFOUT

NC
L7011 [13] CONN_TOP_CLK C7007 C7008
18pF U7001 CONN_TOP_CLK [5]
2
3
5

C7016
NC 4.7pF
18pF NC 1uF 100pF
L7010
NC

L7009

NC 9.1nH
[13]CONN_WB_PTA CONN_WB_PTA
L7007

9.1nH 18pF [5]

NC

B [13] CONN_XO_IN_BB
B
[5]

[22] PMIC_CLK_WCN [10]

RS7005

A A
COMPANY:
<Company Name>
TITLE:

DRAWN: DATED:
RF_PWR_ET_APT
Chunshen.zhou 20170417
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> P160AN D P160AN V1.2
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 31
OF 31