Solution Midterm

Q#1. Explain the Memory Segments and Segment Registers, Logical Vs. Physical Address and
pipeline concept in 8086. Also Aligned and Mis-aligned data in 8086 with examples.

Answer:

Memory Segments and Segment Registers: 1-Mbytes of memory are partitioned into 64-Kbyte
(65,536) segments. Each segment is assigned a Base Address that identifies its starting point
(identify its lowest address byte-storage location). Only four of these 64-Kbyte segments are
active at a time: the code segment, stack segment, data segment, and extra segment.
Code Segment is used to store the instructions/code and accessed through CS: IP register Set.
Data Segment is used to store the Data/values used during compilation and computation and
accessed by DS: Offset (Direct, indirect (Registers)). Stack Segment is used to implement the
stack and accessed through SS: SP registers. Extra Segment is used to manipulate the string
related instructions and data, accessed through ES: SI/DI, DS: SI etc. registers.
The addresses of these four segments are held in four segment registers: CS (code segment), SS
(stack segment), DS (data segment), and ES (extra segment). These registers contain a 16-bit
base address that points to the lowest addressed byte of the segment. The segment registers are
user accessible. This means that the programmer can change their contents through software.
Logical vs. Physical Address: logical address is generated by CPU during a program execution
whereas, the physical address refers to a location in the memory unit. For example CS:IP
registers provide a logical address for a particular instruction which will be executed in next
instruction cycle, whereas CPU convert this logical address to its physical location of the
memory where actually the instruction resides in the memory.

Aligned and Mis-aligned: 8086 can supports 1-Mbyte of external memory that organized as
individual bytes of data stored at consecutive addresses over the address range 0000016 to
FFFFF16. The 8086 can access any two consecutive bytes as a word of data. The lower-
addressed byte is the least significant byte of the word, and the higher- addressed byte is its most
significant byte. The word of data is at an even-address boundary if its least significant byte is in
even address. It’s also called aligned word. The word of data is at an odd-address boundary if its
least significant byte is in odd address. It’s also called misaligned word.

Q#2. Predict the values of memory and registers after execution of following instructions?
 SS 01 AB 01ABC 2F C3
SP 00 02 01ABA 5B 8A
AX 2B 4C 01AB8 9E 7C
BX 66 88 01AB6 B6 2E
01AB4 1A B4
01AB2 9B AD
ADD AX, BX 01AB0 EF EE
PUSH AX
OR BX, AX
INC BX
PUSH BX
Answer

1. ADD AX, BX 2B4C + 6688 → AX = 91D4

→
2. PUSH AX SP = SP-2 → SP = 0000, Memory location 01AB0 = D4 &
→ 01AB1 = 91
3. OR BX, AX 91D4 OR 6688 → BX = F7DC
→
4. INC BX F7DC +1 → BX = F7DD
→
5. PUSH BX → Cannot Push the value stack overflow because SP = 0000.

Q#3. Develop an assembly language code that will take two values from user, add the values and
place the result in memory. Also write the code to display the result on screen.

Answer

Org 100h
Mov ah, 01 ; input first value
Int 21h
Mov bl, al ; mov the input value into bl
Mov ah, 01 ; input second value
Int 21h
Add al,bl ; first + second
AAA ; adjust the ascii result after addition
Add AX, 3030h ; adjust the answer in hexadecimal
Mov [0200], AX ; memory location to store the result
Mov dl, [0201] ; load first value from memory to display on screen
Mov ah,02
Int 21h
Mov dl, [0200] ; load second value from memory to display on screen
Mov ah,02
Int 21h
HLT
Q#4. Explain the AAA and DAA instructions with the help of suitable examples.

Answer

AAA instruction specifically used to adjust the result after the operation of addition two binary
numbers which represented in ASCII. AAA instruction should be executed immediately after the
ADD instruction that adds ASCII data. Since AAA can adjust only data that are in AL, the
destination register for ADD instructions that process ASCII numbers should be AL.

The AAA instruction works as follows:

If the least significant four bits in AL are > 9 or if AF =1, it adds 6 to AL and 1 to AH.
Both CF and AF are set. In all cases, the most significant four bits in AL are cleared
Example 1 Example 2
34H = 00110100B 36H = 00110110B
35H = 00110101B 37H = 00110111B

69H = 01101001B 6DH = 01101101B

Should be 09H ignore 6 Should be 13H Ignore 6 and add 6 to D.

DAA instruction used to perform an adjust operation similar to that performed by AAA but for
the addition of packed BCD numbers instead of ASCII numbers. Since DAA can adjust only data
that are in AL, the destination register for ADD instructions that process BCD numbers should
be AL.
DAA must be invoked after the addition of two packed BCD numbers.
The DAA instruction works as follows:
If the least significant four bits in AL are > 9 or if AF =1, it adds 6 to AL and sets AF
If the most significant four bits in AL are > 9 or if CF =1, it adds 60H to AL and sets CF

Example 1 Example 2
29H = 00101001B 27H = 00100111B
69H = 01101001B 34H = 00110100B

92H = 10010010B 5BH = 01011101B

Should be 98H (add 6) Should be 61H (add 6)

Q#5. Write an assembly language code for the given statement:

let num1=123456H and num2=654321H are stored at memory locations700 and 800
respectively in the current data segment. ADD num1and num2 and store the result at memory
location 900.
 Answer

MOV AX, [0700]

MOV BX , [0702]
ADD AX , [0800]
ADC BX , [0802]
MOV [0900] ,AX
MOV [0902] , BX

Q#6. Explain the Instruction set and Addressing Modes of 8086, justify your answer with the
help of suitable examples from Based addressing and Based Index addressing modes.

The instruction set provides commands to the processor, to tell it what it needs to do. The
instruction set consists of addressing modes, instructions, native data types, registers, memory
architecture, interrupt, and exception handling, and external I/O.

Instruction set includes:

1. Data transfer instructions
2. Arithmetic instructions
3. Logic instructions
4. String manipulation instructions
5. control transfer instructions
6. Processor control instructions.
Based addressing: This mode, the effective address is obtained by adding a direct or indirect
displacement to the contents of either base register BX of Base pointer register BP. Based
addressing is used in linear arrays data structures.

E.g MOV [BX]+1234H, AL

In this example Base address is provided in BX register whereas 16-bit displacement will be
added to access the specific value.

Based Index addressing: This mode combines the based addressing mode and indexed
addressing mode. Based index is used in two-dimensional array data type.

E.g MOV AH, [BX][SI]+1234H

Base address is provided in BX register + index register, displacement can also be used to access
the specific value at address.